Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 01:58:46.901791 lava-dispatcher, installed at version: 2023.06
2 01:58:46.901961 start: 0 validate
3 01:58:46.902084 Start time: 2023-08-17 01:58:46.902078+00:00 (UTC)
4 01:58:46.902211 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:58:46.902351 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 01:58:47.155985 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:58:47.156632 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip78-rt45%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:58:47.410577 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:58:47.411152 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip78-rt45%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
10 01:58:49.813568 validate duration: 2.91
12 01:58:49.813955 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:58:49.814050 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:58:49.814136 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:58:49.814262 Not decompressing ramdisk as can be used compressed.
16 01:58:49.814344 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 01:58:49.814413 saving as /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/ramdisk/rootfs.cpio.gz
18 01:58:49.814472 total size: 8418130 (8 MB)
19 01:58:50.306892 progress 0 % (0 MB)
20 01:58:50.311899 progress 5 % (0 MB)
21 01:58:50.313482 progress 10 % (0 MB)
22 01:58:50.315033 progress 15 % (1 MB)
23 01:58:50.316575 progress 20 % (1 MB)
24 01:58:50.318119 progress 25 % (2 MB)
25 01:58:50.319654 progress 30 % (2 MB)
26 01:58:50.321066 progress 35 % (2 MB)
27 01:58:50.322711 progress 40 % (3 MB)
28 01:58:50.324243 progress 45 % (3 MB)
29 01:58:50.325810 progress 50 % (4 MB)
30 01:58:50.327334 progress 55 % (4 MB)
31 01:58:50.328834 progress 60 % (4 MB)
32 01:58:50.330233 progress 65 % (5 MB)
33 01:58:50.331733 progress 70 % (5 MB)
34 01:58:50.333233 progress 75 % (6 MB)
35 01:58:50.334764 progress 80 % (6 MB)
36 01:58:50.336262 progress 85 % (6 MB)
37 01:58:50.337775 progress 90 % (7 MB)
38 01:58:50.339259 progress 95 % (7 MB)
39 01:58:50.340668 progress 100 % (8 MB)
40 01:58:50.340843 8 MB downloaded in 0.53 s (15.25 MB/s)
41 01:58:50.340974 end: 1.1.1 http-download (duration 00:00:01) [common]
43 01:58:50.341167 end: 1.1 download-retry (duration 00:00:01) [common]
44 01:58:50.341238 start: 1.2 download-retry (timeout 00:09:59) [common]
45 01:58:50.341332 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 01:58:50.341467 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip78-rt45/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
47 01:58:50.341532 saving as /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/kernel/bzImage
48 01:58:50.341589 total size: 8634256 (8 MB)
49 01:58:50.341648 No compression specified
50 01:58:50.342652 progress 0 % (0 MB)
51 01:58:50.344328 progress 5 % (0 MB)
52 01:58:50.345932 progress 10 % (0 MB)
53 01:58:50.347485 progress 15 % (1 MB)
54 01:58:50.349027 progress 20 % (1 MB)
55 01:58:50.350573 progress 25 % (2 MB)
56 01:58:50.352316 progress 30 % (2 MB)
57 01:58:50.353864 progress 35 % (2 MB)
58 01:58:50.355403 progress 40 % (3 MB)
59 01:58:50.356945 progress 45 % (3 MB)
60 01:58:50.358501 progress 50 % (4 MB)
61 01:58:50.360039 progress 55 % (4 MB)
62 01:58:50.361666 progress 60 % (4 MB)
63 01:58:50.363190 progress 65 % (5 MB)
64 01:58:50.364683 progress 70 % (5 MB)
65 01:58:50.366194 progress 75 % (6 MB)
66 01:58:50.367700 progress 80 % (6 MB)
67 01:58:50.369189 progress 85 % (7 MB)
68 01:58:50.370796 progress 90 % (7 MB)
69 01:58:50.372297 progress 95 % (7 MB)
70 01:58:50.373821 progress 100 % (8 MB)
71 01:58:50.373968 8 MB downloaded in 0.03 s (254.33 MB/s)
72 01:58:50.374102 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:58:50.374312 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:58:50.374376 start: 1.3 download-retry (timeout 00:09:59) [common]
76 01:58:50.374459 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 01:58:50.374585 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip78-rt45/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
78 01:58:50.374644 saving as /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/modules/modules.tar
79 01:58:50.374691 total size: 256124 (0 MB)
80 01:58:50.374739 Using unxz to decompress xz
81 01:58:50.378300 progress 12 % (0 MB)
82 01:58:50.378607 progress 25 % (0 MB)
83 01:58:50.378806 progress 38 % (0 MB)
84 01:58:50.380394 progress 51 % (0 MB)
85 01:58:50.381993 progress 63 % (0 MB)
86 01:58:50.383625 progress 76 % (0 MB)
87 01:58:50.385204 progress 89 % (0 MB)
88 01:58:50.386736 progress 100 % (0 MB)
89 01:58:50.391723 0 MB downloaded in 0.02 s (14.35 MB/s)
90 01:58:50.391909 end: 1.3.1 http-download (duration 00:00:00) [common]
92 01:58:50.392175 end: 1.3 download-retry (duration 00:00:00) [common]
93 01:58:50.392276 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 01:58:50.392382 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 01:58:50.392461 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 01:58:50.392538 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 01:58:50.392730 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y
98 01:58:50.392851 makedir: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin
99 01:58:50.392933 makedir: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/tests
100 01:58:50.393010 makedir: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/results
101 01:58:50.393097 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-add-keys
102 01:58:50.393215 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-add-sources
103 01:58:50.393333 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-background-process-start
104 01:58:50.393432 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-background-process-stop
105 01:58:50.393526 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-common-functions
106 01:58:50.393619 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-echo-ipv4
107 01:58:50.393712 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-install-packages
108 01:58:50.393810 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-installed-packages
109 01:58:50.393899 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-os-build
110 01:58:50.393988 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-probe-channel
111 01:58:50.394077 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-probe-ip
112 01:58:50.394167 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-target-ip
113 01:58:50.394256 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-target-mac
114 01:58:50.394345 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-target-storage
115 01:58:50.394439 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-case
116 01:58:50.394529 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-event
117 01:58:50.394619 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-feedback
118 01:58:50.394709 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-raise
119 01:58:50.394801 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-reference
120 01:58:50.394896 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-runner
121 01:58:50.394985 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-set
122 01:58:50.395076 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-test-shell
123 01:58:50.395168 Updating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-install-packages (oe)
124 01:58:50.395287 Updating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/bin/lava-installed-packages (oe)
125 01:58:50.395377 Creating /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/environment
126 01:58:50.395453 LAVA metadata
127 01:58:50.395513 - LAVA_JOB_ID=11304541
128 01:58:50.395563 - LAVA_DISPATCHER_IP=192.168.201.1
129 01:58:50.395642 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 01:58:50.395697 skipped lava-vland-overlay
131 01:58:50.395755 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 01:58:50.395815 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 01:58:50.395863 skipped lava-multinode-overlay
134 01:58:50.395918 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 01:58:50.395978 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 01:58:50.396036 Loading test definitions
137 01:58:50.396106 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 01:58:50.396165 Using /lava-11304541 at stage 0
139 01:58:50.396390 uuid=11304541_1.4.2.3.1 testdef=None
140 01:58:50.396462 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 01:58:50.396530 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 01:58:50.396954 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 01:58:50.397137 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 01:58:50.397676 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 01:58:50.397876 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 01:58:50.398362 runner path: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/0/tests/0_dmesg test_uuid 11304541_1.4.2.3.1
149 01:58:50.398484 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 01:58:50.398675 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 01:58:50.398733 Using /lava-11304541 at stage 1
153 01:58:50.398969 uuid=11304541_1.4.2.3.5 testdef=None
154 01:58:50.399035 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 01:58:50.399096 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 01:58:50.399461 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 01:58:50.399639 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 01:58:50.400146 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 01:58:50.400327 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 01:58:50.400791 runner path: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/1/tests/1_bootrr test_uuid 11304541_1.4.2.3.5
163 01:58:50.400902 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 01:58:50.401069 Creating lava-test-runner.conf files
166 01:58:50.401117 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/0 for stage 0
167 01:58:50.401184 - 0_dmesg
168 01:58:50.401272 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11304541/lava-overlay-vw1q1k3y/lava-11304541/1 for stage 1
169 01:58:50.401369 - 1_bootrr
170 01:58:50.401454 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 01:58:50.401519 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 01:58:50.408041 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 01:58:50.408134 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 01:58:50.408207 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 01:58:50.408277 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 01:58:50.408344 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 01:58:50.574961 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 01:58:50.575260 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 01:58:50.575373 extracting modules file /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11304541/extract-overlay-ramdisk-i9jnotyh/ramdisk
180 01:58:50.584324 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 01:58:50.584434 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 01:58:50.584514 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11304541/compress-overlay-7y36697y/overlay-1.4.2.4.tar.gz to ramdisk
183 01:58:50.584575 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11304541/compress-overlay-7y36697y/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11304541/extract-overlay-ramdisk-i9jnotyh/ramdisk
184 01:58:50.590736 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 01:58:50.590842 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 01:58:50.590922 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 01:58:50.591012 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 01:58:50.591077 Building ramdisk /var/lib/lava/dispatcher/tmp/11304541/extract-overlay-ramdisk-i9jnotyh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11304541/extract-overlay-ramdisk-i9jnotyh/ramdisk
189 01:58:50.656464 >> 49849 blocks
190 01:58:51.386920 rename /var/lib/lava/dispatcher/tmp/11304541/extract-overlay-ramdisk-i9jnotyh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/ramdisk/ramdisk.cpio.gz
191 01:58:51.387294 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 01:58:51.387416 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 01:58:51.387529 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 01:58:51.387631 No mkimage arch provided, not using FIT.
195 01:58:51.387713 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 01:58:51.387794 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 01:58:51.387884 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 01:58:51.387982 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 01:58:51.388044 No LXC device requested
200 01:58:51.388103 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 01:58:51.388175 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 01:58:51.388237 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 01:58:51.388294 Checking files for TFTP limit of 4294967296 bytes.
204 01:58:51.388608 end: 1 tftp-deploy (duration 00:00:02) [common]
205 01:58:51.388687 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 01:58:51.388754 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 01:58:51.388856 substitutions:
208 01:58:51.388907 - {DTB}: None
209 01:58:51.388954 - {INITRD}: 11304541/tftp-deploy-sfrwswaz/ramdisk/ramdisk.cpio.gz
210 01:58:51.388998 - {KERNEL}: 11304541/tftp-deploy-sfrwswaz/kernel/bzImage
211 01:58:51.389043 - {LAVA_MAC}: None
212 01:58:51.389086 - {PRESEED_CONFIG}: None
213 01:58:51.389130 - {PRESEED_LOCAL}: None
214 01:58:51.389175 - {RAMDISK}: 11304541/tftp-deploy-sfrwswaz/ramdisk/ramdisk.cpio.gz
215 01:58:51.389225 - {ROOT_PART}: None
216 01:58:51.389276 - {ROOT}: None
217 01:58:51.389323 - {SERVER_IP}: 192.168.201.1
218 01:58:51.389366 - {TEE}: None
219 01:58:51.389409 Parsed boot commands:
220 01:58:51.389452 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 01:58:51.389592 Parsed boot commands: tftpboot 192.168.201.1 11304541/tftp-deploy-sfrwswaz/kernel/bzImage 11304541/tftp-deploy-sfrwswaz/kernel/cmdline 11304541/tftp-deploy-sfrwswaz/ramdisk/ramdisk.cpio.gz
222 01:58:51.389665 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 01:58:51.389731 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 01:58:51.389805 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 01:58:51.389869 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 01:58:51.389920 Not connected, no need to disconnect.
227 01:58:51.389976 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 01:58:51.390125 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 01:58:51.390179 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
230 01:58:51.393054 Setting prompt string to ['lava-test: # ']
231 01:58:51.393380 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 01:58:51.393486 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 01:58:51.393588 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 01:58:51.393692 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 01:58:51.393878 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
236 01:58:56.540226 >> Command sent successfully.
237 01:58:56.546224 Returned 0 in 5 seconds
238 01:58:56.646896 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 01:58:56.648110 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 01:58:56.648502 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 01:58:56.648821 Setting prompt string to 'Starting depthcharge on Volmar...'
243 01:58:56.649082 Changing prompt to 'Starting depthcharge on Volmar...'
244 01:58:56.649421 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 01:58:56.650327 [Enter `^Ec?' for help]
246 01:58:58.016718
247 01:58:58.017195
248 01:58:58.023906 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 01:58:58.027736 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 01:58:58.034966 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 01:58:58.038586 CPU: AES supported, TXT NOT supported, VT supported
252 01:58:58.046288 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 01:58:58.050113 Cache size = 10 MiB
254 01:58:58.054183 MCH: device id 4609 (rev 04) is Alderlake-P
255 01:58:58.057624 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 01:58:58.060804 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 01:58:58.064946 VBOOT: Loading verstage.
258 01:58:58.068373 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 01:58:58.075645 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 01:58:58.079298 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 01:58:58.088961 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 01:58:58.095746 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 01:58:58.096248
264 01:58:58.096626
265 01:58:58.105852 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 01:58:58.113037 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 01:58:58.116514 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 01:58:58.117037 done! DID_VID 0x00281ae0
269 01:58:58.120253 TPM ready after 0 ms
270 01:58:58.123644 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
271 01:58:58.136838 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
272 01:58:58.143488 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
273 01:58:58.260985 tlcl_send_startup: Startup return code is 0
274 01:58:58.261526 TPM: setup succeeded
275 01:58:58.282884 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
276 01:58:58.304143 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 01:58:58.308027 Chrome EC: UHEPI supported
278 01:58:58.311321 Reading cr50 boot mode
279 01:58:58.326635 Cr50 says boot_mode is VERIFIED_RW(0x00).
280 01:58:58.327136 Phase 1
281 01:58:58.333176 FMAP: area GBB found @ 1805000 (458752 bytes)
282 01:58:58.340660 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
283 01:58:58.347741 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
284 01:58:58.355170 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 01:58:58.355626 Phase 2
286 01:58:58.355910 Phase 3
287 01:58:58.358471 FMAP: area GBB found @ 1805000 (458752 bytes)
288 01:58:58.365843 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
289 01:58:58.369127 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
290 01:58:58.376051 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 01:58:58.382840 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
292 01:58:58.389276 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
293 01:58:58.399491 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
294 01:58:58.411779 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
295 01:58:58.414580 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 01:58:58.421578 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 01:58:58.428169 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
298 01:58:58.434628 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
299 01:58:58.441473 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
300 01:58:58.445572 Phase 4
301 01:58:58.448985 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
302 01:58:58.455459 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
303 01:58:58.667466 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
304 01:58:58.674109 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
305 01:58:58.677660 Saving vboot hash.
306 01:58:58.684508 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
307 01:58:58.703070 tlcl_extend: response is 0
308 01:58:58.710004 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
309 01:58:58.716361 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
310 01:58:58.731098 tlcl_extend: response is 0
311 01:58:58.737615 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
312 01:58:58.757537 tlcl_lock_nv_write: response is 0
313 01:58:58.776641 tlcl_lock_nv_write: response is 0
314 01:58:58.777145 Slot A is selected
315 01:58:58.783766 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
316 01:58:58.789776 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
317 01:58:58.796495 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
318 01:58:58.803097 BS: verstage times (exec / console): total (unknown) / 256 ms
319 01:58:58.803711
320 01:58:58.804007
321 01:58:58.809649 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
322 01:58:58.813874 Google Chrome EC: version:
323 01:58:58.817375 ro: volmar_v2.0.14126-e605144e9c
324 01:58:58.821082 rw: volmar_v0.0.55-22d1557
325 01:58:58.824038 running image: 2
326 01:58:58.827292 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
327 01:58:58.837564 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 01:58:58.843986 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 01:58:58.850694 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
330 01:58:58.860645 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
331 01:58:58.870457 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
332 01:58:58.873791 EC took 941us to calculate image hash
333 01:58:58.883407 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 01:58:58.889906 VB2:sync_ec() select_rw=RW(active)
335 01:58:58.900559 Waited 270us to clear limit power flag.
336 01:58:58.903233 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
337 01:58:58.906404 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
338 01:58:58.909752 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
339 01:58:58.916023 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
340 01:58:58.919790 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
341 01:58:58.923091 TCO_STS: 0000 0000
342 01:58:58.926573 GEN_PMCON: d0015038 00002200
343 01:58:58.929702 GBLRST_CAUSE: 00000000 00000000
344 01:58:58.930198 HPR_CAUSE0: 00000000
345 01:58:58.932775 prev_sleep_state 5
346 01:58:58.935971 Abort disabling TXT, as CPU is not TXT capable.
347 01:58:58.944225 cse_lite: Number of partitions = 3
348 01:58:58.947626 cse_lite: Current partition = RO
349 01:58:58.948128 cse_lite: Next partition = RO
350 01:58:58.951003 cse_lite: Flags = 0x7
351 01:58:58.957636 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
352 01:58:58.967407 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
353 01:58:58.970531 FMAP: area SI_ME found @ 1000 (5238784 bytes)
354 01:58:58.977353 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
355 01:58:58.984327 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
356 01:58:58.990752 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
357 01:58:58.994439 cse_lite: CSE CBFS RW version : 16.1.25.2049
358 01:58:59.000463 cse_lite: Set Boot Partition Info Command (RW)
359 01:58:59.003579 HECI: Global Reset(Type:1) Command
360 01:59:00.456225 ��d 5182 (rev 01) is Raptorlake-P SKU
361 01:59:00.459959 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
362 01:59:00.463931 VBOOT: Loading verstage.
363 01:59:00.467157 FMAP: Found "FLASH" version 1.1 at 0x1804000.
364 01:59:00.470416 FMAP: base = 0x0 size = 0x2000000 #areas = 37
365 01:59:00.477729 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
366 01:59:00.484576 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
367 01:59:00.491403 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
368 01:59:00.496027
369 01:59:00.496528
370 01:59:00.502406 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
371 01:59:00.509582 Probing TPM I2C: I2C bus 1 version 0x3230302a
372 01:59:00.513512 DW I2C bus 1 at 0xfe022000 (400 KHz)
373 01:59:00.516901 done! DID_VID 0x00281ae0
374 01:59:00.517463 TPM ready after 0 ms
375 01:59:00.521577 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
376 01:59:00.534770 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
377 01:59:00.538447 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
378 01:59:00.650008 tlcl_send_startup: Startup return code is 0
379 01:59:00.650502 TPM: setup succeeded
380 01:59:00.669855 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
381 01:59:00.691781 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
382 01:59:00.695660 Chrome EC: UHEPI supported
383 01:59:00.698789 Reading cr50 boot mode
384 01:59:00.713727 Cr50 says boot_mode is VERIFIED_RW(0x00).
385 01:59:00.714229 Phase 1
386 01:59:00.720601 FMAP: area GBB found @ 1805000 (458752 bytes)
387 01:59:00.727208 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
388 01:59:00.733626 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
389 01:59:00.740398 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
390 01:59:00.743806 Phase 2
391 01:59:00.744308 Phase 3
392 01:59:00.746908 FMAP: area GBB found @ 1805000 (458752 bytes)
393 01:59:00.754010 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
394 01:59:00.756981 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
395 01:59:00.763694 VB2:vb2_verify_keyblock() Checking keyblock signature...
396 01:59:00.770005 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
397 01:59:00.776817 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
398 01:59:00.786666 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
399 01:59:00.798756 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
400 01:59:00.802050 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
401 01:59:00.808833 VB2:vb2_verify_fw_preamble() Verifying preamble.
402 01:59:00.815674 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
403 01:59:00.821825 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
404 01:59:00.828829 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
405 01:59:00.832845 Phase 4
406 01:59:00.836191 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
407 01:59:00.842349 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
408 01:59:01.055019 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
409 01:59:01.061388 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
410 01:59:01.064892 Saving vboot hash.
411 01:59:01.071465 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
412 01:59:01.087782 tlcl_extend: response is 0
413 01:59:01.094353 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
414 01:59:01.097826 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
415 01:59:01.115278 tlcl_extend: response is 0
416 01:59:01.121770 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
417 01:59:01.141747 tlcl_lock_nv_write: response is 0
418 01:59:01.160707 tlcl_lock_nv_write: response is 0
419 01:59:01.161256 Slot A is selected
420 01:59:01.167468 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
421 01:59:01.175589 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
422 01:59:01.179107 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
423 01:59:01.185915 BS: verstage times (exec / console): total (unknown) / 256 ms
424 01:59:01.186419
425 01:59:01.186712
426 01:59:01.195836 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
427 01:59:01.199461 Google Chrome EC: version:
428 01:59:01.202539 ro: volmar_v2.0.14126-e605144e9c
429 01:59:01.205977 rw: volmar_v0.0.55-22d1557
430 01:59:01.206479 running image: 2
431 01:59:01.212448 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
432 01:59:01.219110 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
433 01:59:01.225762 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
434 01:59:01.232151 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
435 01:59:01.242170 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
436 01:59:01.255676 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
437 01:59:01.258825 EC took 967us to calculate image hash
438 01:59:01.268569 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
439 01:59:01.272116 VB2:sync_ec() select_rw=RW(active)
440 01:59:01.283600 Waited 270us to clear limit power flag.
441 01:59:01.286825 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
442 01:59:01.290421 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
443 01:59:01.297281 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
444 01:59:01.300495 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
445 01:59:01.303885 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
446 01:59:01.307474 TCO_STS: 0000 0000
447 01:59:01.310461 GEN_PMCON: d1001038 00002200
448 01:59:01.313956 GBLRST_CAUSE: 00000040 00000000
449 01:59:01.314462 HPR_CAUSE0: 00000000
450 01:59:01.317075 prev_sleep_state 5
451 01:59:01.323698 Abort disabling TXT, as CPU is not TXT capable.
452 01:59:01.327061 cse_lite: Number of partitions = 3
453 01:59:01.330286 cse_lite: Current partition = RW
454 01:59:01.333772 cse_lite: Next partition = RW
455 01:59:01.336985 cse_lite: Flags = 0x7
456 01:59:01.343411 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
457 01:59:01.350029 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
458 01:59:01.356935 FMAP: area SI_ME found @ 1000 (5238784 bytes)
459 01:59:01.363702 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
460 01:59:01.367112 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
461 01:59:01.376579 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
462 01:59:01.380227 cse_lite: CSE CBFS RW version : 16.1.25.2049
463 01:59:01.383439 Boot Count incremented to 2187
464 01:59:01.390344 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
465 01:59:01.396752 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
466 01:59:01.408551 Probing TPM I2C: done! DID_VID 0x00281ae0
467 01:59:01.411791 Locality already claimed
468 01:59:01.414798 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
469 01:59:01.437679 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
470 01:59:01.440721 MRC: Hash idx 0x100d comparison successful.
471 01:59:01.443736 MRC cache found, size f6c8
472 01:59:01.444172 bootmode is set to: 2
473 01:59:01.448398 EC returned error result code 3
474 01:59:01.451146 FW_CONFIG value from CBI is 0x131
475 01:59:01.457876 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
476 01:59:01.461439 SPD index = 0
477 01:59:01.468201 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
478 01:59:01.468701 SPD: module type is LPDDR4X
479 01:59:01.476120 SPD: module part number is K4U6E3S4AB-MGCL
480 01:59:01.482505 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
481 01:59:01.485880 SPD: device width 16 bits, bus width 16 bits
482 01:59:01.489346 SPD: module size is 1024 MB (per channel)
483 01:59:01.558413 CBMEM:
484 01:59:01.561696 IMD: root @ 0x76fff000 254 entries.
485 01:59:01.565351 IMD: root @ 0x76ffec00 62 entries.
486 01:59:01.573034 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
487 01:59:01.575936 RO_VPD is uninitialized or empty.
488 01:59:01.579423 FMAP: area RW_VPD found @ f29000 (8192 bytes)
489 01:59:01.582729 RW_VPD is uninitialized or empty.
490 01:59:01.589381 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
491 01:59:01.592718 External stage cache:
492 01:59:01.596113 IMD: root @ 0x7bbff000 254 entries.
493 01:59:01.599244 IMD: root @ 0x7bbfec00 62 entries.
494 01:59:01.606202 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
495 01:59:01.612911 MRC: Checking cached data update for 'RW_MRC_CACHE'.
496 01:59:01.616614 MRC: 'RW_MRC_CACHE' does not need update.
497 01:59:01.617116 8 DIMMs found
498 01:59:01.619654 SMM Memory Map
499 01:59:01.623216 SMRAM : 0x7b800000 0x800000
500 01:59:01.626515 Subregion 0: 0x7b800000 0x200000
501 01:59:01.629501 Subregion 1: 0x7ba00000 0x200000
502 01:59:01.632765 Subregion 2: 0x7bc00000 0x400000
503 01:59:01.636362 top_of_ram = 0x77000000
504 01:59:01.639396 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
505 01:59:01.645909 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
506 01:59:01.652985 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
507 01:59:01.656336 MTRR Range: Start=ff000000 End=0 (Size 1000000)
508 01:59:01.656839 Normal boot
509 01:59:01.666101 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
510 01:59:01.672786 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
511 01:59:01.679295 Processing 237 relocs. Offset value of 0x74ab9000
512 01:59:01.687486 BS: romstage times (exec / console): total (unknown) / 381 ms
513 01:59:01.694864
514 01:59:01.695372
515 01:59:01.701536 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
516 01:59:01.702028 Normal boot
517 01:59:01.708105 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
518 01:59:01.714816 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
519 01:59:01.721352 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
520 01:59:01.731290 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
521 01:59:01.779915 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
522 01:59:01.786292 Processing 5931 relocs. Offset value of 0x72a2f000
523 01:59:01.789758 BS: postcar times (exec / console): total (unknown) / 51 ms
524 01:59:01.792873
525 01:59:01.793413
526 01:59:01.799412 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
527 01:59:01.802590 Reserving BERT start 76a1e000, size 10000
528 01:59:01.806393 Normal boot
529 01:59:01.809532 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
530 01:59:01.816166 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
531 01:59:01.826406 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
532 01:59:01.829700 FMAP: area RW_VPD found @ f29000 (8192 bytes)
533 01:59:01.832771 Google Chrome EC: version:
534 01:59:01.836036 ro: volmar_v2.0.14126-e605144e9c
535 01:59:01.839669 rw: volmar_v0.0.55-22d1557
536 01:59:01.842559 running image: 2
537 01:59:01.845942 ACPI _SWS is PM1 Index 8 GPE Index -1
538 01:59:01.849112 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
539 01:59:01.855374 EC returned error result code 3
540 01:59:01.858225 FW_CONFIG value from CBI is 0x131
541 01:59:01.864880 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
542 01:59:01.867983 PCI: 00:1c.2 disabled by fw_config
543 01:59:01.874561 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
544 01:59:01.878064 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
545 01:59:01.884931 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
546 01:59:01.888188 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
547 01:59:01.895064 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
548 01:59:01.901597 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
549 01:59:01.908014 microcode: sig=0x906a4 pf=0x80 revision=0x423
550 01:59:01.911268 microcode: Update skipped, already up-to-date
551 01:59:01.917913 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
552 01:59:01.951060 Detected 6 core, 8 thread CPU.
553 01:59:01.954565 Setting up SMI for CPU
554 01:59:01.957390 IED base = 0x7bc00000
555 01:59:01.960678 IED size = 0x00400000
556 01:59:01.961175 Will perform SMM setup.
557 01:59:01.967494 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
558 01:59:01.967992 LAPIC 0x0 in XAPIC mode.
559 01:59:01.977376 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
560 01:59:01.980657 Processing 18 relocs. Offset value of 0x00030000
561 01:59:01.985799 Attempting to start 7 APs
562 01:59:01.988859 Waiting for 10ms after sending INIT.
563 01:59:02.001906 Waiting for SIPI to complete...
564 01:59:02.005090 LAPIC 0x1 in XAPIC mode.
565 01:59:02.008284 LAPIC 0x16 in XAPIC mode.
566 01:59:02.012008 LAPIC 0x10 in XAPIC mode.
567 01:59:02.015390 LAPIC 0x12 in XAPIC mode.
568 01:59:02.015896 LAPIC 0x8 in XAPIC mode.
569 01:59:02.021501 AP: slot 3 apic_id 10, MCU rev: 0x00000423
570 01:59:02.021867 done.
571 01:59:02.025050 AP: slot 2 apic_id 16, MCU rev: 0x00000423
572 01:59:02.028571 AP: slot 4 apic_id 12, MCU rev: 0x00000423
573 01:59:02.031862 LAPIC 0x14 in XAPIC mode.
574 01:59:02.034999 Waiting for SIPI to complete...
575 01:59:02.035466 done.
576 01:59:02.041801 AP: slot 1 apic_id 14, MCU rev: 0x00000423
577 01:59:02.044962 AP: slot 5 apic_id 1, MCU rev: 0x00000423
578 01:59:02.048166 AP: slot 6 apic_id 8, MCU rev: 0x00000423
579 01:59:02.051574 LAPIC 0x9 in XAPIC mode.
580 01:59:02.055066 AP: slot 7 apic_id 9, MCU rev: 0x00000423
581 01:59:02.058046 smm_setup_relocation_handler: enter
582 01:59:02.061754 smm_setup_relocation_handler: exit
583 01:59:02.071810 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
584 01:59:02.074450 Processing 11 relocs. Offset value of 0x00038000
585 01:59:02.081656 smm_module_setup_stub: stack_top = 0x7b804000
586 01:59:02.084881 smm_module_setup_stub: per cpu stack_size = 0x800
587 01:59:02.091472 smm_module_setup_stub: runtime.start32_offset = 0x4c
588 01:59:02.094839 smm_module_setup_stub: runtime.smm_size = 0x10000
589 01:59:02.101287 SMM Module: stub loaded at 38000. Will call 0x76a52094
590 01:59:02.104800 Installing permanent SMM handler to 0x7b800000
591 01:59:02.111348 smm_load_module: total_smm_space_needed e468, available -> 200000
592 01:59:02.121353 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
593 01:59:02.125079 Processing 255 relocs. Offset value of 0x7b9f6000
594 01:59:02.131293 smm_load_module: smram_start: 0x7b800000
595 01:59:02.134675 smm_load_module: smram_end: 7ba00000
596 01:59:02.137929 smm_load_module: handler start 0x7b9f6d5f
597 01:59:02.140816 smm_load_module: handler_size 98d0
598 01:59:02.144753 smm_load_module: fxsave_area 0x7b9ff000
599 01:59:02.147731 smm_load_module: fxsave_size 1000
600 01:59:02.151207 smm_load_module: CONFIG_MSEG_SIZE 0x0
601 01:59:02.157546 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
602 01:59:02.164458 smm_load_module: handler_mod_params.smbase = 0x7b800000
603 01:59:02.167656 smm_load_module: per_cpu_save_state_size = 0x400
604 01:59:02.171153 smm_load_module: num_cpus = 0x8
605 01:59:02.177295 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
606 01:59:02.181004 smm_load_module: total_save_state_size = 0x2000
607 01:59:02.187782 smm_load_module: cpu0 entry: 7b9e6000
608 01:59:02.191020 smm_create_map: cpus allowed in one segment 30
609 01:59:02.194403 smm_create_map: min # of segments needed 1
610 01:59:02.197550 CPU 0x0
611 01:59:02.200801 smbase 7b9e6000 entry 7b9ee000
612 01:59:02.204287 ss_start 7b9f5c00 code_end 7b9ee208
613 01:59:02.204785 CPU 0x1
614 01:59:02.207404 smbase 7b9e5c00 entry 7b9edc00
615 01:59:02.214218 ss_start 7b9f5800 code_end 7b9ede08
616 01:59:02.214710 CPU 0x2
617 01:59:02.217192 smbase 7b9e5800 entry 7b9ed800
618 01:59:02.224116 ss_start 7b9f5400 code_end 7b9eda08
619 01:59:02.224629 CPU 0x3
620 01:59:02.227447 smbase 7b9e5400 entry 7b9ed400
621 01:59:02.230456 ss_start 7b9f5000 code_end 7b9ed608
622 01:59:02.233861 CPU 0x4
623 01:59:02.237157 smbase 7b9e5000 entry 7b9ed000
624 01:59:02.240342 ss_start 7b9f4c00 code_end 7b9ed208
625 01:59:02.240728 CPU 0x5
626 01:59:02.247625 smbase 7b9e4c00 entry 7b9ecc00
627 01:59:02.251282 ss_start 7b9f4800 code_end 7b9ece08
628 01:59:02.251775 CPU 0x6
629 01:59:02.253918 smbase 7b9e4800 entry 7b9ec800
630 01:59:02.260207 ss_start 7b9f4400 code_end 7b9eca08
631 01:59:02.260655 CPU 0x7
632 01:59:02.263747 smbase 7b9e4400 entry 7b9ec400
633 01:59:02.270890 ss_start 7b9f4000 code_end 7b9ec608
634 01:59:02.276831 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
635 01:59:02.283771 Processing 11 relocs. Offset value of 0x7b9ee000
636 01:59:02.287295 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
637 01:59:02.293851 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
638 01:59:02.300185 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
639 01:59:02.307186 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
640 01:59:02.313777 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
641 01:59:02.320716 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
642 01:59:02.327101 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
643 01:59:02.330368 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
644 01:59:02.336797 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
645 01:59:02.343548 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
646 01:59:02.350017 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
647 01:59:02.356660 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
648 01:59:02.363226 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
649 01:59:02.370050 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
650 01:59:02.376301 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
651 01:59:02.380068 smm_module_setup_stub: stack_top = 0x7b804000
652 01:59:02.386782 smm_module_setup_stub: per cpu stack_size = 0x800
653 01:59:02.389935 smm_module_setup_stub: runtime.start32_offset = 0x4c
654 01:59:02.396978 smm_module_setup_stub: runtime.smm_size = 0x200000
655 01:59:02.403231 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
656 01:59:02.406668 Clearing SMI status registers
657 01:59:02.410110 SMI_STS: PM1
658 01:59:02.410605 PM1_STS: WAK PWRBTN
659 01:59:02.416124 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
660 01:59:02.419866 In relocation handler: CPU 0
661 01:59:02.426765 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
662 01:59:02.429966 Writing SMRR. base = 0x7b800006, mask=0xff800c00
663 01:59:02.433313 Relocation complete.
664 01:59:02.439680 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
665 01:59:02.442871 In relocation handler: CPU 5
666 01:59:02.446192 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
667 01:59:02.449362 Relocation complete.
668 01:59:02.456231 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
669 01:59:02.459587 In relocation handler: CPU 3
670 01:59:02.462656 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
671 01:59:02.466405 Writing SMRR. base = 0x7b800006, mask=0xff800c00
672 01:59:02.469449 Relocation complete.
673 01:59:02.475983 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
674 01:59:02.479919 In relocation handler: CPU 2
675 01:59:02.483060 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
676 01:59:02.489628 Writing SMRR. base = 0x7b800006, mask=0xff800c00
677 01:59:02.490127 Relocation complete.
678 01:59:02.499584 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
679 01:59:02.500049 In relocation handler: CPU 4
680 01:59:02.506284 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
681 01:59:02.509093 Writing SMRR. base = 0x7b800006, mask=0xff800c00
682 01:59:02.512574 Relocation complete.
683 01:59:02.519477 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
684 01:59:02.522778 In relocation handler: CPU 1
685 01:59:02.525794 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
686 01:59:02.529876 Writing SMRR. base = 0x7b800006, mask=0xff800c00
687 01:59:02.532781 Relocation complete.
688 01:59:02.539462 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
689 01:59:02.542835 In relocation handler: CPU 6
690 01:59:02.546374 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
691 01:59:02.552643 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 01:59:02.555817 Relocation complete.
693 01:59:02.562672 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
694 01:59:02.566235 In relocation handler: CPU 7
695 01:59:02.569177 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
696 01:59:02.569717 Relocation complete.
697 01:59:02.572209 Initializing CPU #0
698 01:59:02.575367 CPU: vendor Intel device 906a4
699 01:59:02.579328 CPU: family 06, model 9a, stepping 04
700 01:59:02.582880 Clearing out pending MCEs
701 01:59:02.585661 cpu: energy policy set to 7
702 01:59:02.589308 Turbo is available but hidden
703 01:59:02.592326 Turbo is available and visible
704 01:59:02.595850 microcode: Update skipped, already up-to-date
705 01:59:02.599160 CPU #0 initialized
706 01:59:02.599654 Initializing CPU #5
707 01:59:02.602507 Initializing CPU #4
708 01:59:02.605669 Initializing CPU #3
709 01:59:02.606059 CPU: vendor Intel device 906a4
710 01:59:02.612555 CPU: family 06, model 9a, stepping 04
711 01:59:02.613016 Initializing CPU #2
712 01:59:02.615863 CPU: vendor Intel device 906a4
713 01:59:02.619010 CPU: family 06, model 9a, stepping 04
714 01:59:02.622231 CPU: vendor Intel device 906a4
715 01:59:02.626013 CPU: family 06, model 9a, stepping 04
716 01:59:02.629146 Initializing CPU #7
717 01:59:02.631995 Clearing out pending MCEs
718 01:59:02.635706 Clearing out pending MCEs
719 01:59:02.638945 CPU: vendor Intel device 906a4
720 01:59:02.642288 CPU: family 06, model 9a, stepping 04
721 01:59:02.645490 cpu: energy policy set to 7
722 01:59:02.645881 CPU: vendor Intel device 906a4
723 01:59:02.652377 CPU: family 06, model 9a, stepping 04
724 01:59:02.652841 Initializing CPU #6
725 01:59:02.655491 Clearing out pending MCEs
726 01:59:02.658548 Initializing CPU #1
727 01:59:02.662011 cpu: energy policy set to 7
728 01:59:02.662493 cpu: energy policy set to 7
729 01:59:02.668659 microcode: Update skipped, already up-to-date
730 01:59:02.669119 CPU #3 initialized
731 01:59:02.671744 Clearing out pending MCEs
732 01:59:02.678771 microcode: Update skipped, already up-to-date
733 01:59:02.679231 CPU #2 initialized
734 01:59:02.682016 CPU: vendor Intel device 906a4
735 01:59:02.685139 CPU: family 06, model 9a, stepping 04
736 01:59:02.692283 microcode: Update skipped, already up-to-date
737 01:59:02.692779 CPU #4 initialized
738 01:59:02.695795 Clearing out pending MCEs
739 01:59:02.698610 Clearing out pending MCEs
740 01:59:02.701671 cpu: energy policy set to 7
741 01:59:02.702063 cpu: energy policy set to 7
742 01:59:02.708494 microcode: Update skipped, already up-to-date
743 01:59:02.708967 CPU #1 initialized
744 01:59:02.711619 cpu: energy policy set to 7
745 01:59:02.715171 CPU: vendor Intel device 906a4
746 01:59:02.718487 CPU: family 06, model 9a, stepping 04
747 01:59:02.724756 microcode: Update skipped, already up-to-date
748 01:59:02.725242 CPU #7 initialized
749 01:59:02.728537 Clearing out pending MCEs
750 01:59:02.735023 microcode: Update skipped, already up-to-date
751 01:59:02.735513 CPU #5 initialized
752 01:59:02.738662 cpu: energy policy set to 7
753 01:59:02.741598 microcode: Update skipped, already up-to-date
754 01:59:02.745177 CPU #6 initialized
755 01:59:02.748505 bsp_do_flight_plan done after 708 msecs.
756 01:59:02.751648 CPU: frequency set to 4400 MHz
757 01:59:02.754734 Enabling SMIs.
758 01:59:02.761521 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 382 / 521 ms
759 01:59:02.776696 Probing TPM I2C: done! DID_VID 0x00281ae0
760 01:59:02.779619 Locality already claimed
761 01:59:02.783006 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
762 01:59:02.794452 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
763 01:59:02.798011 Enabling GPIO PM b/c CR50 has long IRQ pulse support
764 01:59:02.804188 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
765 01:59:02.811054 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
766 01:59:02.814169 Found a VBT of 9216 bytes after decompression
767 01:59:02.817441 PCI 1.0, PIN A, using IRQ #16
768 01:59:02.820663 PCI 2.0, PIN A, using IRQ #17
769 01:59:02.824133 PCI 4.0, PIN A, using IRQ #18
770 01:59:02.827639 PCI 5.0, PIN A, using IRQ #16
771 01:59:02.830877 PCI 6.0, PIN A, using IRQ #16
772 01:59:02.834079 PCI 6.2, PIN C, using IRQ #18
773 01:59:02.837350 PCI 7.0, PIN A, using IRQ #19
774 01:59:02.840347 PCI 7.1, PIN B, using IRQ #20
775 01:59:02.844222 PCI 7.2, PIN C, using IRQ #21
776 01:59:02.847440 PCI 7.3, PIN D, using IRQ #22
777 01:59:02.850772 PCI 8.0, PIN A, using IRQ #23
778 01:59:02.853871 PCI D.0, PIN A, using IRQ #17
779 01:59:02.857432 PCI D.1, PIN B, using IRQ #19
780 01:59:02.857928 PCI 10.0, PIN A, using IRQ #24
781 01:59:02.860696 PCI 10.1, PIN B, using IRQ #25
782 01:59:02.863965 PCI 10.6, PIN C, using IRQ #20
783 01:59:02.867428 PCI 10.7, PIN D, using IRQ #21
784 01:59:02.870894 PCI 11.0, PIN A, using IRQ #26
785 01:59:02.873786 PCI 11.1, PIN B, using IRQ #27
786 01:59:02.877529 PCI 11.2, PIN C, using IRQ #28
787 01:59:02.880673 PCI 11.3, PIN D, using IRQ #29
788 01:59:02.883927 PCI 12.0, PIN A, using IRQ #30
789 01:59:02.887121 PCI 12.6, PIN B, using IRQ #31
790 01:59:02.890492 PCI 12.7, PIN C, using IRQ #22
791 01:59:02.893626 PCI 13.0, PIN A, using IRQ #32
792 01:59:02.896757 PCI 13.1, PIN B, using IRQ #33
793 01:59:02.900029 PCI 13.2, PIN C, using IRQ #34
794 01:59:02.903787 PCI 13.3, PIN D, using IRQ #35
795 01:59:02.907353 PCI 14.0, PIN B, using IRQ #23
796 01:59:02.910411 PCI 14.1, PIN A, using IRQ #36
797 01:59:02.910874 PCI 14.3, PIN C, using IRQ #17
798 01:59:02.913609 PCI 15.0, PIN A, using IRQ #37
799 01:59:02.916738 PCI 15.1, PIN B, using IRQ #38
800 01:59:02.920769 PCI 15.2, PIN C, using IRQ #39
801 01:59:02.923663 PCI 15.3, PIN D, using IRQ #40
802 01:59:02.926990 PCI 16.0, PIN A, using IRQ #18
803 01:59:02.930184 PCI 16.1, PIN B, using IRQ #19
804 01:59:02.933576 PCI 16.2, PIN C, using IRQ #20
805 01:59:02.937377 PCI 16.3, PIN D, using IRQ #21
806 01:59:02.939995 PCI 16.4, PIN A, using IRQ #18
807 01:59:02.943534 PCI 16.5, PIN B, using IRQ #19
808 01:59:02.946606 PCI 17.0, PIN A, using IRQ #22
809 01:59:02.950076 PCI 19.0, PIN A, using IRQ #41
810 01:59:02.953234 PCI 19.1, PIN B, using IRQ #42
811 01:59:02.956855 PCI 19.2, PIN C, using IRQ #43
812 01:59:02.960013 PCI 1C.0, PIN A, using IRQ #16
813 01:59:02.963513 PCI 1C.1, PIN B, using IRQ #17
814 01:59:02.964012 PCI 1C.2, PIN C, using IRQ #18
815 01:59:02.966909 PCI 1C.3, PIN D, using IRQ #19
816 01:59:02.970170 PCI 1C.4, PIN A, using IRQ #16
817 01:59:02.973080 PCI 1C.5, PIN B, using IRQ #17
818 01:59:02.976384 PCI 1C.6, PIN C, using IRQ #18
819 01:59:02.980060 PCI 1C.7, PIN D, using IRQ #19
820 01:59:02.983612 PCI 1D.0, PIN A, using IRQ #16
821 01:59:02.986715 PCI 1D.1, PIN B, using IRQ #17
822 01:59:02.989834 PCI 1D.2, PIN C, using IRQ #18
823 01:59:02.993539 PCI 1D.3, PIN D, using IRQ #19
824 01:59:02.996800 PCI 1E.0, PIN A, using IRQ #23
825 01:59:03.000072 PCI 1E.1, PIN B, using IRQ #20
826 01:59:03.003483 PCI 1E.2, PIN C, using IRQ #44
827 01:59:03.006584 PCI 1E.3, PIN D, using IRQ #45
828 01:59:03.009886 PCI 1F.3, PIN B, using IRQ #22
829 01:59:03.012977 PCI 1F.4, PIN C, using IRQ #23
830 01:59:03.016330 PCI 1F.6, PIN D, using IRQ #20
831 01:59:03.016687 PCI 1F.7, PIN A, using IRQ #21
832 01:59:03.023348 IRQ: Using dynamically assigned PCI IO-APIC IRQs
833 01:59:03.029835 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
834 01:59:03.207488 FSPS returned 0
835 01:59:03.211153 Executing Phase 1 of FspMultiPhaseSiInit
836 01:59:03.220882 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
837 01:59:03.224075 port C0 DISC req: usage 1 usb3 1 usb2 1
838 01:59:03.227446 Raw Buffer output 0 00000111
839 01:59:03.230868 Raw Buffer output 1 00000000
840 01:59:03.234384 pmc_send_ipc_cmd succeeded
841 01:59:03.240816 port C1 DISC req: usage 1 usb3 3 usb2 3
842 01:59:03.241204 Raw Buffer output 0 00000331
843 01:59:03.244159 Raw Buffer output 1 00000000
844 01:59:03.248628 pmc_send_ipc_cmd succeeded
845 01:59:03.252356 Detected 6 core, 8 thread CPU.
846 01:59:03.255567 Detected 6 core, 8 thread CPU.
847 01:59:03.260971 Detected 6 core, 8 thread CPU.
848 01:59:03.264306 Detected 6 core, 8 thread CPU.
849 01:59:03.267949 Detected 6 core, 8 thread CPU.
850 01:59:03.270772 Detected 6 core, 8 thread CPU.
851 01:59:03.274330 Detected 6 core, 8 thread CPU.
852 01:59:03.277150 Detected 6 core, 8 thread CPU.
853 01:59:03.280813 Detected 6 core, 8 thread CPU.
854 01:59:03.284285 Detected 6 core, 8 thread CPU.
855 01:59:03.287156 Detected 6 core, 8 thread CPU.
856 01:59:03.290561 Detected 6 core, 8 thread CPU.
857 01:59:03.294030 Detected 6 core, 8 thread CPU.
858 01:59:03.297145 Detected 6 core, 8 thread CPU.
859 01:59:03.300904 Detected 6 core, 8 thread CPU.
860 01:59:03.304159 Detected 6 core, 8 thread CPU.
861 01:59:03.307412 Detected 6 core, 8 thread CPU.
862 01:59:03.310857 Detected 6 core, 8 thread CPU.
863 01:59:03.314052 Detected 6 core, 8 thread CPU.
864 01:59:03.317452 Detected 6 core, 8 thread CPU.
865 01:59:03.320688 Detected 6 core, 8 thread CPU.
866 01:59:03.323784 Detected 6 core, 8 thread CPU.
867 01:59:03.603135 Detected 6 core, 8 thread CPU.
868 01:59:03.606815 Detected 6 core, 8 thread CPU.
869 01:59:03.609833 Detected 6 core, 8 thread CPU.
870 01:59:03.613260 Detected 6 core, 8 thread CPU.
871 01:59:03.616718 Detected 6 core, 8 thread CPU.
872 01:59:03.619582 Detected 6 core, 8 thread CPU.
873 01:59:03.623344 Detected 6 core, 8 thread CPU.
874 01:59:03.626858 Detected 6 core, 8 thread CPU.
875 01:59:03.629997 Detected 6 core, 8 thread CPU.
876 01:59:03.633329 Detected 6 core, 8 thread CPU.
877 01:59:03.636457 Detected 6 core, 8 thread CPU.
878 01:59:03.639739 Detected 6 core, 8 thread CPU.
879 01:59:03.642915 Detected 6 core, 8 thread CPU.
880 01:59:03.646383 Detected 6 core, 8 thread CPU.
881 01:59:03.649782 Detected 6 core, 8 thread CPU.
882 01:59:03.653252 Detected 6 core, 8 thread CPU.
883 01:59:03.656572 Detected 6 core, 8 thread CPU.
884 01:59:03.659799 Detected 6 core, 8 thread CPU.
885 01:59:03.663126 Detected 6 core, 8 thread CPU.
886 01:59:03.666352 Detected 6 core, 8 thread CPU.
887 01:59:03.669766 Display FSP Version Info HOB
888 01:59:03.673087 Reference Code - CPU = c.0.65.70
889 01:59:03.673628 uCode Version = 0.0.4.23
890 01:59:03.676434 TXT ACM version = ff.ff.ff.ffff
891 01:59:03.679515 Reference Code - ME = c.0.65.70
892 01:59:03.683084 MEBx version = 0.0.0.0
893 01:59:03.686543 ME Firmware Version = Lite SKU
894 01:59:03.689740 Reference Code - PCH = c.0.65.70
895 01:59:03.693246 PCH-CRID Status = Disabled
896 01:59:03.696444 PCH-CRID Original Value = ff.ff.ff.ffff
897 01:59:03.699693 PCH-CRID New Value = ff.ff.ff.ffff
898 01:59:03.703024 OPROM - RST - RAID = ff.ff.ff.ffff
899 01:59:03.706227 PCH Hsio Version = 4.0.0.0
900 01:59:03.709783 Reference Code - SA - System Agent = c.0.65.70
901 01:59:03.712827 Reference Code - MRC = 0.0.3.80
902 01:59:03.716259 SA - PCIe Version = c.0.65.70
903 01:59:03.719928 SA-CRID Status = Disabled
904 01:59:03.723267 SA-CRID Original Value = 0.0.0.4
905 01:59:03.726179 SA-CRID New Value = 0.0.0.4
906 01:59:03.729857 OPROM - VBIOS = ff.ff.ff.ffff
907 01:59:03.733096 IO Manageability Engine FW Version = 24.0.4.0
908 01:59:03.736320 PHY Build Version = 0.0.0.2016
909 01:59:03.739672 Thunderbolt(TM) FW Version = 0.0.0.0
910 01:59:03.746310 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
911 01:59:03.752969 BS: BS_DEV_INIT_CHIPS run times (exec / console): 478 / 507 ms
912 01:59:03.755938 Enumerating buses...
913 01:59:03.759537 Show all devs... Before device enumeration.
914 01:59:03.763130 Root Device: enabled 1
915 01:59:03.763572 CPU_CLUSTER: 0: enabled 1
916 01:59:03.766088 DOMAIN: 0000: enabled 1
917 01:59:03.769375 GPIO: 0: enabled 1
918 01:59:03.769869 PCI: 00:00.0: enabled 1
919 01:59:03.772887 PCI: 00:01.0: enabled 0
920 01:59:03.776441 PCI: 00:01.1: enabled 0
921 01:59:03.779202 PCI: 00:02.0: enabled 1
922 01:59:03.779523 PCI: 00:04.0: enabled 1
923 01:59:03.783170 PCI: 00:05.0: enabled 0
924 01:59:03.785906 PCI: 00:06.0: enabled 1
925 01:59:03.789459 PCI: 00:06.2: enabled 0
926 01:59:03.789943 PCI: 00:07.0: enabled 0
927 01:59:03.792811 PCI: 00:07.1: enabled 0
928 01:59:03.796200 PCI: 00:07.2: enabled 0
929 01:59:03.799717 PCI: 00:07.3: enabled 0
930 01:59:03.800214 PCI: 00:08.0: enabled 0
931 01:59:03.802798 PCI: 00:09.0: enabled 0
932 01:59:03.806345 PCI: 00:0a.0: enabled 1
933 01:59:03.809406 PCI: 00:0d.0: enabled 1
934 01:59:03.809898 PCI: 00:0d.1: enabled 0
935 01:59:03.813082 PCI: 00:0d.2: enabled 0
936 01:59:03.816385 PCI: 00:0d.3: enabled 0
937 01:59:03.816875 PCI: 00:0e.0: enabled 0
938 01:59:03.819534 PCI: 00:10.0: enabled 0
939 01:59:03.822883 PCI: 00:10.1: enabled 0
940 01:59:03.826573 PCI: 00:10.6: enabled 0
941 01:59:03.827069 PCI: 00:10.7: enabled 0
942 01:59:03.829637 PCI: 00:12.0: enabled 0
943 01:59:03.832942 PCI: 00:12.6: enabled 0
944 01:59:03.836271 PCI: 00:12.7: enabled 0
945 01:59:03.836764 PCI: 00:13.0: enabled 0
946 01:59:03.839451 PCI: 00:14.0: enabled 1
947 01:59:03.842664 PCI: 00:14.1: enabled 0
948 01:59:03.846026 PCI: 00:14.2: enabled 1
949 01:59:03.846519 PCI: 00:14.3: enabled 1
950 01:59:03.849196 PCI: 00:15.0: enabled 1
951 01:59:03.852860 PCI: 00:15.1: enabled 1
952 01:59:03.853388 PCI: 00:15.2: enabled 0
953 01:59:03.856051 PCI: 00:15.3: enabled 1
954 01:59:03.859555 PCI: 00:16.0: enabled 1
955 01:59:03.863131 PCI: 00:16.1: enabled 0
956 01:59:03.863626 PCI: 00:16.2: enabled 0
957 01:59:03.865912 PCI: 00:16.3: enabled 0
958 01:59:03.869181 PCI: 00:16.4: enabled 0
959 01:59:03.872607 PCI: 00:16.5: enabled 0
960 01:59:03.873100 PCI: 00:17.0: enabled 1
961 01:59:03.875980 PCI: 00:19.0: enabled 0
962 01:59:03.878974 PCI: 00:19.1: enabled 1
963 01:59:03.882516 PCI: 00:19.2: enabled 0
964 01:59:03.883007 PCI: 00:1a.0: enabled 0
965 01:59:03.885826 PCI: 00:1c.0: enabled 0
966 01:59:03.888973 PCI: 00:1c.1: enabled 0
967 01:59:03.892490 PCI: 00:1c.2: enabled 0
968 01:59:03.892982 PCI: 00:1c.3: enabled 0
969 01:59:03.895850 PCI: 00:1c.4: enabled 0
970 01:59:03.899140 PCI: 00:1c.5: enabled 0
971 01:59:03.899634 PCI: 00:1c.6: enabled 0
972 01:59:03.902401 PCI: 00:1c.7: enabled 0
973 01:59:03.906480 PCI: 00:1d.0: enabled 0
974 01:59:03.909407 PCI: 00:1d.1: enabled 0
975 01:59:03.909898 PCI: 00:1d.2: enabled 0
976 01:59:03.912496 PCI: 00:1d.3: enabled 0
977 01:59:03.915602 PCI: 00:1e.0: enabled 1
978 01:59:03.918926 PCI: 00:1e.1: enabled 0
979 01:59:03.919403 PCI: 00:1e.2: enabled 0
980 01:59:03.922375 PCI: 00:1e.3: enabled 1
981 01:59:03.925756 PCI: 00:1f.0: enabled 1
982 01:59:03.928695 PCI: 00:1f.1: enabled 0
983 01:59:03.929050 PCI: 00:1f.2: enabled 1
984 01:59:03.932308 PCI: 00:1f.3: enabled 1
985 01:59:03.935529 PCI: 00:1f.4: enabled 0
986 01:59:03.938842 PCI: 00:1f.5: enabled 1
987 01:59:03.939336 PCI: 00:1f.6: enabled 0
988 01:59:03.942227 PCI: 00:1f.7: enabled 0
989 01:59:03.945540 GENERIC: 0.0: enabled 1
990 01:59:03.945987 GENERIC: 0.0: enabled 1
991 01:59:03.949133 GENERIC: 1.0: enabled 1
992 01:59:03.952348 GENERIC: 0.0: enabled 1
993 01:59:03.955607 GENERIC: 1.0: enabled 1
994 01:59:03.956130 USB0 port 0: enabled 1
995 01:59:03.959004 USB0 port 0: enabled 1
996 01:59:03.962240 GENERIC: 0.0: enabled 1
997 01:59:03.962741 I2C: 00:1a: enabled 1
998 01:59:03.965844 I2C: 00:31: enabled 1
999 01:59:03.968769 I2C: 00:32: enabled 1
1000 01:59:03.969304 I2C: 00:50: enabled 1
1001 01:59:03.972274 I2C: 00:10: enabled 1
1002 01:59:03.975617 I2C: 00:15: enabled 1
1003 01:59:03.978615 I2C: 00:2c: enabled 1
1004 01:59:03.979096 GENERIC: 0.0: enabled 1
1005 01:59:03.982240 SPI: 00: enabled 1
1006 01:59:03.985598 PNP: 0c09.0: enabled 1
1007 01:59:03.986097 GENERIC: 0.0: enabled 1
1008 01:59:03.989047 USB3 port 0: enabled 1
1009 01:59:03.992135 USB3 port 1: enabled 0
1010 01:59:03.992635 USB3 port 2: enabled 1
1011 01:59:03.995480 USB3 port 3: enabled 0
1012 01:59:03.999890 USB2 port 0: enabled 1
1013 01:59:04.002115 USB2 port 1: enabled 0
1014 01:59:04.002519 USB2 port 2: enabled 1
1015 01:59:04.005574 USB2 port 3: enabled 0
1016 01:59:04.008907 USB2 port 4: enabled 0
1017 01:59:04.009446 USB2 port 5: enabled 1
1018 01:59:04.012489 USB2 port 6: enabled 0
1019 01:59:04.015541 USB2 port 7: enabled 0
1020 01:59:04.016038 USB2 port 8: enabled 1
1021 01:59:04.019042 USB2 port 9: enabled 1
1022 01:59:04.022056 USB3 port 0: enabled 1
1023 01:59:04.025661 USB3 port 1: enabled 0
1024 01:59:04.026166 USB3 port 2: enabled 0
1025 01:59:04.028761 USB3 port 3: enabled 0
1026 01:59:04.032369 GENERIC: 0.0: enabled 1
1027 01:59:04.032859 GENERIC: 1.0: enabled 1
1028 01:59:04.035540 APIC: 00: enabled 1
1029 01:59:04.038721 APIC: 14: enabled 1
1030 01:59:04.039211 APIC: 16: enabled 1
1031 01:59:04.041970 APIC: 10: enabled 1
1032 01:59:04.045415 APIC: 12: enabled 1
1033 01:59:04.045806 APIC: 01: enabled 1
1034 01:59:04.048934 APIC: 08: enabled 1
1035 01:59:04.049421 APIC: 09: enabled 1
1036 01:59:04.052128 Compare with tree...
1037 01:59:04.055700 Root Device: enabled 1
1038 01:59:04.058845 CPU_CLUSTER: 0: enabled 1
1039 01:59:04.059329 APIC: 00: enabled 1
1040 01:59:04.062072 APIC: 14: enabled 1
1041 01:59:04.065317 APIC: 16: enabled 1
1042 01:59:04.065803 APIC: 10: enabled 1
1043 01:59:04.068696 APIC: 12: enabled 1
1044 01:59:04.071939 APIC: 01: enabled 1
1045 01:59:04.072426 APIC: 08: enabled 1
1046 01:59:04.075487 APIC: 09: enabled 1
1047 01:59:04.078478 DOMAIN: 0000: enabled 1
1048 01:59:04.079015 GPIO: 0: enabled 1
1049 01:59:04.082054 PCI: 00:00.0: enabled 1
1050 01:59:04.085186 PCI: 00:01.0: enabled 0
1051 01:59:04.088753 PCI: 00:01.1: enabled 0
1052 01:59:04.091896 PCI: 00:02.0: enabled 1
1053 01:59:04.092379 PCI: 00:04.0: enabled 1
1054 01:59:04.094962 GENERIC: 0.0: enabled 1
1055 01:59:04.098540 PCI: 00:05.0: enabled 0
1056 01:59:04.101557 PCI: 00:06.0: enabled 1
1057 01:59:04.105123 PCI: 00:06.2: enabled 0
1058 01:59:04.105643 PCI: 00:08.0: enabled 0
1059 01:59:04.108450 PCI: 00:09.0: enabled 0
1060 01:59:04.112123 PCI: 00:0a.0: enabled 1
1061 01:59:04.115150 PCI: 00:0d.0: enabled 1
1062 01:59:04.118570 USB0 port 0: enabled 1
1063 01:59:04.119058 USB3 port 0: enabled 1
1064 01:59:04.122035 USB3 port 1: enabled 0
1065 01:59:04.124969 USB3 port 2: enabled 1
1066 01:59:04.128480 USB3 port 3: enabled 0
1067 01:59:04.131723 PCI: 00:0d.1: enabled 0
1068 01:59:04.132208 PCI: 00:0d.2: enabled 0
1069 01:59:04.135112 PCI: 00:0d.3: enabled 0
1070 01:59:04.138457 PCI: 00:0e.0: enabled 0
1071 01:59:04.141771 PCI: 00:10.0: enabled 0
1072 01:59:04.144715 PCI: 00:10.1: enabled 0
1073 01:59:04.145104 PCI: 00:10.6: enabled 0
1074 01:59:04.148396 PCI: 00:10.7: enabled 0
1075 01:59:04.151760 PCI: 00:12.0: enabled 0
1076 01:59:04.154767 PCI: 00:12.6: enabled 0
1077 01:59:04.158121 PCI: 00:12.7: enabled 0
1078 01:59:04.158499 PCI: 00:13.0: enabled 0
1079 01:59:04.161493 PCI: 00:14.0: enabled 1
1080 01:59:04.164902 USB0 port 0: enabled 1
1081 01:59:04.168309 USB2 port 0: enabled 1
1082 01:59:04.171584 USB2 port 1: enabled 0
1083 01:59:04.172072 USB2 port 2: enabled 1
1084 01:59:04.174747 USB2 port 3: enabled 0
1085 01:59:04.177950 USB2 port 4: enabled 0
1086 01:59:04.181290 USB2 port 5: enabled 1
1087 01:59:04.184906 USB2 port 6: enabled 0
1088 01:59:04.188363 USB2 port 7: enabled 0
1089 01:59:04.188851 USB2 port 8: enabled 1
1090 01:59:04.191755 USB2 port 9: enabled 1
1091 01:59:04.195004 USB3 port 0: enabled 1
1092 01:59:04.198205 USB3 port 1: enabled 0
1093 01:59:04.201681 USB3 port 2: enabled 0
1094 01:59:04.202170 USB3 port 3: enabled 0
1095 01:59:04.205085 PCI: 00:14.1: enabled 0
1096 01:59:04.208206 PCI: 00:14.2: enabled 1
1097 01:59:04.211442 PCI: 00:14.3: enabled 1
1098 01:59:04.214828 GENERIC: 0.0: enabled 1
1099 01:59:04.215311 PCI: 00:15.0: enabled 1
1100 01:59:04.218016 I2C: 00:1a: enabled 1
1101 01:59:04.221830 I2C: 00:31: enabled 1
1102 01:59:04.224747 I2C: 00:32: enabled 1
1103 01:59:04.228185 PCI: 00:15.1: enabled 1
1104 01:59:04.228668 I2C: 00:50: enabled 1
1105 01:59:04.231495 PCI: 00:15.2: enabled 0
1106 01:59:04.234793 PCI: 00:15.3: enabled 1
1107 01:59:04.237862 I2C: 00:10: enabled 1
1108 01:59:04.238249 PCI: 00:16.0: enabled 1
1109 01:59:04.241368 PCI: 00:16.1: enabled 0
1110 01:59:04.244547 PCI: 00:16.2: enabled 0
1111 01:59:04.247983 PCI: 00:16.3: enabled 0
1112 01:59:04.251213 PCI: 00:16.4: enabled 0
1113 01:59:04.251696 PCI: 00:16.5: enabled 0
1114 01:59:04.254331 PCI: 00:17.0: enabled 1
1115 01:59:04.257391 PCI: 00:19.0: enabled 0
1116 01:59:04.261153 PCI: 00:19.1: enabled 1
1117 01:59:04.264460 I2C: 00:15: enabled 1
1118 01:59:04.264942 I2C: 00:2c: enabled 1
1119 01:59:04.267939 PCI: 00:19.2: enabled 0
1120 01:59:04.271274 PCI: 00:1a.0: enabled 0
1121 01:59:04.274640 PCI: 00:1e.0: enabled 1
1122 01:59:04.277872 PCI: 00:1e.1: enabled 0
1123 01:59:04.278354 PCI: 00:1e.2: enabled 0
1124 01:59:04.281069 PCI: 00:1e.3: enabled 1
1125 01:59:04.284494 SPI: 00: enabled 1
1126 01:59:04.287608 PCI: 00:1f.0: enabled 1
1127 01:59:04.287934 PNP: 0c09.0: enabled 1
1128 01:59:04.291208 PCI: 00:1f.1: enabled 0
1129 01:59:04.294491 PCI: 00:1f.2: enabled 1
1130 01:59:04.297926 GENERIC: 0.0: enabled 1
1131 01:59:04.301470 GENERIC: 0.0: enabled 1
1132 01:59:04.304460 GENERIC: 1.0: enabled 1
1133 01:59:04.304845 PCI: 00:1f.3: enabled 1
1134 01:59:04.307839 PCI: 00:1f.4: enabled 0
1135 01:59:04.311142 PCI: 00:1f.5: enabled 1
1136 01:59:04.314949 PCI: 00:1f.6: enabled 0
1137 01:59:04.317762 PCI: 00:1f.7: enabled 0
1138 01:59:04.318245 Root Device scanning...
1139 01:59:04.320845 scan_static_bus for Root Device
1140 01:59:04.324471 CPU_CLUSTER: 0 enabled
1141 01:59:04.327824 DOMAIN: 0000 enabled
1142 01:59:04.328303 DOMAIN: 0000 scanning...
1143 01:59:04.331452 PCI: pci_scan_bus for bus 00
1144 01:59:04.334397 PCI: 00:00.0 [8086/0000] ops
1145 01:59:04.337752 PCI: 00:00.0 [8086/4609] enabled
1146 01:59:04.341346 PCI: 00:02.0 [8086/0000] bus ops
1147 01:59:04.344105 PCI: 00:02.0 [8086/46b3] enabled
1148 01:59:04.347967 PCI: 00:04.0 [8086/0000] bus ops
1149 01:59:04.351120 PCI: 00:04.0 [8086/461d] enabled
1150 01:59:04.354040 PCI: 00:06.0 [8086/0000] bus ops
1151 01:59:04.357449 PCI: 00:06.0 [8086/464d] enabled
1152 01:59:04.361326 PCI: 00:08.0 [8086/464f] disabled
1153 01:59:04.364618 PCI: 00:0a.0 [8086/467d] enabled
1154 01:59:04.367777 PCI: 00:0d.0 [8086/0000] bus ops
1155 01:59:04.370791 PCI: 00:0d.0 [8086/461e] enabled
1156 01:59:04.374633 PCI: 00:14.0 [8086/0000] bus ops
1157 01:59:04.377814 PCI: 00:14.0 [8086/51ed] enabled
1158 01:59:04.381103 PCI: 00:14.2 [8086/51ef] enabled
1159 01:59:04.384330 PCI: 00:14.3 [8086/0000] bus ops
1160 01:59:04.387741 PCI: 00:14.3 [8086/51f0] enabled
1161 01:59:04.390846 PCI: 00:15.0 [8086/0000] bus ops
1162 01:59:04.394634 PCI: 00:15.0 [8086/51e8] enabled
1163 01:59:04.397623 PCI: 00:15.1 [8086/0000] bus ops
1164 01:59:04.400843 PCI: 00:15.1 [8086/51e9] enabled
1165 01:59:04.404394 PCI: 00:15.2 [8086/0000] bus ops
1166 01:59:04.410941 PCI: 00:15.2 [8086/51ea] disabled
1167 01:59:04.414371 PCI: 00:15.3 [8086/0000] bus ops
1168 01:59:04.417365 PCI: 00:15.3 [8086/51eb] enabled
1169 01:59:04.417851 PCI: 00:16.0 [8086/0000] ops
1170 01:59:04.420762 PCI: 00:16.0 [8086/51e0] enabled
1171 01:59:04.427408 PCI: Static device PCI: 00:17.0 not found, disabling it.
1172 01:59:04.430692 PCI: 00:19.0 [8086/0000] bus ops
1173 01:59:04.434368 PCI: 00:19.0 [8086/51c5] disabled
1174 01:59:04.437285 PCI: 00:19.1 [8086/0000] bus ops
1175 01:59:04.440914 PCI: 00:19.1 [8086/51c6] enabled
1176 01:59:04.444334 PCI: 00:1e.0 [8086/0000] ops
1177 01:59:04.447489 PCI: 00:1e.0 [8086/51a8] enabled
1178 01:59:04.450961 PCI: 00:1e.3 [8086/0000] bus ops
1179 01:59:04.454127 PCI: 00:1e.3 [8086/51ab] enabled
1180 01:59:04.457257 PCI: 00:1f.0 [8086/0000] bus ops
1181 01:59:04.460424 PCI: 00:1f.0 [8086/5182] enabled
1182 01:59:04.464233 RTC Init
1183 01:59:04.467204 Set power on after power failure.
1184 01:59:04.470140 Disabling Deep S3
1185 01:59:04.470526 Disabling Deep S3
1186 01:59:04.473671 Disabling Deep S4
1187 01:59:04.474126 Disabling Deep S4
1188 01:59:04.477028 Disabling Deep S5
1189 01:59:04.477559 Disabling Deep S5
1190 01:59:04.480063 PCI: 00:1f.2 [0000/0000] hidden
1191 01:59:04.483897 PCI: 00:1f.3 [8086/0000] bus ops
1192 01:59:04.487192 PCI: 00:1f.3 [8086/51c8] enabled
1193 01:59:04.490799 PCI: 00:1f.5 [8086/0000] bus ops
1194 01:59:04.493511 PCI: 00:1f.5 [8086/51a4] enabled
1195 01:59:04.497303 GPIO: 0 enabled
1196 01:59:04.500530 PCI: Leftover static devices:
1197 01:59:04.501015 PCI: 00:01.0
1198 01:59:04.503738 PCI: 00:01.1
1199 01:59:04.504116 PCI: 00:05.0
1200 01:59:04.504378 PCI: 00:06.2
1201 01:59:04.507126 PCI: 00:09.0
1202 01:59:04.507610 PCI: 00:0d.1
1203 01:59:04.510497 PCI: 00:0d.2
1204 01:59:04.510980 PCI: 00:0d.3
1205 01:59:04.511251 PCI: 00:0e.0
1206 01:59:04.513492 PCI: 00:10.0
1207 01:59:04.513862 PCI: 00:10.1
1208 01:59:04.516632 PCI: 00:10.6
1209 01:59:04.516904 PCI: 00:10.7
1210 01:59:04.517121 PCI: 00:12.0
1211 01:59:04.520466 PCI: 00:12.6
1212 01:59:04.520810 PCI: 00:12.7
1213 01:59:04.523440 PCI: 00:13.0
1214 01:59:04.523783 PCI: 00:14.1
1215 01:59:04.527299 PCI: 00:16.1
1216 01:59:04.527756 PCI: 00:16.2
1217 01:59:04.528017 PCI: 00:16.3
1218 01:59:04.530301 PCI: 00:16.4
1219 01:59:04.530647 PCI: 00:16.5
1220 01:59:04.533784 PCI: 00:17.0
1221 01:59:04.534238 PCI: 00:19.2
1222 01:59:04.534497 PCI: 00:1a.0
1223 01:59:04.537032 PCI: 00:1e.1
1224 01:59:04.537324 PCI: 00:1e.2
1225 01:59:04.540002 PCI: 00:1f.1
1226 01:59:04.540344 PCI: 00:1f.4
1227 01:59:04.543657 PCI: 00:1f.6
1228 01:59:04.544113 PCI: 00:1f.7
1229 01:59:04.546743 PCI: Check your devicetree.cb.
1230 01:59:04.549951 PCI: 00:02.0 scanning...
1231 01:59:04.553631 scan_generic_bus for PCI: 00:02.0
1232 01:59:04.556870 scan_generic_bus for PCI: 00:02.0 done
1233 01:59:04.559943 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1234 01:59:04.563468 PCI: 00:04.0 scanning...
1235 01:59:04.567103 scan_generic_bus for PCI: 00:04.0
1236 01:59:04.569956 GENERIC: 0.0 enabled
1237 01:59:04.576849 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1238 01:59:04.579646 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1239 01:59:04.583449 PCI: 00:06.0 scanning...
1240 01:59:04.586540 do_pci_scan_bridge for PCI: 00:06.0
1241 01:59:04.590012 PCI: pci_scan_bus for bus 01
1242 01:59:04.593235 PCI: 01:00.0 [15b7/5009] enabled
1243 01:59:04.596860 Enabling Common Clock Configuration
1244 01:59:04.599969 L1 Sub-State supported from root port 6
1245 01:59:04.603526 L1 Sub-State Support = 0x5
1246 01:59:04.606748 CommonModeRestoreTime = 0x6e
1247 01:59:04.610144 Power On Value = 0x5, Power On Scale = 0x2
1248 01:59:04.613446 ASPM: Enabled L1
1249 01:59:04.616800 PCIe: Max_Payload_Size adjusted to 256
1250 01:59:04.620196 PCI: 01:00.0: Enabled LTR
1251 01:59:04.623396 PCI: 01:00.0: Programmed LTR max latencies
1252 01:59:04.626802 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1253 01:59:04.630072 PCI: 00:0d.0 scanning...
1254 01:59:04.633340 scan_static_bus for PCI: 00:0d.0
1255 01:59:04.636340 USB0 port 0 enabled
1256 01:59:04.636723 USB0 port 0 scanning...
1257 01:59:04.639847 scan_static_bus for USB0 port 0
1258 01:59:04.643306 USB3 port 0 enabled
1259 01:59:04.646499 USB3 port 1 disabled
1260 01:59:04.646981 USB3 port 2 enabled
1261 01:59:04.649961 USB3 port 3 disabled
1262 01:59:04.653395 USB3 port 0 scanning...
1263 01:59:04.656606 scan_static_bus for USB3 port 0
1264 01:59:04.659941 scan_static_bus for USB3 port 0 done
1265 01:59:04.663330 scan_bus: bus USB3 port 0 finished in 6 msecs
1266 01:59:04.666689 USB3 port 2 scanning...
1267 01:59:04.669840 scan_static_bus for USB3 port 2
1268 01:59:04.672874 scan_static_bus for USB3 port 2 done
1269 01:59:04.676380 scan_bus: bus USB3 port 2 finished in 6 msecs
1270 01:59:04.679844 scan_static_bus for USB0 port 0 done
1271 01:59:04.686859 scan_bus: bus USB0 port 0 finished in 43 msecs
1272 01:59:04.689662 scan_static_bus for PCI: 00:0d.0 done
1273 01:59:04.692673 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1274 01:59:04.696512 PCI: 00:14.0 scanning...
1275 01:59:04.699648 scan_static_bus for PCI: 00:14.0
1276 01:59:04.703103 USB0 port 0 enabled
1277 01:59:04.706221 USB0 port 0 scanning...
1278 01:59:04.709612 scan_static_bus for USB0 port 0
1279 01:59:04.710090 USB2 port 0 enabled
1280 01:59:04.713000 USB2 port 1 disabled
1281 01:59:04.713327 USB2 port 2 enabled
1282 01:59:04.716458 USB2 port 3 disabled
1283 01:59:04.720125 USB2 port 4 disabled
1284 01:59:04.720611 USB2 port 5 enabled
1285 01:59:04.722894 USB2 port 6 disabled
1286 01:59:04.726431 USB2 port 7 disabled
1287 01:59:04.726904 USB2 port 8 enabled
1288 01:59:04.729786 USB2 port 9 enabled
1289 01:59:04.730274 USB3 port 0 enabled
1290 01:59:04.732744 USB3 port 1 disabled
1291 01:59:04.735934 USB3 port 2 disabled
1292 01:59:04.736276 USB3 port 3 disabled
1293 01:59:04.739704 USB2 port 0 scanning...
1294 01:59:04.742705 scan_static_bus for USB2 port 0
1295 01:59:04.746151 scan_static_bus for USB2 port 0 done
1296 01:59:04.753007 scan_bus: bus USB2 port 0 finished in 6 msecs
1297 01:59:04.753535 USB2 port 2 scanning...
1298 01:59:04.756246 scan_static_bus for USB2 port 2
1299 01:59:04.759018 scan_static_bus for USB2 port 2 done
1300 01:59:04.765982 scan_bus: bus USB2 port 2 finished in 6 msecs
1301 01:59:04.769543 USB2 port 5 scanning...
1302 01:59:04.772896 scan_static_bus for USB2 port 5
1303 01:59:04.776398 scan_static_bus for USB2 port 5 done
1304 01:59:04.779217 scan_bus: bus USB2 port 5 finished in 6 msecs
1305 01:59:04.782726 USB2 port 8 scanning...
1306 01:59:04.786368 scan_static_bus for USB2 port 8
1307 01:59:04.789244 scan_static_bus for USB2 port 8 done
1308 01:59:04.792831 scan_bus: bus USB2 port 8 finished in 6 msecs
1309 01:59:04.796290 USB2 port 9 scanning...
1310 01:59:04.799327 scan_static_bus for USB2 port 9
1311 01:59:04.802952 scan_static_bus for USB2 port 9 done
1312 01:59:04.805959 scan_bus: bus USB2 port 9 finished in 6 msecs
1313 01:59:04.809093 USB3 port 0 scanning...
1314 01:59:04.812747 scan_static_bus for USB3 port 0
1315 01:59:04.816438 scan_static_bus for USB3 port 0 done
1316 01:59:04.822902 scan_bus: bus USB3 port 0 finished in 6 msecs
1317 01:59:04.825681 scan_static_bus for USB0 port 0 done
1318 01:59:04.829144 scan_bus: bus USB0 port 0 finished in 120 msecs
1319 01:59:04.832443 scan_static_bus for PCI: 00:14.0 done
1320 01:59:04.839502 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1321 01:59:04.842481 PCI: 00:14.3 scanning...
1322 01:59:04.845693 scan_static_bus for PCI: 00:14.3
1323 01:59:04.846075 GENERIC: 0.0 enabled
1324 01:59:04.848999 scan_static_bus for PCI: 00:14.3 done
1325 01:59:04.855914 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1326 01:59:04.858823 PCI: 00:15.0 scanning...
1327 01:59:04.862250 scan_static_bus for PCI: 00:15.0
1328 01:59:04.862629 I2C: 00:1a enabled
1329 01:59:04.865863 I2C: 00:31 enabled
1330 01:59:04.866348 I2C: 00:32 enabled
1331 01:59:04.869601 scan_static_bus for PCI: 00:15.0 done
1332 01:59:04.875658 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1333 01:59:04.879062 PCI: 00:15.1 scanning...
1334 01:59:04.882450 scan_static_bus for PCI: 00:15.1
1335 01:59:04.882935 I2C: 00:50 enabled
1336 01:59:04.885654 scan_static_bus for PCI: 00:15.1 done
1337 01:59:04.892206 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1338 01:59:04.895655 PCI: 00:15.3 scanning...
1339 01:59:04.898983 scan_static_bus for PCI: 00:15.3
1340 01:59:04.899467 I2C: 00:10 enabled
1341 01:59:04.902208 scan_static_bus for PCI: 00:15.3 done
1342 01:59:04.909291 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1343 01:59:04.909805 PCI: 00:19.1 scanning...
1344 01:59:04.912553 scan_static_bus for PCI: 00:19.1
1345 01:59:04.915448 I2C: 00:15 enabled
1346 01:59:04.918817 I2C: 00:2c enabled
1347 01:59:04.922278 scan_static_bus for PCI: 00:19.1 done
1348 01:59:04.925630 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1349 01:59:04.928974 PCI: 00:1e.3 scanning...
1350 01:59:04.932153 scan_generic_bus for PCI: 00:1e.3
1351 01:59:04.935201 SPI: 00 enabled
1352 01:59:04.938734 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1353 01:59:04.945141 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1354 01:59:04.948377 PCI: 00:1f.0 scanning...
1355 01:59:04.952234 scan_static_bus for PCI: 00:1f.0
1356 01:59:04.952685 PNP: 0c09.0 enabled
1357 01:59:04.955829 PNP: 0c09.0 scanning...
1358 01:59:04.958718 scan_static_bus for PNP: 0c09.0
1359 01:59:04.961778 scan_static_bus for PNP: 0c09.0 done
1360 01:59:04.965344 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1361 01:59:04.972310 scan_static_bus for PCI: 00:1f.0 done
1362 01:59:04.975474 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1363 01:59:04.978803 PCI: 00:1f.2 scanning...
1364 01:59:04.982243 scan_static_bus for PCI: 00:1f.2
1365 01:59:04.982715 GENERIC: 0.0 enabled
1366 01:59:04.985451 GENERIC: 0.0 scanning...
1367 01:59:04.988769 scan_static_bus for GENERIC: 0.0
1368 01:59:04.992143 GENERIC: 0.0 enabled
1369 01:59:04.992628 GENERIC: 1.0 enabled
1370 01:59:04.998895 scan_static_bus for GENERIC: 0.0 done
1371 01:59:05.001797 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1372 01:59:05.005353 scan_static_bus for PCI: 00:1f.2 done
1373 01:59:05.012073 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1374 01:59:05.012557 PCI: 00:1f.3 scanning...
1375 01:59:05.015556 scan_static_bus for PCI: 00:1f.3
1376 01:59:05.022146 scan_static_bus for PCI: 00:1f.3 done
1377 01:59:05.024911 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1378 01:59:05.028666 PCI: 00:1f.5 scanning...
1379 01:59:05.032012 scan_generic_bus for PCI: 00:1f.5
1380 01:59:05.035161 scan_generic_bus for PCI: 00:1f.5 done
1381 01:59:05.038675 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1382 01:59:05.044987 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1383 01:59:05.048174 scan_static_bus for Root Device done
1384 01:59:05.051522 scan_bus: bus Root Device finished in 729 msecs
1385 01:59:05.055170 done
1386 01:59:05.058323 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1387 01:59:05.064899 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1388 01:59:05.071594 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1389 01:59:05.075172 SPI flash protection: WPSW=0 SRP0=0
1390 01:59:05.078217 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1391 01:59:05.085091 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1392 01:59:05.088506 found VGA at PCI: 00:02.0
1393 01:59:05.091638 Setting up VGA for PCI: 00:02.0
1394 01:59:05.098033 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1395 01:59:05.101515 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1396 01:59:05.104779 Allocating resources...
1397 01:59:05.105302 Reading resources...
1398 01:59:05.111988 Root Device read_resources bus 0 link: 0
1399 01:59:05.114852 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1400 01:59:05.118518 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1401 01:59:05.124855 DOMAIN: 0000 read_resources bus 0 link: 0
1402 01:59:05.131251 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1403 01:59:05.137992 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1404 01:59:05.141308 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1405 01:59:05.147843 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1406 01:59:05.154664 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1407 01:59:05.161161 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1408 01:59:05.167804 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1409 01:59:05.174313 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1410 01:59:05.180960 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1411 01:59:05.188015 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1412 01:59:05.194367 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1413 01:59:05.201192 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1414 01:59:05.207855 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1415 01:59:05.211212 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1416 01:59:05.217600 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1417 01:59:05.224473 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1418 01:59:05.230911 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1419 01:59:05.237541 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1420 01:59:05.244186 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1421 01:59:05.250870 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1422 01:59:05.257619 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1423 01:59:05.260527 PCI: 00:04.0 read_resources bus 1 link: 0
1424 01:59:05.264165 PCI: 00:04.0 read_resources bus 1 link: 0 done
1425 01:59:05.270418 PCI: 00:06.0 read_resources bus 1 link: 0
1426 01:59:05.274020 PCI: 00:06.0 read_resources bus 1 link: 0 done
1427 01:59:05.277116 PCI: 00:0d.0 read_resources bus 0 link: 0
1428 01:59:05.284236 USB0 port 0 read_resources bus 0 link: 0
1429 01:59:05.287398 USB0 port 0 read_resources bus 0 link: 0 done
1430 01:59:05.290657 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1431 01:59:05.297262 PCI: 00:14.0 read_resources bus 0 link: 0
1432 01:59:05.300856 USB0 port 0 read_resources bus 0 link: 0
1433 01:59:05.304018 USB0 port 0 read_resources bus 0 link: 0 done
1434 01:59:05.310840 PCI: 00:14.0 read_resources bus 0 link: 0 done
1435 01:59:05.314321 PCI: 00:14.3 read_resources bus 0 link: 0
1436 01:59:05.317253 PCI: 00:14.3 read_resources bus 0 link: 0 done
1437 01:59:05.323771 PCI: 00:15.0 read_resources bus 0 link: 0
1438 01:59:05.327250 PCI: 00:15.0 read_resources bus 0 link: 0 done
1439 01:59:05.330271 PCI: 00:15.1 read_resources bus 0 link: 0
1440 01:59:05.337170 PCI: 00:15.1 read_resources bus 0 link: 0 done
1441 01:59:05.340572 PCI: 00:15.3 read_resources bus 0 link: 0
1442 01:59:05.347100 PCI: 00:15.3 read_resources bus 0 link: 0 done
1443 01:59:05.350404 PCI: 00:19.1 read_resources bus 0 link: 0
1444 01:59:05.353862 PCI: 00:19.1 read_resources bus 0 link: 0 done
1445 01:59:05.360379 PCI: 00:1e.3 read_resources bus 2 link: 0
1446 01:59:05.363591 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1447 01:59:05.367181 PCI: 00:1f.0 read_resources bus 0 link: 0
1448 01:59:05.373767 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1449 01:59:05.376827 PCI: 00:1f.2 read_resources bus 0 link: 0
1450 01:59:05.380143 GENERIC: 0.0 read_resources bus 0 link: 0
1451 01:59:05.386804 GENERIC: 0.0 read_resources bus 0 link: 0 done
1452 01:59:05.389984 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1453 01:59:05.396686 DOMAIN: 0000 read_resources bus 0 link: 0 done
1454 01:59:05.399876 Root Device read_resources bus 0 link: 0 done
1455 01:59:05.403440 Done reading resources.
1456 01:59:05.409982 Show resources in subtree (Root Device)...After reading.
1457 01:59:05.413405 Root Device child on link 0 CPU_CLUSTER: 0
1458 01:59:05.416522 CPU_CLUSTER: 0 child on link 0 APIC: 00
1459 01:59:05.420069 APIC: 00
1460 01:59:05.420563 APIC: 14
1461 01:59:05.420837 APIC: 16
1462 01:59:05.423328 APIC: 10
1463 01:59:05.423825 APIC: 12
1464 01:59:05.424101 APIC: 01
1465 01:59:05.426816 APIC: 08
1466 01:59:05.427305 APIC: 09
1467 01:59:05.429581 DOMAIN: 0000 child on link 0 GPIO: 0
1468 01:59:05.439805 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1469 01:59:05.450518 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1470 01:59:05.453077 GPIO: 0
1471 01:59:05.453592 PCI: 00:00.0
1472 01:59:05.462918 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1473 01:59:05.472731 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1474 01:59:05.482607 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1475 01:59:05.489493 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1476 01:59:05.499599 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1477 01:59:05.509431 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1478 01:59:05.519527 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1479 01:59:05.529285 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1480 01:59:05.539668 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1481 01:59:05.549086 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1482 01:59:05.556069 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1483 01:59:05.565866 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1484 01:59:05.575735 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1485 01:59:05.585941 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1486 01:59:05.595965 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1487 01:59:05.602448 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1488 01:59:05.612355 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1489 01:59:05.622139 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1490 01:59:05.632242 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1491 01:59:05.642097 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1492 01:59:05.652050 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1493 01:59:05.661891 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1494 01:59:05.671948 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1495 01:59:05.681870 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1496 01:59:05.691998 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1497 01:59:05.698121 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1498 01:59:05.708533 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1499 01:59:05.718665 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1500 01:59:05.721945 PCI: 00:02.0
1501 01:59:05.731634 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1502 01:59:05.741409 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1503 01:59:05.748158 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1504 01:59:05.755172 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1505 01:59:05.764939 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1506 01:59:05.765472 GENERIC: 0.0
1507 01:59:05.771967 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1508 01:59:05.778236 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1509 01:59:05.788238 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1510 01:59:05.798055 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1511 01:59:05.798564 PCI: 01:00.0
1512 01:59:05.811466 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1513 01:59:05.817996 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1514 01:59:05.821537 PCI: 00:08.0
1515 01:59:05.821920 PCI: 00:0a.0
1516 01:59:05.831593 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1517 01:59:05.837868 PCI: 00:0d.0 child on link 0 USB0 port 0
1518 01:59:05.847939 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1519 01:59:05.850936 USB0 port 0 child on link 0 USB3 port 0
1520 01:59:05.854301 USB3 port 0
1521 01:59:05.854693 USB3 port 1
1522 01:59:05.857891 USB3 port 2
1523 01:59:05.858383 USB3 port 3
1524 01:59:05.864219 PCI: 00:14.0 child on link 0 USB0 port 0
1525 01:59:05.874647 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1526 01:59:05.877824 USB0 port 0 child on link 0 USB2 port 0
1527 01:59:05.878306 USB2 port 0
1528 01:59:05.881115 USB2 port 1
1529 01:59:05.884538 USB2 port 2
1530 01:59:05.885028 USB2 port 3
1531 01:59:05.887898 USB2 port 4
1532 01:59:05.888390 USB2 port 5
1533 01:59:05.891081 USB2 port 6
1534 01:59:05.891572 USB2 port 7
1535 01:59:05.894250 USB2 port 8
1536 01:59:05.894632 USB2 port 9
1537 01:59:05.897654 USB3 port 0
1538 01:59:05.898177 USB3 port 1
1539 01:59:05.901184 USB3 port 2
1540 01:59:05.901728 USB3 port 3
1541 01:59:05.904546 PCI: 00:14.2
1542 01:59:05.914494 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1543 01:59:05.924762 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1544 01:59:05.927657 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1545 01:59:05.937813 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1546 01:59:05.940998 GENERIC: 0.0
1547 01:59:05.944249 PCI: 00:15.0 child on link 0 I2C: 00:1a
1548 01:59:05.954371 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1549 01:59:05.954842 I2C: 00:1a
1550 01:59:05.957655 I2C: 00:31
1551 01:59:05.958148 I2C: 00:32
1552 01:59:05.964639 PCI: 00:15.1 child on link 0 I2C: 00:50
1553 01:59:05.974087 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1554 01:59:05.974553 I2C: 00:50
1555 01:59:05.977599 PCI: 00:15.2
1556 01:59:05.980447 PCI: 00:15.3 child on link 0 I2C: 00:10
1557 01:59:05.990894 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1558 01:59:05.991363 I2C: 00:10
1559 01:59:05.994223 PCI: 00:16.0
1560 01:59:06.004094 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 01:59:06.004562 PCI: 00:19.0
1562 01:59:06.010795 PCI: 00:19.1 child on link 0 I2C: 00:15
1563 01:59:06.020801 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 01:59:06.021327 I2C: 00:15
1565 01:59:06.024623 I2C: 00:2c
1566 01:59:06.025115 PCI: 00:1e.0
1567 01:59:06.037392 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1568 01:59:06.040807 PCI: 00:1e.3 child on link 0 SPI: 00
1569 01:59:06.050485 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 01:59:06.050953 SPI: 00
1571 01:59:06.054044 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1572 01:59:06.063661 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1573 01:59:06.067015 PNP: 0c09.0
1574 01:59:06.073909 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1575 01:59:06.080121 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1576 01:59:06.087086 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1577 01:59:06.097091 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1578 01:59:06.103678 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1579 01:59:06.104175 GENERIC: 0.0
1580 01:59:06.107149 GENERIC: 1.0
1581 01:59:06.107716 PCI: 00:1f.3
1582 01:59:06.117320 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1583 01:59:06.127102 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1584 01:59:06.130312 PCI: 00:1f.5
1585 01:59:06.137140 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1586 01:59:06.147134 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1587 01:59:06.150247 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1588 01:59:06.157014 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1589 01:59:06.163402 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1590 01:59:06.167038 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1591 01:59:06.173582 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1592 01:59:06.180017 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1593 01:59:06.186509 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1594 01:59:06.193351 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1595 01:59:06.203469 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1596 01:59:06.206691 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1597 01:59:06.216769 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1598 01:59:06.223204 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1599 01:59:06.229844 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1600 01:59:06.233275 DOMAIN: 0000: Resource ranges:
1601 01:59:06.236584 * Base: 1000, Size: 800, Tag: 100
1602 01:59:06.239794 * Base: 1900, Size: e700, Tag: 100
1603 01:59:06.246667 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1604 01:59:06.253159 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1605 01:59:06.259814 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1606 01:59:06.266625 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1607 01:59:06.276204 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1608 01:59:06.282578 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1609 01:59:06.289804 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1610 01:59:06.299230 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1611 01:59:06.305833 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1612 01:59:06.312952 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1613 01:59:06.322640 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1614 01:59:06.329454 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1615 01:59:06.336345 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1616 01:59:06.345963 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1617 01:59:06.352557 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1618 01:59:06.359372 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1619 01:59:06.369313 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1620 01:59:06.375939 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1621 01:59:06.381950 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1622 01:59:06.392195 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1623 01:59:06.398742 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1624 01:59:06.405555 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1625 01:59:06.415537 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1626 01:59:06.422095 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1627 01:59:06.428749 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1628 01:59:06.435669 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1629 01:59:06.445542 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1630 01:59:06.451737 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1631 01:59:06.462230 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1632 01:59:06.468791 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1633 01:59:06.475358 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1634 01:59:06.481770 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1635 01:59:06.491762 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1636 01:59:06.494873 DOMAIN: 0000: Resource ranges:
1637 01:59:06.498408 * Base: 80400000, Size: 3fc00000, Tag: 200
1638 01:59:06.501646 * Base: d0000000, Size: 28000000, Tag: 200
1639 01:59:06.508339 * Base: fa000000, Size: 1000000, Tag: 200
1640 01:59:06.511791 * Base: fb001000, Size: 17ff000, Tag: 200
1641 01:59:06.515201 * Base: fe800000, Size: 300000, Tag: 200
1642 01:59:06.521772 * Base: feb80000, Size: 80000, Tag: 200
1643 01:59:06.524807 * Base: fed00000, Size: 40000, Tag: 200
1644 01:59:06.528044 * Base: fed70000, Size: 10000, Tag: 200
1645 01:59:06.531651 * Base: fed88000, Size: 8000, Tag: 200
1646 01:59:06.534819 * Base: fed93000, Size: d000, Tag: 200
1647 01:59:06.541381 * Base: feda2000, Size: 1e000, Tag: 200
1648 01:59:06.545437 * Base: fede0000, Size: 1220000, Tag: 200
1649 01:59:06.548310 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1650 01:59:06.557980 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1651 01:59:06.564593 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1652 01:59:06.571438 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1653 01:59:06.578011 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1654 01:59:06.584086 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1655 01:59:06.591250 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1656 01:59:06.597484 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1657 01:59:06.604102 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1658 01:59:06.610950 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1659 01:59:06.617172 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1660 01:59:06.623809 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1661 01:59:06.630888 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1662 01:59:06.637480 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1663 01:59:06.643975 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1664 01:59:06.650528 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1665 01:59:06.657468 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1666 01:59:06.663494 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1667 01:59:06.670623 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1668 01:59:06.677349 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1669 01:59:06.683660 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1670 01:59:06.690397 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1671 01:59:06.693522 PCI: 00:06.0: Resource ranges:
1672 01:59:06.700480 * Base: 80400000, Size: 100000, Tag: 200
1673 01:59:06.707011 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1674 01:59:06.713660 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1675 01:59:06.720122 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1676 01:59:06.727046 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1677 01:59:06.733881 Root Device assign_resources, bus 0 link: 0
1678 01:59:06.736833 DOMAIN: 0000 assign_resources, bus 0 link: 0
1679 01:59:06.743770 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1680 01:59:06.753183 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1681 01:59:06.759894 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1682 01:59:06.769811 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1683 01:59:06.773523 PCI: 00:04.0 assign_resources, bus 1 link: 0
1684 01:59:06.776728 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1685 01:59:06.786774 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1686 01:59:06.796531 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1687 01:59:06.806631 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1688 01:59:06.810393 PCI: 00:06.0 assign_resources, bus 1 link: 0
1689 01:59:06.816776 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1690 01:59:06.826231 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1691 01:59:06.829821 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1692 01:59:06.839902 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1693 01:59:06.846429 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1694 01:59:06.849924 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1695 01:59:06.856377 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1696 01:59:06.862911 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1697 01:59:06.869405 PCI: 00:14.0 assign_resources, bus 0 link: 0
1698 01:59:06.872865 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1699 01:59:06.882901 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1700 01:59:06.889477 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1701 01:59:06.896168 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1702 01:59:06.902724 PCI: 00:14.3 assign_resources, bus 0 link: 0
1703 01:59:06.905870 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1704 01:59:06.916074 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1705 01:59:06.919238 PCI: 00:15.0 assign_resources, bus 0 link: 0
1706 01:59:06.925856 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1707 01:59:06.932356 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1708 01:59:06.935909 PCI: 00:15.1 assign_resources, bus 0 link: 0
1709 01:59:06.942345 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1710 01:59:06.949147 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1711 01:59:06.955591 PCI: 00:15.3 assign_resources, bus 0 link: 0
1712 01:59:06.959191 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1713 01:59:06.968893 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1714 01:59:06.975720 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1715 01:59:06.978516 PCI: 00:19.1 assign_resources, bus 0 link: 0
1716 01:59:06.984997 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1717 01:59:06.991788 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1718 01:59:06.998553 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1719 01:59:07.001655 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1720 01:59:07.005133 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1721 01:59:07.011720 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1722 01:59:07.015006 LPC: Trying to open IO window from 800 size 1ff
1723 01:59:07.024981 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1724 01:59:07.031730 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1725 01:59:07.041845 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1726 01:59:07.044804 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1727 01:59:07.051480 Root Device assign_resources, bus 0 link: 0 done
1728 01:59:07.051908 Done setting resources.
1729 01:59:07.058666 Show resources in subtree (Root Device)...After assigning values.
1730 01:59:07.064725 Root Device child on link 0 CPU_CLUSTER: 0
1731 01:59:07.068344 CPU_CLUSTER: 0 child on link 0 APIC: 00
1732 01:59:07.068794 APIC: 00
1733 01:59:07.071425 APIC: 14
1734 01:59:07.071779 APIC: 16
1735 01:59:07.072022 APIC: 10
1736 01:59:07.074706 APIC: 12
1737 01:59:07.075060 APIC: 01
1738 01:59:07.077969 APIC: 08
1739 01:59:07.078311 APIC: 09
1740 01:59:07.081207 DOMAIN: 0000 child on link 0 GPIO: 0
1741 01:59:07.091625 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1742 01:59:07.101319 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1743 01:59:07.101896 GPIO: 0
1744 01:59:07.104790 PCI: 00:00.0
1745 01:59:07.114572 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1746 01:59:07.124416 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1747 01:59:07.131056 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1748 01:59:07.141049 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1749 01:59:07.151166 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1750 01:59:07.160959 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1751 01:59:07.170660 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1752 01:59:07.180960 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1753 01:59:07.187596 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1754 01:59:07.197355 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1755 01:59:07.207277 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1756 01:59:07.217383 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1757 01:59:07.227295 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1758 01:59:07.237366 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1759 01:59:07.243871 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1760 01:59:07.253309 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1761 01:59:07.263728 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1762 01:59:07.273779 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1763 01:59:07.283715 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1764 01:59:07.293821 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1765 01:59:07.303619 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1766 01:59:07.313550 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1767 01:59:07.320111 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1768 01:59:07.329909 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1769 01:59:07.340017 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1770 01:59:07.349906 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1771 01:59:07.359788 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1772 01:59:07.369846 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1773 01:59:07.370366 PCI: 00:02.0
1774 01:59:07.382932 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1775 01:59:07.393086 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1776 01:59:07.402914 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1777 01:59:07.406366 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1778 01:59:07.416403 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1779 01:59:07.419773 GENERIC: 0.0
1780 01:59:07.422736 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1781 01:59:07.432784 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1782 01:59:07.442580 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1783 01:59:07.455762 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1784 01:59:07.456224 PCI: 01:00.0
1785 01:59:07.465755 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1786 01:59:07.475555 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1787 01:59:07.479013 PCI: 00:08.0
1788 01:59:07.479625 PCI: 00:0a.0
1789 01:59:07.489275 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1790 01:59:07.496025 PCI: 00:0d.0 child on link 0 USB0 port 0
1791 01:59:07.505762 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1792 01:59:07.509128 USB0 port 0 child on link 0 USB3 port 0
1793 01:59:07.512687 USB3 port 0
1794 01:59:07.513164 USB3 port 1
1795 01:59:07.515694 USB3 port 2
1796 01:59:07.516173 USB3 port 3
1797 01:59:07.522445 PCI: 00:14.0 child on link 0 USB0 port 0
1798 01:59:07.532386 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1799 01:59:07.535565 USB0 port 0 child on link 0 USB2 port 0
1800 01:59:07.539113 USB2 port 0
1801 01:59:07.539596 USB2 port 1
1802 01:59:07.542484 USB2 port 2
1803 01:59:07.542972 USB2 port 3
1804 01:59:07.545531 USB2 port 4
1805 01:59:07.546041 USB2 port 5
1806 01:59:07.548530 USB2 port 6
1807 01:59:07.548905 USB2 port 7
1808 01:59:07.551990 USB2 port 8
1809 01:59:07.552370 USB2 port 9
1810 01:59:07.555160 USB3 port 0
1811 01:59:07.558608 USB3 port 1
1812 01:59:07.559081 USB3 port 2
1813 01:59:07.562035 USB3 port 3
1814 01:59:07.562550 PCI: 00:14.2
1815 01:59:07.571831 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1816 01:59:07.581795 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1817 01:59:07.588475 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1818 01:59:07.598286 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1819 01:59:07.598756 GENERIC: 0.0
1820 01:59:07.604986 PCI: 00:15.0 child on link 0 I2C: 00:1a
1821 01:59:07.614758 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1822 01:59:07.615253 I2C: 00:1a
1823 01:59:07.617982 I2C: 00:31
1824 01:59:07.618476 I2C: 00:32
1825 01:59:07.624555 PCI: 00:15.1 child on link 0 I2C: 00:50
1826 01:59:07.634717 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1827 01:59:07.635324 I2C: 00:50
1828 01:59:07.637729 PCI: 00:15.2
1829 01:59:07.640848 PCI: 00:15.3 child on link 0 I2C: 00:10
1830 01:59:07.651182 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1831 01:59:07.654276 I2C: 00:10
1832 01:59:07.654748 PCI: 00:16.0
1833 01:59:07.664497 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1834 01:59:07.667803 PCI: 00:19.0
1835 01:59:07.671060 PCI: 00:19.1 child on link 0 I2C: 00:15
1836 01:59:07.681127 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1837 01:59:07.683853 I2C: 00:15
1838 01:59:07.684250 I2C: 00:2c
1839 01:59:07.687380 PCI: 00:1e.0
1840 01:59:07.697583 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1841 01:59:07.700651 PCI: 00:1e.3 child on link 0 SPI: 00
1842 01:59:07.710993 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1843 01:59:07.714139 SPI: 00
1844 01:59:07.717193 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1845 01:59:07.727540 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1846 01:59:07.728058 PNP: 0c09.0
1847 01:59:07.737632 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1848 01:59:07.740914 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1849 01:59:07.750717 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1850 01:59:07.760415 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1851 01:59:07.764131 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1852 01:59:07.767235 GENERIC: 0.0
1853 01:59:07.767620 GENERIC: 1.0
1854 01:59:07.770397 PCI: 00:1f.3
1855 01:59:07.780557 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1856 01:59:07.790452 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1857 01:59:07.793897 PCI: 00:1f.5
1858 01:59:07.803872 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1859 01:59:07.804438 Done allocating resources.
1860 01:59:07.810509 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1861 01:59:07.817205 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1862 01:59:07.820388 Configure audio over I2S with MAX98373 NAU88L25B.
1863 01:59:07.826164 Enabling BT offload
1864 01:59:07.833657 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1865 01:59:07.837069 Enabling resources...
1866 01:59:07.840145 PCI: 00:00.0 subsystem <- 8086/4609
1867 01:59:07.843637 PCI: 00:00.0 cmd <- 06
1868 01:59:07.846843 PCI: 00:02.0 subsystem <- 8086/46b3
1869 01:59:07.849980 PCI: 00:02.0 cmd <- 03
1870 01:59:07.853573 PCI: 00:04.0 subsystem <- 8086/461d
1871 01:59:07.854076 PCI: 00:04.0 cmd <- 02
1872 01:59:07.856911 PCI: 00:06.0 bridge ctrl <- 0013
1873 01:59:07.860060 PCI: 00:06.0 subsystem <- 8086/464d
1874 01:59:07.863417 PCI: 00:06.0 cmd <- 106
1875 01:59:07.866862 PCI: 00:0a.0 subsystem <- 8086/467d
1876 01:59:07.870231 PCI: 00:0a.0 cmd <- 02
1877 01:59:07.873443 PCI: 00:0d.0 subsystem <- 8086/461e
1878 01:59:07.876596 PCI: 00:0d.0 cmd <- 02
1879 01:59:07.880160 PCI: 00:14.0 subsystem <- 8086/51ed
1880 01:59:07.883372 PCI: 00:14.0 cmd <- 02
1881 01:59:07.886341 PCI: 00:14.2 subsystem <- 8086/51ef
1882 01:59:07.886725 PCI: 00:14.2 cmd <- 02
1883 01:59:07.890369 PCI: 00:14.3 subsystem <- 8086/51f0
1884 01:59:07.893603 PCI: 00:14.3 cmd <- 02
1885 01:59:07.896425 PCI: 00:15.0 subsystem <- 8086/51e8
1886 01:59:07.900172 PCI: 00:15.0 cmd <- 02
1887 01:59:07.903684 PCI: 00:15.1 subsystem <- 8086/51e9
1888 01:59:07.906487 PCI: 00:15.1 cmd <- 06
1889 01:59:07.909747 PCI: 00:15.3 subsystem <- 8086/51eb
1890 01:59:07.913286 PCI: 00:15.3 cmd <- 02
1891 01:59:07.916740 PCI: 00:16.0 subsystem <- 8086/51e0
1892 01:59:07.917272 PCI: 00:16.0 cmd <- 02
1893 01:59:07.920518 PCI: 00:19.1 subsystem <- 8086/51c6
1894 01:59:07.923108 PCI: 00:19.1 cmd <- 02
1895 01:59:07.926493 PCI: 00:1e.0 subsystem <- 8086/51a8
1896 01:59:07.929369 PCI: 00:1e.0 cmd <- 06
1897 01:59:07.933074 PCI: 00:1e.3 subsystem <- 8086/51ab
1898 01:59:07.936549 PCI: 00:1e.3 cmd <- 02
1899 01:59:07.939821 PCI: 00:1f.0 subsystem <- 8086/5182
1900 01:59:07.943206 PCI: 00:1f.0 cmd <- 407
1901 01:59:07.946354 PCI: 00:1f.3 subsystem <- 8086/51c8
1902 01:59:07.946836 PCI: 00:1f.3 cmd <- 02
1903 01:59:07.953056 PCI: 00:1f.5 subsystem <- 8086/51a4
1904 01:59:07.953586 PCI: 00:1f.5 cmd <- 406
1905 01:59:07.956465 PCI: 01:00.0 cmd <- 02
1906 01:59:07.956947 done.
1907 01:59:07.963100 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1908 01:59:07.966155 ME: Version: Unavailable
1909 01:59:07.969896 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1910 01:59:07.973055 Initializing devices...
1911 01:59:07.976582 Root Device init
1912 01:59:07.977063 mainboard: EC init
1913 01:59:07.982594 Chrome EC: Set SMI mask to 0x0000000000000000
1914 01:59:07.983054 Chrome EC: UHEPI supported
1915 01:59:07.991614 Chrome EC: clear events_b mask to 0x0000000000000000
1916 01:59:07.998531 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1917 01:59:08.005142 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1918 01:59:08.011804 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1919 01:59:08.018242 Chrome EC: Set WAKE mask to 0x0000000000000000
1920 01:59:08.021750 Root Device init finished in 43 msecs
1921 01:59:08.024772 PCI: 00:00.0 init
1922 01:59:08.027932 CPU TDP = 15 Watts
1923 01:59:08.028414 CPU PL1 = 15 Watts
1924 01:59:08.031295 CPU PL2 = 55 Watts
1925 01:59:08.034693 CPU PL4 = 123 Watts
1926 01:59:08.038005 PCI: 00:00.0 init finished in 8 msecs
1927 01:59:08.038489 PCI: 00:02.0 init
1928 01:59:08.041249 GMA: Found VBT in CBFS
1929 01:59:08.044602 GMA: Found valid VBT in CBFS
1930 01:59:08.051416 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1931 01:59:08.057894 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1932 01:59:08.061043 PCI: 00:02.0 init finished in 18 msecs
1933 01:59:08.064492 PCI: 00:06.0 init
1934 01:59:08.067734 Initializing PCH PCIe bridge.
1935 01:59:08.071707 PCI: 00:06.0 init finished in 3 msecs
1936 01:59:08.072189 PCI: 00:0a.0 init
1937 01:59:08.074429 PCI: 00:0a.0 init finished in 0 msecs
1938 01:59:08.077764 PCI: 00:14.0 init
1939 01:59:08.081270 PCI: 00:14.0 init finished in 0 msecs
1940 01:59:08.084480 PCI: 00:14.2 init
1941 01:59:08.087524 PCI: 00:14.2 init finished in 0 msecs
1942 01:59:08.087902 PCI: 00:15.0 init
1943 01:59:08.091103 I2C bus 0 version 0x3230302a
1944 01:59:08.094298 DW I2C bus 0 at 0x80655000 (400 KHz)
1945 01:59:08.101178 PCI: 00:15.0 init finished in 6 msecs
1946 01:59:08.101706 PCI: 00:15.1 init
1947 01:59:08.104892 I2C bus 1 version 0x3230302a
1948 01:59:08.107871 DW I2C bus 1 at 0x80656000 (400 KHz)
1949 01:59:08.111055 PCI: 00:15.1 init finished in 6 msecs
1950 01:59:08.114243 PCI: 00:15.3 init
1951 01:59:08.117823 I2C bus 3 version 0x3230302a
1952 01:59:08.120954 DW I2C bus 3 at 0x80657000 (400 KHz)
1953 01:59:08.124430 PCI: 00:15.3 init finished in 6 msecs
1954 01:59:08.127653 PCI: 00:16.0 init
1955 01:59:08.130959 PCI: 00:16.0 init finished in 0 msecs
1956 01:59:08.131442 PCI: 00:19.1 init
1957 01:59:08.134694 I2C bus 5 version 0x3230302a
1958 01:59:08.137659 DW I2C bus 5 at 0x80659000 (400 KHz)
1959 01:59:08.140816 PCI: 00:19.1 init finished in 6 msecs
1960 01:59:08.144522 PCI: 00:1f.0 init
1961 01:59:08.147636 IOAPIC: Initializing IOAPIC at 0xfec00000
1962 01:59:08.150962 IOAPIC: ID = 0x02
1963 01:59:08.154252 IOAPIC: Dumping registers
1964 01:59:08.154637 reg 0x0000: 0x02000000
1965 01:59:08.157371 reg 0x0001: 0x00770020
1966 01:59:08.160713 reg 0x0002: 0x00000000
1967 01:59:08.163659 IOAPIC: 120 interrupts
1968 01:59:08.166862 IOAPIC: Clearing IOAPIC at 0xfec00000
1969 01:59:08.170602 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1970 01:59:08.177129 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1971 01:59:08.180554 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1972 01:59:08.187046 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1973 01:59:08.191085 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1974 01:59:08.197446 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1975 01:59:08.200283 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1976 01:59:08.203849 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1977 01:59:08.210494 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1978 01:59:08.213705 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1979 01:59:08.220408 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1980 01:59:08.223529 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1981 01:59:08.230078 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1982 01:59:08.233700 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1983 01:59:08.240245 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1984 01:59:08.243544 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1985 01:59:08.246834 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1986 01:59:08.253534 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1987 01:59:08.256794 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1988 01:59:08.263413 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1989 01:59:08.266297 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1990 01:59:08.273314 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1991 01:59:08.276781 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1992 01:59:08.283157 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1993 01:59:08.286360 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1994 01:59:08.289670 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1995 01:59:08.296589 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1996 01:59:08.299989 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1997 01:59:08.306742 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1998 01:59:08.309902 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1999 01:59:08.316614 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2000 01:59:08.320140 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2001 01:59:08.326693 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2002 01:59:08.330730 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2003 01:59:08.333394 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2004 01:59:08.339922 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2005 01:59:08.343326 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2006 01:59:08.349788 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2007 01:59:08.353133 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2008 01:59:08.359989 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2009 01:59:08.362976 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2010 01:59:08.369514 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2011 01:59:08.373039 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2012 01:59:08.376311 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2013 01:59:08.382856 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2014 01:59:08.385859 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2015 01:59:08.393045 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2016 01:59:08.395877 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2017 01:59:08.402678 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2018 01:59:08.405757 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2019 01:59:08.412869 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2020 01:59:08.416046 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2021 01:59:08.419325 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2022 01:59:08.426092 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2023 01:59:08.429282 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2024 01:59:08.435882 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2025 01:59:08.439240 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2026 01:59:08.446310 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2027 01:59:08.449253 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2028 01:59:08.452529 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2029 01:59:08.459526 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2030 01:59:08.462419 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2031 01:59:08.468745 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2032 01:59:08.472395 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2033 01:59:08.479130 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2034 01:59:08.482287 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2035 01:59:08.488981 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2036 01:59:08.492506 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2037 01:59:08.495791 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2038 01:59:08.502518 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2039 01:59:08.505862 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2040 01:59:08.512298 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2041 01:59:08.515603 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2042 01:59:08.522457 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2043 01:59:08.525939 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2044 01:59:08.532285 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2045 01:59:08.535746 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2046 01:59:08.539166 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2047 01:59:08.545845 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2048 01:59:08.549117 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2049 01:59:08.555714 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2050 01:59:08.558761 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2051 01:59:08.565375 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2052 01:59:08.569410 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2053 01:59:08.575666 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2054 01:59:08.578883 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2055 01:59:08.581923 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2056 01:59:08.588607 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2057 01:59:08.591969 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2058 01:59:08.598804 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2059 01:59:08.601855 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2060 01:59:08.608697 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2061 01:59:08.612118 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2062 01:59:08.618739 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2063 01:59:08.622248 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2064 01:59:08.625299 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2065 01:59:08.631664 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2066 01:59:08.635223 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2067 01:59:08.641894 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2068 01:59:08.644929 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2069 01:59:08.651818 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2070 01:59:08.655109 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2071 01:59:08.661913 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2072 01:59:08.665271 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2073 01:59:08.668686 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2074 01:59:08.675093 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2075 01:59:08.678935 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2076 01:59:08.685167 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2077 01:59:08.687957 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2078 01:59:08.695002 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2079 01:59:08.698408 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2080 01:59:08.704955 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2081 01:59:08.708429 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2082 01:59:08.711801 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2083 01:59:08.718134 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2084 01:59:08.721685 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2085 01:59:08.728589 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2086 01:59:08.731362 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2087 01:59:08.738412 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2088 01:59:08.741453 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2089 01:59:08.744826 IOAPIC: Bootstrap Processor Local APIC = 0x00
2090 01:59:08.751200 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2091 01:59:08.754233 PCI: 00:1f.0 init finished in 607 msecs
2092 01:59:08.757888 PCI: 00:1f.2 init
2093 01:59:08.761605 apm_control: Disabling ACPI.
2094 01:59:08.764683 APMC done.
2095 01:59:08.768201 PCI: 00:1f.2 init finished in 6 msecs
2096 01:59:08.768712 PCI: 00:1f.3 init
2097 01:59:08.771461 PCI: 00:1f.3 init finished in 0 msecs
2098 01:59:08.774642 PCI: 01:00.0 init
2099 01:59:08.777842 PCI: 01:00.0 init finished in 0 msecs
2100 01:59:08.781541 PNP: 0c09.0 init
2101 01:59:08.784809 Google Chrome EC uptime: 12.245 seconds
2102 01:59:08.787989 Google Chrome AP resets since EC boot: 1
2103 01:59:08.794801 Google Chrome most recent AP reset causes:
2104 01:59:08.798480 0.341: 32775 shutdown: entering G3
2105 01:59:08.804775 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2106 01:59:08.808025 PNP: 0c09.0 init finished in 23 msecs
2107 01:59:08.808508 GENERIC: 0.0 init
2108 01:59:08.814676 GENERIC: 0.0 init finished in 0 msecs
2109 01:59:08.815159 GENERIC: 1.0 init
2110 01:59:08.817943 GENERIC: 1.0 init finished in 0 msecs
2111 01:59:08.821352 Devices initialized
2112 01:59:08.824772 Show all devs... After init.
2113 01:59:08.825283 Root Device: enabled 1
2114 01:59:08.827893 CPU_CLUSTER: 0: enabled 1
2115 01:59:08.831055 DOMAIN: 0000: enabled 1
2116 01:59:08.834781 GPIO: 0: enabled 1
2117 01:59:08.835263 PCI: 00:00.0: enabled 1
2118 01:59:08.837864 PCI: 00:01.0: enabled 0
2119 01:59:08.841030 PCI: 00:01.1: enabled 0
2120 01:59:08.844554 PCI: 00:02.0: enabled 1
2121 01:59:08.845032 PCI: 00:04.0: enabled 1
2122 01:59:08.847867 PCI: 00:05.0: enabled 0
2123 01:59:08.851250 PCI: 00:06.0: enabled 1
2124 01:59:08.851726 PCI: 00:06.2: enabled 0
2125 01:59:08.854151 PCI: 00:07.0: enabled 0
2126 01:59:08.857631 PCI: 00:07.1: enabled 0
2127 01:59:08.861067 PCI: 00:07.2: enabled 0
2128 01:59:08.861598 PCI: 00:07.3: enabled 0
2129 01:59:08.864258 PCI: 00:08.0: enabled 0
2130 01:59:08.867670 PCI: 00:09.0: enabled 0
2131 01:59:08.871095 PCI: 00:0a.0: enabled 1
2132 01:59:08.871575 PCI: 00:0d.0: enabled 1
2133 01:59:08.874277 PCI: 00:0d.1: enabled 0
2134 01:59:08.877664 PCI: 00:0d.2: enabled 0
2135 01:59:08.880774 PCI: 00:0d.3: enabled 0
2136 01:59:08.881150 PCI: 00:0e.0: enabled 0
2137 01:59:08.884454 PCI: 00:10.0: enabled 0
2138 01:59:08.887553 PCI: 00:10.1: enabled 0
2139 01:59:08.890800 PCI: 00:10.6: enabled 0
2140 01:59:08.891189 PCI: 00:10.7: enabled 0
2141 01:59:08.894166 PCI: 00:12.0: enabled 0
2142 01:59:08.897509 PCI: 00:12.6: enabled 0
2143 01:59:08.898008 PCI: 00:12.7: enabled 0
2144 01:59:08.901082 PCI: 00:13.0: enabled 0
2145 01:59:08.904221 PCI: 00:14.0: enabled 1
2146 01:59:08.907836 PCI: 00:14.1: enabled 0
2147 01:59:08.908319 PCI: 00:14.2: enabled 1
2148 01:59:08.910631 PCI: 00:14.3: enabled 1
2149 01:59:08.914334 PCI: 00:15.0: enabled 1
2150 01:59:08.917669 PCI: 00:15.1: enabled 1
2151 01:59:08.918156 PCI: 00:15.2: enabled 0
2152 01:59:08.920713 PCI: 00:15.3: enabled 1
2153 01:59:08.924233 PCI: 00:16.0: enabled 1
2154 01:59:08.927709 PCI: 00:16.1: enabled 0
2155 01:59:08.928194 PCI: 00:16.2: enabled 0
2156 01:59:08.930822 PCI: 00:16.3: enabled 0
2157 01:59:08.933917 PCI: 00:16.4: enabled 0
2158 01:59:08.934305 PCI: 00:16.5: enabled 0
2159 01:59:08.937630 PCI: 00:17.0: enabled 0
2160 01:59:08.940963 PCI: 00:19.0: enabled 0
2161 01:59:08.944217 PCI: 00:19.1: enabled 1
2162 01:59:08.944700 PCI: 00:19.2: enabled 0
2163 01:59:08.947406 PCI: 00:1a.0: enabled 0
2164 01:59:08.950794 PCI: 00:1c.0: enabled 0
2165 01:59:08.954134 PCI: 00:1c.1: enabled 0
2166 01:59:08.954613 PCI: 00:1c.2: enabled 0
2167 01:59:08.957096 PCI: 00:1c.3: enabled 0
2168 01:59:08.960819 PCI: 00:1c.4: enabled 0
2169 01:59:08.963923 PCI: 00:1c.5: enabled 0
2170 01:59:08.964408 PCI: 00:1c.6: enabled 0
2171 01:59:08.967547 PCI: 00:1c.7: enabled 0
2172 01:59:08.970622 PCI: 00:1d.0: enabled 0
2173 01:59:08.973874 PCI: 00:1d.1: enabled 0
2174 01:59:08.974257 PCI: 00:1d.2: enabled 0
2175 01:59:08.977354 PCI: 00:1d.3: enabled 0
2176 01:59:08.980423 PCI: 00:1e.0: enabled 1
2177 01:59:08.980815 PCI: 00:1e.1: enabled 0
2178 01:59:08.983991 PCI: 00:1e.2: enabled 0
2179 01:59:08.987044 PCI: 00:1e.3: enabled 1
2180 01:59:08.990520 PCI: 00:1f.0: enabled 1
2181 01:59:08.990996 PCI: 00:1f.1: enabled 0
2182 01:59:08.994340 PCI: 00:1f.2: enabled 1
2183 01:59:08.997252 PCI: 00:1f.3: enabled 1
2184 01:59:09.000719 PCI: 00:1f.4: enabled 0
2185 01:59:09.001238 PCI: 00:1f.5: enabled 1
2186 01:59:09.003952 PCI: 00:1f.6: enabled 0
2187 01:59:09.007277 PCI: 00:1f.7: enabled 0
2188 01:59:09.010400 GENERIC: 0.0: enabled 1
2189 01:59:09.010792 GENERIC: 0.0: enabled 1
2190 01:59:09.013822 GENERIC: 1.0: enabled 1
2191 01:59:09.017090 GENERIC: 0.0: enabled 1
2192 01:59:09.017800 GENERIC: 1.0: enabled 1
2193 01:59:09.020599 USB0 port 0: enabled 1
2194 01:59:09.023992 USB0 port 0: enabled 1
2195 01:59:09.027531 GENERIC: 0.0: enabled 1
2196 01:59:09.028023 I2C: 00:1a: enabled 1
2197 01:59:09.030801 I2C: 00:31: enabled 1
2198 01:59:09.033876 I2C: 00:32: enabled 1
2199 01:59:09.034371 I2C: 00:50: enabled 1
2200 01:59:09.037149 I2C: 00:10: enabled 1
2201 01:59:09.040727 I2C: 00:15: enabled 1
2202 01:59:09.041252 I2C: 00:2c: enabled 1
2203 01:59:09.043926 GENERIC: 0.0: enabled 1
2204 01:59:09.047089 SPI: 00: enabled 1
2205 01:59:09.047580 PNP: 0c09.0: enabled 1
2206 01:59:09.050576 GENERIC: 0.0: enabled 1
2207 01:59:09.053782 USB3 port 0: enabled 1
2208 01:59:09.057073 USB3 port 1: enabled 0
2209 01:59:09.057604 USB3 port 2: enabled 1
2210 01:59:09.060496 USB3 port 3: enabled 0
2211 01:59:09.063553 USB2 port 0: enabled 1
2212 01:59:09.064035 USB2 port 1: enabled 0
2213 01:59:09.066777 USB2 port 2: enabled 1
2214 01:59:09.070103 USB2 port 3: enabled 0
2215 01:59:09.070502 USB2 port 4: enabled 0
2216 01:59:09.073598 USB2 port 5: enabled 1
2217 01:59:09.077070 USB2 port 6: enabled 0
2218 01:59:09.080246 USB2 port 7: enabled 0
2219 01:59:09.080636 USB2 port 8: enabled 1
2220 01:59:09.084023 USB2 port 9: enabled 1
2221 01:59:09.087220 USB3 port 0: enabled 1
2222 01:59:09.087786 USB3 port 1: enabled 0
2223 01:59:09.090265 USB3 port 2: enabled 0
2224 01:59:09.093434 USB3 port 3: enabled 0
2225 01:59:09.097019 GENERIC: 0.0: enabled 1
2226 01:59:09.097557 GENERIC: 1.0: enabled 1
2227 01:59:09.100210 APIC: 00: enabled 1
2228 01:59:09.103444 APIC: 14: enabled 1
2229 01:59:09.103837 APIC: 16: enabled 1
2230 01:59:09.106548 APIC: 10: enabled 1
2231 01:59:09.106963 APIC: 12: enabled 1
2232 01:59:09.109855 APIC: 01: enabled 1
2233 01:59:09.113398 APIC: 08: enabled 1
2234 01:59:09.113909 APIC: 09: enabled 1
2235 01:59:09.116632 PCI: 01:00.0: enabled 1
2236 01:59:09.123393 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2237 01:59:09.127138 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2238 01:59:09.129856 ELOG: NV offset 0xf20000 size 0x4000
2239 01:59:09.137896 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2240 01:59:09.144717 ELOG: Event(17) added with size 13 at 2023-08-17 01:59:19 UTC
2241 01:59:09.151283 ELOG: Event(9E) added with size 10 at 2023-08-17 01:59:19 UTC
2242 01:59:09.157853 ELOG: Event(9F) added with size 14 at 2023-08-17 01:59:20 UTC
2243 01:59:09.164558 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2244 01:59:09.171122 ELOG: Event(A0) added with size 9 at 2023-08-17 01:59:20 UTC
2245 01:59:09.174365 elog_add_boot_reason: Logged dev mode boot
2246 01:59:09.180505 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2247 01:59:09.184393 Finalize devices...
2248 01:59:09.184881 PCI: 00:16.0 final
2249 01:59:09.187088 PCI: 00:1f.2 final
2250 01:59:09.187478 GENERIC: 0.0 final
2251 01:59:09.193941 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2252 01:59:09.197591 GENERIC: 1.0 final
2253 01:59:09.204789 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2254 01:59:09.205325 Devices finalized
2255 01:59:09.210726 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2256 01:59:09.214111 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2257 01:59:09.220753 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2258 01:59:09.227511 ME: HFSTS1 : 0x90000245
2259 01:59:09.231114 ME: HFSTS2 : 0x82100116
2260 01:59:09.234105 ME: HFSTS3 : 0x00000050
2261 01:59:09.240885 ME: HFSTS4 : 0x00004000
2262 01:59:09.243719 ME: HFSTS5 : 0x00000000
2263 01:59:09.247261 ME: HFSTS6 : 0x40600006
2264 01:59:09.250548 ME: Manufacturing Mode : NO
2265 01:59:09.256642 ME: SPI Protection Mode Enabled : YES
2266 01:59:09.260414 ME: FPFs Committed : YES
2267 01:59:09.263635 ME: Manufacturing Vars Locked : YES
2268 01:59:09.266927 ME: FW Partition Table : OK
2269 01:59:09.270362 ME: Bringup Loader Failure : NO
2270 01:59:09.273562 ME: Firmware Init Complete : YES
2271 01:59:09.276808 ME: Boot Options Present : NO
2272 01:59:09.283753 ME: Update In Progress : NO
2273 01:59:09.286753 ME: D0i3 Support : YES
2274 01:59:09.289922 ME: Low Power State Enabled : NO
2275 01:59:09.293786 ME: CPU Replaced : YES
2276 01:59:09.296592 ME: CPU Replacement Valid : YES
2277 01:59:09.300288 ME: Current Working State : 5
2278 01:59:09.303466 ME: Current Operation State : 1
2279 01:59:09.306973 ME: Current Operation Mode : 0
2280 01:59:09.310105 ME: Error Code : 0
2281 01:59:09.316988 ME: Enhanced Debug Mode : NO
2282 01:59:09.320207 ME: CPU Debug Disabled : YES
2283 01:59:09.323543 ME: TXT Support : NO
2284 01:59:09.326837 ME: WP for RO is enabled : YES
2285 01:59:09.333716 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2286 01:59:09.339927 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2287 01:59:09.343388 Ramoops buffer: 0x100000@0x76899000.
2288 01:59:09.349977 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2289 01:59:09.356634 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2290 01:59:09.359717 CBFS: 'fallback/slic' not found.
2291 01:59:09.363044 ACPI: Writing ACPI tables at 7686d000.
2292 01:59:09.366624 ACPI: * FACS
2293 01:59:09.367106 ACPI: * DSDT
2294 01:59:09.373114 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2295 01:59:09.376708 ACPI: * FADT
2296 01:59:09.377189 SCI is IRQ9
2297 01:59:09.383477 ACPI: added table 1/32, length now 40
2298 01:59:09.384074 ACPI: * SSDT
2299 01:59:09.389299 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2300 01:59:09.393273 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2301 01:59:09.399844 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2302 01:59:09.403126 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2303 01:59:09.410619 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2304 01:59:09.413083 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2305 01:59:09.419674 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2306 01:59:09.426455 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2307 01:59:09.429721 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2308 01:59:09.436593 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2309 01:59:09.439593 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2310 01:59:09.446217 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2311 01:59:09.449591 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2312 01:59:09.456103 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2313 01:59:09.462842 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2314 01:59:09.466215 PS2K: Passing 80 keymaps to kernel
2315 01:59:09.472664 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2316 01:59:09.479641 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2317 01:59:09.485770 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2318 01:59:09.492640 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2319 01:59:09.496045 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2320 01:59:09.502311 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2321 01:59:09.509134 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2322 01:59:09.515509 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2323 01:59:09.522381 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2324 01:59:09.529333 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2325 01:59:09.532611 ACPI: added table 2/32, length now 44
2326 01:59:09.535968 ACPI: * MCFG
2327 01:59:09.539219 ACPI: added table 3/32, length now 48
2328 01:59:09.539708 ACPI: * TPM2
2329 01:59:09.542500 TPM2 log created at 0x7685d000
2330 01:59:09.545946 ACPI: added table 4/32, length now 52
2331 01:59:09.548978 ACPI: * LPIT
2332 01:59:09.552358 ACPI: added table 5/32, length now 56
2333 01:59:09.555702 ACPI: * MADT
2334 01:59:09.556192 SCI is IRQ9
2335 01:59:09.559426 ACPI: added table 6/32, length now 60
2336 01:59:09.562439 cmd_reg from pmc_make_ipc_cmd 1052838
2337 01:59:09.569069 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2338 01:59:09.575487 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2339 01:59:09.582120 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2340 01:59:09.585439 PMC CrashLog size in discovery mode: 0xC00
2341 01:59:09.588638 cpu crashlog bar addr: 0x80640000
2342 01:59:09.592441 cpu discovery table offset: 0x6030
2343 01:59:09.598775 cpu_crashlog_discovery_table buffer count: 0x3
2344 01:59:09.601857 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2345 01:59:09.612899 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2346 01:59:09.618341 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2347 01:59:09.621527 PMC crashLog size in discovery mode : 0xC00
2348 01:59:09.628659 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2349 01:59:09.631845 discover mode PMC crashlog size adjusted to: 0x200
2350 01:59:09.638544 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2351 01:59:09.644813 discover mode PMC crashlog size adjusted to: 0x0
2352 01:59:09.648501 m_cpu_crashLog_size : 0x3480 bytes
2353 01:59:09.651976 CPU crashLog present.
2354 01:59:09.655215 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2355 01:59:09.661841 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2356 01:59:09.665283 current = 76876550
2357 01:59:09.665823 ACPI: * DMAR
2358 01:59:09.671755 ACPI: added table 7/32, length now 64
2359 01:59:09.675188 ACPI: added table 8/32, length now 68
2360 01:59:09.675684 ACPI: * HPET
2361 01:59:09.678384 ACPI: added table 9/32, length now 72
2362 01:59:09.681616 ACPI: done.
2363 01:59:09.684953 ACPI tables: 38528 bytes.
2364 01:59:09.688542 smbios_write_tables: 76857000
2365 01:59:09.691669 EC returned error result code 3
2366 01:59:09.695245 Couldn't obtain OEM name from CBI
2367 01:59:09.698510 Create SMBIOS type 16
2368 01:59:09.699007 Create SMBIOS type 17
2369 01:59:09.701899 Create SMBIOS type 20
2370 01:59:09.704947 GENERIC: 0.0 (WIFI Device)
2371 01:59:09.708135 SMBIOS tables: 2156 bytes.
2372 01:59:09.712000 Writing table forward entry at 0x00000500
2373 01:59:09.718358 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2374 01:59:09.721291 Writing coreboot table at 0x76891000
2375 01:59:09.728636 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2376 01:59:09.731872 1. 0000000000001000-000000000009ffff: RAM
2377 01:59:09.738680 2. 00000000000a0000-00000000000fffff: RESERVED
2378 01:59:09.741175 3. 0000000000100000-0000000076856fff: RAM
2379 01:59:09.748437 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2380 01:59:09.751660 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2381 01:59:09.758009 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2382 01:59:09.761480 7. 0000000077000000-00000000803fffff: RESERVED
2383 01:59:09.768356 8. 00000000c0000000-00000000cfffffff: RESERVED
2384 01:59:09.771419 9. 00000000f8000000-00000000f9ffffff: RESERVED
2385 01:59:09.778225 10. 00000000fb000000-00000000fb000fff: RESERVED
2386 01:59:09.781917 11. 00000000fc800000-00000000fe7fffff: RESERVED
2387 01:59:09.787972 12. 00000000feb00000-00000000feb7ffff: RESERVED
2388 01:59:09.791462 13. 00000000fec00000-00000000fecfffff: RESERVED
2389 01:59:09.794984 14. 00000000fed40000-00000000fed6ffff: RESERVED
2390 01:59:09.801337 15. 00000000fed80000-00000000fed87fff: RESERVED
2391 01:59:09.804671 16. 00000000fed90000-00000000fed92fff: RESERVED
2392 01:59:09.811656 17. 00000000feda0000-00000000feda1fff: RESERVED
2393 01:59:09.814575 18. 00000000fedc0000-00000000feddffff: RESERVED
2394 01:59:09.821341 19. 0000000100000000-000000027fbfffff: RAM
2395 01:59:09.821732 Passing 4 GPIOs to payload:
2396 01:59:09.827876 NAME | PORT | POLARITY | VALUE
2397 01:59:09.834793 lid | undefined | high | high
2398 01:59:09.837917 power | undefined | high | low
2399 01:59:09.844599 oprom | undefined | high | low
2400 01:59:09.847720 EC in RW | 0x00000151 | high | high
2401 01:59:09.850973 Board ID: 3
2402 01:59:09.851467 FW config: 0x131
2403 01:59:09.857568 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum c11c
2404 01:59:09.860763 coreboot table: 1748 bytes.
2405 01:59:09.864604 IMD ROOT 0. 0x76fff000 0x00001000
2406 01:59:09.867686 IMD SMALL 1. 0x76ffe000 0x00001000
2407 01:59:09.870568 FSP MEMORY 2. 0x76afe000 0x00500000
2408 01:59:09.877597 CONSOLE 3. 0x76ade000 0x00020000
2409 01:59:09.880502 RW MCACHE 4. 0x76add000 0x0000043c
2410 01:59:09.883893 RO MCACHE 5. 0x76adc000 0x00000fd8
2411 01:59:09.887472 FMAP 6. 0x76adb000 0x0000064a
2412 01:59:09.890605 TIME STAMP 7. 0x76ada000 0x00000910
2413 01:59:09.894419 VBOOT WORK 8. 0x76ac6000 0x00014000
2414 01:59:09.897280 MEM INFO 9. 0x76ac5000 0x000003b8
2415 01:59:09.900675 ROMSTG STCK10. 0x76ac4000 0x00001000
2416 01:59:09.907403 AFTER CAR 11. 0x76ab8000 0x0000c000
2417 01:59:09.910737 RAMSTAGE 12. 0x76a2e000 0x0008a000
2418 01:59:09.913987 ACPI BERT 13. 0x76a1e000 0x00010000
2419 01:59:09.916825 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2420 01:59:09.920471 REFCODE 15. 0x769ae000 0x0006f000
2421 01:59:09.923520 SMM BACKUP 16. 0x7699e000 0x00010000
2422 01:59:09.927041 IGD OPREGION17. 0x76999000 0x00004203
2423 01:59:09.934010 RAMOOPS 18. 0x76899000 0x00100000
2424 01:59:09.937184 COREBOOT 19. 0x76891000 0x00008000
2425 01:59:09.940215 ACPI 20. 0x7686d000 0x00024000
2426 01:59:09.944105 TPM2 TCGLOG21. 0x7685d000 0x00010000
2427 01:59:09.946996 PMC CRASHLOG22. 0x7685c000 0x00000c00
2428 01:59:09.950508 CPU CRASHLOG23. 0x76858000 0x00003480
2429 01:59:09.953749 SMBIOS 24. 0x76857000 0x00001000
2430 01:59:09.956945 IMD small region:
2431 01:59:09.960018 IMD ROOT 0. 0x76ffec00 0x00000400
2432 01:59:09.963945 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2433 01:59:09.966939 POWER STATE 2. 0x76ffeb80 0x00000044
2434 01:59:09.973330 ROMSTAGE 3. 0x76ffeb60 0x00000004
2435 01:59:09.976909 ACPI GNVS 4. 0x76ffeb00 0x00000048
2436 01:59:09.979955 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2437 01:59:09.986977 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2438 01:59:09.989949 MTRR: Physical address space:
2439 01:59:09.996386 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2440 01:59:10.000011 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2441 01:59:10.006533 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2442 01:59:10.012838 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2443 01:59:10.020343 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2444 01:59:10.026420 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2445 01:59:10.033156 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2446 01:59:10.036445 MTRR: Fixed MSR 0x250 0x0606060606060606
2447 01:59:10.039914 MTRR: Fixed MSR 0x258 0x0606060606060606
2448 01:59:10.046345 MTRR: Fixed MSR 0x259 0x0000000000000000
2449 01:59:10.049800 MTRR: Fixed MSR 0x268 0x0606060606060606
2450 01:59:10.052854 MTRR: Fixed MSR 0x269 0x0606060606060606
2451 01:59:10.056219 MTRR: Fixed MSR 0x26a 0x0606060606060606
2452 01:59:10.063087 MTRR: Fixed MSR 0x26b 0x0606060606060606
2453 01:59:10.066407 MTRR: Fixed MSR 0x26c 0x0606060606060606
2454 01:59:10.069729 MTRR: Fixed MSR 0x26d 0x0606060606060606
2455 01:59:10.073295 MTRR: Fixed MSR 0x26e 0x0606060606060606
2456 01:59:10.079492 MTRR: Fixed MSR 0x26f 0x0606060606060606
2457 01:59:10.082810 call enable_fixed_mtrr()
2458 01:59:10.086179 CPU physical address size: 39 bits
2459 01:59:10.089272 MTRR: default type WB/UC MTRR counts: 6/6.
2460 01:59:10.092857 MTRR: UC selected as default type.
2461 01:59:10.099735 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2462 01:59:10.106212 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2463 01:59:10.112692 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2464 01:59:10.119515 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2465 01:59:10.126099 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2466 01:59:10.128805 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2467 01:59:10.137037 MTRR: Fixed MSR 0x250 0x0606060606060606
2468 01:59:10.140197 MTRR: Fixed MSR 0x258 0x0606060606060606
2469 01:59:10.143836 MTRR: Fixed MSR 0x259 0x0000000000000000
2470 01:59:10.147259 MTRR: Fixed MSR 0x268 0x0606060606060606
2471 01:59:10.154041 MTRR: Fixed MSR 0x269 0x0606060606060606
2472 01:59:10.156812 MTRR: Fixed MSR 0x26a 0x0606060606060606
2473 01:59:10.160030 MTRR: Fixed MSR 0x26b 0x0606060606060606
2474 01:59:10.163172 MTRR: Fixed MSR 0x26c 0x0606060606060606
2475 01:59:10.170074 MTRR: Fixed MSR 0x26d 0x0606060606060606
2476 01:59:10.173044 MTRR: Fixed MSR 0x26e 0x0606060606060606
2477 01:59:10.176797 MTRR: Fixed MSR 0x26f 0x0606060606060606
2478 01:59:10.180474 MTRR: Fixed MSR 0x250 0x0606060606060606
2479 01:59:10.187235 MTRR: Fixed MSR 0x250 0x0606060606060606
2480 01:59:10.190311 MTRR: Fixed MSR 0x250 0x0606060606060606
2481 01:59:10.193322 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 01:59:10.196720 MTRR: Fixed MSR 0x258 0x0606060606060606
2483 01:59:10.200303 MTRR: Fixed MSR 0x259 0x0000000000000000
2484 01:59:10.207126 MTRR: Fixed MSR 0x268 0x0606060606060606
2485 01:59:10.210290 MTRR: Fixed MSR 0x269 0x0606060606060606
2486 01:59:10.213957 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 01:59:10.217015 MTRR: Fixed MSR 0x258 0x0606060606060606
2488 01:59:10.223786 MTRR: Fixed MSR 0x259 0x0000000000000000
2489 01:59:10.226996 MTRR: Fixed MSR 0x268 0x0606060606060606
2490 01:59:10.230223 MTRR: Fixed MSR 0x269 0x0606060606060606
2491 01:59:10.233345 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 01:59:10.240119 MTRR: Fixed MSR 0x258 0x0606060606060606
2493 01:59:10.243021 MTRR: Fixed MSR 0x259 0x0000000000000000
2494 01:59:10.246745 MTRR: Fixed MSR 0x268 0x0606060606060606
2495 01:59:10.249708 MTRR: Fixed MSR 0x269 0x0606060606060606
2496 01:59:10.256617 MTRR: Fixed MSR 0x26a 0x0606060606060606
2497 01:59:10.259888 MTRR: Fixed MSR 0x26b 0x0606060606060606
2498 01:59:10.263214 MTRR: Fixed MSR 0x26c 0x0606060606060606
2499 01:59:10.266493 MTRR: Fixed MSR 0x26d 0x0606060606060606
2500 01:59:10.272868 MTRR: Fixed MSR 0x26e 0x0606060606060606
2501 01:59:10.276371 MTRR: Fixed MSR 0x26f 0x0606060606060606
2502 01:59:10.279713 MTRR: Fixed MSR 0x26a 0x0606060606060606
2503 01:59:10.283340 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 01:59:10.286596 call enable_fixed_mtrr()
2505 01:59:10.290069 MTRR: Fixed MSR 0x26a 0x0606060606060606
2506 01:59:10.292911 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 01:59:10.299634 MTRR: Fixed MSR 0x268 0x0606060606060606
2508 01:59:10.303049 MTRR: Fixed MSR 0x269 0x0606060606060606
2509 01:59:10.306314 MTRR: Fixed MSR 0x26a 0x0606060606060606
2510 01:59:10.309616 MTRR: Fixed MSR 0x26b 0x0606060606060606
2511 01:59:10.316464 MTRR: Fixed MSR 0x26c 0x0606060606060606
2512 01:59:10.319479 MTRR: Fixed MSR 0x26d 0x0606060606060606
2513 01:59:10.322944 MTRR: Fixed MSR 0x26e 0x0606060606060606
2514 01:59:10.326436 MTRR: Fixed MSR 0x26f 0x0606060606060606
2515 01:59:10.329690 call enable_fixed_mtrr()
2516 01:59:10.333086 call enable_fixed_mtrr()
2517 01:59:10.336022 CPU physical address size: 39 bits
2518 01:59:10.339579 MTRR: Fixed MSR 0x258 0x0606060606060606
2519 01:59:10.342617 MTRR: Fixed MSR 0x26b 0x0606060606060606
2520 01:59:10.349836 MTRR: Fixed MSR 0x26b 0x0606060606060606
2521 01:59:10.352738 MTRR: Fixed MSR 0x26c 0x0606060606060606
2522 01:59:10.356450 MTRR: Fixed MSR 0x26d 0x0606060606060606
2523 01:59:10.359355 MTRR: Fixed MSR 0x26e 0x0606060606060606
2524 01:59:10.366091 MTRR: Fixed MSR 0x26f 0x0606060606060606
2525 01:59:10.369315 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 01:59:10.372555 call enable_fixed_mtrr()
2527 01:59:10.375800 CPU physical address size: 39 bits
2528 01:59:10.379458 CPU physical address size: 39 bits
2529 01:59:10.382696 MTRR: Fixed MSR 0x268 0x0606060606060606
2530 01:59:10.385989 CPU physical address size: 39 bits
2531 01:59:10.389440 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 01:59:10.392433 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 01:59:10.399431 MTRR: Fixed MSR 0x26a 0x0606060606060606
2534 01:59:10.402504 MTRR: Fixed MSR 0x26b 0x0606060606060606
2535 01:59:10.405923 MTRR: Fixed MSR 0x26c 0x0606060606060606
2536 01:59:10.409183 MTRR: Fixed MSR 0x26d 0x0606060606060606
2537 01:59:10.415930 MTRR: Fixed MSR 0x26e 0x0606060606060606
2538 01:59:10.418815 MTRR: Fixed MSR 0x26f 0x0606060606060606
2539 01:59:10.422358 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 01:59:10.425621 call enable_fixed_mtrr()
2541 01:59:10.428855 MTRR: Fixed MSR 0x259 0x0000000000000000
2542 01:59:10.432288 MTRR: Fixed MSR 0x268 0x0606060606060606
2543 01:59:10.439029 MTRR: Fixed MSR 0x269 0x0606060606060606
2544 01:59:10.442300 CPU physical address size: 39 bits
2545 01:59:10.445704 MTRR: Fixed MSR 0x26a 0x0606060606060606
2546 01:59:10.448552 MTRR: Fixed MSR 0x26d 0x0606060606060606
2547 01:59:10.451872 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 01:59:10.458966 MTRR: Fixed MSR 0x26c 0x0606060606060606
2549 01:59:10.461957 MTRR: Fixed MSR 0x26d 0x0606060606060606
2550 01:59:10.465320 MTRR: Fixed MSR 0x26e 0x0606060606060606
2551 01:59:10.469089 MTRR: Fixed MSR 0x26f 0x0606060606060606
2552 01:59:10.474958 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 01:59:10.478563 call enable_fixed_mtrr()
2554 01:59:10.481840 MTRR: Fixed MSR 0x26f 0x0606060606060606
2555 01:59:10.484736 CPU physical address size: 39 bits
2556 01:59:10.488357 call enable_fixed_mtrr()
2557 01:59:10.491426 CPU physical address size: 39 bits
2558 01:59:10.495372
2559 01:59:10.495831 MTRR check
2560 01:59:10.498713 Fixed MTRRs : Enabled
2561 01:59:10.499197 Variable MTRRs: Enabled
2562 01:59:10.499471
2563 01:59:10.504745 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2564 01:59:10.508499 Checking cr50 for pending updates
2565 01:59:10.521294 Reading cr50 TPM mode
2566 01:59:10.536185 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2567 01:59:10.546019 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2568 01:59:10.548934 Checking segment from ROM address 0xf96cbe6c
2569 01:59:10.552817 Checking segment from ROM address 0xf96cbe88
2570 01:59:10.559276 Loading segment from ROM address 0xf96cbe6c
2571 01:59:10.559767 code (compression=1)
2572 01:59:10.568764 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2573 01:59:10.579014 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2574 01:59:10.579544 using LZMA
2575 01:59:10.601339 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2576 01:59:10.608200 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2577 01:59:10.616319 Loading segment from ROM address 0xf96cbe88
2578 01:59:10.619521 Entry Point 0x30000000
2579 01:59:10.619962 Loaded segments
2580 01:59:10.625925 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2581 01:59:10.632568 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2582 01:59:10.635852 Finalizing chipset.
2583 01:59:10.639437 apm_control: Finalizing SMM.
2584 01:59:10.639932 APMC done.
2585 01:59:10.642762 HECI: CSE device 16.1 is disabled
2586 01:59:10.646369 HECI: CSE device 16.2 is disabled
2587 01:59:10.649095 HECI: CSE device 16.3 is disabled
2588 01:59:10.652807 HECI: CSE device 16.4 is disabled
2589 01:59:10.655733 HECI: CSE device 16.5 is disabled
2590 01:59:10.659280 HECI: Sending End-of-Post
2591 01:59:10.667733 CSE: EOP requested action: continue boot
2592 01:59:10.671214 CSE EOP successful, continuing boot
2593 01:59:10.677811 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2594 01:59:10.680922 mp_park_aps done after 0 msecs.
2595 01:59:10.684453 Jumping to boot code at 0x30000000(0x76891000)
2596 01:59:10.694278 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2597 01:59:10.698494
2598 01:59:10.699002
2599 01:59:10.699288
2600 01:59:10.701448 Starting depthcharge on Volmar...
2601 01:59:10.701833
2602 01:59:10.703077 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2603 01:59:10.703485 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2604 01:59:10.703809 Setting prompt string to ['brya:']
2605 01:59:10.704105 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2606 01:59:10.708299 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2607 01:59:10.708798
2608 01:59:10.714883 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2609 01:59:10.715379
2610 01:59:10.721544 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2611 01:59:10.722027
2612 01:59:10.724952 configure_storage: Failed to remap 1C:2
2613 01:59:10.725481
2614 01:59:10.728328 Wipe memory regions:
2615 01:59:10.728824
2616 01:59:10.731487 [0x00000000001000, 0x000000000a0000)
2617 01:59:10.731980
2618 01:59:10.734619 [0x00000000100000, 0x00000030000000)
2619 01:59:10.840399
2620 01:59:10.843118 [0x00000032668e60, 0x00000076857000)
2621 01:59:10.990748
2622 01:59:10.993979 [0x00000100000000, 0x0000027fc00000)
2623 01:59:11.825123
2624 01:59:11.828361 ec_init: CrosEC protocol v3 supported (256, 256)
2625 01:59:12.437835
2626 01:59:12.438437 R8152: Initializing
2627 01:59:12.438776
2628 01:59:12.440826 Version 9 (ocp_data = 6010)
2629 01:59:12.441234
2630 01:59:12.444306 R8152: Done initializing
2631 01:59:12.444802
2632 01:59:12.447589 Adding net device
2633 01:59:12.748514
2634 01:59:12.751820 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2635 01:59:12.752315
2636 01:59:12.752608
2637 01:59:12.752852
2638 01:59:12.753457 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2640 01:59:12.854558 brya: tftpboot 192.168.201.1 11304541/tftp-deploy-sfrwswaz/kernel/bzImage 11304541/tftp-deploy-sfrwswaz/kernel/cmdline 11304541/tftp-deploy-sfrwswaz/ramdisk/ramdisk.cpio.gz
2641 01:59:12.855175 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2642 01:59:12.855583 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2643 01:59:12.860345 tftpboot 192.168.201.1 11304541/tftp-deploy-sfrwswaz/kernel/bzIploy-sfrwswaz/kernel/cmdline 11304541/tftp-deploy-sfrwswaz/ramdisk/ramdisk.cpio.gz
2644 01:59:12.860858
2645 01:59:12.861148 Waiting for link
2646 01:59:13.062788
2647 01:59:13.063277 done.
2648 01:59:13.063551
2649 01:59:13.063798 MAC: 00:e0:4c:68:03:d9
2650 01:59:13.064034
2651 01:59:13.065703 Sending DHCP discover... done.
2652 01:59:13.065997
2653 01:59:13.069254 Waiting for reply... done.
2654 01:59:13.069773
2655 01:59:13.072408 Sending DHCP request... done.
2656 01:59:13.072792
2657 01:59:13.079152 Waiting for reply... done.
2658 01:59:13.079643
2659 01:59:13.079941 My ip is 192.168.201.14
2660 01:59:13.080184
2661 01:59:13.082700 The DHCP server ip is 192.168.201.1
2662 01:59:13.085870
2663 01:59:13.089144 TFTP server IP predefined by user: 192.168.201.1
2664 01:59:13.089681
2665 01:59:13.095633 Bootfile predefined by user: 11304541/tftp-deploy-sfrwswaz/kernel/bzImage
2666 01:59:13.096103
2667 01:59:13.099064 Sending tftp read request... done.
2668 01:59:13.099390
2669 01:59:13.106577 Waiting for the transfer...
2670 01:59:13.107056
2671 01:59:13.335150 00000000 ################################################################
2672 01:59:13.335295
2673 01:59:13.561129 00080000 ################################################################
2674 01:59:13.561239
2675 01:59:13.786657 00100000 ################################################################
2676 01:59:13.786767
2677 01:59:14.012790 00180000 ################################################################
2678 01:59:14.012906
2679 01:59:14.238762 00200000 ################################################################
2680 01:59:14.238867
2681 01:59:14.464675 00280000 ################################################################
2682 01:59:14.464809
2683 01:59:14.690333 00300000 ################################################################
2684 01:59:14.690450
2685 01:59:14.915568 00380000 ################################################################
2686 01:59:14.915683
2687 01:59:15.140681 00400000 ################################################################
2688 01:59:15.140796
2689 01:59:15.367227 00480000 ################################################################
2690 01:59:15.367363
2691 01:59:15.594046 00500000 ################################################################
2692 01:59:15.594157
2693 01:59:15.819679 00580000 ################################################################
2694 01:59:15.819792
2695 01:59:16.047440 00600000 ################################################################
2696 01:59:16.047559
2697 01:59:16.274625 00680000 ################################################################
2698 01:59:16.274740
2699 01:59:16.502386 00700000 ################################################################
2700 01:59:16.502512
2701 01:59:16.727961 00780000 ################################################################
2702 01:59:16.728077
2703 01:59:16.834919 00800000 ############################## done.
2704 01:59:16.835005
2705 01:59:16.838115 The bootfile was 8634256 bytes long.
2706 01:59:16.838181
2707 01:59:16.841309 Sending tftp read request... done.
2708 01:59:16.841371
2709 01:59:16.844742 Waiting for the transfer...
2710 01:59:16.844806
2711 01:59:17.072603 00000000 ################################################################
2712 01:59:17.072721
2713 01:59:17.298203 00080000 ################################################################
2714 01:59:17.298308
2715 01:59:17.523478 00100000 ################################################################
2716 01:59:17.523641
2717 01:59:17.752580 00180000 ################################################################
2718 01:59:17.752691
2719 01:59:17.981213 00200000 ################################################################
2720 01:59:17.981340
2721 01:59:18.210083 00280000 ################################################################
2722 01:59:18.210216
2723 01:59:18.437245 00300000 ################################################################
2724 01:59:18.437410
2725 01:59:18.664427 00380000 ################################################################
2726 01:59:18.664543
2727 01:59:18.889659 00400000 ################################################################
2728 01:59:18.889773
2729 01:59:19.118866 00480000 ################################################################
2730 01:59:19.119007
2731 01:59:19.348216 00500000 ################################################################
2732 01:59:19.348340
2733 01:59:19.577213 00580000 ################################################################
2734 01:59:19.577336
2735 01:59:19.806797 00600000 ################################################################
2736 01:59:19.806904
2737 01:59:20.037969 00680000 ################################################################
2738 01:59:20.038084
2739 01:59:20.266440 00700000 ################################################################
2740 01:59:20.266559
2741 01:59:20.495232 00780000 ################################################################
2742 01:59:20.495367
2743 01:59:20.684352 00800000 ###################################################### done.
2744 01:59:20.684467
2745 01:59:20.687800 Sending tftp read request... done.
2746 01:59:20.687884
2747 01:59:20.690860 Waiting for the transfer...
2748 01:59:20.690936
2749 01:59:20.694369 00000000 # done.
2750 01:59:20.694444
2751 01:59:20.701626 Command line loaded dynamically from TFTP file: 11304541/tftp-deploy-sfrwswaz/kernel/cmdline
2752 01:59:20.704245
2753 01:59:20.717983 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2754 01:59:20.725015
2755 01:59:20.728573 Shutting down all USB controllers.
2756 01:59:20.729025
2757 01:59:20.729311 Removing current net device
2758 01:59:20.729539
2759 01:59:20.731657 Finalizing coreboot
2760 01:59:20.732088
2761 01:59:20.738277 Exiting depthcharge with code 4 at timestamp: 20333979
2762 01:59:20.738726
2763 01:59:20.738976
2764 01:59:20.739195 Starting kernel ...
2765 01:59:20.739402
2766 01:59:20.739606
2767 01:59:20.740498 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2768 01:59:20.740850 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2769 01:59:20.741124 Setting prompt string to ['Linux version [0-9]']
2770 01:59:20.741388 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2771 01:59:20.741637 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2773 02:03:51.741713 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2775 02:03:51.742524 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2777 02:03:51.743114 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2780 02:03:51.744117 end: 2 depthcharge-action (duration 00:05:00) [common]
2782 02:03:51.744936 Cleaning after the job
2783 02:03:51.745279 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/ramdisk
2784 02:03:51.746644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/kernel
2785 02:03:51.747633 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304541/tftp-deploy-sfrwswaz/modules
2786 02:03:51.747886 start: 5.1 power-off (timeout 00:00:30) [common]
2787 02:03:51.748024 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2788 02:03:51.827146 >> Command sent successfully.
2789 02:03:51.834834 Returned 0 in 0 seconds
2790 02:03:51.935868 end: 5.1 power-off (duration 00:00:00) [common]
2792 02:03:51.937101 start: 5.2 read-feedback (timeout 00:10:00) [common]
2793 02:03:51.938098 Listened to connection for namespace 'common' for up to 1s
2794 02:03:52.938993 Finalising connection for namespace 'common'
2795 02:03:52.939562 Disconnecting from shell: Finalise
2796 02:03:52.939893
2797 02:03:53.040765 end: 5.2 read-feedback (duration 00:00:01) [common]
2798 02:03:53.041345 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11304541
2799 02:03:53.054309 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11304541
2800 02:03:53.054443 JobError: Your job cannot terminate cleanly.