Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 01:58:34.430158 lava-dispatcher, installed at version: 2023.06
2 01:58:34.430372 start: 0 validate
3 01:58:34.430517 Start time: 2023-08-17 01:58:34.430509+00:00 (UTC)
4 01:58:34.430665 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:58:34.430812 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 01:58:34.683580 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:58:34.683862 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip78-rt45%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:58:37.690072 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:58:37.690804 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip78-rt45%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
10 01:58:37.955126 validate duration: 3.52
12 01:58:37.956366 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:58:37.956948 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:58:37.957434 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:58:37.958083 Not decompressing ramdisk as can be used compressed.
16 01:58:37.958579 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 01:58:37.958962 saving as /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/ramdisk/rootfs.cpio.gz
18 01:58:37.959324 total size: 8418130 (8 MB)
19 01:58:38.449929 progress 0 % (0 MB)
20 01:58:38.463918 progress 5 % (0 MB)
21 01:58:38.477041 progress 10 % (0 MB)
22 01:58:38.485543 progress 15 % (1 MB)
23 01:58:38.491276 progress 20 % (1 MB)
24 01:58:38.495911 progress 25 % (2 MB)
25 01:58:38.499980 progress 30 % (2 MB)
26 01:58:38.503380 progress 35 % (2 MB)
27 01:58:38.506622 progress 40 % (3 MB)
28 01:58:38.509742 progress 45 % (3 MB)
29 01:58:38.512540 progress 50 % (4 MB)
30 01:58:38.515217 progress 55 % (4 MB)
31 01:58:38.517719 progress 60 % (4 MB)
32 01:58:38.519943 progress 65 % (5 MB)
33 01:58:38.522202 progress 70 % (5 MB)
34 01:58:38.524454 progress 75 % (6 MB)
35 01:58:38.526648 progress 80 % (6 MB)
36 01:58:38.528846 progress 85 % (6 MB)
37 01:58:38.531011 progress 90 % (7 MB)
38 01:58:38.533218 progress 95 % (7 MB)
39 01:58:38.535294 progress 100 % (8 MB)
40 01:58:38.535519 8 MB downloaded in 0.58 s (13.93 MB/s)
41 01:58:38.535674 end: 1.1.1 http-download (duration 00:00:01) [common]
43 01:58:38.535910 end: 1.1 download-retry (duration 00:00:01) [common]
44 01:58:38.535995 start: 1.2 download-retry (timeout 00:09:59) [common]
45 01:58:38.536077 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 01:58:38.536214 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip78-rt45/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
47 01:58:38.536286 saving as /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/kernel/bzImage
48 01:58:38.536345 total size: 8634256 (8 MB)
49 01:58:38.536406 No compression specified
50 01:58:38.537594 progress 0 % (0 MB)
51 01:58:38.539891 progress 5 % (0 MB)
52 01:58:38.542198 progress 10 % (0 MB)
53 01:58:38.544496 progress 15 % (1 MB)
54 01:58:38.546869 progress 20 % (1 MB)
55 01:58:38.549345 progress 25 % (2 MB)
56 01:58:38.551790 progress 30 % (2 MB)
57 01:58:38.554128 progress 35 % (2 MB)
58 01:58:38.556346 progress 40 % (3 MB)
59 01:58:38.558629 progress 45 % (3 MB)
60 01:58:38.560905 progress 50 % (4 MB)
61 01:58:38.563102 progress 55 % (4 MB)
62 01:58:38.565498 progress 60 % (4 MB)
63 01:58:38.567710 progress 65 % (5 MB)
64 01:58:38.569971 progress 70 % (5 MB)
65 01:58:38.572153 progress 75 % (6 MB)
66 01:58:38.574359 progress 80 % (6 MB)
67 01:58:38.576517 progress 85 % (7 MB)
68 01:58:38.578852 progress 90 % (7 MB)
69 01:58:38.581143 progress 95 % (7 MB)
70 01:58:38.583469 progress 100 % (8 MB)
71 01:58:38.583642 8 MB downloaded in 0.05 s (174.11 MB/s)
72 01:58:38.583787 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:58:38.584011 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:58:38.584096 start: 1.3 download-retry (timeout 00:09:59) [common]
76 01:58:38.584180 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 01:58:38.584324 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip78-rt45/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
78 01:58:38.584395 saving as /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/modules/modules.tar
79 01:58:38.584455 total size: 256124 (0 MB)
80 01:58:38.584515 Using unxz to decompress xz
81 01:58:38.588861 progress 12 % (0 MB)
82 01:58:38.589255 progress 25 % (0 MB)
83 01:58:38.589490 progress 38 % (0 MB)
84 01:58:38.591024 progress 51 % (0 MB)
85 01:58:38.592878 progress 63 % (0 MB)
86 01:58:38.594731 progress 76 % (0 MB)
87 01:58:38.596533 progress 89 % (0 MB)
88 01:58:38.598273 progress 100 % (0 MB)
89 01:58:38.604071 0 MB downloaded in 0.02 s (12.46 MB/s)
90 01:58:38.604301 end: 1.3.1 http-download (duration 00:00:00) [common]
92 01:58:38.604556 end: 1.3 download-retry (duration 00:00:00) [common]
93 01:58:38.604650 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 01:58:38.604807 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 01:58:38.604887 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 01:58:38.604969 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 01:58:38.605186 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4
98 01:58:38.605321 makedir: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin
99 01:58:38.605427 makedir: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/tests
100 01:58:38.605528 makedir: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/results
101 01:58:38.605643 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-add-keys
102 01:58:38.605790 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-add-sources
103 01:58:38.605919 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-background-process-start
104 01:58:38.606049 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-background-process-stop
105 01:58:38.606178 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-common-functions
106 01:58:38.606302 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-echo-ipv4
107 01:58:38.606426 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-install-packages
108 01:58:38.606549 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-installed-packages
109 01:58:38.606672 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-os-build
110 01:58:38.606796 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-probe-channel
111 01:58:38.606918 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-probe-ip
112 01:58:38.607041 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-target-ip
113 01:58:38.607183 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-target-mac
114 01:58:38.607307 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-target-storage
115 01:58:38.607434 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-case
116 01:58:38.607557 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-event
117 01:58:38.607680 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-feedback
118 01:58:38.607801 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-raise
119 01:58:38.607924 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-reference
120 01:58:38.608053 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-runner
121 01:58:38.608175 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-set
122 01:58:38.608300 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-test-shell
123 01:58:38.608426 Updating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-install-packages (oe)
124 01:58:38.608581 Updating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/bin/lava-installed-packages (oe)
125 01:58:38.608767 Creating /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/environment
126 01:58:38.608865 LAVA metadata
127 01:58:38.608937 - LAVA_JOB_ID=11304522
128 01:58:38.609002 - LAVA_DISPATCHER_IP=192.168.201.1
129 01:58:38.609104 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 01:58:38.609169 skipped lava-vland-overlay
131 01:58:38.609244 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 01:58:38.609324 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 01:58:38.609384 skipped lava-multinode-overlay
134 01:58:38.609457 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 01:58:38.609537 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 01:58:38.609607 Loading test definitions
137 01:58:38.609696 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 01:58:38.609771 Using /lava-11304522 at stage 0
139 01:58:38.610084 uuid=11304522_1.4.2.3.1 testdef=None
140 01:58:38.610170 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 01:58:38.610254 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 01:58:38.610777 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 01:58:38.610991 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 01:58:38.611613 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 01:58:38.611836 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 01:58:38.612444 runner path: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/0/tests/0_dmesg test_uuid 11304522_1.4.2.3.1
149 01:58:38.612597 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 01:58:38.612872 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 01:58:38.612942 Using /lava-11304522 at stage 1
153 01:58:38.613235 uuid=11304522_1.4.2.3.5 testdef=None
154 01:58:38.613321 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 01:58:38.613403 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 01:58:38.613872 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 01:58:38.614086 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 01:58:38.614723 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 01:58:38.614942 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 01:58:38.615556 runner path: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/1/tests/1_bootrr test_uuid 11304522_1.4.2.3.5
163 01:58:38.615706 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 01:58:38.615906 Creating lava-test-runner.conf files
166 01:58:38.615968 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/0 for stage 0
167 01:58:38.616055 - 0_dmesg
168 01:58:38.616134 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11304522/lava-overlay-lpubg_a4/lava-11304522/1 for stage 1
169 01:58:38.616223 - 1_bootrr
170 01:58:38.616314 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 01:58:38.616398 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 01:58:38.624929 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 01:58:38.625033 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 01:58:38.625116 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 01:58:38.625199 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 01:58:38.625280 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 01:58:38.879755 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 01:58:38.880146 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 01:58:38.880268 extracting modules file /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11304522/extract-overlay-ramdisk-v2lrbdwz/ramdisk
180 01:58:38.894251 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 01:58:38.894396 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 01:58:38.894491 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11304522/compress-overlay-eq9vpadt/overlay-1.4.2.4.tar.gz to ramdisk
183 01:58:38.894562 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11304522/compress-overlay-eq9vpadt/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11304522/extract-overlay-ramdisk-v2lrbdwz/ramdisk
184 01:58:38.903770 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 01:58:38.903910 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 01:58:38.904006 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 01:58:38.904097 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 01:58:38.904179 Building ramdisk /var/lib/lava/dispatcher/tmp/11304522/extract-overlay-ramdisk-v2lrbdwz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11304522/extract-overlay-ramdisk-v2lrbdwz/ramdisk
189 01:58:39.047415 >> 49849 blocks
190 01:58:39.891113 rename /var/lib/lava/dispatcher/tmp/11304522/extract-overlay-ramdisk-v2lrbdwz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/ramdisk/ramdisk.cpio.gz
191 01:58:39.891558 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 01:58:39.891681 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 01:58:39.891781 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 01:58:39.891879 No mkimage arch provided, not using FIT.
195 01:58:39.891971 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 01:58:39.892055 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 01:58:39.892163 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 01:58:39.892256 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 01:58:39.892338 No LXC device requested
200 01:58:39.892418 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 01:58:39.892506 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 01:58:39.892588 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 01:58:39.892659 Checking files for TFTP limit of 4294967296 bytes.
204 01:58:39.893110 end: 1 tftp-deploy (duration 00:00:02) [common]
205 01:58:39.893209 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 01:58:39.893298 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 01:58:39.893418 substitutions:
208 01:58:39.893482 - {DTB}: None
209 01:58:39.893542 - {INITRD}: 11304522/tftp-deploy-djwh04xh/ramdisk/ramdisk.cpio.gz
210 01:58:39.893600 - {KERNEL}: 11304522/tftp-deploy-djwh04xh/kernel/bzImage
211 01:58:39.893655 - {LAVA_MAC}: None
212 01:58:39.893709 - {PRESEED_CONFIG}: None
213 01:58:39.893763 - {PRESEED_LOCAL}: None
214 01:58:39.893816 - {RAMDISK}: 11304522/tftp-deploy-djwh04xh/ramdisk/ramdisk.cpio.gz
215 01:58:39.893870 - {ROOT_PART}: None
216 01:58:39.893923 - {ROOT}: None
217 01:58:39.893976 - {SERVER_IP}: 192.168.201.1
218 01:58:39.894028 - {TEE}: None
219 01:58:39.894081 Parsed boot commands:
220 01:58:39.894133 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 01:58:39.894309 Parsed boot commands: tftpboot 192.168.201.1 11304522/tftp-deploy-djwh04xh/kernel/bzImage 11304522/tftp-deploy-djwh04xh/kernel/cmdline 11304522/tftp-deploy-djwh04xh/ramdisk/ramdisk.cpio.gz
222 01:58:39.894396 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 01:58:39.894477 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 01:58:39.894571 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 01:58:39.894660 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 01:58:39.894728 Not connected, no need to disconnect.
227 01:58:39.894802 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 01:58:39.895016 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 01:58:39.895099 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
230 01:58:39.899189 Setting prompt string to ['lava-test: # ']
231 01:58:39.899535 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 01:58:39.899645 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 01:58:39.899740 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 01:58:39.899827 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 01:58:39.900065 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
236 01:58:45.036752 >> Command sent successfully.
237 01:58:45.039274 Returned 0 in 5 seconds
238 01:58:45.139675 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 01:58:45.140019 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 01:58:45.140119 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 01:58:45.140206 Setting prompt string to 'Starting depthcharge on Voema...'
243 01:58:45.140275 Changing prompt to 'Starting depthcharge on Voema...'
244 01:58:45.140341 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 01:58:45.140613 [Enter `^Ec?' for help]
246 01:58:46.742614
247 01:58:46.742786
248 01:58:46.752419 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 01:58:46.755750 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 01:58:46.762445 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 01:58:46.766140 CPU: AES supported, TXT NOT supported, VT supported
252 01:58:46.772245 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 01:58:46.779203 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 01:58:46.782244 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 01:58:46.785643 VBOOT: Loading verstage.
256 01:58:46.788557 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 01:58:46.795327 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 01:58:46.799075 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 01:58:46.809064 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 01:58:46.815720 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 01:58:46.815825
262 01:58:46.815890
263 01:58:46.829123 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 01:58:46.843228 Probing TPM: . done!
265 01:58:46.845966 TPM ready after 0 ms
266 01:58:46.849619 Connected to device vid:did:rid of 1ae0:0028:00
267 01:58:46.860578 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
268 01:58:46.867480 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 01:58:46.870954 Initialized TPM device CR50 revision 0
270 01:58:46.921614 tlcl_send_startup: Startup return code is 0
271 01:58:46.921759 TPM: setup succeeded
272 01:58:46.936149 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 01:58:46.950169 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 01:58:46.963047 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 01:58:46.972585 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 01:58:46.976222 Chrome EC: UHEPI supported
277 01:58:46.979810 Phase 1
278 01:58:46.983328 FMAP: area GBB found @ 1805000 (458752 bytes)
279 01:58:46.993105 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 01:58:47.000206 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 01:58:47.006551 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 01:58:47.012980 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 01:58:47.016088 Recovery requested (1009000e)
284 01:58:47.019467 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 01:58:47.031094 tlcl_extend: response is 0
286 01:58:47.037547 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 01:58:47.047899 tlcl_extend: response is 0
288 01:58:47.054226 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 01:58:47.061304 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 01:58:47.067701 BS: verstage times (exec / console): total (unknown) / 142 ms
291 01:58:47.067793
292 01:58:47.067858
293 01:58:47.081486 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 01:58:47.087707 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 01:58:47.091176 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 01:58:47.094235 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 01:58:47.100944 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 01:58:47.104493 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 01:58:47.107390 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 01:58:47.111009 TCO_STS: 0000 0000
301 01:58:47.113984 GEN_PMCON: d0015038 00002200
302 01:58:47.117495 GBLRST_CAUSE: 00000000 00000000
303 01:58:47.117577 HPR_CAUSE0: 00000000
304 01:58:47.120623 prev_sleep_state 5
305 01:58:47.124167 Boot Count incremented to 22884
306 01:58:47.130627 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 01:58:47.137629 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 01:58:47.144563 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 01:58:47.150537 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 01:58:47.155319 Chrome EC: UHEPI supported
311 01:58:47.161718 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 01:58:47.174661 Probing TPM: done!
313 01:58:47.182321 Connected to device vid:did:rid of 1ae0:0028:00
314 01:58:47.192989 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
315 01:58:47.198995 Initialized TPM device CR50 revision 0
316 01:58:47.208707 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 01:58:47.215546 MRC: Hash idx 0x100b comparison successful.
318 01:58:47.218692 MRC cache found, size faa8
319 01:58:47.218818 bootmode is set to: 2
320 01:58:47.221674 SPD index = 0
321 01:58:47.228786 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 01:58:47.232111 SPD: module type is LPDDR4X
323 01:58:47.235339 SPD: module part number is MT53E512M64D4NW-046
324 01:58:47.242079 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 01:58:47.245457 SPD: device width 16 bits, bus width 16 bits
326 01:58:47.251763 SPD: module size is 1024 MB (per channel)
327 01:58:47.683554 CBMEM:
328 01:58:47.686350 IMD: root @ 0x76fff000 254 entries.
329 01:58:47.690120 IMD: root @ 0x76ffec00 62 entries.
330 01:58:47.692909 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 01:58:47.699702 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 01:58:47.702793 External stage cache:
333 01:58:47.706088 IMD: root @ 0x7b3ff000 254 entries.
334 01:58:47.709461 IMD: root @ 0x7b3fec00 62 entries.
335 01:58:47.725415 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 01:58:47.732111 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 01:58:47.738116 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 01:58:47.752405 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 01:58:47.758741 cse_lite: Skip switching to RW in the recovery path
340 01:58:47.758880 8 DIMMs found
341 01:58:47.758977 SMM Memory Map
342 01:58:47.762532 SMRAM : 0x7b000000 0x800000
343 01:58:47.765647 Subregion 0: 0x7b000000 0x200000
344 01:58:47.769711 Subregion 1: 0x7b200000 0x200000
345 01:58:47.773371 Subregion 2: 0x7b400000 0x400000
346 01:58:47.776494 top_of_ram = 0x77000000
347 01:58:47.783324 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 01:58:47.786278 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 01:58:47.793049 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 01:58:47.796576 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 01:58:47.806541 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 01:58:47.809453 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 01:58:47.821884 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 01:58:47.828237 Processing 211 relocs. Offset value of 0x74c0b000
355 01:58:47.835085 BS: romstage times (exec / console): total (unknown) / 277 ms
356 01:58:47.840778
357 01:58:47.840865
358 01:58:47.851057 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 01:58:47.854665 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 01:58:47.864046 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 01:58:47.871112 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 01:58:47.877966 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 01:58:47.883930 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 01:58:47.931951 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 01:58:47.938016 Processing 5008 relocs. Offset value of 0x75d98000
366 01:58:47.940978 BS: postcar times (exec / console): total (unknown) / 59 ms
367 01:58:47.944296
368 01:58:47.944379
369 01:58:47.954088 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 01:58:47.954177 Normal boot
371 01:58:47.957476 FW_CONFIG value is 0x804c02
372 01:58:47.961427 PCI: 00:07.0 disabled by fw_config
373 01:58:47.964569 PCI: 00:07.1 disabled by fw_config
374 01:58:47.967930 PCI: 00:0d.2 disabled by fw_config
375 01:58:47.971698 PCI: 00:1c.7 disabled by fw_config
376 01:58:47.978079 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 01:58:47.984935 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 01:58:47.987714 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 01:58:47.991204 GENERIC: 0.0 disabled by fw_config
380 01:58:47.994402 GENERIC: 1.0 disabled by fw_config
381 01:58:48.001039 fw_config match found: DB_USB=USB3_ACTIVE
382 01:58:48.004553 fw_config match found: DB_USB=USB3_ACTIVE
383 01:58:48.008292 fw_config match found: DB_USB=USB3_ACTIVE
384 01:58:48.014038 fw_config match found: DB_USB=USB3_ACTIVE
385 01:58:48.017453 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 01:58:48.024651 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 01:58:48.033710 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 01:58:48.040574 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 01:58:48.044653 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 01:58:48.050992 microcode: Update skipped, already up-to-date
391 01:58:48.057201 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 01:58:48.084651 Detected 4 core, 8 thread CPU.
393 01:58:48.088242 Setting up SMI for CPU
394 01:58:48.091464 IED base = 0x7b400000
395 01:58:48.091547 IED size = 0x00400000
396 01:58:48.094552 Will perform SMM setup.
397 01:58:48.101079 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 01:58:48.108361 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 01:58:48.114564 Processing 16 relocs. Offset value of 0x00030000
400 01:58:48.118602 Attempting to start 7 APs
401 01:58:48.121793 Waiting for 10ms after sending INIT.
402 01:58:48.136682 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 01:58:48.136774 done.
404 01:58:48.139857 AP: slot 4 apic_id 2.
405 01:58:48.143144 AP: slot 7 apic_id 3.
406 01:58:48.143227 AP: slot 6 apic_id 6.
407 01:58:48.146493 AP: slot 3 apic_id 7.
408 01:58:48.149871 AP: slot 5 apic_id 4.
409 01:58:48.149956 AP: slot 2 apic_id 5.
410 01:58:48.156632 Waiting for 2nd SIPI to complete...done.
411 01:58:48.163621 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 01:58:48.170322 Processing 13 relocs. Offset value of 0x00038000
413 01:58:48.170412 Unable to locate Global NVS
414 01:58:48.180069 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 01:58:48.183278 Installing permanent SMM handler to 0x7b000000
416 01:58:48.193165 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 01:58:48.196175 Processing 794 relocs. Offset value of 0x7b010000
418 01:58:48.206176 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 01:58:48.210137 Processing 13 relocs. Offset value of 0x7b008000
420 01:58:48.216872 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 01:58:48.222795 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 01:58:48.226585 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 01:58:48.232950 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 01:58:48.239429 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 01:58:48.245879 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 01:58:48.253045 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 01:58:48.253130 Unable to locate Global NVS
428 01:58:48.262426 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 01:58:48.266431 Clearing SMI status registers
430 01:58:48.266514 SMI_STS: PM1
431 01:58:48.269177 PM1_STS: PWRBTN
432 01:58:48.275913 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 01:58:48.279351 In relocation handler: CPU 0
434 01:58:48.282395 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 01:58:48.289452 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 01:58:48.289536 Relocation complete.
437 01:58:48.299232 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 01:58:48.299315 In relocation handler: CPU 1
439 01:58:48.305749 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 01:58:48.305832 Relocation complete.
441 01:58:48.315723 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
442 01:58:48.315806 In relocation handler: CPU 2
443 01:58:48.322291 New SMBASE=0x7afff800 IEDBASE=0x7b400000
444 01:58:48.322382 Relocation complete.
445 01:58:48.329136 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
446 01:58:48.333314 In relocation handler: CPU 5
447 01:58:48.339148 New SMBASE=0x7affec00 IEDBASE=0x7b400000
448 01:58:48.342390 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 01:58:48.345756 Relocation complete.
450 01:58:48.352567 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
451 01:58:48.355884 In relocation handler: CPU 6
452 01:58:48.358770 New SMBASE=0x7affe800 IEDBASE=0x7b400000
453 01:58:48.365815 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 01:58:48.365897 Relocation complete.
455 01:58:48.372755 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 01:58:48.375525 In relocation handler: CPU 3
457 01:58:48.378783 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 01:58:48.382345 Relocation complete.
459 01:58:48.389080 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
460 01:58:48.392424 In relocation handler: CPU 7
461 01:58:48.395400 New SMBASE=0x7affe400 IEDBASE=0x7b400000
462 01:58:48.398828 Relocation complete.
463 01:58:48.405877 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
464 01:58:48.408633 In relocation handler: CPU 4
465 01:58:48.412292 New SMBASE=0x7afff000 IEDBASE=0x7b400000
466 01:58:48.418954 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 01:58:48.419037 Relocation complete.
468 01:58:48.421913 Initializing CPU #0
469 01:58:48.425536 CPU: vendor Intel device 806c1
470 01:58:48.428684 CPU: family 06, model 8c, stepping 01
471 01:58:48.433241 Clearing out pending MCEs
472 01:58:48.436689 Setting up local APIC...
473 01:58:48.436772 apic_id: 0x00 done.
474 01:58:48.439919 Turbo is available but hidden
475 01:58:48.444183 Turbo is available and visible
476 01:58:48.447166 microcode: Update skipped, already up-to-date
477 01:58:48.451083 CPU #0 initialized
478 01:58:48.453712 Initializing CPU #6
479 01:58:48.453801 Initializing CPU #3
480 01:58:48.456995 CPU: vendor Intel device 806c1
481 01:58:48.460089 CPU: family 06, model 8c, stepping 01
482 01:58:48.463175 CPU: vendor Intel device 806c1
483 01:58:48.466996 CPU: family 06, model 8c, stepping 01
484 01:58:48.469854 Clearing out pending MCEs
485 01:58:48.473140 Initializing CPU #7
486 01:58:48.476948 Initializing CPU #4
487 01:58:48.477030 CPU: vendor Intel device 806c1
488 01:58:48.483265 CPU: family 06, model 8c, stepping 01
489 01:58:48.483348 Setting up local APIC...
490 01:58:48.486669 Initializing CPU #1
491 01:58:48.489795 Initializing CPU #5
492 01:58:48.489877 Initializing CPU #2
493 01:58:48.493150 CPU: vendor Intel device 806c1
494 01:58:48.496615 CPU: family 06, model 8c, stepping 01
495 01:58:48.499790 CPU: vendor Intel device 806c1
496 01:58:48.502883 CPU: family 06, model 8c, stepping 01
497 01:58:48.506787 Clearing out pending MCEs
498 01:58:48.510069 Clearing out pending MCEs
499 01:58:48.513132 Setting up local APIC...
500 01:58:48.513214 apic_id: 0x06 done.
501 01:58:48.516406 Clearing out pending MCEs
502 01:58:48.523008 microcode: Update skipped, already up-to-date
503 01:58:48.523091 Setting up local APIC...
504 01:58:48.526483 CPU #6 initialized
505 01:58:48.529960 apic_id: 0x07 done.
506 01:58:48.530042 Clearing out pending MCEs
507 01:58:48.532951 CPU: vendor Intel device 806c1
508 01:58:48.536046 CPU: family 06, model 8c, stepping 01
509 01:58:48.539433 Setting up local APIC...
510 01:58:48.546449 microcode: Update skipped, already up-to-date
511 01:58:48.546537 Clearing out pending MCEs
512 01:58:48.549578 apic_id: 0x03 done.
513 01:58:48.552721 Setting up local APIC...
514 01:58:48.552804 apic_id: 0x04 done.
515 01:58:48.556131 Setting up local APIC...
516 01:58:48.559432 CPU #3 initialized
517 01:58:48.562990 microcode: Update skipped, already up-to-date
518 01:58:48.565918 apic_id: 0x02 done.
519 01:58:48.566001 CPU #7 initialized
520 01:58:48.572533 microcode: Update skipped, already up-to-date
521 01:58:48.576054 CPU: vendor Intel device 806c1
522 01:58:48.579343 CPU: family 06, model 8c, stepping 01
523 01:58:48.583208 apic_id: 0x05 done.
524 01:58:48.586038 microcode: Update skipped, already up-to-date
525 01:58:48.589351 microcode: Update skipped, already up-to-date
526 01:58:48.592674 CPU #5 initialized
527 01:58:48.592757 CPU #2 initialized
528 01:58:48.595842 Clearing out pending MCEs
529 01:58:48.599468 CPU #4 initialized
530 01:58:48.602621 Setting up local APIC...
531 01:58:48.602704 apic_id: 0x01 done.
532 01:58:48.609380 microcode: Update skipped, already up-to-date
533 01:58:48.609463 CPU #1 initialized
534 01:58:48.615859 bsp_do_flight_plan done after 455 msecs.
535 01:58:48.619426 CPU: frequency set to 4000 MHz
536 01:58:48.619509 Enabling SMIs.
537 01:58:48.625918 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 01:58:48.641819 SATAXPCIE1 indicates PCIe NVMe is present
539 01:58:48.645568 Probing TPM: done!
540 01:58:48.648334 Connected to device vid:did:rid of 1ae0:0028:00
541 01:58:48.659211 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
542 01:58:48.662302 Initialized TPM device CR50 revision 0
543 01:58:48.665858 Enabling S0i3.4
544 01:58:48.672073 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 01:58:48.675305 Found a VBT of 8704 bytes after decompression
546 01:58:48.682317 cse_lite: CSE RO boot. HybridStorageMode disabled
547 01:58:48.689746 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 01:58:48.764411 FSPS returned 0
549 01:58:48.767863 Executing Phase 1 of FspMultiPhaseSiInit
550 01:58:48.777856 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 01:58:48.781139 port C0 DISC req: usage 1 usb3 1 usb2 5
552 01:58:48.784569 Raw Buffer output 0 00000511
553 01:58:48.787656 Raw Buffer output 1 00000000
554 01:58:48.791446 pmc_send_ipc_cmd succeeded
555 01:58:48.798312 port C1 DISC req: usage 1 usb3 2 usb2 3
556 01:58:48.798451 Raw Buffer output 0 00000321
557 01:58:48.801440 Raw Buffer output 1 00000000
558 01:58:48.805748 pmc_send_ipc_cmd succeeded
559 01:58:48.811597 Detected 4 core, 8 thread CPU.
560 01:58:48.814140 Detected 4 core, 8 thread CPU.
561 01:58:49.048662 Display FSP Version Info HOB
562 01:58:49.052012 Reference Code - CPU = a.0.4c.31
563 01:58:49.055022 uCode Version = 0.0.0.86
564 01:58:49.058793 TXT ACM version = ff.ff.ff.ffff
565 01:58:49.061732 Reference Code - ME = a.0.4c.31
566 01:58:49.064908 MEBx version = 0.0.0.0
567 01:58:49.069040 ME Firmware Version = Consumer SKU
568 01:58:49.071599 Reference Code - PCH = a.0.4c.31
569 01:58:49.075517 PCH-CRID Status = Disabled
570 01:58:49.078514 PCH-CRID Original Value = ff.ff.ff.ffff
571 01:58:49.081559 PCH-CRID New Value = ff.ff.ff.ffff
572 01:58:49.084729 OPROM - RST - RAID = ff.ff.ff.ffff
573 01:58:49.088906 PCH Hsio Version = 4.0.0.0
574 01:58:49.091845 Reference Code - SA - System Agent = a.0.4c.31
575 01:58:49.095113 Reference Code - MRC = 2.0.0.1
576 01:58:49.098344 SA - PCIe Version = a.0.4c.31
577 01:58:49.101602 SA-CRID Status = Disabled
578 01:58:49.104588 SA-CRID Original Value = 0.0.0.1
579 01:58:49.108337 SA-CRID New Value = 0.0.0.1
580 01:58:49.111846 OPROM - VBIOS = ff.ff.ff.ffff
581 01:58:49.114910 IO Manageability Engine FW Version = 11.1.4.0
582 01:58:49.118306 PHY Build Version = 0.0.0.e0
583 01:58:49.121563 Thunderbolt(TM) FW Version = 0.0.0.0
584 01:58:49.128382 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 01:58:49.131657 ITSS IRQ Polarities Before:
586 01:58:49.132081 IPC0: 0xffffffff
587 01:58:49.134965 IPC1: 0xffffffff
588 01:58:49.135486 IPC2: 0xffffffff
589 01:58:49.138504 IPC3: 0xffffffff
590 01:58:49.141753 ITSS IRQ Polarities After:
591 01:58:49.142306 IPC0: 0xffffffff
592 01:58:49.145008 IPC1: 0xffffffff
593 01:58:49.145529 IPC2: 0xffffffff
594 01:58:49.148821 IPC3: 0xffffffff
595 01:58:49.151661 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 01:58:49.164418 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 01:58:49.174800 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 01:58:49.187799 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 01:58:49.194736 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
600 01:58:49.195226 Enumerating buses...
601 01:58:49.201538 Show all devs... Before device enumeration.
602 01:58:49.204471 Root Device: enabled 1
603 01:58:49.204923 DOMAIN: 0000: enabled 1
604 01:58:49.208133 CPU_CLUSTER: 0: enabled 1
605 01:58:49.211541 PCI: 00:00.0: enabled 1
606 01:58:49.214469 PCI: 00:02.0: enabled 1
607 01:58:49.214893 PCI: 00:04.0: enabled 1
608 01:58:49.217518 PCI: 00:05.0: enabled 1
609 01:58:49.220941 PCI: 00:06.0: enabled 0
610 01:58:49.221327 PCI: 00:07.0: enabled 0
611 01:58:49.224893 PCI: 00:07.1: enabled 0
612 01:58:49.228236 PCI: 00:07.2: enabled 0
613 01:58:49.231532 PCI: 00:07.3: enabled 0
614 01:58:49.232053 PCI: 00:08.0: enabled 1
615 01:58:49.234363 PCI: 00:09.0: enabled 0
616 01:58:49.237463 PCI: 00:0a.0: enabled 0
617 01:58:49.241199 PCI: 00:0d.0: enabled 1
618 01:58:49.241589 PCI: 00:0d.1: enabled 0
619 01:58:49.244186 PCI: 00:0d.2: enabled 0
620 01:58:49.248053 PCI: 00:0d.3: enabled 0
621 01:58:49.251290 PCI: 00:0e.0: enabled 0
622 01:58:49.251679 PCI: 00:10.2: enabled 1
623 01:58:49.254509 PCI: 00:10.6: enabled 0
624 01:58:49.257739 PCI: 00:10.7: enabled 0
625 01:58:49.258128 PCI: 00:12.0: enabled 0
626 01:58:49.260759 PCI: 00:12.6: enabled 0
627 01:58:49.264092 PCI: 00:13.0: enabled 0
628 01:58:49.267867 PCI: 00:14.0: enabled 1
629 01:58:49.268361 PCI: 00:14.1: enabled 0
630 01:58:49.271400 PCI: 00:14.2: enabled 1
631 01:58:49.274321 PCI: 00:14.3: enabled 1
632 01:58:49.278066 PCI: 00:15.0: enabled 1
633 01:58:49.278598 PCI: 00:15.1: enabled 1
634 01:58:49.280797 PCI: 00:15.2: enabled 1
635 01:58:49.284532 PCI: 00:15.3: enabled 1
636 01:58:49.287551 PCI: 00:16.0: enabled 1
637 01:58:49.288060 PCI: 00:16.1: enabled 0
638 01:58:49.291762 PCI: 00:16.2: enabled 0
639 01:58:49.294704 PCI: 00:16.3: enabled 0
640 01:58:49.297536 PCI: 00:16.4: enabled 0
641 01:58:49.298036 PCI: 00:16.5: enabled 0
642 01:58:49.301044 PCI: 00:17.0: enabled 1
643 01:58:49.304549 PCI: 00:19.0: enabled 0
644 01:58:49.305164 PCI: 00:19.1: enabled 1
645 01:58:49.307599 PCI: 00:19.2: enabled 0
646 01:58:49.310888 PCI: 00:1c.0: enabled 1
647 01:58:49.314073 PCI: 00:1c.1: enabled 0
648 01:58:49.314502 PCI: 00:1c.2: enabled 0
649 01:58:49.317428 PCI: 00:1c.3: enabled 0
650 01:58:49.320663 PCI: 00:1c.4: enabled 0
651 01:58:49.324059 PCI: 00:1c.5: enabled 0
652 01:58:49.324587 PCI: 00:1c.6: enabled 1
653 01:58:49.327383 PCI: 00:1c.7: enabled 0
654 01:58:49.331047 PCI: 00:1d.0: enabled 1
655 01:58:49.334277 PCI: 00:1d.1: enabled 0
656 01:58:49.334809 PCI: 00:1d.2: enabled 1
657 01:58:49.337478 PCI: 00:1d.3: enabled 0
658 01:58:49.341104 PCI: 00:1e.0: enabled 1
659 01:58:49.344134 PCI: 00:1e.1: enabled 0
660 01:58:49.344693 PCI: 00:1e.2: enabled 1
661 01:58:49.347511 PCI: 00:1e.3: enabled 1
662 01:58:49.350445 PCI: 00:1f.0: enabled 1
663 01:58:49.350873 PCI: 00:1f.1: enabled 0
664 01:58:49.353683 PCI: 00:1f.2: enabled 1
665 01:58:49.357014 PCI: 00:1f.3: enabled 1
666 01:58:49.360632 PCI: 00:1f.4: enabled 0
667 01:58:49.361208 PCI: 00:1f.5: enabled 1
668 01:58:49.363912 PCI: 00:1f.6: enabled 0
669 01:58:49.367425 PCI: 00:1f.7: enabled 0
670 01:58:49.367955 APIC: 00: enabled 1
671 01:58:49.370760 GENERIC: 0.0: enabled 1
672 01:58:49.373804 GENERIC: 0.0: enabled 1
673 01:58:49.377084 GENERIC: 1.0: enabled 1
674 01:58:49.377619 GENERIC: 0.0: enabled 1
675 01:58:49.380886 GENERIC: 1.0: enabled 1
676 01:58:49.384661 USB0 port 0: enabled 1
677 01:58:49.388019 GENERIC: 0.0: enabled 1
678 01:58:49.388552 USB0 port 0: enabled 1
679 01:58:49.390383 GENERIC: 0.0: enabled 1
680 01:58:49.393912 I2C: 00:1a: enabled 1
681 01:58:49.394445 I2C: 00:31: enabled 1
682 01:58:49.396865 I2C: 00:32: enabled 1
683 01:58:49.400801 I2C: 00:10: enabled 1
684 01:58:49.401325 I2C: 00:15: enabled 1
685 01:58:49.403845 GENERIC: 0.0: enabled 0
686 01:58:49.406866 GENERIC: 1.0: enabled 0
687 01:58:49.410657 GENERIC: 0.0: enabled 1
688 01:58:49.411187 SPI: 00: enabled 1
689 01:58:49.413992 SPI: 00: enabled 1
690 01:58:49.417432 PNP: 0c09.0: enabled 1
691 01:58:49.417857 GENERIC: 0.0: enabled 1
692 01:58:49.420058 USB3 port 0: enabled 1
693 01:58:49.423901 USB3 port 1: enabled 1
694 01:58:49.424439 USB3 port 2: enabled 0
695 01:58:49.427309 USB3 port 3: enabled 0
696 01:58:49.430832 USB2 port 0: enabled 0
697 01:58:49.431361 USB2 port 1: enabled 1
698 01:58:49.433827 USB2 port 2: enabled 1
699 01:58:49.438904 USB2 port 3: enabled 0
700 01:58:49.439913 USB2 port 4: enabled 1
701 01:58:49.440486 USB2 port 5: enabled 0
702 01:58:49.443884 USB2 port 6: enabled 0
703 01:58:49.446674 USB2 port 7: enabled 0
704 01:58:49.447107 USB2 port 8: enabled 0
705 01:58:49.449945 USB2 port 9: enabled 0
706 01:58:49.453657 USB3 port 0: enabled 0
707 01:58:49.457217 USB3 port 1: enabled 1
708 01:58:49.457841 USB3 port 2: enabled 0
709 01:58:49.459872 USB3 port 3: enabled 0
710 01:58:49.463623 GENERIC: 0.0: enabled 1
711 01:58:49.464050 GENERIC: 1.0: enabled 1
712 01:58:49.467149 APIC: 01: enabled 1
713 01:58:49.470023 APIC: 05: enabled 1
714 01:58:49.470451 APIC: 07: enabled 1
715 01:58:49.473165 APIC: 02: enabled 1
716 01:58:49.476656 APIC: 04: enabled 1
717 01:58:49.477119 APIC: 06: enabled 1
718 01:58:49.480162 APIC: 03: enabled 1
719 01:58:49.480585 Compare with tree...
720 01:58:49.483621 Root Device: enabled 1
721 01:58:49.486707 DOMAIN: 0000: enabled 1
722 01:58:49.490688 PCI: 00:00.0: enabled 1
723 01:58:49.491255 PCI: 00:02.0: enabled 1
724 01:58:49.493139 PCI: 00:04.0: enabled 1
725 01:58:49.496430 GENERIC: 0.0: enabled 1
726 01:58:49.499990 PCI: 00:05.0: enabled 1
727 01:58:49.503801 PCI: 00:06.0: enabled 0
728 01:58:49.504229 PCI: 00:07.0: enabled 0
729 01:58:49.506587 GENERIC: 0.0: enabled 1
730 01:58:49.510203 PCI: 00:07.1: enabled 0
731 01:58:49.513283 GENERIC: 1.0: enabled 1
732 01:58:49.516647 PCI: 00:07.2: enabled 0
733 01:58:49.519778 GENERIC: 0.0: enabled 1
734 01:58:49.520204 PCI: 00:07.3: enabled 0
735 01:58:49.523585 GENERIC: 1.0: enabled 1
736 01:58:49.526561 PCI: 00:08.0: enabled 1
737 01:58:49.530265 PCI: 00:09.0: enabled 0
738 01:58:49.533659 PCI: 00:0a.0: enabled 0
739 01:58:49.534190 PCI: 00:0d.0: enabled 1
740 01:58:49.536285 USB0 port 0: enabled 1
741 01:58:49.540455 USB3 port 0: enabled 1
742 01:58:49.543609 USB3 port 1: enabled 1
743 01:58:49.546248 USB3 port 2: enabled 0
744 01:58:49.546681 USB3 port 3: enabled 0
745 01:58:49.549634 PCI: 00:0d.1: enabled 0
746 01:58:49.553626 PCI: 00:0d.2: enabled 0
747 01:58:49.556786 GENERIC: 0.0: enabled 1
748 01:58:49.560214 PCI: 00:0d.3: enabled 0
749 01:58:49.560798 PCI: 00:0e.0: enabled 0
750 01:58:49.562920 PCI: 00:10.2: enabled 1
751 01:58:49.566782 PCI: 00:10.6: enabled 0
752 01:58:49.569816 PCI: 00:10.7: enabled 0
753 01:58:49.573266 PCI: 00:12.0: enabled 0
754 01:58:49.573695 PCI: 00:12.6: enabled 0
755 01:58:49.576448 PCI: 00:13.0: enabled 0
756 01:58:49.579775 PCI: 00:14.0: enabled 1
757 01:58:49.583230 USB0 port 0: enabled 1
758 01:58:49.586900 USB2 port 0: enabled 0
759 01:58:49.587446 USB2 port 1: enabled 1
760 01:58:49.590313 USB2 port 2: enabled 1
761 01:58:49.593472 USB2 port 3: enabled 0
762 01:58:49.596787 USB2 port 4: enabled 1
763 01:58:49.600624 USB2 port 5: enabled 0
764 01:58:49.603540 USB2 port 6: enabled 0
765 01:58:49.604066 USB2 port 7: enabled 0
766 01:58:49.606412 USB2 port 8: enabled 0
767 01:58:49.609807 USB2 port 9: enabled 0
768 01:58:49.612860 USB3 port 0: enabled 0
769 01:58:49.616405 USB3 port 1: enabled 1
770 01:58:49.616942 USB3 port 2: enabled 0
771 01:58:49.619566 USB3 port 3: enabled 0
772 01:58:49.623569 PCI: 00:14.1: enabled 0
773 01:58:49.626810 PCI: 00:14.2: enabled 1
774 01:58:49.630412 PCI: 00:14.3: enabled 1
775 01:58:49.630937 GENERIC: 0.0: enabled 1
776 01:58:49.633394 PCI: 00:15.0: enabled 1
777 01:58:49.636238 I2C: 00:1a: enabled 1
778 01:58:49.640039 I2C: 00:31: enabled 1
779 01:58:49.642890 I2C: 00:32: enabled 1
780 01:58:49.643273 PCI: 00:15.1: enabled 1
781 01:58:49.646326 I2C: 00:10: enabled 1
782 01:58:49.649371 PCI: 00:15.2: enabled 1
783 01:58:49.652768 PCI: 00:15.3: enabled 1
784 01:58:49.653205 PCI: 00:16.0: enabled 1
785 01:58:49.656372 PCI: 00:16.1: enabled 0
786 01:58:49.659879 PCI: 00:16.2: enabled 0
787 01:58:49.662592 PCI: 00:16.3: enabled 0
788 01:58:49.666390 PCI: 00:16.4: enabled 0
789 01:58:49.666826 PCI: 00:16.5: enabled 0
790 01:58:49.669495 PCI: 00:17.0: enabled 1
791 01:58:49.672991 PCI: 00:19.0: enabled 0
792 01:58:49.677021 PCI: 00:19.1: enabled 1
793 01:58:49.677556 I2C: 00:15: enabled 1
794 01:58:49.680329 PCI: 00:19.2: enabled 0
795 01:58:49.684643 PCI: 00:1d.0: enabled 1
796 01:58:49.687414 GENERIC: 0.0: enabled 1
797 01:58:49.687845 PCI: 00:1e.0: enabled 1
798 01:58:49.691035 PCI: 00:1e.1: enabled 0
799 01:58:49.694324 PCI: 00:1e.2: enabled 1
800 01:58:49.744412 SPI: 00: enabled 1
801 01:58:49.745026 PCI: 00:1e.3: enabled 1
802 01:58:49.745382 SPI: 00: enabled 1
803 01:58:49.745698 PCI: 00:1f.0: enabled 1
804 01:58:49.746004 PNP: 0c09.0: enabled 1
805 01:58:49.746628 PCI: 00:1f.1: enabled 0
806 01:58:49.746959 PCI: 00:1f.2: enabled 1
807 01:58:49.747258 GENERIC: 0.0: enabled 1
808 01:58:49.747554 GENERIC: 0.0: enabled 1
809 01:58:49.747846 GENERIC: 1.0: enabled 1
810 01:58:49.748131 PCI: 00:1f.3: enabled 1
811 01:58:49.748461 PCI: 00:1f.4: enabled 0
812 01:58:49.748915 PCI: 00:1f.5: enabled 1
813 01:58:49.749212 PCI: 00:1f.6: enabled 0
814 01:58:49.749499 PCI: 00:1f.7: enabled 0
815 01:58:49.749781 CPU_CLUSTER: 0: enabled 1
816 01:58:49.750065 APIC: 00: enabled 1
817 01:58:49.750347 APIC: 01: enabled 1
818 01:58:49.750627 APIC: 05: enabled 1
819 01:58:49.750905 APIC: 07: enabled 1
820 01:58:49.796219 APIC: 02: enabled 1
821 01:58:49.796779 APIC: 04: enabled 1
822 01:58:49.797132 APIC: 06: enabled 1
823 01:58:49.797454 APIC: 03: enabled 1
824 01:58:49.797760 Root Device scanning...
825 01:58:49.798382 scan_static_bus for Root Device
826 01:58:49.798720 DOMAIN: 0000 enabled
827 01:58:49.799026 CPU_CLUSTER: 0 enabled
828 01:58:49.799324 DOMAIN: 0000 scanning...
829 01:58:49.799618 PCI: pci_scan_bus for bus 00
830 01:58:49.799909 PCI: 00:00.0 [8086/0000] ops
831 01:58:49.800193 PCI: 00:00.0 [8086/9a12] enabled
832 01:58:49.800480 PCI: 00:02.0 [8086/0000] bus ops
833 01:58:49.800811 PCI: 00:02.0 [8086/9a40] enabled
834 01:58:49.801106 PCI: 00:04.0 [8086/0000] bus ops
835 01:58:49.801389 PCI: 00:04.0 [8086/9a03] enabled
836 01:58:49.801734 PCI: 00:05.0 [8086/9a19] enabled
837 01:58:49.802036 PCI: 00:07.0 [0000/0000] hidden
838 01:58:49.802321 PCI: 00:08.0 [8086/9a11] enabled
839 01:58:49.804789 PCI: 00:0a.0 [8086/9a0d] disabled
840 01:58:49.807899 PCI: 00:0d.0 [8086/0000] bus ops
841 01:58:49.811633 PCI: 00:0d.0 [8086/9a13] enabled
842 01:58:49.814911 PCI: 00:14.0 [8086/0000] bus ops
843 01:58:49.817967 PCI: 00:14.0 [8086/a0ed] enabled
844 01:58:49.821778 PCI: 00:14.2 [8086/a0ef] enabled
845 01:58:49.824875 PCI: 00:14.3 [8086/0000] bus ops
846 01:58:49.828393 PCI: 00:14.3 [8086/a0f0] enabled
847 01:58:49.831638 PCI: 00:15.0 [8086/0000] bus ops
848 01:58:49.835166 PCI: 00:15.0 [8086/a0e8] enabled
849 01:58:49.837695 PCI: 00:15.1 [8086/0000] bus ops
850 01:58:49.841375 PCI: 00:15.1 [8086/a0e9] enabled
851 01:58:49.845432 PCI: 00:15.2 [8086/0000] bus ops
852 01:58:49.848072 PCI: 00:15.2 [8086/a0ea] enabled
853 01:58:49.851442 PCI: 00:15.3 [8086/0000] bus ops
854 01:58:49.854586 PCI: 00:15.3 [8086/a0eb] enabled
855 01:58:49.857974 PCI: 00:16.0 [8086/0000] ops
856 01:58:49.861583 PCI: 00:16.0 [8086/a0e0] enabled
857 01:58:49.867863 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 01:58:49.871266 PCI: 00:19.0 [8086/0000] bus ops
859 01:58:49.875524 PCI: 00:19.0 [8086/a0c5] disabled
860 01:58:49.878419 PCI: 00:19.1 [8086/0000] bus ops
861 01:58:49.881653 PCI: 00:19.1 [8086/a0c6] enabled
862 01:58:49.884742 PCI: 00:1d.0 [8086/0000] bus ops
863 01:58:49.888239 PCI: 00:1d.0 [8086/a0b0] enabled
864 01:58:49.891461 PCI: 00:1e.0 [8086/0000] ops
865 01:58:49.894875 PCI: 00:1e.0 [8086/a0a8] enabled
866 01:58:49.898343 PCI: 00:1e.2 [8086/0000] bus ops
867 01:58:49.901833 PCI: 00:1e.2 [8086/a0aa] enabled
868 01:58:49.904714 PCI: 00:1e.3 [8086/0000] bus ops
869 01:58:49.908107 PCI: 00:1e.3 [8086/a0ab] enabled
870 01:58:49.911581 PCI: 00:1f.0 [8086/0000] bus ops
871 01:58:49.914598 PCI: 00:1f.0 [8086/a087] enabled
872 01:58:49.915125 RTC Init
873 01:58:49.917368 Set power on after power failure.
874 01:58:49.921463 Disabling Deep S3
875 01:58:49.921889 Disabling Deep S3
876 01:58:49.924592 Disabling Deep S4
877 01:58:49.925153 Disabling Deep S4
878 01:58:49.928118 Disabling Deep S5
879 01:58:49.928541 Disabling Deep S5
880 01:58:49.931282 PCI: 00:1f.2 [0000/0000] hidden
881 01:58:49.934560 PCI: 00:1f.3 [8086/0000] bus ops
882 01:58:49.938201 PCI: 00:1f.3 [8086/a0c8] enabled
883 01:58:49.941269 PCI: 00:1f.5 [8086/0000] bus ops
884 01:58:49.944822 PCI: 00:1f.5 [8086/a0a4] enabled
885 01:58:49.947814 PCI: Leftover static devices:
886 01:58:49.951300 PCI: 00:10.2
887 01:58:49.951824 PCI: 00:10.6
888 01:58:49.952167 PCI: 00:10.7
889 01:58:49.954686 PCI: 00:06.0
890 01:58:49.955211 PCI: 00:07.1
891 01:58:49.957490 PCI: 00:07.2
892 01:58:49.957917 PCI: 00:07.3
893 01:58:49.960696 PCI: 00:09.0
894 01:58:49.961142 PCI: 00:0d.1
895 01:58:49.961485 PCI: 00:0d.2
896 01:58:49.964084 PCI: 00:0d.3
897 01:58:49.964514 PCI: 00:0e.0
898 01:58:49.967576 PCI: 00:12.0
899 01:58:49.968022 PCI: 00:12.6
900 01:58:49.968363 PCI: 00:13.0
901 01:58:49.971666 PCI: 00:14.1
902 01:58:49.972192 PCI: 00:16.1
903 01:58:49.974433 PCI: 00:16.2
904 01:58:49.974957 PCI: 00:16.3
905 01:58:49.977527 PCI: 00:16.4
906 01:58:49.977960 PCI: 00:16.5
907 01:58:49.978302 PCI: 00:17.0
908 01:58:49.981203 PCI: 00:19.2
909 01:58:49.981630 PCI: 00:1e.1
910 01:58:49.984538 PCI: 00:1f.1
911 01:58:49.985140 PCI: 00:1f.4
912 01:58:49.985489 PCI: 00:1f.6
913 01:58:49.987500 PCI: 00:1f.7
914 01:58:49.991758 PCI: Check your devicetree.cb.
915 01:58:49.994193 PCI: 00:02.0 scanning...
916 01:58:49.997484 scan_generic_bus for PCI: 00:02.0
917 01:58:50.001284 scan_generic_bus for PCI: 00:02.0 done
918 01:58:50.004898 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 01:58:50.008107 PCI: 00:04.0 scanning...
920 01:58:50.010980 scan_generic_bus for PCI: 00:04.0
921 01:58:50.014557 GENERIC: 0.0 enabled
922 01:58:50.020824 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 01:58:50.024067 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 01:58:50.027506 PCI: 00:0d.0 scanning...
925 01:58:50.031394 scan_static_bus for PCI: 00:0d.0
926 01:58:50.031921 USB0 port 0 enabled
927 01:58:50.034403 USB0 port 0 scanning...
928 01:58:50.037368 scan_static_bus for USB0 port 0
929 01:58:50.040324 USB3 port 0 enabled
930 01:58:50.040789 USB3 port 1 enabled
931 01:58:50.043875 USB3 port 2 disabled
932 01:58:50.047288 USB3 port 3 disabled
933 01:58:50.050297 USB3 port 0 scanning...
934 01:58:50.054243 scan_static_bus for USB3 port 0
935 01:58:50.057587 scan_static_bus for USB3 port 0 done
936 01:58:50.060703 scan_bus: bus USB3 port 0 finished in 6 msecs
937 01:58:50.064222 USB3 port 1 scanning...
938 01:58:50.067097 scan_static_bus for USB3 port 1
939 01:58:50.071074 scan_static_bus for USB3 port 1 done
940 01:58:50.074253 scan_bus: bus USB3 port 1 finished in 6 msecs
941 01:58:50.077555 scan_static_bus for USB0 port 0 done
942 01:58:50.083871 scan_bus: bus USB0 port 0 finished in 43 msecs
943 01:58:50.086987 scan_static_bus for PCI: 00:0d.0 done
944 01:58:50.090727 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 01:58:50.093802 PCI: 00:14.0 scanning...
946 01:58:50.096851 scan_static_bus for PCI: 00:14.0
947 01:58:50.100539 USB0 port 0 enabled
948 01:58:50.103805 USB0 port 0 scanning...
949 01:58:50.107041 scan_static_bus for USB0 port 0
950 01:58:50.107466 USB2 port 0 disabled
951 01:58:50.111360 USB2 port 1 enabled
952 01:58:50.113544 USB2 port 2 enabled
953 01:58:50.113971 USB2 port 3 disabled
954 01:58:50.117034 USB2 port 4 enabled
955 01:58:50.117558 USB2 port 5 disabled
956 01:58:50.120874 USB2 port 6 disabled
957 01:58:50.124146 USB2 port 7 disabled
958 01:58:50.124662 USB2 port 8 disabled
959 01:58:50.127217 USB2 port 9 disabled
960 01:58:50.130291 USB3 port 0 disabled
961 01:58:50.130811 USB3 port 1 enabled
962 01:58:50.134199 USB3 port 2 disabled
963 01:58:50.136959 USB3 port 3 disabled
964 01:58:50.137512 USB2 port 1 scanning...
965 01:58:50.139910 scan_static_bus for USB2 port 1
966 01:58:50.147147 scan_static_bus for USB2 port 1 done
967 01:58:50.149880 scan_bus: bus USB2 port 1 finished in 6 msecs
968 01:58:50.153299 USB2 port 2 scanning...
969 01:58:50.157001 scan_static_bus for USB2 port 2
970 01:58:50.160453 scan_static_bus for USB2 port 2 done
971 01:58:50.163239 scan_bus: bus USB2 port 2 finished in 6 msecs
972 01:58:50.166873 USB2 port 4 scanning...
973 01:58:50.171000 scan_static_bus for USB2 port 4
974 01:58:50.173470 scan_static_bus for USB2 port 4 done
975 01:58:50.176872 scan_bus: bus USB2 port 4 finished in 6 msecs
976 01:58:50.180495 USB3 port 1 scanning...
977 01:58:50.183543 scan_static_bus for USB3 port 1
978 01:58:50.187175 scan_static_bus for USB3 port 1 done
979 01:58:50.193601 scan_bus: bus USB3 port 1 finished in 6 msecs
980 01:58:50.197415 scan_static_bus for USB0 port 0 done
981 01:58:50.200137 scan_bus: bus USB0 port 0 finished in 93 msecs
982 01:58:50.203726 scan_static_bus for PCI: 00:14.0 done
983 01:58:50.209832 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 01:58:50.213628 PCI: 00:14.3 scanning...
985 01:58:50.216825 scan_static_bus for PCI: 00:14.3
986 01:58:50.217431 GENERIC: 0.0 enabled
987 01:58:50.222943 scan_static_bus for PCI: 00:14.3 done
988 01:58:50.226457 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 01:58:50.230132 PCI: 00:15.0 scanning...
990 01:58:50.233398 scan_static_bus for PCI: 00:15.0
991 01:58:50.233916 I2C: 00:1a enabled
992 01:58:50.237047 I2C: 00:31 enabled
993 01:58:50.240145 I2C: 00:32 enabled
994 01:58:50.243305 scan_static_bus for PCI: 00:15.0 done
995 01:58:50.246312 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 01:58:50.250018 PCI: 00:15.1 scanning...
997 01:58:50.253416 scan_static_bus for PCI: 00:15.1
998 01:58:50.257251 I2C: 00:10 enabled
999 01:58:50.260845 scan_static_bus for PCI: 00:15.1 done
1000 01:58:50.263867 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 01:58:50.267077 PCI: 00:15.2 scanning...
1002 01:58:50.270936 scan_static_bus for PCI: 00:15.2
1003 01:58:50.273838 scan_static_bus for PCI: 00:15.2 done
1004 01:58:50.277027 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 01:58:50.280053 PCI: 00:15.3 scanning...
1006 01:58:50.284061 scan_static_bus for PCI: 00:15.3
1007 01:58:50.287461 scan_static_bus for PCI: 00:15.3 done
1008 01:58:50.293416 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 01:58:50.293930 PCI: 00:19.1 scanning...
1010 01:58:50.297400 scan_static_bus for PCI: 00:19.1
1011 01:58:50.300603 I2C: 00:15 enabled
1012 01:58:50.304060 scan_static_bus for PCI: 00:19.1 done
1013 01:58:50.310397 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 01:58:50.310947 PCI: 00:1d.0 scanning...
1015 01:58:50.317377 do_pci_scan_bridge for PCI: 00:1d.0
1016 01:58:50.317928 PCI: pci_scan_bus for bus 01
1017 01:58:50.320425 PCI: 01:00.0 [1c5c/174a] enabled
1018 01:58:50.324381 GENERIC: 0.0 enabled
1019 01:58:50.326932 Enabling Common Clock Configuration
1020 01:58:50.333994 L1 Sub-State supported from root port 29
1021 01:58:50.334511 L1 Sub-State Support = 0xf
1022 01:58:50.337236 CommonModeRestoreTime = 0x28
1023 01:58:50.343862 Power On Value = 0x16, Power On Scale = 0x0
1024 01:58:50.344383 ASPM: Enabled L1
1025 01:58:50.347338 PCIe: Max_Payload_Size adjusted to 128
1026 01:58:50.353609 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 01:58:50.354129 PCI: 00:1e.2 scanning...
1028 01:58:50.360830 scan_generic_bus for PCI: 00:1e.2
1029 01:58:50.361365 SPI: 00 enabled
1030 01:58:50.367240 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 01:58:50.370615 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 01:58:50.373667 PCI: 00:1e.3 scanning...
1033 01:58:50.377336 scan_generic_bus for PCI: 00:1e.3
1034 01:58:50.380509 SPI: 00 enabled
1035 01:58:50.384173 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 01:58:50.391145 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 01:58:50.393709 PCI: 00:1f.0 scanning...
1038 01:58:50.397235 scan_static_bus for PCI: 00:1f.0
1039 01:58:50.397747 PNP: 0c09.0 enabled
1040 01:58:50.401245 PNP: 0c09.0 scanning...
1041 01:58:50.403522 scan_static_bus for PNP: 0c09.0
1042 01:58:50.406991 scan_static_bus for PNP: 0c09.0 done
1043 01:58:50.413543 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 01:58:50.417208 scan_static_bus for PCI: 00:1f.0 done
1045 01:58:50.420416 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 01:58:50.423532 PCI: 00:1f.2 scanning...
1047 01:58:50.427050 scan_static_bus for PCI: 00:1f.2
1048 01:58:50.430477 GENERIC: 0.0 enabled
1049 01:58:50.430987 GENERIC: 0.0 scanning...
1050 01:58:50.434002 scan_static_bus for GENERIC: 0.0
1051 01:58:50.437004 GENERIC: 0.0 enabled
1052 01:58:50.440755 GENERIC: 1.0 enabled
1053 01:58:50.443995 scan_static_bus for GENERIC: 0.0 done
1054 01:58:50.447395 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 01:58:50.453673 scan_static_bus for PCI: 00:1f.2 done
1056 01:58:50.457581 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 01:58:50.460529 PCI: 00:1f.3 scanning...
1058 01:58:50.463957 scan_static_bus for PCI: 00:1f.3
1059 01:58:50.467112 scan_static_bus for PCI: 00:1f.3 done
1060 01:58:50.470023 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 01:58:50.473403 PCI: 00:1f.5 scanning...
1062 01:58:50.476905 scan_generic_bus for PCI: 00:1f.5
1063 01:58:50.480737 scan_generic_bus for PCI: 00:1f.5 done
1064 01:58:50.486489 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 01:58:50.490232 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 01:58:50.494059 scan_static_bus for Root Device done
1067 01:58:50.500600 scan_bus: bus Root Device finished in 736 msecs
1068 01:58:50.501267 done
1069 01:58:50.506893 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 01:58:50.509758 Chrome EC: UHEPI supported
1071 01:58:50.516300 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 01:58:50.523231 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 01:58:50.526549 SPI flash protection: WPSW=0 SRP0=0
1074 01:58:50.530275 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 01:58:50.536776 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 01:58:50.540077 found VGA at PCI: 00:02.0
1077 01:58:50.543189 Setting up VGA for PCI: 00:02.0
1078 01:58:50.546766 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 01:58:50.553361 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 01:58:50.553879 Allocating resources...
1081 01:58:50.556862 Reading resources...
1082 01:58:50.560262 Root Device read_resources bus 0 link: 0
1083 01:58:50.566747 DOMAIN: 0000 read_resources bus 0 link: 0
1084 01:58:50.569880 PCI: 00:04.0 read_resources bus 1 link: 0
1085 01:58:50.576752 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 01:58:50.579634 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 01:58:50.586776 USB0 port 0 read_resources bus 0 link: 0
1088 01:58:50.589624 USB0 port 0 read_resources bus 0 link: 0 done
1089 01:58:50.596739 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 01:58:50.599723 PCI: 00:14.0 read_resources bus 0 link: 0
1091 01:58:50.602859 USB0 port 0 read_resources bus 0 link: 0
1092 01:58:50.611071 USB0 port 0 read_resources bus 0 link: 0 done
1093 01:58:50.613288 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 01:58:50.620737 PCI: 00:14.3 read_resources bus 0 link: 0
1095 01:58:50.623603 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 01:58:50.630631 PCI: 00:15.0 read_resources bus 0 link: 0
1097 01:58:50.633422 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 01:58:50.640504 PCI: 00:15.1 read_resources bus 0 link: 0
1099 01:58:50.643766 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 01:58:50.650702 PCI: 00:19.1 read_resources bus 0 link: 0
1101 01:58:50.654254 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 01:58:50.661120 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 01:58:50.664097 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 01:58:50.671115 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 01:58:50.674161 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 01:58:50.681135 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 01:58:50.684589 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 01:58:50.691263 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 01:58:50.694226 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 01:58:50.698017 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 01:58:50.704297 GENERIC: 0.0 read_resources bus 0 link: 0
1112 01:58:50.707448 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 01:58:50.713817 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 01:58:50.720926 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 01:58:50.723841 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 01:58:50.730491 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 01:58:50.734124 Root Device read_resources bus 0 link: 0 done
1118 01:58:50.737609 Done reading resources.
1119 01:58:50.740430 Show resources in subtree (Root Device)...After reading.
1120 01:58:50.747281 Root Device child on link 0 DOMAIN: 0000
1121 01:58:50.750473 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 01:58:50.760887 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 01:58:50.770152 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 01:58:50.770677 PCI: 00:00.0
1125 01:58:50.788210 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 01:58:50.790572 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 01:58:50.800003 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 01:58:50.809992 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 01:58:50.819915 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 01:58:50.827174 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 01:58:50.836785 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 01:58:50.846860 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 01:58:50.856829 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 01:58:50.866705 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 01:58:50.877082 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 01:58:50.883606 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 01:58:50.892915 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 01:58:50.902831 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 01:58:50.912795 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 01:58:50.922705 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 01:58:50.932743 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 01:58:50.939661 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 01:58:50.949565 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 01:58:50.959255 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 01:58:50.962455 PCI: 00:02.0
1146 01:58:50.972405 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 01:58:50.982497 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 01:58:50.989405 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 01:58:50.996604 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 01:58:51.005895 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 01:58:51.006414 GENERIC: 0.0
1152 01:58:51.009231 PCI: 00:05.0
1153 01:58:51.019310 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 01:58:51.022383 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 01:58:51.026009 GENERIC: 0.0
1156 01:58:51.026523 PCI: 00:08.0
1157 01:58:51.035846 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 01:58:51.039035 PCI: 00:0a.0
1159 01:58:51.042434 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 01:58:51.052482 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 01:58:51.055827 USB0 port 0 child on link 0 USB3 port 0
1162 01:58:51.058890 USB3 port 0
1163 01:58:51.059333 USB3 port 1
1164 01:58:51.062076 USB3 port 2
1165 01:58:51.065939 USB3 port 3
1166 01:58:51.068846 PCI: 00:14.0 child on link 0 USB0 port 0
1167 01:58:51.079573 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 01:58:51.082108 USB0 port 0 child on link 0 USB2 port 0
1169 01:58:51.085715 USB2 port 0
1170 01:58:51.086138 USB2 port 1
1171 01:58:51.089909 USB2 port 2
1172 01:58:51.090430 USB2 port 3
1173 01:58:51.092359 USB2 port 4
1174 01:58:51.092814 USB2 port 5
1175 01:58:51.095741 USB2 port 6
1176 01:58:51.096266 USB2 port 7
1177 01:58:51.098967 USB2 port 8
1178 01:58:51.102169 USB2 port 9
1179 01:58:51.102598 USB3 port 0
1180 01:58:51.105456 USB3 port 1
1181 01:58:51.105875 USB3 port 2
1182 01:58:51.109070 USB3 port 3
1183 01:58:51.109591 PCI: 00:14.2
1184 01:58:51.118972 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 01:58:51.129044 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 01:58:51.132041 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 01:58:51.142432 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 01:58:51.145334 GENERIC: 0.0
1189 01:58:51.148543 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 01:58:51.158904 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 01:58:51.161998 I2C: 00:1a
1192 01:58:51.162419 I2C: 00:31
1193 01:58:51.165560 I2C: 00:32
1194 01:58:51.169230 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 01:58:51.178472 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 01:58:51.179064 I2C: 00:10
1197 01:58:51.181920 PCI: 00:15.2
1198 01:58:51.191612 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 01:58:51.192106 PCI: 00:15.3
1200 01:58:51.201828 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 01:58:51.205704 PCI: 00:16.0
1202 01:58:51.214963 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 01:58:51.218082 PCI: 00:19.0
1204 01:58:51.221924 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 01:58:51.231874 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 01:58:51.232397 I2C: 00:15
1207 01:58:51.238042 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 01:58:51.245198 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 01:58:51.254797 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 01:58:51.264812 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 01:58:51.268057 GENERIC: 0.0
1212 01:58:51.268594 PCI: 01:00.0
1213 01:58:51.278506 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 01:58:51.287824 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 01:58:51.297997 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 01:58:51.298554 PCI: 00:1e.0
1217 01:58:51.311357 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 01:58:51.314384 PCI: 00:1e.2 child on link 0 SPI: 00
1219 01:58:51.324323 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 01:58:51.324800 SPI: 00
1221 01:58:51.327799 PCI: 00:1e.3 child on link 0 SPI: 00
1222 01:58:51.337617 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 01:58:51.340803 SPI: 00
1224 01:58:51.343966 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 01:58:51.354186 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 01:58:51.354703 PNP: 0c09.0
1227 01:58:51.364358 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 01:58:51.367575 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 01:58:51.377617 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 01:58:51.387330 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 01:58:51.390697 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 01:58:51.393916 GENERIC: 0.0
1233 01:58:51.394431 GENERIC: 1.0
1234 01:58:51.397068 PCI: 00:1f.3
1235 01:58:51.407507 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 01:58:51.417035 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 01:58:51.417520 PCI: 00:1f.5
1238 01:58:51.427513 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 01:58:51.431284 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 01:58:51.433637 APIC: 00
1241 01:58:51.434062 APIC: 01
1242 01:58:51.437122 APIC: 05
1243 01:58:51.437626 APIC: 07
1244 01:58:51.437966 APIC: 02
1245 01:58:51.440471 APIC: 04
1246 01:58:51.440943 APIC: 06
1247 01:58:51.441280 APIC: 03
1248 01:58:51.450312 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 01:58:51.453968 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 01:58:51.460248 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 01:58:51.467121 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 01:58:51.470543 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 01:58:51.476980 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 01:58:51.481049 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 01:58:51.487823 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 01:58:51.493508 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 01:58:51.503414 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 01:58:51.510496 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 01:58:51.517349 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 01:58:51.523548 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 01:58:51.530015 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 01:58:51.540265 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 01:58:51.540721 DOMAIN: 0000: Resource ranges:
1264 01:58:51.547051 * Base: 1000, Size: 800, Tag: 100
1265 01:58:51.549963 * Base: 1900, Size: e700, Tag: 100
1266 01:58:51.553600 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 01:58:51.560149 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 01:58:51.566722 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 01:58:51.576817 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 01:58:51.583433 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 01:58:51.590871 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 01:58:51.600856 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 01:58:51.606954 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 01:58:51.613669 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 01:58:51.623785 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 01:58:51.630066 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 01:58:51.636494 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 01:58:51.646522 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 01:58:51.653294 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 01:58:51.659545 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 01:58:51.669264 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 01:58:51.676242 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 01:58:51.682622 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 01:58:51.692929 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 01:58:51.699814 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 01:58:51.706178 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 01:58:51.715974 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 01:58:51.722794 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 01:58:51.729281 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 01:58:51.739341 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 01:58:51.739850 DOMAIN: 0000: Resource ranges:
1292 01:58:51.745608 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 01:58:51.749344 * Base: d0000000, Size: 28000000, Tag: 200
1294 01:58:51.752780 * Base: fa000000, Size: 1000000, Tag: 200
1295 01:58:51.759071 * Base: fb001000, Size: 2fff000, Tag: 200
1296 01:58:51.762465 * Base: fe010000, Size: 2e000, Tag: 200
1297 01:58:51.765862 * Base: fe03f000, Size: d41000, Tag: 200
1298 01:58:51.768799 * Base: fed88000, Size: 8000, Tag: 200
1299 01:58:51.775421 * Base: fed93000, Size: d000, Tag: 200
1300 01:58:51.778724 * Base: feda2000, Size: 1e000, Tag: 200
1301 01:58:51.782469 * Base: fede0000, Size: 1220000, Tag: 200
1302 01:58:51.789142 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 01:58:51.795581 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 01:58:51.802172 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 01:58:51.808870 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 01:58:51.815575 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 01:58:51.822283 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 01:58:51.828651 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 01:58:51.835602 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 01:58:51.841794 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 01:58:51.849297 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 01:58:51.855514 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 01:58:51.862223 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 01:58:51.868572 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 01:58:51.875384 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 01:58:51.881500 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 01:58:51.888783 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 01:58:51.895779 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 01:58:51.902192 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 01:58:51.908629 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 01:58:51.914966 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 01:58:51.921501 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 01:58:51.928177 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 01:58:51.934865 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 01:58:51.941314 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 01:58:51.948455 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 01:58:51.951387 PCI: 00:1d.0: Resource ranges:
1328 01:58:51.958295 * Base: 7fc00000, Size: 100000, Tag: 200
1329 01:58:51.964577 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 01:58:51.971541 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 01:58:51.977782 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 01:58:51.984823 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 01:58:51.991199 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 01:58:51.998034 Root Device assign_resources, bus 0 link: 0
1335 01:58:52.001191 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 01:58:52.011348 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 01:58:52.018155 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 01:58:52.024779 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 01:58:52.034683 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 01:58:52.038432 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 01:58:52.044646 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 01:58:52.051302 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 01:58:52.061706 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 01:58:52.068313 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 01:58:52.071312 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 01:58:52.078814 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 01:58:52.084574 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 01:58:52.091413 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 01:58:52.094872 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 01:58:52.104544 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 01:58:52.111075 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 01:58:52.120913 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 01:58:52.124524 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 01:58:52.127796 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 01:58:52.137666 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 01:58:52.141794 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 01:58:52.147883 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 01:58:52.153995 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 01:58:52.157188 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 01:58:52.163896 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 01:58:52.170533 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 01:58:52.180733 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 01:58:52.187357 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 01:58:52.196990 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 01:58:52.200801 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 01:58:52.206779 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 01:58:52.213609 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 01:58:52.223338 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 01:58:52.233528 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 01:58:52.236973 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 01:58:52.246830 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 01:58:52.253486 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 01:58:52.260080 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 01:58:52.267692 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 01:58:52.273168 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 01:58:52.280163 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 01:58:52.283634 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 01:58:52.293271 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 01:58:52.296645 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 01:58:52.299832 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 01:58:52.306535 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 01:58:52.310136 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 01:58:52.316626 LPC: Trying to open IO window from 800 size 1ff
1384 01:58:52.323286 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 01:58:52.333037 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 01:58:52.339450 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 01:58:52.346333 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 01:58:52.349729 Root Device assign_resources, bus 0 link: 0
1389 01:58:52.352630 Done setting resources.
1390 01:58:52.359228 Show resources in subtree (Root Device)...After assigning values.
1391 01:58:52.362723 Root Device child on link 0 DOMAIN: 0000
1392 01:58:52.366124 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 01:58:52.376322 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 01:58:52.385822 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 01:58:52.389462 PCI: 00:00.0
1396 01:58:52.399360 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 01:58:52.405854 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 01:58:52.416122 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 01:58:52.425891 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 01:58:52.436025 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 01:58:52.445859 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 01:58:52.452283 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 01:58:52.462469 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 01:58:52.472393 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 01:58:52.482589 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 01:58:52.492724 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 01:58:52.501986 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 01:58:52.508769 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 01:58:52.519395 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 01:58:52.529343 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 01:58:52.539324 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 01:58:52.548619 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 01:58:52.558502 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 01:58:52.565150 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 01:58:52.574978 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 01:58:52.578823 PCI: 00:02.0
1417 01:58:52.587995 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 01:58:52.598722 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 01:58:52.608069 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 01:58:52.611521 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 01:58:52.625239 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 01:58:52.625669 GENERIC: 0.0
1423 01:58:52.628268 PCI: 00:05.0
1424 01:58:52.638064 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 01:58:52.641341 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 01:58:52.644841 GENERIC: 0.0
1427 01:58:52.645263 PCI: 00:08.0
1428 01:58:52.654827 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 01:58:52.657969 PCI: 00:0a.0
1430 01:58:52.661501 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 01:58:52.671503 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 01:58:52.678333 USB0 port 0 child on link 0 USB3 port 0
1433 01:58:52.678755 USB3 port 0
1434 01:58:52.681655 USB3 port 1
1435 01:58:52.682081 USB3 port 2
1436 01:58:52.684826 USB3 port 3
1437 01:58:52.688144 PCI: 00:14.0 child on link 0 USB0 port 0
1438 01:58:52.697763 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 01:58:52.701134 USB0 port 0 child on link 0 USB2 port 0
1440 01:58:52.704613 USB2 port 0
1441 01:58:52.708209 USB2 port 1
1442 01:58:52.708773 USB2 port 2
1443 01:58:52.711338 USB2 port 3
1444 01:58:52.711912 USB2 port 4
1445 01:58:52.714377 USB2 port 5
1446 01:58:52.714824 USB2 port 6
1447 01:58:52.718177 USB2 port 7
1448 01:58:52.718598 USB2 port 8
1449 01:58:52.721183 USB2 port 9
1450 01:58:52.721617 USB3 port 0
1451 01:58:52.724388 USB3 port 1
1452 01:58:52.724841 USB3 port 2
1453 01:58:52.727971 USB3 port 3
1454 01:58:52.728457 PCI: 00:14.2
1455 01:58:52.741425 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 01:58:52.751288 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 01:58:52.754484 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 01:58:52.764293 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 01:58:52.767852 GENERIC: 0.0
1460 01:58:52.771037 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 01:58:52.781106 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 01:58:52.784384 I2C: 00:1a
1463 01:58:52.784850 I2C: 00:31
1464 01:58:52.785191 I2C: 00:32
1465 01:58:52.791151 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 01:58:52.801167 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 01:58:52.801652 I2C: 00:10
1468 01:58:52.804295 PCI: 00:15.2
1469 01:58:52.814158 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 01:58:52.814672 PCI: 00:15.3
1471 01:58:52.827728 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 01:58:52.828257 PCI: 00:16.0
1473 01:58:52.837467 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 01:58:52.840573 PCI: 00:19.0
1475 01:58:52.843985 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 01:58:52.854098 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 01:58:52.857530 I2C: 00:15
1478 01:58:52.860720 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 01:58:52.870904 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 01:58:52.880913 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 01:58:52.890518 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 01:58:52.894184 GENERIC: 0.0
1483 01:58:52.894606 PCI: 01:00.0
1484 01:58:52.907367 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 01:58:52.917716 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 01:58:52.927381 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 01:58:52.927852 PCI: 00:1e.0
1488 01:58:52.940627 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 01:58:52.943895 PCI: 00:1e.2 child on link 0 SPI: 00
1490 01:58:52.953718 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 01:58:52.954250 SPI: 00
1492 01:58:52.961169 PCI: 00:1e.3 child on link 0 SPI: 00
1493 01:58:52.970504 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 01:58:52.971233 SPI: 00
1495 01:58:52.973590 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 01:58:52.983239 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 01:58:52.986877 PNP: 0c09.0
1498 01:58:52.993743 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 01:58:53.000334 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 01:58:53.007340 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 01:58:53.017141 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 01:58:53.023717 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 01:58:53.024243 GENERIC: 0.0
1504 01:58:53.026619 GENERIC: 1.0
1505 01:58:53.027089 PCI: 00:1f.3
1506 01:58:53.036615 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 01:58:53.049655 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 01:58:53.050191 PCI: 00:1f.5
1509 01:58:53.059791 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 01:58:53.063331 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 01:58:53.066234 APIC: 00
1512 01:58:53.066704 APIC: 01
1513 01:58:53.069912 APIC: 05
1514 01:58:53.070375 APIC: 07
1515 01:58:53.070743 APIC: 02
1516 01:58:53.073322 APIC: 04
1517 01:58:53.073783 APIC: 06
1518 01:58:53.074153 APIC: 03
1519 01:58:53.076256 Done allocating resources.
1520 01:58:53.083402 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 01:58:53.090076 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 01:58:53.093082 Configure GPIOs for I2S audio on UP4.
1523 01:58:53.100176 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 01:58:53.102926 Enabling resources...
1525 01:58:53.106493 PCI: 00:00.0 subsystem <- 8086/9a12
1526 01:58:53.109593 PCI: 00:00.0 cmd <- 06
1527 01:58:53.112975 PCI: 00:02.0 subsystem <- 8086/9a40
1528 01:58:53.116621 PCI: 00:02.0 cmd <- 03
1529 01:58:53.119744 PCI: 00:04.0 subsystem <- 8086/9a03
1530 01:58:53.122885 PCI: 00:04.0 cmd <- 02
1531 01:58:53.126085 PCI: 00:05.0 subsystem <- 8086/9a19
1532 01:58:53.126507 PCI: 00:05.0 cmd <- 02
1533 01:58:53.133263 PCI: 00:08.0 subsystem <- 8086/9a11
1534 01:58:53.133753 PCI: 00:08.0 cmd <- 06
1535 01:58:53.136286 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 01:58:53.140205 PCI: 00:0d.0 cmd <- 02
1537 01:58:53.142784 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 01:58:53.146350 PCI: 00:14.0 cmd <- 02
1539 01:58:53.149982 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 01:58:53.152821 PCI: 00:14.2 cmd <- 02
1541 01:58:53.156016 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 01:58:53.159325 PCI: 00:14.3 cmd <- 02
1543 01:58:53.162697 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 01:58:53.166236 PCI: 00:15.0 cmd <- 02
1545 01:58:53.169297 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 01:58:53.169721 PCI: 00:15.1 cmd <- 02
1547 01:58:53.176605 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 01:58:53.177188 PCI: 00:15.2 cmd <- 02
1549 01:58:53.179949 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 01:58:53.182987 PCI: 00:15.3 cmd <- 02
1551 01:58:53.186429 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 01:58:53.189362 PCI: 00:16.0 cmd <- 02
1553 01:58:53.192795 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 01:58:53.196551 PCI: 00:19.1 cmd <- 02
1555 01:58:53.199758 PCI: 00:1d.0 bridge ctrl <- 0013
1556 01:58:53.202759 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 01:58:53.206033 PCI: 00:1d.0 cmd <- 06
1558 01:58:53.209662 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 01:58:53.212998 PCI: 00:1e.0 cmd <- 06
1560 01:58:53.216492 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 01:58:53.216974 PCI: 00:1e.2 cmd <- 06
1562 01:58:53.223117 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 01:58:53.223583 PCI: 00:1e.3 cmd <- 02
1564 01:58:53.227211 PCI: 00:1f.0 subsystem <- 8086/a087
1565 01:58:53.229645 PCI: 00:1f.0 cmd <- 407
1566 01:58:53.232869 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 01:58:53.236456 PCI: 00:1f.3 cmd <- 02
1568 01:58:53.240089 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 01:58:53.243436 PCI: 00:1f.5 cmd <- 406
1570 01:58:53.247395 PCI: 01:00.0 cmd <- 02
1571 01:58:53.251661 done.
1572 01:58:53.255867 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 01:58:53.258683 Initializing devices...
1574 01:58:53.261624 Root Device init
1575 01:58:53.265092 Chrome EC: Set SMI mask to 0x0000000000000000
1576 01:58:53.272310 Chrome EC: clear events_b mask to 0x0000000000000000
1577 01:58:53.278478 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 01:58:53.285210 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 01:58:53.291791 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 01:58:53.295130 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 01:58:53.303228 fw_config match found: DB_USB=USB3_ACTIVE
1582 01:58:53.306756 Configure Right Type-C port orientation for retimer
1583 01:58:53.309450 Root Device init finished in 46 msecs
1584 01:58:53.313360 PCI: 00:00.0 init
1585 01:58:53.316990 CPU TDP = 9 Watts
1586 01:58:53.317519 CPU PL1 = 9 Watts
1587 01:58:53.320185 CPU PL2 = 40 Watts
1588 01:58:53.324075 CPU PL4 = 83 Watts
1589 01:58:53.327062 PCI: 00:00.0 init finished in 8 msecs
1590 01:58:53.327625 PCI: 00:02.0 init
1591 01:58:53.330424 GMA: Found VBT in CBFS
1592 01:58:53.333795 GMA: Found valid VBT in CBFS
1593 01:58:53.340473 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 01:58:53.346786 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 01:58:53.350305 PCI: 00:02.0 init finished in 18 msecs
1596 01:58:53.354001 PCI: 00:05.0 init
1597 01:58:53.357456 PCI: 00:05.0 init finished in 0 msecs
1598 01:58:53.359975 PCI: 00:08.0 init
1599 01:58:53.363235 PCI: 00:08.0 init finished in 0 msecs
1600 01:58:53.367060 PCI: 00:14.0 init
1601 01:58:53.369652 PCI: 00:14.0 init finished in 0 msecs
1602 01:58:53.373596 PCI: 00:14.2 init
1603 01:58:53.376743 PCI: 00:14.2 init finished in 0 msecs
1604 01:58:53.379776 PCI: 00:15.0 init
1605 01:58:53.380204 I2C bus 0 version 0x3230302a
1606 01:58:53.387095 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 01:58:53.390428 PCI: 00:15.0 init finished in 6 msecs
1608 01:58:53.390943 PCI: 00:15.1 init
1609 01:58:53.393224 I2C bus 1 version 0x3230302a
1610 01:58:53.396464 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 01:58:53.403199 PCI: 00:15.1 init finished in 6 msecs
1612 01:58:53.403686 PCI: 00:15.2 init
1613 01:58:53.406601 I2C bus 2 version 0x3230302a
1614 01:58:53.409813 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 01:58:53.412854 PCI: 00:15.2 init finished in 6 msecs
1616 01:58:53.416375 PCI: 00:15.3 init
1617 01:58:53.419942 I2C bus 3 version 0x3230302a
1618 01:58:53.423277 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 01:58:53.426597 PCI: 00:15.3 init finished in 6 msecs
1620 01:58:53.429509 PCI: 00:16.0 init
1621 01:58:53.433023 PCI: 00:16.0 init finished in 0 msecs
1622 01:58:53.436804 PCI: 00:19.1 init
1623 01:58:53.439462 I2C bus 5 version 0x3230302a
1624 01:58:53.443320 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 01:58:53.446440 PCI: 00:19.1 init finished in 6 msecs
1626 01:58:53.446904 PCI: 00:1d.0 init
1627 01:58:53.449527 Initializing PCH PCIe bridge.
1628 01:58:53.456659 PCI: 00:1d.0 init finished in 3 msecs
1629 01:58:53.457265 PCI: 00:1f.0 init
1630 01:58:53.463278 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 01:58:53.466475 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 01:58:53.470039 IOAPIC: ID = 0x02
1633 01:58:53.470590 IOAPIC: Dumping registers
1634 01:58:53.473008 reg 0x0000: 0x02000000
1635 01:58:53.476121 reg 0x0001: 0x00770020
1636 01:58:53.479864 reg 0x0002: 0x00000000
1637 01:58:53.483173 PCI: 00:1f.0 init finished in 21 msecs
1638 01:58:53.486405 PCI: 00:1f.2 init
1639 01:58:53.486873 Disabling ACPI via APMC.
1640 01:58:53.491498 APMC done.
1641 01:58:53.494053 PCI: 00:1f.2 init finished in 5 msecs
1642 01:58:53.506313 PCI: 01:00.0 init
1643 01:58:53.509425 PCI: 01:00.0 init finished in 0 msecs
1644 01:58:53.512568 PNP: 0c09.0 init
1645 01:58:53.516442 Google Chrome EC uptime: 8.396 seconds
1646 01:58:53.522345 Google Chrome AP resets since EC boot: 1
1647 01:58:53.525851 Google Chrome most recent AP reset causes:
1648 01:58:53.529479 0.348: 32775 shutdown: entering G3
1649 01:58:53.535953 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 01:58:53.539143 PNP: 0c09.0 init finished in 22 msecs
1651 01:58:53.545316 Devices initialized
1652 01:58:53.548754 Show all devs... After init.
1653 01:58:53.551677 Root Device: enabled 1
1654 01:58:53.552122 DOMAIN: 0000: enabled 1
1655 01:58:53.554897 CPU_CLUSTER: 0: enabled 1
1656 01:58:53.558103 PCI: 00:00.0: enabled 1
1657 01:58:53.561344 PCI: 00:02.0: enabled 1
1658 01:58:53.561764 PCI: 00:04.0: enabled 1
1659 01:58:53.564920 PCI: 00:05.0: enabled 1
1660 01:58:53.567982 PCI: 00:06.0: enabled 0
1661 01:58:53.571801 PCI: 00:07.0: enabled 0
1662 01:58:53.572319 PCI: 00:07.1: enabled 0
1663 01:58:53.574987 PCI: 00:07.2: enabled 0
1664 01:58:53.578393 PCI: 00:07.3: enabled 0
1665 01:58:53.581714 PCI: 00:08.0: enabled 1
1666 01:58:53.582142 PCI: 00:09.0: enabled 0
1667 01:58:53.584588 PCI: 00:0a.0: enabled 0
1668 01:58:53.588347 PCI: 00:0d.0: enabled 1
1669 01:58:53.591288 PCI: 00:0d.1: enabled 0
1670 01:58:53.591711 PCI: 00:0d.2: enabled 0
1671 01:58:53.594888 PCI: 00:0d.3: enabled 0
1672 01:58:53.597999 PCI: 00:0e.0: enabled 0
1673 01:58:53.598424 PCI: 00:10.2: enabled 1
1674 01:58:53.601047 PCI: 00:10.6: enabled 0
1675 01:58:53.604751 PCI: 00:10.7: enabled 0
1676 01:58:53.607627 PCI: 00:12.0: enabled 0
1677 01:58:53.608129 PCI: 00:12.6: enabled 0
1678 01:58:53.611632 PCI: 00:13.0: enabled 0
1679 01:58:53.614418 PCI: 00:14.0: enabled 1
1680 01:58:53.617762 PCI: 00:14.1: enabled 0
1681 01:58:53.618184 PCI: 00:14.2: enabled 1
1682 01:58:53.621209 PCI: 00:14.3: enabled 1
1683 01:58:53.624779 PCI: 00:15.0: enabled 1
1684 01:58:53.628122 PCI: 00:15.1: enabled 1
1685 01:58:53.628583 PCI: 00:15.2: enabled 1
1686 01:58:53.631323 PCI: 00:15.3: enabled 1
1687 01:58:53.634437 PCI: 00:16.0: enabled 1
1688 01:58:53.634859 PCI: 00:16.1: enabled 0
1689 01:58:53.637855 PCI: 00:16.2: enabled 0
1690 01:58:53.641618 PCI: 00:16.3: enabled 0
1691 01:58:53.644776 PCI: 00:16.4: enabled 0
1692 01:58:53.645198 PCI: 00:16.5: enabled 0
1693 01:58:53.648157 PCI: 00:17.0: enabled 0
1694 01:58:53.651283 PCI: 00:19.0: enabled 0
1695 01:58:53.654178 PCI: 00:19.1: enabled 1
1696 01:58:53.654592 PCI: 00:19.2: enabled 0
1697 01:58:53.657608 PCI: 00:1c.0: enabled 1
1698 01:58:53.661098 PCI: 00:1c.1: enabled 0
1699 01:58:53.664540 PCI: 00:1c.2: enabled 0
1700 01:58:53.665004 PCI: 00:1c.3: enabled 0
1701 01:58:53.667772 PCI: 00:1c.4: enabled 0
1702 01:58:53.670921 PCI: 00:1c.5: enabled 0
1703 01:58:53.674494 PCI: 00:1c.6: enabled 1
1704 01:58:53.674916 PCI: 00:1c.7: enabled 0
1705 01:58:53.677337 PCI: 00:1d.0: enabled 1
1706 01:58:53.681329 PCI: 00:1d.1: enabled 0
1707 01:58:53.681870 PCI: 00:1d.2: enabled 1
1708 01:58:53.684588 PCI: 00:1d.3: enabled 0
1709 01:58:53.687831 PCI: 00:1e.0: enabled 1
1710 01:58:53.691108 PCI: 00:1e.1: enabled 0
1711 01:58:53.691526 PCI: 00:1e.2: enabled 1
1712 01:58:53.694326 PCI: 00:1e.3: enabled 1
1713 01:58:53.697793 PCI: 00:1f.0: enabled 1
1714 01:58:53.700601 PCI: 00:1f.1: enabled 0
1715 01:58:53.701065 PCI: 00:1f.2: enabled 1
1716 01:58:53.704050 PCI: 00:1f.3: enabled 1
1717 01:58:53.707544 PCI: 00:1f.4: enabled 0
1718 01:58:53.710672 PCI: 00:1f.5: enabled 1
1719 01:58:53.711161 PCI: 00:1f.6: enabled 0
1720 01:58:53.714332 PCI: 00:1f.7: enabled 0
1721 01:58:53.717638 APIC: 00: enabled 1
1722 01:58:53.718057 GENERIC: 0.0: enabled 1
1723 01:58:53.721195 GENERIC: 0.0: enabled 1
1724 01:58:53.723894 GENERIC: 1.0: enabled 1
1725 01:58:53.727347 GENERIC: 0.0: enabled 1
1726 01:58:53.727860 GENERIC: 1.0: enabled 1
1727 01:58:53.730600 USB0 port 0: enabled 1
1728 01:58:53.734395 GENERIC: 0.0: enabled 1
1729 01:58:53.737292 USB0 port 0: enabled 1
1730 01:58:53.737714 GENERIC: 0.0: enabled 1
1731 01:58:53.740803 I2C: 00:1a: enabled 1
1732 01:58:53.744734 I2C: 00:31: enabled 1
1733 01:58:53.745298 I2C: 00:32: enabled 1
1734 01:58:53.747375 I2C: 00:10: enabled 1
1735 01:58:53.750392 I2C: 00:15: enabled 1
1736 01:58:53.750855 GENERIC: 0.0: enabled 0
1737 01:58:53.754236 GENERIC: 1.0: enabled 0
1738 01:58:53.757388 GENERIC: 0.0: enabled 1
1739 01:58:53.757854 SPI: 00: enabled 1
1740 01:58:53.760227 SPI: 00: enabled 1
1741 01:58:53.763920 PNP: 0c09.0: enabled 1
1742 01:58:53.764442 GENERIC: 0.0: enabled 1
1743 01:58:53.767072 USB3 port 0: enabled 1
1744 01:58:53.770738 USB3 port 1: enabled 1
1745 01:58:53.773868 USB3 port 2: enabled 0
1746 01:58:53.774428 USB3 port 3: enabled 0
1747 01:58:53.777324 USB2 port 0: enabled 0
1748 01:58:53.780834 USB2 port 1: enabled 1
1749 01:58:53.781382 USB2 port 2: enabled 1
1750 01:58:53.783890 USB2 port 3: enabled 0
1751 01:58:53.787219 USB2 port 4: enabled 1
1752 01:58:53.790303 USB2 port 5: enabled 0
1753 01:58:53.790768 USB2 port 6: enabled 0
1754 01:58:53.794102 USB2 port 7: enabled 0
1755 01:58:53.797505 USB2 port 8: enabled 0
1756 01:58:53.798148 USB2 port 9: enabled 0
1757 01:58:53.800182 USB3 port 0: enabled 0
1758 01:58:53.803967 USB3 port 1: enabled 1
1759 01:58:53.804432 USB3 port 2: enabled 0
1760 01:58:53.807040 USB3 port 3: enabled 0
1761 01:58:53.810809 GENERIC: 0.0: enabled 1
1762 01:58:53.813738 GENERIC: 1.0: enabled 1
1763 01:58:53.814161 APIC: 01: enabled 1
1764 01:58:53.816913 APIC: 05: enabled 1
1765 01:58:53.817338 APIC: 07: enabled 1
1766 01:58:53.820771 APIC: 02: enabled 1
1767 01:58:53.823762 APIC: 04: enabled 1
1768 01:58:53.824235 APIC: 06: enabled 1
1769 01:58:53.826895 APIC: 03: enabled 1
1770 01:58:53.830140 PCI: 01:00.0: enabled 1
1771 01:58:53.833602 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1772 01:58:53.840731 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 01:58:53.843518 ELOG: NV offset 0xf30000 size 0x1000
1774 01:58:53.849811 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 01:58:53.856561 ELOG: Event(17) added with size 13 at 2023-08-17 01:58:52 UTC
1776 01:58:53.863269 ELOG: Event(92) added with size 9 at 2023-08-17 01:58:52 UTC
1777 01:58:53.869576 ELOG: Event(93) added with size 9 at 2023-08-17 01:58:52 UTC
1778 01:58:53.876563 ELOG: Event(9E) added with size 10 at 2023-08-17 01:58:52 UTC
1779 01:58:53.883383 ELOG: Event(9F) added with size 14 at 2023-08-17 01:58:52 UTC
1780 01:58:53.890290 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 01:58:53.896383 ELOG: Event(A1) added with size 10 at 2023-08-17 01:58:52 UTC
1782 01:58:53.900212 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 01:58:53.906074 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 01:58:53.909975 Finalize devices...
1785 01:58:53.910398 Devices finalized
1786 01:58:53.916108 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 01:58:53.922788 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 01:58:53.926457 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 01:58:53.932802 ME: HFSTS1 : 0x80030055
1790 01:58:53.936326 ME: HFSTS2 : 0x30280116
1791 01:58:53.939506 ME: HFSTS3 : 0x00000050
1792 01:58:53.946247 ME: HFSTS4 : 0x00004000
1793 01:58:53.949595 ME: HFSTS5 : 0x00000000
1794 01:58:53.953181 ME: HFSTS6 : 0x00400006
1795 01:58:53.959268 ME: Manufacturing Mode : YES
1796 01:58:53.962800 ME: SPI Protection Mode Enabled : NO
1797 01:58:53.965628 ME: FW Partition Table : OK
1798 01:58:53.969290 ME: Bringup Loader Failure : NO
1799 01:58:53.972348 ME: Firmware Init Complete : NO
1800 01:58:53.975771 ME: Boot Options Present : NO
1801 01:58:53.979298 ME: Update In Progress : NO
1802 01:58:53.982307 ME: D0i3 Support : YES
1803 01:58:53.989309 ME: Low Power State Enabled : NO
1804 01:58:53.992591 ME: CPU Replaced : YES
1805 01:58:53.996046 ME: CPU Replacement Valid : YES
1806 01:58:53.999110 ME: Current Working State : 5
1807 01:58:54.002666 ME: Current Operation State : 1
1808 01:58:54.006572 ME: Current Operation Mode : 3
1809 01:58:54.008973 ME: Error Code : 0
1810 01:58:54.012289 ME: Enhanced Debug Mode : NO
1811 01:58:54.019095 ME: CPU Debug Disabled : YES
1812 01:58:54.022582 ME: TXT Support : NO
1813 01:58:54.026037 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 01:58:54.035823 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 01:58:54.039407 CBFS: 'fallback/slic' not found.
1816 01:58:54.042218 ACPI: Writing ACPI tables at 76b01000.
1817 01:58:54.042644 ACPI: * FACS
1818 01:58:54.045776 ACPI: * DSDT
1819 01:58:54.048784 Ramoops buffer: 0x100000@0x76a00000.
1820 01:58:54.056009 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 01:58:54.059055 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 01:58:54.062154 Google Chrome EC: version:
1823 01:58:54.066218 ro: voema_v2.0.7540-147f8d37d1
1824 01:58:54.069241 rw: voema_v2.0.7540-147f8d37d1
1825 01:58:54.072041 running image: 2
1826 01:58:54.079004 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 01:58:54.081861 ACPI: * FADT
1828 01:58:54.082325 SCI is IRQ9
1829 01:58:54.085272 ACPI: added table 1/32, length now 40
1830 01:58:54.088834 ACPI: * SSDT
1831 01:58:54.091906 Found 1 CPU(s) with 8 core(s) each.
1832 01:58:54.095518 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 01:58:54.102200 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 01:58:54.105532 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 01:58:54.108785 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 01:58:54.115302 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 01:58:54.122482 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 01:58:54.125291 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 01:58:54.132312 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 01:58:54.139249 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 01:58:54.142180 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 01:58:54.145260 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 01:58:54.152450 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 01:58:54.155480 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 01:58:54.162105 PS2K: Passing 80 keymaps to kernel
1846 01:58:54.165591 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 01:58:54.172519 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 01:58:54.178890 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 01:58:54.185131 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 01:58:54.191961 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 01:58:54.198924 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 01:58:54.205157 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 01:58:54.211702 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 01:58:54.215469 ACPI: added table 2/32, length now 44
1855 01:58:54.218642 ACPI: * MCFG
1856 01:58:54.221781 ACPI: added table 3/32, length now 48
1857 01:58:54.225179 ACPI: * TPM2
1858 01:58:54.228544 TPM2 log created at 0x769f0000
1859 01:58:54.231691 ACPI: added table 4/32, length now 52
1860 01:58:54.232114 ACPI: * MADT
1861 01:58:54.235706 SCI is IRQ9
1862 01:58:54.238305 ACPI: added table 5/32, length now 56
1863 01:58:54.238725 current = 76b09850
1864 01:58:54.241952 ACPI: * DMAR
1865 01:58:54.245245 ACPI: added table 6/32, length now 60
1866 01:58:54.248600 ACPI: added table 7/32, length now 64
1867 01:58:54.251867 ACPI: * HPET
1868 01:58:54.254974 ACPI: added table 8/32, length now 68
1869 01:58:54.255400 ACPI: done.
1870 01:58:54.258604 ACPI tables: 35216 bytes.
1871 01:58:54.261933 smbios_write_tables: 769ef000
1872 01:58:54.265116 EC returned error result code 3
1873 01:58:54.268183 Couldn't obtain OEM name from CBI
1874 01:58:54.271675 Create SMBIOS type 16
1875 01:58:54.272187 Create SMBIOS type 17
1876 01:58:54.275195 GENERIC: 0.0 (WIFI Device)
1877 01:58:54.278533 SMBIOS tables: 1750 bytes.
1878 01:58:54.281772 Writing table forward entry at 0x00000500
1879 01:58:54.288255 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 01:58:54.291388 Writing coreboot table at 0x76b25000
1881 01:58:54.298439 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 01:58:54.301582 1. 0000000000001000-000000000009ffff: RAM
1883 01:58:54.307753 2. 00000000000a0000-00000000000fffff: RESERVED
1884 01:58:54.311200 3. 0000000000100000-00000000769eefff: RAM
1885 01:58:54.318516 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 01:58:54.321685 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 01:58:54.327922 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 01:58:54.334463 7. 0000000077000000-000000007fbfffff: RESERVED
1889 01:58:54.338145 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 01:58:54.344484 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 01:58:54.347909 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 01:58:54.351508 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 01:58:54.358130 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 01:58:54.361235 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 01:58:54.367587 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 01:58:54.370886 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 01:58:54.374461 16. 0000000100000000-00000002803fffff: RAM
1898 01:58:54.378108 Passing 4 GPIOs to payload:
1899 01:58:54.384245 NAME | PORT | POLARITY | VALUE
1900 01:58:54.390851 lid | undefined | high | high
1901 01:58:54.394291 power | undefined | high | low
1902 01:58:54.400999 oprom | undefined | high | low
1903 01:58:54.404756 EC in RW | 0x000000e5 | high | high
1904 01:58:54.410810 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ba03
1905 01:58:54.414419 coreboot table: 1576 bytes.
1906 01:58:54.417577 IMD ROOT 0. 0x76fff000 0x00001000
1907 01:58:54.420975 IMD SMALL 1. 0x76ffe000 0x00001000
1908 01:58:54.424441 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 01:58:54.427601 VPD 3. 0x76c4d000 0x00000367
1910 01:58:54.435635 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 01:58:54.437565 CONSOLE 5. 0x76c2c000 0x00020000
1912 01:58:54.440730 FMAP 6. 0x76c2b000 0x00000578
1913 01:58:54.444697 TIME STAMP 7. 0x76c2a000 0x00000910
1914 01:58:54.447539 VBOOT WORK 8. 0x76c16000 0x00014000
1915 01:58:54.451140 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 01:58:54.454660 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 01:58:54.457724 RAMSTAGE 11. 0x76b97000 0x00073000
1918 01:58:54.464154 REFCODE 12. 0x76b42000 0x00055000
1919 01:58:54.467515 SMM BACKUP 13. 0x76b32000 0x00010000
1920 01:58:54.471113 4f444749 14. 0x76b30000 0x00002000
1921 01:58:54.474527 EXT VBT15. 0x76b2d000 0x0000219f
1922 01:58:54.477593 COREBOOT 16. 0x76b25000 0x00008000
1923 01:58:54.480974 ACPI 17. 0x76b01000 0x00024000
1924 01:58:54.484427 ACPI GNVS 18. 0x76b00000 0x00001000
1925 01:58:54.487831 RAMOOPS 19. 0x76a00000 0x00100000
1926 01:58:54.490869 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 01:58:54.494864 SMBIOS 21. 0x769ef000 0x00000800
1928 01:58:54.497538 IMD small region:
1929 01:58:54.501114 IMD ROOT 0. 0x76ffec00 0x00000400
1930 01:58:54.504147 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 01:58:54.510731 POWER STATE 2. 0x76ffeb80 0x00000044
1932 01:58:54.514096 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 01:58:54.517532 MEM INFO 4. 0x76ffe980 0x000001e0
1934 01:58:54.524247 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1935 01:58:54.527904 MTRR: Physical address space:
1936 01:58:54.534086 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 01:58:54.537434 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 01:58:54.544222 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 01:58:54.550676 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 01:58:54.557316 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 01:58:54.563561 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 01:58:54.570315 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 01:58:54.573844 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 01:58:54.577357 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 01:58:54.583758 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 01:58:54.587500 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 01:58:54.590628 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 01:58:54.593501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 01:58:54.600660 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 01:58:54.603368 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 01:58:54.606845 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 01:58:54.610380 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 01:58:54.613474 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 01:58:54.618614 call enable_fixed_mtrr()
1955 01:58:54.622096 CPU physical address size: 39 bits
1956 01:58:54.628369 MTRR: default type WB/UC MTRR counts: 6/6.
1957 01:58:54.631674 MTRR: UC selected as default type.
1958 01:58:54.638330 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 01:58:54.641638 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 01:58:54.648562 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 01:58:54.654905 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 01:58:54.661363 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 01:58:54.667856 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 01:58:54.668446
1965 01:58:54.671449 MTRR check
1966 01:58:54.674731 Fixed MTRRs : Enabled
1967 01:58:54.675250 Variable MTRRs: Enabled
1968 01:58:54.675688
1969 01:58:54.681813 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 01:58:54.684573 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 01:58:54.687829 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 01:58:54.691372 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 01:58:54.694888 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 01:58:54.701466 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 01:58:54.704944 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 01:58:54.708103 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 01:58:54.711970 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 01:58:54.718186 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 01:58:54.721543 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 01:58:54.728088 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1981 01:58:54.731326 call enable_fixed_mtrr()
1982 01:58:54.734671 Checking cr50 for pending updates
1983 01:58:54.738814 CPU physical address size: 39 bits
1984 01:58:54.741911 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 01:58:54.746633 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 01:58:54.748815 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 01:58:54.752383 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 01:58:54.759243 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 01:58:54.762367 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 01:58:54.765372 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 01:58:54.768546 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 01:58:54.775369 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 01:58:54.778744 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 01:58:54.781835 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 01:58:54.784803 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 01:58:54.792562 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 01:58:54.793096 call enable_fixed_mtrr()
1998 01:58:54.799119 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 01:58:54.802989 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 01:58:54.805754 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 01:58:54.809056 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 01:58:54.815759 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 01:58:54.818922 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 01:58:54.821991 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 01:58:54.825945 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 01:58:54.831987 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 01:58:54.835530 CPU physical address size: 39 bits
2008 01:58:54.839042 call enable_fixed_mtrr()
2009 01:58:54.842570 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 01:58:54.845323 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 01:58:54.851834 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 01:58:54.855539 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 01:58:54.859037 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 01:58:54.862770 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 01:58:54.868893 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 01:58:54.871983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 01:58:54.875639 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 01:58:54.878710 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 01:58:54.885516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 01:58:54.888758 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 01:58:54.891936 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 01:58:54.895642 call enable_fixed_mtrr()
2023 01:58:54.898835 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 01:58:54.905121 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 01:58:54.909175 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 01:58:54.912100 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 01:58:54.915095 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 01:58:54.921967 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 01:58:54.925690 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 01:58:54.928332 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 01:58:54.932225 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 01:58:54.935879 CPU physical address size: 39 bits
2033 01:58:54.942260 call enable_fixed_mtrr()
2034 01:58:54.945399 CPU physical address size: 39 bits
2035 01:58:54.948865 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 01:58:54.952384 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 01:58:54.955563 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 01:58:54.961912 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 01:58:54.965559 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 01:58:54.968901 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 01:58:54.972861 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 01:58:54.978970 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 01:58:54.981889 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 01:58:54.985239 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 01:58:54.988821 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 01:58:54.991628 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 01:58:54.998775 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 01:58:55.001612 call enable_fixed_mtrr()
2049 01:58:55.005174 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 01:58:55.008630 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 01:58:55.015442 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 01:58:55.018514 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 01:58:55.021528 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 01:58:55.024787 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 01:58:55.028947 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 01:58:55.034701 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 01:58:55.038339 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 01:58:55.041296 CPU physical address size: 39 bits
2059 01:58:55.046285 call enable_fixed_mtrr()
2060 01:58:55.048956 Reading cr50 TPM mode
2061 01:58:55.052826 CPU physical address size: 39 bits
2062 01:58:55.056188 CPU physical address size: 39 bits
2063 01:58:55.063010 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2064 01:58:55.069234 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 01:58:55.073108 Checking segment from ROM address 0xffc02b38
2066 01:58:55.079314 Checking segment from ROM address 0xffc02b54
2067 01:58:55.082887 Loading segment from ROM address 0xffc02b38
2068 01:58:55.085856 code (compression=0)
2069 01:58:55.092581 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 01:58:55.102991 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 01:58:55.105690 it's not compressed!
2072 01:58:55.243554 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 01:58:55.250126 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 01:58:55.257008 Loading segment from ROM address 0xffc02b54
2075 01:58:55.257572 Entry Point 0x30000000
2076 01:58:55.260319 Loaded segments
2077 01:58:55.266272 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2078 01:58:55.309603 Finalizing chipset.
2079 01:58:55.313077 Finalizing SMM.
2080 01:58:55.313637 APMC done.
2081 01:58:55.319967 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 01:58:55.322606 mp_park_aps done after 0 msecs.
2083 01:58:55.326188 Jumping to boot code at 0x30000000(0x76b25000)
2084 01:58:55.335866 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 01:58:55.336434
2086 01:58:55.336872
2087 01:58:55.337218
2088 01:58:55.339363 Starting depthcharge on Voema...
2089 01:58:55.340027
2090 01:58:55.341236 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 01:58:55.341786 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 01:58:55.342217 Setting prompt string to ['volteer:']
2093 01:58:55.342641 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 01:58:55.349413 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 01:58:55.349977
2096 01:58:55.355755 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 01:58:55.356304
2098 01:58:55.362544 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 01:58:55.363110
2100 01:58:55.365857 Failed to find eMMC card reader
2101 01:58:55.366318
2102 01:58:55.366686 Wipe memory regions:
2103 01:58:55.367150
2104 01:58:55.373015 [0x00000000001000, 0x000000000a0000)
2105 01:58:55.373579
2106 01:58:55.375743 [0x00000000100000, 0x00000030000000)
2107 01:58:55.401527
2108 01:58:55.404193 [0x00000032662db0, 0x000000769ef000)
2109 01:58:55.439942
2110 01:58:55.443598 [0x00000100000000, 0x00000280400000)
2111 01:58:55.645776
2112 01:58:55.649273 ec_init: CrosEC protocol v3 supported (256, 256)
2113 01:58:55.649836
2114 01:58:55.655803 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 01:58:55.656368
2116 01:58:55.662388 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 01:58:55.666918
2118 01:58:55.670621 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2119 01:58:55.671224
2120 01:58:55.673426 send_conn_disc_msg: pmc_send_cmd succeeded
2121 01:58:56.104610
2122 01:58:56.104764 R8152: Initializing
2123 01:58:56.104831
2124 01:58:56.108008 Version 6 (ocp_data = 5c30)
2125 01:58:56.108089
2126 01:58:56.111544 R8152: Done initializing
2127 01:58:56.111650
2128 01:58:56.114455 Adding net device
2129 01:58:56.415498
2130 01:58:56.419229 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 01:58:56.419338
2132 01:58:56.419431
2133 01:58:56.419561
2134 01:58:56.422784 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 01:58:56.523131 volteer: tftpboot 192.168.201.1 11304522/tftp-deploy-djwh04xh/kernel/bzImage 11304522/tftp-deploy-djwh04xh/kernel/cmdline 11304522/tftp-deploy-djwh04xh/ramdisk/ramdisk.cpio.gz
2137 01:58:56.523285 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 01:58:56.523396 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 01:58:56.527809 tftpboot 192.168.201.1 11304522/tftp-deploy-djwh04xh/kernel/bzImloy-djwh04xh/kernel/cmdline 11304522/tftp-deploy-djwh04xh/ramdisk/ramdisk.cpio.gz
2140 01:58:56.527892
2141 01:58:56.527960 Waiting for link
2142 01:58:56.730593
2143 01:58:56.730723 done.
2144 01:58:56.730820
2145 01:58:56.730909 MAC: 00:24:32:30:7b:ec
2146 01:58:56.730997
2147 01:58:56.733880 Sending DHCP discover... done.
2148 01:58:56.733972
2149 01:58:56.737212 Waiting for reply... done.
2150 01:58:56.737289
2151 01:58:56.741072 Sending DHCP request... done.
2152 01:58:56.741174
2153 01:58:56.747219 Waiting for reply... done.
2154 01:58:56.747321
2155 01:58:56.747411 My ip is 192.168.201.11
2156 01:58:56.747499
2157 01:58:56.750534 The DHCP server ip is 192.168.201.1
2158 01:58:56.750630
2159 01:58:56.757286 TFTP server IP predefined by user: 192.168.201.1
2160 01:58:56.757361
2161 01:58:56.763776 Bootfile predefined by user: 11304522/tftp-deploy-djwh04xh/kernel/bzImage
2162 01:58:56.763855
2163 01:58:56.766902 Sending tftp read request... done.
2164 01:58:56.767000
2165 01:58:56.770581 Waiting for the transfer...
2166 01:58:56.770653
2167 01:58:57.316948 00000000 ################################################################
2168 01:58:57.317101
2169 01:58:57.864188 00080000 ################################################################
2170 01:58:57.864328
2171 01:58:58.418306 00100000 ################################################################
2172 01:58:58.418472
2173 01:58:58.959728 00180000 ################################################################
2174 01:58:58.959859
2175 01:58:59.504756 00200000 ################################################################
2176 01:58:59.504901
2177 01:59:00.055926 00280000 ################################################################
2178 01:59:00.056072
2179 01:59:00.599060 00300000 ################################################################
2180 01:59:00.599193
2181 01:59:01.151556 00380000 ################################################################
2182 01:59:01.151692
2183 01:59:01.698652 00400000 ################################################################
2184 01:59:01.698813
2185 01:59:02.234585 00480000 ################################################################
2186 01:59:02.234734
2187 01:59:02.771232 00500000 ################################################################
2188 01:59:02.771373
2189 01:59:03.309391 00580000 ################################################################
2190 01:59:03.309540
2191 01:59:03.855154 00600000 ################################################################
2192 01:59:03.855286
2193 01:59:04.390704 00680000 ################################################################
2194 01:59:04.390833
2195 01:59:04.937328 00700000 ################################################################
2196 01:59:04.937459
2197 01:59:05.540264 00780000 ################################################################
2198 01:59:05.540854
2199 01:59:05.819904 00800000 ############################## done.
2200 01:59:05.820423
2201 01:59:05.822268 The bootfile was 8634256 bytes long.
2202 01:59:05.822724
2203 01:59:05.825971 Sending tftp read request... done.
2204 01:59:05.826546
2205 01:59:05.829187 Waiting for the transfer...
2206 01:59:05.829764
2207 01:59:06.437516 00000000 ################################################################
2208 01:59:06.437651
2209 01:59:07.013967 00080000 ################################################################
2210 01:59:07.014101
2211 01:59:07.602811 00100000 ################################################################
2212 01:59:07.603112
2213 01:59:08.296340 00180000 ################################################################
2214 01:59:08.296872
2215 01:59:08.965014 00200000 ################################################################
2216 01:59:08.965161
2217 01:59:09.490767 00280000 ################################################################
2218 01:59:09.490903
2219 01:59:10.008008 00300000 ################################################################
2220 01:59:10.008186
2221 01:59:10.533328 00380000 ################################################################
2222 01:59:10.533477
2223 01:59:11.072444 00400000 ################################################################
2224 01:59:11.072591
2225 01:59:11.609026 00480000 ################################################################
2226 01:59:11.609154
2227 01:59:12.145008 00500000 ################################################################
2228 01:59:12.145137
2229 01:59:12.673440 00580000 ################################################################
2230 01:59:12.673583
2231 01:59:13.201179 00600000 ################################################################
2232 01:59:13.201318
2233 01:59:13.740919 00680000 ################################################################
2234 01:59:13.741060
2235 01:59:14.288883 00700000 ################################################################
2236 01:59:14.289020
2237 01:59:14.833775 00780000 ################################################################
2238 01:59:14.833936
2239 01:59:15.291395 00800000 ##################################################### done.
2240 01:59:15.291546
2241 01:59:15.294966 Sending tftp read request... done.
2242 01:59:15.295054
2243 01:59:15.298298 Waiting for the transfer...
2244 01:59:15.298375
2245 01:59:15.298444 00000000 # done.
2246 01:59:15.298504
2247 01:59:15.308465 Command line loaded dynamically from TFTP file: 11304522/tftp-deploy-djwh04xh/kernel/cmdline
2248 01:59:15.308544
2249 01:59:15.321646 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 01:59:15.328359
2251 01:59:15.331674 Shutting down all USB controllers.
2252 01:59:15.331770
2253 01:59:15.331837 Removing current net device
2254 01:59:15.331898
2255 01:59:15.334937 Finalizing coreboot
2256 01:59:15.335017
2257 01:59:15.342003 Exiting depthcharge with code 4 at timestamp: 28639088
2258 01:59:15.342082
2259 01:59:15.342144
2260 01:59:15.342204 Starting kernel ...
2261 01:59:15.342261
2262 01:59:15.342320
2263 01:59:15.342688 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2264 01:59:15.342783 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2265 01:59:15.342862 Setting prompt string to ['Linux version [0-9]']
2266 01:59:15.342932 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2267 01:59:15.342999 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2269 02:03:40.343812 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2271 02:03:40.344965 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2273 02:03:40.345844 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 02:03:40.347230 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 02:03:40.348080 Cleaning after the job
2279 02:03:40.348170 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/ramdisk
2280 02:03:40.349646 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/kernel
2281 02:03:40.350929 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304522/tftp-deploy-djwh04xh/modules
2282 02:03:40.351267 start: 5.1 power-off (timeout 00:00:30) [common]
2283 02:03:40.351422 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2284 02:03:40.434132 >> Command sent successfully.
2285 02:03:40.439835 Returned 0 in 0 seconds
2286 02:03:40.540992 end: 5.1 power-off (duration 00:00:00) [common]
2288 02:03:40.543112 start: 5.2 read-feedback (timeout 00:10:00) [common]
2289 02:03:40.544632 Listened to connection for namespace 'common' for up to 1s
2290 02:03:41.544929 Finalising connection for namespace 'common'
2291 02:03:41.545602 Disconnecting from shell: Finalise
2292 02:03:41.546045
2293 02:03:41.647093 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 02:03:41.647746 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11304522
2295 02:03:41.701354 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11304522
2296 02:03:41.701552 JobError: Your job cannot terminate cleanly.