Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: UNKNOWN
- Kernel Errors: 0
- Errors: 2
1 01:58:52.558881 lava-dispatcher, installed at version: 2023.06
2 01:58:52.559097 start: 0 validate
3 01:58:52.559287 Start time: 2023-08-17 01:58:52.559263+00:00 (UTC)
4 01:58:52.559423 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:58:52.559572 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 01:58:52.814135 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:58:52.814996 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip78-rt45%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:58:55.822572 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:58:55.823364 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 01:58:56.078513 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:58:56.079254 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip78-rt45%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
12 01:58:56.587213 validate duration: 4.03
14 01:58:56.587480 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:58:56.587576 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:58:56.587662 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:58:56.587823 Not decompressing ramdisk as can be used compressed.
18 01:58:56.587940 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 01:58:56.588011 saving as /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/ramdisk/initrd.cpio.gz
20 01:58:56.588075 total size: 5432690 (5 MB)
21 01:58:56.589136 progress 0 % (0 MB)
22 01:58:56.590914 progress 5 % (0 MB)
23 01:58:56.592357 progress 10 % (0 MB)
24 01:58:56.593893 progress 15 % (0 MB)
25 01:58:56.595616 progress 20 % (1 MB)
26 01:58:56.597081 progress 25 % (1 MB)
27 01:58:56.598605 progress 30 % (1 MB)
28 01:58:56.600291 progress 35 % (1 MB)
29 01:58:56.601703 progress 40 % (2 MB)
30 01:58:56.603232 progress 45 % (2 MB)
31 01:58:56.604734 progress 50 % (2 MB)
32 01:58:56.606403 progress 55 % (2 MB)
33 01:58:56.607991 progress 60 % (3 MB)
34 01:58:56.609397 progress 65 % (3 MB)
35 01:58:56.611020 progress 70 % (3 MB)
36 01:58:56.612418 progress 75 % (3 MB)
37 01:58:56.613809 progress 80 % (4 MB)
38 01:58:56.615249 progress 85 % (4 MB)
39 01:58:56.616802 progress 90 % (4 MB)
40 01:58:56.618207 progress 95 % (4 MB)
41 01:58:56.619704 progress 100 % (5 MB)
42 01:58:56.619919 5 MB downloaded in 0.03 s (162.70 MB/s)
43 01:58:56.620087 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:58:56.620326 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:58:56.620411 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:58:56.620493 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:58:56.620631 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip78-rt45/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
49 01:58:56.620703 saving as /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/kernel/bzImage
50 01:58:56.620763 total size: 8634256 (8 MB)
51 01:58:56.620824 No compression specified
52 01:58:56.621947 progress 0 % (0 MB)
53 01:58:56.624360 progress 5 % (0 MB)
54 01:58:56.626691 progress 10 % (0 MB)
55 01:58:56.628958 progress 15 % (1 MB)
56 01:58:56.631274 progress 20 % (1 MB)
57 01:58:56.633596 progress 25 % (2 MB)
58 01:58:56.636038 progress 30 % (2 MB)
59 01:58:56.638348 progress 35 % (2 MB)
60 01:58:56.640683 progress 40 % (3 MB)
61 01:58:56.642996 progress 45 % (3 MB)
62 01:58:56.645347 progress 50 % (4 MB)
63 01:58:56.647663 progress 55 % (4 MB)
64 01:58:56.650107 progress 60 % (4 MB)
65 01:58:56.652466 progress 65 % (5 MB)
66 01:58:56.654727 progress 70 % (5 MB)
67 01:58:56.656976 progress 75 % (6 MB)
68 01:58:56.659241 progress 80 % (6 MB)
69 01:58:56.661534 progress 85 % (7 MB)
70 01:58:56.663953 progress 90 % (7 MB)
71 01:58:56.666169 progress 95 % (7 MB)
72 01:58:56.668425 progress 100 % (8 MB)
73 01:58:56.668596 8 MB downloaded in 0.05 s (172.16 MB/s)
74 01:58:56.668743 end: 1.2.1 http-download (duration 00:00:00) [common]
76 01:58:56.668979 end: 1.2 download-retry (duration 00:00:00) [common]
77 01:58:56.669063 start: 1.3 download-retry (timeout 00:10:00) [common]
78 01:58:56.669148 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 01:58:56.669286 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 01:58:56.669354 saving as /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/nfsrootfs/full.rootfs.tar
81 01:58:56.669414 total size: 133380384 (127 MB)
82 01:58:56.669474 Using unxz to decompress xz
83 01:58:56.673623 progress 0 % (0 MB)
84 01:58:57.017186 progress 5 % (6 MB)
85 01:58:57.374435 progress 10 % (12 MB)
86 01:58:57.663474 progress 15 % (19 MB)
87 01:58:57.849644 progress 20 % (25 MB)
88 01:58:58.092190 progress 25 % (31 MB)
89 01:58:58.438490 progress 30 % (38 MB)
90 01:58:58.784607 progress 35 % (44 MB)
91 01:58:59.187297 progress 40 % (50 MB)
92 01:58:59.574259 progress 45 % (57 MB)
93 01:58:59.936221 progress 50 % (63 MB)
94 01:59:00.312598 progress 55 % (69 MB)
95 01:59:00.679152 progress 60 % (76 MB)
96 01:59:01.053348 progress 65 % (82 MB)
97 01:59:01.420098 progress 70 % (89 MB)
98 01:59:01.789024 progress 75 % (95 MB)
99 01:59:02.231476 progress 80 % (101 MB)
100 01:59:02.664709 progress 85 % (108 MB)
101 01:59:02.931766 progress 90 % (114 MB)
102 01:59:03.290582 progress 95 % (120 MB)
103 01:59:03.684016 progress 100 % (127 MB)
104 01:59:03.689335 127 MB downloaded in 7.02 s (18.12 MB/s)
105 01:59:03.689585 end: 1.3.1 http-download (duration 00:00:07) [common]
107 01:59:03.689848 end: 1.3 download-retry (duration 00:00:07) [common]
108 01:59:03.689935 start: 1.4 download-retry (timeout 00:09:53) [common]
109 01:59:03.690022 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 01:59:03.690175 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip78-rt45/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
111 01:59:03.690249 saving as /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/modules/modules.tar
112 01:59:03.690309 total size: 256124 (0 MB)
113 01:59:03.690372 Using unxz to decompress xz
114 01:59:03.694682 progress 12 % (0 MB)
115 01:59:03.695085 progress 25 % (0 MB)
116 01:59:03.695322 progress 38 % (0 MB)
117 01:59:03.696911 progress 51 % (0 MB)
118 01:59:03.698763 progress 63 % (0 MB)
119 01:59:03.700658 progress 76 % (0 MB)
120 01:59:03.702503 progress 89 % (0 MB)
121 01:59:03.704272 progress 100 % (0 MB)
122 01:59:03.710064 0 MB downloaded in 0.02 s (12.37 MB/s)
123 01:59:03.710300 end: 1.4.1 http-download (duration 00:00:00) [common]
125 01:59:03.710572 end: 1.4 download-retry (duration 00:00:00) [common]
126 01:59:03.710707 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 01:59:03.710801 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 01:59:05.901338 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11304530/extract-nfsrootfs-ml0uwszd
129 01:59:05.901539 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 01:59:05.901642 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 01:59:05.901799 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u
132 01:59:05.901928 makedir: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin
133 01:59:05.902033 makedir: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/tests
134 01:59:05.902131 makedir: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/results
135 01:59:05.902232 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-add-keys
136 01:59:05.902373 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-add-sources
137 01:59:05.902503 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-background-process-start
138 01:59:05.902635 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-background-process-stop
139 01:59:05.902761 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-common-functions
140 01:59:05.902886 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-echo-ipv4
141 01:59:05.903011 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-install-packages
142 01:59:05.903135 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-installed-packages
143 01:59:05.903257 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-os-build
144 01:59:05.903383 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-probe-channel
145 01:59:05.903506 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-probe-ip
146 01:59:05.903629 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-target-ip
147 01:59:05.903751 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-target-mac
148 01:59:05.903875 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-target-storage
149 01:59:05.904001 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-case
150 01:59:05.904128 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-event
151 01:59:05.904251 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-feedback
152 01:59:05.904375 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-raise
153 01:59:05.904498 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-reference
154 01:59:05.904622 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-runner
155 01:59:05.904745 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-set
156 01:59:05.904868 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-test-shell
157 01:59:05.904993 Updating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-install-packages (oe)
158 01:59:05.905148 Updating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/bin/lava-installed-packages (oe)
159 01:59:05.905270 Creating /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/environment
160 01:59:05.905367 LAVA metadata
161 01:59:05.905437 - LAVA_JOB_ID=11304530
162 01:59:05.905501 - LAVA_DISPATCHER_IP=192.168.201.1
163 01:59:05.905602 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 01:59:05.905668 skipped lava-vland-overlay
165 01:59:05.905743 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 01:59:05.905823 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 01:59:05.905884 skipped lava-multinode-overlay
168 01:59:05.905955 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 01:59:05.906031 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 01:59:05.906102 Loading test definitions
171 01:59:05.906188 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 01:59:05.906257 Using /lava-11304530 at stage 0
173 01:59:05.906574 uuid=11304530_1.5.2.3.1 testdef=None
174 01:59:05.906667 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 01:59:05.906751 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 01:59:05.907259 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 01:59:05.907475 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 01:59:05.908110 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 01:59:05.908337 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 01:59:05.908953 runner path: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/0/tests/0_dmesg test_uuid 11304530_1.5.2.3.1
183 01:59:05.909109 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 01:59:05.909332 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 01:59:05.909403 Using /lava-11304530 at stage 1
187 01:59:05.909702 uuid=11304530_1.5.2.3.5 testdef=None
188 01:59:05.909789 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 01:59:05.909872 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 01:59:05.910336 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 01:59:05.910548 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 01:59:05.911484 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 01:59:05.911711 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 01:59:05.912333 runner path: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/1/tests/1_bootrr test_uuid 11304530_1.5.2.3.5
197 01:59:05.912485 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 01:59:05.912689 Creating lava-test-runner.conf files
200 01:59:05.912751 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/0 for stage 0
201 01:59:05.912842 - 0_dmesg
202 01:59:05.912921 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11304530/lava-overlay-jo4he56u/lava-11304530/1 for stage 1
203 01:59:05.913013 - 1_bootrr
204 01:59:05.913107 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 01:59:05.913190 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 01:59:05.920839 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 01:59:05.920978 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 01:59:05.921094 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 01:59:05.921209 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 01:59:05.921323 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 01:59:06.059809 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 01:59:06.060209 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 01:59:06.060332 extracting modules file /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11304530/extract-nfsrootfs-ml0uwszd
214 01:59:06.074897 extracting modules file /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11304530/extract-overlay-ramdisk-e5lmjl3s/ramdisk
215 01:59:06.088715 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 01:59:06.088876 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 01:59:06.088969 [common] Applying overlay to NFS
218 01:59:06.089043 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11304530/compress-overlay-5_2ml__5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11304530/extract-nfsrootfs-ml0uwszd
219 01:59:06.097260 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 01:59:06.097419 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 01:59:06.097515 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 01:59:06.097602 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 01:59:06.097680 Building ramdisk /var/lib/lava/dispatcher/tmp/11304530/extract-overlay-ramdisk-e5lmjl3s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11304530/extract-overlay-ramdisk-e5lmjl3s/ramdisk
224 01:59:06.190839 >> 26221 blocks
225 01:59:06.735863 rename /var/lib/lava/dispatcher/tmp/11304530/extract-overlay-ramdisk-e5lmjl3s/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/ramdisk/ramdisk.cpio.gz
226 01:59:06.736319 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 01:59:06.736440 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 01:59:06.736544 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 01:59:06.736640 No mkimage arch provided, not using FIT.
230 01:59:06.736731 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 01:59:06.736818 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 01:59:06.736924 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 01:59:06.737014 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 01:59:06.737090 No LXC device requested
235 01:59:06.737165 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 01:59:06.737247 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 01:59:06.737327 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 01:59:06.737397 Checking files for TFTP limit of 4294967296 bytes.
239 01:59:06.737803 end: 1 tftp-deploy (duration 00:00:10) [common]
240 01:59:06.737904 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 01:59:06.737990 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 01:59:06.738111 substitutions:
243 01:59:06.738178 - {DTB}: None
244 01:59:06.738238 - {INITRD}: 11304530/tftp-deploy-ufgfty0_/ramdisk/ramdisk.cpio.gz
245 01:59:06.738296 - {KERNEL}: 11304530/tftp-deploy-ufgfty0_/kernel/bzImage
246 01:59:06.738356 - {LAVA_MAC}: None
247 01:59:06.738410 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11304530/extract-nfsrootfs-ml0uwszd
248 01:59:06.738466 - {NFS_SERVER_IP}: 192.168.201.1
249 01:59:06.738519 - {PRESEED_CONFIG}: None
250 01:59:06.738572 - {PRESEED_LOCAL}: None
251 01:59:06.738676 - {RAMDISK}: 11304530/tftp-deploy-ufgfty0_/ramdisk/ramdisk.cpio.gz
252 01:59:06.738731 - {ROOT_PART}: None
253 01:59:06.738786 - {ROOT}: None
254 01:59:06.738839 - {SERVER_IP}: 192.168.201.1
255 01:59:06.738891 - {TEE}: None
256 01:59:06.738944 Parsed boot commands:
257 01:59:06.738995 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 01:59:06.739174 Parsed boot commands: tftpboot 192.168.201.1 11304530/tftp-deploy-ufgfty0_/kernel/bzImage 11304530/tftp-deploy-ufgfty0_/kernel/cmdline 11304530/tftp-deploy-ufgfty0_/ramdisk/ramdisk.cpio.gz
259 01:59:06.739264 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 01:59:06.739346 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 01:59:06.739436 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 01:59:06.739524 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 01:59:06.739592 Not connected, no need to disconnect.
264 01:59:06.739666 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 01:59:06.739748 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 01:59:06.739814 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-8'
267 01:59:06.743833 Setting prompt string to ['lava-test: # ']
268 01:59:06.744193 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 01:59:06.744304 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 01:59:06.744419 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 01:59:06.744509 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 01:59:06.744708 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
273 01:59:11.901652 >> Command sent successfully.
274 01:59:11.913233 Returned 0 in 5 seconds
275 01:59:12.014729 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 01:59:12.016889 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 01:59:12.017452 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 01:59:12.017964 Setting prompt string to 'Starting depthcharge on Voema...'
280 01:59:12.018333 Changing prompt to 'Starting depthcharge on Voema...'
281 01:59:12.018764 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 01:59:12.020187 [Enter `^Ec?' for help]
283 01:59:13.636727
284 01:59:13.637309
285 01:59:13.646296 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 01:59:13.652575 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 01:59:13.655908 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 01:59:13.659605 CPU: AES supported, TXT NOT supported, VT supported
289 01:59:13.665825 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 01:59:13.672389 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 01:59:13.675791 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 01:59:13.678828 VBOOT: Loading verstage.
293 01:59:13.686121 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 01:59:13.689056 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 01:59:13.695753 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 01:59:13.702034 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 01:59:13.709077 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 01:59:13.712315
299 01:59:13.712739
300 01:59:13.722127 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 01:59:13.737182 Probing TPM: . done!
302 01:59:13.740229 TPM ready after 0 ms
303 01:59:13.743633 Connected to device vid:did:rid of 1ae0:0028:00
304 01:59:13.755038 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 01:59:13.761252 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 01:59:13.764537 Initialized TPM device CR50 revision 0
307 01:59:13.818631 tlcl_send_startup: Startup return code is 0
308 01:59:13.819146 TPM: setup succeeded
309 01:59:13.833407 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 01:59:13.846976 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 01:59:13.860030 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 01:59:13.869496 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 01:59:13.873440 Chrome EC: UHEPI supported
314 01:59:13.876725 Phase 1
315 01:59:13.879758 FMAP: area GBB found @ 1805000 (458752 bytes)
316 01:59:13.889754 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 01:59:13.896420 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 01:59:13.902896 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 01:59:13.909441 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 01:59:13.912860 Recovery requested (1009000e)
321 01:59:13.916084 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 01:59:13.928086 tlcl_extend: response is 0
323 01:59:13.934300 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 01:59:13.944811 tlcl_extend: response is 0
325 01:59:13.951351 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 01:59:13.957729 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 01:59:13.963972 BS: verstage times (exec / console): total (unknown) / 142 ms
328 01:59:13.964494
329 01:59:13.965110
330 01:59:13.977164 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 01:59:13.983855 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 01:59:13.986984 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 01:59:13.993924 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 01:59:13.996978 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 01:59:14.000224 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 01:59:14.003514 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 01:59:14.007203 TCO_STS: 0000 0000
338 01:59:14.010575 GEN_PMCON: d0015038 00002200
339 01:59:14.013552 GBLRST_CAUSE: 00000000 00000000
340 01:59:14.016736 HPR_CAUSE0: 00000000
341 01:59:14.017159 prev_sleep_state 5
342 01:59:14.020039 Boot Count incremented to 21931
343 01:59:14.027026 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 01:59:14.033453 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 01:59:14.043208 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 01:59:14.050199 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 01:59:14.053032 Chrome EC: UHEPI supported
348 01:59:14.059798 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 01:59:14.071598 Probing TPM: done!
350 01:59:14.078994 Connected to device vid:did:rid of 1ae0:0028:00
351 01:59:14.089419 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
352 01:59:14.096420 Initialized TPM device CR50 revision 0
353 01:59:14.106406 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 01:59:14.113362 MRC: Hash idx 0x100b comparison successful.
355 01:59:14.116506 MRC cache found, size faa8
356 01:59:14.116985 bootmode is set to: 2
357 01:59:14.119803 SPD index = 0
358 01:59:14.126445 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 01:59:14.130019 SPD: module type is LPDDR4X
360 01:59:14.136664 SPD: module part number is MT53E512M64D4NW-046
361 01:59:14.139906 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 01:59:14.146491 SPD: device width 16 bits, bus width 16 bits
363 01:59:14.149808 SPD: module size is 1024 MB (per channel)
364 01:59:14.594665 CBMEM:
365 01:59:14.597959 IMD: root @ 0x76fff000 254 entries.
366 01:59:14.601385 IMD: root @ 0x76ffec00 62 entries.
367 01:59:14.604302 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 01:59:14.611025 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 01:59:14.614492 External stage cache:
370 01:59:14.617472 IMD: root @ 0x7b3ff000 254 entries.
371 01:59:14.620960 IMD: root @ 0x7b3fec00 62 entries.
372 01:59:14.636343 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 01:59:14.643238 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 01:59:14.649537 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 01:59:14.663995 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 01:59:14.667325 cse_lite: Skip switching to RW in the recovery path
377 01:59:14.670610 8 DIMMs found
378 01:59:14.670696 SMM Memory Map
379 01:59:14.673963 SMRAM : 0x7b000000 0x800000
380 01:59:14.677184 Subregion 0: 0x7b000000 0x200000
381 01:59:14.680706 Subregion 1: 0x7b200000 0x200000
382 01:59:14.687383 Subregion 2: 0x7b400000 0x400000
383 01:59:14.687466 top_of_ram = 0x77000000
384 01:59:14.693982 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 01:59:14.700566 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 01:59:14.703810 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 01:59:14.710727 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 01:59:14.717073 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 01:59:14.724253 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 01:59:14.733412 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 01:59:14.736742 Processing 211 relocs. Offset value of 0x74c0b000
392 01:59:14.746523 BS: romstage times (exec / console): total (unknown) / 277 ms
393 01:59:14.752794
394 01:59:14.752877
395 01:59:14.762499 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 01:59:14.765822 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 01:59:14.775775 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 01:59:14.782342 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 01:59:14.788820 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 01:59:14.795238 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 01:59:14.842561 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 01:59:14.849608 Processing 5008 relocs. Offset value of 0x75d98000
403 01:59:14.852462 BS: postcar times (exec / console): total (unknown) / 59 ms
404 01:59:14.856388
405 01:59:14.856482
406 01:59:14.866086 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 01:59:14.866170 Normal boot
408 01:59:14.869164 FW_CONFIG value is 0x804c02
409 01:59:14.872773 PCI: 00:07.0 disabled by fw_config
410 01:59:14.876009 PCI: 00:07.1 disabled by fw_config
411 01:59:14.879176 PCI: 00:0d.2 disabled by fw_config
412 01:59:14.882499 PCI: 00:1c.7 disabled by fw_config
413 01:59:14.889157 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 01:59:14.895885 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 01:59:14.899212 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 01:59:14.905725 GENERIC: 0.0 disabled by fw_config
417 01:59:14.909031 GENERIC: 1.0 disabled by fw_config
418 01:59:14.912280 fw_config match found: DB_USB=USB3_ACTIVE
419 01:59:14.915654 fw_config match found: DB_USB=USB3_ACTIVE
420 01:59:14.919014 fw_config match found: DB_USB=USB3_ACTIVE
421 01:59:14.925408 fw_config match found: DB_USB=USB3_ACTIVE
422 01:59:14.928797 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 01:59:14.936051 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 01:59:14.945580 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 01:59:14.952191 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 01:59:14.955354 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 01:59:14.962417 microcode: Update skipped, already up-to-date
428 01:59:14.968486 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 01:59:14.996388 Detected 4 core, 8 thread CPU.
430 01:59:15.000056 Setting up SMI for CPU
431 01:59:15.003215 IED base = 0x7b400000
432 01:59:15.003296 IED size = 0x00400000
433 01:59:15.006441 Will perform SMM setup.
434 01:59:15.012870 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 01:59:15.019763 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 01:59:15.026151 Processing 16 relocs. Offset value of 0x00030000
437 01:59:15.029701 Attempting to start 7 APs
438 01:59:15.032646 Waiting for 10ms after sending INIT.
439 01:59:15.049273 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 01:59:15.051700 AP: slot 6 apic_id 2.
441 01:59:15.054916 AP: slot 2 apic_id 3.
442 01:59:15.054997 AP: slot 7 apic_id 6.
443 01:59:15.058287 AP: slot 3 apic_id 7.
444 01:59:15.061451 AP: slot 4 apic_id 5.
445 01:59:15.061575 AP: slot 5 apic_id 4.
446 01:59:15.061638 done.
447 01:59:15.068327 Waiting for 2nd SIPI to complete...done.
448 01:59:15.075364 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 01:59:15.081302 Processing 13 relocs. Offset value of 0x00038000
450 01:59:15.084694 Unable to locate Global NVS
451 01:59:15.091390 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 01:59:15.094565 Installing permanent SMM handler to 0x7b000000
453 01:59:15.104748 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 01:59:15.107692 Processing 794 relocs. Offset value of 0x7b010000
455 01:59:15.117662 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 01:59:15.121041 Processing 13 relocs. Offset value of 0x7b008000
457 01:59:15.127516 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 01:59:15.134543 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 01:59:15.140922 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 01:59:15.144184 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 01:59:15.150566 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 01:59:15.157091 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 01:59:15.163738 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 01:59:15.167144 Unable to locate Global NVS
465 01:59:15.173630 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 01:59:15.176945 Clearing SMI status registers
467 01:59:15.180246 SMI_STS: PM1
468 01:59:15.180328 PM1_STS: PWRBTN
469 01:59:15.186975 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 01:59:15.189899 In relocation handler: CPU 0
471 01:59:15.196533 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 01:59:15.199900 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 01:59:15.203367 Relocation complete.
474 01:59:15.209706 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 01:59:15.213211 In relocation handler: CPU 1
476 01:59:15.216273 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 01:59:15.220063 Relocation complete.
478 01:59:15.226564 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 01:59:15.229580 In relocation handler: CPU 2
480 01:59:15.232811 New SMBASE=0x7afff800 IEDBASE=0x7b400000
481 01:59:15.236539 Relocation complete.
482 01:59:15.242721 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 01:59:15.246338 In relocation handler: CPU 6
484 01:59:15.249554 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 01:59:15.256115 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 01:59:15.256198 Relocation complete.
487 01:59:15.262328 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
488 01:59:15.265820 In relocation handler: CPU 3
489 01:59:15.272478 New SMBASE=0x7afff400 IEDBASE=0x7b400000
490 01:59:15.272561 Relocation complete.
491 01:59:15.279136 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
492 01:59:15.282201 In relocation handler: CPU 5
493 01:59:15.289000 New SMBASE=0x7affec00 IEDBASE=0x7b400000
494 01:59:15.292136 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 01:59:15.295602 Relocation complete.
496 01:59:15.302321 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
497 01:59:15.305463 In relocation handler: CPU 4
498 01:59:15.308636 New SMBASE=0x7afff000 IEDBASE=0x7b400000
499 01:59:15.311854 Relocation complete.
500 01:59:15.318350 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
501 01:59:15.322437 In relocation handler: CPU 7
502 01:59:15.325069 New SMBASE=0x7affe400 IEDBASE=0x7b400000
503 01:59:15.331664 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 01:59:15.331776 Relocation complete.
505 01:59:15.334946 Initializing CPU #0
506 01:59:15.338253 CPU: vendor Intel device 806c1
507 01:59:15.341765 CPU: family 06, model 8c, stepping 01
508 01:59:15.344950 Clearing out pending MCEs
509 01:59:15.348320 Setting up local APIC...
510 01:59:15.348403 apic_id: 0x00 done.
511 01:59:15.351408 Turbo is available but hidden
512 01:59:15.354771 Turbo is available and visible
513 01:59:15.361451 microcode: Update skipped, already up-to-date
514 01:59:15.361534 CPU #0 initialized
515 01:59:15.364529 Initializing CPU #4
516 01:59:15.364611 Initializing CPU #5
517 01:59:15.368094 CPU: vendor Intel device 806c1
518 01:59:15.374522 CPU: family 06, model 8c, stepping 01
519 01:59:15.374627 CPU: vendor Intel device 806c1
520 01:59:15.381402 CPU: family 06, model 8c, stepping 01
521 01:59:15.381484 Clearing out pending MCEs
522 01:59:15.384559 Clearing out pending MCEs
523 01:59:15.388053 Setting up local APIC...
524 01:59:15.391459 Initializing CPU #7
525 01:59:15.391542 apic_id: 0x05 done.
526 01:59:15.394837 Setting up local APIC...
527 01:59:15.397920 CPU: vendor Intel device 806c1
528 01:59:15.401247 CPU: family 06, model 8c, stepping 01
529 01:59:15.404710 Initializing CPU #3
530 01:59:15.404792 Clearing out pending MCEs
531 01:59:15.408144 CPU: vendor Intel device 806c1
532 01:59:15.414499 CPU: family 06, model 8c, stepping 01
533 01:59:15.414581 Setting up local APIC...
534 01:59:15.417733 Initializing CPU #6
535 01:59:15.421347 Initializing CPU #2
536 01:59:15.421429 apic_id: 0x04 done.
537 01:59:15.427915 microcode: Update skipped, already up-to-date
538 01:59:15.430750 microcode: Update skipped, already up-to-date
539 01:59:15.433947 Clearing out pending MCEs
540 01:59:15.437323 apic_id: 0x06 done.
541 01:59:15.437406 Setting up local APIC...
542 01:59:15.440916 CPU #5 initialized
543 01:59:15.440996 CPU #4 initialized
544 01:59:15.447208 microcode: Update skipped, already up-to-date
545 01:59:15.447304 apic_id: 0x07 done.
546 01:59:15.450770 CPU #7 initialized
547 01:59:15.454020 microcode: Update skipped, already up-to-date
548 01:59:15.457307 CPU: vendor Intel device 806c1
549 01:59:15.463880 CPU: family 06, model 8c, stepping 01
550 01:59:15.467312 CPU: vendor Intel device 806c1
551 01:59:15.470440 CPU: family 06, model 8c, stepping 01
552 01:59:15.470521 Clearing out pending MCEs
553 01:59:15.473870 Clearing out pending MCEs
554 01:59:15.476920 Setting up local APIC...
555 01:59:15.480513 CPU #3 initialized
556 01:59:15.480593 Setting up local APIC...
557 01:59:15.483872 Initializing CPU #1
558 01:59:15.486996 apic_id: 0x02 done.
559 01:59:15.487077 apic_id: 0x03 done.
560 01:59:15.490383 CPU: vendor Intel device 806c1
561 01:59:15.493595 CPU: family 06, model 8c, stepping 01
562 01:59:15.496896 Clearing out pending MCEs
563 01:59:15.503721 microcode: Update skipped, already up-to-date
564 01:59:15.507073 microcode: Update skipped, already up-to-date
565 01:59:15.510035 CPU #6 initialized
566 01:59:15.510116 CPU #2 initialized
567 01:59:15.513802 Setting up local APIC...
568 01:59:15.516945 apic_id: 0x01 done.
569 01:59:15.520190 microcode: Update skipped, already up-to-date
570 01:59:15.523302 CPU #1 initialized
571 01:59:15.526720 bsp_do_flight_plan done after 455 msecs.
572 01:59:15.529958 CPU: frequency set to 4000 MHz
573 01:59:15.530038 Enabling SMIs.
574 01:59:15.536580 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 01:59:15.553655 SATAXPCIE1 indicates PCIe NVMe is present
576 01:59:15.557126 Probing TPM: done!
577 01:59:15.561270 Connected to device vid:did:rid of 1ae0:0028:00
578 01:59:15.570538 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
579 01:59:15.574090 Initialized TPM device CR50 revision 0
580 01:59:15.577326 Enabling S0i3.4
581 01:59:15.583911 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 01:59:15.587374 Found a VBT of 8704 bytes after decompression
583 01:59:15.594040 cse_lite: CSE RO boot. HybridStorageMode disabled
584 01:59:15.600430 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 01:59:15.676553 FSPS returned 0
586 01:59:15.680186 Executing Phase 1 of FspMultiPhaseSiInit
587 01:59:15.689560 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 01:59:15.693021 port C0 DISC req: usage 1 usb3 1 usb2 5
589 01:59:15.696544 Raw Buffer output 0 00000511
590 01:59:15.699498 Raw Buffer output 1 00000000
591 01:59:15.703512 pmc_send_ipc_cmd succeeded
592 01:59:15.710236 port C1 DISC req: usage 1 usb3 2 usb2 3
593 01:59:15.710319 Raw Buffer output 0 00000321
594 01:59:15.713078 Raw Buffer output 1 00000000
595 01:59:15.717666 pmc_send_ipc_cmd succeeded
596 01:59:15.723227 Detected 4 core, 8 thread CPU.
597 01:59:15.726099 Detected 4 core, 8 thread CPU.
598 01:59:15.960504 Display FSP Version Info HOB
599 01:59:15.963769 Reference Code - CPU = a.0.4c.31
600 01:59:15.966914 uCode Version = 0.0.0.86
601 01:59:15.970263 TXT ACM version = ff.ff.ff.ffff
602 01:59:15.973708 Reference Code - ME = a.0.4c.31
603 01:59:15.977244 MEBx version = 0.0.0.0
604 01:59:15.980715 ME Firmware Version = Consumer SKU
605 01:59:15.983305 Reference Code - PCH = a.0.4c.31
606 01:59:15.986787 PCH-CRID Status = Disabled
607 01:59:15.990162 PCH-CRID Original Value = ff.ff.ff.ffff
608 01:59:15.993621 PCH-CRID New Value = ff.ff.ff.ffff
609 01:59:15.996730 OPROM - RST - RAID = ff.ff.ff.ffff
610 01:59:16.000007 PCH Hsio Version = 4.0.0.0
611 01:59:16.003138 Reference Code - SA - System Agent = a.0.4c.31
612 01:59:16.006901 Reference Code - MRC = 2.0.0.1
613 01:59:16.010105 SA - PCIe Version = a.0.4c.31
614 01:59:16.013198 SA-CRID Status = Disabled
615 01:59:16.016672 SA-CRID Original Value = 0.0.0.1
616 01:59:16.019727 SA-CRID New Value = 0.0.0.1
617 01:59:16.022923 OPROM - VBIOS = ff.ff.ff.ffff
618 01:59:16.026326 IO Manageability Engine FW Version = 11.1.4.0
619 01:59:16.029736 PHY Build Version = 0.0.0.e0
620 01:59:16.033122 Thunderbolt(TM) FW Version = 0.0.0.0
621 01:59:16.039790 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 01:59:16.042909 ITSS IRQ Polarities Before:
623 01:59:16.042990 IPC0: 0xffffffff
624 01:59:16.046536 IPC1: 0xffffffff
625 01:59:16.046671 IPC2: 0xffffffff
626 01:59:16.049678 IPC3: 0xffffffff
627 01:59:16.052839 ITSS IRQ Polarities After:
628 01:59:16.052920 IPC0: 0xffffffff
629 01:59:16.055988 IPC1: 0xffffffff
630 01:59:16.056068 IPC2: 0xffffffff
631 01:59:16.059595 IPC3: 0xffffffff
632 01:59:16.062547 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 01:59:16.075749 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 01:59:16.086090 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 01:59:16.099225 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 01:59:16.105822 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 01:59:16.109426 Enumerating buses...
638 01:59:16.112182 Show all devs... Before device enumeration.
639 01:59:16.115685 Root Device: enabled 1
640 01:59:16.118969 DOMAIN: 0000: enabled 1
641 01:59:16.119050 CPU_CLUSTER: 0: enabled 1
642 01:59:16.122266 PCI: 00:00.0: enabled 1
643 01:59:16.125261 PCI: 00:02.0: enabled 1
644 01:59:16.128878 PCI: 00:04.0: enabled 1
645 01:59:16.128959 PCI: 00:05.0: enabled 1
646 01:59:16.132229 PCI: 00:06.0: enabled 0
647 01:59:16.135384 PCI: 00:07.0: enabled 0
648 01:59:16.138573 PCI: 00:07.1: enabled 0
649 01:59:16.138662 PCI: 00:07.2: enabled 0
650 01:59:16.141799 PCI: 00:07.3: enabled 0
651 01:59:16.145117 PCI: 00:08.0: enabled 1
652 01:59:16.145199 PCI: 00:09.0: enabled 0
653 01:59:16.148654 PCI: 00:0a.0: enabled 0
654 01:59:16.151938 PCI: 00:0d.0: enabled 1
655 01:59:16.155190 PCI: 00:0d.1: enabled 0
656 01:59:16.155272 PCI: 00:0d.2: enabled 0
657 01:59:16.158709 PCI: 00:0d.3: enabled 0
658 01:59:16.161935 PCI: 00:0e.0: enabled 0
659 01:59:16.165037 PCI: 00:10.2: enabled 1
660 01:59:16.165120 PCI: 00:10.6: enabled 0
661 01:59:16.168245 PCI: 00:10.7: enabled 0
662 01:59:16.171766 PCI: 00:12.0: enabled 0
663 01:59:16.174939 PCI: 00:12.6: enabled 0
664 01:59:16.175022 PCI: 00:13.0: enabled 0
665 01:59:16.178376 PCI: 00:14.0: enabled 1
666 01:59:16.181620 PCI: 00:14.1: enabled 0
667 01:59:16.185283 PCI: 00:14.2: enabled 1
668 01:59:16.185366 PCI: 00:14.3: enabled 1
669 01:59:16.188154 PCI: 00:15.0: enabled 1
670 01:59:16.191611 PCI: 00:15.1: enabled 1
671 01:59:16.191694 PCI: 00:15.2: enabled 1
672 01:59:16.195010 PCI: 00:15.3: enabled 1
673 01:59:16.198241 PCI: 00:16.0: enabled 1
674 01:59:16.201698 PCI: 00:16.1: enabled 0
675 01:59:16.201780 PCI: 00:16.2: enabled 0
676 01:59:16.204833 PCI: 00:16.3: enabled 0
677 01:59:16.208340 PCI: 00:16.4: enabled 0
678 01:59:16.211328 PCI: 00:16.5: enabled 0
679 01:59:16.211410 PCI: 00:17.0: enabled 1
680 01:59:16.214842 PCI: 00:19.0: enabled 0
681 01:59:16.217844 PCI: 00:19.1: enabled 1
682 01:59:16.221284 PCI: 00:19.2: enabled 0
683 01:59:16.221366 PCI: 00:1c.0: enabled 1
684 01:59:16.224695 PCI: 00:1c.1: enabled 0
685 01:59:16.227909 PCI: 00:1c.2: enabled 0
686 01:59:16.231556 PCI: 00:1c.3: enabled 0
687 01:59:16.231637 PCI: 00:1c.4: enabled 0
688 01:59:16.234935 PCI: 00:1c.5: enabled 0
689 01:59:16.237972 PCI: 00:1c.6: enabled 1
690 01:59:16.241038 PCI: 00:1c.7: enabled 0
691 01:59:16.241119 PCI: 00:1d.0: enabled 1
692 01:59:16.244639 PCI: 00:1d.1: enabled 0
693 01:59:16.247616 PCI: 00:1d.2: enabled 1
694 01:59:16.247697 PCI: 00:1d.3: enabled 0
695 01:59:16.251100 PCI: 00:1e.0: enabled 1
696 01:59:16.254269 PCI: 00:1e.1: enabled 0
697 01:59:16.257668 PCI: 00:1e.2: enabled 1
698 01:59:16.257749 PCI: 00:1e.3: enabled 1
699 01:59:16.260872 PCI: 00:1f.0: enabled 1
700 01:59:16.264321 PCI: 00:1f.1: enabled 0
701 01:59:16.267463 PCI: 00:1f.2: enabled 1
702 01:59:16.267544 PCI: 00:1f.3: enabled 1
703 01:59:16.271165 PCI: 00:1f.4: enabled 0
704 01:59:16.274282 PCI: 00:1f.5: enabled 1
705 01:59:16.277322 PCI: 00:1f.6: enabled 0
706 01:59:16.277403 PCI: 00:1f.7: enabled 0
707 01:59:16.280718 APIC: 00: enabled 1
708 01:59:16.284278 GENERIC: 0.0: enabled 1
709 01:59:16.284359 GENERIC: 0.0: enabled 1
710 01:59:16.287671 GENERIC: 1.0: enabled 1
711 01:59:16.290741 GENERIC: 0.0: enabled 1
712 01:59:16.294030 GENERIC: 1.0: enabled 1
713 01:59:16.294111 USB0 port 0: enabled 1
714 01:59:16.297280 GENERIC: 0.0: enabled 1
715 01:59:16.300755 USB0 port 0: enabled 1
716 01:59:16.304082 GENERIC: 0.0: enabled 1
717 01:59:16.304162 I2C: 00:1a: enabled 1
718 01:59:16.307257 I2C: 00:31: enabled 1
719 01:59:16.310507 I2C: 00:32: enabled 1
720 01:59:16.310588 I2C: 00:10: enabled 1
721 01:59:16.313912 I2C: 00:15: enabled 1
722 01:59:16.317191 GENERIC: 0.0: enabled 0
723 01:59:16.317271 GENERIC: 1.0: enabled 0
724 01:59:16.320214 GENERIC: 0.0: enabled 1
725 01:59:16.323596 SPI: 00: enabled 1
726 01:59:16.323676 SPI: 00: enabled 1
727 01:59:16.326989 PNP: 0c09.0: enabled 1
728 01:59:16.330111 GENERIC: 0.0: enabled 1
729 01:59:16.333573 USB3 port 0: enabled 1
730 01:59:16.333654 USB3 port 1: enabled 1
731 01:59:16.336697 USB3 port 2: enabled 0
732 01:59:16.340210 USB3 port 3: enabled 0
733 01:59:16.340306 USB2 port 0: enabled 0
734 01:59:16.343476 USB2 port 1: enabled 1
735 01:59:16.346552 USB2 port 2: enabled 1
736 01:59:16.349923 USB2 port 3: enabled 0
737 01:59:16.350006 USB2 port 4: enabled 1
738 01:59:16.353159 USB2 port 5: enabled 0
739 01:59:16.356570 USB2 port 6: enabled 0
740 01:59:16.356652 USB2 port 7: enabled 0
741 01:59:16.359900 USB2 port 8: enabled 0
742 01:59:16.363117 USB2 port 9: enabled 0
743 01:59:16.366301 USB3 port 0: enabled 0
744 01:59:16.366383 USB3 port 1: enabled 1
745 01:59:16.369596 USB3 port 2: enabled 0
746 01:59:16.373366 USB3 port 3: enabled 0
747 01:59:16.373448 GENERIC: 0.0: enabled 1
748 01:59:16.376389 GENERIC: 1.0: enabled 1
749 01:59:16.379714 APIC: 01: enabled 1
750 01:59:16.379797 APIC: 03: enabled 1
751 01:59:16.383053 APIC: 07: enabled 1
752 01:59:16.386484 APIC: 05: enabled 1
753 01:59:16.386599 APIC: 04: enabled 1
754 01:59:16.389677 APIC: 02: enabled 1
755 01:59:16.389759 APIC: 06: enabled 1
756 01:59:16.392698 Compare with tree...
757 01:59:16.396623 Root Device: enabled 1
758 01:59:16.399464 DOMAIN: 0000: enabled 1
759 01:59:16.399546 PCI: 00:00.0: enabled 1
760 01:59:16.402686 PCI: 00:02.0: enabled 1
761 01:59:16.406282 PCI: 00:04.0: enabled 1
762 01:59:16.409722 GENERIC: 0.0: enabled 1
763 01:59:16.412774 PCI: 00:05.0: enabled 1
764 01:59:16.412856 PCI: 00:06.0: enabled 0
765 01:59:16.416021 PCI: 00:07.0: enabled 0
766 01:59:16.419127 GENERIC: 0.0: enabled 1
767 01:59:16.422472 PCI: 00:07.1: enabled 0
768 01:59:16.425830 GENERIC: 1.0: enabled 1
769 01:59:16.425916 PCI: 00:07.2: enabled 0
770 01:59:16.429402 GENERIC: 0.0: enabled 1
771 01:59:16.432492 PCI: 00:07.3: enabled 0
772 01:59:16.436180 GENERIC: 1.0: enabled 1
773 01:59:16.439086 PCI: 00:08.0: enabled 1
774 01:59:16.442508 PCI: 00:09.0: enabled 0
775 01:59:16.442620 PCI: 00:0a.0: enabled 0
776 01:59:16.445812 PCI: 00:0d.0: enabled 1
777 01:59:16.449400 USB0 port 0: enabled 1
778 01:59:16.452236 USB3 port 0: enabled 1
779 01:59:16.455616 USB3 port 1: enabled 1
780 01:59:16.455698 USB3 port 2: enabled 0
781 01:59:16.458959 USB3 port 3: enabled 0
782 01:59:16.462367 PCI: 00:0d.1: enabled 0
783 01:59:16.465419 PCI: 00:0d.2: enabled 0
784 01:59:16.468940 GENERIC: 0.0: enabled 1
785 01:59:16.469022 PCI: 00:0d.3: enabled 0
786 01:59:16.472374 PCI: 00:0e.0: enabled 0
787 01:59:16.475429 PCI: 00:10.2: enabled 1
788 01:59:16.478761 PCI: 00:10.6: enabled 0
789 01:59:16.482033 PCI: 00:10.7: enabled 0
790 01:59:16.482115 PCI: 00:12.0: enabled 0
791 01:59:16.485395 PCI: 00:12.6: enabled 0
792 01:59:16.488907 PCI: 00:13.0: enabled 0
793 01:59:16.491971 PCI: 00:14.0: enabled 1
794 01:59:16.495496 USB0 port 0: enabled 1
795 01:59:16.495578 USB2 port 0: enabled 0
796 01:59:16.498682 USB2 port 1: enabled 1
797 01:59:16.502287 USB2 port 2: enabled 1
798 01:59:16.505438 USB2 port 3: enabled 0
799 01:59:16.508676 USB2 port 4: enabled 1
800 01:59:16.511982 USB2 port 5: enabled 0
801 01:59:16.512064 USB2 port 6: enabled 0
802 01:59:16.515253 USB2 port 7: enabled 0
803 01:59:16.518386 USB2 port 8: enabled 0
804 01:59:16.521699 USB2 port 9: enabled 0
805 01:59:16.525422 USB3 port 0: enabled 0
806 01:59:16.528747 USB3 port 1: enabled 1
807 01:59:16.528829 USB3 port 2: enabled 0
808 01:59:16.531527 USB3 port 3: enabled 0
809 01:59:16.535366 PCI: 00:14.1: enabled 0
810 01:59:16.538148 PCI: 00:14.2: enabled 1
811 01:59:16.541666 PCI: 00:14.3: enabled 1
812 01:59:16.541748 GENERIC: 0.0: enabled 1
813 01:59:16.544827 PCI: 00:15.0: enabled 1
814 01:59:16.548049 I2C: 00:1a: enabled 1
815 01:59:16.551483 I2C: 00:31: enabled 1
816 01:59:16.554899 I2C: 00:32: enabled 1
817 01:59:16.554982 PCI: 00:15.1: enabled 1
818 01:59:16.558048 I2C: 00:10: enabled 1
819 01:59:16.561925 PCI: 00:15.2: enabled 1
820 01:59:16.564490 PCI: 00:15.3: enabled 1
821 01:59:16.568481 PCI: 00:16.0: enabled 1
822 01:59:16.568563 PCI: 00:16.1: enabled 0
823 01:59:16.572176 PCI: 00:16.2: enabled 0
824 01:59:16.576161 PCI: 00:16.3: enabled 0
825 01:59:16.576244 PCI: 00:16.4: enabled 0
826 01:59:16.579000 PCI: 00:16.5: enabled 0
827 01:59:16.582378 PCI: 00:17.0: enabled 1
828 01:59:16.632416 PCI: 00:19.0: enabled 0
829 01:59:16.632512 PCI: 00:19.1: enabled 1
830 01:59:16.632585 I2C: 00:15: enabled 1
831 01:59:16.632828 PCI: 00:19.2: enabled 0
832 01:59:16.632904 PCI: 00:1d.0: enabled 1
833 01:59:16.632964 GENERIC: 0.0: enabled 1
834 01:59:16.633031 PCI: 00:1e.0: enabled 1
835 01:59:16.633099 PCI: 00:1e.1: enabled 0
836 01:59:16.633157 PCI: 00:1e.2: enabled 1
837 01:59:16.633220 SPI: 00: enabled 1
838 01:59:16.633274 PCI: 00:1e.3: enabled 1
839 01:59:16.633327 SPI: 00: enabled 1
840 01:59:16.633381 PCI: 00:1f.0: enabled 1
841 01:59:16.633436 PNP: 0c09.0: enabled 1
842 01:59:16.633494 PCI: 00:1f.1: enabled 0
843 01:59:16.633562 PCI: 00:1f.2: enabled 1
844 01:59:16.633618 GENERIC: 0.0: enabled 1
845 01:59:16.633682 GENERIC: 0.0: enabled 1
846 01:59:16.633738 GENERIC: 1.0: enabled 1
847 01:59:16.648670 PCI: 00:1f.3: enabled 1
848 01:59:16.648753 PCI: 00:1f.4: enabled 0
849 01:59:16.648827 PCI: 00:1f.5: enabled 1
850 01:59:16.649071 PCI: 00:1f.6: enabled 0
851 01:59:16.649137 PCI: 00:1f.7: enabled 0
852 01:59:16.651885 CPU_CLUSTER: 0: enabled 1
853 01:59:16.651967 APIC: 00: enabled 1
854 01:59:16.652031 APIC: 01: enabled 1
855 01:59:16.655227 APIC: 03: enabled 1
856 01:59:16.658680 APIC: 07: enabled 1
857 01:59:16.658763 APIC: 05: enabled 1
858 01:59:16.661734 APIC: 04: enabled 1
859 01:59:16.665178 APIC: 02: enabled 1
860 01:59:16.665260 APIC: 06: enabled 1
861 01:59:16.669135 Root Device scanning...
862 01:59:16.672248 scan_static_bus for Root Device
863 01:59:16.675563 DOMAIN: 0000 enabled
864 01:59:16.678839 CPU_CLUSTER: 0 enabled
865 01:59:16.678921 DOMAIN: 0000 scanning...
866 01:59:16.682495 PCI: pci_scan_bus for bus 00
867 01:59:16.685784 PCI: 00:00.0 [8086/0000] ops
868 01:59:16.688732 PCI: 00:00.0 [8086/9a12] enabled
869 01:59:16.692357 PCI: 00:02.0 [8086/0000] bus ops
870 01:59:16.695289 PCI: 00:02.0 [8086/9a40] enabled
871 01:59:16.698574 PCI: 00:04.0 [8086/0000] bus ops
872 01:59:16.702031 PCI: 00:04.0 [8086/9a03] enabled
873 01:59:16.705460 PCI: 00:05.0 [8086/9a19] enabled
874 01:59:16.708715 PCI: 00:07.0 [0000/0000] hidden
875 01:59:16.711970 PCI: 00:08.0 [8086/9a11] enabled
876 01:59:16.715324 PCI: 00:0a.0 [8086/9a0d] disabled
877 01:59:16.718885 PCI: 00:0d.0 [8086/0000] bus ops
878 01:59:16.722309 PCI: 00:0d.0 [8086/9a13] enabled
879 01:59:16.725318 PCI: 00:14.0 [8086/0000] bus ops
880 01:59:16.728218 PCI: 00:14.0 [8086/a0ed] enabled
881 01:59:16.732053 PCI: 00:14.2 [8086/a0ef] enabled
882 01:59:16.734976 PCI: 00:14.3 [8086/0000] bus ops
883 01:59:16.738683 PCI: 00:14.3 [8086/a0f0] enabled
884 01:59:16.741617 PCI: 00:15.0 [8086/0000] bus ops
885 01:59:16.745050 PCI: 00:15.0 [8086/a0e8] enabled
886 01:59:16.748676 PCI: 00:15.1 [8086/0000] bus ops
887 01:59:16.751694 PCI: 00:15.1 [8086/a0e9] enabled
888 01:59:16.754991 PCI: 00:15.2 [8086/0000] bus ops
889 01:59:16.758229 PCI: 00:15.2 [8086/a0ea] enabled
890 01:59:16.761458 PCI: 00:15.3 [8086/0000] bus ops
891 01:59:16.765090 PCI: 00:15.3 [8086/a0eb] enabled
892 01:59:16.768565 PCI: 00:16.0 [8086/0000] ops
893 01:59:16.771625 PCI: 00:16.0 [8086/a0e0] enabled
894 01:59:16.778079 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 01:59:16.782085 PCI: 00:19.0 [8086/0000] bus ops
896 01:59:16.784670 PCI: 00:19.0 [8086/a0c5] disabled
897 01:59:16.788045 PCI: 00:19.1 [8086/0000] bus ops
898 01:59:16.791124 PCI: 00:19.1 [8086/a0c6] enabled
899 01:59:16.794913 PCI: 00:1d.0 [8086/0000] bus ops
900 01:59:16.798040 PCI: 00:1d.0 [8086/a0b0] enabled
901 01:59:16.801375 PCI: 00:1e.0 [8086/0000] ops
902 01:59:16.804591 PCI: 00:1e.0 [8086/a0a8] enabled
903 01:59:16.807936 PCI: 00:1e.2 [8086/0000] bus ops
904 01:59:16.811222 PCI: 00:1e.2 [8086/a0aa] enabled
905 01:59:16.814338 PCI: 00:1e.3 [8086/0000] bus ops
906 01:59:16.817891 PCI: 00:1e.3 [8086/a0ab] enabled
907 01:59:16.820869 PCI: 00:1f.0 [8086/0000] bus ops
908 01:59:16.824334 PCI: 00:1f.0 [8086/a087] enabled
909 01:59:16.827842 RTC Init
910 01:59:16.830991 Set power on after power failure.
911 01:59:16.831071 Disabling Deep S3
912 01:59:16.834208 Disabling Deep S3
913 01:59:16.834288 Disabling Deep S4
914 01:59:16.837334 Disabling Deep S4
915 01:59:16.840750 Disabling Deep S5
916 01:59:16.840832 Disabling Deep S5
917 01:59:16.844050 PCI: 00:1f.2 [0000/0000] hidden
918 01:59:16.847412 PCI: 00:1f.3 [8086/0000] bus ops
919 01:59:16.850539 PCI: 00:1f.3 [8086/a0c8] enabled
920 01:59:16.853874 PCI: 00:1f.5 [8086/0000] bus ops
921 01:59:16.857103 PCI: 00:1f.5 [8086/a0a4] enabled
922 01:59:16.860241 PCI: Leftover static devices:
923 01:59:16.860323 PCI: 00:10.2
924 01:59:16.864178 PCI: 00:10.6
925 01:59:16.864259 PCI: 00:10.7
926 01:59:16.867092 PCI: 00:06.0
927 01:59:16.867173 PCI: 00:07.1
928 01:59:16.870457 PCI: 00:07.2
929 01:59:16.870564 PCI: 00:07.3
930 01:59:16.870678 PCI: 00:09.0
931 01:59:16.873629 PCI: 00:0d.1
932 01:59:16.873711 PCI: 00:0d.2
933 01:59:16.877240 PCI: 00:0d.3
934 01:59:16.877322 PCI: 00:0e.0
935 01:59:16.877384 PCI: 00:12.0
936 01:59:16.880246 PCI: 00:12.6
937 01:59:16.880332 PCI: 00:13.0
938 01:59:16.883844 PCI: 00:14.1
939 01:59:16.883952 PCI: 00:16.1
940 01:59:16.884072 PCI: 00:16.2
941 01:59:16.887173 PCI: 00:16.3
942 01:59:16.887254 PCI: 00:16.4
943 01:59:16.890098 PCI: 00:16.5
944 01:59:16.890180 PCI: 00:17.0
945 01:59:16.893512 PCI: 00:19.2
946 01:59:16.893594 PCI: 00:1e.1
947 01:59:16.893657 PCI: 00:1f.1
948 01:59:16.896827 PCI: 00:1f.4
949 01:59:16.896908 PCI: 00:1f.6
950 01:59:16.900351 PCI: 00:1f.7
951 01:59:16.903354 PCI: Check your devicetree.cb.
952 01:59:16.903436 PCI: 00:02.0 scanning...
953 01:59:16.906802 scan_generic_bus for PCI: 00:02.0
954 01:59:16.913381 scan_generic_bus for PCI: 00:02.0 done
955 01:59:16.916602 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 01:59:16.919740 PCI: 00:04.0 scanning...
957 01:59:16.923235 scan_generic_bus for PCI: 00:04.0
958 01:59:16.926886 GENERIC: 0.0 enabled
959 01:59:16.929957 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 01:59:16.936262 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 01:59:16.939877 PCI: 00:0d.0 scanning...
962 01:59:16.942812 scan_static_bus for PCI: 00:0d.0
963 01:59:16.942894 USB0 port 0 enabled
964 01:59:16.946374 USB0 port 0 scanning...
965 01:59:16.949516 scan_static_bus for USB0 port 0
966 01:59:16.953289 USB3 port 0 enabled
967 01:59:16.953371 USB3 port 1 enabled
968 01:59:16.956446 USB3 port 2 disabled
969 01:59:16.959492 USB3 port 3 disabled
970 01:59:16.959573 USB3 port 0 scanning...
971 01:59:16.963105 scan_static_bus for USB3 port 0
972 01:59:16.969585 scan_static_bus for USB3 port 0 done
973 01:59:16.973015 scan_bus: bus USB3 port 0 finished in 6 msecs
974 01:59:16.976318 USB3 port 1 scanning...
975 01:59:16.979660 scan_static_bus for USB3 port 1
976 01:59:16.982784 scan_static_bus for USB3 port 1 done
977 01:59:16.986104 scan_bus: bus USB3 port 1 finished in 6 msecs
978 01:59:16.989700 scan_static_bus for USB0 port 0 done
979 01:59:16.996265 scan_bus: bus USB0 port 0 finished in 43 msecs
980 01:59:16.999320 scan_static_bus for PCI: 00:0d.0 done
981 01:59:17.002583 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 01:59:17.005854 PCI: 00:14.0 scanning...
983 01:59:17.009470 scan_static_bus for PCI: 00:14.0
984 01:59:17.012627 USB0 port 0 enabled
985 01:59:17.015878 USB0 port 0 scanning...
986 01:59:17.019416 scan_static_bus for USB0 port 0
987 01:59:17.019497 USB2 port 0 disabled
988 01:59:17.022659 USB2 port 1 enabled
989 01:59:17.025797 USB2 port 2 enabled
990 01:59:17.025878 USB2 port 3 disabled
991 01:59:17.029191 USB2 port 4 enabled
992 01:59:17.029272 USB2 port 5 disabled
993 01:59:17.032620 USB2 port 6 disabled
994 01:59:17.035773 USB2 port 7 disabled
995 01:59:17.035855 USB2 port 8 disabled
996 01:59:17.039039 USB2 port 9 disabled
997 01:59:17.042353 USB3 port 0 disabled
998 01:59:17.042434 USB3 port 1 enabled
999 01:59:17.045491 USB3 port 2 disabled
1000 01:59:17.049068 USB3 port 3 disabled
1001 01:59:17.049149 USB2 port 1 scanning...
1002 01:59:17.052493 scan_static_bus for USB2 port 1
1003 01:59:17.058800 scan_static_bus for USB2 port 1 done
1004 01:59:17.062390 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 01:59:17.065487 USB2 port 2 scanning...
1006 01:59:17.068705 scan_static_bus for USB2 port 2
1007 01:59:17.072203 scan_static_bus for USB2 port 2 done
1008 01:59:17.075310 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 01:59:17.078767 USB2 port 4 scanning...
1010 01:59:17.081940 scan_static_bus for USB2 port 4
1011 01:59:17.085414 scan_static_bus for USB2 port 4 done
1012 01:59:17.092032 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 01:59:17.092117 USB3 port 1 scanning...
1014 01:59:17.095009 scan_static_bus for USB3 port 1
1015 01:59:17.098317 scan_static_bus for USB3 port 1 done
1016 01:59:17.104963 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 01:59:17.108463 scan_static_bus for USB0 port 0 done
1018 01:59:17.111626 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 01:59:17.118391 scan_static_bus for PCI: 00:14.0 done
1020 01:59:17.121759 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 01:59:17.124937 PCI: 00:14.3 scanning...
1022 01:59:17.128244 scan_static_bus for PCI: 00:14.3
1023 01:59:17.131767 GENERIC: 0.0 enabled
1024 01:59:17.134796 scan_static_bus for PCI: 00:14.3 done
1025 01:59:17.138245 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 01:59:17.141288 PCI: 00:15.0 scanning...
1027 01:59:17.144737 scan_static_bus for PCI: 00:15.0
1028 01:59:17.148530 I2C: 00:1a enabled
1029 01:59:17.148612 I2C: 00:31 enabled
1030 01:59:17.152252 I2C: 00:32 enabled
1031 01:59:17.155211 scan_static_bus for PCI: 00:15.0 done
1032 01:59:17.158901 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 01:59:17.162231 PCI: 00:15.1 scanning...
1034 01:59:17.165273 scan_static_bus for PCI: 00:15.1
1035 01:59:17.168583 I2C: 00:10 enabled
1036 01:59:17.172095 scan_static_bus for PCI: 00:15.1 done
1037 01:59:17.175100 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 01:59:17.178519 PCI: 00:15.2 scanning...
1039 01:59:17.182167 scan_static_bus for PCI: 00:15.2
1040 01:59:17.185259 scan_static_bus for PCI: 00:15.2 done
1041 01:59:17.188578 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 01:59:17.191770 PCI: 00:15.3 scanning...
1043 01:59:17.195037 scan_static_bus for PCI: 00:15.3
1044 01:59:17.198439 scan_static_bus for PCI: 00:15.3 done
1045 01:59:17.204935 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 01:59:17.208506 PCI: 00:19.1 scanning...
1047 01:59:17.211559 scan_static_bus for PCI: 00:19.1
1048 01:59:17.211640 I2C: 00:15 enabled
1049 01:59:17.215220 scan_static_bus for PCI: 00:19.1 done
1050 01:59:17.221560 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 01:59:17.224888 PCI: 00:1d.0 scanning...
1052 01:59:17.228182 do_pci_scan_bridge for PCI: 00:1d.0
1053 01:59:17.231619 PCI: pci_scan_bus for bus 01
1054 01:59:17.234793 PCI: 01:00.0 [1c5c/174a] enabled
1055 01:59:17.234874 GENERIC: 0.0 enabled
1056 01:59:17.241520 Enabling Common Clock Configuration
1057 01:59:17.244706 L1 Sub-State supported from root port 29
1058 01:59:17.247768 L1 Sub-State Support = 0xf
1059 01:59:17.251461 CommonModeRestoreTime = 0x28
1060 01:59:17.254488 Power On Value = 0x16, Power On Scale = 0x0
1061 01:59:17.254569 ASPM: Enabled L1
1062 01:59:17.260974 PCIe: Max_Payload_Size adjusted to 128
1063 01:59:17.264471 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 01:59:17.268186 PCI: 00:1e.2 scanning...
1065 01:59:17.270855 scan_generic_bus for PCI: 00:1e.2
1066 01:59:17.274119 SPI: 00 enabled
1067 01:59:17.277863 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 01:59:17.284108 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 01:59:17.287359 PCI: 00:1e.3 scanning...
1070 01:59:17.290794 scan_generic_bus for PCI: 00:1e.3
1071 01:59:17.290876 SPI: 00 enabled
1072 01:59:17.297430 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 01:59:17.300738 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 01:59:17.303743 PCI: 00:1f.0 scanning...
1075 01:59:17.307127 scan_static_bus for PCI: 00:1f.0
1076 01:59:17.310644 PNP: 0c09.0 enabled
1077 01:59:17.314054 PNP: 0c09.0 scanning...
1078 01:59:17.317004 scan_static_bus for PNP: 0c09.0
1079 01:59:17.320445 scan_static_bus for PNP: 0c09.0 done
1080 01:59:17.323922 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 01:59:17.327397 scan_static_bus for PCI: 00:1f.0 done
1082 01:59:17.333687 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 01:59:17.336931 PCI: 00:1f.2 scanning...
1084 01:59:17.340420 scan_static_bus for PCI: 00:1f.2
1085 01:59:17.340501 GENERIC: 0.0 enabled
1086 01:59:17.343365 GENERIC: 0.0 scanning...
1087 01:59:17.346705 scan_static_bus for GENERIC: 0.0
1088 01:59:17.350073 GENERIC: 0.0 enabled
1089 01:59:17.350153 GENERIC: 1.0 enabled
1090 01:59:17.357171 scan_static_bus for GENERIC: 0.0 done
1091 01:59:17.360049 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 01:59:17.363579 scan_static_bus for PCI: 00:1f.2 done
1093 01:59:17.369890 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 01:59:17.369972 PCI: 00:1f.3 scanning...
1095 01:59:17.376857 scan_static_bus for PCI: 00:1f.3
1096 01:59:17.380548 scan_static_bus for PCI: 00:1f.3 done
1097 01:59:17.383020 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 01:59:17.386706 PCI: 00:1f.5 scanning...
1099 01:59:17.389864 scan_generic_bus for PCI: 00:1f.5
1100 01:59:17.393107 scan_generic_bus for PCI: 00:1f.5 done
1101 01:59:17.399649 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 01:59:17.403057 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 01:59:17.406278 scan_static_bus for Root Device done
1104 01:59:17.413229 scan_bus: bus Root Device finished in 736 msecs
1105 01:59:17.413310 done
1106 01:59:17.419663 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 01:59:17.422916 Chrome EC: UHEPI supported
1108 01:59:17.429407 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 01:59:17.432765 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 01:59:17.439330 SPI flash protection: WPSW=1 SRP0=0
1111 01:59:17.442697 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 01:59:17.449359 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 01:59:17.452899 found VGA at PCI: 00:02.0
1114 01:59:17.455942 Setting up VGA for PCI: 00:02.0
1115 01:59:17.459337 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 01:59:17.465743 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 01:59:17.465859 Allocating resources...
1118 01:59:17.469066 Reading resources...
1119 01:59:17.472160 Root Device read_resources bus 0 link: 0
1120 01:59:17.478837 DOMAIN: 0000 read_resources bus 0 link: 0
1121 01:59:17.482245 PCI: 00:04.0 read_resources bus 1 link: 0
1122 01:59:17.488638 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 01:59:17.491927 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 01:59:17.498487 USB0 port 0 read_resources bus 0 link: 0
1125 01:59:17.501919 USB0 port 0 read_resources bus 0 link: 0 done
1126 01:59:17.508542 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 01:59:17.511862 PCI: 00:14.0 read_resources bus 0 link: 0
1128 01:59:17.514864 USB0 port 0 read_resources bus 0 link: 0
1129 01:59:17.522558 USB0 port 0 read_resources bus 0 link: 0 done
1130 01:59:17.525331 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 01:59:17.532250 PCI: 00:14.3 read_resources bus 0 link: 0
1132 01:59:17.536003 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 01:59:17.542107 PCI: 00:15.0 read_resources bus 0 link: 0
1134 01:59:17.545454 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 01:59:17.552461 PCI: 00:15.1 read_resources bus 0 link: 0
1136 01:59:17.555637 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 01:59:17.563218 PCI: 00:19.1 read_resources bus 0 link: 0
1138 01:59:17.566194 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 01:59:17.572596 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 01:59:17.575995 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 01:59:17.582692 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 01:59:17.586155 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 01:59:17.592797 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 01:59:17.596102 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 01:59:17.602433 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 01:59:17.605980 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 01:59:17.612457 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 01:59:17.615730 GENERIC: 0.0 read_resources bus 0 link: 0
1149 01:59:17.622168 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 01:59:17.625649 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 01:59:17.632162 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 01:59:17.635458 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 01:59:17.642005 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 01:59:17.645236 Root Device read_resources bus 0 link: 0 done
1155 01:59:17.648705 Done reading resources.
1156 01:59:17.655266 Show resources in subtree (Root Device)...After reading.
1157 01:59:17.658509 Root Device child on link 0 DOMAIN: 0000
1158 01:59:17.661715 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 01:59:17.671700 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 01:59:17.681712 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 01:59:17.685081 PCI: 00:00.0
1162 01:59:17.691610 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 01:59:17.701510 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 01:59:17.711579 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 01:59:17.721272 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 01:59:17.731216 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 01:59:17.741270 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 01:59:17.747795 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 01:59:17.757730 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 01:59:17.767647 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 01:59:17.778253 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 01:59:17.787651 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 01:59:17.797458 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 01:59:17.804274 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 01:59:17.814062 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 01:59:17.824027 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 01:59:17.833988 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 01:59:17.844104 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 01:59:17.853759 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 01:59:17.860531 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 01:59:17.870419 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 01:59:17.873789 PCI: 00:02.0
1183 01:59:17.883687 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 01:59:17.893526 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 01:59:17.903551 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 01:59:17.906774 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 01:59:17.917000 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 01:59:17.920129 GENERIC: 0.0
1189 01:59:17.920210 PCI: 00:05.0
1190 01:59:17.930414 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 01:59:17.936750 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 01:59:17.936832 GENERIC: 0.0
1193 01:59:17.940444 PCI: 00:08.0
1194 01:59:17.950266 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 01:59:17.950349 PCI: 00:0a.0
1196 01:59:17.953122 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 01:59:17.963299 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 01:59:17.969610 USB0 port 0 child on link 0 USB3 port 0
1199 01:59:17.969691 USB3 port 0
1200 01:59:17.973148 USB3 port 1
1201 01:59:17.973229 USB3 port 2
1202 01:59:17.976059 USB3 port 3
1203 01:59:17.979865 PCI: 00:14.0 child on link 0 USB0 port 0
1204 01:59:17.989243 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 01:59:17.995913 USB0 port 0 child on link 0 USB2 port 0
1206 01:59:17.995995 USB2 port 0
1207 01:59:17.999173 USB2 port 1
1208 01:59:17.999254 USB2 port 2
1209 01:59:18.002899 USB2 port 3
1210 01:59:18.002980 USB2 port 4
1211 01:59:18.005709 USB2 port 5
1212 01:59:18.005790 USB2 port 6
1213 01:59:18.009075 USB2 port 7
1214 01:59:18.012403 USB2 port 8
1215 01:59:18.012509 USB2 port 9
1216 01:59:18.015649 USB3 port 0
1217 01:59:18.015729 USB3 port 1
1218 01:59:18.019162 USB3 port 2
1219 01:59:18.019243 USB3 port 3
1220 01:59:18.022315 PCI: 00:14.2
1221 01:59:18.032413 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 01:59:18.042271 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 01:59:18.045609 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 01:59:18.055570 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 01:59:18.058694 GENERIC: 0.0
1226 01:59:18.061951 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 01:59:18.071822 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 01:59:18.071905 I2C: 00:1a
1229 01:59:18.075464 I2C: 00:31
1230 01:59:18.075545 I2C: 00:32
1231 01:59:18.082015 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 01:59:18.091653 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 01:59:18.091735 I2C: 00:10
1234 01:59:18.094927 PCI: 00:15.2
1235 01:59:18.104919 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 01:59:18.105001 PCI: 00:15.3
1237 01:59:18.114889 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 01:59:18.117955 PCI: 00:16.0
1239 01:59:18.128071 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 01:59:18.128153 PCI: 00:19.0
1241 01:59:18.134795 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 01:59:18.144408 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 01:59:18.144491 I2C: 00:15
1244 01:59:18.147921 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 01:59:18.157654 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 01:59:18.167456 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 01:59:18.177689 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 01:59:18.177772 GENERIC: 0.0
1249 01:59:18.181116 PCI: 01:00.0
1250 01:59:18.190585 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 01:59:18.200637 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 01:59:18.210561 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 01:59:18.210657 PCI: 00:1e.0
1254 01:59:18.220397 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 01:59:18.227293 PCI: 00:1e.2 child on link 0 SPI: 00
1256 01:59:18.236814 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 01:59:18.236901 SPI: 00
1258 01:59:18.240371 PCI: 00:1e.3 child on link 0 SPI: 00
1259 01:59:18.250245 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 01:59:18.253583 SPI: 00
1261 01:59:18.257283 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 01:59:18.266536 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 01:59:18.266671 PNP: 0c09.0
1264 01:59:18.276623 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 01:59:18.279965 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 01:59:18.289760 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 01:59:18.299632 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 01:59:18.303425 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 01:59:18.306232 GENERIC: 0.0
1270 01:59:18.306312 GENERIC: 1.0
1271 01:59:18.309623 PCI: 00:1f.3
1272 01:59:18.319424 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 01:59:18.329917 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 01:59:18.329999 PCI: 00:1f.5
1275 01:59:18.339240 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 01:59:18.342547 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 01:59:18.346016 APIC: 00
1278 01:59:18.346097 APIC: 01
1279 01:59:18.349395 APIC: 03
1280 01:59:18.349476 APIC: 07
1281 01:59:18.349539 APIC: 05
1282 01:59:18.352658 APIC: 04
1283 01:59:18.352739 APIC: 02
1284 01:59:18.352803 APIC: 06
1285 01:59:18.362494 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 01:59:18.368963 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 01:59:18.372248 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 01:59:18.379071 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 01:59:18.382087 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 01:59:18.388692 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 01:59:18.392162 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 01:59:18.398859 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 01:59:18.405180 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 01:59:18.415105 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 01:59:18.421898 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 01:59:18.428520 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 01:59:18.434977 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 01:59:18.441633 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 01:59:18.451535 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 01:59:18.455229 DOMAIN: 0000: Resource ranges:
1301 01:59:18.458550 * Base: 1000, Size: 800, Tag: 100
1302 01:59:18.461510 * Base: 1900, Size: e700, Tag: 100
1303 01:59:18.464903 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 01:59:18.471478 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 01:59:18.481407 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 01:59:18.487979 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 01:59:18.494536 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 01:59:18.504558 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 01:59:18.511184 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 01:59:18.517826 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 01:59:18.527853 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 01:59:18.534273 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 01:59:18.541099 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 01:59:18.550942 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 01:59:18.557330 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 01:59:18.564074 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 01:59:18.573963 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 01:59:18.580825 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 01:59:18.587375 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 01:59:18.597052 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 01:59:18.603861 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 01:59:18.610122 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 01:59:18.620196 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 01:59:18.626767 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 01:59:18.633269 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 01:59:18.643153 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 01:59:18.649748 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 01:59:18.653161 DOMAIN: 0000: Resource ranges:
1329 01:59:18.656573 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 01:59:18.662880 * Base: d0000000, Size: 28000000, Tag: 200
1331 01:59:18.666255 * Base: fa000000, Size: 1000000, Tag: 200
1332 01:59:18.670132 * Base: fb001000, Size: 2fff000, Tag: 200
1333 01:59:18.673035 * Base: fe010000, Size: 2e000, Tag: 200
1334 01:59:18.679847 * Base: fe03f000, Size: d41000, Tag: 200
1335 01:59:18.683097 * Base: fed88000, Size: 8000, Tag: 200
1336 01:59:18.686121 * Base: fed93000, Size: d000, Tag: 200
1337 01:59:18.689480 * Base: feda2000, Size: 1e000, Tag: 200
1338 01:59:18.696566 * Base: fede0000, Size: 1220000, Tag: 200
1339 01:59:18.699514 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 01:59:18.706021 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 01:59:18.713034 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 01:59:18.719140 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 01:59:18.726276 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 01:59:18.732463 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 01:59:18.739737 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 01:59:18.745946 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 01:59:18.752144 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 01:59:18.758965 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 01:59:18.765835 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 01:59:18.772203 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 01:59:18.778558 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 01:59:18.785205 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 01:59:18.792010 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 01:59:18.798418 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 01:59:18.805000 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 01:59:18.811684 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 01:59:18.818041 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 01:59:18.825032 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 01:59:18.831769 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 01:59:18.837940 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 01:59:18.845016 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 01:59:18.854804 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 01:59:18.861174 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 01:59:18.864333 PCI: 00:1d.0: Resource ranges:
1365 01:59:18.867724 * Base: 7fc00000, Size: 100000, Tag: 200
1366 01:59:18.874348 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 01:59:18.880886 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 01:59:18.887527 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 01:59:18.897438 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 01:59:18.904114 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 01:59:18.907594 Root Device assign_resources, bus 0 link: 0
1372 01:59:18.913904 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 01:59:18.920534 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 01:59:18.930518 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 01:59:18.937125 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 01:59:18.947170 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 01:59:18.950486 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 01:59:18.956876 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 01:59:18.963423 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 01:59:18.973311 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 01:59:18.980081 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 01:59:18.983167 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 01:59:18.989861 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 01:59:18.996492 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 01:59:19.003219 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 01:59:19.006560 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 01:59:19.016455 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 01:59:19.022995 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 01:59:19.033175 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 01:59:19.035890 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 01:59:19.039520 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 01:59:19.049730 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 01:59:19.052498 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 01:59:19.059143 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 01:59:19.065775 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 01:59:19.072438 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 01:59:19.075758 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 01:59:19.082247 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 01:59:19.092498 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 01:59:19.098874 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 01:59:19.108907 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 01:59:19.112027 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 01:59:19.118778 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 01:59:19.125372 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 01:59:19.135391 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 01:59:19.145315 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 01:59:19.148500 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 01:59:19.158561 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 01:59:19.165325 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 01:59:19.175034 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 01:59:19.178284 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 01:59:19.188068 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 01:59:19.191323 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 01:59:19.194469 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 01:59:19.204413 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 01:59:19.207614 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 01:59:19.214441 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 01:59:19.217531 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 01:59:19.224219 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 01:59:19.227395 LPC: Trying to open IO window from 800 size 1ff
1421 01:59:19.237641 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 01:59:19.244112 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 01:59:19.250576 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 01:59:19.257322 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 01:59:19.260824 Root Device assign_resources, bus 0 link: 0
1426 01:59:19.263954 Done setting resources.
1427 01:59:19.270373 Show resources in subtree (Root Device)...After assigning values.
1428 01:59:19.273935 Root Device child on link 0 DOMAIN: 0000
1429 01:59:19.280563 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 01:59:19.286830 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 01:59:19.296913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 01:59:19.300207 PCI: 00:00.0
1433 01:59:19.310452 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 01:59:19.320210 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 01:59:19.329908 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 01:59:19.337757 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 01:59:19.347066 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 01:59:19.356858 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 01:59:19.366843 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 01:59:19.376466 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 01:59:19.383219 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 01:59:19.393087 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 01:59:19.402862 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 01:59:19.412776 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 01:59:19.422979 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 01:59:19.429365 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 01:59:19.439285 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 01:59:19.449199 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 01:59:19.459083 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 01:59:19.469056 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 01:59:19.479353 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 01:59:19.489021 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 01:59:19.489106 PCI: 00:02.0
1454 01:59:19.499180 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 01:59:19.512260 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 01:59:19.518759 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 01:59:19.525535 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 01:59:19.535490 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 01:59:19.539193 GENERIC: 0.0
1460 01:59:19.539274 PCI: 00:05.0
1461 01:59:19.549075 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 01:59:19.555303 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 01:59:19.555384 GENERIC: 0.0
1464 01:59:19.558791 PCI: 00:08.0
1465 01:59:19.568599 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 01:59:19.568681 PCI: 00:0a.0
1467 01:59:19.575048 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 01:59:19.585124 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 01:59:19.588950 USB0 port 0 child on link 0 USB3 port 0
1470 01:59:19.591915 USB3 port 0
1471 01:59:19.591995 USB3 port 1
1472 01:59:19.594950 USB3 port 2
1473 01:59:19.595031 USB3 port 3
1474 01:59:19.601639 PCI: 00:14.0 child on link 0 USB0 port 0
1475 01:59:19.611493 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 01:59:19.614803 USB0 port 0 child on link 0 USB2 port 0
1477 01:59:19.618545 USB2 port 0
1478 01:59:19.618646 USB2 port 1
1479 01:59:19.621242 USB2 port 2
1480 01:59:19.621322 USB2 port 3
1481 01:59:19.624697 USB2 port 4
1482 01:59:19.624778 USB2 port 5
1483 01:59:19.627918 USB2 port 6
1484 01:59:19.627998 USB2 port 7
1485 01:59:19.631321 USB2 port 8
1486 01:59:19.631402 USB2 port 9
1487 01:59:19.634563 USB3 port 0
1488 01:59:19.634657 USB3 port 1
1489 01:59:19.638165 USB3 port 2
1490 01:59:19.641127 USB3 port 3
1491 01:59:19.641208 PCI: 00:14.2
1492 01:59:19.651048 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 01:59:19.661516 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 01:59:19.667651 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 01:59:19.677561 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 01:59:19.677643 GENERIC: 0.0
1497 01:59:19.684466 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 01:59:19.694222 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 01:59:19.694304 I2C: 00:1a
1500 01:59:19.697208 I2C: 00:31
1501 01:59:19.697289 I2C: 00:32
1502 01:59:19.701072 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 01:59:19.713928 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 01:59:19.714011 I2C: 00:10
1505 01:59:19.717344 PCI: 00:15.2
1506 01:59:19.727311 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 01:59:19.727397 PCI: 00:15.3
1508 01:59:19.737408 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 01:59:19.740392 PCI: 00:16.0
1510 01:59:19.750305 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 01:59:19.753455 PCI: 00:19.0
1512 01:59:19.757085 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 01:59:19.766812 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 01:59:19.766894 I2C: 00:15
1515 01:59:19.773691 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 01:59:19.783185 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 01:59:19.793540 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 01:59:19.803284 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 01:59:19.806530 GENERIC: 0.0
1520 01:59:19.806656 PCI: 01:00.0
1521 01:59:19.816693 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 01:59:19.829625 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 01:59:19.839816 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 01:59:19.839898 PCI: 00:1e.0
1525 01:59:19.852893 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 01:59:19.856043 PCI: 00:1e.2 child on link 0 SPI: 00
1527 01:59:19.865934 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 01:59:19.866023 SPI: 00
1529 01:59:19.872821 PCI: 00:1e.3 child on link 0 SPI: 00
1530 01:59:19.882416 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 01:59:19.882499 SPI: 00
1532 01:59:19.885901 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 01:59:19.895852 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 01:59:19.898998 PNP: 0c09.0
1535 01:59:19.905616 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 01:59:19.912155 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 01:59:19.918800 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 01:59:19.928822 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 01:59:19.935908 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 01:59:19.935989 GENERIC: 0.0
1541 01:59:19.938675 GENERIC: 1.0
1542 01:59:19.938756 PCI: 00:1f.3
1543 01:59:19.948559 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 01:59:19.961682 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 01:59:19.961765 PCI: 00:1f.5
1546 01:59:19.971750 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 01:59:19.975467 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 01:59:19.978133 APIC: 00
1549 01:59:19.978213 APIC: 01
1550 01:59:19.982080 APIC: 03
1551 01:59:19.982160 APIC: 07
1552 01:59:19.982274 APIC: 05
1553 01:59:19.984803 APIC: 04
1554 01:59:19.984884 APIC: 02
1555 01:59:19.988070 APIC: 06
1556 01:59:19.988150 Done allocating resources.
1557 01:59:19.994773 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 01:59:20.001223 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 01:59:20.004706 Configure GPIOs for I2S audio on UP4.
1560 01:59:20.011879 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 01:59:20.015197 Enabling resources...
1562 01:59:20.018537 PCI: 00:00.0 subsystem <- 8086/9a12
1563 01:59:20.022022 PCI: 00:00.0 cmd <- 06
1564 01:59:20.024972 PCI: 00:02.0 subsystem <- 8086/9a40
1565 01:59:20.028340 PCI: 00:02.0 cmd <- 03
1566 01:59:20.032134 PCI: 00:04.0 subsystem <- 8086/9a03
1567 01:59:20.034950 PCI: 00:04.0 cmd <- 02
1568 01:59:20.038987 PCI: 00:05.0 subsystem <- 8086/9a19
1569 01:59:20.039068 PCI: 00:05.0 cmd <- 02
1570 01:59:20.044884 PCI: 00:08.0 subsystem <- 8086/9a11
1571 01:59:20.044965 PCI: 00:08.0 cmd <- 06
1572 01:59:20.048086 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 01:59:20.051570 PCI: 00:0d.0 cmd <- 02
1574 01:59:20.055530 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 01:59:20.058110 PCI: 00:14.0 cmd <- 02
1576 01:59:20.061814 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 01:59:20.065034 PCI: 00:14.2 cmd <- 02
1578 01:59:20.068060 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 01:59:20.071397 PCI: 00:14.3 cmd <- 02
1580 01:59:20.074452 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 01:59:20.077818 PCI: 00:15.0 cmd <- 02
1582 01:59:20.081731 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 01:59:20.084571 PCI: 00:15.1 cmd <- 02
1584 01:59:20.088004 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 01:59:20.088085 PCI: 00:15.2 cmd <- 02
1586 01:59:20.094814 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 01:59:20.094895 PCI: 00:15.3 cmd <- 02
1588 01:59:20.097886 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 01:59:20.101264 PCI: 00:16.0 cmd <- 02
1590 01:59:20.104511 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 01:59:20.107797 PCI: 00:19.1 cmd <- 02
1592 01:59:20.111177 PCI: 00:1d.0 bridge ctrl <- 0013
1593 01:59:20.114332 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 01:59:20.117792 PCI: 00:1d.0 cmd <- 06
1595 01:59:20.120898 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 01:59:20.124199 PCI: 00:1e.0 cmd <- 06
1597 01:59:20.127555 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 01:59:20.131405 PCI: 00:1e.2 cmd <- 06
1599 01:59:20.134147 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 01:59:20.137957 PCI: 00:1e.3 cmd <- 02
1601 01:59:20.140827 PCI: 00:1f.0 subsystem <- 8086/a087
1602 01:59:20.143910 PCI: 00:1f.0 cmd <- 407
1603 01:59:20.147211 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 01:59:20.147292 PCI: 00:1f.3 cmd <- 02
1605 01:59:20.154155 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 01:59:20.154235 PCI: 00:1f.5 cmd <- 406
1607 01:59:20.159367 PCI: 01:00.0 cmd <- 02
1608 01:59:20.163715 done.
1609 01:59:20.166996 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 01:59:20.170413 Initializing devices...
1611 01:59:20.173730 Root Device init
1612 01:59:20.177069 Chrome EC: Set SMI mask to 0x0000000000000000
1613 01:59:20.183576 Chrome EC: clear events_b mask to 0x0000000000000000
1614 01:59:20.190068 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 01:59:20.193373 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 01:59:20.200920 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 01:59:20.206792 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 01:59:20.210105 fw_config match found: DB_USB=USB3_ACTIVE
1619 01:59:20.217050 Configure Right Type-C port orientation for retimer
1620 01:59:20.219824 Root Device init finished in 42 msecs
1621 01:59:20.223220 PCI: 00:00.0 init
1622 01:59:20.226493 CPU TDP = 9 Watts
1623 01:59:20.226630 CPU PL1 = 9 Watts
1624 01:59:20.230015 CPU PL2 = 40 Watts
1625 01:59:20.230094 CPU PL4 = 83 Watts
1626 01:59:20.233422 PCI: 00:00.0 init finished in 8 msecs
1627 01:59:20.237166 PCI: 00:02.0 init
1628 01:59:20.240408 GMA: Found VBT in CBFS
1629 01:59:20.243471 GMA: Found valid VBT in CBFS
1630 01:59:20.246807 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 01:59:20.256686 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 01:59:20.260060 PCI: 00:02.0 init finished in 18 msecs
1633 01:59:20.263462 PCI: 00:05.0 init
1634 01:59:20.266900 PCI: 00:05.0 init finished in 0 msecs
1635 01:59:20.266981 PCI: 00:08.0 init
1636 01:59:20.273220 PCI: 00:08.0 init finished in 0 msecs
1637 01:59:20.273301 PCI: 00:14.0 init
1638 01:59:20.280275 PCI: 00:14.0 init finished in 0 msecs
1639 01:59:20.280356 PCI: 00:14.2 init
1640 01:59:20.283100 PCI: 00:14.2 init finished in 0 msecs
1641 01:59:20.287010 PCI: 00:15.0 init
1642 01:59:20.290298 I2C bus 0 version 0x3230302a
1643 01:59:20.293729 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 01:59:20.296841 PCI: 00:15.0 init finished in 6 msecs
1645 01:59:20.300203 PCI: 00:15.1 init
1646 01:59:20.303729 I2C bus 1 version 0x3230302a
1647 01:59:20.306994 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 01:59:20.310058 PCI: 00:15.1 init finished in 6 msecs
1649 01:59:20.313531 PCI: 00:15.2 init
1650 01:59:20.316544 I2C bus 2 version 0x3230302a
1651 01:59:20.319902 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 01:59:20.323972 PCI: 00:15.2 init finished in 6 msecs
1653 01:59:20.326553 PCI: 00:15.3 init
1654 01:59:20.326672 I2C bus 3 version 0x3230302a
1655 01:59:20.333270 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 01:59:20.336456 PCI: 00:15.3 init finished in 6 msecs
1657 01:59:20.336536 PCI: 00:16.0 init
1658 01:59:20.343087 PCI: 00:16.0 init finished in 0 msecs
1659 01:59:20.343167 PCI: 00:19.1 init
1660 01:59:20.346510 I2C bus 5 version 0x3230302a
1661 01:59:20.349798 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 01:59:20.352850 PCI: 00:19.1 init finished in 6 msecs
1663 01:59:20.356586 PCI: 00:1d.0 init
1664 01:59:20.359681 Initializing PCH PCIe bridge.
1665 01:59:20.363124 PCI: 00:1d.0 init finished in 3 msecs
1666 01:59:20.366426 PCI: 00:1f.0 init
1667 01:59:20.369767 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 01:59:20.376478 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 01:59:20.376559 IOAPIC: ID = 0x02
1670 01:59:20.379645 IOAPIC: Dumping registers
1671 01:59:20.383238 reg 0x0000: 0x02000000
1672 01:59:20.386288 reg 0x0001: 0x00770020
1673 01:59:20.386368 reg 0x0002: 0x00000000
1674 01:59:20.392840 PCI: 00:1f.0 init finished in 21 msecs
1675 01:59:20.392921 PCI: 00:1f.2 init
1676 01:59:20.396015 Disabling ACPI via APMC.
1677 01:59:20.401305 APMC done.
1678 01:59:20.404620 PCI: 00:1f.2 init finished in 6 msecs
1679 01:59:20.416214 PCI: 01:00.0 init
1680 01:59:20.419552 PCI: 01:00.0 init finished in 0 msecs
1681 01:59:20.422956 PNP: 0c09.0 init
1682 01:59:20.429369 Google Chrome EC uptime: 8.440 seconds
1683 01:59:20.432920 Google Chrome AP resets since EC boot: 1
1684 01:59:20.436358 Google Chrome most recent AP reset causes:
1685 01:59:20.439197 0.381: 32775 shutdown: entering G3
1686 01:59:20.445809 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 01:59:20.448993 PNP: 0c09.0 init finished in 23 msecs
1688 01:59:20.455949 Devices initialized
1689 01:59:20.459134 Show all devs... After init.
1690 01:59:20.462472 Root Device: enabled 1
1691 01:59:20.462552 DOMAIN: 0000: enabled 1
1692 01:59:20.465853 CPU_CLUSTER: 0: enabled 1
1693 01:59:20.469022 PCI: 00:00.0: enabled 1
1694 01:59:20.472420 PCI: 00:02.0: enabled 1
1695 01:59:20.472501 PCI: 00:04.0: enabled 1
1696 01:59:20.475879 PCI: 00:05.0: enabled 1
1697 01:59:20.479192 PCI: 00:06.0: enabled 0
1698 01:59:20.482569 PCI: 00:07.0: enabled 0
1699 01:59:20.482684 PCI: 00:07.1: enabled 0
1700 01:59:20.485748 PCI: 00:07.2: enabled 0
1701 01:59:20.488925 PCI: 00:07.3: enabled 0
1702 01:59:20.492315 PCI: 00:08.0: enabled 1
1703 01:59:20.492396 PCI: 00:09.0: enabled 0
1704 01:59:20.495500 PCI: 00:0a.0: enabled 0
1705 01:59:20.498988 PCI: 00:0d.0: enabled 1
1706 01:59:20.502421 PCI: 00:0d.1: enabled 0
1707 01:59:20.502501 PCI: 00:0d.2: enabled 0
1708 01:59:20.505451 PCI: 00:0d.3: enabled 0
1709 01:59:20.508927 PCI: 00:0e.0: enabled 0
1710 01:59:20.512170 PCI: 00:10.2: enabled 1
1711 01:59:20.512250 PCI: 00:10.6: enabled 0
1712 01:59:20.515222 PCI: 00:10.7: enabled 0
1713 01:59:20.518987 PCI: 00:12.0: enabled 0
1714 01:59:20.521727 PCI: 00:12.6: enabled 0
1715 01:59:20.521807 PCI: 00:13.0: enabled 0
1716 01:59:20.525406 PCI: 00:14.0: enabled 1
1717 01:59:20.528794 PCI: 00:14.1: enabled 0
1718 01:59:20.528875 PCI: 00:14.2: enabled 1
1719 01:59:20.532224 PCI: 00:14.3: enabled 1
1720 01:59:20.535126 PCI: 00:15.0: enabled 1
1721 01:59:20.538294 PCI: 00:15.1: enabled 1
1722 01:59:20.538375 PCI: 00:15.2: enabled 1
1723 01:59:20.541843 PCI: 00:15.3: enabled 1
1724 01:59:20.545021 PCI: 00:16.0: enabled 1
1725 01:59:20.548577 PCI: 00:16.1: enabled 0
1726 01:59:20.548657 PCI: 00:16.2: enabled 0
1727 01:59:20.551620 PCI: 00:16.3: enabled 0
1728 01:59:20.554924 PCI: 00:16.4: enabled 0
1729 01:59:20.558044 PCI: 00:16.5: enabled 0
1730 01:59:20.558124 PCI: 00:17.0: enabled 0
1731 01:59:20.561467 PCI: 00:19.0: enabled 0
1732 01:59:20.564870 PCI: 00:19.1: enabled 1
1733 01:59:20.568103 PCI: 00:19.2: enabled 0
1734 01:59:20.568184 PCI: 00:1c.0: enabled 1
1735 01:59:20.571254 PCI: 00:1c.1: enabled 0
1736 01:59:20.574989 PCI: 00:1c.2: enabled 0
1737 01:59:20.578157 PCI: 00:1c.3: enabled 0
1738 01:59:20.578238 PCI: 00:1c.4: enabled 0
1739 01:59:20.581274 PCI: 00:1c.5: enabled 0
1740 01:59:20.584595 PCI: 00:1c.6: enabled 1
1741 01:59:20.588082 PCI: 00:1c.7: enabled 0
1742 01:59:20.588162 PCI: 00:1d.0: enabled 1
1743 01:59:20.591369 PCI: 00:1d.1: enabled 0
1744 01:59:20.594565 PCI: 00:1d.2: enabled 1
1745 01:59:20.594652 PCI: 00:1d.3: enabled 0
1746 01:59:20.598049 PCI: 00:1e.0: enabled 1
1747 01:59:20.600955 PCI: 00:1e.1: enabled 0
1748 01:59:20.604466 PCI: 00:1e.2: enabled 1
1749 01:59:20.604546 PCI: 00:1e.3: enabled 1
1750 01:59:20.607787 PCI: 00:1f.0: enabled 1
1751 01:59:20.611147 PCI: 00:1f.1: enabled 0
1752 01:59:20.614148 PCI: 00:1f.2: enabled 1
1753 01:59:20.614228 PCI: 00:1f.3: enabled 1
1754 01:59:20.617887 PCI: 00:1f.4: enabled 0
1755 01:59:20.620783 PCI: 00:1f.5: enabled 1
1756 01:59:20.624420 PCI: 00:1f.6: enabled 0
1757 01:59:20.624500 PCI: 00:1f.7: enabled 0
1758 01:59:20.627411 APIC: 00: enabled 1
1759 01:59:20.630705 GENERIC: 0.0: enabled 1
1760 01:59:20.630786 GENERIC: 0.0: enabled 1
1761 01:59:20.634180 GENERIC: 1.0: enabled 1
1762 01:59:20.636962 GENERIC: 0.0: enabled 1
1763 01:59:20.640266 GENERIC: 1.0: enabled 1
1764 01:59:20.640347 USB0 port 0: enabled 1
1765 01:59:20.643731 GENERIC: 0.0: enabled 1
1766 01:59:20.646921 USB0 port 0: enabled 1
1767 01:59:20.650297 GENERIC: 0.0: enabled 1
1768 01:59:20.650378 I2C: 00:1a: enabled 1
1769 01:59:20.653670 I2C: 00:31: enabled 1
1770 01:59:20.656830 I2C: 00:32: enabled 1
1771 01:59:20.656910 I2C: 00:10: enabled 1
1772 01:59:20.660319 I2C: 00:15: enabled 1
1773 01:59:20.663417 GENERIC: 0.0: enabled 0
1774 01:59:20.666820 GENERIC: 1.0: enabled 0
1775 01:59:20.666900 GENERIC: 0.0: enabled 1
1776 01:59:20.669907 SPI: 00: enabled 1
1777 01:59:20.669987 SPI: 00: enabled 1
1778 01:59:20.673108 PNP: 0c09.0: enabled 1
1779 01:59:20.676728 GENERIC: 0.0: enabled 1
1780 01:59:20.680037 USB3 port 0: enabled 1
1781 01:59:20.680118 USB3 port 1: enabled 1
1782 01:59:20.683142 USB3 port 2: enabled 0
1783 01:59:20.686566 USB3 port 3: enabled 0
1784 01:59:20.686695 USB2 port 0: enabled 0
1785 01:59:20.689882 USB2 port 1: enabled 1
1786 01:59:20.693335 USB2 port 2: enabled 1
1787 01:59:20.696400 USB2 port 3: enabled 0
1788 01:59:20.696481 USB2 port 4: enabled 1
1789 01:59:20.699998 USB2 port 5: enabled 0
1790 01:59:20.702893 USB2 port 6: enabled 0
1791 01:59:20.702973 USB2 port 7: enabled 0
1792 01:59:20.706118 USB2 port 8: enabled 0
1793 01:59:20.709865 USB2 port 9: enabled 0
1794 01:59:20.713234 USB3 port 0: enabled 0
1795 01:59:20.713315 USB3 port 1: enabled 1
1796 01:59:20.716640 USB3 port 2: enabled 0
1797 01:59:20.719368 USB3 port 3: enabled 0
1798 01:59:20.719449 GENERIC: 0.0: enabled 1
1799 01:59:20.722867 GENERIC: 1.0: enabled 1
1800 01:59:20.725982 APIC: 01: enabled 1
1801 01:59:20.726061 APIC: 03: enabled 1
1802 01:59:20.729457 APIC: 07: enabled 1
1803 01:59:20.733087 APIC: 05: enabled 1
1804 01:59:20.733168 APIC: 04: enabled 1
1805 01:59:20.735734 APIC: 02: enabled 1
1806 01:59:20.739767 APIC: 06: enabled 1
1807 01:59:20.739846 PCI: 01:00.0: enabled 1
1808 01:59:20.745588 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1809 01:59:20.748894 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 01:59:20.755584 ELOG: NV offset 0xf30000 size 0x1000
1811 01:59:20.762214 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 01:59:20.768752 ELOG: Event(17) added with size 13 at 2023-08-17 01:59:20 UTC
1813 01:59:20.775617 ELOG: Event(92) added with size 9 at 2023-08-17 01:59:20 UTC
1814 01:59:20.782386 ELOG: Event(93) added with size 9 at 2023-08-17 01:59:20 UTC
1815 01:59:20.788717 ELOG: Event(9E) added with size 10 at 2023-08-17 01:59:20 UTC
1816 01:59:20.795243 ELOG: Event(9F) added with size 14 at 2023-08-17 01:59:20 UTC
1817 01:59:20.798507 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 01:59:20.805164 ELOG: Event(A1) added with size 10 at 2023-08-17 01:59:20 UTC
1819 01:59:20.811757 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 01:59:20.818281 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 01:59:20.821561 Finalize devices...
1822 01:59:20.821640 Devices finalized
1823 01:59:20.828186 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 01:59:20.831908 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 01:59:20.838478 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 01:59:20.841505 ME: HFSTS1 : 0x80030055
1827 01:59:20.848214 ME: HFSTS2 : 0x30280116
1828 01:59:20.851601 ME: HFSTS3 : 0x00000050
1829 01:59:20.854828 ME: HFSTS4 : 0x00004000
1830 01:59:20.861373 ME: HFSTS5 : 0x00000000
1831 01:59:20.864603 ME: HFSTS6 : 0x00400006
1832 01:59:20.868049 ME: Manufacturing Mode : YES
1833 01:59:20.871233 ME: SPI Protection Mode Enabled : NO
1834 01:59:20.877769 ME: FW Partition Table : OK
1835 01:59:20.881402 ME: Bringup Loader Failure : NO
1836 01:59:20.884411 ME: Firmware Init Complete : NO
1837 01:59:20.887674 ME: Boot Options Present : NO
1838 01:59:20.891103 ME: Update In Progress : NO
1839 01:59:20.894675 ME: D0i3 Support : YES
1840 01:59:20.897978 ME: Low Power State Enabled : NO
1841 01:59:20.901221 ME: CPU Replaced : YES
1842 01:59:20.907789 ME: CPU Replacement Valid : YES
1843 01:59:20.911142 ME: Current Working State : 5
1844 01:59:20.914108 ME: Current Operation State : 1
1845 01:59:20.917725 ME: Current Operation Mode : 3
1846 01:59:20.920977 ME: Error Code : 0
1847 01:59:20.924192 ME: Enhanced Debug Mode : NO
1848 01:59:20.927386 ME: CPU Debug Disabled : YES
1849 01:59:20.930970 ME: TXT Support : NO
1850 01:59:20.937547 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 01:59:20.947343 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 01:59:20.950920 CBFS: 'fallback/slic' not found.
1853 01:59:20.953840 ACPI: Writing ACPI tables at 76b01000.
1854 01:59:20.953921 ACPI: * FACS
1855 01:59:20.957332 ACPI: * DSDT
1856 01:59:20.960572 Ramoops buffer: 0x100000@0x76a00000.
1857 01:59:20.963898 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 01:59:20.970365 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 01:59:20.973673 Google Chrome EC: version:
1860 01:59:20.977333 ro: voema_v2.0.7540-147f8d37d1
1861 01:59:20.980253 rw: voema_v2.0.7540-147f8d37d1
1862 01:59:20.980334 running image: 2
1863 01:59:20.986984 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 01:59:20.991905 ACPI: * FADT
1865 01:59:20.991986 SCI is IRQ9
1866 01:59:20.998194 ACPI: added table 1/32, length now 40
1867 01:59:20.998275 ACPI: * SSDT
1868 01:59:21.001763 Found 1 CPU(s) with 8 core(s) each.
1869 01:59:21.008369 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 01:59:21.011611 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 01:59:21.015258 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 01:59:21.018230 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 01:59:21.025260 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 01:59:21.031471 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 01:59:21.034772 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 01:59:21.041446 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 01:59:21.048117 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 01:59:21.051476 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 01:59:21.058152 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 01:59:21.061457 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 01:59:21.068058 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 01:59:21.071283 PS2K: Passing 80 keymaps to kernel
1883 01:59:21.077713 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 01:59:21.084248 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 01:59:21.091273 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 01:59:21.097906 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 01:59:21.104172 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 01:59:21.110838 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 01:59:21.117462 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 01:59:21.123854 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 01:59:21.127351 ACPI: added table 2/32, length now 44
1892 01:59:21.127430 ACPI: * MCFG
1893 01:59:21.133766 ACPI: added table 3/32, length now 48
1894 01:59:21.133846 ACPI: * TPM2
1895 01:59:21.137154 TPM2 log created at 0x769f0000
1896 01:59:21.140424 ACPI: added table 4/32, length now 52
1897 01:59:21.144158 ACPI: * MADT
1898 01:59:21.144238 SCI is IRQ9
1899 01:59:21.147299 ACPI: added table 5/32, length now 56
1900 01:59:21.150449 current = 76b09850
1901 01:59:21.150528 ACPI: * DMAR
1902 01:59:21.153699 ACPI: added table 6/32, length now 60
1903 01:59:21.160231 ACPI: added table 7/32, length now 64
1904 01:59:21.160310 ACPI: * HPET
1905 01:59:21.163728 ACPI: added table 8/32, length now 68
1906 01:59:21.167156 ACPI: done.
1907 01:59:21.167234 ACPI tables: 35216 bytes.
1908 01:59:21.170109 smbios_write_tables: 769ef000
1909 01:59:21.173678 EC returned error result code 3
1910 01:59:21.177069 Couldn't obtain OEM name from CBI
1911 01:59:21.181907 Create SMBIOS type 16
1912 01:59:21.184758 Create SMBIOS type 17
1913 01:59:21.188159 GENERIC: 0.0 (WIFI Device)
1914 01:59:21.191426 SMBIOS tables: 1750 bytes.
1915 01:59:21.194949 Writing table forward entry at 0x00000500
1916 01:59:21.201754 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 01:59:21.204443 Writing coreboot table at 0x76b25000
1918 01:59:21.211072 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 01:59:21.214719 1. 0000000000001000-000000000009ffff: RAM
1920 01:59:21.217634 2. 00000000000a0000-00000000000fffff: RESERVED
1921 01:59:21.224227 3. 0000000000100000-00000000769eefff: RAM
1922 01:59:21.227475 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 01:59:21.236465 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 01:59:21.240788 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 01:59:21.244308 7. 0000000077000000-000000007fbfffff: RESERVED
1926 01:59:21.251014 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 01:59:21.253959 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 01:59:21.257307 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 01:59:21.264373 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 01:59:21.267341 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 01:59:21.274144 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 01:59:21.277665 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 01:59:21.283927 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 01:59:21.287217 16. 0000000100000000-00000002803fffff: RAM
1935 01:59:21.290710 Passing 4 GPIOs to payload:
1936 01:59:21.294173 NAME | PORT | POLARITY | VALUE
1937 01:59:21.300410 lid | undefined | high | high
1938 01:59:21.306836 power | undefined | high | low
1939 01:59:21.310192 oprom | undefined | high | low
1940 01:59:21.316917 EC in RW | 0x000000e5 | high | high
1941 01:59:21.323542 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7f2a
1942 01:59:21.326795 coreboot table: 1576 bytes.
1943 01:59:21.330003 IMD ROOT 0. 0x76fff000 0x00001000
1944 01:59:21.333219 IMD SMALL 1. 0x76ffe000 0x00001000
1945 01:59:21.337095 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 01:59:21.340063 VPD 3. 0x76c4d000 0x00000367
1947 01:59:21.343124 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 01:59:21.346556 CONSOLE 5. 0x76c2c000 0x00020000
1949 01:59:21.353045 FMAP 6. 0x76c2b000 0x00000578
1950 01:59:21.356602 TIME STAMP 7. 0x76c2a000 0x00000910
1951 01:59:21.359734 VBOOT WORK 8. 0x76c16000 0x00014000
1952 01:59:21.363146 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 01:59:21.366272 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 01:59:21.369461 RAMSTAGE 11. 0x76b97000 0x00073000
1955 01:59:21.372631 REFCODE 12. 0x76b42000 0x00055000
1956 01:59:21.376395 SMM BACKUP 13. 0x76b32000 0x00010000
1957 01:59:21.382717 4f444749 14. 0x76b30000 0x00002000
1958 01:59:21.386084 EXT VBT15. 0x76b2d000 0x0000219f
1959 01:59:21.389271 COREBOOT 16. 0x76b25000 0x00008000
1960 01:59:21.392558 ACPI 17. 0x76b01000 0x00024000
1961 01:59:21.395924 ACPI GNVS 18. 0x76b00000 0x00001000
1962 01:59:21.399300 RAMOOPS 19. 0x76a00000 0x00100000
1963 01:59:21.402517 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 01:59:21.406332 SMBIOS 21. 0x769ef000 0x00000800
1965 01:59:21.408911 IMD small region:
1966 01:59:21.412314 IMD ROOT 0. 0x76ffec00 0x00000400
1967 01:59:21.415786 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 01:59:21.422454 POWER STATE 2. 0x76ffeb80 0x00000044
1969 01:59:21.425487 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 01:59:21.429217 MEM INFO 4. 0x76ffe980 0x000001e0
1971 01:59:21.435416 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1972 01:59:21.439092 MTRR: Physical address space:
1973 01:59:21.445501 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 01:59:21.448559 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 01:59:21.455309 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 01:59:21.462254 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 01:59:21.468579 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 01:59:21.475312 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 01:59:21.481536 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 01:59:21.485076 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 01:59:21.488660 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 01:59:21.494922 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 01:59:21.498213 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 01:59:21.501629 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 01:59:21.504851 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 01:59:21.511468 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 01:59:21.514685 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 01:59:21.518425 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 01:59:21.521506 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 01:59:21.524762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 01:59:21.529541 call enable_fixed_mtrr()
1992 01:59:21.532779 CPU physical address size: 39 bits
1993 01:59:21.539428 MTRR: default type WB/UC MTRR counts: 6/6.
1994 01:59:21.542861 MTRR: UC selected as default type.
1995 01:59:21.549796 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 01:59:21.552929 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 01:59:21.559437 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 01:59:21.565842 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 01:59:21.572366 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 01:59:21.579161 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 01:59:21.579243
2002 01:59:21.582265 MTRR check
2003 01:59:21.585790 Fixed MTRRs : Enabled
2004 01:59:21.585898 Variable MTRRs: Enabled
2005 01:59:21.585989
2006 01:59:21.592039 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 01:59:21.595496 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 01:59:21.598709 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 01:59:21.602397 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 01:59:21.608644 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 01:59:21.611829 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 01:59:21.615169 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 01:59:21.618519 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 01:59:21.624982 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 01:59:21.628435 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 01:59:21.631682 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 01:59:21.638332 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2018 01:59:21.641390 call enable_fixed_mtrr()
2019 01:59:21.644891 Checking cr50 for pending updates
2020 01:59:21.649110 CPU physical address size: 39 bits
2021 01:59:21.652267 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 01:59:21.655510 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 01:59:21.662792 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 01:59:21.665989 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 01:59:21.669002 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 01:59:21.672047 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 01:59:21.675616 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 01:59:21.682051 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 01:59:21.685471 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 01:59:21.689091 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 01:59:21.691857 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 01:59:21.698506 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 01:59:21.701907 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 01:59:21.705142 call enable_fixed_mtrr()
2035 01:59:21.708583 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 01:59:21.714946 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 01:59:21.718273 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 01:59:21.722110 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 01:59:21.724903 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 01:59:21.728515 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 01:59:21.735309 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 01:59:21.738431 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 01:59:21.741613 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 01:59:21.745203 CPU physical address size: 39 bits
2045 01:59:21.751474 call enable_fixed_mtrr()
2046 01:59:21.754875 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 01:59:21.758108 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 01:59:21.761519 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 01:59:21.768189 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 01:59:21.771465 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 01:59:21.775074 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 01:59:21.778335 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 01:59:21.781639 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 01:59:21.788031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 01:59:21.791467 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 01:59:21.794904 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 01:59:21.798171 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 01:59:21.806441 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 01:59:21.809169 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 01:59:21.812645 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 01:59:21.816032 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 01:59:21.822123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 01:59:21.825765 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 01:59:21.828833 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 01:59:21.831966 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 01:59:21.838585 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 01:59:21.842343 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 01:59:21.845291 call enable_fixed_mtrr()
2069 01:59:21.849378 call enable_fixed_mtrr()
2070 01:59:21.849459 Reading cr50 TPM mode
2071 01:59:21.853346 CPU physical address size: 39 bits
2072 01:59:21.856463 CPU physical address size: 39 bits
2073 01:59:21.862891 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 01:59:21.866212 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 01:59:21.869676 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 01:59:21.872840 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 01:59:21.880259 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 01:59:21.883105 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 01:59:21.886738 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 01:59:21.889810 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 01:59:21.896637 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 01:59:21.899522 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 01:59:21.903041 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 01:59:21.905954 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 01:59:21.913286 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 01:59:21.913381 call enable_fixed_mtrr()
2087 01:59:21.920093 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 01:59:21.923402 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 01:59:21.926577 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 01:59:21.930132 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 01:59:21.936613 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 01:59:21.939830 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 01:59:21.943399 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 01:59:21.946811 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 01:59:21.953147 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 01:59:21.956686 CPU physical address size: 39 bits
2097 01:59:21.960211 call enable_fixed_mtrr()
2098 01:59:21.963298 CPU physical address size: 39 bits
2099 01:59:21.969656 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2100 01:59:21.973015 CPU physical address size: 39 bits
2101 01:59:21.979350 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 01:59:21.986162 Checking segment from ROM address 0xffc02b38
2103 01:59:21.989195 Checking segment from ROM address 0xffc02b54
2104 01:59:21.992633 Loading segment from ROM address 0xffc02b38
2105 01:59:21.996048 code (compression=0)
2106 01:59:22.006178 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 01:59:22.012514 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 01:59:22.015938 it's not compressed!
2109 01:59:22.154403 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 01:59:22.161078 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 01:59:22.167665 Loading segment from ROM address 0xffc02b54
2112 01:59:22.171330 Entry Point 0x30000000
2113 01:59:22.171411 Loaded segments
2114 01:59:22.177365 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2115 01:59:22.220906 Finalizing chipset.
2116 01:59:22.223985 Finalizing SMM.
2117 01:59:22.224068 APMC done.
2118 01:59:22.230463 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 01:59:22.233692 mp_park_aps done after 0 msecs.
2120 01:59:22.236972 Jumping to boot code at 0x30000000(0x76b25000)
2121 01:59:22.246863 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 01:59:22.246952
2123 01:59:22.247017
2124 01:59:22.250177
2125 01:59:22.250257 Starting depthcharge on Voema...
2126 01:59:22.250631 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2127 01:59:22.250752 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2128 01:59:22.250834 Setting prompt string to ['volteer:']
2129 01:59:22.250914 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2130 01:59:22.253634
2131 01:59:22.260294 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 01:59:22.260375
2133 01:59:22.266727 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 01:59:22.266807
2135 01:59:22.273579 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 01:59:22.273706
2137 01:59:22.276999 Failed to find eMMC card reader
2138 01:59:22.277080
2139 01:59:22.277143 Wipe memory regions:
2140 01:59:22.280204
2141 01:59:22.283710 [0x00000000001000, 0x000000000a0000)
2142 01:59:22.283789
2143 01:59:22.286337 [0x00000000100000, 0x00000030000000)
2144 01:59:22.312066
2145 01:59:22.315091 [0x00000032662db0, 0x000000769ef000)
2146 01:59:22.351073
2147 01:59:22.354728 [0x00000100000000, 0x00000280400000)
2148 01:59:22.556517
2149 01:59:22.559805 ec_init: CrosEC protocol v3 supported (256, 256)
2150 01:59:22.559905
2151 01:59:22.566520 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 01:59:22.566609
2153 01:59:22.576378 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 01:59:22.576476
2155 01:59:22.579584 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2156 01:59:22.579665
2157 01:59:22.586415 send_conn_disc_msg: pmc_send_cmd succeeded
2158 01:59:23.016394
2159 01:59:23.016616 R8152: Initializing
2160 01:59:23.016769
2161 01:59:23.019197 Version 6 (ocp_data = 5c30)
2162 01:59:23.019277
2163 01:59:23.022279 R8152: Done initializing
2164 01:59:23.022359
2165 01:59:23.025630 Adding net device
2166 01:59:23.327099
2167 01:59:23.329924 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 01:59:23.330007
2169 01:59:23.330071
2170 01:59:23.330130
2171 01:59:23.333460 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 01:59:23.433835 volteer: tftpboot 192.168.201.1 11304530/tftp-deploy-ufgfty0_/kernel/bzImage 11304530/tftp-deploy-ufgfty0_/kernel/cmdline 11304530/tftp-deploy-ufgfty0_/ramdisk/ramdisk.cpio.gz
2174 01:59:23.433972 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 01:59:23.434055 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 01:59:23.438068 tftpboot 192.168.201.1 11304530/tftp-deploy-ufgfty0_/kernel/bzIploy-ufgfty0_/kernel/cmdline 11304530/tftp-deploy-ufgfty0_/ramdisk/ramdisk.cpio.gz
2177 01:59:23.438153
2178 01:59:23.438218 Waiting for link
2179 01:59:23.641478
2180 01:59:23.641617 done.
2181 01:59:23.641682
2182 01:59:23.641741 MAC: 00:24:32:30:79:42
2183 01:59:23.641798
2184 01:59:23.644505 Sending DHCP discover... done.
2185 01:59:23.644600
2186 01:59:23.647893 Waiting for reply... done.
2187 01:59:23.647975
2188 01:59:23.651494 Sending DHCP request... done.
2189 01:59:23.651589
2190 01:59:23.654759 Waiting for reply... done.
2191 01:59:23.654839
2192 01:59:23.657923 My ip is 192.168.201.13
2193 01:59:23.658003
2194 01:59:23.661107 The DHCP server ip is 192.168.201.1
2195 01:59:23.661187
2196 01:59:23.667508 TFTP server IP predefined by user: 192.168.201.1
2197 01:59:23.667588
2198 01:59:23.674249 Bootfile predefined by user: 11304530/tftp-deploy-ufgfty0_/kernel/bzImage
2199 01:59:23.674354
2200 01:59:23.677533 Sending tftp read request... done.
2201 01:59:23.677613
2202 01:59:23.680619 Waiting for the transfer...
2203 01:59:23.680731
2204 01:59:24.318985 00000000 ################################################################
2205 01:59:24.319451
2206 01:59:25.017870 00080000 ################################################################
2207 01:59:25.018369
2208 01:59:25.717342 00100000 ################################################################
2209 01:59:25.717821
2210 01:59:26.422653 00180000 ################################################################
2211 01:59:26.423169
2212 01:59:27.135795 00200000 ################################################################
2213 01:59:27.136343
2214 01:59:27.855150 00280000 ################################################################
2215 01:59:27.855693
2216 01:59:28.558699 00300000 ################################################################
2217 01:59:28.559215
2218 01:59:29.258751 00380000 ################################################################
2219 01:59:29.259301
2221 02:04:06.251755 end: 2.2.4 bootloader-commands (duration 00:04:44) [common]
2223 02:04:06.252819 depthcharge-retry failed: 1 of 1 attempts. 'bootloader-commands timed out after 284 seconds'
2225 02:04:06.253706 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2228 02:04:06.255178 end: 2 depthcharge-action (duration 00:05:00) [common]
2230 02:04:06.256099 Cleaning after the job
2231 02:04:06.256189 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/ramdisk
2232 02:04:06.257079 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/kernel
2233 02:04:06.258357 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/nfsrootfs
2234 02:04:06.334123 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11304530/tftp-deploy-ufgfty0_/modules
2235 02:04:06.334634 start: 5.1 power-off (timeout 00:00:30) [common]
2236 02:04:06.334830 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2237 02:04:06.413617 >> Command sent successfully.
2238 02:04:06.418389 Returned 0 in 0 seconds
2239 02:04:06.519355 end: 5.1 power-off (duration 00:00:00) [common]
2241 02:04:06.520998 start: 5.2 read-feedback (timeout 00:10:00) [common]
2242 02:04:06.522340 Listened to connection for namespace 'common' for up to 1s
2243 02:04:07.522967 Finalising connection for namespace 'common'
2244 02:04:07.523651 Disconnecting from shell: Finalise
2245 02:04:07.524079 00400000 ##############################################################
2246 02:04:07.625231 end: 5.2 read-feedback (duration 00:00:01) [common]
2247 02:04:07.625862 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11304530
2248 02:04:07.944799 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11304530
2249 02:04:07.944993 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.