Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 19:47:36.142066 lava-dispatcher, installed at version: 2023.08
2 19:47:36.142280 start: 0 validate
3 19:47:36.142410 Start time: 2023-10-28 19:47:36.142402+00:00 (UTC)
4 19:47:36.142558 Using caching service: 'http://localhost/cache/?uri=%s'
5 19:47:36.142702 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 19:47:36.418746 Using caching service: 'http://localhost/cache/?uri=%s'
7 19:47:36.419468 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip80-rt46%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 19:47:36.691215 Using caching service: 'http://localhost/cache/?uri=%s'
9 19:47:36.691952 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 19:47:36.962240 Using caching service: 'http://localhost/cache/?uri=%s'
11 19:47:36.963113 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip80-rt46%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 19:47:37.240019 validate duration: 1.10
14 19:47:37.241440 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 19:47:37.241997 start: 1.1 download-retry (timeout 00:10:00) [common]
16 19:47:37.242516 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 19:47:37.243188 Not decompressing ramdisk as can be used compressed.
18 19:47:37.243675 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 19:47:37.244062 saving as /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/ramdisk/initrd.cpio.gz
20 19:47:37.244439 total size: 5671549 (5 MB)
21 19:47:37.250514 progress 0 % (0 MB)
22 19:47:37.261046 progress 5 % (0 MB)
23 19:47:37.267248 progress 10 % (0 MB)
24 19:47:37.271344 progress 15 % (0 MB)
25 19:47:37.275054 progress 20 % (1 MB)
26 19:47:37.278334 progress 25 % (1 MB)
27 19:47:37.281014 progress 30 % (1 MB)
28 19:47:37.283653 progress 35 % (1 MB)
29 19:47:37.286191 progress 40 % (2 MB)
30 19:47:37.288257 progress 45 % (2 MB)
31 19:47:37.290461 progress 50 % (2 MB)
32 19:47:37.292567 progress 55 % (3 MB)
33 19:47:37.294322 progress 60 % (3 MB)
34 19:47:37.296294 progress 65 % (3 MB)
35 19:47:37.298111 progress 70 % (3 MB)
36 19:47:37.299771 progress 75 % (4 MB)
37 19:47:37.301545 progress 80 % (4 MB)
38 19:47:37.303243 progress 85 % (4 MB)
39 19:47:37.304734 progress 90 % (4 MB)
40 19:47:37.306356 progress 95 % (5 MB)
41 19:47:37.307914 progress 100 % (5 MB)
42 19:47:37.308021 5 MB downloaded in 0.06 s (85.03 MB/s)
43 19:47:37.308170 end: 1.1.1 http-download (duration 00:00:00) [common]
45 19:47:37.308450 end: 1.1 download-retry (duration 00:00:00) [common]
46 19:47:37.308629 start: 1.2 download-retry (timeout 00:10:00) [common]
47 19:47:37.308717 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 19:47:37.308850 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip80-rt46/x86_64/defconfig+x86-board/gcc-10/kernel/bzImage
49 19:47:37.308919 saving as /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/kernel/bzImage
50 19:47:37.308981 total size: 8576912 (8 MB)
51 19:47:37.309041 No compression specified
52 19:47:37.310200 progress 0 % (0 MB)
53 19:47:37.312741 progress 5 % (0 MB)
54 19:47:37.314953 progress 10 % (0 MB)
55 19:47:37.317165 progress 15 % (1 MB)
56 19:47:37.319371 progress 20 % (1 MB)
57 19:47:37.321566 progress 25 % (2 MB)
58 19:47:37.323775 progress 30 % (2 MB)
59 19:47:37.326029 progress 35 % (2 MB)
60 19:47:37.328239 progress 40 % (3 MB)
61 19:47:37.330431 progress 45 % (3 MB)
62 19:47:37.332620 progress 50 % (4 MB)
63 19:47:37.334798 progress 55 % (4 MB)
64 19:47:37.337157 progress 60 % (4 MB)
65 19:47:37.339442 progress 65 % (5 MB)
66 19:47:37.341666 progress 70 % (5 MB)
67 19:47:37.343957 progress 75 % (6 MB)
68 19:47:37.346221 progress 80 % (6 MB)
69 19:47:37.348437 progress 85 % (6 MB)
70 19:47:37.350702 progress 90 % (7 MB)
71 19:47:37.352856 progress 95 % (7 MB)
72 19:47:37.355082 progress 100 % (8 MB)
73 19:47:37.355284 8 MB downloaded in 0.05 s (176.67 MB/s)
74 19:47:37.355421 end: 1.2.1 http-download (duration 00:00:00) [common]
76 19:47:37.355643 end: 1.2 download-retry (duration 00:00:00) [common]
77 19:47:37.355728 start: 1.3 download-retry (timeout 00:10:00) [common]
78 19:47:37.355819 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 19:47:37.356068 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 19:47:37.356137 saving as /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/nfsrootfs/full.rootfs.tar
81 19:47:37.356196 total size: 126031368 (120 MB)
82 19:47:37.356257 Using unxz to decompress xz
83 19:47:37.360613 progress 0 % (0 MB)
84 19:47:37.852261 progress 5 % (6 MB)
85 19:47:38.345648 progress 10 % (12 MB)
86 19:47:38.844094 progress 15 % (18 MB)
87 19:47:39.360596 progress 20 % (24 MB)
88 19:47:39.714020 progress 25 % (30 MB)
89 19:47:40.054734 progress 30 % (36 MB)
90 19:47:40.324281 progress 35 % (42 MB)
91 19:47:40.506652 progress 40 % (48 MB)
92 19:47:40.883716 progress 45 % (54 MB)
93 19:47:41.249351 progress 50 % (60 MB)
94 19:47:41.595140 progress 55 % (66 MB)
95 19:47:41.950313 progress 60 % (72 MB)
96 19:47:42.280735 progress 65 % (78 MB)
97 19:47:42.658684 progress 70 % (84 MB)
98 19:47:43.067100 progress 75 % (90 MB)
99 19:47:43.475397 progress 80 % (96 MB)
100 19:47:43.572274 progress 85 % (102 MB)
101 19:47:43.725795 progress 90 % (108 MB)
102 19:47:44.055561 progress 95 % (114 MB)
103 19:47:44.422928 progress 100 % (120 MB)
104 19:47:44.427660 120 MB downloaded in 7.07 s (17.00 MB/s)
105 19:47:44.427913 end: 1.3.1 http-download (duration 00:00:07) [common]
107 19:47:44.428168 end: 1.3 download-retry (duration 00:00:07) [common]
108 19:47:44.428259 start: 1.4 download-retry (timeout 00:09:53) [common]
109 19:47:44.428346 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 19:47:44.428500 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip80-rt46/x86_64/defconfig+x86-board/gcc-10/modules.tar.xz
111 19:47:44.428570 saving as /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/modules/modules.tar
112 19:47:44.428632 total size: 253824 (0 MB)
113 19:47:44.428697 Using unxz to decompress xz
114 19:47:44.432775 progress 12 % (0 MB)
115 19:47:44.433168 progress 25 % (0 MB)
116 19:47:44.433449 progress 38 % (0 MB)
117 19:47:44.435095 progress 51 % (0 MB)
118 19:47:44.437022 progress 64 % (0 MB)
119 19:47:44.438900 progress 77 % (0 MB)
120 19:47:44.440621 progress 90 % (0 MB)
121 19:47:44.442516 progress 100 % (0 MB)
122 19:47:44.447923 0 MB downloaded in 0.02 s (12.55 MB/s)
123 19:47:44.448150 end: 1.4.1 http-download (duration 00:00:00) [common]
125 19:47:44.448403 end: 1.4 download-retry (duration 00:00:00) [common]
126 19:47:44.448496 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 19:47:44.448593 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 19:47:47.392942 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11899461/extract-nfsrootfs-ews1s07i
129 19:47:47.393142 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 19:47:47.393245 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 19:47:47.393404 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7
132 19:47:47.393535 makedir: /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin
133 19:47:47.393636 makedir: /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/tests
134 19:47:47.393733 makedir: /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/results
135 19:47:47.393833 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-add-keys
136 19:47:47.393976 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-add-sources
137 19:47:47.394105 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-background-process-start
138 19:47:47.394235 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-background-process-stop
139 19:47:47.394360 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-common-functions
140 19:47:47.394485 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-echo-ipv4
141 19:47:47.394680 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-install-packages
142 19:47:47.394807 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-installed-packages
143 19:47:47.394931 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-os-build
144 19:47:47.395056 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-probe-channel
145 19:47:47.395182 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-probe-ip
146 19:47:47.395306 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-target-ip
147 19:47:47.395430 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-target-mac
148 19:47:47.395553 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-target-storage
149 19:47:47.395680 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-case
150 19:47:47.395808 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-event
151 19:47:47.395931 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-feedback
152 19:47:47.396056 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-raise
153 19:47:47.396179 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-reference
154 19:47:47.396304 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-runner
155 19:47:47.396430 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-set
156 19:47:47.396553 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-test-shell
157 19:47:47.396678 Updating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-install-packages (oe)
158 19:47:47.396833 Updating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/bin/lava-installed-packages (oe)
159 19:47:47.396955 Creating /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/environment
160 19:47:47.397051 LAVA metadata
161 19:47:47.397121 - LAVA_JOB_ID=11899461
162 19:47:47.397184 - LAVA_DISPATCHER_IP=192.168.201.1
163 19:47:47.397283 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 19:47:47.397349 skipped lava-vland-overlay
165 19:47:47.397422 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 19:47:47.397500 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 19:47:47.397560 skipped lava-multinode-overlay
168 19:47:47.397632 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 19:47:47.397708 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 19:47:47.397782 Loading test definitions
171 19:47:47.397869 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 19:47:47.397939 Using /lava-11899461 at stage 0
173 19:47:47.398036 Fetching tests from https://github.com/kernelci/test-definitions
174 19:47:47.398124 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/0/tests/0_ltp-timers'
175 19:47:51.320602 Running '/usr/bin/git checkout kernelci.org
176 19:47:51.465758 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
177 19:47:51.466485 uuid=11899461_1.5.2.3.1 testdef=None
178 19:47:51.466696 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 19:47:51.466946 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
181 19:47:51.467631 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 19:47:51.467866 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
184 19:47:51.468735 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 19:47:51.468976 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
187 19:47:51.469816 runner path: /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/0/tests/0_ltp-timers test_uuid 11899461_1.5.2.3.1
188 19:47:51.469906 GRP_TEST='TMR'
189 19:47:51.469971 SKIPFILE='skipfile-lkft.yaml'
190 19:47:51.470031 SKIP_INSTALL='true'
191 19:47:51.470087 TST_CMDFILES=''
192 19:47:51.470224 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 19:47:51.470432 Creating lava-test-runner.conf files
195 19:47:51.470496 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11899461/lava-overlay-tuo55nc7/lava-11899461/0 for stage 0
196 19:47:51.470627 - 0_ltp-timers
197 19:47:51.470735 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
198 19:47:51.470824 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
199 19:47:58.873007 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
200 19:47:58.873170 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
201 19:47:58.873261 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 19:47:58.873359 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
203 19:47:58.873447 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
204 19:47:59.013950 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 19:47:59.014350 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
206 19:47:59.014480 extracting modules file /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11899461/extract-nfsrootfs-ews1s07i
207 19:47:59.028332 extracting modules file /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11899461/extract-overlay-ramdisk-zv75a2uc/ramdisk
208 19:47:59.042024 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 19:47:59.042144 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
210 19:47:59.042232 [common] Applying overlay to NFS
211 19:47:59.042303 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11899461/compress-overlay-79tpp69t/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11899461/extract-nfsrootfs-ews1s07i
212 19:47:59.947388 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
213 19:47:59.947554 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
214 19:47:59.947651 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 19:47:59.947741 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
216 19:47:59.947819 Building ramdisk /var/lib/lava/dispatcher/tmp/11899461/extract-overlay-ramdisk-zv75a2uc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11899461/extract-overlay-ramdisk-zv75a2uc/ramdisk
217 19:48:00.030055 >> 27217 blocks
218 19:48:00.604735 rename /var/lib/lava/dispatcher/tmp/11899461/extract-overlay-ramdisk-zv75a2uc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/ramdisk/ramdisk.cpio.gz
219 19:48:00.605196 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 19:48:00.605326 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
221 19:48:00.605431 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
222 19:48:00.605533 No mkimage arch provided, not using FIT.
223 19:48:00.605625 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 19:48:00.605708 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 19:48:00.605810 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
226 19:48:00.605902 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
227 19:48:00.605982 No LXC device requested
228 19:48:00.606059 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 19:48:00.606148 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
230 19:48:00.606231 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 19:48:00.606304 Checking files for TFTP limit of 4294967296 bytes.
232 19:48:00.606774 end: 1 tftp-deploy (duration 00:00:23) [common]
233 19:48:00.606885 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 19:48:00.606979 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 19:48:00.607103 substitutions:
236 19:48:00.607176 - {DTB}: None
237 19:48:00.607238 - {INITRD}: 11899461/tftp-deploy-ock5jj3f/ramdisk/ramdisk.cpio.gz
238 19:48:00.607298 - {KERNEL}: 11899461/tftp-deploy-ock5jj3f/kernel/bzImage
239 19:48:00.607357 - {LAVA_MAC}: None
240 19:48:00.607414 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11899461/extract-nfsrootfs-ews1s07i
241 19:48:00.607471 - {NFS_SERVER_IP}: 192.168.201.1
242 19:48:00.607526 - {PRESEED_CONFIG}: None
243 19:48:00.607581 - {PRESEED_LOCAL}: None
244 19:48:00.607635 - {RAMDISK}: 11899461/tftp-deploy-ock5jj3f/ramdisk/ramdisk.cpio.gz
245 19:48:00.607690 - {ROOT_PART}: None
246 19:48:00.607744 - {ROOT}: None
247 19:48:00.607798 - {SERVER_IP}: 192.168.201.1
248 19:48:00.607852 - {TEE}: None
249 19:48:00.607906 Parsed boot commands:
250 19:48:00.607960 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 19:48:00.608138 Parsed boot commands: tftpboot 192.168.201.1 11899461/tftp-deploy-ock5jj3f/kernel/bzImage 11899461/tftp-deploy-ock5jj3f/kernel/cmdline 11899461/tftp-deploy-ock5jj3f/ramdisk/ramdisk.cpio.gz
252 19:48:00.608228 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 19:48:00.608312 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 19:48:00.608405 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 19:48:00.608493 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 19:48:00.608563 Not connected, no need to disconnect.
257 19:48:00.608636 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 19:48:00.608720 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 19:48:00.608785 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
260 19:48:00.612790 Setting prompt string to ['lava-test: # ']
261 19:48:00.613149 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 19:48:00.613256 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 19:48:00.613352 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 19:48:00.613485 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 19:48:00.613716 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
266 19:48:05.764832 >> Command sent successfully.
267 19:48:05.776229 Returned 0 in 5 seconds
268 19:48:05.877580 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 19:48:05.879166 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 19:48:05.879744 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 19:48:05.880243 Setting prompt string to 'Starting depthcharge on Helios...'
273 19:48:05.880628 Changing prompt to 'Starting depthcharge on Helios...'
274 19:48:05.881016 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
275 19:48:05.882342 [Enter `^Ec?' for help]
276 19:48:06.490362
277 19:48:06.490977
278 19:48:06.499959 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
279 19:48:06.503459 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
280 19:48:06.510678 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
281 19:48:06.513867 CPU: AES supported, TXT NOT supported, VT supported
282 19:48:06.520460 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
283 19:48:06.523938 PCH: device id 0284 (rev 00) is Cometlake-U Premium
284 19:48:06.530290 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
285 19:48:06.533928 VBOOT: Loading verstage.
286 19:48:06.537178 FMAP: Found "FLASH" version 1.1 at 0xc04000.
287 19:48:06.543905 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
288 19:48:06.547145 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
289 19:48:06.550266 CBFS @ c08000 size 3f8000
290 19:48:06.557227 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
291 19:48:06.560717 CBFS: Locating 'fallback/verstage'
292 19:48:06.563472 CBFS: Found @ offset 10fb80 size 1072c
293 19:48:06.567072
294 19:48:06.567639
295 19:48:06.576617 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
296 19:48:06.591970 Probing TPM: . done!
297 19:48:06.594638 TPM ready after 0 ms
298 19:48:06.598129 Connected to device vid:did:rid of 1ae0:0028:00
299 19:48:06.608189 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
300 19:48:06.611649 Initialized TPM device CR50 revision 0
301 19:48:06.658467 tlcl_send_startup: Startup return code is 0
302 19:48:06.659093 TPM: setup succeeded
303 19:48:06.671706 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
304 19:48:06.675178 Chrome EC: UHEPI supported
305 19:48:06.678472 Phase 1
306 19:48:06.681760 FMAP: area GBB found @ c05000 (12288 bytes)
307 19:48:06.688839 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
308 19:48:06.689417 Phase 2
309 19:48:06.692370 Phase 3
310 19:48:06.695457 FMAP: area GBB found @ c05000 (12288 bytes)
311 19:48:06.701718 VB2:vb2_report_dev_firmware() This is developer signed firmware
312 19:48:06.708699 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 19:48:06.711989 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 19:48:06.718927 VB2:vb2_verify_keyblock() Checking keyblock signature...
315 19:48:06.734276 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 19:48:06.737489 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 19:48:06.744451 VB2:vb2_verify_fw_preamble() Verifying preamble.
318 19:48:06.748593 Phase 4
319 19:48:06.751322 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
320 19:48:06.758429 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
321 19:48:06.938078 VB2:vb2_rsa_verify_digest() Digest check failed!
322 19:48:06.944150 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
323 19:48:06.944727 Saving nvdata
324 19:48:06.947350 Reboot requested (10020007)
325 19:48:06.950900 board_reset() called!
326 19:48:06.951470 full_reset() called!
327 19:48:11.457352
328 19:48:11.457950
329 19:48:11.467814 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
330 19:48:11.470923 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
331 19:48:11.477644 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
332 19:48:11.480997 CPU: AES supported, TXT NOT supported, VT supported
333 19:48:11.487306 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
334 19:48:11.490648 PCH: device id 0284 (rev 00) is Cometlake-U Premium
335 19:48:11.497810 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
336 19:48:11.500673 VBOOT: Loading verstage.
337 19:48:11.504380 FMAP: Found "FLASH" version 1.1 at 0xc04000.
338 19:48:11.511220 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
339 19:48:11.514372 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 19:48:11.517219 CBFS @ c08000 size 3f8000
341 19:48:11.524597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 19:48:11.527455 CBFS: Locating 'fallback/verstage'
343 19:48:11.531289 CBFS: Found @ offset 10fb80 size 1072c
344 19:48:11.534142
345 19:48:11.534778
346 19:48:11.544260 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
347 19:48:11.558814 Probing TPM: . done!
348 19:48:11.562252 TPM ready after 0 ms
349 19:48:11.565147 Connected to device vid:did:rid of 1ae0:0028:00
350 19:48:11.575359 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
351 19:48:11.578499 Initialized TPM device CR50 revision 0
352 19:48:11.627234 tlcl_send_startup: Startup return code is 0
353 19:48:11.627813 TPM: setup succeeded
354 19:48:11.639956 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
355 19:48:11.643689 Chrome EC: UHEPI supported
356 19:48:11.647021 Phase 1
357 19:48:11.650242 FMAP: area GBB found @ c05000 (12288 bytes)
358 19:48:11.657052 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
359 19:48:11.663356 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
360 19:48:11.666847 Recovery requested (1009000e)
361 19:48:11.672328 Saving nvdata
362 19:48:11.678318 tlcl_extend: response is 0
363 19:48:11.687204 tlcl_extend: response is 0
364 19:48:11.694581 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
365 19:48:11.697558 CBFS @ c08000 size 3f8000
366 19:48:11.704560 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
367 19:48:11.707962 CBFS: Locating 'fallback/romstage'
368 19:48:11.711066 CBFS: Found @ offset 80 size 145fc
369 19:48:11.714241 Accumulated console time in verstage 99 ms
370 19:48:11.714885
371 19:48:11.715270
372 19:48:11.727166 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
373 19:48:11.733837 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
374 19:48:11.737444 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
375 19:48:11.740778 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 19:48:11.747064 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
377 19:48:11.750989 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 19:48:11.753935 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
379 19:48:11.757106 TCO_STS: 0000 0000
380 19:48:11.760505 GEN_PMCON: e0015238 00000200
381 19:48:11.763626 GBLRST_CAUSE: 00000000 00000000
382 19:48:11.764197 prev_sleep_state 5
383 19:48:11.767477 Boot Count incremented to 72380
384 19:48:11.774725 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 19:48:11.777449 CBFS @ c08000 size 3f8000
386 19:48:11.783597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 19:48:11.784180 CBFS: Locating 'fspm.bin'
388 19:48:11.790704 CBFS: Found @ offset 5ffc0 size 71000
389 19:48:11.793659 Chrome EC: UHEPI supported
390 19:48:11.800449 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
391 19:48:11.804255 Probing TPM: done!
392 19:48:11.810850 Connected to device vid:did:rid of 1ae0:0028:00
393 19:48:11.820330 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
394 19:48:11.826748 Initialized TPM device CR50 revision 0
395 19:48:11.835265 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 19:48:11.842110 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
397 19:48:11.845720 MRC cache found, size 1948
398 19:48:11.849030 bootmode is set to: 2
399 19:48:11.851902 PRMRR disabled by config.
400 19:48:11.855553 SPD INDEX = 1
401 19:48:11.858496 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 19:48:11.862646 CBFS @ c08000 size 3f8000
403 19:48:11.868169 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 19:48:11.868596 CBFS: Locating 'spd.bin'
405 19:48:11.872021 CBFS: Found @ offset 5fb80 size 400
406 19:48:11.874917 SPD: module type is LPDDR3
407 19:48:11.878435 SPD: module part is
408 19:48:11.885230 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
409 19:48:11.888151 SPD: device width 4 bits, bus width 8 bits
410 19:48:11.891677 SPD: module size is 4096 MB (per channel)
411 19:48:11.894923 memory slot: 0 configuration done.
412 19:48:11.898639 memory slot: 2 configuration done.
413 19:48:11.950358 CBMEM:
414 19:48:11.954432 IMD: root @ 99fff000 254 entries.
415 19:48:11.956942 IMD: root @ 99ffec00 62 entries.
416 19:48:11.960681 External stage cache:
417 19:48:11.964249 IMD: root @ 9abff000 254 entries.
418 19:48:11.967776 IMD: root @ 9abfec00 62 entries.
419 19:48:11.970341 Chrome EC: clear events_b mask to 0x0000000020004000
420 19:48:11.986825 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 19:48:12.000203 tlcl_write: response is 0
422 19:48:12.009114 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 19:48:12.015519 MRC: TPM MRC hash updated successfully.
424 19:48:12.016104 2 DIMMs found
425 19:48:12.019154 SMM Memory Map
426 19:48:12.022159 SMRAM : 0x9a000000 0x1000000
427 19:48:12.025909 Subregion 0: 0x9a000000 0xa00000
428 19:48:12.029172 Subregion 1: 0x9aa00000 0x200000
429 19:48:12.032414 Subregion 2: 0x9ac00000 0x400000
430 19:48:12.035441 top_of_ram = 0x9a000000
431 19:48:12.038715 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
432 19:48:12.045624 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
433 19:48:12.048684 MTRR Range: Start=ff000000 End=0 (Size 1000000)
434 19:48:12.055369 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 19:48:12.058318 CBFS @ c08000 size 3f8000
436 19:48:12.061886 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 19:48:12.065453 CBFS: Locating 'fallback/postcar'
438 19:48:12.071694 CBFS: Found @ offset 107000 size 4b44
439 19:48:12.075083 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
440 19:48:12.088270 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
441 19:48:12.091253 Processing 180 relocs. Offset value of 0x97c0c000
442 19:48:12.099964 Accumulated console time in romstage 286 ms
443 19:48:12.100573
444 19:48:12.101079
445 19:48:12.109848 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
446 19:48:12.115995 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 19:48:12.119287 CBFS @ c08000 size 3f8000
448 19:48:12.123228 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 19:48:12.130143 CBFS: Locating 'fallback/ramstage'
450 19:48:12.132801 CBFS: Found @ offset 43380 size 1b9e8
451 19:48:12.139493 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 19:48:12.171137 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 19:48:12.174715 Processing 3976 relocs. Offset value of 0x98db0000
454 19:48:12.181269 Accumulated console time in postcar 52 ms
455 19:48:12.181837
456 19:48:12.182210
457 19:48:12.191277 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 19:48:12.198370 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 19:48:12.201876 WARNING: RO_VPD is uninitialized or empty.
460 19:48:12.205108 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 19:48:12.212158 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 19:48:12.212737 Normal boot.
463 19:48:12.218567 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 19:48:12.221672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 19:48:12.224970 CBFS @ c08000 size 3f8000
466 19:48:12.231807 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 19:48:12.234905 CBFS: Locating 'cpu_microcode_blob.bin'
468 19:48:12.238022 CBFS: Found @ offset 14700 size 2ec00
469 19:48:12.241501 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 19:48:12.244978 Skip microcode update
471 19:48:12.247855 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 19:48:12.251675 CBFS @ c08000 size 3f8000
473 19:48:12.258126 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 19:48:12.261231 CBFS: Locating 'fsps.bin'
475 19:48:12.264825 CBFS: Found @ offset d1fc0 size 35000
476 19:48:12.289976 Detected 4 core, 8 thread CPU.
477 19:48:12.293521 Setting up SMI for CPU
478 19:48:12.296344 IED base = 0x9ac00000
479 19:48:12.296915 IED size = 0x00400000
480 19:48:12.299387 Will perform SMM setup.
481 19:48:12.306629 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 19:48:12.313262 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 19:48:12.319392 Processing 16 relocs. Offset value of 0x00030000
484 19:48:12.319983 Attempting to start 7 APs
485 19:48:12.326128 Waiting for 10ms after sending INIT.
486 19:48:12.339759 Waiting for 1st SIPI to complete...done.
487 19:48:12.340342 AP: slot 3 apic_id 2.
488 19:48:12.343413 AP: slot 1 apic_id 3.
489 19:48:12.345995 AP: slot 2 apic_id 1.
490 19:48:12.350004 Waiting for 2nd SIPI to complete...done.
491 19:48:12.352744 AP: slot 7 apic_id 6.
492 19:48:12.353325 AP: slot 6 apic_id 7.
493 19:48:12.355783 AP: slot 5 apic_id 4.
494 19:48:12.359232 AP: slot 4 apic_id 5.
495 19:48:12.365978 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 19:48:12.372916 Processing 13 relocs. Offset value of 0x00038000
497 19:48:12.379051 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 19:48:12.382612 Installing SMM handler to 0x9a000000
499 19:48:12.389422 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 19:48:12.396177 Processing 658 relocs. Offset value of 0x9a010000
501 19:48:12.402843 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 19:48:12.405829 Processing 13 relocs. Offset value of 0x9a008000
503 19:48:12.413370 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 19:48:12.419398 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 19:48:12.425516 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 19:48:12.429024 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 19:48:12.435622 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 19:48:12.442168 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 19:48:12.445587 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 19:48:12.453445 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 19:48:12.455707 Clearing SMI status registers
512 19:48:12.459175 SMI_STS: PM1
513 19:48:12.459752 PM1_STS: PWRBTN
514 19:48:12.462321 TCO_STS: SECOND_TO
515 19:48:12.466124 New SMBASE 0x9a000000
516 19:48:12.469012 In relocation handler: CPU 0
517 19:48:12.472178 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 19:48:12.475717 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 19:48:12.479611 Relocation complete.
520 19:48:12.482421 New SMBASE 0x99fff800
521 19:48:12.483044 In relocation handler: CPU 2
522 19:48:12.489511 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
523 19:48:12.492988 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 19:48:12.496600 Relocation complete.
525 19:48:12.499317 New SMBASE 0x99ffe800
526 19:48:12.499903 In relocation handler: CPU 6
527 19:48:12.505998 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
528 19:48:12.509401 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 19:48:12.512837 Relocation complete.
530 19:48:12.513311 New SMBASE 0x99ffe400
531 19:48:12.515695 In relocation handler: CPU 7
532 19:48:12.522395 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
533 19:48:12.525794 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 19:48:12.528912 Relocation complete.
535 19:48:12.529483 New SMBASE 0x99fff000
536 19:48:12.532668 In relocation handler: CPU 4
537 19:48:12.539464 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
538 19:48:12.541964 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 19:48:12.545757 Relocation complete.
540 19:48:12.546326 New SMBASE 0x99ffec00
541 19:48:12.548631 In relocation handler: CPU 5
542 19:48:12.552163 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
543 19:48:12.558930 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 19:48:12.561707 Relocation complete.
545 19:48:12.562214 New SMBASE 0x99fff400
546 19:48:12.565849 In relocation handler: CPU 3
547 19:48:12.568731 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
548 19:48:12.575226 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 19:48:12.578512 Relocation complete.
550 19:48:12.579015 New SMBASE 0x99fffc00
551 19:48:12.582271 In relocation handler: CPU 1
552 19:48:12.585167 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
553 19:48:12.591720 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 19:48:12.592274 Relocation complete.
555 19:48:12.595110 Initializing CPU #0
556 19:48:12.598932 CPU: vendor Intel device 806ec
557 19:48:12.601619 CPU: family 06, model 8e, stepping 0c
558 19:48:12.604921 Clearing out pending MCEs
559 19:48:12.608599 Setting up local APIC...
560 19:48:12.609170 apic_id: 0x00 done.
561 19:48:12.611516 Turbo is available but hidden
562 19:48:12.614907 Turbo is available and visible
563 19:48:12.618561 VMX status: enabled
564 19:48:12.622077 IA32_FEATURE_CONTROL status: locked
565 19:48:12.624743 Skip microcode update
566 19:48:12.625215 CPU #0 initialized
567 19:48:12.629035 Initializing CPU #2
568 19:48:12.631931 Initializing CPU #7
569 19:48:12.632499 Initializing CPU #6
570 19:48:12.635434 CPU: vendor Intel device 806ec
571 19:48:12.638453 CPU: family 06, model 8e, stepping 0c
572 19:48:12.642163 CPU: vendor Intel device 806ec
573 19:48:12.645189 CPU: family 06, model 8e, stepping 0c
574 19:48:12.648295 Clearing out pending MCEs
575 19:48:12.651206 Clearing out pending MCEs
576 19:48:12.655415 Setting up local APIC...
577 19:48:12.655986 Initializing CPU #4
578 19:48:12.657818 Initializing CPU #5
579 19:48:12.661847 CPU: vendor Intel device 806ec
580 19:48:12.664480 CPU: family 06, model 8e, stepping 0c
581 19:48:12.668037 apic_id: 0x06 done.
582 19:48:12.668611 Setting up local APIC...
583 19:48:12.671499 CPU: vendor Intel device 806ec
584 19:48:12.678116 CPU: family 06, model 8e, stepping 0c
585 19:48:12.678644 Clearing out pending MCEs
586 19:48:12.681094 CPU: vendor Intel device 806ec
587 19:48:12.685000 CPU: family 06, model 8e, stepping 0c
588 19:48:12.688391 Clearing out pending MCEs
589 19:48:12.691324 Clearing out pending MCEs
590 19:48:12.694727 Initializing CPU #1
591 19:48:12.695286 Initializing CPU #3
592 19:48:12.697980 CPU: vendor Intel device 806ec
593 19:48:12.701513 CPU: family 06, model 8e, stepping 0c
594 19:48:12.704821 CPU: vendor Intel device 806ec
595 19:48:12.708153 CPU: family 06, model 8e, stepping 0c
596 19:48:12.711440 Clearing out pending MCEs
597 19:48:12.714702 Clearing out pending MCEs
598 19:48:12.718341 Setting up local APIC...
599 19:48:12.718956 Setting up local APIC...
600 19:48:12.721420 apic_id: 0x03 done.
601 19:48:12.724565 Setting up local APIC...
602 19:48:12.728191 apic_id: 0x01 done.
603 19:48:12.728761 VMX status: enabled
604 19:48:12.731143 apic_id: 0x02 done.
605 19:48:12.734793 IA32_FEATURE_CONTROL status: locked
606 19:48:12.738107 VMX status: enabled
607 19:48:12.738705 Skip microcode update
608 19:48:12.741380 IA32_FEATURE_CONTROL status: locked
609 19:48:12.744671 CPU #1 initialized
610 19:48:12.748117 Skip microcode update
611 19:48:12.748688 VMX status: enabled
612 19:48:12.751250 Setting up local APIC...
613 19:48:12.754769 CPU #3 initialized
614 19:48:12.757425 IA32_FEATURE_CONTROL status: locked
615 19:48:12.757901 Setting up local APIC...
616 19:48:12.761026 Skip microcode update
617 19:48:12.764685 VMX status: enabled
618 19:48:12.765253 apic_id: 0x07 done.
619 19:48:12.768210 IA32_FEATURE_CONTROL status: locked
620 19:48:12.771019 VMX status: enabled
621 19:48:12.774244 Skip microcode update
622 19:48:12.777977 IA32_FEATURE_CONTROL status: locked
623 19:48:12.778604 apic_id: 0x05 done.
624 19:48:12.780820 apic_id: 0x04 done.
625 19:48:12.784578 VMX status: enabled
626 19:48:12.785145 VMX status: enabled
627 19:48:12.787283 IA32_FEATURE_CONTROL status: locked
628 19:48:12.791207 IA32_FEATURE_CONTROL status: locked
629 19:48:12.794079 Skip microcode update
630 19:48:12.797148 Skip microcode update
631 19:48:12.797629 CPU #4 initialized
632 19:48:12.800764 CPU #5 initialized
633 19:48:12.803714 CPU #2 initialized
634 19:48:12.804187 CPU #7 initialized
635 19:48:12.807317 Skip microcode update
636 19:48:12.807795 CPU #6 initialized
637 19:48:12.814500 bsp_do_flight_plan done after 462 msecs.
638 19:48:12.817712 CPU: frequency set to 4200 MHz
639 19:48:12.818286 Enabling SMIs.
640 19:48:12.821193 Locking SMM.
641 19:48:12.834239 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
642 19:48:12.837783 CBFS @ c08000 size 3f8000
643 19:48:12.843968 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
644 19:48:12.844542 CBFS: Locating 'vbt.bin'
645 19:48:12.847268 CBFS: Found @ offset 5f5c0 size 499
646 19:48:12.854603 Found a VBT of 4608 bytes after decompression
647 19:48:13.037434 Display FSP Version Info HOB
648 19:48:13.040025 Reference Code - CPU = 9.0.1e.30
649 19:48:13.043028 uCode Version = 0.0.0.ca
650 19:48:13.046584 TXT ACM version = ff.ff.ff.ffff
651 19:48:13.049981 Display FSP Version Info HOB
652 19:48:13.053689 Reference Code - ME = 9.0.1e.30
653 19:48:13.056332 MEBx version = 0.0.0.0
654 19:48:13.059883 ME Firmware Version = Consumer SKU
655 19:48:13.063355 Display FSP Version Info HOB
656 19:48:13.066285 Reference Code - CML PCH = 9.0.1e.30
657 19:48:13.069595 PCH-CRID Status = Disabled
658 19:48:13.073091 PCH-CRID Original Value = ff.ff.ff.ffff
659 19:48:13.076578 PCH-CRID New Value = ff.ff.ff.ffff
660 19:48:13.079920 OPROM - RST - RAID = ff.ff.ff.ffff
661 19:48:13.082824 ChipsetInit Base Version = ff.ff.ff.ffff
662 19:48:13.086457 ChipsetInit Oem Version = ff.ff.ff.ffff
663 19:48:13.089975 Display FSP Version Info HOB
664 19:48:13.096436 Reference Code - SA - System Agent = 9.0.1e.30
665 19:48:13.099484 Reference Code - MRC = 0.7.1.6c
666 19:48:13.103155 SA - PCIe Version = 9.0.1e.30
667 19:48:13.103583 SA-CRID Status = Disabled
668 19:48:13.106352 SA-CRID Original Value = 0.0.0.c
669 19:48:13.109673 SA-CRID New Value = 0.0.0.c
670 19:48:13.113332 OPROM - VBIOS = ff.ff.ff.ffff
671 19:48:13.116216 RTC Init
672 19:48:13.119268 Set power on after power failure.
673 19:48:13.119829 Disabling Deep S3
674 19:48:13.123074 Disabling Deep S3
675 19:48:13.123586 Disabling Deep S4
676 19:48:13.126120 Disabling Deep S4
677 19:48:13.130119 Disabling Deep S5
678 19:48:13.130688 Disabling Deep S5
679 19:48:13.136385 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
680 19:48:13.136916 Enumerating buses...
681 19:48:13.142821 Show all devs... Before device enumeration.
682 19:48:13.146437 Root Device: enabled 1
683 19:48:13.147000 CPU_CLUSTER: 0: enabled 1
684 19:48:13.149729 DOMAIN: 0000: enabled 1
685 19:48:13.152445 APIC: 00: enabled 1
686 19:48:13.152873 PCI: 00:00.0: enabled 1
687 19:48:13.156275 PCI: 00:02.0: enabled 1
688 19:48:13.159541 PCI: 00:04.0: enabled 0
689 19:48:13.162753 PCI: 00:05.0: enabled 0
690 19:48:13.163273 PCI: 00:12.0: enabled 1
691 19:48:13.166003 PCI: 00:12.5: enabled 0
692 19:48:13.169375 PCI: 00:12.6: enabled 0
693 19:48:13.172744 PCI: 00:14.0: enabled 1
694 19:48:13.173172 PCI: 00:14.1: enabled 0
695 19:48:13.176165 PCI: 00:14.3: enabled 1
696 19:48:13.179102 PCI: 00:14.5: enabled 0
697 19:48:13.179531 PCI: 00:15.0: enabled 1
698 19:48:13.183536 PCI: 00:15.1: enabled 1
699 19:48:13.186354 PCI: 00:15.2: enabled 0
700 19:48:13.189591 PCI: 00:15.3: enabled 0
701 19:48:13.190114 PCI: 00:16.0: enabled 1
702 19:48:13.192668 PCI: 00:16.1: enabled 0
703 19:48:13.196082 PCI: 00:16.2: enabled 0
704 19:48:13.199650 PCI: 00:16.3: enabled 0
705 19:48:13.200182 PCI: 00:16.4: enabled 0
706 19:48:13.202346 PCI: 00:16.5: enabled 0
707 19:48:13.206933 PCI: 00:17.0: enabled 1
708 19:48:13.209179 PCI: 00:19.0: enabled 1
709 19:48:13.209704 PCI: 00:19.1: enabled 0
710 19:48:13.212325 PCI: 00:19.2: enabled 0
711 19:48:13.215885 PCI: 00:1a.0: enabled 0
712 19:48:13.216409 PCI: 00:1c.0: enabled 0
713 19:48:13.219710 PCI: 00:1c.1: enabled 0
714 19:48:13.222261 PCI: 00:1c.2: enabled 0
715 19:48:13.225692 PCI: 00:1c.3: enabled 0
716 19:48:13.226218 PCI: 00:1c.4: enabled 0
717 19:48:13.229579 PCI: 00:1c.5: enabled 0
718 19:48:13.232324 PCI: 00:1c.6: enabled 0
719 19:48:13.235820 PCI: 00:1c.7: enabled 0
720 19:48:13.236347 PCI: 00:1d.0: enabled 1
721 19:48:13.238867 PCI: 00:1d.1: enabled 0
722 19:48:13.242186 PCI: 00:1d.2: enabled 0
723 19:48:13.246028 PCI: 00:1d.3: enabled 0
724 19:48:13.246586 PCI: 00:1d.4: enabled 0
725 19:48:13.248578 PCI: 00:1d.5: enabled 1
726 19:48:13.251856 PCI: 00:1e.0: enabled 1
727 19:48:13.252282 PCI: 00:1e.1: enabled 0
728 19:48:13.255725 PCI: 00:1e.2: enabled 1
729 19:48:13.258612 PCI: 00:1e.3: enabled 1
730 19:48:13.261668 PCI: 00:1f.0: enabled 1
731 19:48:13.262092 PCI: 00:1f.1: enabled 1
732 19:48:13.265113 PCI: 00:1f.2: enabled 1
733 19:48:13.269289 PCI: 00:1f.3: enabled 1
734 19:48:13.272482 PCI: 00:1f.4: enabled 1
735 19:48:13.272963 PCI: 00:1f.5: enabled 1
736 19:48:13.275182 PCI: 00:1f.6: enabled 0
737 19:48:13.278812 USB0 port 0: enabled 1
738 19:48:13.279289 I2C: 00:15: enabled 1
739 19:48:13.282123 I2C: 00:5d: enabled 1
740 19:48:13.285757 GENERIC: 0.0: enabled 1
741 19:48:13.288727 I2C: 00:1a: enabled 1
742 19:48:13.289294 I2C: 00:38: enabled 1
743 19:48:13.292167 I2C: 00:39: enabled 1
744 19:48:13.296161 I2C: 00:3a: enabled 1
745 19:48:13.296730 I2C: 00:3b: enabled 1
746 19:48:13.298699 PCI: 00:00.0: enabled 1
747 19:48:13.301920 SPI: 00: enabled 1
748 19:48:13.302488 SPI: 01: enabled 1
749 19:48:13.305654 PNP: 0c09.0: enabled 1
750 19:48:13.308674 USB2 port 0: enabled 1
751 19:48:13.309243 USB2 port 1: enabled 1
752 19:48:13.312259 USB2 port 2: enabled 0
753 19:48:13.315414 USB2 port 3: enabled 0
754 19:48:13.315986 USB2 port 5: enabled 0
755 19:48:13.319270 USB2 port 6: enabled 1
756 19:48:13.321792 USB2 port 9: enabled 1
757 19:48:13.322364 USB3 port 0: enabled 1
758 19:48:13.325300 USB3 port 1: enabled 1
759 19:48:13.328518 USB3 port 2: enabled 1
760 19:48:13.331890 USB3 port 3: enabled 1
761 19:48:13.332456 USB3 port 4: enabled 0
762 19:48:13.335280 APIC: 03: enabled 1
763 19:48:13.335855 APIC: 01: enabled 1
764 19:48:13.339026 APIC: 02: enabled 1
765 19:48:13.342012 APIC: 05: enabled 1
766 19:48:13.342607 APIC: 04: enabled 1
767 19:48:13.345497 APIC: 07: enabled 1
768 19:48:13.348449 APIC: 06: enabled 1
769 19:48:13.349015 Compare with tree...
770 19:48:13.352416 Root Device: enabled 1
771 19:48:13.355452 CPU_CLUSTER: 0: enabled 1
772 19:48:13.356019 APIC: 00: enabled 1
773 19:48:13.358447 APIC: 03: enabled 1
774 19:48:13.361677 APIC: 01: enabled 1
775 19:48:13.362149 APIC: 02: enabled 1
776 19:48:13.364848 APIC: 05: enabled 1
777 19:48:13.368386 APIC: 04: enabled 1
778 19:48:13.368953 APIC: 07: enabled 1
779 19:48:13.372259 APIC: 06: enabled 1
780 19:48:13.375072 DOMAIN: 0000: enabled 1
781 19:48:13.378104 PCI: 00:00.0: enabled 1
782 19:48:13.378618 PCI: 00:02.0: enabled 1
783 19:48:13.381422 PCI: 00:04.0: enabled 0
784 19:48:13.385014 PCI: 00:05.0: enabled 0
785 19:48:13.388076 PCI: 00:12.0: enabled 1
786 19:48:13.391694 PCI: 00:12.5: enabled 0
787 19:48:13.392261 PCI: 00:12.6: enabled 0
788 19:48:13.395183 PCI: 00:14.0: enabled 1
789 19:48:13.398617 USB0 port 0: enabled 1
790 19:48:13.401663 USB2 port 0: enabled 1
791 19:48:13.404947 USB2 port 1: enabled 1
792 19:48:13.405514 USB2 port 2: enabled 0
793 19:48:13.409126 USB2 port 3: enabled 0
794 19:48:13.411210 USB2 port 5: enabled 0
795 19:48:13.415457 USB2 port 6: enabled 1
796 19:48:13.418068 USB2 port 9: enabled 1
797 19:48:13.421287 USB3 port 0: enabled 1
798 19:48:13.421855 USB3 port 1: enabled 1
799 19:48:13.425284 USB3 port 2: enabled 1
800 19:48:13.428615 USB3 port 3: enabled 1
801 19:48:13.431221 USB3 port 4: enabled 0
802 19:48:13.434787 PCI: 00:14.1: enabled 0
803 19:48:13.435350 PCI: 00:14.3: enabled 1
804 19:48:13.438883 PCI: 00:14.5: enabled 0
805 19:48:13.441094 PCI: 00:15.0: enabled 1
806 19:48:13.445312 I2C: 00:15: enabled 1
807 19:48:13.447987 PCI: 00:15.1: enabled 1
808 19:48:13.448556 I2C: 00:5d: enabled 1
809 19:48:13.451258 GENERIC: 0.0: enabled 1
810 19:48:13.454804 PCI: 00:15.2: enabled 0
811 19:48:13.457698 PCI: 00:15.3: enabled 0
812 19:48:13.460946 PCI: 00:16.0: enabled 1
813 19:48:13.461560 PCI: 00:16.1: enabled 0
814 19:48:13.464647 PCI: 00:16.2: enabled 0
815 19:48:13.467583 PCI: 00:16.3: enabled 0
816 19:48:13.471166 PCI: 00:16.4: enabled 0
817 19:48:13.474377 PCI: 00:16.5: enabled 0
818 19:48:13.475037 PCI: 00:17.0: enabled 1
819 19:48:13.477460 PCI: 00:19.0: enabled 1
820 19:48:13.481029 I2C: 00:1a: enabled 1
821 19:48:13.485087 I2C: 00:38: enabled 1
822 19:48:13.485666 I2C: 00:39: enabled 1
823 19:48:13.487199 I2C: 00:3a: enabled 1
824 19:48:13.491158 I2C: 00:3b: enabled 1
825 19:48:13.494081 PCI: 00:19.1: enabled 0
826 19:48:13.497827 PCI: 00:19.2: enabled 0
827 19:48:13.498395 PCI: 00:1a.0: enabled 0
828 19:48:13.500973 PCI: 00:1c.0: enabled 0
829 19:48:13.504297 PCI: 00:1c.1: enabled 0
830 19:48:13.507304 PCI: 00:1c.2: enabled 0
831 19:48:13.507775 PCI: 00:1c.3: enabled 0
832 19:48:13.511366 PCI: 00:1c.4: enabled 0
833 19:48:13.514333 PCI: 00:1c.5: enabled 0
834 19:48:13.517743 PCI: 00:1c.6: enabled 0
835 19:48:13.520797 PCI: 00:1c.7: enabled 0
836 19:48:13.521364 PCI: 00:1d.0: enabled 1
837 19:48:13.524035 PCI: 00:1d.1: enabled 0
838 19:48:13.527468 PCI: 00:1d.2: enabled 0
839 19:48:13.530922 PCI: 00:1d.3: enabled 0
840 19:48:13.534098 PCI: 00:1d.4: enabled 0
841 19:48:13.534725 PCI: 00:1d.5: enabled 1
842 19:48:13.537550 PCI: 00:00.0: enabled 1
843 19:48:13.541424 PCI: 00:1e.0: enabled 1
844 19:48:13.544206 PCI: 00:1e.1: enabled 0
845 19:48:13.547161 PCI: 00:1e.2: enabled 1
846 19:48:13.547728 SPI: 00: enabled 1
847 19:48:13.550587 PCI: 00:1e.3: enabled 1
848 19:48:13.553733 SPI: 01: enabled 1
849 19:48:13.557358 PCI: 00:1f.0: enabled 1
850 19:48:13.557925 PNP: 0c09.0: enabled 1
851 19:48:13.560338 PCI: 00:1f.1: enabled 1
852 19:48:13.563909 PCI: 00:1f.2: enabled 1
853 19:48:13.567440 PCI: 00:1f.3: enabled 1
854 19:48:13.570242 PCI: 00:1f.4: enabled 1
855 19:48:13.570892 PCI: 00:1f.5: enabled 1
856 19:48:13.573619 PCI: 00:1f.6: enabled 0
857 19:48:13.577283 Root Device scanning...
858 19:48:13.580064 scan_static_bus for Root Device
859 19:48:13.583456 CPU_CLUSTER: 0 enabled
860 19:48:13.584022 DOMAIN: 0000 enabled
861 19:48:13.586736 DOMAIN: 0000 scanning...
862 19:48:13.590130 PCI: pci_scan_bus for bus 00
863 19:48:13.593569 PCI: 00:00.0 [8086/0000] ops
864 19:48:13.597063 PCI: 00:00.0 [8086/9b61] enabled
865 19:48:13.600600 PCI: 00:02.0 [8086/0000] bus ops
866 19:48:13.603186 PCI: 00:02.0 [8086/9b41] enabled
867 19:48:13.607156 PCI: 00:04.0 [8086/1903] disabled
868 19:48:13.610687 PCI: 00:08.0 [8086/1911] enabled
869 19:48:13.613599 PCI: 00:12.0 [8086/02f9] enabled
870 19:48:13.616554 PCI: 00:14.0 [8086/0000] bus ops
871 19:48:13.620218 PCI: 00:14.0 [8086/02ed] enabled
872 19:48:13.624453 PCI: 00:14.2 [8086/02ef] enabled
873 19:48:13.626808 PCI: 00:14.3 [8086/02f0] enabled
874 19:48:13.630096 PCI: 00:15.0 [8086/0000] bus ops
875 19:48:13.633364 PCI: 00:15.0 [8086/02e8] enabled
876 19:48:13.636776 PCI: 00:15.1 [8086/0000] bus ops
877 19:48:13.639878 PCI: 00:15.1 [8086/02e9] enabled
878 19:48:13.643362 PCI: 00:16.0 [8086/0000] ops
879 19:48:13.646925 PCI: 00:16.0 [8086/02e0] enabled
880 19:48:13.649841 PCI: 00:17.0 [8086/0000] ops
881 19:48:13.653577 PCI: 00:17.0 [8086/02d3] enabled
882 19:48:13.657059 PCI: 00:19.0 [8086/0000] bus ops
883 19:48:13.660455 PCI: 00:19.0 [8086/02c5] enabled
884 19:48:13.663279 PCI: 00:1d.0 [8086/0000] bus ops
885 19:48:13.666789 PCI: 00:1d.0 [8086/02b0] enabled
886 19:48:13.673430 PCI: Static device PCI: 00:1d.5 not found, disabling it.
887 19:48:13.674004 PCI: 00:1e.0 [8086/0000] ops
888 19:48:13.676172 PCI: 00:1e.0 [8086/02a8] enabled
889 19:48:13.679492 PCI: 00:1e.2 [8086/0000] bus ops
890 19:48:13.683184 PCI: 00:1e.2 [8086/02aa] enabled
891 19:48:13.686696 PCI: 00:1e.3 [8086/0000] bus ops
892 19:48:13.690143 PCI: 00:1e.3 [8086/02ab] enabled
893 19:48:13.693278 PCI: 00:1f.0 [8086/0000] bus ops
894 19:48:13.696449 PCI: 00:1f.0 [8086/0284] enabled
895 19:48:13.703350 PCI: Static device PCI: 00:1f.1 not found, disabling it.
896 19:48:13.709654 PCI: Static device PCI: 00:1f.2 not found, disabling it.
897 19:48:13.713792 PCI: 00:1f.3 [8086/0000] bus ops
898 19:48:13.716029 PCI: 00:1f.3 [8086/02c8] enabled
899 19:48:13.719777 PCI: 00:1f.4 [8086/0000] bus ops
900 19:48:13.722682 PCI: 00:1f.4 [8086/02a3] enabled
901 19:48:13.726951 PCI: 00:1f.5 [8086/0000] bus ops
902 19:48:13.729667 PCI: 00:1f.5 [8086/02a4] enabled
903 19:48:13.732426 PCI: Leftover static devices:
904 19:48:13.732896 PCI: 00:05.0
905 19:48:13.735951 PCI: 00:12.5
906 19:48:13.736500 PCI: 00:12.6
907 19:48:13.736886 PCI: 00:14.1
908 19:48:13.739284 PCI: 00:14.5
909 19:48:13.739759 PCI: 00:15.2
910 19:48:13.742486 PCI: 00:15.3
911 19:48:13.743000 PCI: 00:16.1
912 19:48:13.743382 PCI: 00:16.2
913 19:48:13.746261 PCI: 00:16.3
914 19:48:13.746874 PCI: 00:16.4
915 19:48:13.748992 PCI: 00:16.5
916 19:48:13.749463 PCI: 00:19.1
917 19:48:13.749843 PCI: 00:19.2
918 19:48:13.752835 PCI: 00:1a.0
919 19:48:13.753402 PCI: 00:1c.0
920 19:48:13.756208 PCI: 00:1c.1
921 19:48:13.756777 PCI: 00:1c.2
922 19:48:13.759829 PCI: 00:1c.3
923 19:48:13.760395 PCI: 00:1c.4
924 19:48:13.760774 PCI: 00:1c.5
925 19:48:13.762470 PCI: 00:1c.6
926 19:48:13.762995 PCI: 00:1c.7
927 19:48:13.766160 PCI: 00:1d.1
928 19:48:13.766785 PCI: 00:1d.2
929 19:48:13.767179 PCI: 00:1d.3
930 19:48:13.769200 PCI: 00:1d.4
931 19:48:13.769670 PCI: 00:1d.5
932 19:48:13.772375 PCI: 00:1e.1
933 19:48:13.772852 PCI: 00:1f.1
934 19:48:13.773229 PCI: 00:1f.2
935 19:48:13.775735 PCI: 00:1f.6
936 19:48:13.779306 PCI: Check your devicetree.cb.
937 19:48:13.782573 PCI: 00:02.0 scanning...
938 19:48:13.786511 scan_generic_bus for PCI: 00:02.0
939 19:48:13.789124 scan_generic_bus for PCI: 00:02.0 done
940 19:48:13.795442 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
941 19:48:13.796001 PCI: 00:14.0 scanning...
942 19:48:13.799152 scan_static_bus for PCI: 00:14.0
943 19:48:13.802478 USB0 port 0 enabled
944 19:48:13.805908 USB0 port 0 scanning...
945 19:48:13.809281 scan_static_bus for USB0 port 0
946 19:48:13.809848 USB2 port 0 enabled
947 19:48:13.812398 USB2 port 1 enabled
948 19:48:13.815737 USB2 port 2 disabled
949 19:48:13.816309 USB2 port 3 disabled
950 19:48:13.819227 USB2 port 5 disabled
951 19:48:13.822341 USB2 port 6 enabled
952 19:48:13.822954 USB2 port 9 enabled
953 19:48:13.825665 USB3 port 0 enabled
954 19:48:13.826234 USB3 port 1 enabled
955 19:48:13.828602 USB3 port 2 enabled
956 19:48:13.832459 USB3 port 3 enabled
957 19:48:13.833029 USB3 port 4 disabled
958 19:48:13.835653 USB2 port 0 scanning...
959 19:48:13.838686 scan_static_bus for USB2 port 0
960 19:48:13.842210 scan_static_bus for USB2 port 0 done
961 19:48:13.848767 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
962 19:48:13.851862 USB2 port 1 scanning...
963 19:48:13.855260 scan_static_bus for USB2 port 1
964 19:48:13.859208 scan_static_bus for USB2 port 1 done
965 19:48:13.861952 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
966 19:48:13.865351 USB2 port 6 scanning...
967 19:48:13.868942 scan_static_bus for USB2 port 6
968 19:48:13.872464 scan_static_bus for USB2 port 6 done
969 19:48:13.878225 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
970 19:48:13.882257 USB2 port 9 scanning...
971 19:48:13.885619 scan_static_bus for USB2 port 9
972 19:48:13.888335 scan_static_bus for USB2 port 9 done
973 19:48:13.892024 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
974 19:48:13.895055 USB3 port 0 scanning...
975 19:48:13.898328 scan_static_bus for USB3 port 0
976 19:48:13.901974 scan_static_bus for USB3 port 0 done
977 19:48:13.908381 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
978 19:48:13.911883 USB3 port 1 scanning...
979 19:48:13.915445 scan_static_bus for USB3 port 1
980 19:48:13.918761 scan_static_bus for USB3 port 1 done
981 19:48:13.925137 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
982 19:48:13.925711 USB3 port 2 scanning...
983 19:48:13.928473 scan_static_bus for USB3 port 2
984 19:48:13.931837 scan_static_bus for USB3 port 2 done
985 19:48:13.938831 scan_bus: scanning of bus USB3 port 2 took 9697 usecs
986 19:48:13.941845 USB3 port 3 scanning...
987 19:48:13.944868 scan_static_bus for USB3 port 3
988 19:48:13.948160 scan_static_bus for USB3 port 3 done
989 19:48:13.954415 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
990 19:48:13.958125 scan_static_bus for USB0 port 0 done
991 19:48:13.961473 scan_bus: scanning of bus USB0 port 0 took 155337 usecs
992 19:48:13.968173 scan_static_bus for PCI: 00:14.0 done
993 19:48:13.971122 scan_bus: scanning of bus PCI: 00:14.0 took 172946 usecs
994 19:48:13.974505 PCI: 00:15.0 scanning...
995 19:48:13.978014 scan_generic_bus for PCI: 00:15.0
996 19:48:13.981311 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
997 19:48:13.988217 scan_generic_bus for PCI: 00:15.0 done
998 19:48:13.991443 scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs
999 19:48:13.994702 PCI: 00:15.1 scanning...
1000 19:48:13.997913 scan_generic_bus for PCI: 00:15.1
1001 19:48:14.000989 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1002 19:48:14.007891 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1003 19:48:14.011137 scan_generic_bus for PCI: 00:15.1 done
1004 19:48:14.014711 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1005 19:48:14.017889 PCI: 00:19.0 scanning...
1006 19:48:14.020820 scan_generic_bus for PCI: 00:19.0
1007 19:48:14.028494 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1008 19:48:14.031895 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1009 19:48:14.034239 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1010 19:48:14.037628 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1011 19:48:14.041633 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1012 19:48:14.047416 scan_generic_bus for PCI: 00:19.0 done
1013 19:48:14.051111 scan_bus: scanning of bus PCI: 00:19.0 took 30721 usecs
1014 19:48:14.054324 PCI: 00:1d.0 scanning...
1015 19:48:14.057783 do_pci_scan_bridge for PCI: 00:1d.0
1016 19:48:14.060923 PCI: pci_scan_bus for bus 01
1017 19:48:14.064168 PCI: 01:00.0 [1c5c/1327] enabled
1018 19:48:14.067599 Enabling Common Clock Configuration
1019 19:48:14.074162 L1 Sub-State supported from root port 29
1020 19:48:14.074898 L1 Sub-State Support = 0xf
1021 19:48:14.077331 CommonModeRestoreTime = 0x28
1022 19:48:14.084561 Power On Value = 0x16, Power On Scale = 0x0
1023 19:48:14.085127 ASPM: Enabled L1
1024 19:48:14.090614 scan_bus: scanning of bus PCI: 00:1d.0 took 32763 usecs
1025 19:48:14.094605 PCI: 00:1e.2 scanning...
1026 19:48:14.097324 scan_generic_bus for PCI: 00:1e.2
1027 19:48:14.101605 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1028 19:48:14.104373 scan_generic_bus for PCI: 00:1e.2 done
1029 19:48:14.110998 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1030 19:48:14.111558 PCI: 00:1e.3 scanning...
1031 19:48:14.117085 scan_generic_bus for PCI: 00:1e.3
1032 19:48:14.120575 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1033 19:48:14.124067 scan_generic_bus for PCI: 00:1e.3 done
1034 19:48:14.127373 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1035 19:48:14.130735 PCI: 00:1f.0 scanning...
1036 19:48:14.134347 scan_static_bus for PCI: 00:1f.0
1037 19:48:14.137850 PNP: 0c09.0 enabled
1038 19:48:14.140544 scan_static_bus for PCI: 00:1f.0 done
1039 19:48:14.147117 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1040 19:48:14.150414 PCI: 00:1f.3 scanning...
1041 19:48:14.154119 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1042 19:48:14.156930 PCI: 00:1f.4 scanning...
1043 19:48:14.160331 scan_generic_bus for PCI: 00:1f.4
1044 19:48:14.163770 scan_generic_bus for PCI: 00:1f.4 done
1045 19:48:14.170457 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1046 19:48:14.173933 PCI: 00:1f.5 scanning...
1047 19:48:14.177592 scan_generic_bus for PCI: 00:1f.5
1048 19:48:14.180338 scan_generic_bus for PCI: 00:1f.5 done
1049 19:48:14.187136 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1050 19:48:14.190500 scan_bus: scanning of bus DOMAIN: 0000 took 604809 usecs
1051 19:48:14.197369 scan_static_bus for Root Device done
1052 19:48:14.200235 scan_bus: scanning of bus Root Device took 624676 usecs
1053 19:48:14.200665 done
1054 19:48:14.204191 Chrome EC: UHEPI supported
1055 19:48:14.210329 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1056 19:48:14.216841 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 19:48:14.223568 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1058 19:48:14.230183 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1059 19:48:14.233391 SPI flash protection: WPSW=0 SRP0=0
1060 19:48:14.240213 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 19:48:14.243715 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1062 19:48:14.246827 found VGA at PCI: 00:02.0
1063 19:48:14.250116 Setting up VGA for PCI: 00:02.0
1064 19:48:14.256934 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1065 19:48:14.260774 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1066 19:48:14.263174 Allocating resources...
1067 19:48:14.263665 Reading resources...
1068 19:48:14.269911 Root Device read_resources bus 0 link: 0
1069 19:48:14.273524 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1070 19:48:14.279678 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1071 19:48:14.283495 DOMAIN: 0000 read_resources bus 0 link: 0
1072 19:48:14.289631 PCI: 00:14.0 read_resources bus 0 link: 0
1073 19:48:14.293183 USB0 port 0 read_resources bus 0 link: 0
1074 19:48:14.301193 USB0 port 0 read_resources bus 0 link: 0 done
1075 19:48:14.304221 PCI: 00:14.0 read_resources bus 0 link: 0 done
1076 19:48:14.311986 PCI: 00:15.0 read_resources bus 1 link: 0
1077 19:48:14.315290 PCI: 00:15.0 read_resources bus 1 link: 0 done
1078 19:48:14.322271 PCI: 00:15.1 read_resources bus 2 link: 0
1079 19:48:14.325389 PCI: 00:15.1 read_resources bus 2 link: 0 done
1080 19:48:14.332537 PCI: 00:19.0 read_resources bus 3 link: 0
1081 19:48:14.338845 PCI: 00:19.0 read_resources bus 3 link: 0 done
1082 19:48:14.342295 PCI: 00:1d.0 read_resources bus 1 link: 0
1083 19:48:14.349105 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1084 19:48:14.352699 PCI: 00:1e.2 read_resources bus 4 link: 0
1085 19:48:14.358974 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1086 19:48:14.362809 PCI: 00:1e.3 read_resources bus 5 link: 0
1087 19:48:14.369115 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1088 19:48:14.372138 PCI: 00:1f.0 read_resources bus 0 link: 0
1089 19:48:14.378737 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1090 19:48:14.385554 DOMAIN: 0000 read_resources bus 0 link: 0 done
1091 19:48:14.389422 Root Device read_resources bus 0 link: 0 done
1092 19:48:14.392306 Done reading resources.
1093 19:48:14.395479 Show resources in subtree (Root Device)...After reading.
1094 19:48:14.403063 Root Device child on link 0 CPU_CLUSTER: 0
1095 19:48:14.405995 CPU_CLUSTER: 0 child on link 0 APIC: 00
1096 19:48:14.406610 APIC: 00
1097 19:48:14.408907 APIC: 03
1098 19:48:14.409472 APIC: 01
1099 19:48:14.412862 APIC: 02
1100 19:48:14.413430 APIC: 05
1101 19:48:14.413806 APIC: 04
1102 19:48:14.415188 APIC: 07
1103 19:48:14.415654 APIC: 06
1104 19:48:14.418806 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1105 19:48:14.475436 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1106 19:48:14.476245 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1107 19:48:14.477218 PCI: 00:00.0
1108 19:48:14.477780 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1109 19:48:14.478358 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1110 19:48:14.478938 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1111 19:48:14.482200 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1112 19:48:14.489324 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1113 19:48:14.495831 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1114 19:48:14.506136 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1115 19:48:14.515357 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1116 19:48:14.526229 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1117 19:48:14.532247 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1118 19:48:14.542439 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1119 19:48:14.552749 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1120 19:48:14.562167 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1121 19:48:14.572115 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1122 19:48:14.582035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1123 19:48:14.591720 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1124 19:48:14.592273 PCI: 00:02.0
1125 19:48:14.602064 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1126 19:48:14.612346 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1127 19:48:14.621595 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1128 19:48:14.622158 PCI: 00:04.0
1129 19:48:14.625308 PCI: 00:08.0
1130 19:48:14.634763 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 19:48:14.635398 PCI: 00:12.0
1132 19:48:14.644742 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 19:48:14.651773 PCI: 00:14.0 child on link 0 USB0 port 0
1134 19:48:14.661836 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1135 19:48:14.664494 USB0 port 0 child on link 0 USB2 port 0
1136 19:48:14.668382 USB2 port 0
1137 19:48:14.669017 USB2 port 1
1138 19:48:14.671036 USB2 port 2
1139 19:48:14.671554 USB2 port 3
1140 19:48:14.675185 USB2 port 5
1141 19:48:14.675655 USB2 port 6
1142 19:48:14.677534 USB2 port 9
1143 19:48:14.677998 USB3 port 0
1144 19:48:14.681218 USB3 port 1
1145 19:48:14.681680 USB3 port 2
1146 19:48:14.684284 USB3 port 3
1147 19:48:14.684745 USB3 port 4
1148 19:48:14.688269 PCI: 00:14.2
1149 19:48:14.698466 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1150 19:48:14.707948 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1151 19:48:14.708513 PCI: 00:14.3
1152 19:48:14.717715 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 19:48:14.724548 PCI: 00:15.0 child on link 0 I2C: 01:15
1154 19:48:14.734126 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 19:48:14.734717 I2C: 01:15
1156 19:48:14.738443 PCI: 00:15.1 child on link 0 I2C: 02:5d
1157 19:48:14.747589 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 19:48:14.751171 I2C: 02:5d
1159 19:48:14.751732 GENERIC: 0.0
1160 19:48:14.754092 PCI: 00:16.0
1161 19:48:14.764485 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 19:48:14.765052 PCI: 00:17.0
1163 19:48:14.773900 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1164 19:48:14.783739 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1165 19:48:14.790613 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1166 19:48:14.800999 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1167 19:48:14.807240 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1168 19:48:14.817470 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1169 19:48:14.820501 PCI: 00:19.0 child on link 0 I2C: 03:1a
1170 19:48:14.831110 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 19:48:14.834117 I2C: 03:1a
1172 19:48:14.834713 I2C: 03:38
1173 19:48:14.837204 I2C: 03:39
1174 19:48:14.837779 I2C: 03:3a
1175 19:48:14.840618 I2C: 03:3b
1176 19:48:14.844165 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1177 19:48:14.853973 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1178 19:48:14.864255 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1179 19:48:14.870063 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1180 19:48:14.874115 PCI: 01:00.0
1181 19:48:14.883924 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 19:48:14.884472 PCI: 00:1e.0
1183 19:48:14.896747 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1184 19:48:14.907460 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 19:48:14.910221 PCI: 00:1e.2 child on link 0 SPI: 00
1186 19:48:14.920398 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 19:48:14.920962 SPI: 00
1188 19:48:14.926944 PCI: 00:1e.3 child on link 0 SPI: 01
1189 19:48:14.933296 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 19:48:14.936565 SPI: 01
1191 19:48:14.941129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1192 19:48:14.950840 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1193 19:48:14.956464 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1194 19:48:14.960057 PNP: 0c09.0
1195 19:48:14.970678 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1196 19:48:14.971244 PCI: 00:1f.3
1197 19:48:14.980096 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 19:48:14.990012 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1199 19:48:14.993400 PCI: 00:1f.4
1200 19:48:15.000371 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1201 19:48:15.009959 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1202 19:48:15.013259 PCI: 00:1f.5
1203 19:48:15.023571 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1204 19:48:15.029866 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1205 19:48:15.033196 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1206 19:48:15.043146 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1207 19:48:15.045995 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1208 19:48:15.049917 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1209 19:48:15.052675 PCI: 00:17.0 18 * [0x60 - 0x67] io
1210 19:48:15.056277 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1211 19:48:15.062901 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1212 19:48:15.069675 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1213 19:48:15.075945 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1214 19:48:15.085861 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1215 19:48:15.092995 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1216 19:48:15.095968 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1217 19:48:15.102724 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1218 19:48:15.109285 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1219 19:48:15.112797 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1220 19:48:15.118983 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1221 19:48:15.122461 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1222 19:48:15.129587 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1223 19:48:15.132633 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1224 19:48:15.138995 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1225 19:48:15.142376 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1226 19:48:15.149119 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1227 19:48:15.152387 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1228 19:48:15.158623 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1229 19:48:15.162171 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1230 19:48:15.165229 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1231 19:48:15.171798 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1232 19:48:15.175482 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1233 19:48:15.181672 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1234 19:48:15.185489 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1235 19:48:15.192253 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1236 19:48:15.195130 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1237 19:48:15.202425 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1238 19:48:15.205411 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1239 19:48:15.212430 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1240 19:48:15.215262 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1241 19:48:15.225667 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1242 19:48:15.228927 avoid_fixed_resources: DOMAIN: 0000
1243 19:48:15.235080 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1244 19:48:15.237984 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1245 19:48:15.248451 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1246 19:48:15.254500 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1247 19:48:15.261492 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1248 19:48:15.271435 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1249 19:48:15.277844 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1250 19:48:15.284621 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 19:48:15.294958 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1252 19:48:15.301133 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1253 19:48:15.308070 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1254 19:48:15.314489 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1255 19:48:15.318416 Setting resources...
1256 19:48:15.324360 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1257 19:48:15.327524 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1258 19:48:15.331078 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1259 19:48:15.334842 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1260 19:48:15.340928 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1261 19:48:15.348098 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1262 19:48:15.350908 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1263 19:48:15.357724 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1264 19:48:15.367367 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1265 19:48:15.370792 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1266 19:48:15.377338 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1267 19:48:15.380604 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1268 19:48:15.387359 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1269 19:48:15.390811 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1270 19:48:15.394643 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1271 19:48:15.400843 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1272 19:48:15.403982 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1273 19:48:15.410913 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1274 19:48:15.414085 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1275 19:48:15.421910 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1276 19:48:15.423962 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1277 19:48:15.430581 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1278 19:48:15.433782 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1279 19:48:15.440420 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1280 19:48:15.443564 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1281 19:48:15.450638 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1282 19:48:15.453561 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1283 19:48:15.460198 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1284 19:48:15.463438 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1285 19:48:15.470257 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1286 19:48:15.473345 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1287 19:48:15.476909 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1288 19:48:15.486947 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1289 19:48:15.493549 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1290 19:48:15.499553 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1291 19:48:15.506479 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1292 19:48:15.513094 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1293 19:48:15.519664 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1294 19:48:15.522780 Root Device assign_resources, bus 0 link: 0
1295 19:48:15.529874 DOMAIN: 0000 assign_resources, bus 0 link: 0
1296 19:48:15.536457 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1297 19:48:15.546395 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1298 19:48:15.553005 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1299 19:48:15.562952 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1300 19:48:15.569300 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1301 19:48:15.579404 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1302 19:48:15.582422 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 19:48:15.589352 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 19:48:15.595902 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1305 19:48:15.605812 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1306 19:48:15.612389 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1307 19:48:15.622503 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1308 19:48:15.625873 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 19:48:15.630272 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 19:48:15.638873 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1311 19:48:15.642666 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 19:48:15.649275 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 19:48:15.656135 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1314 19:48:15.665166 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1315 19:48:15.672250 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1316 19:48:15.678732 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1317 19:48:15.688787 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1318 19:48:15.695628 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1319 19:48:15.702161 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1320 19:48:15.712320 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1321 19:48:15.715161 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 19:48:15.721584 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 19:48:15.728379 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 19:48:15.738084 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 19:48:15.745227 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 19:48:15.751490 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 19:48:15.758221 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 19:48:15.764745 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 19:48:15.771395 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 19:48:15.781192 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 19:48:15.784367 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 19:48:15.791111 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 19:48:15.797838 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 19:48:15.800554 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 19:48:15.807250 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 19:48:15.811416 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 19:48:15.817505 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 19:48:15.821219 LPC: Trying to open IO window from 800 size 1ff
1339 19:48:15.830666 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1340 19:48:15.837869 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1341 19:48:15.847497 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1342 19:48:15.854304 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1343 19:48:15.860578 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 19:48:15.863663 Root Device assign_resources, bus 0 link: 0
1345 19:48:15.867111 Done setting resources.
1346 19:48:15.873491 Show resources in subtree (Root Device)...After assigning values.
1347 19:48:15.877205 Root Device child on link 0 CPU_CLUSTER: 0
1348 19:48:15.880300 CPU_CLUSTER: 0 child on link 0 APIC: 00
1349 19:48:15.883840 APIC: 00
1350 19:48:15.884293 APIC: 03
1351 19:48:15.884652 APIC: 01
1352 19:48:15.886704 APIC: 02
1353 19:48:15.887159 APIC: 05
1354 19:48:15.890628 APIC: 04
1355 19:48:15.891180 APIC: 07
1356 19:48:15.891547 APIC: 06
1357 19:48:15.896988 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1358 19:48:15.907168 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1359 19:48:15.917034 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1360 19:48:15.917595 PCI: 00:00.0
1361 19:48:15.926976 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 19:48:15.936796 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 19:48:15.947284 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 19:48:15.957022 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 19:48:15.966698 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 19:48:15.976705 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 19:48:15.982724 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 19:48:15.993148 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 19:48:16.002767 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 19:48:16.012670 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1371 19:48:16.023000 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1372 19:48:16.029336 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1373 19:48:16.039493 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1374 19:48:16.049000 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1375 19:48:16.059388 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1376 19:48:16.068921 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1377 19:48:16.069487 PCI: 00:02.0
1378 19:48:16.082213 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1379 19:48:16.092189 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1380 19:48:16.102243 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1381 19:48:16.102869 PCI: 00:04.0
1382 19:48:16.105619 PCI: 00:08.0
1383 19:48:16.115158 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1384 19:48:16.115728 PCI: 00:12.0
1385 19:48:16.125834 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1386 19:48:16.131809 PCI: 00:14.0 child on link 0 USB0 port 0
1387 19:48:16.141913 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1388 19:48:16.145812 USB0 port 0 child on link 0 USB2 port 0
1389 19:48:16.148128 USB2 port 0
1390 19:48:16.148594 USB2 port 1
1391 19:48:16.152455 USB2 port 2
1392 19:48:16.153022 USB2 port 3
1393 19:48:16.154838 USB2 port 5
1394 19:48:16.155303 USB2 port 6
1395 19:48:16.158483 USB2 port 9
1396 19:48:16.159105 USB3 port 0
1397 19:48:16.161980 USB3 port 1
1398 19:48:16.162591 USB3 port 2
1399 19:48:16.164914 USB3 port 3
1400 19:48:16.165481 USB3 port 4
1401 19:48:16.168311 PCI: 00:14.2
1402 19:48:16.178691 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1403 19:48:16.187670 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1404 19:48:16.191417 PCI: 00:14.3
1405 19:48:16.201760 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1406 19:48:16.204489 PCI: 00:15.0 child on link 0 I2C: 01:15
1407 19:48:16.214766 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1408 19:48:16.218152 I2C: 01:15
1409 19:48:16.221524 PCI: 00:15.1 child on link 0 I2C: 02:5d
1410 19:48:16.230815 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1411 19:48:16.234652 I2C: 02:5d
1412 19:48:16.235250 GENERIC: 0.0
1413 19:48:16.237419 PCI: 00:16.0
1414 19:48:16.247417 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1415 19:48:16.248003 PCI: 00:17.0
1416 19:48:16.257739 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1417 19:48:16.267111 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1418 19:48:16.276998 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1419 19:48:16.286983 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1420 19:48:16.297088 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1421 19:48:16.307173 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1422 19:48:16.310689 PCI: 00:19.0 child on link 0 I2C: 03:1a
1423 19:48:16.320017 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1424 19:48:16.323463 I2C: 03:1a
1425 19:48:16.324022 I2C: 03:38
1426 19:48:16.327135 I2C: 03:39
1427 19:48:16.327701 I2C: 03:3a
1428 19:48:16.329947 I2C: 03:3b
1429 19:48:16.333080 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1430 19:48:16.343124 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1431 19:48:16.352871 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1432 19:48:16.362940 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1433 19:48:16.363416 PCI: 01:00.0
1434 19:48:16.376922 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1435 19:48:16.377501 PCI: 00:1e.0
1436 19:48:16.386094 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1437 19:48:16.399941 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1438 19:48:16.402597 PCI: 00:1e.2 child on link 0 SPI: 00
1439 19:48:16.412597 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1440 19:48:16.413156 SPI: 00
1441 19:48:16.415802 PCI: 00:1e.3 child on link 0 SPI: 01
1442 19:48:16.428980 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1443 19:48:16.429562 SPI: 01
1444 19:48:16.432351 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1445 19:48:16.441972 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1446 19:48:16.452378 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1447 19:48:16.452973 PNP: 0c09.0
1448 19:48:16.462373 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1449 19:48:16.462997 PCI: 00:1f.3
1450 19:48:16.472480 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1451 19:48:16.485058 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1452 19:48:16.485612 PCI: 00:1f.4
1453 19:48:16.495712 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1454 19:48:16.505581 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1455 19:48:16.506173 PCI: 00:1f.5
1456 19:48:16.515304 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 19:48:16.518749 Done allocating resources.
1458 19:48:16.524952 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1459 19:48:16.528373 Enabling resources...
1460 19:48:16.531886 PCI: 00:00.0 subsystem <- 8086/9b61
1461 19:48:16.535308 PCI: 00:00.0 cmd <- 06
1462 19:48:16.538654 PCI: 00:02.0 subsystem <- 8086/9b41
1463 19:48:16.541474 PCI: 00:02.0 cmd <- 03
1464 19:48:16.545030 PCI: 00:08.0 cmd <- 06
1465 19:48:16.548479 PCI: 00:12.0 subsystem <- 8086/02f9
1466 19:48:16.549086 PCI: 00:12.0 cmd <- 02
1467 19:48:16.555194 PCI: 00:14.0 subsystem <- 8086/02ed
1468 19:48:16.555784 PCI: 00:14.0 cmd <- 02
1469 19:48:16.558332 PCI: 00:14.2 cmd <- 02
1470 19:48:16.561923 PCI: 00:14.3 subsystem <- 8086/02f0
1471 19:48:16.564982 PCI: 00:14.3 cmd <- 02
1472 19:48:16.568901 PCI: 00:15.0 subsystem <- 8086/02e8
1473 19:48:16.572006 PCI: 00:15.0 cmd <- 02
1474 19:48:16.575034 PCI: 00:15.1 subsystem <- 8086/02e9
1475 19:48:16.578264 PCI: 00:15.1 cmd <- 02
1476 19:48:16.581580 PCI: 00:16.0 subsystem <- 8086/02e0
1477 19:48:16.584671 PCI: 00:16.0 cmd <- 02
1478 19:48:16.588097 PCI: 00:17.0 subsystem <- 8086/02d3
1479 19:48:16.591207 PCI: 00:17.0 cmd <- 03
1480 19:48:16.594763 PCI: 00:19.0 subsystem <- 8086/02c5
1481 19:48:16.595352 PCI: 00:19.0 cmd <- 02
1482 19:48:16.598348 PCI: 00:1d.0 bridge ctrl <- 0013
1483 19:48:16.604502 PCI: 00:1d.0 subsystem <- 8086/02b0
1484 19:48:16.605203 PCI: 00:1d.0 cmd <- 06
1485 19:48:16.608728 PCI: 00:1e.0 subsystem <- 8086/02a8
1486 19:48:16.611818 PCI: 00:1e.0 cmd <- 06
1487 19:48:16.614783 PCI: 00:1e.2 subsystem <- 8086/02aa
1488 19:48:16.618174 PCI: 00:1e.2 cmd <- 06
1489 19:48:16.621504 PCI: 00:1e.3 subsystem <- 8086/02ab
1490 19:48:16.624652 PCI: 00:1e.3 cmd <- 02
1491 19:48:16.628014 PCI: 00:1f.0 subsystem <- 8086/0284
1492 19:48:16.631236 PCI: 00:1f.0 cmd <- 407
1493 19:48:16.635022 PCI: 00:1f.3 subsystem <- 8086/02c8
1494 19:48:16.637840 PCI: 00:1f.3 cmd <- 02
1495 19:48:16.641221 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 19:48:16.644887 PCI: 00:1f.4 cmd <- 03
1497 19:48:16.647811 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 19:48:16.651159 PCI: 00:1f.5 cmd <- 406
1499 19:48:16.659018 PCI: 01:00.0 cmd <- 02
1500 19:48:16.664350 done.
1501 19:48:16.673259 ME: Version: 14.0.39.1367
1502 19:48:16.679479 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1503 19:48:16.682993 Initializing devices...
1504 19:48:16.683649 Root Device init ...
1505 19:48:16.689623 Chrome EC: Set SMI mask to 0x0000000000000000
1506 19:48:16.692505 Chrome EC: clear events_b mask to 0x0000000000000000
1507 19:48:16.699233 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 19:48:16.705907 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 19:48:16.712389 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 19:48:16.715822 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 19:48:16.719304 Root Device init finished in 35176 usecs
1512 19:48:16.722739 CPU_CLUSTER: 0 init ...
1513 19:48:16.729612 CPU_CLUSTER: 0 init finished in 2449 usecs
1514 19:48:16.733261 PCI: 00:00.0 init ...
1515 19:48:16.737254 CPU TDP: 15 Watts
1516 19:48:16.740315 CPU PL2 = 64 Watts
1517 19:48:16.743553 PCI: 00:00.0 init finished in 7085 usecs
1518 19:48:16.746782 PCI: 00:02.0 init ...
1519 19:48:16.750223 PCI: 00:02.0 init finished in 2255 usecs
1520 19:48:16.753800 PCI: 00:08.0 init ...
1521 19:48:16.756352 PCI: 00:08.0 init finished in 2255 usecs
1522 19:48:16.759921 PCI: 00:12.0 init ...
1523 19:48:16.762915 PCI: 00:12.0 init finished in 2253 usecs
1524 19:48:16.766988 PCI: 00:14.0 init ...
1525 19:48:16.769666 PCI: 00:14.0 init finished in 2254 usecs
1526 19:48:16.773176 PCI: 00:14.2 init ...
1527 19:48:16.776100 PCI: 00:14.2 init finished in 2255 usecs
1528 19:48:16.779779 PCI: 00:14.3 init ...
1529 19:48:16.783264 PCI: 00:14.3 init finished in 2270 usecs
1530 19:48:16.786300 PCI: 00:15.0 init ...
1531 19:48:16.789299 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 19:48:16.792869 PCI: 00:15.0 init finished in 5980 usecs
1533 19:48:16.796656 PCI: 00:15.1 init ...
1534 19:48:16.799692 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 19:48:16.806335 PCI: 00:15.1 init finished in 5981 usecs
1536 19:48:16.806946 PCI: 00:16.0 init ...
1537 19:48:16.812668 PCI: 00:16.0 init finished in 2253 usecs
1538 19:48:16.815929 PCI: 00:19.0 init ...
1539 19:48:16.819951 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 19:48:16.822297 PCI: 00:19.0 init finished in 5979 usecs
1541 19:48:16.825996 PCI: 00:1d.0 init ...
1542 19:48:16.829451 Initializing PCH PCIe bridge.
1543 19:48:16.832506 PCI: 00:1d.0 init finished in 5288 usecs
1544 19:48:16.836269 PCI: 00:1f.0 init ...
1545 19:48:16.839866 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 19:48:16.845817 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 19:48:16.846377 IOAPIC: ID = 0x02
1548 19:48:16.849272 IOAPIC: Dumping registers
1549 19:48:16.852656 reg 0x0000: 0x02000000
1550 19:48:16.855803 reg 0x0001: 0x00770020
1551 19:48:16.856365 reg 0x0002: 0x00000000
1552 19:48:16.862198 PCI: 00:1f.0 init finished in 23559 usecs
1553 19:48:16.865419 PCI: 00:1f.4 init ...
1554 19:48:16.868866 PCI: 00:1f.4 init finished in 2264 usecs
1555 19:48:16.879692 PCI: 01:00.0 init ...
1556 19:48:16.882982 PCI: 01:00.0 init finished in 2253 usecs
1557 19:48:16.886987 PNP: 0c09.0 init ...
1558 19:48:16.890426 Google Chrome EC uptime: 11.102 seconds
1559 19:48:16.897161 Google Chrome AP resets since EC boot: 0
1560 19:48:16.900452 Google Chrome most recent AP reset causes:
1561 19:48:16.907318 Google Chrome EC reset flags at last EC boot: reset-pin
1562 19:48:16.910399 PNP: 0c09.0 init finished in 20583 usecs
1563 19:48:16.913748 Devices initialized
1564 19:48:16.917005 Show all devs... After init.
1565 19:48:16.917462 Root Device: enabled 1
1566 19:48:16.920330 CPU_CLUSTER: 0: enabled 1
1567 19:48:16.923674 DOMAIN: 0000: enabled 1
1568 19:48:16.924231 APIC: 00: enabled 1
1569 19:48:16.927082 PCI: 00:00.0: enabled 1
1570 19:48:16.929937 PCI: 00:02.0: enabled 1
1571 19:48:16.933465 PCI: 00:04.0: enabled 0
1572 19:48:16.934024 PCI: 00:05.0: enabled 0
1573 19:48:16.936773 PCI: 00:12.0: enabled 1
1574 19:48:16.939795 PCI: 00:12.5: enabled 0
1575 19:48:16.943468 PCI: 00:12.6: enabled 0
1576 19:48:16.944028 PCI: 00:14.0: enabled 1
1577 19:48:16.947232 PCI: 00:14.1: enabled 0
1578 19:48:16.949808 PCI: 00:14.3: enabled 1
1579 19:48:16.950267 PCI: 00:14.5: enabled 0
1580 19:48:16.953258 PCI: 00:15.0: enabled 1
1581 19:48:16.956461 PCI: 00:15.1: enabled 1
1582 19:48:16.959830 PCI: 00:15.2: enabled 0
1583 19:48:16.960406 PCI: 00:15.3: enabled 0
1584 19:48:16.963044 PCI: 00:16.0: enabled 1
1585 19:48:16.966218 PCI: 00:16.1: enabled 0
1586 19:48:16.969583 PCI: 00:16.2: enabled 0
1587 19:48:16.970040 PCI: 00:16.3: enabled 0
1588 19:48:16.973113 PCI: 00:16.4: enabled 0
1589 19:48:16.976270 PCI: 00:16.5: enabled 0
1590 19:48:16.979713 PCI: 00:17.0: enabled 1
1591 19:48:16.980271 PCI: 00:19.0: enabled 1
1592 19:48:16.983213 PCI: 00:19.1: enabled 0
1593 19:48:16.986239 PCI: 00:19.2: enabled 0
1594 19:48:16.989755 PCI: 00:1a.0: enabled 0
1595 19:48:16.990209 PCI: 00:1c.0: enabled 0
1596 19:48:16.993216 PCI: 00:1c.1: enabled 0
1597 19:48:16.996400 PCI: 00:1c.2: enabled 0
1598 19:48:16.996956 PCI: 00:1c.3: enabled 0
1599 19:48:17.000015 PCI: 00:1c.4: enabled 0
1600 19:48:17.002873 PCI: 00:1c.5: enabled 0
1601 19:48:17.006377 PCI: 00:1c.6: enabled 0
1602 19:48:17.007171 PCI: 00:1c.7: enabled 0
1603 19:48:17.009778 PCI: 00:1d.0: enabled 1
1604 19:48:17.013162 PCI: 00:1d.1: enabled 0
1605 19:48:17.016090 PCI: 00:1d.2: enabled 0
1606 19:48:17.016651 PCI: 00:1d.3: enabled 0
1607 19:48:17.020010 PCI: 00:1d.4: enabled 0
1608 19:48:17.022673 PCI: 00:1d.5: enabled 0
1609 19:48:17.026582 PCI: 00:1e.0: enabled 1
1610 19:48:17.027142 PCI: 00:1e.1: enabled 0
1611 19:48:17.030057 PCI: 00:1e.2: enabled 1
1612 19:48:17.033365 PCI: 00:1e.3: enabled 1
1613 19:48:17.033923 PCI: 00:1f.0: enabled 1
1614 19:48:17.035621 PCI: 00:1f.1: enabled 0
1615 19:48:17.039436 PCI: 00:1f.2: enabled 0
1616 19:48:17.042674 PCI: 00:1f.3: enabled 1
1617 19:48:17.043233 PCI: 00:1f.4: enabled 1
1618 19:48:17.045658 PCI: 00:1f.5: enabled 1
1619 19:48:17.049406 PCI: 00:1f.6: enabled 0
1620 19:48:17.053016 USB0 port 0: enabled 1
1621 19:48:17.053577 I2C: 01:15: enabled 1
1622 19:48:17.055460 I2C: 02:5d: enabled 1
1623 19:48:17.059642 GENERIC: 0.0: enabled 1
1624 19:48:17.060209 I2C: 03:1a: enabled 1
1625 19:48:17.062158 I2C: 03:38: enabled 1
1626 19:48:17.065561 I2C: 03:39: enabled 1
1627 19:48:17.066124 I2C: 03:3a: enabled 1
1628 19:48:17.068888 I2C: 03:3b: enabled 1
1629 19:48:17.072679 PCI: 00:00.0: enabled 1
1630 19:48:17.073243 SPI: 00: enabled 1
1631 19:48:17.075471 SPI: 01: enabled 1
1632 19:48:17.078816 PNP: 0c09.0: enabled 1
1633 19:48:17.079282 USB2 port 0: enabled 1
1634 19:48:17.082613 USB2 port 1: enabled 1
1635 19:48:17.085576 USB2 port 2: enabled 0
1636 19:48:17.089053 USB2 port 3: enabled 0
1637 19:48:17.089696 USB2 port 5: enabled 0
1638 19:48:17.092500 USB2 port 6: enabled 1
1639 19:48:17.095215 USB2 port 9: enabled 1
1640 19:48:17.095918 USB3 port 0: enabled 1
1641 19:48:17.098420 USB3 port 1: enabled 1
1642 19:48:17.102039 USB3 port 2: enabled 1
1643 19:48:17.105599 USB3 port 3: enabled 1
1644 19:48:17.106155 USB3 port 4: enabled 0
1645 19:48:17.108573 APIC: 03: enabled 1
1646 19:48:17.109037 APIC: 01: enabled 1
1647 19:48:17.112050 APIC: 02: enabled 1
1648 19:48:17.115308 APIC: 05: enabled 1
1649 19:48:17.115777 APIC: 04: enabled 1
1650 19:48:17.118682 APIC: 07: enabled 1
1651 19:48:17.121852 APIC: 06: enabled 1
1652 19:48:17.122413 PCI: 00:08.0: enabled 1
1653 19:48:17.125231 PCI: 00:14.2: enabled 1
1654 19:48:17.128704 PCI: 01:00.0: enabled 1
1655 19:48:17.131852 Disabling ACPI via APMC:
1656 19:48:17.135409 done.
1657 19:48:17.138480 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1658 19:48:17.142299 ELOG: NV offset 0xaf0000 size 0x4000
1659 19:48:17.149599 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1660 19:48:17.155538 ELOG: Event(17) added with size 13 at 2023-10-28 19:48:17 UTC
1661 19:48:17.162880 ELOG: Event(92) added with size 9 at 2023-10-28 19:48:17 UTC
1662 19:48:17.168915 ELOG: Event(93) added with size 9 at 2023-10-28 19:48:17 UTC
1663 19:48:17.175359 ELOG: Event(9A) added with size 9 at 2023-10-28 19:48:17 UTC
1664 19:48:17.182028 ELOG: Event(9E) added with size 10 at 2023-10-28 19:48:17 UTC
1665 19:48:17.188469 ELOG: Event(9F) added with size 14 at 2023-10-28 19:48:17 UTC
1666 19:48:17.191755 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1667 19:48:17.199723 ELOG: Event(A1) added with size 10 at 2023-10-28 19:48:17 UTC
1668 19:48:17.209392 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1669 19:48:17.216137 ELOG: Event(A0) added with size 9 at 2023-10-28 19:48:17 UTC
1670 19:48:17.220115 elog_add_boot_reason: Logged dev mode boot
1671 19:48:17.220671 Finalize devices...
1672 19:48:17.222927 PCI: 00:17.0 final
1673 19:48:17.226324 Devices finalized
1674 19:48:17.229442 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1675 19:48:17.236205 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
1676 19:48:17.239756 ME: HFSTS1 : 0x90000245
1677 19:48:17.242701 ME: HFSTS2 : 0x3B850126
1678 19:48:17.249534 ME: HFSTS3 : 0x00000020
1679 19:48:17.252478 ME: HFSTS4 : 0x00004800
1680 19:48:17.255756 ME: HFSTS5 : 0x00000000
1681 19:48:17.258793 ME: HFSTS6 : 0x40400006
1682 19:48:17.263008 ME: Manufacturing Mode : NO
1683 19:48:17.265818 ME: FW Partition Table : OK
1684 19:48:17.269042 ME: Bringup Loader Failure : NO
1685 19:48:17.272432 ME: Firmware Init Complete : YES
1686 19:48:17.275720 ME: Boot Options Present : NO
1687 19:48:17.279207 ME: Update In Progress : NO
1688 19:48:17.282141 ME: D0i3 Support : YES
1689 19:48:17.285958 ME: Low Power State Enabled : NO
1690 19:48:17.289121 ME: CPU Replaced : NO
1691 19:48:17.292000 ME: CPU Replacement Valid : YES
1692 19:48:17.295513 ME: Current Working State : 5
1693 19:48:17.298852 ME: Current Operation State : 1
1694 19:48:17.302071 ME: Current Operation Mode : 0
1695 19:48:17.306186 ME: Error Code : 0
1696 19:48:17.309093 ME: CPU Debug Disabled : YES
1697 19:48:17.312202 ME: TXT Support : NO
1698 19:48:17.318992 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1699 19:48:17.325261 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 19:48:17.325824 CBFS @ c08000 size 3f8000
1701 19:48:17.332155 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 19:48:17.335396 CBFS: Locating 'fallback/dsdt.aml'
1703 19:48:17.338725 CBFS: Found @ offset 10bb80 size 3fa5
1704 19:48:17.345343 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 19:48:17.348259 CBFS @ c08000 size 3f8000
1706 19:48:17.352087 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 19:48:17.354980 CBFS: Locating 'fallback/slic'
1708 19:48:17.360071 CBFS: 'fallback/slic' not found.
1709 19:48:17.367169 ACPI: Writing ACPI tables at 99b3e000.
1710 19:48:17.367731 ACPI: * FACS
1711 19:48:17.370142 ACPI: * DSDT
1712 19:48:17.373832 Ramoops buffer: 0x100000@0x99a3d000.
1713 19:48:17.376753 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1714 19:48:17.383206 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1715 19:48:17.386613 Google Chrome EC: version:
1716 19:48:17.390108 ro: helios_v2.0.2659-56403530b
1717 19:48:17.393500 rw: helios_v2.0.2849-c41de27e7d
1718 19:48:17.394059 running image: 1
1719 19:48:17.397522 ACPI: * FADT
1720 19:48:17.398073 SCI is IRQ9
1721 19:48:17.400764 ACPI: added table 1/32, length now 40
1722 19:48:17.403945 ACPI: * SSDT
1723 19:48:17.407485 Found 1 CPU(s) with 8 core(s) each.
1724 19:48:17.410641 Error: Could not locate 'wifi_sar' in VPD.
1725 19:48:17.417903 Checking CBFS for default SAR values
1726 19:48:17.420507 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1727 19:48:17.423793 CBFS @ c08000 size 3f8000
1728 19:48:17.430490 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1729 19:48:17.434394 CBFS: Locating 'wifi_sar_defaults.hex'
1730 19:48:17.437003 CBFS: Found @ offset 5fac0 size 77
1731 19:48:17.440441 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1732 19:48:17.446945 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1733 19:48:17.450184 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1734 19:48:17.456644 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1735 19:48:17.460296 failed to find key in VPD: dsm_calib_r0_0
1736 19:48:17.470028 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1737 19:48:17.473173 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1738 19:48:17.479931 failed to find key in VPD: dsm_calib_r0_1
1739 19:48:17.486662 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1740 19:48:17.493216 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1741 19:48:17.496637 failed to find key in VPD: dsm_calib_r0_2
1742 19:48:17.506595 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1743 19:48:17.509577 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1744 19:48:17.516588 failed to find key in VPD: dsm_calib_r0_3
1745 19:48:17.522898 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1746 19:48:17.529461 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1747 19:48:17.533080 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1748 19:48:17.539537 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1749 19:48:17.543094 EC returned error result code 1
1750 19:48:17.546979 EC returned error result code 1
1751 19:48:17.550178 EC returned error result code 1
1752 19:48:17.553238 PS2K: Bad resp from EC. Vivaldi disabled!
1753 19:48:17.559775 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1754 19:48:17.567188 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1755 19:48:17.570095 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1756 19:48:17.576568 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1757 19:48:17.579848 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1758 19:48:17.586482 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1759 19:48:17.592705 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1760 19:48:17.599579 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1761 19:48:17.602784 ACPI: added table 2/32, length now 44
1762 19:48:17.603245 ACPI: * MCFG
1763 19:48:17.609594 ACPI: added table 3/32, length now 48
1764 19:48:17.610312 ACPI: * TPM2
1765 19:48:17.612958 TPM2 log created at 99a2d000
1766 19:48:17.616591 ACPI: added table 4/32, length now 52
1767 19:48:17.619416 ACPI: * MADT
1768 19:48:17.619880 SCI is IRQ9
1769 19:48:17.622767 ACPI: added table 5/32, length now 56
1770 19:48:17.625970 current = 99b43ac0
1771 19:48:17.626505 ACPI: * DMAR
1772 19:48:17.629720 ACPI: added table 6/32, length now 60
1773 19:48:17.632926 ACPI: * IGD OpRegion
1774 19:48:17.636626 GMA: Found VBT in CBFS
1775 19:48:17.639468 GMA: Found valid VBT in CBFS
1776 19:48:17.643217 ACPI: added table 7/32, length now 64
1777 19:48:17.643778 ACPI: * HPET
1778 19:48:17.646353 ACPI: added table 8/32, length now 68
1779 19:48:17.650280 ACPI: done.
1780 19:48:17.652754 ACPI tables: 31744 bytes.
1781 19:48:17.656004 smbios_write_tables: 99a2c000
1782 19:48:17.659224 EC returned error result code 3
1783 19:48:17.662545 Couldn't obtain OEM name from CBI
1784 19:48:17.666582 Create SMBIOS type 17
1785 19:48:17.669391 PCI: 00:00.0 (Intel Cannonlake)
1786 19:48:17.669902 PCI: 00:14.3 (Intel WiFi)
1787 19:48:17.672551 SMBIOS tables: 939 bytes.
1788 19:48:17.675634 Writing table forward entry at 0x00000500
1789 19:48:17.682559 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1790 19:48:17.685464 Writing coreboot table at 0x99b62000
1791 19:48:17.692324 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1792 19:48:17.695657 1. 0000000000001000-000000000009ffff: RAM
1793 19:48:17.702292 2. 00000000000a0000-00000000000fffff: RESERVED
1794 19:48:17.705918 3. 0000000000100000-0000000099a2bfff: RAM
1795 19:48:17.711977 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1796 19:48:17.715315 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1797 19:48:17.722257 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1798 19:48:17.728644 7. 000000009a000000-000000009f7fffff: RESERVED
1799 19:48:17.732195 8. 00000000e0000000-00000000efffffff: RESERVED
1800 19:48:17.735079 9. 00000000fc000000-00000000fc000fff: RESERVED
1801 19:48:17.742093 10. 00000000fe000000-00000000fe00ffff: RESERVED
1802 19:48:17.745329 11. 00000000fed10000-00000000fed17fff: RESERVED
1803 19:48:17.751978 12. 00000000fed80000-00000000fed83fff: RESERVED
1804 19:48:17.755296 13. 00000000fed90000-00000000fed91fff: RESERVED
1805 19:48:17.761635 14. 00000000feda0000-00000000feda1fff: RESERVED
1806 19:48:17.765050 15. 0000000100000000-000000045e7fffff: RAM
1807 19:48:17.768328 Graphics framebuffer located at 0xc0000000
1808 19:48:17.771358 Passing 5 GPIOs to payload:
1809 19:48:17.778134 NAME | PORT | POLARITY | VALUE
1810 19:48:17.781523 write protect | undefined | high | low
1811 19:48:17.788060 lid | undefined | high | high
1812 19:48:17.794879 power | undefined | high | low
1813 19:48:17.798192 oprom | undefined | high | low
1814 19:48:17.805424 EC in RW | 0x000000cb | high | low
1815 19:48:17.805999 Board ID: 4
1816 19:48:17.811894 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1817 19:48:17.812468 CBFS @ c08000 size 3f8000
1818 19:48:17.817979 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1819 19:48:17.824659 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1820 19:48:17.828602 coreboot table: 1492 bytes.
1821 19:48:17.831019 IMD ROOT 0. 99fff000 00001000
1822 19:48:17.834318 IMD SMALL 1. 99ffe000 00001000
1823 19:48:17.837474 FSP MEMORY 2. 99c4e000 003b0000
1824 19:48:17.841382 CONSOLE 3. 99c2e000 00020000
1825 19:48:17.844400 FMAP 4. 99c2d000 0000054e
1826 19:48:17.847563 TIME STAMP 5. 99c2c000 00000910
1827 19:48:17.851320 VBOOT WORK 6. 99c18000 00014000
1828 19:48:17.854736 MRC DATA 7. 99c16000 00001958
1829 19:48:17.858275 ROMSTG STCK 8. 99c15000 00001000
1830 19:48:17.861226 AFTER CAR 9. 99c0b000 0000a000
1831 19:48:17.865005 RAMSTAGE 10. 99baf000 0005c000
1832 19:48:17.867922 REFCODE 11. 99b7a000 00035000
1833 19:48:17.871011 SMM BACKUP 12. 99b6a000 00010000
1834 19:48:17.874664 COREBOOT 13. 99b62000 00008000
1835 19:48:17.878559 ACPI 14. 99b3e000 00024000
1836 19:48:17.881446 ACPI GNVS 15. 99b3d000 00001000
1837 19:48:17.884575 RAMOOPS 16. 99a3d000 00100000
1838 19:48:17.887523 TPM2 TCGLOG17. 99a2d000 00010000
1839 19:48:17.891508 SMBIOS 18. 99a2c000 00000800
1840 19:48:17.892301 IMD small region:
1841 19:48:17.898143 IMD ROOT 0. 99ffec00 00000400
1842 19:48:17.900555 FSP RUNTIME 1. 99ffebe0 00000004
1843 19:48:17.904273 EC HOSTEVENT 2. 99ffebc0 00000008
1844 19:48:17.907883 POWER STATE 3. 99ffeb80 00000040
1845 19:48:17.910915 ROMSTAGE 4. 99ffeb60 00000004
1846 19:48:17.914077 MEM INFO 5. 99ffe9a0 000001b9
1847 19:48:17.917308 VPD 6. 99ffe920 0000006c
1848 19:48:17.920817 MTRR: Physical address space:
1849 19:48:17.927368 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1850 19:48:17.934403 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1851 19:48:17.940561 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1852 19:48:17.944541 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1853 19:48:17.950242 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1854 19:48:17.956862 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1855 19:48:17.963902 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1856 19:48:17.967108 MTRR: Fixed MSR 0x250 0x0606060606060606
1857 19:48:17.973670 MTRR: Fixed MSR 0x258 0x0606060606060606
1858 19:48:17.977035 MTRR: Fixed MSR 0x259 0x0000000000000000
1859 19:48:17.980320 MTRR: Fixed MSR 0x268 0x0606060606060606
1860 19:48:17.983299 MTRR: Fixed MSR 0x269 0x0606060606060606
1861 19:48:17.990380 MTRR: Fixed MSR 0x26a 0x0606060606060606
1862 19:48:17.993209 MTRR: Fixed MSR 0x26b 0x0606060606060606
1863 19:48:17.996641 MTRR: Fixed MSR 0x26c 0x0606060606060606
1864 19:48:18.000373 MTRR: Fixed MSR 0x26d 0x0606060606060606
1865 19:48:18.003043 MTRR: Fixed MSR 0x26e 0x0606060606060606
1866 19:48:18.010239 MTRR: Fixed MSR 0x26f 0x0606060606060606
1867 19:48:18.013486 call enable_fixed_mtrr()
1868 19:48:18.016323 CPU physical address size: 39 bits
1869 19:48:18.019750 MTRR: default type WB/UC MTRR counts: 6/8.
1870 19:48:18.023070 MTRR: WB selected as default type.
1871 19:48:18.029650 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1872 19:48:18.036415 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1873 19:48:18.043311 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1874 19:48:18.049553 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1875 19:48:18.055700 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1876 19:48:18.059525 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1877 19:48:18.067069 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 19:48:18.069986 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 19:48:18.073764 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 19:48:18.077754 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 19:48:18.084128 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 19:48:18.086643 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 19:48:18.090623 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 19:48:18.093140 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 19:48:18.100168 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 19:48:18.103691 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 19:48:18.106633 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 19:48:18.107104
1889 19:48:18.110413 MTRR check
1890 19:48:18.111030 Fixed MTRRs : Enabled
1891 19:48:18.113246 Variable MTRRs: Enabled
1892 19:48:18.113710
1893 19:48:18.116475 call enable_fixed_mtrr()
1894 19:48:18.122974 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1895 19:48:18.126912 CPU physical address size: 39 bits
1896 19:48:18.130081 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1897 19:48:18.133077 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 19:48:18.139676 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 19:48:18.143044 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 19:48:18.146782 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 19:48:18.149567 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 19:48:18.156394 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 19:48:18.159205 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 19:48:18.162893 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 19:48:18.166367 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 19:48:18.173103 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 19:48:18.176042 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 19:48:18.179457 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 19:48:18.182328 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 19:48:18.185930 call enable_fixed_mtrr()
1911 19:48:18.188850 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 19:48:18.195380 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 19:48:18.199892 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 19:48:18.202098 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 19:48:18.205349 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 19:48:18.212525 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 19:48:18.215702 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 19:48:18.219097 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 19:48:18.222638 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 19:48:18.228918 CPU physical address size: 39 bits
1921 19:48:18.229479 call enable_fixed_mtrr()
1922 19:48:18.235444 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 19:48:18.238628 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 19:48:18.242170 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 19:48:18.245086 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 19:48:18.251913 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 19:48:18.255368 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 19:48:18.258908 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 19:48:18.262264 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 19:48:18.268640 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 19:48:18.271839 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 19:48:18.274985 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 19:48:18.278191 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 19:48:18.285783 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 19:48:18.286371 call enable_fixed_mtrr()
1936 19:48:18.291126 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 19:48:18.295165 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 19:48:18.298120 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 19:48:18.301553 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 19:48:18.308432 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 19:48:18.311152 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 19:48:18.314697 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 19:48:18.318302 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 19:48:18.322125 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 19:48:18.328092 CPU physical address size: 39 bits
1946 19:48:18.328660 call enable_fixed_mtrr()
1947 19:48:18.331511 CBFS @ c08000 size 3f8000
1948 19:48:18.334206 CPU physical address size: 39 bits
1949 19:48:18.341065 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1950 19:48:18.344554 CBFS: Locating 'fallback/payload'
1951 19:48:18.347845 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 19:48:18.354502 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 19:48:18.357601 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 19:48:18.360741 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 19:48:18.364372 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 19:48:18.371222 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 19:48:18.374382 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 19:48:18.377768 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 19:48:18.381012 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 19:48:18.384386 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 19:48:18.390689 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 19:48:18.394324 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 19:48:18.397460 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 19:48:18.404125 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 19:48:18.407196 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 19:48:18.410644 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 19:48:18.413881 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 19:48:18.417062 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 19:48:18.423760 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 19:48:18.427264 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 19:48:18.430388 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 19:48:18.433835 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 19:48:18.437099 call enable_fixed_mtrr()
1974 19:48:18.440777 call enable_fixed_mtrr()
1975 19:48:18.443990 CBFS: Found @ offset 1c96c0 size 3f798
1976 19:48:18.446767 CPU physical address size: 39 bits
1977 19:48:18.453837 Checking segment from ROM address 0xffdd16f8
1978 19:48:18.457055 CPU physical address size: 39 bits
1979 19:48:18.460210 CPU physical address size: 39 bits
1980 19:48:18.463887 Checking segment from ROM address 0xffdd1714
1981 19:48:18.470694 Loading segment from ROM address 0xffdd16f8
1982 19:48:18.471255 code (compression=0)
1983 19:48:18.480351 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1984 19:48:18.486688 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1985 19:48:18.490095 it's not compressed!
1986 19:48:18.582403 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1987 19:48:18.588583 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1988 19:48:18.592429 Loading segment from ROM address 0xffdd1714
1989 19:48:18.595361 Entry Point 0x30000000
1990 19:48:18.598384 Loaded segments
1991 19:48:18.604353 Finalizing chipset.
1992 19:48:18.607803 Finalizing SMM.
1993 19:48:18.610991 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1994 19:48:18.614450 mp_park_aps done after 0 msecs.
1995 19:48:18.621121 Jumping to boot code at 30000000(99b62000)
1996 19:48:18.627257 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1997 19:48:18.627725
1998 19:48:18.628127
1999 19:48:18.628478
2000 19:48:18.630808 Starting depthcharge on Helios...
2001 19:48:18.631271
2002 19:48:18.632447 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2003 19:48:18.632977 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2004 19:48:18.633421 Setting prompt string to ['hatch:']
2005 19:48:18.633870 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2006 19:48:18.640525 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2007 19:48:18.641001
2008 19:48:18.648545 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2009 19:48:18.649106
2010 19:48:18.653939 board_setup: Info: eMMC controller not present; skipping
2011 19:48:18.654472
2012 19:48:18.657197 New NVMe Controller 0x30053ac0 @ 00:1d:00
2013 19:48:18.657670
2014 19:48:18.664439 board_setup: Info: SDHCI controller not present; skipping
2015 19:48:18.665002
2016 19:48:18.670935 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2017 19:48:18.671512
2018 19:48:18.671885 Wipe memory regions:
2019 19:48:18.672392
2020 19:48:18.674103 [0x00000000001000, 0x000000000a0000)
2021 19:48:18.674629
2022 19:48:18.676914 [0x00000000100000, 0x00000030000000)
2023 19:48:18.743339
2024 19:48:18.747056 [0x00000030657430, 0x00000099a2c000)
2025 19:48:18.888736
2026 19:48:18.891880 [0x00000100000000, 0x0000045e800000)
2027 19:48:20.276409
2028 19:48:20.276967 R8152: Initializing
2029 19:48:20.277338
2030 19:48:20.280012 Version 9 (ocp_data = 6010)
2031 19:48:20.284077
2032 19:48:20.284632 R8152: Done initializing
2033 19:48:20.285007
2034 19:48:20.287380 Adding net device
2035 19:48:20.896236
2036 19:48:20.896785 R8152: Initializing
2037 19:48:20.897152
2038 19:48:20.899902 Version 6 (ocp_data = 5c30)
2039 19:48:20.900363
2040 19:48:20.903518 R8152: Done initializing
2041 19:48:20.903980
2042 19:48:20.906419 net_add_device: Attemp to include the same device
2043 19:48:20.910198
2044 19:48:20.916996 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2045 19:48:20.917488
2046 19:48:20.917852
2047 19:48:20.918228
2048 19:48:20.919288 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2050 19:48:21.020825 hatch: tftpboot 192.168.201.1 11899461/tftp-deploy-ock5jj3f/kernel/bzImage 11899461/tftp-deploy-ock5jj3f/kernel/cmdline 11899461/tftp-deploy-ock5jj3f/ramdisk/ramdisk.cpio.gz
2051 19:48:21.021497 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2052 19:48:21.021993 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2053 19:48:21.027064 tftpboot 192.168.201.1 11899461/tftp-deploy-ock5jj3f/kernel/bzIloy-ock5jj3f/kernel/cmdline 11899461/tftp-deploy-ock5jj3f/ramdisk/ramdisk.cpio.gz
2054 19:48:21.027776
2055 19:48:21.028157 Waiting for link
2056 19:48:21.228374
2057 19:48:21.229106 done.
2058 19:48:21.229562
2059 19:48:21.229915 MAC: 00:24:32:50:1a:5f
2060 19:48:21.230249
2061 19:48:21.231066 Sending DHCP discover... done.
2062 19:48:21.231529
2063 19:48:21.234176 Waiting for reply... done.
2064 19:48:21.234994
2065 19:48:21.239188 Sending DHCP request... done.
2066 19:48:21.239676
2067 19:48:21.249720 Waiting for reply... done.
2068 19:48:21.249889
2069 19:48:21.249971 My ip is 192.168.201.21
2070 19:48:21.250041
2071 19:48:21.252751 The DHCP server ip is 192.168.201.1
2072 19:48:21.255943
2073 19:48:21.259266 TFTP server IP predefined by user: 192.168.201.1
2074 19:48:21.259448
2075 19:48:21.266487 Bootfile predefined by user: 11899461/tftp-deploy-ock5jj3f/kernel/bzImage
2076 19:48:21.266710
2077 19:48:21.268999 Sending tftp read request... done.
2078 19:48:21.269197
2079 19:48:21.276082 Waiting for the transfer...
2080 19:48:21.276265
2081 19:48:21.976680 00000000 ################################################################
2082 19:48:21.977216
2083 19:48:22.694275 00080000 ################################################################
2084 19:48:22.694908
2085 19:48:23.396916 00100000 ################################################################
2086 19:48:23.397488
2087 19:48:24.113102 00180000 ################################################################
2088 19:48:24.113671
2089 19:48:24.807580 00200000 ################################################################
2090 19:48:24.808159
2091 19:48:25.530948 00280000 ################################################################
2092 19:48:25.531481
2093 19:48:26.246443 00300000 ################################################################
2094 19:48:26.247009
2095 19:48:26.950081 00380000 ################################################################
2096 19:48:26.950713
2097 19:48:27.640483 00400000 ################################################################
2098 19:48:27.641008
2099 19:48:28.354607 00480000 ################################################################
2100 19:48:28.355147
2101 19:48:29.062331 00500000 ################################################################
2102 19:48:29.062983
2103 19:48:29.763209 00580000 ################################################################
2104 19:48:29.763749
2105 19:48:30.477618 00600000 ################################################################
2106 19:48:30.478220
2107 19:48:31.200390 00680000 ################################################################
2108 19:48:31.200963
2109 19:48:31.924819 00700000 ################################################################
2110 19:48:31.925362
2111 19:48:32.622728 00780000 ################################################################
2112 19:48:32.623285
2113 19:48:32.883930 00800000 ####################### done.
2114 19:48:32.884486
2115 19:48:32.886709 The bootfile was 8576912 bytes long.
2116 19:48:32.887213
2117 19:48:32.889980 Sending tftp read request... done.
2118 19:48:32.890446
2119 19:48:32.893908 Waiting for the transfer...
2120 19:48:32.894375
2121 19:48:33.610793 00000000 ################################################################
2122 19:48:33.611337
2123 19:48:34.329924 00080000 ################################################################
2124 19:48:34.330451
2125 19:48:35.052277 00100000 ################################################################
2126 19:48:35.052895
2127 19:48:35.782084 00180000 ################################################################
2128 19:48:35.782800
2129 19:48:36.506790 00200000 ################################################################
2130 19:48:36.507504
2131 19:48:37.230009 00280000 ################################################################
2132 19:48:37.230658
2133 19:48:37.953550 00300000 ################################################################
2134 19:48:37.954156
2135 19:48:38.668229 00380000 ################################################################
2136 19:48:38.668912
2137 19:48:39.399539 00400000 ################################################################
2138 19:48:39.400147
2139 19:48:40.127004 00480000 ################################################################
2140 19:48:40.127575
2141 19:48:40.843024 00500000 ################################################################
2142 19:48:40.843582
2143 19:48:41.160237 00580000 ############################# done.
2144 19:48:41.160751
2145 19:48:41.163605 Sending tftp read request... done.
2146 19:48:41.164025
2147 19:48:41.166547 Waiting for the transfer...
2148 19:48:41.166970
2149 19:48:41.167304 00000000 # done.
2150 19:48:41.167625
2151 19:48:41.176730 Command line loaded dynamically from TFTP file: 11899461/tftp-deploy-ock5jj3f/kernel/cmdline
2152 19:48:41.177293
2153 19:48:41.206641 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11899461/extract-nfsrootfs-ews1s07i,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2154 19:48:41.207228
2155 19:48:41.212968 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 19:48:41.216008
2157 19:48:41.219668 Shutting down all USB controllers.
2158 19:48:41.220156
2159 19:48:41.220529 Removing current net device
2160 19:48:41.227172
2161 19:48:41.227758 Finalizing coreboot
2162 19:48:41.228138
2163 19:48:41.233793 Exiting depthcharge with code 4 at timestamp: 29960151
2164 19:48:41.234373
2165 19:48:41.234789
2166 19:48:41.235177 Starting kernel ...
2167 19:48:41.235526
2168 19:48:41.237092 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2169 19:48:41.237631 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2170 19:48:41.238048 Setting prompt string to ['Linux version [0-9]']
2171 19:48:41.238427 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 19:48:41.238883 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2173 19:48:41.239787
2175 19:53:00.237866 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2177 19:53:00.238071 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2179 19:53:00.238258 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 19:53:00.238602 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 19:53:00.238905 Cleaning after the job
2185 19:53:00.239011 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/ramdisk
2186 19:53:00.239941 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/kernel
2187 19:53:00.241235 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/nfsrootfs
2188 19:53:00.360346 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899461/tftp-deploy-ock5jj3f/modules
2189 19:53:00.360809 start: 4.1 power-off (timeout 00:00:30) [common]
2190 19:53:00.360986 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2191 19:53:00.436294 >> Command sent successfully.
2192 19:53:00.438788 Returned 0 in 0 seconds
2193 19:53:00.539187 end: 4.1 power-off (duration 00:00:00) [common]
2195 19:53:00.539501 start: 4.2 read-feedback (timeout 00:10:00) [common]
2196 19:53:00.539772 Listened to connection for namespace 'common' for up to 1s
2197 19:53:01.540753 Finalising connection for namespace 'common'
2198 19:53:01.540924 Disconnecting from shell: Finalise
2199 19:53:01.541002
2200 19:53:01.641321 end: 4.2 read-feedback (duration 00:00:01) [common]
2201 19:53:01.641509 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11899461
2202 19:53:02.144252 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11899461
2203 19:53:02.144445 JobError: Your job cannot terminate cleanly.