Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 09:29:29.587014 lava-dispatcher, installed at version: 2024.03
2 09:29:29.587282 start: 0 validate
3 09:29:29.587471 Start time: 2024-05-13 09:29:29.587462+00:00 (UTC)
4 09:29:29.587618 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:29:29.587771 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 09:29:29.848478 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:29:29.848735 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip87-rt49%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:29:30.106487 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:29:30.106720 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip87-rt49%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 09:29:30.461548 validate duration: 0.87
12 09:29:30.461860 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:29:30.461980 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:29:30.462116 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:29:30.519706 Not decompressing ramdisk as can be used compressed.
16 09:29:30.519914 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 09:29:30.520030 saving as /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/ramdisk/rootfs.cpio.gz
18 09:29:30.520147 total size: 8417901 (8 MB)
19 09:29:30.521566 progress 0 % (0 MB)
20 09:29:30.524115 progress 5 % (0 MB)
21 09:29:30.526614 progress 10 % (0 MB)
22 09:29:30.529183 progress 15 % (1 MB)
23 09:29:30.531669 progress 20 % (1 MB)
24 09:29:30.535529 progress 25 % (2 MB)
25 09:29:30.538049 progress 30 % (2 MB)
26 09:29:30.540419 progress 35 % (2 MB)
27 09:29:30.543102 progress 40 % (3 MB)
28 09:29:30.545779 progress 45 % (3 MB)
29 09:29:30.550264 progress 50 % (4 MB)
30 09:29:30.552805 progress 55 % (4 MB)
31 09:29:30.555313 progress 60 % (4 MB)
32 09:29:30.557628 progress 65 % (5 MB)
33 09:29:30.560172 progress 70 % (5 MB)
34 09:29:30.562695 progress 75 % (6 MB)
35 09:29:30.565174 progress 80 % (6 MB)
36 09:29:30.567675 progress 85 % (6 MB)
37 09:29:30.570198 progress 90 % (7 MB)
38 09:29:30.572713 progress 95 % (7 MB)
39 09:29:30.575198 progress 100 % (8 MB)
40 09:29:30.575566 8 MB downloaded in 0.06 s (144.86 MB/s)
41 09:29:30.575773 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:29:30.576147 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:29:30.576287 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:29:30.576427 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:29:30.576603 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip87-rt49/x86_64/defconfig+x86-board/gcc-10/kernel/bzImage
47 09:29:30.576713 saving as /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/kernel/bzImage
48 09:29:30.576815 total size: 14122896 (13 MB)
49 09:29:30.576916 No compression specified
50 09:29:30.578275 progress 0 % (0 MB)
51 09:29:30.582485 progress 5 % (0 MB)
52 09:29:30.586716 progress 10 % (1 MB)
53 09:29:30.590835 progress 15 % (2 MB)
54 09:29:30.595052 progress 20 % (2 MB)
55 09:29:30.599063 progress 25 % (3 MB)
56 09:29:30.603417 progress 30 % (4 MB)
57 09:29:30.607715 progress 35 % (4 MB)
58 09:29:30.612044 progress 40 % (5 MB)
59 09:29:30.616224 progress 45 % (6 MB)
60 09:29:30.620774 progress 50 % (6 MB)
61 09:29:30.625589 progress 55 % (7 MB)
62 09:29:30.630032 progress 60 % (8 MB)
63 09:29:30.634701 progress 65 % (8 MB)
64 09:29:30.639123 progress 70 % (9 MB)
65 09:29:30.644125 progress 75 % (10 MB)
66 09:29:30.648637 progress 80 % (10 MB)
67 09:29:30.653191 progress 85 % (11 MB)
68 09:29:30.657353 progress 90 % (12 MB)
69 09:29:30.661603 progress 95 % (12 MB)
70 09:29:30.665810 progress 100 % (13 MB)
71 09:29:30.666140 13 MB downloaded in 0.09 s (150.79 MB/s)
72 09:29:30.666363 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:29:30.666654 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:29:30.666750 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:29:30.666843 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:29:30.666984 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip87-rt49/x86_64/defconfig+x86-board/gcc-10/modules.tar.xz
78 09:29:30.667059 saving as /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/modules/modules.tar
79 09:29:30.667167 total size: 486432 (0 MB)
80 09:29:30.667271 Using unxz to decompress xz
81 09:29:30.671857 progress 6 % (0 MB)
82 09:29:30.672360 progress 13 % (0 MB)
83 09:29:30.672644 progress 20 % (0 MB)
84 09:29:30.674558 progress 26 % (0 MB)
85 09:29:30.676775 progress 33 % (0 MB)
86 09:29:30.679266 progress 40 % (0 MB)
87 09:29:30.681515 progress 47 % (0 MB)
88 09:29:30.683724 progress 53 % (0 MB)
89 09:29:30.685949 progress 60 % (0 MB)
90 09:29:30.688019 progress 67 % (0 MB)
91 09:29:30.690326 progress 74 % (0 MB)
92 09:29:30.692768 progress 80 % (0 MB)
93 09:29:30.694947 progress 87 % (0 MB)
94 09:29:30.697332 progress 94 % (0 MB)
95 09:29:30.699539 progress 100 % (0 MB)
96 09:29:30.706542 0 MB downloaded in 0.04 s (11.79 MB/s)
97 09:29:30.706911 end: 1.3.1 http-download (duration 00:00:00) [common]
99 09:29:30.707374 end: 1.3 download-retry (duration 00:00:00) [common]
100 09:29:30.707532 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 09:29:30.707704 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 09:29:30.707845 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 09:29:30.707986 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 09:29:30.708292 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt
105 09:29:30.708503 makedir: /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin
106 09:29:30.708672 makedir: /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/tests
107 09:29:30.708824 makedir: /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/results
108 09:29:30.708992 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-add-keys
109 09:29:30.709199 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-add-sources
110 09:29:30.709384 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-background-process-start
111 09:29:30.709572 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-background-process-stop
112 09:29:30.709758 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-common-functions
113 09:29:30.709935 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-echo-ipv4
114 09:29:30.710118 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-install-packages
115 09:29:30.710294 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-installed-packages
116 09:29:30.710470 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-os-build
117 09:29:30.710651 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-probe-channel
118 09:29:30.710829 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-probe-ip
119 09:29:30.711007 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-target-ip
120 09:29:30.711191 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-target-mac
121 09:29:30.711370 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-target-storage
122 09:29:30.711572 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-case
123 09:29:30.711751 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-event
124 09:29:30.711927 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-feedback
125 09:29:30.712108 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-raise
126 09:29:30.712286 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-reference
127 09:29:30.712460 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-runner
128 09:29:30.712648 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-set
129 09:29:30.712831 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-test-shell
130 09:29:30.713019 Updating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-install-packages (oe)
131 09:29:30.713220 Updating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/bin/lava-installed-packages (oe)
132 09:29:30.713395 Creating /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/environment
133 09:29:30.713550 LAVA metadata
134 09:29:30.713664 - LAVA_JOB_ID=13757807
135 09:29:30.713773 - LAVA_DISPATCHER_IP=192.168.201.1
136 09:29:30.713940 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 09:29:30.714050 skipped lava-vland-overlay
138 09:29:30.714172 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 09:29:30.714301 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 09:29:30.714406 skipped lava-multinode-overlay
141 09:29:30.714527 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 09:29:30.714659 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 09:29:30.714784 Loading test definitions
144 09:29:30.714933 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 09:29:30.715060 Using /lava-13757807 at stage 0
146 09:29:30.715571 uuid=13757807_1.4.2.3.1 testdef=None
147 09:29:30.715705 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 09:29:30.715835 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 09:29:30.716708 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 09:29:30.717121 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 09:29:30.719757 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 09:29:30.720177 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 09:29:30.725293 runner path: /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/0/tests/0_dmesg test_uuid 13757807_1.4.2.3.1
156 09:29:30.725536 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 09:29:30.725950 Creating lava-test-runner.conf files
159 09:29:30.726055 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13757807/lava-overlay-3emj40tt/lava-13757807/0 for stage 0
160 09:29:30.726200 - 0_dmesg
161 09:29:30.726350 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 09:29:30.726492 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 09:29:30.736639 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 09:29:30.736835 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 09:29:30.736975 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 09:29:30.737113 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 09:29:30.737246 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 09:29:31.026633 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 09:29:31.027083 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
170 09:29:31.027252 extracting modules file /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13757807/extract-overlay-ramdisk-rzjz80lg/ramdisk
171 09:29:31.053480 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 09:29:31.053708 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 09:29:31.053867 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13757807/compress-overlay-iu4ayjxc/overlay-1.4.2.4.tar.gz to ramdisk
174 09:29:31.053993 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13757807/compress-overlay-iu4ayjxc/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13757807/extract-overlay-ramdisk-rzjz80lg/ramdisk
175 09:29:31.066903 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 09:29:31.067133 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
177 09:29:31.067295 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 09:29:31.067456 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
179 09:29:31.067606 Building ramdisk /var/lib/lava/dispatcher/tmp/13757807/extract-overlay-ramdisk-rzjz80lg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13757807/extract-overlay-ramdisk-rzjz80lg/ramdisk
180 09:29:31.257827 >> 51692 blocks
181 09:29:32.278269 rename /var/lib/lava/dispatcher/tmp/13757807/extract-overlay-ramdisk-rzjz80lg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/ramdisk/ramdisk.cpio.gz
182 09:29:32.278836 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 09:29:32.279009 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
184 09:29:32.279160 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
185 09:29:32.279316 No mkimage arch provided, not using FIT.
186 09:29:32.279508 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 09:29:32.279642 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 09:29:32.279807 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
189 09:29:32.279951 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
190 09:29:32.280073 No LXC device requested
191 09:29:32.280209 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 09:29:32.280357 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
193 09:29:32.280486 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 09:29:32.280596 Checking files for TFTP limit of 4294967296 bytes.
195 09:29:32.281212 end: 1 tftp-deploy (duration 00:00:02) [common]
196 09:29:32.281367 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 09:29:32.281509 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 09:29:32.281698 substitutions:
199 09:29:32.281808 - {DTB}: None
200 09:29:32.281911 - {INITRD}: 13757807/tftp-deploy-3twor0dv/ramdisk/ramdisk.cpio.gz
201 09:29:32.282010 - {KERNEL}: 13757807/tftp-deploy-3twor0dv/kernel/bzImage
202 09:29:32.282115 - {LAVA_MAC}: None
203 09:29:32.282215 - {PRESEED_CONFIG}: None
204 09:29:32.282315 - {PRESEED_LOCAL}: None
205 09:29:32.282410 - {RAMDISK}: 13757807/tftp-deploy-3twor0dv/ramdisk/ramdisk.cpio.gz
206 09:29:32.282512 - {ROOT_PART}: None
207 09:29:32.282580 - {ROOT}: None
208 09:29:32.282669 - {SERVER_IP}: 192.168.201.1
209 09:29:32.282766 - {TEE}: None
210 09:29:32.282865 Parsed boot commands:
211 09:29:32.282957 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 09:29:32.283214 Parsed boot commands: tftpboot 192.168.201.1 13757807/tftp-deploy-3twor0dv/kernel/bzImage 13757807/tftp-deploy-3twor0dv/kernel/cmdline 13757807/tftp-deploy-3twor0dv/ramdisk/ramdisk.cpio.gz
213 09:29:32.283350 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 09:29:32.283500 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 09:29:32.283638 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 09:29:32.283768 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 09:29:32.283893 Not connected, no need to disconnect.
218 09:29:32.284010 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 09:29:32.284140 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 09:29:32.284252 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
221 09:29:32.288175 Setting prompt string to ['lava-test: # ']
222 09:29:32.288856 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 09:29:32.289016 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 09:29:32.289171 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 09:29:32.289312 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 09:29:32.289622 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'asus-C436FA-Flip-hatch-cbg-4']
227 09:29:41.258850 Returned 0 in 8 seconds
228 09:29:41.359530 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
230 09:29:41.359881 end: 2.2.2 reset-device (duration 00:00:09) [common]
231 09:29:41.359992 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
232 09:29:41.360088 Setting prompt string to 'Starting depthcharge on Helios...'
233 09:29:41.360163 Changing prompt to 'Starting depthcharge on Helios...'
234 09:29:41.360240 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
235 09:29:41.360712 [Enter `^Ec?' for help]
236 09:29:41.360852
237 09:29:41.360985
238 09:29:41.361112 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
239 09:29:41.361236 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
240 09:29:41.361346 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
241 09:29:41.361423 CPU: AES supported, TXT NOT supported, VT supported
242 09:29:41.361492 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
243 09:29:41.361565 PCH: device id 0284 (rev 00) is Cometlake-U Premium
244 09:29:41.361632 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
245 09:29:41.361693 VBOOT: Loading verstage.
246 09:29:41.361758 FMAP: Found "FLASH" version 1.1 at 0xc04000.
247 09:29:41.361819 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
248 09:29:41.361880 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
249 09:29:41.361948 CBFS @ c08000 size 3f8000
250 09:29:41.362015 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
251 09:29:41.362077 CBFS: Locating 'fallback/verstage'
252 09:29:41.362137 CBFS: Found @ offset 10fb80 size 1072c
253 09:29:41.362198
254 09:29:41.362279
255 09:29:41.362375 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
256 09:29:41.362471 Probing TPM: . done!
257 09:29:41.362565 TPM ready after 0 ms
258 09:29:41.362660 Connected to device vid:did:rid of 1ae0:0028:00
259 09:29:41.362761 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
260 09:29:41.362866 Initialized TPM device CR50 revision 0
261 09:29:41.362980 tlcl_send_startup: Startup return code is 0
262 09:29:41.363079 TPM: setup succeeded
263 09:29:41.363178 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
264 09:29:41.363273 Chrome EC: UHEPI supported
265 09:29:41.363367 Phase 1
266 09:29:41.363452 FMAP: area GBB found @ c05000 (12288 bytes)
267 09:29:41.363515 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
268 09:29:41.363576 VB2:vb2_check_recovery() Recovery was requested manually
269 09:29:41.363638 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
270 09:29:41.363698 Recovery requested (1009000e)
271 09:29:41.363758 tlcl_extend: response is 0
272 09:29:41.363818 tlcl_extend: response is 0
273 09:29:41.363878 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
274 09:29:41.363938 CBFS @ c08000 size 3f8000
275 09:29:41.363996 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
276 09:29:41.364056 CBFS: Locating 'fallback/romstage'
277 09:29:41.364115 CBFS: Found @ offset 80 size 145fc
278 09:29:41.364175 Accumulated console time in verstage 102 ms
279 09:29:41.364234
280 09:29:41.364293
281 09:29:41.364357 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
282 09:29:41.364418 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
283 09:29:41.364478 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
284 09:29:41.364541 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
285 09:29:41.364601 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
286 09:29:41.364659 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
287 09:29:41.364723 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
288 09:29:41.364783 TCO_STS: 0000 0000
289 09:29:41.364843 GEN_PMCON: e0015038 00000200
290 09:29:41.364920 GBLRST_CAUSE: 00000000 00000000
291 09:29:41.365013 prev_sleep_state 5
292 09:29:41.365106 Boot Count incremented to 1892
293 09:29:41.365199 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
294 09:29:41.365293 CBFS @ c08000 size 3f8000
295 09:29:41.365386 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
296 09:29:41.365479 CBFS: Locating 'fspm.bin'
297 09:29:41.365572 CBFS: Found @ offset 5ffc0 size 71000
298 09:29:41.365665 Chrome EC: UHEPI supported
299 09:29:41.365759 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
300 09:29:41.365852 Probing TPM: done!
301 09:29:41.365945 Connected to device vid:did:rid of 1ae0:0028:00
302 09:29:41.366040 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
303 09:29:41.366135 Initialized TPM device CR50 revision 0
304 09:29:41.366229 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
305 09:29:41.366323 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
306 09:29:41.366417 MRC cache found, size 1948
307 09:29:41.366509 bootmode is set to: 2
308 09:29:41.366602 PRMRR disabled by config.
309 09:29:41.366694 SPD INDEX = 1
310 09:29:41.366787 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
311 09:29:41.366880 CBFS @ c08000 size 3f8000
312 09:29:41.366974 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
313 09:29:41.367066 CBFS: Locating 'spd.bin'
314 09:29:41.367159 CBFS: Found @ offset 5fb80 size 400
315 09:29:41.367252 SPD: module type is LPDDR3
316 09:29:41.367344 SPD: module part is
317 09:29:41.367445 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
318 09:29:41.367510 SPD: device width 4 bits, bus width 8 bits
319 09:29:41.367571 SPD: module size is 4096 MB (per channel)
320 09:29:41.367631 memory slot: 0 configuration done.
321 09:29:41.367697 memory slot: 2 configuration done.
322 09:29:41.367757 CBMEM:
323 09:29:41.367816 IMD: root @ 99fff000 254 entries.
324 09:29:41.367880 IMD: root @ 99ffec00 62 entries.
325 09:29:41.367939 External stage cache:
326 09:29:41.367998 IMD: root @ 9abff000 254 entries.
327 09:29:41.368059 IMD: root @ 9abfec00 62 entries.
328 09:29:41.368119 Chrome EC: clear events_b mask to 0x0000000020004000
329 09:29:41.368179 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
330 09:29:41.368239 tlcl_write: response is 0
331 09:29:41.368300 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
332 09:29:41.368360 MRC: TPM MRC hash updated successfully.
333 09:29:41.368421 2 DIMMs found
334 09:29:41.368484 SMM Memory Map
335 09:29:41.368543 SMRAM : 0x9a000000 0x1000000
336 09:29:41.368823 Subregion 0: 0x9a000000 0xa00000
337 09:29:41.368978 Subregion 1: 0x9aa00000 0x200000
338 09:29:41.369093 Subregion 2: 0x9ac00000 0x400000
339 09:29:41.369197 top_of_ram = 0x9a000000
340 09:29:41.369307 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
341 09:29:41.369407 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
342 09:29:41.369505 MTRR Range: Start=ff000000 End=0 (Size 1000000)
343 09:29:41.369622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
344 09:29:41.369726 CBFS @ c08000 size 3f8000
345 09:29:41.369826 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
346 09:29:41.369922 CBFS: Locating 'fallback/postcar'
347 09:29:41.370022 CBFS: Found @ offset 107000 size 4b44
348 09:29:41.370118 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
349 09:29:41.370219 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
350 09:29:41.370317 Processing 180 relocs. Offset value of 0x97c0c000
351 09:29:41.370412 Accumulated console time in romstage 286 ms
352 09:29:41.370492
353 09:29:41.370557
354 09:29:41.370618 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
355 09:29:41.370689 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 09:29:41.370752 CBFS @ c08000 size 3f8000
357 09:29:41.370814 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 09:29:41.370875 CBFS: Locating 'fallback/ramstage'
359 09:29:41.370965 CBFS: Found @ offset 43380 size 1b9e8
360 09:29:41.371060 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
361 09:29:41.371160 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
362 09:29:41.371257 Processing 3976 relocs. Offset value of 0x98db0000
363 09:29:41.371352 Accumulated console time in postcar 52 ms
364 09:29:41.371450
365 09:29:41.371513
366 09:29:41.371575 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
367 09:29:41.371643 FMAP: area RO_VPD found @ c00000 (16384 bytes)
368 09:29:41.371728 WARNING: RO_VPD is uninitialized or empty.
369 09:29:41.371793 FMAP: area RW_VPD found @ af8000 (8192 bytes)
370 09:29:41.371855 FMAP: area RW_VPD found @ af8000 (8192 bytes)
371 09:29:41.371947 Normal boot.
372 09:29:41.372046 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
373 09:29:41.372146 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
374 09:29:41.372241 CBFS @ c08000 size 3f8000
375 09:29:41.372343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
376 09:29:41.372447 CBFS: Locating 'cpu_microcode_blob.bin'
377 09:29:41.372542 CBFS: Found @ offset 14700 size 2ec00
378 09:29:41.372643 microcode: sig=0x806ec pf=0x4 revision=0xc9
379 09:29:41.372739 Skip microcode update
380 09:29:41.372837 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 09:29:41.372933 CBFS @ c08000 size 3f8000
382 09:29:41.373027 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 09:29:41.373125 CBFS: Locating 'fsps.bin'
384 09:29:41.373219 CBFS: Found @ offset d1fc0 size 35000
385 09:29:41.373313 Detected 4 core, 8 thread CPU.
386 09:29:41.373411 Setting up SMI for CPU
387 09:29:41.373505 IED base = 0x9ac00000
388 09:29:41.373604 IED size = 0x00400000
389 09:29:41.373702 Will perform SMM setup.
390 09:29:41.373797 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
391 09:29:41.373896 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
392 09:29:41.373993 Processing 16 relocs. Offset value of 0x00030000
393 09:29:41.374089 Attempting to start 7 APs
394 09:29:41.374185 Waiting for 10ms after sending INIT.
395 09:29:41.374279 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
396 09:29:41.374377 done.
397 09:29:41.374471 AP: slot 4 apic_id 6.
398 09:29:41.374565 AP: slot 5 apic_id 7.
399 09:29:41.374632 AP: slot 2 apic_id 5.
400 09:29:41.374693 AP: slot 3 apic_id 4.
401 09:29:41.374753 AP: slot 6 apic_id 3.
402 09:29:41.374814 AP: slot 7 apic_id 2.
403 09:29:41.374915 Waiting for 2nd SIPI to complete...done.
404 09:29:41.375012 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
405 09:29:41.375120 Processing 13 relocs. Offset value of 0x00038000
406 09:29:41.375217 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
407 09:29:41.375318 Installing SMM handler to 0x9a000000
408 09:29:41.375421 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
409 09:29:41.375487 Processing 658 relocs. Offset value of 0x9a010000
410 09:29:41.375558 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
411 09:29:41.375621 Processing 13 relocs. Offset value of 0x9a008000
412 09:29:41.375682 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
413 09:29:41.375743 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
414 09:29:41.375813 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
415 09:29:41.375875 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
416 09:29:41.375936 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
417 09:29:41.375997 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
418 09:29:41.376067 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
419 09:29:41.376129 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
420 09:29:41.376190 Clearing SMI status registers
421 09:29:41.376255 SMI_STS: PM1
422 09:29:41.376318 PM1_STS: PWRBTN
423 09:29:41.376379 TCO_STS: SECOND_TO
424 09:29:41.376439 New SMBASE 0x9a000000
425 09:29:41.376499 In relocation handler: CPU 0
426 09:29:41.376573 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
427 09:29:41.376641 Writing SMRR. base = 0x9a000006, mask=0xff000800
428 09:29:41.376744 Relocation complete.
429 09:29:41.376841 New SMBASE 0x99fffc00
430 09:29:41.376936 In relocation handler: CPU 1
431 09:29:41.377229 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
432 09:29:41.377337 Writing SMRR. base = 0x9a000006, mask=0xff000800
433 09:29:41.377433 Relocation complete.
434 09:29:41.377526 New SMBASE 0x99fff000
435 09:29:41.377629 In relocation handler: CPU 4
436 09:29:41.377723 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
437 09:29:41.377819 Writing SMRR. base = 0x9a000006, mask=0xff000800
438 09:29:41.377912 Relocation complete.
439 09:29:41.378005 New SMBASE 0x99ffec00
440 09:29:41.378103 In relocation handler: CPU 5
441 09:29:41.378201 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
442 09:29:41.378300 Writing SMRR. base = 0x9a000006, mask=0xff000800
443 09:29:41.378405 Relocation complete.
444 09:29:41.378500 New SMBASE 0x99ffe400
445 09:29:41.378580 In relocation handler: CPU 7
446 09:29:41.378641 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
447 09:29:41.378703 Writing SMRR. base = 0x9a000006, mask=0xff000800
448 09:29:41.378764 Relocation complete.
449 09:29:41.378838 New SMBASE 0x99ffe800
450 09:29:41.378901 In relocation handler: CPU 6
451 09:29:41.378962 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
452 09:29:41.379033 Writing SMRR. base = 0x9a000006, mask=0xff000800
453 09:29:41.379128 Relocation complete.
454 09:29:41.379221 New SMBASE 0x99fff800
455 09:29:41.379320 In relocation handler: CPU 2
456 09:29:41.379421 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
457 09:29:41.379486 Writing SMRR. base = 0x9a000006, mask=0xff000800
458 09:29:41.379556 Relocation complete.
459 09:29:41.379646 New SMBASE 0x99fff400
460 09:29:41.379741 In relocation handler: CPU 3
461 09:29:41.379851 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
462 09:29:41.379964 Writing SMRR. base = 0x9a000006, mask=0xff000800
463 09:29:41.380073 Relocation complete.
464 09:29:41.380181 Initializing CPU #0
465 09:29:41.380287 CPU: vendor Intel device 806ec
466 09:29:41.380396 CPU: family 06, model 8e, stepping 0c
467 09:29:41.380507 Clearing out pending MCEs
468 09:29:41.380606 Setting up local APIC...
469 09:29:41.380701 apic_id: 0x00 done.
470 09:29:41.380809 Turbo is available but hidden
471 09:29:41.380908 Turbo is available and visible
472 09:29:41.381002 VMX status: enabled
473 09:29:41.381100 IA32_FEATURE_CONTROL status: locked
474 09:29:41.381194 Skip microcode update
475 09:29:41.381287 CPU #0 initialized
476 09:29:41.381384 Initializing CPU #1
477 09:29:41.381477 Initializing CPU #6
478 09:29:41.381574 Initializing CPU #7
479 09:29:41.381668 CPU: vendor Intel device 806ec
480 09:29:41.381769 CPU: family 06, model 8e, stepping 0c
481 09:29:41.381870 CPU: vendor Intel device 806ec
482 09:29:41.381964 CPU: family 06, model 8e, stepping 0c
483 09:29:41.382057 Clearing out pending MCEs
484 09:29:41.382151 Clearing out pending MCEs
485 09:29:41.382244 Setting up local APIC...
486 09:29:41.382342 Initializing CPU #4
487 09:29:41.382439 CPU: vendor Intel device 806ec
488 09:29:41.382525 CPU: family 06, model 8e, stepping 0c
489 09:29:41.382588 Clearing out pending MCEs
490 09:29:41.382649 Initializing CPU #3
491 09:29:41.382710 Initializing CPU #2
492 09:29:41.382775 CPU: vendor Intel device 806ec
493 09:29:41.382837 CPU: family 06, model 8e, stepping 0c
494 09:29:41.382898 CPU: vendor Intel device 806ec
495 09:29:41.382959 CPU: family 06, model 8e, stepping 0c
496 09:29:41.383048 Clearing out pending MCEs
497 09:29:41.383142 Clearing out pending MCEs
498 09:29:41.383237 Setting up local APIC...
499 09:29:41.383332 CPU: vendor Intel device 806ec
500 09:29:41.383433 CPU: family 06, model 8e, stepping 0c
501 09:29:41.383503 Setting up local APIC...
502 09:29:41.383566 Setting up local APIC...
503 09:29:41.383627 Initializing CPU #5
504 09:29:41.383687 Clearing out pending MCEs
505 09:29:41.383747 CPU: vendor Intel device 806ec
506 09:29:41.383815 CPU: family 06, model 8e, stepping 0c
507 09:29:41.383876 Clearing out pending MCEs
508 09:29:41.383937 Setting up local APIC...
509 09:29:41.383997 apic_id: 0x02 done.
510 09:29:41.384058 apic_id: 0x03 done.
511 09:29:41.384118 VMX status: enabled
512 09:29:41.384178 VMX status: enabled
513 09:29:41.384238 IA32_FEATURE_CONTROL status: locked
514 09:29:41.384299 IA32_FEATURE_CONTROL status: locked
515 09:29:41.384366 Skip microcode update
516 09:29:41.384434 Skip microcode update
517 09:29:41.384495 CPU #7 initialized
518 09:29:41.384570 CPU #6 initialized
519 09:29:41.384664 apic_id: 0x01 done.
520 09:29:41.384759 Setting up local APIC...
521 09:29:41.384854 VMX status: enabled
522 09:29:41.384947 apic_id: 0x06 done.
523 09:29:41.385044 apic_id: 0x07 done.
524 09:29:41.385151 VMX status: enabled
525 09:29:41.385256 VMX status: enabled
526 09:29:41.385352 IA32_FEATURE_CONTROL status: locked
527 09:29:41.385446 IA32_FEATURE_CONTROL status: locked
528 09:29:41.385539 Skip microcode update
529 09:29:41.385646 IA32_FEATURE_CONTROL status: locked
530 09:29:41.385741 CPU #4 initialized
531 09:29:41.385834 Skip microcode update
532 09:29:41.385928 Skip microcode update
533 09:29:41.386020 CPU #5 initialized
534 09:29:41.386113 CPU #1 initialized
535 09:29:41.386206 apic_id: 0x04 done.
536 09:29:41.386299 Setting up local APIC...
537 09:29:41.386404 VMX status: enabled
538 09:29:41.386499 apic_id: 0x05 done.
539 09:29:41.386592 IA32_FEATURE_CONTROL status: locked
540 09:29:41.386686 VMX status: enabled
541 09:29:41.386785 Skip microcode update
542 09:29:41.386849 IA32_FEATURE_CONTROL status: locked
543 09:29:41.386910 CPU #3 initialized
544 09:29:41.386970 Skip microcode update
545 09:29:41.387030 CPU #2 initialized
546 09:29:41.387091 bsp_do_flight_plan done after 452 msecs.
547 09:29:41.387166 CPU: frequency set to 4200 MHz
548 09:29:41.387263 Enabling SMIs.
549 09:29:41.387356 Locking SMM.
550 09:29:41.387447 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
551 09:29:41.387511 CBFS @ c08000 size 3f8000
552 09:29:41.387594 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
553 09:29:41.387659 CBFS: Locating 'vbt.bin'
554 09:29:41.387720 CBFS: Found @ offset 5f5c0 size 499
555 09:29:41.387782 Found a VBT of 4608 bytes after decompression
556 09:29:41.387843 Display FSP Version Info HOB
557 09:29:41.387904 Reference Code - CPU = 9.0.1e.30
558 09:29:41.387965 uCode Version = 0.0.0.ca
559 09:29:41.388025 TXT ACM version = ff.ff.ff.ffff
560 09:29:41.388086 Display FSP Version Info HOB
561 09:29:41.388147 Reference Code - ME = 9.0.1e.30
562 09:29:41.388207 MEBx version = 0.0.0.0
563 09:29:41.388268 ME Firmware Version = Consumer SKU
564 09:29:41.388352 Display FSP Version Info HOB
565 09:29:41.388415 Reference Code - CML PCH = 9.0.1e.30
566 09:29:41.388476 PCH-CRID Status = Disabled
567 09:29:41.388536 PCH-CRID Original Value = ff.ff.ff.ffff
568 09:29:41.388597 PCH-CRID New Value = ff.ff.ff.ffff
569 09:29:41.388867 OPROM - RST - RAID = ff.ff.ff.ffff
570 09:29:41.388937 ChipsetInit Base Version = ff.ff.ff.ffff
571 09:29:41.389000 ChipsetInit Oem Version = ff.ff.ff.ffff
572 09:29:41.389062 Display FSP Version Info HOB
573 09:29:41.389138 Reference Code - SA - System Agent = 9.0.1e.30
574 09:29:41.389204 Reference Code - MRC = 0.7.1.6c
575 09:29:41.389319 SA - PCIe Version = 9.0.1e.30
576 09:29:41.389399 SA-CRID Status = Disabled
577 09:29:41.389500 SA-CRID Original Value = 0.0.0.c
578 09:29:41.389600 SA-CRID New Value = 0.0.0.c
579 09:29:41.389697 OPROM - VBIOS = ff.ff.ff.ffff
580 09:29:41.389801 RTC Init
581 09:29:41.389907 Set power on after power failure.
582 09:29:41.390013 Disabling Deep S3
583 09:29:41.390118 Disabling Deep S3
584 09:29:41.390219 Disabling Deep S4
585 09:29:41.390314 Disabling Deep S4
586 09:29:41.390415 Disabling Deep S5
587 09:29:41.390509 Disabling Deep S5
588 09:29:41.390605 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
589 09:29:41.390700 Enumerating buses...
590 09:29:41.390795 Show all devs... Before device enumeration.
591 09:29:41.390889 Root Device: enabled 1
592 09:29:41.390982 CPU_CLUSTER: 0: enabled 1
593 09:29:41.391076 DOMAIN: 0000: enabled 1
594 09:29:41.391169 APIC: 00: enabled 1
595 09:29:41.391262 PCI: 00:00.0: enabled 1
596 09:29:41.391356 PCI: 00:02.0: enabled 1
597 09:29:41.391450 PCI: 00:04.0: enabled 0
598 09:29:41.391533 PCI: 00:05.0: enabled 0
599 09:29:41.391596 PCI: 00:12.0: enabled 1
600 09:29:41.391657 PCI: 00:12.5: enabled 0
601 09:29:41.391717 PCI: 00:12.6: enabled 0
602 09:29:41.391777 PCI: 00:14.0: enabled 1
603 09:29:41.391838 PCI: 00:14.1: enabled 0
604 09:29:41.391897 PCI: 00:14.3: enabled 1
605 09:29:41.391957 PCI: 00:14.5: enabled 0
606 09:29:41.392016 PCI: 00:15.0: enabled 1
607 09:29:41.392076 PCI: 00:15.1: enabled 1
608 09:29:41.392136 PCI: 00:15.2: enabled 0
609 09:29:41.392196 PCI: 00:15.3: enabled 0
610 09:29:41.392256 PCI: 00:16.0: enabled 1
611 09:29:41.392316 PCI: 00:16.1: enabled 0
612 09:29:41.392376 PCI: 00:16.2: enabled 0
613 09:29:41.392435 PCI: 00:16.3: enabled 0
614 09:29:41.392494 PCI: 00:16.4: enabled 0
615 09:29:41.392553 PCI: 00:16.5: enabled 0
616 09:29:41.392612 PCI: 00:17.0: enabled 1
617 09:29:41.392672 PCI: 00:19.0: enabled 1
618 09:29:41.392731 PCI: 00:19.1: enabled 0
619 09:29:41.392791 PCI: 00:19.2: enabled 0
620 09:29:41.392851 PCI: 00:1a.0: enabled 0
621 09:29:41.392910 PCI: 00:1c.0: enabled 0
622 09:29:41.392969 PCI: 00:1c.1: enabled 0
623 09:29:41.393028 PCI: 00:1c.2: enabled 0
624 09:29:41.393088 PCI: 00:1c.3: enabled 0
625 09:29:41.393148 PCI: 00:1c.4: enabled 0
626 09:29:41.393207 PCI: 00:1c.5: enabled 0
627 09:29:41.393267 PCI: 00:1c.6: enabled 0
628 09:29:41.393327 PCI: 00:1c.7: enabled 0
629 09:29:41.393387 PCI: 00:1d.0: enabled 1
630 09:29:41.393447 PCI: 00:1d.1: enabled 0
631 09:29:41.393506 PCI: 00:1d.2: enabled 0
632 09:29:41.393566 PCI: 00:1d.3: enabled 0
633 09:29:41.393626 PCI: 00:1d.4: enabled 0
634 09:29:41.393685 PCI: 00:1d.5: enabled 1
635 09:29:41.393745 PCI: 00:1e.0: enabled 1
636 09:29:41.393804 PCI: 00:1e.1: enabled 0
637 09:29:41.393864 PCI: 00:1e.2: enabled 1
638 09:29:41.393923 PCI: 00:1e.3: enabled 1
639 09:29:41.393983 PCI: 00:1f.0: enabled 1
640 09:29:41.394043 PCI: 00:1f.1: enabled 1
641 09:29:41.394102 PCI: 00:1f.2: enabled 1
642 09:29:41.394162 PCI: 00:1f.3: enabled 1
643 09:29:41.394221 PCI: 00:1f.4: enabled 1
644 09:29:41.394281 PCI: 00:1f.5: enabled 1
645 09:29:41.394340 PCI: 00:1f.6: enabled 0
646 09:29:41.394399 USB0 port 0: enabled 1
647 09:29:41.394459 I2C: 00:15: enabled 1
648 09:29:41.394518 I2C: 00:5d: enabled 1
649 09:29:41.394577 GENERIC: 0.0: enabled 1
650 09:29:41.394636 I2C: 00:1a: enabled 1
651 09:29:41.394700 I2C: 00:38: enabled 1
652 09:29:41.394759 I2C: 00:39: enabled 1
653 09:29:41.394819 I2C: 00:3a: enabled 1
654 09:29:41.394878 I2C: 00:3b: enabled 1
655 09:29:41.394938 PCI: 00:00.0: enabled 1
656 09:29:41.395019 SPI: 00: enabled 1
657 09:29:41.395081 SPI: 01: enabled 1
658 09:29:41.395141 PNP: 0c09.0: enabled 1
659 09:29:41.395202 USB2 port 0: enabled 1
660 09:29:41.395262 USB2 port 1: enabled 1
661 09:29:41.395321 USB2 port 2: enabled 0
662 09:29:41.395381 USB2 port 3: enabled 0
663 09:29:41.395450 USB2 port 5: enabled 0
664 09:29:41.395510 USB2 port 6: enabled 1
665 09:29:41.395570 USB2 port 9: enabled 1
666 09:29:41.395630 USB3 port 0: enabled 1
667 09:29:41.395690 USB3 port 1: enabled 1
668 09:29:41.395750 USB3 port 2: enabled 1
669 09:29:41.395810 USB3 port 3: enabled 1
670 09:29:41.395869 USB3 port 4: enabled 0
671 09:29:41.395929 APIC: 01: enabled 1
672 09:29:41.395988 APIC: 05: enabled 1
673 09:29:41.396047 APIC: 04: enabled 1
674 09:29:41.396106 APIC: 06: enabled 1
675 09:29:41.396166 APIC: 07: enabled 1
676 09:29:41.396226 APIC: 03: enabled 1
677 09:29:41.396285 APIC: 02: enabled 1
678 09:29:41.396344 Compare with tree...
679 09:29:41.396404 Root Device: enabled 1
680 09:29:41.396463 CPU_CLUSTER: 0: enabled 1
681 09:29:41.396523 APIC: 00: enabled 1
682 09:29:41.396582 APIC: 01: enabled 1
683 09:29:41.396642 APIC: 05: enabled 1
684 09:29:41.396701 APIC: 04: enabled 1
685 09:29:41.396761 APIC: 06: enabled 1
686 09:29:41.396820 APIC: 07: enabled 1
687 09:29:41.396879 APIC: 03: enabled 1
688 09:29:41.396939 APIC: 02: enabled 1
689 09:29:41.396998 DOMAIN: 0000: enabled 1
690 09:29:41.397058 PCI: 00:00.0: enabled 1
691 09:29:41.397117 PCI: 00:02.0: enabled 1
692 09:29:41.397177 PCI: 00:04.0: enabled 0
693 09:29:41.397237 PCI: 00:05.0: enabled 0
694 09:29:41.397296 PCI: 00:12.0: enabled 1
695 09:29:41.397356 PCI: 00:12.5: enabled 0
696 09:29:41.397415 PCI: 00:12.6: enabled 0
697 09:29:41.397475 PCI: 00:14.0: enabled 1
698 09:29:41.397534 USB0 port 0: enabled 1
699 09:29:41.397594 USB2 port 0: enabled 1
700 09:29:41.397654 USB2 port 1: enabled 1
701 09:29:41.397714 USB2 port 2: enabled 0
702 09:29:41.397773 USB2 port 3: enabled 0
703 09:29:41.397833 USB2 port 5: enabled 0
704 09:29:41.397893 USB2 port 6: enabled 1
705 09:29:41.397953 USB2 port 9: enabled 1
706 09:29:41.398013 USB3 port 0: enabled 1
707 09:29:41.398072 USB3 port 1: enabled 1
708 09:29:41.398132 USB3 port 2: enabled 1
709 09:29:41.398191 USB3 port 3: enabled 1
710 09:29:41.398251 USB3 port 4: enabled 0
711 09:29:41.398314 PCI: 00:14.1: enabled 0
712 09:29:41.398389 PCI: 00:14.3: enabled 1
713 09:29:41.398450 PCI: 00:14.5: enabled 0
714 09:29:41.398509 PCI: 00:15.0: enabled 1
715 09:29:41.398569 I2C: 00:15: enabled 1
716 09:29:41.398628 PCI: 00:15.1: enabled 1
717 09:29:41.398688 I2C: 00:5d: enabled 1
718 09:29:41.398748 GENERIC: 0.0: enabled 1
719 09:29:41.398808 PCI: 00:15.2: enabled 0
720 09:29:41.398868 PCI: 00:15.3: enabled 0
721 09:29:41.398928 PCI: 00:16.0: enabled 1
722 09:29:41.398987 PCI: 00:16.1: enabled 0
723 09:29:41.399047 PCI: 00:16.2: enabled 0
724 09:29:41.399106 PCI: 00:16.3: enabled 0
725 09:29:41.399166 PCI: 00:16.4: enabled 0
726 09:29:41.399226 PCI: 00:16.5: enabled 0
727 09:29:41.399286 PCI: 00:17.0: enabled 1
728 09:29:41.399547 PCI: 00:19.0: enabled 1
729 09:29:41.399616 I2C: 00:1a: enabled 1
730 09:29:41.399678 I2C: 00:38: enabled 1
731 09:29:41.399738 I2C: 00:39: enabled 1
732 09:29:41.399799 I2C: 00:3a: enabled 1
733 09:29:41.399858 I2C: 00:3b: enabled 1
734 09:29:41.399918 PCI: 00:19.1: enabled 0
735 09:29:41.399978 PCI: 00:19.2: enabled 0
736 09:29:41.400038 PCI: 00:1a.0: enabled 0
737 09:29:41.400098 PCI: 00:1c.0: enabled 0
738 09:29:41.400157 PCI: 00:1c.1: enabled 0
739 09:29:41.400217 PCI: 00:1c.2: enabled 0
740 09:29:41.400277 PCI: 00:1c.3: enabled 0
741 09:29:41.400336 PCI: 00:1c.4: enabled 0
742 09:29:41.400395 PCI: 00:1c.5: enabled 0
743 09:29:41.400454 PCI: 00:1c.6: enabled 0
744 09:29:41.400514 PCI: 00:1c.7: enabled 0
745 09:29:41.400573 PCI: 00:1d.0: enabled 1
746 09:29:41.400632 PCI: 00:1d.1: enabled 0
747 09:29:41.400696 PCI: 00:1d.2: enabled 0
748 09:29:41.400756 PCI: 00:1d.3: enabled 0
749 09:29:41.400815 PCI: 00:1d.4: enabled 0
750 09:29:41.400875 PCI: 00:1d.5: enabled 1
751 09:29:41.400934 PCI: 00:00.0: enabled 1
752 09:29:41.400994 PCI: 00:1e.0: enabled 1
753 09:29:41.401053 PCI: 00:1e.1: enabled 0
754 09:29:41.401113 PCI: 00:1e.2: enabled 1
755 09:29:41.401174 SPI: 00: enabled 1
756 09:29:41.401234 PCI: 00:1e.3: enabled 1
757 09:29:41.401293 SPI: 01: enabled 1
758 09:29:41.401353 PCI: 00:1f.0: enabled 1
759 09:29:41.401413 PNP: 0c09.0: enabled 1
760 09:29:41.401473 PCI: 00:1f.1: enabled 1
761 09:29:41.401555 PCI: 00:1f.2: enabled 1
762 09:29:41.401617 PCI: 00:1f.3: enabled 1
763 09:29:41.401677 PCI: 00:1f.4: enabled 1
764 09:29:41.401737 PCI: 00:1f.5: enabled 1
765 09:29:41.401796 PCI: 00:1f.6: enabled 0
766 09:29:41.401855 Root Device scanning...
767 09:29:41.401915 scan_static_bus for Root Device
768 09:29:41.401975 CPU_CLUSTER: 0 enabled
769 09:29:41.402035 DOMAIN: 0000 enabled
770 09:29:41.402095 DOMAIN: 0000 scanning...
771 09:29:41.402155 PCI: pci_scan_bus for bus 00
772 09:29:41.402215 PCI: 00:00.0 [8086/0000] ops
773 09:29:41.402275 PCI: 00:00.0 [8086/9b61] enabled
774 09:29:41.402335 PCI: 00:02.0 [8086/0000] bus ops
775 09:29:41.402395 PCI: 00:02.0 [8086/9b41] enabled
776 09:29:41.402455 PCI: 00:04.0 [8086/1903] disabled
777 09:29:41.402514 PCI: 00:08.0 [8086/1911] enabled
778 09:29:41.402573 PCI: 00:12.0 [8086/02f9] enabled
779 09:29:41.402633 PCI: 00:14.0 [8086/0000] bus ops
780 09:29:41.402693 PCI: 00:14.0 [8086/02ed] enabled
781 09:29:41.402753 PCI: 00:14.2 [8086/02ef] enabled
782 09:29:41.402813 PCI: 00:14.3 [8086/02f0] enabled
783 09:29:41.402873 PCI: 00:15.0 [8086/0000] bus ops
784 09:29:41.402933 PCI: 00:15.0 [8086/02e8] enabled
785 09:29:41.402992 PCI: 00:15.1 [8086/0000] bus ops
786 09:29:41.403051 PCI: 00:15.1 [8086/02e9] enabled
787 09:29:41.403111 PCI: 00:16.0 [8086/0000] ops
788 09:29:41.403171 PCI: 00:16.0 [8086/02e0] enabled
789 09:29:41.403231 PCI: 00:17.0 [8086/0000] ops
790 09:29:41.403291 PCI: 00:17.0 [8086/02d3] enabled
791 09:29:41.403351 PCI: 00:19.0 [8086/0000] bus ops
792 09:29:41.403427 PCI: 00:19.0 [8086/02c5] enabled
793 09:29:41.403491 PCI: 00:1d.0 [8086/0000] bus ops
794 09:29:41.403567 PCI: 00:1d.0 [8086/02b0] enabled
795 09:29:41.403630 PCI: Static device PCI: 00:1d.5 not found, disabling it.
796 09:29:41.403696 PCI: 00:1e.0 [8086/0000] ops
797 09:29:41.403767 PCI: 00:1e.0 [8086/02a8] enabled
798 09:29:41.403830 PCI: 00:1e.2 [8086/0000] bus ops
799 09:29:41.403891 PCI: 00:1e.2 [8086/02aa] enabled
800 09:29:41.403951 PCI: 00:1e.3 [8086/0000] bus ops
801 09:29:41.404012 PCI: 00:1e.3 [8086/02ab] enabled
802 09:29:41.404073 PCI: 00:1f.0 [8086/0000] bus ops
803 09:29:41.404132 PCI: 00:1f.0 [8086/0284] enabled
804 09:29:41.404192 PCI: Static device PCI: 00:1f.1 not found, disabling it.
805 09:29:41.404253 PCI: Static device PCI: 00:1f.2 not found, disabling it.
806 09:29:41.404314 PCI: 00:1f.3 [8086/0000] bus ops
807 09:29:41.404374 PCI: 00:1f.3 [8086/02c8] enabled
808 09:29:41.404433 PCI: 00:1f.4 [8086/0000] bus ops
809 09:29:41.404493 PCI: 00:1f.4 [8086/02a3] enabled
810 09:29:41.404553 PCI: 00:1f.5 [8086/0000] bus ops
811 09:29:41.404612 PCI: 00:1f.5 [8086/02a4] enabled
812 09:29:41.404672 PCI: Leftover static devices:
813 09:29:41.404733 PCI: 00:05.0
814 09:29:41.404793 PCI: 00:12.5
815 09:29:41.404852 PCI: 00:12.6
816 09:29:41.404911 PCI: 00:14.1
817 09:29:41.404971 PCI: 00:14.5
818 09:29:41.405030 PCI: 00:15.2
819 09:29:41.405090 PCI: 00:15.3
820 09:29:41.405149 PCI: 00:16.1
821 09:29:41.405208 PCI: 00:16.2
822 09:29:41.405275 PCI: 00:16.3
823 09:29:41.405345 PCI: 00:16.4
824 09:29:41.405405 PCI: 00:16.5
825 09:29:41.405465 PCI: 00:19.1
826 09:29:41.405524 PCI: 00:19.2
827 09:29:41.405584 PCI: 00:1a.0
828 09:29:41.405644 PCI: 00:1c.0
829 09:29:41.405703 PCI: 00:1c.1
830 09:29:41.405763 PCI: 00:1c.2
831 09:29:41.405822 PCI: 00:1c.3
832 09:29:41.405882 PCI: 00:1c.4
833 09:29:41.405944 PCI: 00:1c.5
834 09:29:41.406004 PCI: 00:1c.6
835 09:29:41.406063 PCI: 00:1c.7
836 09:29:41.406122 PCI: 00:1d.1
837 09:29:41.406181 PCI: 00:1d.2
838 09:29:41.406241 PCI: 00:1d.3
839 09:29:41.406300 PCI: 00:1d.4
840 09:29:41.406359 PCI: 00:1d.5
841 09:29:41.406435 PCI: 00:1e.1
842 09:29:41.406496 PCI: 00:1f.1
843 09:29:41.406562 PCI: 00:1f.2
844 09:29:41.406624 PCI: 00:1f.6
845 09:29:41.406684 PCI: Check your devicetree.cb.
846 09:29:41.406744 PCI: 00:02.0 scanning...
847 09:29:41.406809 scan_generic_bus for PCI: 00:02.0
848 09:29:41.406871 scan_generic_bus for PCI: 00:02.0 done
849 09:29:41.406932 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
850 09:29:41.406993 PCI: 00:14.0 scanning...
851 09:29:41.407075 scan_static_bus for PCI: 00:14.0
852 09:29:41.407169 USB0 port 0 enabled
853 09:29:41.407266 USB0 port 0 scanning...
854 09:29:41.407361 scan_static_bus for USB0 port 0
855 09:29:41.407447 USB2 port 0 enabled
856 09:29:41.407518 USB2 port 1 enabled
857 09:29:41.407582 USB2 port 2 disabled
858 09:29:41.407650 USB2 port 3 disabled
859 09:29:41.407717 USB2 port 5 disabled
860 09:29:41.407786 USB2 port 6 enabled
861 09:29:41.407876 USB2 port 9 enabled
862 09:29:41.407970 USB3 port 0 enabled
863 09:29:41.408063 USB3 port 1 enabled
864 09:29:41.408156 USB3 port 2 enabled
865 09:29:41.408249 USB3 port 3 enabled
866 09:29:41.408349 USB3 port 4 disabled
867 09:29:41.408443 USB2 port 0 scanning...
868 09:29:41.408540 scan_static_bus for USB2 port 0
869 09:29:41.408634 scan_static_bus for USB2 port 0 done
870 09:29:41.408740 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
871 09:29:41.408807 USB2 port 1 scanning...
872 09:29:41.408872 scan_static_bus for USB2 port 1
873 09:29:41.408933 scan_static_bus for USB2 port 1 done
874 09:29:41.409000 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
875 09:29:41.409061 USB2 port 6 scanning...
876 09:29:41.409122 scan_static_bus for USB2 port 6
877 09:29:41.409182 scan_static_bus for USB2 port 6 done
878 09:29:41.409280 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
879 09:29:41.409574 USB2 port 9 scanning...
880 09:29:41.409646 scan_static_bus for USB2 port 9
881 09:29:41.409745 scan_static_bus for USB2 port 9 done
882 09:29:41.409841 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
883 09:29:41.409935 USB3 port 0 scanning...
884 09:29:41.410030 scan_static_bus for USB3 port 0
885 09:29:41.410123 scan_static_bus for USB3 port 0 done
886 09:29:41.410219 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
887 09:29:41.410320 USB3 port 1 scanning...
888 09:29:41.410414 scan_static_bus for USB3 port 1
889 09:29:41.410508 scan_static_bus for USB3 port 1 done
890 09:29:41.410603 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
891 09:29:41.410687 USB3 port 2 scanning...
892 09:29:41.410749 scan_static_bus for USB3 port 2
893 09:29:41.410810 scan_static_bus for USB3 port 2 done
894 09:29:41.410871 scan_bus: scanning of bus USB3 port 2 took 9709 usecs
895 09:29:41.410931 USB3 port 3 scanning...
896 09:29:41.410991 scan_static_bus for USB3 port 3
897 09:29:41.411052 scan_static_bus for USB3 port 3 done
898 09:29:41.411112 scan_bus: scanning of bus USB3 port 3 took 9691 usecs
899 09:29:41.411196 scan_static_bus for USB0 port 0 done
900 09:29:41.411291 scan_bus: scanning of bus USB0 port 0 took 155378 usecs
901 09:29:41.411385 scan_static_bus for PCI: 00:14.0 done
902 09:29:41.411468 scan_bus: scanning of bus PCI: 00:14.0 took 172994 usecs
903 09:29:41.411530 PCI: 00:15.0 scanning...
904 09:29:41.411592 scan_generic_bus for PCI: 00:15.0
905 09:29:41.411663 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
906 09:29:41.411727 scan_generic_bus for PCI: 00:15.0 done
907 09:29:41.411787 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
908 09:29:41.411857 PCI: 00:15.1 scanning...
909 09:29:41.411920 scan_generic_bus for PCI: 00:15.1
910 09:29:41.411981 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
911 09:29:41.412083 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
912 09:29:41.412178 scan_generic_bus for PCI: 00:15.1 done
913 09:29:41.412273 scan_bus: scanning of bus PCI: 00:15.1 took 18601 usecs
914 09:29:41.412367 PCI: 00:19.0 scanning...
915 09:29:41.412465 scan_generic_bus for PCI: 00:19.0
916 09:29:41.412560 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
917 09:29:41.412634 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
918 09:29:41.412696 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
919 09:29:41.412758 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
920 09:29:41.412819 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
921 09:29:41.412886 scan_generic_bus for PCI: 00:19.0 done
922 09:29:41.412947 scan_bus: scanning of bus PCI: 00:19.0 took 30707 usecs
923 09:29:41.413009 PCI: 00:1d.0 scanning...
924 09:29:41.413081 do_pci_scan_bridge for PCI: 00:1d.0
925 09:29:41.413177 PCI: pci_scan_bus for bus 01
926 09:29:41.413271 PCI: 01:00.0 [1c5c/1327] enabled
927 09:29:41.413365 Enabling Common Clock Configuration
928 09:29:41.413466 L1 Sub-State supported from root port 29
929 09:29:41.413563 L1 Sub-State Support = 0xf
930 09:29:41.413657 CommonModeRestoreTime = 0x28
931 09:29:41.413740 Power On Value = 0x16, Power On Scale = 0x0
932 09:29:41.413803 ASPM: Enabled L1
933 09:29:41.413864 scan_bus: scanning of bus PCI: 00:1d.0 took 32772 usecs
934 09:29:41.413924 PCI: 00:1e.2 scanning...
935 09:29:41.413984 scan_generic_bus for PCI: 00:1e.2
936 09:29:41.414044 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
937 09:29:41.414104 scan_generic_bus for PCI: 00:1e.2 done
938 09:29:41.414164 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
939 09:29:41.414225 PCI: 00:1e.3 scanning...
940 09:29:41.414285 scan_generic_bus for PCI: 00:1e.3
941 09:29:41.414344 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
942 09:29:41.414405 scan_generic_bus for PCI: 00:1e.3 done
943 09:29:41.414464 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
944 09:29:41.414525 PCI: 00:1f.0 scanning...
945 09:29:41.414585 scan_static_bus for PCI: 00:1f.0
946 09:29:41.414646 PNP: 0c09.0 enabled
947 09:29:41.414709 scan_static_bus for PCI: 00:1f.0 done
948 09:29:41.414770 scan_bus: scanning of bus PCI: 00:1f.0 took 12045 usecs
949 09:29:41.414835 PCI: 00:1f.3 scanning...
950 09:29:41.414942 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
951 09:29:41.415053 PCI: 00:1f.4 scanning...
952 09:29:41.415152 scan_generic_bus for PCI: 00:1f.4
953 09:29:41.415246 scan_generic_bus for PCI: 00:1f.4 done
954 09:29:41.415350 scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs
955 09:29:41.415460 PCI: 00:1f.5 scanning...
956 09:29:41.415525 scan_generic_bus for PCI: 00:1f.5
957 09:29:41.415603 scan_generic_bus for PCI: 00:1f.5 done
958 09:29:41.415665 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
959 09:29:41.415726 scan_bus: scanning of bus DOMAIN: 0000 took 605003 usecs
960 09:29:41.415788 scan_static_bus for Root Device done
961 09:29:41.415849 scan_bus: scanning of bus Root Device took 624885 usecs
962 09:29:41.415910 done
963 09:29:41.415970 Chrome EC: UHEPI supported
964 09:29:41.416030 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
965 09:29:41.416092 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
966 09:29:41.416152 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
967 09:29:41.416213 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
968 09:29:41.416274 SPI flash protection: WPSW=0 SRP0=0
969 09:29:41.416334 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
970 09:29:41.416407 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
971 09:29:41.416472 found VGA at PCI: 00:02.0
972 09:29:41.416536 Setting up VGA for PCI: 00:02.0
973 09:29:41.416601 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
974 09:29:41.416662 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
975 09:29:41.416723 Allocating resources...
976 09:29:41.416783 Reading resources...
977 09:29:41.416845 Root Device read_resources bus 0 link: 0
978 09:29:41.416911 CPU_CLUSTER: 0 read_resources bus 0 link: 0
979 09:29:41.416971 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
980 09:29:41.417032 DOMAIN: 0000 read_resources bus 0 link: 0
981 09:29:41.417297 PCI: 00:14.0 read_resources bus 0 link: 0
982 09:29:41.417371 USB0 port 0 read_resources bus 0 link: 0
983 09:29:41.417433 USB0 port 0 read_resources bus 0 link: 0 done
984 09:29:41.417495 PCI: 00:14.0 read_resources bus 0 link: 0 done
985 09:29:41.417556 PCI: 00:15.0 read_resources bus 1 link: 0
986 09:29:41.417651 PCI: 00:15.0 read_resources bus 1 link: 0 done
987 09:29:41.417761 PCI: 00:15.1 read_resources bus 2 link: 0
988 09:29:41.417861 PCI: 00:15.1 read_resources bus 2 link: 0 done
989 09:29:41.417956 PCI: 00:19.0 read_resources bus 3 link: 0
990 09:29:41.418050 PCI: 00:19.0 read_resources bus 3 link: 0 done
991 09:29:41.418144 PCI: 00:1d.0 read_resources bus 1 link: 0
992 09:29:41.418239 PCI: 00:1d.0 read_resources bus 1 link: 0 done
993 09:29:41.418335 PCI: 00:1e.2 read_resources bus 4 link: 0
994 09:29:41.418435 PCI: 00:1e.2 read_resources bus 4 link: 0 done
995 09:29:41.418533 PCI: 00:1e.3 read_resources bus 5 link: 0
996 09:29:41.418636 PCI: 00:1e.3 read_resources bus 5 link: 0 done
997 09:29:41.418733 PCI: 00:1f.0 read_resources bus 0 link: 0
998 09:29:41.418831 PCI: 00:1f.0 read_resources bus 0 link: 0 done
999 09:29:41.418925 DOMAIN: 0000 read_resources bus 0 link: 0 done
1000 09:29:41.419020 Root Device read_resources bus 0 link: 0 done
1001 09:29:41.419116 Done reading resources.
1002 09:29:41.419210 Show resources in subtree (Root Device)...After reading.
1003 09:29:41.419307 Root Device child on link 0 CPU_CLUSTER: 0
1004 09:29:41.419402 CPU_CLUSTER: 0 child on link 0 APIC: 00
1005 09:29:41.419475 APIC: 00
1006 09:29:41.419544 APIC: 01
1007 09:29:41.419604 APIC: 05
1008 09:29:41.419664 APIC: 04
1009 09:29:41.419724 APIC: 06
1010 09:29:41.419784 APIC: 07
1011 09:29:41.419843 APIC: 03
1012 09:29:41.419902 APIC: 02
1013 09:29:41.419962 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1014 09:29:41.420023 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1015 09:29:41.420123 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1016 09:29:41.420221 PCI: 00:00.0
1017 09:29:41.420286 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1018 09:29:41.420350 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1019 09:29:41.420412 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1020 09:29:41.420473 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1021 09:29:41.420534 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1022 09:29:41.420595 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1023 09:29:41.420656 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1024 09:29:41.420723 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1025 09:29:41.420794 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1026 09:29:41.420858 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1027 09:29:41.420920 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1028 09:29:41.420982 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1029 09:29:41.421043 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1030 09:29:41.421104 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1031 09:29:41.421165 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1032 09:29:41.421225 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1033 09:29:41.421286 PCI: 00:02.0
1034 09:29:41.421363 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1035 09:29:41.421459 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1036 09:29:41.421558 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1037 09:29:41.421656 PCI: 00:04.0
1038 09:29:41.421756 PCI: 00:08.0
1039 09:29:41.421862 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 09:29:41.421955 PCI: 00:12.0
1041 09:29:41.422052 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 09:29:41.422146 PCI: 00:14.0 child on link 0 USB0 port 0
1043 09:29:41.422240 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1044 09:29:41.422338 USB0 port 0 child on link 0 USB2 port 0
1045 09:29:41.422430 USB2 port 0
1046 09:29:41.422522 USB2 port 1
1047 09:29:41.422591 USB2 port 2
1048 09:29:41.422651 USB2 port 3
1049 09:29:41.422711 USB2 port 5
1050 09:29:41.422773 USB2 port 6
1051 09:29:41.422836 USB2 port 9
1052 09:29:41.422895 USB3 port 0
1053 09:29:41.422954 USB3 port 1
1054 09:29:41.423013 USB3 port 2
1055 09:29:41.423071 USB3 port 3
1056 09:29:41.423130 USB3 port 4
1057 09:29:41.423188 PCI: 00:14.2
1058 09:29:41.423247 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1059 09:29:41.423512 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1060 09:29:41.423610 PCI: 00:14.3
1061 09:29:41.423706 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1062 09:29:41.423805 PCI: 00:15.0 child on link 0 I2C: 01:15
1063 09:29:41.423914 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1064 09:29:41.424009 I2C: 01:15
1065 09:29:41.424101 PCI: 00:15.1 child on link 0 I2C: 02:5d
1066 09:29:41.424196 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1067 09:29:41.424288 I2C: 02:5d
1068 09:29:41.424380 GENERIC: 0.0
1069 09:29:41.424471 PCI: 00:16.0
1070 09:29:41.424570 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1071 09:29:41.424662 PCI: 00:17.0
1072 09:29:41.424756 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1073 09:29:41.424850 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1074 09:29:41.424948 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1075 09:29:41.425033 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1076 09:29:41.425097 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1077 09:29:41.425159 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1078 09:29:41.425219 PCI: 00:19.0 child on link 0 I2C: 03:1a
1079 09:29:41.425279 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1080 09:29:41.425339 I2C: 03:1a
1081 09:29:41.425398 I2C: 03:38
1082 09:29:41.425458 I2C: 03:39
1083 09:29:41.425517 I2C: 03:3a
1084 09:29:41.425576 I2C: 03:3b
1085 09:29:41.425635 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1086 09:29:41.425695 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1087 09:29:41.425762 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1088 09:29:41.425824 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1089 09:29:41.425884 PCI: 01:00.0
1090 09:29:41.425944 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1091 09:29:41.426013 PCI: 00:1e.0
1092 09:29:41.426073 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1093 09:29:41.426135 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1094 09:29:41.426196 PCI: 00:1e.2 child on link 0 SPI: 00
1095 09:29:41.426256 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1096 09:29:41.426316 SPI: 00
1097 09:29:41.426376 PCI: 00:1e.3 child on link 0 SPI: 01
1098 09:29:41.426436 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1099 09:29:41.426496 SPI: 01
1100 09:29:41.426555 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1101 09:29:41.426615 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1102 09:29:41.426675 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1103 09:29:41.426736 PNP: 0c09.0
1104 09:29:41.426795 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1105 09:29:41.426855 PCI: 00:1f.3
1106 09:29:41.426915 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1107 09:29:41.426975 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1108 09:29:41.427034 PCI: 00:1f.4
1109 09:29:41.427093 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1110 09:29:41.427154 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1111 09:29:41.427248 PCI: 00:1f.5
1112 09:29:41.427342 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1113 09:29:41.427436 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1114 09:29:41.427500 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1115 09:29:41.427561 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1116 09:29:41.427621 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1117 09:29:41.427681 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1118 09:29:41.427740 PCI: 00:17.0 18 * [0x60 - 0x67] io
1119 09:29:41.427800 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1120 09:29:41.427859 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1121 09:29:41.427919 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1122 09:29:41.427979 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1123 09:29:41.428039 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1124 09:29:41.428100 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1125 09:29:41.428159 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1126 09:29:41.428417 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1127 09:29:41.428488 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1128 09:29:41.428565 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1129 09:29:41.428629 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1130 09:29:41.428689 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1131 09:29:41.428749 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1132 09:29:41.428809 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1133 09:29:41.428869 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1134 09:29:41.428929 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1135 09:29:41.428988 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1136 09:29:41.429047 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1137 09:29:41.429107 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1138 09:29:41.429165 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1139 09:29:41.429224 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1140 09:29:41.429284 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1141 09:29:41.429343 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1142 09:29:41.429402 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1143 09:29:41.429461 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1144 09:29:41.429521 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1145 09:29:41.429580 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1146 09:29:41.429639 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1147 09:29:41.429698 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1148 09:29:41.429757 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1149 09:29:41.429817 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1150 09:29:41.429876 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1151 09:29:41.429936 avoid_fixed_resources: DOMAIN: 0000
1152 09:29:41.429996 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1153 09:29:41.430055 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1154 09:29:41.430115 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1155 09:29:41.430175 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1156 09:29:41.430234 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1157 09:29:41.430294 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1158 09:29:41.430354 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1159 09:29:41.430413 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1160 09:29:41.430473 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1161 09:29:41.430542 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1162 09:29:41.430650 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1163 09:29:41.430754 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1164 09:29:41.430819 Setting resources...
1165 09:29:41.430881 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1166 09:29:41.430942 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1167 09:29:41.431002 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1168 09:29:41.431062 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1169 09:29:41.431121 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1170 09:29:41.431181 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1171 09:29:41.431241 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1172 09:29:41.431301 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1173 09:29:41.431361 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1174 09:29:41.431435 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1175 09:29:41.431497 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1176 09:29:41.431557 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1177 09:29:41.431617 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1178 09:29:41.431677 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1179 09:29:41.431736 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1180 09:29:41.431798 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1181 09:29:41.431858 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1182 09:29:41.431932 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1183 09:29:41.431996 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1184 09:29:41.432056 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1185 09:29:41.432116 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1186 09:29:41.432176 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1187 09:29:41.432235 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1188 09:29:41.432294 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1189 09:29:41.432354 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1190 09:29:41.432413 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1191 09:29:41.432473 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1192 09:29:41.432532 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1193 09:29:41.432591 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1194 09:29:41.432650 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1195 09:29:41.432710 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1196 09:29:41.432768 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1197 09:29:41.432827 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1198 09:29:41.432887 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1199 09:29:41.433145 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1200 09:29:41.433211 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1201 09:29:41.433272 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1202 09:29:41.433332 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1203 09:29:41.433392 Root Device assign_resources, bus 0 link: 0
1204 09:29:41.433452 DOMAIN: 0000 assign_resources, bus 0 link: 0
1205 09:29:41.433512 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1206 09:29:41.433572 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1207 09:29:41.433632 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1208 09:29:41.433692 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1209 09:29:41.433752 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1210 09:29:41.433812 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1211 09:29:41.433871 PCI: 00:14.0 assign_resources, bus 0 link: 0
1212 09:29:41.433930 PCI: 00:14.0 assign_resources, bus 0 link: 0
1213 09:29:41.433993 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1214 09:29:41.434072 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1215 09:29:41.434133 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1216 09:29:41.434202 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1217 09:29:41.434263 PCI: 00:15.0 assign_resources, bus 1 link: 0
1218 09:29:41.434323 PCI: 00:15.0 assign_resources, bus 1 link: 0
1219 09:29:41.434383 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1220 09:29:41.434443 PCI: 00:15.1 assign_resources, bus 2 link: 0
1221 09:29:41.434503 PCI: 00:15.1 assign_resources, bus 2 link: 0
1222 09:29:41.434563 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1223 09:29:41.434623 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1224 09:29:41.434683 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1225 09:29:41.434743 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1226 09:29:41.434803 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1227 09:29:41.434863 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1228 09:29:41.434922 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1229 09:29:41.434981 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1230 09:29:41.435040 PCI: 00:19.0 assign_resources, bus 3 link: 0
1231 09:29:41.435111 PCI: 00:19.0 assign_resources, bus 3 link: 0
1232 09:29:41.435174 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1233 09:29:41.435234 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1234 09:29:41.435294 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1235 09:29:41.435353 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1236 09:29:41.435458 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1237 09:29:41.435521 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1238 09:29:41.435585 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1239 09:29:41.435688 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1240 09:29:41.435799 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1241 09:29:41.435902 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1242 09:29:41.435969 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1243 09:29:41.436032 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1244 09:29:41.436093 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1245 09:29:41.436153 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1246 09:29:41.436212 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1247 09:29:41.436272 LPC: Trying to open IO window from 800 size 1ff
1248 09:29:41.436331 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1249 09:29:41.436391 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1250 09:29:41.436450 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1251 09:29:41.436510 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1252 09:29:41.436569 DOMAIN: 0000 assign_resources, bus 0 link: 0
1253 09:29:41.436629 Root Device assign_resources, bus 0 link: 0
1254 09:29:41.436689 Done setting resources.
1255 09:29:41.436747 Show resources in subtree (Root Device)...After assigning values.
1256 09:29:41.436807 Root Device child on link 0 CPU_CLUSTER: 0
1257 09:29:41.436867 CPU_CLUSTER: 0 child on link 0 APIC: 00
1258 09:29:41.436928 APIC: 00
1259 09:29:41.436988 APIC: 01
1260 09:29:41.437046 APIC: 05
1261 09:29:41.437104 APIC: 04
1262 09:29:41.437163 APIC: 06
1263 09:29:41.437221 APIC: 07
1264 09:29:41.437280 APIC: 03
1265 09:29:41.437338 APIC: 02
1266 09:29:41.437397 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1267 09:29:41.437654 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1268 09:29:41.437722 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1269 09:29:41.437783 PCI: 00:00.0
1270 09:29:41.437842 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1271 09:29:41.437902 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1272 09:29:41.437962 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1273 09:29:41.438022 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1274 09:29:41.438082 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1275 09:29:41.438147 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1276 09:29:41.438219 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1277 09:29:41.438280 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1278 09:29:41.438340 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1279 09:29:41.438399 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1280 09:29:41.438459 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1281 09:29:41.438518 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1282 09:29:41.438578 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1283 09:29:41.438637 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1284 09:29:41.438697 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1285 09:29:41.438757 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1286 09:29:41.438815 PCI: 00:02.0
1287 09:29:41.438874 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1288 09:29:41.438935 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1289 09:29:41.438995 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1290 09:29:41.439054 PCI: 00:04.0
1291 09:29:41.439112 PCI: 00:08.0
1292 09:29:41.439170 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1293 09:29:41.439230 PCI: 00:12.0
1294 09:29:41.439288 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1295 09:29:41.439347 PCI: 00:14.0 child on link 0 USB0 port 0
1296 09:29:41.439415 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1297 09:29:41.439477 USB0 port 0 child on link 0 USB2 port 0
1298 09:29:41.439535 USB2 port 0
1299 09:29:41.439594 USB2 port 1
1300 09:29:41.439652 USB2 port 2
1301 09:29:41.439711 USB2 port 3
1302 09:29:41.439769 USB2 port 5
1303 09:29:41.439827 USB2 port 6
1304 09:29:41.439886 USB2 port 9
1305 09:29:41.439944 USB3 port 0
1306 09:29:41.440001 USB3 port 1
1307 09:29:41.440059 USB3 port 2
1308 09:29:41.440130 USB3 port 3
1309 09:29:41.440190 USB3 port 4
1310 09:29:41.440248 PCI: 00:14.2
1311 09:29:41.440307 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1312 09:29:41.440367 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1313 09:29:41.440426 PCI: 00:14.3
1314 09:29:41.440485 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1315 09:29:41.440544 PCI: 00:15.0 child on link 0 I2C: 01:15
1316 09:29:41.440603 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1317 09:29:41.440662 I2C: 01:15
1318 09:29:41.440720 PCI: 00:15.1 child on link 0 I2C: 02:5d
1319 09:29:41.440779 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1320 09:29:41.440837 I2C: 02:5d
1321 09:29:41.440895 GENERIC: 0.0
1322 09:29:41.440954 PCI: 00:16.0
1323 09:29:41.441013 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1324 09:29:41.441087 PCI: 00:17.0
1325 09:29:41.441193 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1326 09:29:41.441259 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1327 09:29:41.441320 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1328 09:29:41.441381 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1329 09:29:41.441440 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1330 09:29:41.441698 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1331 09:29:41.441786 PCI: 00:19.0 child on link 0 I2C: 03:1a
1332 09:29:41.441849 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1333 09:29:41.441910 I2C: 03:1a
1334 09:29:41.441981 I2C: 03:38
1335 09:29:41.442042 I2C: 03:39
1336 09:29:41.442100 I2C: 03:3a
1337 09:29:41.442160 I2C: 03:3b
1338 09:29:41.442219 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1339 09:29:41.442278 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1340 09:29:41.442338 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1341 09:29:41.442398 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1342 09:29:41.442457 PCI: 01:00.0
1343 09:29:41.442517 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1344 09:29:41.442576 PCI: 00:1e.0
1345 09:29:41.442635 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1346 09:29:41.442696 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1347 09:29:41.442755 PCI: 00:1e.2 child on link 0 SPI: 00
1348 09:29:41.442814 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1349 09:29:41.442874 SPI: 00
1350 09:29:41.442932 PCI: 00:1e.3 child on link 0 SPI: 01
1351 09:29:41.442992 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1352 09:29:41.443053 SPI: 01
1353 09:29:41.443112 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1354 09:29:41.443171 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1355 09:29:41.443231 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1356 09:29:41.443290 PNP: 0c09.0
1357 09:29:41.443348 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1358 09:29:41.443416 PCI: 00:1f.3
1359 09:29:41.443477 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1360 09:29:41.443536 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1361 09:29:41.443595 PCI: 00:1f.4
1362 09:29:41.443655 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1363 09:29:41.443714 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1364 09:29:41.443773 PCI: 00:1f.5
1365 09:29:41.443832 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1366 09:29:41.443891 Done allocating resources.
1367 09:29:41.443950 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1368 09:29:41.444009 Enabling resources...
1369 09:29:41.444067 PCI: 00:00.0 subsystem <- 8086/9b61
1370 09:29:41.444126 PCI: 00:00.0 cmd <- 06
1371 09:29:41.444184 PCI: 00:02.0 subsystem <- 8086/9b41
1372 09:29:41.444243 PCI: 00:02.0 cmd <- 03
1373 09:29:41.444301 PCI: 00:08.0 cmd <- 06
1374 09:29:41.444359 PCI: 00:12.0 subsystem <- 8086/02f9
1375 09:29:41.444417 PCI: 00:12.0 cmd <- 02
1376 09:29:41.444476 PCI: 00:14.0 subsystem <- 8086/02ed
1377 09:29:41.444535 PCI: 00:14.0 cmd <- 02
1378 09:29:41.444593 PCI: 00:14.2 cmd <- 02
1379 09:29:41.444652 PCI: 00:14.3 subsystem <- 8086/02f0
1380 09:29:41.444710 PCI: 00:14.3 cmd <- 02
1381 09:29:41.444768 PCI: 00:15.0 subsystem <- 8086/02e8
1382 09:29:41.444826 PCI: 00:15.0 cmd <- 02
1383 09:29:41.444885 PCI: 00:15.1 subsystem <- 8086/02e9
1384 09:29:41.444943 PCI: 00:15.1 cmd <- 02
1385 09:29:41.445002 PCI: 00:16.0 subsystem <- 8086/02e0
1386 09:29:41.445061 PCI: 00:16.0 cmd <- 02
1387 09:29:41.445143 PCI: 00:17.0 subsystem <- 8086/02d3
1388 09:29:41.445208 PCI: 00:17.0 cmd <- 03
1389 09:29:41.445270 PCI: 00:19.0 subsystem <- 8086/02c5
1390 09:29:41.445333 PCI: 00:19.0 cmd <- 02
1391 09:29:41.445392 PCI: 00:1d.0 bridge ctrl <- 0013
1392 09:29:41.445451 PCI: 00:1d.0 subsystem <- 8086/02b0
1393 09:29:41.445510 PCI: 00:1d.0 cmd <- 06
1394 09:29:41.445569 PCI: 00:1e.0 subsystem <- 8086/02a8
1395 09:29:41.445628 PCI: 00:1e.0 cmd <- 06
1396 09:29:41.445687 PCI: 00:1e.2 subsystem <- 8086/02aa
1397 09:29:41.445746 PCI: 00:1e.2 cmd <- 06
1398 09:29:41.445805 PCI: 00:1e.3 subsystem <- 8086/02ab
1399 09:29:41.445863 PCI: 00:1e.3 cmd <- 02
1400 09:29:41.445922 PCI: 00:1f.0 subsystem <- 8086/0284
1401 09:29:41.445981 PCI: 00:1f.0 cmd <- 407
1402 09:29:41.446039 PCI: 00:1f.3 subsystem <- 8086/02c8
1403 09:29:41.446098 PCI: 00:1f.3 cmd <- 02
1404 09:29:41.446157 PCI: 00:1f.4 subsystem <- 8086/02a3
1405 09:29:41.446216 PCI: 00:1f.4 cmd <- 03
1406 09:29:41.446274 PCI: 00:1f.5 subsystem <- 8086/02a4
1407 09:29:41.446334 PCI: 00:1f.5 cmd <- 406
1408 09:29:41.446392 PCI: 01:00.0 cmd <- 02
1409 09:29:41.446450 done.
1410 09:29:41.446509 ME: Version: 14.0.39.1367
1411 09:29:41.446567 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1412 09:29:41.446626 Initializing devices...
1413 09:29:41.446695 Root Device init ...
1414 09:29:41.446793 Chrome EC: Set SMI mask to 0x0000000000000000
1415 09:29:41.446904 Chrome EC: clear events_b mask to 0x0000000000000000
1416 09:29:41.450244 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1417 09:29:41.456940 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1418 09:29:41.463574 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1419 09:29:41.466883 Chrome EC: Set WAKE mask to 0x0000000000000000
1420 09:29:41.470148 Root Device init finished in 35184 usecs
1421 09:29:41.473261 CPU_CLUSTER: 0 init ...
1422 09:29:41.479806 CPU_CLUSTER: 0 init finished in 2448 usecs
1423 09:29:41.484550 PCI: 00:00.0 init ...
1424 09:29:41.487280 CPU TDP: 15 Watts
1425 09:29:41.490738 CPU PL2 = 64 Watts
1426 09:29:41.494150 PCI: 00:00.0 init finished in 7081 usecs
1427 09:29:41.497647 PCI: 00:02.0 init ...
1428 09:29:41.501173 PCI: 00:02.0 init finished in 2245 usecs
1429 09:29:41.503902 PCI: 00:08.0 init ...
1430 09:29:41.507190 PCI: 00:08.0 init finished in 2253 usecs
1431 09:29:41.511253 PCI: 00:12.0 init ...
1432 09:29:41.514253 PCI: 00:12.0 init finished in 2252 usecs
1433 09:29:41.517296 PCI: 00:14.0 init ...
1434 09:29:41.520893 PCI: 00:14.0 init finished in 2252 usecs
1435 09:29:41.524206 PCI: 00:14.2 init ...
1436 09:29:41.527511 PCI: 00:14.2 init finished in 2253 usecs
1437 09:29:41.530915 PCI: 00:14.3 init ...
1438 09:29:41.534369 PCI: 00:14.3 init finished in 2270 usecs
1439 09:29:41.537488 PCI: 00:15.0 init ...
1440 09:29:41.541026 DW I2C bus 0 at 0xd121f000 (400 KHz)
1441 09:29:41.543850 PCI: 00:15.0 init finished in 5978 usecs
1442 09:29:41.547480 PCI: 00:15.1 init ...
1443 09:29:41.550899 DW I2C bus 1 at 0xd1220000 (400 KHz)
1444 09:29:41.553736 PCI: 00:15.1 init finished in 5979 usecs
1445 09:29:41.557213 PCI: 00:16.0 init ...
1446 09:29:41.560555 PCI: 00:16.0 init finished in 2252 usecs
1447 09:29:41.564554 PCI: 00:19.0 init ...
1448 09:29:41.568358 DW I2C bus 4 at 0xd1222000 (400 KHz)
1449 09:29:41.571125 PCI: 00:19.0 init finished in 5979 usecs
1450 09:29:41.575133 PCI: 00:1d.0 init ...
1451 09:29:41.578530 Initializing PCH PCIe bridge.
1452 09:29:41.581762 PCI: 00:1d.0 init finished in 5285 usecs
1453 09:29:41.585784 PCI: 00:1f.0 init ...
1454 09:29:41.589369 IOAPIC: Initializing IOAPIC at 0xfec00000
1455 09:29:41.595877 IOAPIC: Bootstrap Processor Local APIC = 0x00
1456 09:29:41.595990 IOAPIC: ID = 0x02
1457 09:29:41.599171 IOAPIC: Dumping registers
1458 09:29:41.602689 reg 0x0000: 0x02000000
1459 09:29:41.606092 reg 0x0001: 0x00770020
1460 09:29:41.606202 reg 0x0002: 0x00000000
1461 09:29:41.612991 PCI: 00:1f.0 init finished in 23555 usecs
1462 09:29:41.616410 PCI: 00:1f.4 init ...
1463 09:29:41.619220 PCI: 00:1f.4 init finished in 2263 usecs
1464 09:29:41.630358 PCI: 01:00.0 init ...
1465 09:29:41.633776 PCI: 01:00.0 init finished in 2252 usecs
1466 09:29:41.637704 PNP: 0c09.0 init ...
1467 09:29:41.641029 Google Chrome EC uptime: 8.161 seconds
1468 09:29:41.647754 Google Chrome AP resets since EC boot: 0
1469 09:29:41.651205 Google Chrome most recent AP reset causes:
1470 09:29:41.658123 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1471 09:29:41.660934 PNP: 0c09.0 init finished in 22060 usecs
1472 09:29:41.664339 Devices initialized
1473 09:29:41.667735 Show all devs... After init.
1474 09:29:41.671359 Root Device: enabled 1
1475 09:29:41.671464 CPU_CLUSTER: 0: enabled 1
1476 09:29:41.674549 DOMAIN: 0000: enabled 1
1477 09:29:41.677873 APIC: 00: enabled 1
1478 09:29:41.680781 PCI: 00:00.0: enabled 1
1479 09:29:41.680865 PCI: 00:02.0: enabled 1
1480 09:29:41.684191 PCI: 00:04.0: enabled 0
1481 09:29:41.688102 PCI: 00:05.0: enabled 0
1482 09:29:41.688185 PCI: 00:12.0: enabled 1
1483 09:29:41.691267 PCI: 00:12.5: enabled 0
1484 09:29:41.694438 PCI: 00:12.6: enabled 0
1485 09:29:41.697677 PCI: 00:14.0: enabled 1
1486 09:29:41.697768 PCI: 00:14.1: enabled 0
1487 09:29:41.701196 PCI: 00:14.3: enabled 1
1488 09:29:41.704755 PCI: 00:14.5: enabled 0
1489 09:29:41.707620 PCI: 00:15.0: enabled 1
1490 09:29:41.707731 PCI: 00:15.1: enabled 1
1491 09:29:41.711038 PCI: 00:15.2: enabled 0
1492 09:29:41.714465 PCI: 00:15.3: enabled 0
1493 09:29:41.717795 PCI: 00:16.0: enabled 1
1494 09:29:41.717879 PCI: 00:16.1: enabled 0
1495 09:29:41.721222 PCI: 00:16.2: enabled 0
1496 09:29:41.723974 PCI: 00:16.3: enabled 0
1497 09:29:41.724089 PCI: 00:16.4: enabled 0
1498 09:29:41.727425 PCI: 00:16.5: enabled 0
1499 09:29:41.730800 PCI: 00:17.0: enabled 1
1500 09:29:41.734029 PCI: 00:19.0: enabled 1
1501 09:29:41.734141 PCI: 00:19.1: enabled 0
1502 09:29:41.737045 PCI: 00:19.2: enabled 0
1503 09:29:41.740921 PCI: 00:1a.0: enabled 0
1504 09:29:41.744205 PCI: 00:1c.0: enabled 0
1505 09:29:41.744296 PCI: 00:1c.1: enabled 0
1506 09:29:41.747659 PCI: 00:1c.2: enabled 0
1507 09:29:41.750904 PCI: 00:1c.3: enabled 0
1508 09:29:41.753621 PCI: 00:1c.4: enabled 0
1509 09:29:41.753734 PCI: 00:1c.5: enabled 0
1510 09:29:41.757099 PCI: 00:1c.6: enabled 0
1511 09:29:41.760510 PCI: 00:1c.7: enabled 0
1512 09:29:41.760617 PCI: 00:1d.0: enabled 1
1513 09:29:41.764044 PCI: 00:1d.1: enabled 0
1514 09:29:41.766798 PCI: 00:1d.2: enabled 0
1515 09:29:41.770673 PCI: 00:1d.3: enabled 0
1516 09:29:41.770753 PCI: 00:1d.4: enabled 0
1517 09:29:41.773979 PCI: 00:1d.5: enabled 0
1518 09:29:41.777474 PCI: 00:1e.0: enabled 1
1519 09:29:41.780228 PCI: 00:1e.1: enabled 0
1520 09:29:41.780304 PCI: 00:1e.2: enabled 1
1521 09:29:41.783718 PCI: 00:1e.3: enabled 1
1522 09:29:41.787181 PCI: 00:1f.0: enabled 1
1523 09:29:41.790395 PCI: 00:1f.1: enabled 0
1524 09:29:41.790503 PCI: 00:1f.2: enabled 0
1525 09:29:41.793560 PCI: 00:1f.3: enabled 1
1526 09:29:41.797296 PCI: 00:1f.4: enabled 1
1527 09:29:41.797382 PCI: 00:1f.5: enabled 1
1528 09:29:41.800568 PCI: 00:1f.6: enabled 0
1529 09:29:41.803788 USB0 port 0: enabled 1
1530 09:29:41.806842 I2C: 01:15: enabled 1
1531 09:29:41.806946 I2C: 02:5d: enabled 1
1532 09:29:41.810029 GENERIC: 0.0: enabled 1
1533 09:29:41.814060 I2C: 03:1a: enabled 1
1534 09:29:41.814172 I2C: 03:38: enabled 1
1535 09:29:41.816789 I2C: 03:39: enabled 1
1536 09:29:41.820209 I2C: 03:3a: enabled 1
1537 09:29:41.820312 I2C: 03:3b: enabled 1
1538 09:29:41.823613 PCI: 00:00.0: enabled 1
1539 09:29:41.827143 SPI: 00: enabled 1
1540 09:29:41.827253 SPI: 01: enabled 1
1541 09:29:41.830395 PNP: 0c09.0: enabled 1
1542 09:29:41.833776 USB2 port 0: enabled 1
1543 09:29:41.833890 USB2 port 1: enabled 1
1544 09:29:41.836607 USB2 port 2: enabled 0
1545 09:29:41.840166 USB2 port 3: enabled 0
1546 09:29:41.843488 USB2 port 5: enabled 0
1547 09:29:41.843600 USB2 port 6: enabled 1
1548 09:29:41.846681 USB2 port 9: enabled 1
1549 09:29:41.849738 USB3 port 0: enabled 1
1550 09:29:41.849851 USB3 port 1: enabled 1
1551 09:29:41.853647 USB3 port 2: enabled 1
1552 09:29:41.856312 USB3 port 3: enabled 1
1553 09:29:41.856396 USB3 port 4: enabled 0
1554 09:29:41.859910 APIC: 01: enabled 1
1555 09:29:41.863298 APIC: 05: enabled 1
1556 09:29:41.863421 APIC: 04: enabled 1
1557 09:29:41.866773 APIC: 06: enabled 1
1558 09:29:41.869544 APIC: 07: enabled 1
1559 09:29:41.869656 APIC: 03: enabled 1
1560 09:29:41.873198 APIC: 02: enabled 1
1561 09:29:41.876574 PCI: 00:08.0: enabled 1
1562 09:29:41.876685 PCI: 00:14.2: enabled 1
1563 09:29:41.880026 PCI: 01:00.0: enabled 1
1564 09:29:41.883544 Disabling ACPI via APMC:
1565 09:29:41.887024 done.
1566 09:29:41.890377 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1567 09:29:41.893191 ELOG: NV offset 0xaf0000 size 0x4000
1568 09:29:41.900758 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1569 09:29:41.907859 ELOG: Event(17) added with size 13 at 2024-05-13 09:28:46 UTC
1570 09:29:41.914465 ELOG: Event(92) added with size 9 at 2024-05-13 09:28:46 UTC
1571 09:29:41.920867 ELOG: Event(93) added with size 9 at 2024-05-13 09:28:46 UTC
1572 09:29:41.927828 ELOG: Event(9E) added with size 10 at 2024-05-13 09:28:46 UTC
1573 09:29:41.934194 ELOG: Event(9F) added with size 14 at 2024-05-13 09:28:46 UTC
1574 09:29:41.937644 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1575 09:29:41.945311 ELOG: Event(A1) added with size 10 at 2024-05-13 09:28:46 UTC
1576 09:29:41.954893 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1577 09:29:41.961970 ELOG: Event(A0) added with size 9 at 2024-05-13 09:28:46 UTC
1578 09:29:41.965139 elog_add_boot_reason: Logged dev mode boot
1579 09:29:41.965277 Finalize devices...
1580 09:29:41.968939 PCI: 00:17.0 final
1581 09:29:41.971645 Devices finalized
1582 09:29:41.975264 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1583 09:29:41.981371 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1584 09:29:41.984811 ME: HFSTS1 : 0x90000245
1585 09:29:41.988231 ME: HFSTS2 : 0x30850126
1586 09:29:41.991620 ME: HFSTS3 : 0x00000020
1587 09:29:41.998445 ME: HFSTS4 : 0x00004800
1588 09:29:42.001863 ME: HFSTS5 : 0x00000000
1589 09:29:42.005209 ME: HFSTS6 : 0x40400006
1590 09:29:42.008560 ME: Manufacturing Mode : NO
1591 09:29:42.011877 ME: FW Partition Table : OK
1592 09:29:42.015111 ME: Bringup Loader Failure : NO
1593 09:29:42.018355 ME: Firmware Init Complete : YES
1594 09:29:42.021773 ME: Boot Options Present : NO
1595 09:29:42.025140 ME: Update In Progress : NO
1596 09:29:42.028449 ME: D0i3 Support : YES
1597 09:29:42.031840 ME: Low Power State Enabled : NO
1598 09:29:42.034467 ME: CPU Replaced : NO
1599 09:29:42.038141 ME: CPU Replacement Valid : YES
1600 09:29:42.041162 ME: Current Working State : 5
1601 09:29:42.044880 ME: Current Operation State : 1
1602 09:29:42.047674 ME: Current Operation Mode : 0
1603 09:29:42.051052 ME: Error Code : 0
1604 09:29:42.054572 ME: CPU Debug Disabled : YES
1605 09:29:42.057988 ME: TXT Support : NO
1606 09:29:42.064799 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1607 09:29:42.071302 ELOG: Event(91) added with size 10 at 2024-05-13 09:28:46 UTC
1608 09:29:42.074459 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1609 09:29:42.077831 CBFS @ c08000 size 3f8000
1610 09:29:42.084651 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1611 09:29:42.087982 CBFS: Locating 'fallback/dsdt.aml'
1612 09:29:42.091380 CBFS: Found @ offset 10bb80 size 3fa5
1613 09:29:42.097639 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1614 09:29:42.097767 CBFS @ c08000 size 3f8000
1615 09:29:42.104563 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1616 09:29:42.107887 CBFS: Locating 'fallback/slic'
1617 09:29:42.112100 CBFS: 'fallback/slic' not found.
1618 09:29:42.118703 ACPI: Writing ACPI tables at 99b3e000.
1619 09:29:42.118795 ACPI: * FACS
1620 09:29:42.121925 ACPI: * DSDT
1621 09:29:42.125082 Ramoops buffer: 0x100000@0x99a3d000.
1622 09:29:42.128941 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1623 09:29:42.135141 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1624 09:29:42.138471 Google Chrome EC: version:
1625 09:29:42.142114 ro: helios_v2.0.2659-56403530b
1626 09:29:42.145251 rw: helios_v2.0.2849-c41de27e7d
1627 09:29:42.145372 running image: 1
1628 09:29:42.149279 ACPI: * FADT
1629 09:29:42.149370 SCI is IRQ9
1630 09:29:42.156163 ACPI: added table 1/32, length now 40
1631 09:29:42.156256 ACPI: * SSDT
1632 09:29:42.159572 Found 1 CPU(s) with 8 core(s) each.
1633 09:29:42.162420 Error: Could not locate 'wifi_sar' in VPD.
1634 09:29:42.169674 Checking CBFS for default SAR values
1635 09:29:42.172414 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1636 09:29:42.175921 CBFS @ c08000 size 3f8000
1637 09:29:42.182434 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1638 09:29:42.185674 CBFS: Locating 'wifi_sar_defaults.hex'
1639 09:29:42.189157 CBFS: Found @ offset 5fac0 size 77
1640 09:29:42.192457 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1641 09:29:42.195737 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1642 09:29:42.202464 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1643 09:29:42.209366 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1644 09:29:42.212149 failed to find key in VPD: dsm_calib_r0_0
1645 09:29:42.219248 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1646 09:29:42.226167 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1647 09:29:42.229296 failed to find key in VPD: dsm_calib_r0_1
1648 09:29:42.239174 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1649 09:29:42.246145 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1650 09:29:42.249443 failed to find key in VPD: dsm_calib_r0_2
1651 09:29:42.256243 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1652 09:29:42.262245 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1653 09:29:42.265744 failed to find key in VPD: dsm_calib_r0_3
1654 09:29:42.275511 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1655 09:29:42.282435 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1656 09:29:42.285814 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1657 09:29:42.289314 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1658 09:29:42.293167 EC returned error result code 1
1659 09:29:42.296691 EC returned error result code 1
1660 09:29:42.299370 EC returned error result code 1
1661 09:29:42.306276 PS2K: Bad resp from EC. Vivaldi disabled!
1662 09:29:42.309646 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1663 09:29:42.316492 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1664 09:29:42.322908 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1665 09:29:42.326396 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1666 09:29:42.334326 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1667 09:29:42.339508 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1668 09:29:42.346300 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1669 09:29:42.349046 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1670 09:29:42.355881 ACPI: added table 2/32, length now 44
1671 09:29:42.355977 ACPI: * MCFG
1672 09:29:42.359379 ACPI: added table 3/32, length now 48
1673 09:29:42.362221 ACPI: * TPM2
1674 09:29:42.366279 TPM2 log created at 99a2d000
1675 09:29:42.369365 ACPI: added table 4/32, length now 52
1676 09:29:42.369456 ACPI: * MADT
1677 09:29:42.372342 SCI is IRQ9
1678 09:29:42.375663 ACPI: added table 5/32, length now 56
1679 09:29:42.375755 current = 99b43ac0
1680 09:29:42.378880 ACPI: * DMAR
1681 09:29:42.382377 ACPI: added table 6/32, length now 60
1682 09:29:42.385875 ACPI: * IGD OpRegion
1683 09:29:42.385970 GMA: Found VBT in CBFS
1684 09:29:42.389210 GMA: Found valid VBT in CBFS
1685 09:29:42.392128 ACPI: added table 7/32, length now 64
1686 09:29:42.395578 ACPI: * HPET
1687 09:29:42.398972 ACPI: added table 8/32, length now 68
1688 09:29:42.399087 ACPI: done.
1689 09:29:42.402280 ACPI tables: 31744 bytes.
1690 09:29:42.406168 smbios_write_tables: 99a2c000
1691 09:29:42.409442 EC returned error result code 3
1692 09:29:42.412121 Couldn't obtain OEM name from CBI
1693 09:29:42.416075 Create SMBIOS type 17
1694 09:29:42.419193 PCI: 00:00.0 (Intel Cannonlake)
1695 09:29:42.422526 PCI: 00:14.3 (Intel WiFi)
1696 09:29:42.426063 SMBIOS tables: 939 bytes.
1697 09:29:42.428790 Writing table forward entry at 0x00000500
1698 09:29:42.435770 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1699 09:29:42.439214 Writing coreboot table at 0x99b62000
1700 09:29:42.445990 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1701 09:29:42.449173 1. 0000000000001000-000000000009ffff: RAM
1702 09:29:42.452394 2. 00000000000a0000-00000000000fffff: RESERVED
1703 09:29:42.459134 3. 0000000000100000-0000000099a2bfff: RAM
1704 09:29:42.461935 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1705 09:29:42.468919 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1706 09:29:42.475640 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1707 09:29:42.478944 7. 000000009a000000-000000009f7fffff: RESERVED
1708 09:29:42.485408 8. 00000000e0000000-00000000efffffff: RESERVED
1709 09:29:42.488843 9. 00000000fc000000-00000000fc000fff: RESERVED
1710 09:29:42.492282 10. 00000000fe000000-00000000fe00ffff: RESERVED
1711 09:29:42.498485 11. 00000000fed10000-00000000fed17fff: RESERVED
1712 09:29:42.502024 12. 00000000fed80000-00000000fed83fff: RESERVED
1713 09:29:42.508931 13. 00000000fed90000-00000000fed91fff: RESERVED
1714 09:29:42.512148 14. 00000000feda0000-00000000feda1fff: RESERVED
1715 09:29:42.515344 15. 0000000100000000-000000045e7fffff: RAM
1716 09:29:42.521711 Graphics framebuffer located at 0xc0000000
1717 09:29:42.524973 Passing 5 GPIOs to payload:
1718 09:29:42.528192 NAME | PORT | POLARITY | VALUE
1719 09:29:42.535106 write protect | undefined | high | low
1720 09:29:42.538314 lid | undefined | high | high
1721 09:29:42.545380 power | undefined | high | low
1722 09:29:42.551725 oprom | undefined | high | low
1723 09:29:42.555189 EC in RW | 0x000000cb | high | low
1724 09:29:42.558522 Board ID: 4
1725 09:29:42.561804 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 09:29:42.564882 CBFS @ c08000 size 3f8000
1727 09:29:42.571421 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 09:29:42.574966 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1729 09:29:42.578345 coreboot table: 1492 bytes.
1730 09:29:42.581869 IMD ROOT 0. 99fff000 00001000
1731 09:29:42.585232 IMD SMALL 1. 99ffe000 00001000
1732 09:29:42.588220 FSP MEMORY 2. 99c4e000 003b0000
1733 09:29:42.591665 CONSOLE 3. 99c2e000 00020000
1734 09:29:42.594821 FMAP 4. 99c2d000 0000054e
1735 09:29:42.598054 TIME STAMP 5. 99c2c000 00000910
1736 09:29:42.601484 VBOOT WORK 6. 99c18000 00014000
1737 09:29:42.604843 MRC DATA 7. 99c16000 00001958
1738 09:29:42.607653 ROMSTG STCK 8. 99c15000 00001000
1739 09:29:42.611246 AFTER CAR 9. 99c0b000 0000a000
1740 09:29:42.614777 RAMSTAGE 10. 99baf000 0005c000
1741 09:29:42.617938 REFCODE 11. 99b7a000 00035000
1742 09:29:42.621145 SMM BACKUP 12. 99b6a000 00010000
1743 09:29:42.624998 COREBOOT 13. 99b62000 00008000
1744 09:29:42.628178 ACPI 14. 99b3e000 00024000
1745 09:29:42.631041 ACPI GNVS 15. 99b3d000 00001000
1746 09:29:42.634570 RAMOOPS 16. 99a3d000 00100000
1747 09:29:42.637981 TPM2 TCGLOG17. 99a2d000 00010000
1748 09:29:42.641395 SMBIOS 18. 99a2c000 00000800
1749 09:29:42.644584 IMD small region:
1750 09:29:42.647592 IMD ROOT 0. 99ffec00 00000400
1751 09:29:42.650880 FSP RUNTIME 1. 99ffebe0 00000004
1752 09:29:42.654385 EC HOSTEVENT 2. 99ffebc0 00000008
1753 09:29:42.657942 POWER STATE 3. 99ffeb80 00000040
1754 09:29:42.661342 ROMSTAGE 4. 99ffeb60 00000004
1755 09:29:42.664835 MEM INFO 5. 99ffe9a0 000001b9
1756 09:29:42.667563 VPD 6. 99ffe920 0000006c
1757 09:29:42.671013 MTRR: Physical address space:
1758 09:29:42.677882 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1759 09:29:42.684382 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1760 09:29:42.691164 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1761 09:29:42.698075 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1762 09:29:42.704080 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1763 09:29:42.707797 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1764 09:29:42.714359 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1765 09:29:42.721187 MTRR: Fixed MSR 0x250 0x0606060606060606
1766 09:29:42.724607 MTRR: Fixed MSR 0x258 0x0606060606060606
1767 09:29:42.728016 MTRR: Fixed MSR 0x259 0x0000000000000000
1768 09:29:42.730910 MTRR: Fixed MSR 0x268 0x0606060606060606
1769 09:29:42.737746 MTRR: Fixed MSR 0x269 0x0606060606060606
1770 09:29:42.741059 MTRR: Fixed MSR 0x26a 0x0606060606060606
1771 09:29:42.744485 MTRR: Fixed MSR 0x26b 0x0606060606060606
1772 09:29:42.747915 MTRR: Fixed MSR 0x26c 0x0606060606060606
1773 09:29:42.751306 MTRR: Fixed MSR 0x26d 0x0606060606060606
1774 09:29:42.757740 MTRR: Fixed MSR 0x26e 0x0606060606060606
1775 09:29:42.760935 MTRR: Fixed MSR 0x26f 0x0606060606060606
1776 09:29:42.764494 call enable_fixed_mtrr()
1777 09:29:42.767246 CPU physical address size: 39 bits
1778 09:29:42.770624 MTRR: default type WB/UC MTRR counts: 6/8.
1779 09:29:42.773930 MTRR: WB selected as default type.
1780 09:29:42.780797 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1781 09:29:42.787141 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1782 09:29:42.793757 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1783 09:29:42.801049 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1784 09:29:42.807343 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1785 09:29:42.813933 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1786 09:29:42.817158 MTRR: Fixed MSR 0x250 0x0606060606060606
1787 09:29:42.820434 MTRR: Fixed MSR 0x258 0x0606060606060606
1788 09:29:42.827115 MTRR: Fixed MSR 0x259 0x0000000000000000
1789 09:29:42.830553 MTRR: Fixed MSR 0x268 0x0606060606060606
1790 09:29:42.834020 MTRR: Fixed MSR 0x269 0x0606060606060606
1791 09:29:42.837374 MTRR: Fixed MSR 0x26a 0x0606060606060606
1792 09:29:42.840811 MTRR: Fixed MSR 0x26b 0x0606060606060606
1793 09:29:42.847124 MTRR: Fixed MSR 0x26c 0x0606060606060606
1794 09:29:42.850840 MTRR: Fixed MSR 0x26d 0x0606060606060606
1795 09:29:42.854201 MTRR: Fixed MSR 0x26e 0x0606060606060606
1796 09:29:42.857065 MTRR: Fixed MSR 0x26f 0x0606060606060606
1797 09:29:42.857177
1798 09:29:42.860446 MTRR check
1799 09:29:42.863728 Fixed MTRRs : Enabled
1800 09:29:42.863840 Variable MTRRs: Enabled
1801 09:29:42.863941
1802 09:29:42.866732 call enable_fixed_mtrr()
1803 09:29:42.873487 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1804 09:29:42.876989 CPU physical address size: 39 bits
1805 09:29:42.880423 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1806 09:29:42.887321 MTRR: Fixed MSR 0x250 0x0606060606060606
1807 09:29:42.890119 MTRR: Fixed MSR 0x250 0x0606060606060606
1808 09:29:42.893506 MTRR: Fixed MSR 0x258 0x0606060606060606
1809 09:29:42.896801 MTRR: Fixed MSR 0x259 0x0000000000000000
1810 09:29:42.903517 MTRR: Fixed MSR 0x268 0x0606060606060606
1811 09:29:42.906804 MTRR: Fixed MSR 0x269 0x0606060606060606
1812 09:29:42.910203 MTRR: Fixed MSR 0x26a 0x0606060606060606
1813 09:29:42.913607 MTRR: Fixed MSR 0x26b 0x0606060606060606
1814 09:29:42.919801 MTRR: Fixed MSR 0x26c 0x0606060606060606
1815 09:29:42.923667 MTRR: Fixed MSR 0x26d 0x0606060606060606
1816 09:29:42.926802 MTRR: Fixed MSR 0x26e 0x0606060606060606
1817 09:29:42.930006 MTRR: Fixed MSR 0x26f 0x0606060606060606
1818 09:29:42.936715 MTRR: Fixed MSR 0x258 0x0606060606060606
1819 09:29:42.936834 call enable_fixed_mtrr()
1820 09:29:42.943656 MTRR: Fixed MSR 0x259 0x0000000000000000
1821 09:29:42.947002 MTRR: Fixed MSR 0x268 0x0606060606060606
1822 09:29:42.950154 MTRR: Fixed MSR 0x269 0x0606060606060606
1823 09:29:42.953292 MTRR: Fixed MSR 0x26a 0x0606060606060606
1824 09:29:42.960186 MTRR: Fixed MSR 0x26b 0x0606060606060606
1825 09:29:42.963422 MTRR: Fixed MSR 0x26c 0x0606060606060606
1826 09:29:42.966803 MTRR: Fixed MSR 0x26d 0x0606060606060606
1827 09:29:42.969972 MTRR: Fixed MSR 0x26e 0x0606060606060606
1828 09:29:42.973224 MTRR: Fixed MSR 0x26f 0x0606060606060606
1829 09:29:42.979962 CPU physical address size: 39 bits
1830 09:29:42.980049 call enable_fixed_mtrr()
1831 09:29:42.986797 MTRR: Fixed MSR 0x250 0x0606060606060606
1832 09:29:42.990297 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 09:29:42.993687 MTRR: Fixed MSR 0x258 0x0606060606060606
1834 09:29:42.996485 MTRR: Fixed MSR 0x259 0x0000000000000000
1835 09:29:43.003178 MTRR: Fixed MSR 0x268 0x0606060606060606
1836 09:29:43.006679 MTRR: Fixed MSR 0x269 0x0606060606060606
1837 09:29:43.009699 MTRR: Fixed MSR 0x26a 0x0606060606060606
1838 09:29:43.013042 MTRR: Fixed MSR 0x26b 0x0606060606060606
1839 09:29:43.020245 MTRR: Fixed MSR 0x26c 0x0606060606060606
1840 09:29:43.022995 MTRR: Fixed MSR 0x26d 0x0606060606060606
1841 09:29:43.026513 MTRR: Fixed MSR 0x26e 0x0606060606060606
1842 09:29:43.029975 MTRR: Fixed MSR 0x26f 0x0606060606060606
1843 09:29:43.036170 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 09:29:43.039995 MTRR: Fixed MSR 0x259 0x0000000000000000
1845 09:29:43.043259 MTRR: Fixed MSR 0x268 0x0606060606060606
1846 09:29:43.046635 MTRR: Fixed MSR 0x269 0x0606060606060606
1847 09:29:43.049413 MTRR: Fixed MSR 0x26a 0x0606060606060606
1848 09:29:43.056326 MTRR: Fixed MSR 0x26b 0x0606060606060606
1849 09:29:43.059723 MTRR: Fixed MSR 0x26c 0x0606060606060606
1850 09:29:43.062911 MTRR: Fixed MSR 0x26d 0x0606060606060606
1851 09:29:43.066276 MTRR: Fixed MSR 0x26e 0x0606060606060606
1852 09:29:43.073005 MTRR: Fixed MSR 0x26f 0x0606060606060606
1853 09:29:43.073149 call enable_fixed_mtrr()
1854 09:29:43.076457 call enable_fixed_mtrr()
1855 09:29:43.079814 CPU physical address size: 39 bits
1856 09:29:43.083325 CPU physical address size: 39 bits
1857 09:29:43.089984 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 09:29:43.093527 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 09:29:43.096343 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 09:29:43.099767 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 09:29:43.103193 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 09:29:43.109989 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 09:29:43.113429 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 09:29:43.116230 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 09:29:43.119574 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 09:29:43.126284 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 09:29:43.129594 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 09:29:43.133107 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 09:29:43.136640 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 09:29:43.142971 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 09:29:43.146352 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 09:29:43.149683 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 09:29:43.152948 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 09:29:43.160047 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 09:29:43.163322 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 09:29:43.166129 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 09:29:43.169534 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 09:29:43.172922 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 09:29:43.176152 call enable_fixed_mtrr()
1880 09:29:43.179428 call enable_fixed_mtrr()
1881 09:29:43.182799 CPU physical address size: 39 bits
1882 09:29:43.186297 CBFS @ c08000 size 3f8000
1883 09:29:43.193144 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1884 09:29:43.196338 CPU physical address size: 39 bits
1885 09:29:43.199972 CPU physical address size: 39 bits
1886 09:29:43.202704 CBFS: Locating 'fallback/payload'
1887 09:29:43.206141 CBFS: Found @ offset 1c96c0 size 3f798
1888 09:29:43.213334 Checking segment from ROM address 0xffdd16f8
1889 09:29:43.216139 Checking segment from ROM address 0xffdd1714
1890 09:29:43.219584 Loading segment from ROM address 0xffdd16f8
1891 09:29:43.223013 code (compression=0)
1892 09:29:43.232855 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1893 09:29:43.239198 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1894 09:29:43.242471 it's not compressed!
1895 09:29:43.334302 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1896 09:29:43.341248 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1897 09:29:43.344620 Loading segment from ROM address 0xffdd1714
1898 09:29:43.347974 Entry Point 0x30000000
1899 09:29:43.350698 Loaded segments
1900 09:29:43.356380 Finalizing chipset.
1901 09:29:43.359935 Finalizing SMM.
1902 09:29:43.363420 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1903 09:29:43.366954 mp_park_aps done after 0 msecs.
1904 09:29:43.373194 Jumping to boot code at 30000000(99b62000)
1905 09:29:43.379944 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1906 09:29:43.380068
1907 09:29:43.380182
1908 09:29:43.380292
1909 09:29:43.383086 Starting depthcharge on Helios...
1910 09:29:43.383200
1911 09:29:43.383569 end: 2.2.3 depthcharge-start (duration 00:00:02) [common]
1912 09:29:43.383701 start: 2.2.4 bootloader-commands (timeout 00:04:49) [common]
1913 09:29:43.383837 Setting prompt string to ['hatch:']
1914 09:29:43.383944 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:49)
1915 09:29:43.393236 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1916 09:29:43.393340
1917 09:29:43.400000 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1918 09:29:43.400109
1919 09:29:43.406432 board_setup: Info: eMMC controller not present; skipping
1920 09:29:43.406527
1921 09:29:43.409262 New NVMe Controller 0x30053ac0 @ 00:1d:00
1922 09:29:43.409357
1923 09:29:43.416022 board_setup: Info: SDHCI controller not present; skipping
1924 09:29:43.416122
1925 09:29:43.419418 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1926 09:29:43.422837
1927 09:29:43.422931 Wipe memory regions:
1928 09:29:43.423044
1929 09:29:43.426228 [0x00000000001000, 0x000000000a0000)
1930 09:29:43.426364
1931 09:29:43.429017 [0x00000000100000, 0x00000030000000)
1932 09:29:43.495484
1933 09:29:43.499173 [0x00000030657430, 0x00000099a2c000)
1934 09:29:43.645959
1935 09:29:43.648726 [0x00000100000000, 0x0000045e800000)
1936 09:29:45.105201
1937 09:29:45.105371 R8152: Initializing
1938 09:29:45.105488
1939 09:29:45.108487 Version 9 (ocp_data = 6010)
1940 09:29:45.112739
1941 09:29:45.112853 R8152: Done initializing
1942 09:29:45.112952
1943 09:29:45.115914 Adding net device
1944 09:29:45.598412
1945 09:29:45.598555 R8152: Initializing
1946 09:29:45.598631
1947 09:29:45.601875 Version 6 (ocp_data = 5c30)
1948 09:29:45.601984
1949 09:29:45.605251 R8152: Done initializing
1950 09:29:45.605369
1951 09:29:45.608660 net_add_device: Attemp to include the same device
1952 09:29:45.612159
1953 09:29:45.619558 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1954 09:29:45.619644
1955 09:29:45.619751
1956 09:29:45.620051 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1958 09:29:45.720433 hatch: tftpboot 192.168.201.1 13757807/tftp-deploy-3twor0dv/kernel/bzImage 13757807/tftp-deploy-3twor0dv/kernel/cmdline 13757807/tftp-deploy-3twor0dv/ramdisk/ramdisk.cpio.gz
1959 09:29:45.720590 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1960 09:29:45.720682 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:47)
1961 09:29:45.725547 tftpboot 192.168.201.1 13757807/tftp-deploy-3twor0dv/kernel/bzImloy-3twor0dv/kernel/cmdline 13757807/tftp-deploy-3twor0dv/ramdisk/ramdisk.cpio.gz
1962 09:29:45.725644
1963 09:29:45.725741 Waiting for link
1964 09:29:45.926121
1965 09:29:45.926257 done.
1966 09:29:45.926330
1967 09:29:45.926397 MAC: 00:24:32:50:1a:59
1968 09:29:45.926462
1969 09:29:45.929025 Sending DHCP discover... done.
1970 09:29:45.929138
1971 09:29:45.932490 Waiting for reply... done.
1972 09:29:45.932574
1973 09:29:45.935704 Sending DHCP request... done.
1974 09:29:45.935787
1975 09:29:45.948652 Waiting for reply... done.
1976 09:29:45.948752
1977 09:29:45.948823 My ip is 192.168.201.14
1978 09:29:45.948891
1979 09:29:45.952056 The DHCP server ip is 192.168.201.1
1980 09:29:45.955524
1981 09:29:45.958874 TFTP server IP predefined by user: 192.168.201.1
1982 09:29:45.958965
1983 09:29:45.965609 Bootfile predefined by user: 13757807/tftp-deploy-3twor0dv/kernel/bzImage
1984 09:29:45.965700
1985 09:29:45.969010 Sending tftp read request... done.
1986 09:29:45.969101
1987 09:29:45.972247 Waiting for the transfer...
1988 09:29:45.975339
1989 09:29:46.531485 00000000 ################################################################
1990 09:29:46.531638
1991 09:29:47.055668 00080000 ################################################################
1992 09:29:47.055842
1993 09:29:47.584755 00100000 ################################################################
1994 09:29:47.584933
1995 09:29:48.106784 00180000 ################################################################
1996 09:29:48.106958
1997 09:29:48.632112 00200000 ################################################################
1998 09:29:48.632289
1999 09:29:49.153013 00280000 ################################################################
2000 09:29:49.153177
2001 09:29:49.673541 00300000 ################################################################
2002 09:29:49.673720
2003 09:29:50.212716 00380000 ################################################################
2004 09:29:50.212863
2005 09:29:50.740522 00400000 ################################################################
2006 09:29:50.740702
2007 09:29:51.278048 00480000 ################################################################
2008 09:29:51.278233
2009 09:29:51.802909 00500000 ################################################################
2010 09:29:51.803080
2011 09:29:52.323883 00580000 ################################################################
2012 09:29:52.324030
2013 09:29:52.847458 00600000 ################################################################
2014 09:29:52.847608
2015 09:29:53.385282 00680000 ################################################################
2016 09:29:53.385468
2017 09:29:53.924307 00700000 ################################################################
2018 09:29:53.924456
2019 09:29:54.529022 00780000 ################################################################
2020 09:29:54.529702
2021 09:29:55.091380 00800000 ################################################################
2022 09:29:55.091534
2023 09:29:55.620549 00880000 ################################################################
2024 09:29:55.620703
2025 09:29:56.143987 00900000 ################################################################
2026 09:29:56.144136
2027 09:29:56.672172 00980000 ################################################################
2028 09:29:56.672338
2029 09:29:57.191044 00a00000 ################################################################
2030 09:29:57.191215
2031 09:29:57.718179 00a80000 ################################################################
2032 09:29:57.718321
2033 09:29:58.274506 00b00000 ################################################################
2034 09:29:58.274666
2035 09:29:58.810433 00b80000 ################################################################
2036 09:29:58.810605
2037 09:29:59.338249 00c00000 ################################################################
2038 09:29:59.338419
2039 09:29:59.882434 00c80000 ################################################################
2040 09:29:59.882575
2041 09:30:00.400909 00d00000 ############################################################ done.
2042 09:30:00.401055
2043 09:30:00.404276 The bootfile was 14122896 bytes long.
2044 09:30:00.404375
2045 09:30:00.407678 Sending tftp read request... done.
2046 09:30:00.407770
2047 09:30:00.410457 Waiting for the transfer...
2048 09:30:00.410548
2049 09:30:00.967903 00000000 ################################################################
2050 09:30:00.968052
2051 09:30:01.499271 00080000 ################################################################
2052 09:30:01.499439
2053 09:30:02.037014 00100000 ################################################################
2054 09:30:02.037155
2055 09:30:02.567601 00180000 ################################################################
2056 09:30:02.567744
2057 09:30:03.103983 00200000 ################################################################
2058 09:30:03.104131
2059 09:30:03.646435 00280000 ################################################################
2060 09:30:03.646613
2061 09:30:04.193800 00300000 ################################################################
2062 09:30:04.193944
2063 09:30:04.741364 00380000 ################################################################
2064 09:30:04.741509
2065 09:30:05.266333 00400000 ################################################################
2066 09:30:05.266511
2067 09:30:05.791889 00480000 ################################################################
2068 09:30:05.792033
2069 09:30:06.308873 00500000 ################################################################
2070 09:30:06.309050
2071 09:30:06.835601 00580000 ################################################################
2072 09:30:06.835754
2073 09:30:07.369138 00600000 ################################################################
2074 09:30:07.369337
2075 09:30:07.888775 00680000 ################################################################
2076 09:30:07.888951
2077 09:30:08.404326 00700000 ################################################################
2078 09:30:08.404496
2079 09:30:08.930248 00780000 ################################################################
2080 09:30:08.930397
2081 09:30:09.447047 00800000 ################################################################
2082 09:30:09.447201
2083 09:30:09.665983 00880000 ############################ done.
2084 09:30:09.666164
2085 09:30:09.669411 Sending tftp read request... done.
2086 09:30:09.669507
2087 09:30:09.672708 Waiting for the transfer...
2088 09:30:09.672803
2089 09:30:09.672875 00000000 # done.
2090 09:30:09.672945
2091 09:30:09.682962 Command line loaded dynamically from TFTP file: 13757807/tftp-deploy-3twor0dv/kernel/cmdline
2092 09:30:09.683083
2093 09:30:09.702414 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2094 09:30:09.702553
2095 09:30:09.709214 ec_init(0): CrosEC protocol v3 supported (256, 256)
2096 09:30:09.713884
2097 09:30:09.717246 Shutting down all USB controllers.
2098 09:30:09.717380
2099 09:30:09.717500 Removing current net device
2100 09:30:09.720791
2101 09:30:09.720936 Finalizing coreboot
2102 09:30:09.721055
2103 09:30:09.728005 Exiting depthcharge with code 4 at timestamp: 33728737
2104 09:30:09.728126
2105 09:30:09.728226
2106 09:30:09.728313 Starting kernel ...
2107 09:30:09.728409
2108 09:30:09.728521
2109 09:30:09.729285 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2110 09:30:09.729441 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2111 09:30:09.729568 Setting prompt string to ['Linux version [0-9]']
2112 09:30:09.729689 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 09:30:09.729809 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2115 09:34:32.730355 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2117 09:34:32.731332 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2119 09:34:32.732224 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2122 09:34:32.733453 end: 2 depthcharge-action (duration 00:05:00) [common]
2124 09:34:32.734512 Cleaning after the job
2125 09:34:32.734929 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/ramdisk
2126 09:34:32.739601 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/kernel
2127 09:34:32.746756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757807/tftp-deploy-3twor0dv/modules
2128 09:34:32.748683 start: 4.1 power-off (timeout 00:00:30) [common]
2129 09:34:32.749450 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-4', '--port=1', '--command=off']
2130 09:34:33.612700 >> Command sent successfully.
2131 09:34:33.615330 Returned 0 in 0 seconds
2132 09:34:33.716080 end: 4.1 power-off (duration 00:00:01) [common]
2134 09:34:33.717451 start: 4.2 read-feedback (timeout 00:09:59) [common]
2135 09:34:33.718584 Listened to connection for namespace 'common' for up to 1s
2137 09:34:33.719871 Listened to connection for namespace 'common' for up to 1s
2138 09:34:34.719088 Finalising connection for namespace 'common'
2139 09:34:34.719252 Disconnecting from shell: Finalise
2140 09:34:34.719335
2141 09:34:34.819823 end: 4.2 read-feedback (duration 00:00:01) [common]
2142 09:34:34.820377 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13757807
2143 09:34:34.864749 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13757807
2144 09:34:34.864927 JobError: Your job cannot terminate cleanly.