Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:44:25.859774 lava-dispatcher, installed at version: 2022.04
2 12:44:25.859969 start: 0 validate
3 12:44:25.860100 Start time: 2022-07-14 12:44:25.860093+00:00 (UTC)
4 12:44:25.860230 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:25.860359 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220708.0%2Fx86%2Frootfs.cpio.gz exists
6 12:44:26.151960 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:26.152132 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:26.441562 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:26.441732 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:44:26.734605 validate duration: 0.87
12 12:44:26.734881 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:44:26.735031 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:44:26.735133 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:44:26.735233 Not decompressing ramdisk as can be used compressed.
16 12:44:26.735321 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220708.0/x86/rootfs.cpio.gz
17 12:44:26.735390 saving as /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/ramdisk/rootfs.cpio.gz
18 12:44:26.735456 total size: 8415743 (8MB)
19 12:44:26.736562 progress 0% (0MB)
20 12:44:26.738638 progress 5% (0MB)
21 12:44:26.740851 progress 10% (0MB)
22 12:44:26.743010 progress 15% (1MB)
23 12:44:26.745107 progress 20% (1MB)
24 12:44:26.747275 progress 25% (2MB)
25 12:44:26.749371 progress 30% (2MB)
26 12:44:26.751373 progress 35% (2MB)
27 12:44:26.753471 progress 40% (3MB)
28 12:44:26.755704 progress 45% (3MB)
29 12:44:26.757784 progress 50% (4MB)
30 12:44:26.759925 progress 55% (4MB)
31 12:44:26.762041 progress 60% (4MB)
32 12:44:26.764004 progress 65% (5MB)
33 12:44:26.766072 progress 70% (5MB)
34 12:44:26.768181 progress 75% (6MB)
35 12:44:26.770250 progress 80% (6MB)
36 12:44:26.772332 progress 85% (6MB)
37 12:44:26.774395 progress 90% (7MB)
38 12:44:26.776341 progress 95% (7MB)
39 12:44:26.778420 progress 100% (8MB)
40 12:44:26.778692 8MB downloaded in 0.04s (185.65MB/s)
41 12:44:26.778848 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:44:26.779158 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:44:26.779249 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:44:26.779338 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:44:26.779449 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:44:26.779519 saving as /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/kernel/bzImage
48 12:44:26.779585 total size: 6811536 (6MB)
49 12:44:26.779648 No compression specified
50 12:44:28.280113 progress 0% (0MB)
51 12:44:28.281931 progress 5% (0MB)
52 12:44:28.283628 progress 10% (0MB)
53 12:44:28.285446 progress 15% (1MB)
54 12:44:28.287119 progress 20% (1MB)
55 12:44:28.288751 progress 25% (1MB)
56 12:44:28.290538 progress 30% (1MB)
57 12:44:28.292221 progress 35% (2MB)
58 12:44:28.294012 progress 40% (2MB)
59 12:44:28.295668 progress 45% (2MB)
60 12:44:28.297273 progress 50% (3MB)
61 12:44:28.299072 progress 55% (3MB)
62 12:44:28.300672 progress 60% (3MB)
63 12:44:28.302427 progress 65% (4MB)
64 12:44:28.304073 progress 70% (4MB)
65 12:44:28.305673 progress 75% (4MB)
66 12:44:28.307461 progress 80% (5MB)
67 12:44:28.309063 progress 85% (5MB)
68 12:44:28.310838 progress 90% (5MB)
69 12:44:28.312472 progress 95% (6MB)
70 12:44:28.314098 progress 100% (6MB)
71 12:44:28.314370 6MB downloaded in 1.53s (4.23MB/s)
72 12:44:28.314525 end: 1.2.1 http-download (duration 00:00:02) [common]
74 12:44:28.314766 end: 1.2 download-retry (duration 00:00:02) [common]
75 12:44:28.314858 start: 1.3 download-retry (timeout 00:09:58) [common]
76 12:44:28.314989 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 12:44:28.315101 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:44:28.315172 saving as /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/modules/modules.tar
79 12:44:28.315235 total size: 51960 (0MB)
80 12:44:28.315298 Using unxz to decompress xz
81 12:44:28.318505 progress 63% (0MB)
82 12:44:28.318884 progress 100% (0MB)
83 12:44:28.322192 0MB downloaded in 0.01s (7.13MB/s)
84 12:44:28.322416 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:44:28.322676 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:44:28.322774 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 12:44:28.322870 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 12:44:28.322999 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:44:28.323090 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 12:44:28.323254 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r
92 12:44:28.323366 makedir: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin
93 12:44:28.323451 makedir: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/tests
94 12:44:28.323538 makedir: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/results
95 12:44:28.323646 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-add-keys
96 12:44:28.323776 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-add-sources
97 12:44:28.323900 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-background-process-start
98 12:44:28.324016 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-background-process-stop
99 12:44:28.324129 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-common-functions
100 12:44:28.324240 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-echo-ipv4
101 12:44:28.324356 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-install-packages
102 12:44:28.324468 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-installed-packages
103 12:44:28.324582 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-os-build
104 12:44:28.324692 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-probe-channel
105 12:44:28.324808 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-probe-ip
106 12:44:28.324917 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-target-ip
107 12:44:28.325029 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-target-mac
108 12:44:28.325138 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-target-storage
109 12:44:28.325253 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-case
110 12:44:28.325364 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-event
111 12:44:28.325474 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-feedback
112 12:44:28.325587 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-raise
113 12:44:28.325700 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-reference
114 12:44:28.325812 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-runner
115 12:44:28.325967 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-set
116 12:44:28.326083 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-test-shell
117 12:44:28.326200 Updating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-install-packages (oe)
118 12:44:28.326316 Updating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/bin/lava-installed-packages (oe)
119 12:44:28.326421 Creating /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/environment
120 12:44:28.326511 LAVA metadata
121 12:44:28.326583 - LAVA_JOB_ID=6819446
122 12:44:28.326655 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:44:28.326757 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 12:44:28.326825 skipped lava-vland-overlay
125 12:44:28.326949 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:44:28.327048 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 12:44:28.327125 skipped lava-multinode-overlay
128 12:44:28.327211 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:44:28.327308 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 12:44:28.327393 Loading test definitions
131 12:44:28.327496 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 12:44:28.327586 Using /lava-6819446 at stage 0
133 12:44:28.327860 uuid=6819446_1.4.2.3.1 testdef=None
134 12:44:28.327954 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:44:28.328049 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 12:44:28.328547 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:44:28.328781 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 12:44:28.329383 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:44:28.329635 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 12:44:28.330223 runner path: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/0/tests/0_dmesg test_uuid 6819446_1.4.2.3.1
143 12:44:28.330383 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:44:28.330625 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 12:44:28.330700 Using /lava-6819446 at stage 1
147 12:44:28.330962 uuid=6819446_1.4.2.3.5 testdef=None
148 12:44:28.331054 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:44:28.331143 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 12:44:28.331599 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:44:28.331830 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 12:44:28.332418 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:44:28.332661 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 12:44:28.333234 runner path: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/1/tests/1_bootrr test_uuid 6819446_1.4.2.3.5
157 12:44:28.333383 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:44:28.333601 Creating lava-test-runner.conf files
160 12:44:28.333675 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/0 for stage 0
161 12:44:28.333758 - 0_dmesg
162 12:44:28.333839 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819446/lava-overlay-kk3qds1r/lava-6819446/1 for stage 1
163 12:44:28.333922 - 1_bootrr
164 12:44:28.334016 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:44:28.334108 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 12:44:28.340338 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:44:28.340449 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 12:44:28.340540 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:44:28.340631 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:44:28.340717 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 12:44:28.523437 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:44:28.523780 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 12:44:28.523892 extracting modules file /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819446/extract-overlay-ramdisk-gz_feyzg/ramdisk
174 12:44:28.528130 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:44:28.528244 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 12:44:28.528334 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819446/compress-overlay-tn9npmhn/overlay-1.4.2.4.tar.gz to ramdisk
177 12:44:28.528408 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819446/compress-overlay-tn9npmhn/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819446/extract-overlay-ramdisk-gz_feyzg/ramdisk
178 12:44:28.532243 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:44:28.532351 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 12:44:28.532449 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:44:28.532543 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 12:44:28.532625 Building ramdisk /var/lib/lava/dispatcher/tmp/6819446/extract-overlay-ramdisk-gz_feyzg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819446/extract-overlay-ramdisk-gz_feyzg/ramdisk
183 12:44:28.596805 >> 48008 blocks
184 12:44:29.352626 rename /var/lib/lava/dispatcher/tmp/6819446/extract-overlay-ramdisk-gz_feyzg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/ramdisk/ramdisk.cpio.gz
185 12:44:29.353042 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:44:29.353167 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 12:44:29.353277 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 12:44:29.353373 No mkimage arch provided, not using FIT.
189 12:44:29.353466 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:44:29.353554 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:44:29.353654 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:44:29.353749 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 12:44:29.353829 No LXC device requested
194 12:44:29.353919 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:44:29.354008 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 12:44:29.354093 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:44:29.354173 Checking files for TFTP limit of 4294967296 bytes.
198 12:44:29.354567 end: 1 tftp-deploy (duration 00:00:03) [common]
199 12:44:29.354681 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:44:29.354776 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:44:29.354933 substitutions:
202 12:44:29.355019 - {DTB}: None
203 12:44:29.355087 - {INITRD}: 6819446/tftp-deploy-_g6m80lu/ramdisk/ramdisk.cpio.gz
204 12:44:29.355153 - {KERNEL}: 6819446/tftp-deploy-_g6m80lu/kernel/bzImage
205 12:44:29.355213 - {LAVA_MAC}: None
206 12:44:29.355273 - {PRESEED_CONFIG}: None
207 12:44:29.355331 - {PRESEED_LOCAL}: None
208 12:44:29.355392 - {RAMDISK}: 6819446/tftp-deploy-_g6m80lu/ramdisk/ramdisk.cpio.gz
209 12:44:29.355450 - {ROOT_PART}: None
210 12:44:29.355506 - {ROOT}: None
211 12:44:29.355562 - {SERVER_IP}: 192.168.201.1
212 12:44:29.355621 - {TEE}: None
213 12:44:29.355677 Parsed boot commands:
214 12:44:29.355732 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:44:29.355890 Parsed boot commands: tftpboot 192.168.201.1 6819446/tftp-deploy-_g6m80lu/kernel/bzImage 6819446/tftp-deploy-_g6m80lu/kernel/cmdline 6819446/tftp-deploy-_g6m80lu/ramdisk/ramdisk.cpio.gz
216 12:44:29.355982 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:44:29.356076 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:44:29.356175 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:44:29.356264 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:44:29.356338 Not connected, no need to disconnect.
221 12:44:29.356418 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:44:29.356506 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:44:29.356574 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
224 12:44:29.359208 Setting prompt string to ['lava-test: # ']
225 12:44:29.359494 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:44:29.359602 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:44:29.359699 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:44:29.359798 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:44:29.359989 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
230 12:44:29.378501 >> Command sent successfully.
231 12:44:29.380382 Returned 0 in 0 seconds
232 12:44:29.481125 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:44:29.481689 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:44:29.481795 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:44:29.481886 Setting prompt string to 'Starting depthcharge on Helios...'
237 12:44:29.481955 Changing prompt to 'Starting depthcharge on Helios...'
238 12:44:29.482022 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 12:44:29.482299 [Enter `^Ec?' for help]
240 12:44:36.237660
241 12:44:36.238298
242 12:44:36.247275 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 12:44:36.250688 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 12:44:36.257144 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 12:44:36.260366 CPU: AES supported, TXT NOT supported, VT supported
246 12:44:36.267169 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 12:44:36.273724 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 12:44:36.276832 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 12:44:36.280036 VBOOT: Loading verstage.
250 12:44:36.286821 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 12:44:36.290071 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 12:44:36.296500 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 12:44:36.299854 CBFS @ c08000 size 3f8000
254 12:44:36.303108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 12:44:36.306280 CBFS: Locating 'fallback/verstage'
256 12:44:36.313003 CBFS: Found @ offset 10fb80 size 1072c
257 12:44:36.313437
258 12:44:36.313785
259 12:44:36.322701 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 12:44:36.338631 Probing TPM: . done!
261 12:44:36.342165 TPM ready after 0 ms
262 12:44:36.345210 Connected to device vid:did:rid of 1ae0:0028:00
263 12:44:36.355746 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 12:44:36.358915 Initialized TPM device CR50 revision 0
265 12:44:36.403727 tlcl_send_startup: Startup return code is 0
266 12:44:36.404230 TPM: setup succeeded
267 12:44:36.416563 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 12:44:36.420320 Chrome EC: UHEPI supported
269 12:44:36.423450 Phase 1
270 12:44:36.426851 FMAP: area GBB found @ c05000 (12288 bytes)
271 12:44:36.433402 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 12:44:36.436727 Phase 2
273 12:44:36.437153 Phase 3
274 12:44:36.439700 FMAP: area GBB found @ c05000 (12288 bytes)
275 12:44:36.446248 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 12:44:36.453089 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 12:44:36.456218 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 12:44:36.462803 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 12:44:36.479008 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 12:44:36.482209 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 12:44:36.488943 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 12:44:36.493197 Phase 4
283 12:44:36.496746 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 12:44:36.503018 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 12:44:36.682383 VB2:vb2_rsa_verify_digest() Digest check failed!
286 12:44:36.689211 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 12:44:36.689639 Saving nvdata
288 12:44:36.692383 Reboot requested (10020007)
289 12:44:36.695506 board_reset() called!
290 12:44:36.695948 full_reset() called!
291 12:44:41.204167
292 12:44:41.204308
293 12:44:41.214122 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 12:44:41.217231 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 12:44:41.223779 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 12:44:41.227155 CPU: AES supported, TXT NOT supported, VT supported
297 12:44:41.233734 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 12:44:41.240332 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 12:44:41.243537 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 12:44:41.247012 VBOOT: Loading verstage.
301 12:44:41.253197 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 12:44:41.256521 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 12:44:41.263117 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 12:44:41.266553 CBFS @ c08000 size 3f8000
305 12:44:41.269772 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 12:44:41.272904 CBFS: Locating 'fallback/verstage'
307 12:44:41.279572 CBFS: Found @ offset 10fb80 size 1072c
308 12:44:41.279658
309 12:44:41.279726
310 12:44:41.289232 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 12:44:41.305206 Probing TPM: . done!
312 12:44:41.308616 TPM ready after 0 ms
313 12:44:41.311831 Connected to device vid:did:rid of 1ae0:0028:00
314 12:44:41.322163 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 12:44:41.325439 Initialized TPM device CR50 revision 0
316 12:44:41.370020 tlcl_send_startup: Startup return code is 0
317 12:44:41.370139 TPM: setup succeeded
318 12:44:41.382707 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 12:44:41.386731 Chrome EC: UHEPI supported
320 12:44:41.389851 Phase 1
321 12:44:41.393398 FMAP: area GBB found @ c05000 (12288 bytes)
322 12:44:41.400049 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 12:44:41.406569 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 12:44:41.409693 Recovery requested (1009000e)
325 12:44:41.415590 Saving nvdata
326 12:44:41.421769 tlcl_extend: response is 0
327 12:44:41.430402 tlcl_extend: response is 0
328 12:44:41.437484 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 12:44:41.440547 CBFS @ c08000 size 3f8000
330 12:44:41.446968 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 12:44:41.450442 CBFS: Locating 'fallback/romstage'
332 12:44:41.453696 CBFS: Found @ offset 80 size 145fc
333 12:44:41.456875 Accumulated console time in verstage 98 ms
334 12:44:41.456959
335 12:44:41.460195
336 12:44:41.469990 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 12:44:41.476531 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 12:44:41.480031 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 12:44:41.483225 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 12:44:41.489910 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 12:44:41.493142 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 12:44:41.496429 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 12:44:41.499637 TCO_STS: 0000 0000
344 12:44:41.503157 GEN_PMCON: e0015238 00000200
345 12:44:41.506369 GBLRST_CAUSE: 00000000 00000000
346 12:44:41.506453 prev_sleep_state 5
347 12:44:41.510387 Boot Count incremented to 25945
348 12:44:41.517144 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 12:44:41.520470 CBFS @ c08000 size 3f8000
350 12:44:41.526938 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 12:44:41.527037 CBFS: Locating 'fspm.bin'
352 12:44:41.533262 CBFS: Found @ offset 5ffc0 size 71000
353 12:44:41.536803 Chrome EC: UHEPI supported
354 12:44:41.543093 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 12:44:41.546814 Probing TPM: done!
356 12:44:41.553766 Connected to device vid:did:rid of 1ae0:0028:00
357 12:44:41.563655 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 12:44:41.570301 Initialized TPM device CR50 revision 0
359 12:44:41.579520 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 12:44:41.589569 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 12:44:41.589662 MRC cache found, size 1948
362 12:44:41.592756 bootmode is set to: 2
363 12:44:41.596059 PRMRR disabled by config.
364 12:44:41.599439 SPD INDEX = 1
365 12:44:41.602618 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 12:44:41.605814 CBFS @ c08000 size 3f8000
367 12:44:41.612570 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 12:44:41.612657 CBFS: Locating 'spd.bin'
369 12:44:41.615794 CBFS: Found @ offset 5fb80 size 400
370 12:44:41.619489 SPD: module type is LPDDR3
371 12:44:41.622790 SPD: module part is
372 12:44:41.629153 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 12:44:41.632755 SPD: device width 4 bits, bus width 8 bits
374 12:44:41.635936 SPD: module size is 4096 MB (per channel)
375 12:44:41.639061 memory slot: 0 configuration done.
376 12:44:41.645370 memory slot: 2 configuration done.
377 12:44:41.694582 CBMEM:
378 12:44:41.697737 IMD: root @ 99fff000 254 entries.
379 12:44:41.701262 IMD: root @ 99ffec00 62 entries.
380 12:44:41.704535 External stage cache:
381 12:44:41.707674 IMD: root @ 9abff000 254 entries.
382 12:44:41.710871 IMD: root @ 9abfec00 62 entries.
383 12:44:41.717696 Chrome EC: clear events_b mask to 0x0000000020004000
384 12:44:41.731503 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 12:44:41.746477 tlcl_write: response is 0
386 12:44:41.754890 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 12:44:41.761513 MRC: TPM MRC hash updated successfully.
388 12:44:41.761606 2 DIMMs found
389 12:44:41.764657 SMM Memory Map
390 12:44:41.767914 SMRAM : 0x9a000000 0x1000000
391 12:44:41.771403 Subregion 0: 0x9a000000 0xa00000
392 12:44:41.774661 Subregion 1: 0x9aa00000 0x200000
393 12:44:41.778083 Subregion 2: 0x9ac00000 0x400000
394 12:44:41.781493 top_of_ram = 0x9a000000
395 12:44:41.784610 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 12:44:41.791102 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 12:44:41.794445 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 12:44:41.800961 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 12:44:41.804215 CBFS @ c08000 size 3f8000
400 12:44:41.807434 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 12:44:41.814253 CBFS: Locating 'fallback/postcar'
402 12:44:41.817245 CBFS: Found @ offset 107000 size 4b44
403 12:44:41.823746 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 12:44:41.833819 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 12:44:41.837097 Processing 180 relocs. Offset value of 0x97c0c000
406 12:44:41.845177 Accumulated console time in romstage 286 ms
407 12:44:41.845265
408 12:44:41.845335
409 12:44:41.854802 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 12:44:41.861692 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 12:44:41.864944 CBFS @ c08000 size 3f8000
412 12:44:41.871373 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 12:44:41.874587 CBFS: Locating 'fallback/ramstage'
414 12:44:41.877879 CBFS: Found @ offset 43380 size 1b9e8
415 12:44:41.884656 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 12:44:41.916825 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 12:44:41.920023 Processing 3976 relocs. Offset value of 0x98db0000
418 12:44:41.926873 Accumulated console time in postcar 52 ms
419 12:44:41.927001
420 12:44:41.927071
421 12:44:41.936639 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 12:44:41.943350 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 12:44:41.946629 WARNING: RO_VPD is uninitialized or empty.
424 12:44:41.949975 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 12:44:41.956249 WARNING: RW_VPD is uninitialized or empty.
426 12:44:41.956335 Normal boot.
427 12:44:41.963007 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 12:44:41.966198 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 12:44:41.969369 CBFS @ c08000 size 3f8000
430 12:44:41.975956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 12:44:41.979395 CBFS: Locating 'cpu_microcode_blob.bin'
432 12:44:41.982820 CBFS: Found @ offset 14700 size 2ec00
433 12:44:41.985882 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 12:44:41.989262 Skip microcode update
435 12:44:41.996009 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 12:44:41.996101 CBFS @ c08000 size 3f8000
437 12:44:42.002490 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 12:44:42.005800 CBFS: Locating 'fsps.bin'
439 12:44:42.008965 CBFS: Found @ offset d1fc0 size 35000
440 12:44:42.034750 Detected 4 core, 8 thread CPU.
441 12:44:42.037996 Setting up SMI for CPU
442 12:44:42.041330 IED base = 0x9ac00000
443 12:44:42.044678 IED size = 0x00400000
444 12:44:42.044764 Will perform SMM setup.
445 12:44:42.051156 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 12:44:42.057514 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 12:44:42.064288 Processing 16 relocs. Offset value of 0x00030000
448 12:44:42.067435 Attempting to start 7 APs
449 12:44:42.070774 Waiting for 10ms after sending INIT.
450 12:44:42.084686 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
451 12:44:42.084811 done.
452 12:44:42.087976 AP: slot 3 apic_id 3.
453 12:44:42.091113 AP: slot 1 apic_id 2.
454 12:44:42.094526 Waiting for 2nd SIPI to complete...done.
455 12:44:42.097577 AP: slot 6 apic_id 7.
456 12:44:42.097661 AP: slot 7 apic_id 6.
457 12:44:42.100855 AP: slot 4 apic_id 4.
458 12:44:42.104136 AP: slot 5 apic_id 5.
459 12:44:42.111134 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 12:44:42.117519 Processing 13 relocs. Offset value of 0x00038000
461 12:44:42.124027 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 12:44:42.127638 Installing SMM handler to 0x9a000000
463 12:44:42.133853 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 12:44:42.140547 Processing 658 relocs. Offset value of 0x9a010000
465 12:44:42.147035 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 12:44:42.150581 Processing 13 relocs. Offset value of 0x9a008000
467 12:44:42.157091 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 12:44:42.163511 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 12:44:42.170086 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 12:44:42.173475 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 12:44:42.180135 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 12:44:42.186737 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 12:44:42.193532 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 12:44:42.199784 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 12:44:42.203297 Clearing SMI status registers
476 12:44:42.203381 SMI_STS: PM1
477 12:44:42.206626 PM1_STS: PWRBTN
478 12:44:42.206710 TCO_STS: SECOND_TO
479 12:44:42.209923 New SMBASE 0x9a000000
480 12:44:42.213219 In relocation handler: CPU 0
481 12:44:42.216523 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 12:44:42.222840 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 12:44:42.222961 Relocation complete.
484 12:44:42.226524 New SMBASE 0x99fff800
485 12:44:42.229535 In relocation handler: CPU 2
486 12:44:42.232910 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 12:44:42.239434 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 12:44:42.239531 Relocation complete.
489 12:44:42.242806 New SMBASE 0x99fff400
490 12:44:42.246086 In relocation handler: CPU 3
491 12:44:42.249251 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
492 12:44:42.252443 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 12:44:42.255763 Relocation complete.
494 12:44:42.259241 New SMBASE 0x99fffc00
495 12:44:42.262402 In relocation handler: CPU 1
496 12:44:42.265769 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
497 12:44:42.269151 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 12:44:42.272371 Relocation complete.
499 12:44:42.275415 New SMBASE 0x99fff000
500 12:44:42.278888 In relocation handler: CPU 4
501 12:44:42.281975 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
502 12:44:42.285241 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 12:44:42.288685 Relocation complete.
504 12:44:42.291835 New SMBASE 0x99ffe400
505 12:44:42.295207 In relocation handler: CPU 7
506 12:44:42.298746 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
507 12:44:42.301744 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 12:44:42.304926 Relocation complete.
509 12:44:42.308470 New SMBASE 0x99ffe800
510 12:44:42.311667 In relocation handler: CPU 6
511 12:44:42.314888 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
512 12:44:42.318167 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 12:44:42.321283 Relocation complete.
514 12:44:42.324505 New SMBASE 0x99ffec00
515 12:44:42.328088 In relocation handler: CPU 5
516 12:44:42.331176 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
517 12:44:42.334578 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 12:44:42.337928 Relocation complete.
519 12:44:42.340972 Initializing CPU #0
520 12:44:42.344561 CPU: vendor Intel device 806ec
521 12:44:42.347532 CPU: family 06, model 8e, stepping 0c
522 12:44:42.351066 Clearing out pending MCEs
523 12:44:42.351149 Setting up local APIC...
524 12:44:42.354099 apic_id: 0x00 done.
525 12:44:42.357452 Turbo is available but hidden
526 12:44:42.360928 Turbo is available and visible
527 12:44:42.364290 VMX status: enabled
528 12:44:42.367616 IA32_FEATURE_CONTROL status: locked
529 12:44:42.367693 Skip microcode update
530 12:44:42.370545 CPU #0 initialized
531 12:44:42.373814 Initializing CPU #2
532 12:44:42.373891 Initializing CPU #6
533 12:44:42.377281 Initializing CPU #7
534 12:44:42.380590 CPU: vendor Intel device 806ec
535 12:44:42.383638 CPU: family 06, model 8e, stepping 0c
536 12:44:42.387011 Initializing CPU #5
537 12:44:42.387106 Initializing CPU #4
538 12:44:42.390424 CPU: vendor Intel device 806ec
539 12:44:42.393742 CPU: family 06, model 8e, stepping 0c
540 12:44:42.396755 CPU: vendor Intel device 806ec
541 12:44:42.400100 CPU: family 06, model 8e, stepping 0c
542 12:44:42.403460 Clearing out pending MCEs
543 12:44:42.407034 Clearing out pending MCEs
544 12:44:42.410117 CPU: vendor Intel device 806ec
545 12:44:42.413404 CPU: family 06, model 8e, stepping 0c
546 12:44:42.416847 Clearing out pending MCEs
547 12:44:42.420153 Setting up local APIC...
548 12:44:42.420254 Initializing CPU #1
549 12:44:42.423548 Initializing CPU #3
550 12:44:42.426835 CPU: vendor Intel device 806ec
551 12:44:42.429807 CPU: family 06, model 8e, stepping 0c
552 12:44:42.433267 CPU: vendor Intel device 806ec
553 12:44:42.436551 CPU: family 06, model 8e, stepping 0c
554 12:44:42.439922 Clearing out pending MCEs
555 12:44:42.443024 Clearing out pending MCEs
556 12:44:42.446719 Setting up local APIC...
557 12:44:42.446796 Setting up local APIC...
558 12:44:42.449698 CPU: vendor Intel device 806ec
559 12:44:42.453242 CPU: family 06, model 8e, stepping 0c
560 12:44:42.456402 Clearing out pending MCEs
561 12:44:42.459791 Clearing out pending MCEs
562 12:44:42.462839 Setting up local APIC...
563 12:44:42.466156 Setting up local APIC...
564 12:44:42.466244 Setting up local APIC...
565 12:44:42.469494 apic_id: 0x04 done.
566 12:44:42.472948 apic_id: 0x05 done.
567 12:44:42.473021 VMX status: enabled
568 12:44:42.475916 VMX status: enabled
569 12:44:42.479288 IA32_FEATURE_CONTROL status: locked
570 12:44:42.482694 IA32_FEATURE_CONTROL status: locked
571 12:44:42.486039 Skip microcode update
572 12:44:42.486120 Skip microcode update
573 12:44:42.489349 CPU #4 initialized
574 12:44:42.492479 CPU #5 initialized
575 12:44:42.492556 Setting up local APIC...
576 12:44:42.495843 apic_id: 0x07 done.
577 12:44:42.499163 apic_id: 0x06 done.
578 12:44:42.499274 VMX status: enabled
579 12:44:42.502509 VMX status: enabled
580 12:44:42.505820 IA32_FEATURE_CONTROL status: locked
581 12:44:42.509208 IA32_FEATURE_CONTROL status: locked
582 12:44:42.512316 apic_id: 0x01 done.
583 12:44:42.512394 apic_id: 0x03 done.
584 12:44:42.515512 apic_id: 0x02 done.
585 12:44:42.518761 VMX status: enabled
586 12:44:42.518840 VMX status: enabled
587 12:44:42.522365 IA32_FEATURE_CONTROL status: locked
588 12:44:42.525472 IA32_FEATURE_CONTROL status: locked
589 12:44:42.528990 Skip microcode update
590 12:44:42.532054 Skip microcode update
591 12:44:42.532138 CPU #3 initialized
592 12:44:42.535418 CPU #1 initialized
593 12:44:42.538694 VMX status: enabled
594 12:44:42.538776 Skip microcode update
595 12:44:42.541927 Skip microcode update
596 12:44:42.545261 CPU #7 initialized
597 12:44:42.545344 CPU #6 initialized
598 12:44:42.548524 IA32_FEATURE_CONTROL status: locked
599 12:44:42.552001 Skip microcode update
600 12:44:42.555107 CPU #2 initialized
601 12:44:42.558567 bsp_do_flight_plan done after 461 msecs.
602 12:44:42.561884 CPU: frequency set to 4200 MHz
603 12:44:42.561970 Enabling SMIs.
604 12:44:42.564899 Locking SMM.
605 12:44:42.578567 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 12:44:42.581831 CBFS @ c08000 size 3f8000
607 12:44:42.588329 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 12:44:42.588415 CBFS: Locating 'vbt.bin'
609 12:44:42.595008 CBFS: Found @ offset 5f5c0 size 499
610 12:44:42.598198 Found a VBT of 4608 bytes after decompression
611 12:44:42.782584 Display FSP Version Info HOB
612 12:44:42.785819 Reference Code - CPU = 9.0.1e.30
613 12:44:42.789056 uCode Version = 0.0.0.ca
614 12:44:42.792422 TXT ACM version = ff.ff.ff.ffff
615 12:44:42.795306 Display FSP Version Info HOB
616 12:44:42.798940 Reference Code - ME = 9.0.1e.30
617 12:44:42.801865 MEBx version = 0.0.0.0
618 12:44:42.805180 ME Firmware Version = Consumer SKU
619 12:44:42.808559 Display FSP Version Info HOB
620 12:44:42.812015 Reference Code - CML PCH = 9.0.1e.30
621 12:44:42.815012 PCH-CRID Status = Disabled
622 12:44:42.818519 PCH-CRID Original Value = ff.ff.ff.ffff
623 12:44:42.821645 PCH-CRID New Value = ff.ff.ff.ffff
624 12:44:42.825045 OPROM - RST - RAID = ff.ff.ff.ffff
625 12:44:42.828295 ChipsetInit Base Version = ff.ff.ff.ffff
626 12:44:42.834600 ChipsetInit Oem Version = ff.ff.ff.ffff
627 12:44:42.834690 Display FSP Version Info HOB
628 12:44:42.841138 Reference Code - SA - System Agent = 9.0.1e.30
629 12:44:42.844457 Reference Code - MRC = 0.7.1.6c
630 12:44:42.847725 SA - PCIe Version = 9.0.1e.30
631 12:44:42.850814 SA-CRID Status = Disabled
632 12:44:42.854044 SA-CRID Original Value = 0.0.0.c
633 12:44:42.854128 SA-CRID New Value = 0.0.0.c
634 12:44:42.857666 OPROM - VBIOS = ff.ff.ff.ffff
635 12:44:42.861248 RTC Init
636 12:44:42.864337 Set power on after power failure.
637 12:44:42.864434 Disabling Deep S3
638 12:44:42.867771 Disabling Deep S3
639 12:44:42.871118 Disabling Deep S4
640 12:44:42.871227 Disabling Deep S4
641 12:44:42.874196 Disabling Deep S5
642 12:44:42.874280 Disabling Deep S5
643 12:44:42.881052 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
644 12:44:42.883993 Enumerating buses...
645 12:44:42.887309 Show all devs... Before device enumeration.
646 12:44:42.890759 Root Device: enabled 1
647 12:44:42.893746 CPU_CLUSTER: 0: enabled 1
648 12:44:42.893832 DOMAIN: 0000: enabled 1
649 12:44:42.897066 APIC: 00: enabled 1
650 12:44:42.900420 PCI: 00:00.0: enabled 1
651 12:44:42.900504 PCI: 00:02.0: enabled 1
652 12:44:42.903768 PCI: 00:04.0: enabled 0
653 12:44:42.907063 PCI: 00:05.0: enabled 0
654 12:44:42.910160 PCI: 00:12.0: enabled 1
655 12:44:42.910273 PCI: 00:12.5: enabled 0
656 12:44:42.913421 PCI: 00:12.6: enabled 0
657 12:44:42.916711 PCI: 00:14.0: enabled 1
658 12:44:42.920083 PCI: 00:14.1: enabled 0
659 12:44:42.920166 PCI: 00:14.3: enabled 1
660 12:44:42.923337 PCI: 00:14.5: enabled 0
661 12:44:42.926631 PCI: 00:15.0: enabled 1
662 12:44:42.929747 PCI: 00:15.1: enabled 1
663 12:44:42.929838 PCI: 00:15.2: enabled 0
664 12:44:42.933112 PCI: 00:15.3: enabled 0
665 12:44:42.936370 PCI: 00:16.0: enabled 1
666 12:44:42.939640 PCI: 00:16.1: enabled 0
667 12:44:42.939724 PCI: 00:16.2: enabled 0
668 12:44:42.942774 PCI: 00:16.3: enabled 0
669 12:44:42.946072 PCI: 00:16.4: enabled 0
670 12:44:42.949266 PCI: 00:16.5: enabled 0
671 12:44:42.949350 PCI: 00:17.0: enabled 1
672 12:44:42.952743 PCI: 00:19.0: enabled 1
673 12:44:42.956132 PCI: 00:19.1: enabled 0
674 12:44:42.959274 PCI: 00:19.2: enabled 0
675 12:44:42.959360 PCI: 00:1a.0: enabled 0
676 12:44:42.962602 PCI: 00:1c.0: enabled 0
677 12:44:42.965882 PCI: 00:1c.1: enabled 0
678 12:44:42.969212 PCI: 00:1c.2: enabled 0
679 12:44:42.969297 PCI: 00:1c.3: enabled 0
680 12:44:42.972270 PCI: 00:1c.4: enabled 0
681 12:44:42.975433 PCI: 00:1c.5: enabled 0
682 12:44:42.978777 PCI: 00:1c.6: enabled 0
683 12:44:42.978861 PCI: 00:1c.7: enabled 0
684 12:44:42.982227 PCI: 00:1d.0: enabled 1
685 12:44:42.985405 PCI: 00:1d.1: enabled 0
686 12:44:42.988531 PCI: 00:1d.2: enabled 0
687 12:44:42.988615 PCI: 00:1d.3: enabled 0
688 12:44:42.991778 PCI: 00:1d.4: enabled 0
689 12:44:42.995047 PCI: 00:1d.5: enabled 1
690 12:44:42.998205 PCI: 00:1e.0: enabled 1
691 12:44:42.998288 PCI: 00:1e.1: enabled 0
692 12:44:43.001451 PCI: 00:1e.2: enabled 1
693 12:44:43.004916 PCI: 00:1e.3: enabled 1
694 12:44:43.008171 PCI: 00:1f.0: enabled 1
695 12:44:43.008255 PCI: 00:1f.1: enabled 1
696 12:44:43.011558 PCI: 00:1f.2: enabled 1
697 12:44:43.014682 PCI: 00:1f.3: enabled 1
698 12:44:43.017939 PCI: 00:1f.4: enabled 1
699 12:44:43.018026 PCI: 00:1f.5: enabled 1
700 12:44:43.021060 PCI: 00:1f.6: enabled 0
701 12:44:43.024579 USB0 port 0: enabled 1
702 12:44:43.024707 I2C: 00:15: enabled 1
703 12:44:43.027783 I2C: 00:5d: enabled 1
704 12:44:43.031055 GENERIC: 0.0: enabled 1
705 12:44:43.034074 I2C: 00:1a: enabled 1
706 12:44:43.034171 I2C: 00:38: enabled 1
707 12:44:43.037415 I2C: 00:39: enabled 1
708 12:44:43.040880 I2C: 00:3a: enabled 1
709 12:44:43.040994 I2C: 00:3b: enabled 1
710 12:44:43.044100 PCI: 00:00.0: enabled 1
711 12:44:43.047344 SPI: 00: enabled 1
712 12:44:43.047427 SPI: 01: enabled 1
713 12:44:43.050671 PNP: 0c09.0: enabled 1
714 12:44:43.054079 USB2 port 0: enabled 1
715 12:44:43.054164 USB2 port 1: enabled 1
716 12:44:43.057055 USB2 port 2: enabled 0
717 12:44:43.060455 USB2 port 3: enabled 0
718 12:44:43.063695 USB2 port 5: enabled 0
719 12:44:43.063779 USB2 port 6: enabled 1
720 12:44:43.066704 USB2 port 9: enabled 1
721 12:44:43.070106 USB3 port 0: enabled 1
722 12:44:43.070190 USB3 port 1: enabled 1
723 12:44:43.073500 USB3 port 2: enabled 1
724 12:44:43.076666 USB3 port 3: enabled 1
725 12:44:43.079780 USB3 port 4: enabled 0
726 12:44:43.079864 APIC: 02: enabled 1
727 12:44:43.083120 APIC: 01: enabled 1
728 12:44:43.083203 APIC: 03: enabled 1
729 12:44:43.086484 APIC: 04: enabled 1
730 12:44:43.089808 APIC: 05: enabled 1
731 12:44:43.089934 APIC: 07: enabled 1
732 12:44:43.092737 APIC: 06: enabled 1
733 12:44:43.096229 Compare with tree...
734 12:44:43.096312 Root Device: enabled 1
735 12:44:43.099249 CPU_CLUSTER: 0: enabled 1
736 12:44:43.102706 APIC: 00: enabled 1
737 12:44:43.105755 APIC: 02: enabled 1
738 12:44:43.105839 APIC: 01: enabled 1
739 12:44:43.109044 APIC: 03: enabled 1
740 12:44:43.112517 APIC: 04: enabled 1
741 12:44:43.112637 APIC: 05: enabled 1
742 12:44:43.115635 APIC: 07: enabled 1
743 12:44:43.119023 APIC: 06: enabled 1
744 12:44:43.119113 DOMAIN: 0000: enabled 1
745 12:44:43.122307 PCI: 00:00.0: enabled 1
746 12:44:43.125510 PCI: 00:02.0: enabled 1
747 12:44:43.128788 PCI: 00:04.0: enabled 0
748 12:44:43.132244 PCI: 00:05.0: enabled 0
749 12:44:43.132327 PCI: 00:12.0: enabled 1
750 12:44:43.135515 PCI: 00:12.5: enabled 0
751 12:44:43.138480 PCI: 00:12.6: enabled 0
752 12:44:43.142069 PCI: 00:14.0: enabled 1
753 12:44:43.144950 USB0 port 0: enabled 1
754 12:44:43.148459 USB2 port 0: enabled 1
755 12:44:43.148543 USB2 port 1: enabled 1
756 12:44:43.151704 USB2 port 2: enabled 0
757 12:44:43.155100 USB2 port 3: enabled 0
758 12:44:43.158103 USB2 port 5: enabled 0
759 12:44:43.161298 USB2 port 6: enabled 1
760 12:44:43.164653 USB2 port 9: enabled 1
761 12:44:43.164736 USB3 port 0: enabled 1
762 12:44:43.168107 USB3 port 1: enabled 1
763 12:44:43.171165 USB3 port 2: enabled 1
764 12:44:43.174418 USB3 port 3: enabled 1
765 12:44:43.177888 USB3 port 4: enabled 0
766 12:44:43.180902 PCI: 00:14.1: enabled 0
767 12:44:43.180983 PCI: 00:14.3: enabled 1
768 12:44:43.184268 PCI: 00:14.5: enabled 0
769 12:44:43.187523 PCI: 00:15.0: enabled 1
770 12:44:43.190820 I2C: 00:15: enabled 1
771 12:44:43.193893 PCI: 00:15.1: enabled 1
772 12:44:43.193969 I2C: 00:5d: enabled 1
773 12:44:43.197412 GENERIC: 0.0: enabled 1
774 12:44:43.200331 PCI: 00:15.2: enabled 0
775 12:44:43.203784 PCI: 00:15.3: enabled 0
776 12:44:43.207047 PCI: 00:16.0: enabled 1
777 12:44:43.207125 PCI: 00:16.1: enabled 0
778 12:44:43.210364 PCI: 00:16.2: enabled 0
779 12:44:43.213556 PCI: 00:16.3: enabled 0
780 12:44:43.217001 PCI: 00:16.4: enabled 0
781 12:44:43.220057 PCI: 00:16.5: enabled 0
782 12:44:43.220141 PCI: 00:17.0: enabled 1
783 12:44:43.223565 PCI: 00:19.0: enabled 1
784 12:44:43.226788 I2C: 00:1a: enabled 1
785 12:44:43.229887 I2C: 00:38: enabled 1
786 12:44:43.233308 I2C: 00:39: enabled 1
787 12:44:43.233391 I2C: 00:3a: enabled 1
788 12:44:43.236629 I2C: 00:3b: enabled 1
789 12:44:43.239664 PCI: 00:19.1: enabled 0
790 12:44:43.243010 PCI: 00:19.2: enabled 0
791 12:44:43.243086 PCI: 00:1a.0: enabled 0
792 12:44:43.246355 PCI: 00:1c.0: enabled 0
793 12:44:43.249543 PCI: 00:1c.1: enabled 0
794 12:44:43.253013 PCI: 00:1c.2: enabled 0
795 12:44:43.256030 PCI: 00:1c.3: enabled 0
796 12:44:43.256135 PCI: 00:1c.4: enabled 0
797 12:44:43.259427 PCI: 00:1c.5: enabled 0
798 12:44:43.262488 PCI: 00:1c.6: enabled 0
799 12:44:43.265933 PCI: 00:1c.7: enabled 0
800 12:44:43.269155 PCI: 00:1d.0: enabled 1
801 12:44:43.269262 PCI: 00:1d.1: enabled 0
802 12:44:43.272564 PCI: 00:1d.2: enabled 0
803 12:44:43.275629 PCI: 00:1d.3: enabled 0
804 12:44:43.279171 PCI: 00:1d.4: enabled 0
805 12:44:43.282128 PCI: 00:1d.5: enabled 1
806 12:44:43.285472 PCI: 00:00.0: enabled 1
807 12:44:43.285547 PCI: 00:1e.0: enabled 1
808 12:44:43.288920 PCI: 00:1e.1: enabled 0
809 12:44:43.291837 PCI: 00:1e.2: enabled 1
810 12:44:43.295107 SPI: 00: enabled 1
811 12:44:43.295186 PCI: 00:1e.3: enabled 1
812 12:44:43.298450 SPI: 01: enabled 1
813 12:44:43.301681 PCI: 00:1f.0: enabled 1
814 12:44:43.305101 PNP: 0c09.0: enabled 1
815 12:44:43.308516 PCI: 00:1f.1: enabled 1
816 12:44:43.308594 PCI: 00:1f.2: enabled 1
817 12:44:43.311509 PCI: 00:1f.3: enabled 1
818 12:44:43.314877 PCI: 00:1f.4: enabled 1
819 12:44:43.318453 PCI: 00:1f.5: enabled 1
820 12:44:43.321348 PCI: 00:1f.6: enabled 0
821 12:44:43.321424 Root Device scanning...
822 12:44:43.324688 scan_static_bus for Root Device
823 12:44:43.327937 CPU_CLUSTER: 0 enabled
824 12:44:43.331167 DOMAIN: 0000 enabled
825 12:44:43.334208 DOMAIN: 0000 scanning...
826 12:44:43.337567 PCI: pci_scan_bus for bus 00
827 12:44:43.340823 PCI: 00:00.0 [8086/0000] ops
828 12:44:43.344145 PCI: 00:00.0 [8086/9b61] enabled
829 12:44:43.347741 PCI: 00:02.0 [8086/0000] bus ops
830 12:44:43.350771 PCI: 00:02.0 [8086/9b41] enabled
831 12:44:43.354028 PCI: 00:04.0 [8086/1903] disabled
832 12:44:43.357415 PCI: 00:08.0 [8086/1911] enabled
833 12:44:43.360326 PCI: 00:12.0 [8086/02f9] enabled
834 12:44:43.363565 PCI: 00:14.0 [8086/0000] bus ops
835 12:44:43.367054 PCI: 00:14.0 [8086/02ed] enabled
836 12:44:43.370248 PCI: 00:14.2 [8086/02ef] enabled
837 12:44:43.373681 PCI: 00:14.3 [8086/02f0] enabled
838 12:44:43.376678 PCI: 00:15.0 [8086/0000] bus ops
839 12:44:43.380169 PCI: 00:15.0 [8086/02e8] enabled
840 12:44:43.383363 PCI: 00:15.1 [8086/0000] bus ops
841 12:44:43.386705 PCI: 00:15.1 [8086/02e9] enabled
842 12:44:43.389724 PCI: 00:16.0 [8086/0000] ops
843 12:44:43.393124 PCI: 00:16.0 [8086/02e0] enabled
844 12:44:43.396279 PCI: 00:17.0 [8086/0000] ops
845 12:44:43.399706 PCI: 00:17.0 [8086/02d3] enabled
846 12:44:43.402853 PCI: 00:19.0 [8086/0000] bus ops
847 12:44:43.406077 PCI: 00:19.0 [8086/02c5] enabled
848 12:44:43.409229 PCI: 00:1d.0 [8086/0000] bus ops
849 12:44:43.412623 PCI: 00:1d.0 [8086/02b0] enabled
850 12:44:43.419109 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 12:44:43.419198 PCI: 00:1e.0 [8086/0000] ops
852 12:44:43.422211 PCI: 00:1e.0 [8086/02a8] enabled
853 12:44:43.425531 PCI: 00:1e.2 [8086/0000] bus ops
854 12:44:43.431989 PCI: 00:1e.2 [8086/02aa] enabled
855 12:44:43.435252 PCI: 00:1e.3 [8086/0000] bus ops
856 12:44:43.438505 PCI: 00:1e.3 [8086/02ab] enabled
857 12:44:43.441699 PCI: 00:1f.0 [8086/0000] bus ops
858 12:44:43.445143 PCI: 00:1f.0 [8086/0284] enabled
859 12:44:43.448401 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 12:44:43.454821 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 12:44:43.458198 PCI: 00:1f.3 [8086/0000] bus ops
862 12:44:43.461558 PCI: 00:1f.3 [8086/02c8] enabled
863 12:44:43.464531 PCI: 00:1f.4 [8086/0000] bus ops
864 12:44:43.467976 PCI: 00:1f.4 [8086/02a3] enabled
865 12:44:43.471002 PCI: 00:1f.5 [8086/0000] bus ops
866 12:44:43.474405 PCI: 00:1f.5 [8086/02a4] enabled
867 12:44:43.477801 PCI: Leftover static devices:
868 12:44:43.480886 PCI: 00:05.0
869 12:44:43.480968 PCI: 00:12.5
870 12:44:43.481036 PCI: 00:12.6
871 12:44:43.484370 PCI: 00:14.1
872 12:44:43.484450 PCI: 00:14.5
873 12:44:43.487324 PCI: 00:15.2
874 12:44:43.487404 PCI: 00:15.3
875 12:44:43.487485 PCI: 00:16.1
876 12:44:43.490696 PCI: 00:16.2
877 12:44:43.490771 PCI: 00:16.3
878 12:44:43.494150 PCI: 00:16.4
879 12:44:43.494236 PCI: 00:16.5
880 12:44:43.497360 PCI: 00:19.1
881 12:44:43.497446 PCI: 00:19.2
882 12:44:43.497535 PCI: 00:1a.0
883 12:44:43.500797 PCI: 00:1c.0
884 12:44:43.500878 PCI: 00:1c.1
885 12:44:43.503790 PCI: 00:1c.2
886 12:44:43.503877 PCI: 00:1c.3
887 12:44:43.503962 PCI: 00:1c.4
888 12:44:43.507118 PCI: 00:1c.5
889 12:44:43.507202 PCI: 00:1c.6
890 12:44:43.510427 PCI: 00:1c.7
891 12:44:43.510520 PCI: 00:1d.1
892 12:44:43.513470 PCI: 00:1d.2
893 12:44:43.513560 PCI: 00:1d.3
894 12:44:43.513645 PCI: 00:1d.4
895 12:44:43.516712 PCI: 00:1d.5
896 12:44:43.516791 PCI: 00:1e.1
897 12:44:43.520152 PCI: 00:1f.1
898 12:44:43.520238 PCI: 00:1f.2
899 12:44:43.520323 PCI: 00:1f.6
900 12:44:43.523503 PCI: Check your devicetree.cb.
901 12:44:43.526603 PCI: 00:02.0 scanning...
902 12:44:43.529732 scan_generic_bus for PCI: 00:02.0
903 12:44:43.536442 scan_generic_bus for PCI: 00:02.0 done
904 12:44:43.539949 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
905 12:44:43.543237 PCI: 00:14.0 scanning...
906 12:44:43.546319 scan_static_bus for PCI: 00:14.0
907 12:44:43.549358 USB0 port 0 enabled
908 12:44:43.549444 USB0 port 0 scanning...
909 12:44:43.553081 scan_static_bus for USB0 port 0
910 12:44:43.556345 USB2 port 0 enabled
911 12:44:43.559651 USB2 port 1 enabled
912 12:44:43.559737 USB2 port 2 disabled
913 12:44:43.562998 USB2 port 3 disabled
914 12:44:43.566080 USB2 port 5 disabled
915 12:44:43.566166 USB2 port 6 enabled
916 12:44:43.569365 USB2 port 9 enabled
917 12:44:43.572686 USB3 port 0 enabled
918 12:44:43.572772 USB3 port 1 enabled
919 12:44:43.575926 USB3 port 2 enabled
920 12:44:43.576013 USB3 port 3 enabled
921 12:44:43.579033 USB3 port 4 disabled
922 12:44:43.582524 USB2 port 0 scanning...
923 12:44:43.585729 scan_static_bus for USB2 port 0
924 12:44:43.588881 scan_static_bus for USB2 port 0 done
925 12:44:43.595379 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
926 12:44:43.595469 USB2 port 1 scanning...
927 12:44:43.599051 scan_static_bus for USB2 port 1
928 12:44:43.605633 scan_static_bus for USB2 port 1 done
929 12:44:43.608912 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
930 12:44:43.611966 USB2 port 6 scanning...
931 12:44:43.615363 scan_static_bus for USB2 port 6
932 12:44:43.618712 scan_static_bus for USB2 port 6 done
933 12:44:43.625077 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
934 12:44:43.628512 USB2 port 9 scanning...
935 12:44:43.631606 scan_static_bus for USB2 port 9
936 12:44:43.634866 scan_static_bus for USB2 port 9 done
937 12:44:43.638147 scan_bus: scanning of bus USB2 port 9 took 9699 usecs
938 12:44:43.641727 USB3 port 0 scanning...
939 12:44:43.644925 scan_static_bus for USB3 port 0
940 12:44:43.648135 scan_static_bus for USB3 port 0 done
941 12:44:43.654634 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
942 12:44:43.657812 USB3 port 1 scanning...
943 12:44:43.661016 scan_static_bus for USB3 port 1
944 12:44:43.664399 scan_static_bus for USB3 port 1 done
945 12:44:43.670838 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
946 12:44:43.670966 USB3 port 2 scanning...
947 12:44:43.674216 scan_static_bus for USB3 port 2
948 12:44:43.680755 scan_static_bus for USB3 port 2 done
949 12:44:43.683852 scan_bus: scanning of bus USB3 port 2 took 9712 usecs
950 12:44:43.687392 USB3 port 3 scanning...
951 12:44:43.690420 scan_static_bus for USB3 port 3
952 12:44:43.693748 scan_static_bus for USB3 port 3 done
953 12:44:43.700455 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
954 12:44:43.703625 scan_static_bus for USB0 port 0 done
955 12:44:43.710197 scan_bus: scanning of bus USB0 port 0 took 155382 usecs
956 12:44:43.713308 scan_static_bus for PCI: 00:14.0 done
957 12:44:43.716765 scan_bus: scanning of bus PCI: 00:14.0 took 172999 usecs
958 12:44:43.720088 PCI: 00:15.0 scanning...
959 12:44:43.723157 scan_generic_bus for PCI: 00:15.0
960 12:44:43.729834 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 12:44:43.732837 scan_generic_bus for PCI: 00:15.0 done
962 12:44:43.739561 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
963 12:44:43.739647 PCI: 00:15.1 scanning...
964 12:44:43.742813 scan_generic_bus for PCI: 00:15.1
965 12:44:43.749454 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 12:44:43.752722 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 12:44:43.755991 scan_generic_bus for PCI: 00:15.1 done
968 12:44:43.762496 scan_bus: scanning of bus PCI: 00:15.1 took 18633 usecs
969 12:44:43.765626 PCI: 00:19.0 scanning...
970 12:44:43.768876 scan_generic_bus for PCI: 00:19.0
971 12:44:43.772266 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 12:44:43.775424 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 12:44:43.781970 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 12:44:43.785347 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 12:44:43.788268 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 12:44:43.791907 scan_generic_bus for PCI: 00:19.0 done
977 12:44:43.798256 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
978 12:44:43.801608 PCI: 00:1d.0 scanning...
979 12:44:43.804959 do_pci_scan_bridge for PCI: 00:1d.0
980 12:44:43.808214 PCI: pci_scan_bus for bus 01
981 12:44:43.811613 PCI: 01:00.0 [1c5c/1327] enabled
982 12:44:43.814579 Enabling Common Clock Configuration
983 12:44:43.817886 L1 Sub-State supported from root port 29
984 12:44:43.821308 L1 Sub-State Support = 0xf
985 12:44:43.824346 CommonModeRestoreTime = 0x28
986 12:44:43.827738 Power On Value = 0x16, Power On Scale = 0x0
987 12:44:43.830791 ASPM: Enabled L1
988 12:44:43.837445 scan_bus: scanning of bus PCI: 00:1d.0 took 32792 usecs
989 12:44:43.837530 PCI: 00:1e.2 scanning...
990 12:44:43.844237 scan_generic_bus for PCI: 00:1e.2
991 12:44:43.847457 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 12:44:43.850794 scan_generic_bus for PCI: 00:1e.2 done
993 12:44:43.857204 scan_bus: scanning of bus PCI: 00:1e.2 took 14017 usecs
994 12:44:43.857289 PCI: 00:1e.3 scanning...
995 12:44:43.860441 scan_generic_bus for PCI: 00:1e.3
996 12:44:43.867081 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 12:44:43.870225 scan_generic_bus for PCI: 00:1e.3 done
998 12:44:43.876691 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
999 12:44:43.876779 PCI: 00:1f.0 scanning...
1000 12:44:43.880199 scan_static_bus for PCI: 00:1f.0
1001 12:44:43.883318 PNP: 0c09.0 enabled
1002 12:44:43.886517 scan_static_bus for PCI: 00:1f.0 done
1003 12:44:43.893101 scan_bus: scanning of bus PCI: 00:1f.0 took 12066 usecs
1004 12:44:43.896412 PCI: 00:1f.3 scanning...
1005 12:44:43.899930 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1006 12:44:43.902855 PCI: 00:1f.4 scanning...
1007 12:44:43.906243 scan_generic_bus for PCI: 00:1f.4
1008 12:44:43.912827 scan_generic_bus for PCI: 00:1f.4 done
1009 12:44:43.915865 scan_bus: scanning of bus PCI: 00:1f.4 took 10172 usecs
1010 12:44:43.919102 PCI: 00:1f.5 scanning...
1011 12:44:43.922630 scan_generic_bus for PCI: 00:1f.5
1012 12:44:43.925893 scan_generic_bus for PCI: 00:1f.5 done
1013 12:44:43.932294 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1014 12:44:43.939001 scan_bus: scanning of bus DOMAIN: 0000 took 605178 usecs
1015 12:44:43.942239 scan_static_bus for Root Device done
1016 12:44:43.948764 scan_bus: scanning of bus Root Device took 625091 usecs
1017 12:44:43.948849 done
1018 12:44:43.952155 Chrome EC: UHEPI supported
1019 12:44:43.958370 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 12:44:43.961567 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 12:44:43.968094 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 12:44:43.975734 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 12:44:43.979157 SPI flash protection: WPSW=0 SRP0=0
1024 12:44:43.985368 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 12:44:43.988623 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 12:44:43.992181 found VGA at PCI: 00:02.0
1027 12:44:43.995234 Setting up VGA for PCI: 00:02.0
1028 12:44:44.002015 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 12:44:44.004964 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 12:44:44.008297 Allocating resources...
1031 12:44:44.011948 Reading resources...
1032 12:44:44.014735 Root Device read_resources bus 0 link: 0
1033 12:44:44.018134 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 12:44:44.024774 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 12:44:44.028135 DOMAIN: 0000 read_resources bus 0 link: 0
1036 12:44:44.035764 PCI: 00:14.0 read_resources bus 0 link: 0
1037 12:44:44.039067 USB0 port 0 read_resources bus 0 link: 0
1038 12:44:44.047246 USB0 port 0 read_resources bus 0 link: 0 done
1039 12:44:44.050456 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 12:44:44.057811 PCI: 00:15.0 read_resources bus 1 link: 0
1041 12:44:44.061240 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 12:44:44.067689 PCI: 00:15.1 read_resources bus 2 link: 0
1043 12:44:44.071186 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 12:44:44.079011 PCI: 00:19.0 read_resources bus 3 link: 0
1045 12:44:44.085094 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 12:44:44.088604 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 12:44:44.095110 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 12:44:44.098251 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 12:44:44.104837 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 12:44:44.107966 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 12:44:44.114843 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 12:44:44.117979 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 12:44:44.124448 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 12:44:44.131207 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 12:44:44.134261 Root Device read_resources bus 0 link: 0 done
1056 12:44:44.137662 Done reading resources.
1057 12:44:44.144092 Show resources in subtree (Root Device)...After reading.
1058 12:44:44.147572 Root Device child on link 0 CPU_CLUSTER: 0
1059 12:44:44.150724 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 12:44:44.153868 APIC: 00
1061 12:44:44.153952 APIC: 02
1062 12:44:44.157424 APIC: 01
1063 12:44:44.157511 APIC: 03
1064 12:44:44.157579 APIC: 04
1065 12:44:44.206812 APIC: 05
1066 12:44:44.207030 APIC: 07
1067 12:44:44.207132 APIC: 06
1068 12:44:44.207208 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 12:44:44.207481 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 12:44:44.207550 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 12:44:44.207615 PCI: 00:00.0
1072 12:44:44.207743 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 12:44:44.207805 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 12:44:44.256842 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 12:44:44.257179 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 12:44:44.257508 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 12:44:44.257930 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 12:44:44.258204 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 12:44:44.306495 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 12:44:44.306848 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 12:44:44.306966 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 12:44:44.307219 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 12:44:44.307571 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 12:44:44.333607 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 12:44:44.333721 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 12:44:44.333987 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 12:44:44.339013 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 12:44:44.339101 PCI: 00:02.0
1089 12:44:44.349091 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 12:44:44.359093 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 12:44:44.368595 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 12:44:44.368742 PCI: 00:04.0
1093 12:44:44.371873 PCI: 00:08.0
1094 12:44:44.381845 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 12:44:44.381932 PCI: 00:12.0
1096 12:44:44.391328 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 12:44:44.398009 PCI: 00:14.0 child on link 0 USB0 port 0
1098 12:44:44.407931 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 12:44:44.410829 USB0 port 0 child on link 0 USB2 port 0
1100 12:44:44.414185 USB2 port 0
1101 12:44:44.414269 USB2 port 1
1102 12:44:44.417530 USB2 port 2
1103 12:44:44.417615 USB2 port 3
1104 12:44:44.420930 USB2 port 5
1105 12:44:44.421013 USB2 port 6
1106 12:44:44.424065 USB2 port 9
1107 12:44:44.424154 USB3 port 0
1108 12:44:44.427439 USB3 port 1
1109 12:44:44.427523 USB3 port 2
1110 12:44:44.430335 USB3 port 3
1111 12:44:44.433726 USB3 port 4
1112 12:44:44.433809 PCI: 00:14.2
1113 12:44:44.443717 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 12:44:44.453241 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 12:44:44.456377 PCI: 00:14.3
1116 12:44:44.466528 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 12:44:44.469399 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 12:44:44.479172 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 12:44:44.482426 I2C: 01:15
1120 12:44:44.485760 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 12:44:44.495474 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 12:44:44.495573 I2C: 02:5d
1123 12:44:44.498782 GENERIC: 0.0
1124 12:44:44.498907 PCI: 00:16.0
1125 12:44:44.508630 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 12:44:44.511776 PCI: 00:17.0
1127 12:44:44.521541 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 12:44:44.531183 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 12:44:44.537977 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 12:44:44.547534 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 12:44:44.554022 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 12:44:44.564006 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 12:44:44.567346 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 12:44:44.576979 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 12:44:44.580294 I2C: 03:1a
1136 12:44:44.580377 I2C: 03:38
1137 12:44:44.583525 I2C: 03:39
1138 12:44:44.583604 I2C: 03:3a
1139 12:44:44.586873 I2C: 03:3b
1140 12:44:44.590192 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 12:44:44.600029 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 12:44:44.609750 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 12:44:44.616453 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 12:44:44.619531 PCI: 01:00.0
1145 12:44:44.629269 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 12:44:44.632735 PCI: 00:1e.0
1147 12:44:44.642336 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 12:44:44.652216 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 12:44:44.655141 PCI: 00:1e.2 child on link 0 SPI: 00
1150 12:44:44.665070 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 12:44:44.668379 SPI: 00
1152 12:44:44.671755 PCI: 00:1e.3 child on link 0 SPI: 01
1153 12:44:44.681504 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 12:44:44.681591 SPI: 01
1155 12:44:44.687919 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 12:44:44.694599 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 12:44:44.704467 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 12:44:44.707766 PNP: 0c09.0
1159 12:44:44.714132 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 12:44:44.717565 PCI: 00:1f.3
1161 12:44:44.727167 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 12:44:44.736883 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 12:44:44.736972 PCI: 00:1f.4
1164 12:44:44.746748 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 12:44:44.756711 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 12:44:44.759653 PCI: 00:1f.5
1167 12:44:44.769491 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 12:44:44.772635 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 12:44:44.779317 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 12:44:44.789121 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 12:44:44.792221 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 12:44:44.795554 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 12:44:44.798836 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 12:44:44.802106 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 12:44:44.808401 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 12:44:44.815015 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 12:44:44.821847 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 12:44:44.831687 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 12:44:44.837946 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 12:44:44.841320 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 12:44:44.851013 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 12:44:44.854552 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 12:44:44.860968 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 12:44:44.864071 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 12:44:44.870670 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 12:44:44.873921 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 12:44:44.880426 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 12:44:44.883589 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 12:44:44.890113 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 12:44:44.893512 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 12:44:44.899757 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 12:44:44.903240 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 12:44:44.909736 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 12:44:44.912777 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 12:44:44.919322 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 12:44:44.922642 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 12:44:44.929241 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 12:44:44.932416 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 12:44:44.938783 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 12:44:44.941880 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 12:44:44.948750 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 12:44:44.951669 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 12:44:44.958659 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 12:44:44.961924 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 12:44:44.971388 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 12:44:44.974756 avoid_fixed_resources: DOMAIN: 0000
1207 12:44:44.981362 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 12:44:44.984456 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 12:44:44.994391 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 12:44:45.000885 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 12:44:45.007480 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 12:44:45.017361 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 12:44:45.023823 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 12:44:45.030047 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 12:44:45.040063 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 12:44:45.046675 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 12:44:45.053263 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 12:44:45.062825 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 12:44:45.062939 Setting resources...
1220 12:44:45.069644 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 12:44:45.072972 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 12:44:45.079238 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 12:44:45.082750 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 12:44:45.085844 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 12:44:45.092574 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 12:44:45.099168 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 12:44:45.105440 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 12:44:45.112035 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 12:44:45.118608 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 12:44:45.121750 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 12:44:45.128287 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 12:44:45.131759 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 12:44:45.137988 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 12:44:45.141465 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 12:44:45.148128 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 12:44:45.151330 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 12:44:45.157769 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 12:44:45.160980 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 12:44:45.167613 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 12:44:45.170751 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 12:44:45.177204 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 12:44:45.180695 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 12:44:45.186963 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 12:44:45.190140 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 12:44:45.196771 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 12:44:45.200133 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 12:44:45.206772 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 12:44:45.209718 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 12:44:45.212967 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 12:44:45.219661 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 12:44:45.223017 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 12:44:45.232688 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 12:44:45.239084 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 12:44:45.245825 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 12:44:45.255469 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 12:44:45.258573 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 12:44:45.265488 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 12:44:45.271873 Root Device assign_resources, bus 0 link: 0
1259 12:44:45.275133 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 12:44:45.284866 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 12:44:45.291303 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 12:44:45.301174 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 12:44:45.307524 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 12:44:45.317524 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 12:44:45.323894 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 12:44:45.330558 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 12:44:45.333593 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 12:44:45.343484 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 12:44:45.349926 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 12:44:45.359547 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 12:44:45.366199 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 12:44:45.372856 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 12:44:45.375923 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 12:44:45.385967 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 12:44:45.389211 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 12:44:45.392335 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 12:44:45.402243 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 12:44:45.409124 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 12:44:45.418616 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 12:44:45.425275 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 12:44:45.434911 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 12:44:45.441440 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 12:44:45.447889 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 12:44:45.457882 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 12:44:45.461054 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 12:44:45.467532 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 12:44:45.474072 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 12:44:45.483722 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 12:44:45.493556 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 12:44:45.496782 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 12:44:45.506501 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 12:44:45.509854 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 12:44:45.519402 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 12:44:45.525802 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 12:44:45.529416 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 12:44:45.536215 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 12:44:45.542542 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 12:44:45.549076 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 12:44:45.552457 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 12:44:45.559050 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 12:44:45.562286 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 12:44:45.568854 LPC: Trying to open IO window from 800 size 1ff
1303 12:44:45.575349 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 12:44:45.585018 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 12:44:45.591565 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 12:44:45.601470 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 12:44:45.604714 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 12:44:45.611264 Root Device assign_resources, bus 0 link: 0
1309 12:44:45.611352 Done setting resources.
1310 12:44:45.617836 Show resources in subtree (Root Device)...After assigning values.
1311 12:44:45.624225 Root Device child on link 0 CPU_CLUSTER: 0
1312 12:44:45.627217 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 12:44:45.627298 APIC: 00
1314 12:44:45.630605 APIC: 02
1315 12:44:45.630680 APIC: 01
1316 12:44:45.633949 APIC: 03
1317 12:44:45.634036 APIC: 04
1318 12:44:45.634104 APIC: 05
1319 12:44:45.637363 APIC: 07
1320 12:44:45.637450 APIC: 06
1321 12:44:45.640276 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 12:44:45.650355 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 12:44:45.663499 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 12:44:45.663604 PCI: 00:00.0
1325 12:44:45.672959 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 12:44:45.682704 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 12:44:45.692729 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 12:44:45.702439 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 12:44:45.712194 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 12:44:45.721769 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 12:44:45.731515 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 12:44:45.738287 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 12:44:45.747822 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 12:44:45.757631 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 12:44:45.767348 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 12:44:45.776974 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 12:44:45.787117 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 12:44:45.796693 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 12:44:45.806372 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 12:44:45.812767 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 12:44:45.816088 PCI: 00:02.0
1342 12:44:45.826004 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 12:44:45.835663 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 12:44:45.845927 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 12:44:45.849031 PCI: 00:04.0
1346 12:44:45.849120 PCI: 00:08.0
1347 12:44:45.858724 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 12:44:45.861939 PCI: 00:12.0
1349 12:44:45.871978 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 12:44:45.875057 PCI: 00:14.0 child on link 0 USB0 port 0
1351 12:44:45.888208 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 12:44:45.891304 USB0 port 0 child on link 0 USB2 port 0
1353 12:44:45.891397 USB2 port 0
1354 12:44:45.894457 USB2 port 1
1355 12:44:45.897942 USB2 port 2
1356 12:44:45.898028 USB2 port 3
1357 12:44:45.901136 USB2 port 5
1358 12:44:45.901222 USB2 port 6
1359 12:44:45.904645 USB2 port 9
1360 12:44:45.904730 USB3 port 0
1361 12:44:45.907963 USB3 port 1
1362 12:44:45.908052 USB3 port 2
1363 12:44:45.910781 USB3 port 3
1364 12:44:45.910867 USB3 port 4
1365 12:44:45.914410 PCI: 00:14.2
1366 12:44:45.924069 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 12:44:45.933917 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 12:44:45.937092 PCI: 00:14.3
1369 12:44:45.946767 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 12:44:45.949856 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 12:44:45.959848 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 12:44:45.963216 I2C: 01:15
1373 12:44:45.966297 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 12:44:45.976290 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 12:44:45.979249 I2C: 02:5d
1376 12:44:45.979338 GENERIC: 0.0
1377 12:44:45.982791 PCI: 00:16.0
1378 12:44:45.992586 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 12:44:45.992718 PCI: 00:17.0
1380 12:44:46.005369 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 12:44:46.015553 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 12:44:46.024872 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 12:44:46.031718 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 12:44:46.041550 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 12:44:46.051462 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 12:44:46.054560 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 12:44:46.067532 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 12:44:46.067639 I2C: 03:1a
1389 12:44:46.070722 I2C: 03:38
1390 12:44:46.070811 I2C: 03:39
1391 12:44:46.074200 I2C: 03:3a
1392 12:44:46.074303 I2C: 03:3b
1393 12:44:46.078768 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 12:44:46.087076 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 12:44:46.097108 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 12:44:46.110174 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 12:44:46.110267 PCI: 01:00.0
1398 12:44:46.119762 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 12:44:46.122916 PCI: 00:1e.0
1400 12:44:46.132562 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 12:44:46.142744 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 12:44:46.149053 PCI: 00:1e.2 child on link 0 SPI: 00
1403 12:44:46.158763 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 12:44:46.158852 SPI: 00
1405 12:44:46.161897 PCI: 00:1e.3 child on link 0 SPI: 01
1406 12:44:46.175227 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 12:44:46.175336 SPI: 01
1408 12:44:46.178233 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 12:44:46.188212 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 12:44:46.197732 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 12:44:46.197848 PNP: 0c09.0
1412 12:44:46.207718 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 12:44:46.207823 PCI: 00:1f.3
1414 12:44:46.220843 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 12:44:46.230648 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 12:44:46.230765 PCI: 00:1f.4
1417 12:44:46.240425 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 12:44:46.250048 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 12:44:46.253320 PCI: 00:1f.5
1420 12:44:46.262972 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 12:44:46.266052 Done allocating resources.
1422 12:44:46.269382 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 12:44:46.272630 Enabling resources...
1424 12:44:46.279437 PCI: 00:00.0 subsystem <- 8086/9b61
1425 12:44:46.279549 PCI: 00:00.0 cmd <- 06
1426 12:44:46.282435 PCI: 00:02.0 subsystem <- 8086/9b41
1427 12:44:46.285961 PCI: 00:02.0 cmd <- 03
1428 12:44:46.289183 PCI: 00:08.0 cmd <- 06
1429 12:44:46.292489 PCI: 00:12.0 subsystem <- 8086/02f9
1430 12:44:46.295641 PCI: 00:12.0 cmd <- 02
1431 12:44:46.298867 PCI: 00:14.0 subsystem <- 8086/02ed
1432 12:44:46.302004 PCI: 00:14.0 cmd <- 02
1433 12:44:46.305386 PCI: 00:14.2 cmd <- 02
1434 12:44:46.308524 PCI: 00:14.3 subsystem <- 8086/02f0
1435 12:44:46.311736 PCI: 00:14.3 cmd <- 02
1436 12:44:46.315076 PCI: 00:15.0 subsystem <- 8086/02e8
1437 12:44:46.318339 PCI: 00:15.0 cmd <- 02
1438 12:44:46.321668 PCI: 00:15.1 subsystem <- 8086/02e9
1439 12:44:46.321750 PCI: 00:15.1 cmd <- 02
1440 12:44:46.328204 PCI: 00:16.0 subsystem <- 8086/02e0
1441 12:44:46.328313 PCI: 00:16.0 cmd <- 02
1442 12:44:46.331850 PCI: 00:17.0 subsystem <- 8086/02d3
1443 12:44:46.335076 PCI: 00:17.0 cmd <- 03
1444 12:44:46.338306 PCI: 00:19.0 subsystem <- 8086/02c5
1445 12:44:46.341687 PCI: 00:19.0 cmd <- 02
1446 12:44:46.344637 PCI: 00:1d.0 bridge ctrl <- 0013
1447 12:44:46.347881 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 12:44:46.351237 PCI: 00:1d.0 cmd <- 06
1449 12:44:46.354514 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 12:44:46.358088 PCI: 00:1e.0 cmd <- 06
1451 12:44:46.360993 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 12:44:46.364337 PCI: 00:1e.2 cmd <- 06
1453 12:44:46.367750 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 12:44:46.370843 PCI: 00:1e.3 cmd <- 02
1455 12:44:46.374127 PCI: 00:1f.0 subsystem <- 8086/0284
1456 12:44:46.377282 PCI: 00:1f.0 cmd <- 407
1457 12:44:46.380428 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 12:44:46.383731 PCI: 00:1f.3 cmd <- 02
1459 12:44:46.386832 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 12:44:46.390279 PCI: 00:1f.4 cmd <- 03
1461 12:44:46.393539 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 12:44:46.396834 PCI: 00:1f.5 cmd <- 406
1463 12:44:46.404252 PCI: 01:00.0 cmd <- 02
1464 12:44:46.409351 done.
1465 12:44:46.421812 ME: Version: 14.0.39.1367
1466 12:44:46.428220 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1467 12:44:46.431682 Initializing devices...
1468 12:44:46.431775 Root Device init ...
1469 12:44:46.438070 Chrome EC: Set SMI mask to 0x0000000000000000
1470 12:44:46.444429 Chrome EC: clear events_b mask to 0x0000000000000000
1471 12:44:46.447895 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 12:44:46.454169 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 12:44:46.460910 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 12:44:46.464173 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 12:44:46.470534 Root Device init finished in 35166 usecs
1476 12:44:46.470636 CPU_CLUSTER: 0 init ...
1477 12:44:46.477168 CPU_CLUSTER: 0 init finished in 2445 usecs
1478 12:44:46.482247 PCI: 00:00.0 init ...
1479 12:44:46.485452 CPU TDP: 15 Watts
1480 12:44:46.488897 CPU PL2 = 64 Watts
1481 12:44:46.492220 PCI: 00:00.0 init finished in 7059 usecs
1482 12:44:46.495245 PCI: 00:02.0 init ...
1483 12:44:46.498568 PCI: 00:02.0 init finished in 2242 usecs
1484 12:44:46.501788 PCI: 00:08.0 init ...
1485 12:44:46.505216 PCI: 00:08.0 init finished in 2251 usecs
1486 12:44:46.508405 PCI: 00:12.0 init ...
1487 12:44:46.511688 PCI: 00:12.0 init finished in 2250 usecs
1488 12:44:46.514903 PCI: 00:14.0 init ...
1489 12:44:46.517895 PCI: 00:14.0 init finished in 2251 usecs
1490 12:44:46.521361 PCI: 00:14.2 init ...
1491 12:44:46.524681 PCI: 00:14.2 init finished in 2242 usecs
1492 12:44:46.527692 PCI: 00:14.3 init ...
1493 12:44:46.530857 PCI: 00:14.3 init finished in 2268 usecs
1494 12:44:46.534406 PCI: 00:15.0 init ...
1495 12:44:46.537799 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 12:44:46.544211 PCI: 00:15.0 init finished in 5965 usecs
1497 12:44:46.544312 PCI: 00:15.1 init ...
1498 12:44:46.547655 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 12:44:46.554202 PCI: 00:15.1 init finished in 5970 usecs
1500 12:44:46.557597 PCI: 00:16.0 init ...
1501 12:44:46.560884 PCI: 00:16.0 init finished in 2250 usecs
1502 12:44:46.564014 PCI: 00:19.0 init ...
1503 12:44:46.567205 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 12:44:46.570552 PCI: 00:19.0 init finished in 5973 usecs
1505 12:44:46.573715 PCI: 00:1d.0 init ...
1506 12:44:46.576985 Initializing PCH PCIe bridge.
1507 12:44:46.580204 PCI: 00:1d.0 init finished in 5273 usecs
1508 12:44:46.584022 PCI: 00:1f.0 init ...
1509 12:44:46.587243 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 12:44:46.593998 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 12:44:46.594082 IOAPIC: ID = 0x02
1512 12:44:46.597293 IOAPIC: Dumping registers
1513 12:44:46.600408 reg 0x0000: 0x02000000
1514 12:44:46.603977 reg 0x0001: 0x00770020
1515 12:44:46.607134 reg 0x0002: 0x00000000
1516 12:44:46.610358 PCI: 00:1f.0 init finished in 23516 usecs
1517 12:44:46.613426 PCI: 00:1f.4 init ...
1518 12:44:46.616719 PCI: 00:1f.4 init finished in 2259 usecs
1519 12:44:46.628242 PCI: 01:00.0 init ...
1520 12:44:46.631347 PCI: 01:00.0 init finished in 2250 usecs
1521 12:44:46.635967 PNP: 0c09.0 init ...
1522 12:44:46.639080 Google Chrome EC uptime: 11.157 seconds
1523 12:44:46.645828 Google Chrome AP resets since EC boot: 0
1524 12:44:46.648748 Google Chrome most recent AP reset causes:
1525 12:44:46.655562 Google Chrome EC reset flags at last EC boot: reset-pin
1526 12:44:46.658595 PNP: 0c09.0 init finished in 20555 usecs
1527 12:44:46.661857 Devices initialized
1528 12:44:46.665216 Show all devs... After init.
1529 12:44:46.665349 Root Device: enabled 1
1530 12:44:46.668502 CPU_CLUSTER: 0: enabled 1
1531 12:44:46.671762 DOMAIN: 0000: enabled 1
1532 12:44:46.674782 APIC: 00: enabled 1
1533 12:44:46.674867 PCI: 00:00.0: enabled 1
1534 12:44:46.678445 PCI: 00:02.0: enabled 1
1535 12:44:46.681693 PCI: 00:04.0: enabled 0
1536 12:44:46.681778 PCI: 00:05.0: enabled 0
1537 12:44:46.684896 PCI: 00:12.0: enabled 1
1538 12:44:46.687844 PCI: 00:12.5: enabled 0
1539 12:44:46.691297 PCI: 00:12.6: enabled 0
1540 12:44:46.691382 PCI: 00:14.0: enabled 1
1541 12:44:46.694418 PCI: 00:14.1: enabled 0
1542 12:44:46.697717 PCI: 00:14.3: enabled 1
1543 12:44:46.701109 PCI: 00:14.5: enabled 0
1544 12:44:46.701209 PCI: 00:15.0: enabled 1
1545 12:44:46.704192 PCI: 00:15.1: enabled 1
1546 12:44:46.707317 PCI: 00:15.2: enabled 0
1547 12:44:46.710611 PCI: 00:15.3: enabled 0
1548 12:44:46.710689 PCI: 00:16.0: enabled 1
1549 12:44:46.713796 PCI: 00:16.1: enabled 0
1550 12:44:46.717234 PCI: 00:16.2: enabled 0
1551 12:44:46.720272 PCI: 00:16.3: enabled 0
1552 12:44:46.720350 PCI: 00:16.4: enabled 0
1553 12:44:46.723675 PCI: 00:16.5: enabled 0
1554 12:44:46.726871 PCI: 00:17.0: enabled 1
1555 12:44:46.730091 PCI: 00:19.0: enabled 1
1556 12:44:46.730167 PCI: 00:19.1: enabled 0
1557 12:44:46.733303 PCI: 00:19.2: enabled 0
1558 12:44:46.736625 PCI: 00:1a.0: enabled 0
1559 12:44:46.739886 PCI: 00:1c.0: enabled 0
1560 12:44:46.739969 PCI: 00:1c.1: enabled 0
1561 12:44:46.743444 PCI: 00:1c.2: enabled 0
1562 12:44:46.746394 PCI: 00:1c.3: enabled 0
1563 12:44:46.749816 PCI: 00:1c.4: enabled 0
1564 12:44:46.749898 PCI: 00:1c.5: enabled 0
1565 12:44:46.753135 PCI: 00:1c.6: enabled 0
1566 12:44:46.756435 PCI: 00:1c.7: enabled 0
1567 12:44:46.759850 PCI: 00:1d.0: enabled 1
1568 12:44:46.759933 PCI: 00:1d.1: enabled 0
1569 12:44:46.763015 PCI: 00:1d.2: enabled 0
1570 12:44:46.766219 PCI: 00:1d.3: enabled 0
1571 12:44:46.769367 PCI: 00:1d.4: enabled 0
1572 12:44:46.769451 PCI: 00:1d.5: enabled 0
1573 12:44:46.772946 PCI: 00:1e.0: enabled 1
1574 12:44:46.776048 PCI: 00:1e.1: enabled 0
1575 12:44:46.779260 PCI: 00:1e.2: enabled 1
1576 12:44:46.779343 PCI: 00:1e.3: enabled 1
1577 12:44:46.782377 PCI: 00:1f.0: enabled 1
1578 12:44:46.785639 PCI: 00:1f.1: enabled 0
1579 12:44:46.789194 PCI: 00:1f.2: enabled 0
1580 12:44:46.789284 PCI: 00:1f.3: enabled 1
1581 12:44:46.792178 PCI: 00:1f.4: enabled 1
1582 12:44:46.795618 PCI: 00:1f.5: enabled 1
1583 12:44:46.799069 PCI: 00:1f.6: enabled 0
1584 12:44:46.799207 USB0 port 0: enabled 1
1585 12:44:46.802209 I2C: 01:15: enabled 1
1586 12:44:46.805257 I2C: 02:5d: enabled 1
1587 12:44:46.805386 GENERIC: 0.0: enabled 1
1588 12:44:46.808550 I2C: 03:1a: enabled 1
1589 12:44:46.811904 I2C: 03:38: enabled 1
1590 12:44:46.812030 I2C: 03:39: enabled 1
1591 12:44:46.815136 I2C: 03:3a: enabled 1
1592 12:44:46.818349 I2C: 03:3b: enabled 1
1593 12:44:46.821518 PCI: 00:00.0: enabled 1
1594 12:44:46.821605 SPI: 00: enabled 1
1595 12:44:46.824920 SPI: 01: enabled 1
1596 12:44:46.825005 PNP: 0c09.0: enabled 1
1597 12:44:46.828191 USB2 port 0: enabled 1
1598 12:44:46.831309 USB2 port 1: enabled 1
1599 12:44:46.834496 USB2 port 2: enabled 0
1600 12:44:46.834575 USB2 port 3: enabled 0
1601 12:44:46.837859 USB2 port 5: enabled 0
1602 12:44:46.841016 USB2 port 6: enabled 1
1603 12:44:46.844181 USB2 port 9: enabled 1
1604 12:44:46.844265 USB3 port 0: enabled 1
1605 12:44:46.847442 USB3 port 1: enabled 1
1606 12:44:46.850864 USB3 port 2: enabled 1
1607 12:44:46.850969 USB3 port 3: enabled 1
1608 12:44:46.853940 USB3 port 4: enabled 0
1609 12:44:46.857301 APIC: 02: enabled 1
1610 12:44:46.857385 APIC: 01: enabled 1
1611 12:44:46.860583 APIC: 03: enabled 1
1612 12:44:46.863812 APIC: 04: enabled 1
1613 12:44:46.863896 APIC: 05: enabled 1
1614 12:44:46.867040 APIC: 07: enabled 1
1615 12:44:46.867142 APIC: 06: enabled 1
1616 12:44:46.870559 PCI: 00:08.0: enabled 1
1617 12:44:46.873751 PCI: 00:14.2: enabled 1
1618 12:44:46.877023 PCI: 01:00.0: enabled 1
1619 12:44:46.880359 Disabling ACPI via APMC:
1620 12:44:46.883568 done.
1621 12:44:46.886749 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 12:44:46.890186 ELOG: NV offset 0xaf0000 size 0x4000
1623 12:44:46.896906 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 12:44:46.903852 ELOG: Event(17) added with size 13 at 2022-07-14 11:44:22 UTC
1625 12:44:46.910464 POST: Unexpected post code in previous boot: 0x73
1626 12:44:46.916972 ELOG: Event(A3) added with size 11 at 2022-07-14 11:44:22 UTC
1627 12:44:46.923456 ELOG: Event(92) added with size 9 at 2022-07-14 11:44:22 UTC
1628 12:44:46.930081 ELOG: Event(93) added with size 9 at 2022-07-14 11:44:22 UTC
1629 12:44:46.936567 ELOG: Event(9A) added with size 9 at 2022-07-14 11:44:22 UTC
1630 12:44:46.939818 ELOG: Event(9E) added with size 10 at 2022-07-14 11:44:22 UTC
1631 12:44:46.946618 ELOG: Event(9F) added with size 14 at 2022-07-14 11:44:22 UTC
1632 12:44:46.952966 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1633 12:44:46.959665 ELOG: Event(A1) added with size 10 at 2022-07-14 11:44:22 UTC
1634 12:44:46.966205 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1635 12:44:46.972811 ELOG: Event(A0) added with size 9 at 2022-07-14 11:44:22 UTC
1636 12:44:46.979054 elog_add_boot_reason: Logged dev mode boot
1637 12:44:46.979163 Finalize devices...
1638 12:44:46.982389 PCI: 00:17.0 final
1639 12:44:46.982473 Devices finalized
1640 12:44:46.989446 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1641 12:44:46.995785 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1642 12:44:46.999274 ME: HFSTS1 : 0x90000245
1643 12:44:47.002310 ME: HFSTS2 : 0x3B850126
1644 12:44:47.005564 ME: HFSTS3 : 0x00000020
1645 12:44:47.012217 ME: HFSTS4 : 0x00004800
1646 12:44:47.015239 ME: HFSTS5 : 0x00000000
1647 12:44:47.018777 ME: HFSTS6 : 0x40400006
1648 12:44:47.021946 ME: Manufacturing Mode : NO
1649 12:44:47.025048 ME: FW Partition Table : OK
1650 12:44:47.028539 ME: Bringup Loader Failure : NO
1651 12:44:47.031606 ME: Firmware Init Complete : YES
1652 12:44:47.034768 ME: Boot Options Present : NO
1653 12:44:47.038377 ME: Update In Progress : NO
1654 12:44:47.041559 ME: D0i3 Support : YES
1655 12:44:47.044792 ME: Low Power State Enabled : NO
1656 12:44:47.047948 ME: CPU Replaced : NO
1657 12:44:47.051328 ME: CPU Replacement Valid : YES
1658 12:44:47.054606 ME: Current Working State : 5
1659 12:44:47.057845 ME: Current Operation State : 1
1660 12:44:47.060930 ME: Current Operation Mode : 0
1661 12:44:47.064198 ME: Error Code : 0
1662 12:44:47.067421 ME: CPU Debug Disabled : YES
1663 12:44:47.070784 ME: TXT Support : NO
1664 12:44:47.077732 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1665 12:44:47.084003 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 12:44:47.084092 CBFS @ c08000 size 3f8000
1667 12:44:47.090480 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 12:44:47.093888 CBFS: Locating 'fallback/dsdt.aml'
1669 12:44:47.100403 CBFS: Found @ offset 10bb80 size 3fa5
1670 12:44:47.103384 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1671 12:44:47.106570 CBFS @ c08000 size 3f8000
1672 12:44:47.113380 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1673 12:44:47.116417 CBFS: Locating 'fallback/slic'
1674 12:44:47.119832 CBFS: 'fallback/slic' not found.
1675 12:44:47.122961 ACPI: Writing ACPI tables at 99b3e000.
1676 12:44:47.126265 ACPI: * FACS
1677 12:44:47.129585 ACPI: * DSDT
1678 12:44:47.133018 Ramoops buffer: 0x100000@0x99a3d000.
1679 12:44:47.136053 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1680 12:44:47.139266 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1681 12:44:47.143417 Google Chrome EC: version:
1682 12:44:47.146695 ro: helios_v2.0.2659-56403530b
1683 12:44:47.149907 rw: helios_v2.0.2849-c41de27e7d
1684 12:44:47.152936 running image: 1
1685 12:44:47.156526 ACPI: * FADT
1686 12:44:47.156602 SCI is IRQ9
1687 12:44:47.162989 ACPI: added table 1/32, length now 40
1688 12:44:47.163066 ACPI: * SSDT
1689 12:44:47.166349 Found 1 CPU(s) with 8 core(s) each.
1690 12:44:47.169560 Error: Could not locate 'wifi_sar' in VPD.
1691 12:44:47.175982 Checking CBFS for default SAR values
1692 12:44:47.179215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 12:44:47.182297 CBFS @ c08000 size 3f8000
1694 12:44:47.189072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 12:44:47.192435 CBFS: Locating 'wifi_sar_defaults.hex'
1696 12:44:47.195629 CBFS: Found @ offset 5fac0 size 77
1697 12:44:47.198745 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1698 12:44:47.205262 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1699 12:44:47.208478 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1700 12:44:47.214955 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1701 12:44:47.218121 failed to find key in VPD: dsm_calib_r0_0
1702 12:44:47.227876 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1703 12:44:47.234450 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1704 12:44:47.237683 failed to find key in VPD: dsm_calib_r0_1
1705 12:44:47.247590 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1706 12:44:47.250883 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1707 12:44:47.257442 failed to find key in VPD: dsm_calib_r0_2
1708 12:44:47.263816 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1709 12:44:47.270447 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1710 12:44:47.273509 failed to find key in VPD: dsm_calib_r0_3
1711 12:44:47.283252 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1712 12:44:47.286670 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1713 12:44:47.293340 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1714 12:44:47.296552 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1715 12:44:47.299869 EC returned error result code 1
1716 12:44:47.303425 EC returned error result code 1
1717 12:44:47.306517 EC returned error result code 1
1718 12:44:47.313076 PS2K: Bad resp from EC. Vivaldi disabled!
1719 12:44:47.319742 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1720 12:44:47.322815 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1721 12:44:47.329551 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1722 12:44:47.332778 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1723 12:44:47.339461 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1724 12:44:47.345804 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1725 12:44:47.352186 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1726 12:44:47.358798 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1727 12:44:47.362261 ACPI: added table 2/32, length now 44
1728 12:44:47.362352 ACPI: * MCFG
1729 12:44:47.365555 ACPI: added table 3/32, length now 48
1730 12:44:47.368814 ACPI: * TPM2
1731 12:44:47.371805 TPM2 log created at 99a2d000
1732 12:44:47.375046 ACPI: added table 4/32, length now 52
1733 12:44:47.375131 ACPI: * MADT
1734 12:44:47.378460 SCI is IRQ9
1735 12:44:47.381893 ACPI: added table 5/32, length now 56
1736 12:44:47.384909 current = 99b43ac0
1737 12:44:47.384995 ACPI: * DMAR
1738 12:44:47.388028 ACPI: added table 6/32, length now 60
1739 12:44:47.391433 ACPI: * IGD OpRegion
1740 12:44:47.394866 GMA: Found VBT in CBFS
1741 12:44:47.397946 GMA: Found valid VBT in CBFS
1742 12:44:47.401133 ACPI: added table 7/32, length now 64
1743 12:44:47.401211 ACPI: * HPET
1744 12:44:47.404402 ACPI: added table 8/32, length now 68
1745 12:44:47.407887 ACPI: done.
1746 12:44:47.411270 ACPI tables: 31744 bytes.
1747 12:44:47.414348 smbios_write_tables: 99a2c000
1748 12:44:47.417707 EC returned error result code 3
1749 12:44:47.420823 Couldn't obtain OEM name from CBI
1750 12:44:47.424103 Create SMBIOS type 17
1751 12:44:47.427400 PCI: 00:00.0 (Intel Cannonlake)
1752 12:44:47.427487 PCI: 00:14.3 (Intel WiFi)
1753 12:44:47.430574 SMBIOS tables: 939 bytes.
1754 12:44:47.437248 Writing table forward entry at 0x00000500
1755 12:44:47.440441 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1756 12:44:47.447029 Writing coreboot table at 0x99b62000
1757 12:44:47.450202 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1758 12:44:47.456997 1. 0000000000001000-000000000009ffff: RAM
1759 12:44:47.459915 2. 00000000000a0000-00000000000fffff: RESERVED
1760 12:44:47.463248 3. 0000000000100000-0000000099a2bfff: RAM
1761 12:44:47.469849 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1762 12:44:47.476217 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1763 12:44:47.482807 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1764 12:44:47.486097 7. 000000009a000000-000000009f7fffff: RESERVED
1765 12:44:47.489237 8. 00000000e0000000-00000000efffffff: RESERVED
1766 12:44:47.496145 9. 00000000fc000000-00000000fc000fff: RESERVED
1767 12:44:47.499094 10. 00000000fe000000-00000000fe00ffff: RESERVED
1768 12:44:47.505759 11. 00000000fed10000-00000000fed17fff: RESERVED
1769 12:44:47.508844 12. 00000000fed80000-00000000fed83fff: RESERVED
1770 12:44:47.515394 13. 00000000fed90000-00000000fed91fff: RESERVED
1771 12:44:47.518492 14. 00000000feda0000-00000000feda1fff: RESERVED
1772 12:44:47.525247 15. 0000000100000000-000000045e7fffff: RAM
1773 12:44:47.528516 Graphics framebuffer located at 0xc0000000
1774 12:44:47.531817 Passing 5 GPIOs to payload:
1775 12:44:47.535175 NAME | PORT | POLARITY | VALUE
1776 12:44:47.541562 write protect | undefined | high | low
1777 12:44:47.548171 lid | undefined | high | high
1778 12:44:47.551146 power | undefined | high | low
1779 12:44:47.557956 oprom | undefined | high | low
1780 12:44:47.561202 EC in RW | 0x000000cb | high | low
1781 12:44:47.564197 Board ID: 4
1782 12:44:47.567637 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1783 12:44:47.570583 CBFS @ c08000 size 3f8000
1784 12:44:47.577041 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1785 12:44:47.583658 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum ef9
1786 12:44:47.586854 coreboot table: 1452 bytes.
1787 12:44:47.590221 IMD ROOT 0. 99fff000 00001000
1788 12:44:47.593376 IMD SMALL 1. 99ffe000 00001000
1789 12:44:47.596711 FSP MEMORY 2. 99c4e000 003b0000
1790 12:44:47.600012 CONSOLE 3. 99c2e000 00020000
1791 12:44:47.603367 FMAP 4. 99c2d000 0000054e
1792 12:44:47.606642 TIME STAMP 5. 99c2c000 00000910
1793 12:44:47.609618 VBOOT WORK 6. 99c18000 00014000
1794 12:44:47.613108 MRC DATA 7. 99c16000 00001958
1795 12:44:47.616347 ROMSTG STCK 8. 99c15000 00001000
1796 12:44:47.619772 AFTER CAR 9. 99c0b000 0000a000
1797 12:44:47.622930 RAMSTAGE 10. 99baf000 0005c000
1798 12:44:47.626050 REFCODE 11. 99b7a000 00035000
1799 12:44:47.629385 SMM BACKUP 12. 99b6a000 00010000
1800 12:44:47.632506 COREBOOT 13. 99b62000 00008000
1801 12:44:47.635953 ACPI 14. 99b3e000 00024000
1802 12:44:47.639309 ACPI GNVS 15. 99b3d000 00001000
1803 12:44:47.642513 RAMOOPS 16. 99a3d000 00100000
1804 12:44:47.645724 TPM2 TCGLOG17. 99a2d000 00010000
1805 12:44:47.649082 SMBIOS 18. 99a2c000 00000800
1806 12:44:47.652380 IMD small region:
1807 12:44:47.655429 IMD ROOT 0. 99ffec00 00000400
1808 12:44:47.658853 FSP RUNTIME 1. 99ffebe0 00000004
1809 12:44:47.662268 EC HOSTEVENT 2. 99ffebc0 00000008
1810 12:44:47.665602 POWER STATE 3. 99ffeb80 00000040
1811 12:44:47.668718 ROMSTAGE 4. 99ffeb60 00000004
1812 12:44:47.672046 MEM INFO 5. 99ffe9a0 000001b9
1813 12:44:47.675175 MTRR: Physical address space:
1814 12:44:47.681717 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 12:44:47.688135 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 12:44:47.694777 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1817 12:44:47.701331 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1818 12:44:47.704582 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 12:44:47.711276 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 12:44:47.717496 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1821 12:44:47.724296 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 12:44:47.727285 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 12:44:47.730693 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 12:44:47.733841 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 12:44:47.740451 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 12:44:47.743672 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 12:44:47.746785 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 12:44:47.750016 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 12:44:47.756711 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 12:44:47.760069 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 12:44:47.763282 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 12:44:47.766691 call enable_fixed_mtrr()
1833 12:44:47.769748 CPU physical address size: 39 bits
1834 12:44:47.776352 MTRR: default type WB/UC MTRR counts: 6/8.
1835 12:44:47.779500 MTRR: WB selected as default type.
1836 12:44:47.786072 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1837 12:44:47.789173 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1838 12:44:47.795906 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1839 12:44:47.802523 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1840 12:44:47.808970 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1841 12:44:47.815503 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1842 12:44:47.821907 MTRR: Fixed MSR 0x250 0x0606060606060606
1843 12:44:47.825092 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 12:44:47.828490 MTRR: Fixed MSR 0x259 0x0000000000000000
1845 12:44:47.831728 MTRR: Fixed MSR 0x268 0x0606060606060606
1846 12:44:47.838114 MTRR: Fixed MSR 0x269 0x0606060606060606
1847 12:44:47.841305 MTRR: Fixed MSR 0x26a 0x0606060606060606
1848 12:44:47.844521 MTRR: Fixed MSR 0x26b 0x0606060606060606
1849 12:44:47.847990 MTRR: Fixed MSR 0x26c 0x0606060606060606
1850 12:44:47.854489 MTRR: Fixed MSR 0x26d 0x0606060606060606
1851 12:44:47.857477 MTRR: Fixed MSR 0x26e 0x0606060606060606
1852 12:44:47.860774 MTRR: Fixed MSR 0x26f 0x0606060606060606
1853 12:44:47.860862
1854 12:44:47.864022 MTRR check
1855 12:44:47.867640 Fixed MTRRs : Enabled
1856 12:44:47.867734 Variable MTRRs: Enabled
1857 12:44:47.867807
1858 12:44:47.870492 call enable_fixed_mtrr()
1859 12:44:47.877332 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1860 12:44:47.880522 CPU physical address size: 39 bits
1861 12:44:47.883631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1862 12:44:47.886750 CBFS @ c08000 size 3f8000
1863 12:44:47.893469 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1864 12:44:47.896742 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 12:44:47.903312 MTRR: Fixed MSR 0x258 0x0606060606060606
1866 12:44:47.906638 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 12:44:47.909651 MTRR: Fixed MSR 0x268 0x0606060606060606
1868 12:44:47.913102 MTRR: Fixed MSR 0x269 0x0606060606060606
1869 12:44:47.919402 MTRR: Fixed MSR 0x26a 0x0606060606060606
1870 12:44:47.922773 MTRR: Fixed MSR 0x26b 0x0606060606060606
1871 12:44:47.926029 MTRR: Fixed MSR 0x26c 0x0606060606060606
1872 12:44:47.929256 MTRR: Fixed MSR 0x26d 0x0606060606060606
1873 12:44:47.935685 MTRR: Fixed MSR 0x26e 0x0606060606060606
1874 12:44:47.939172 MTRR: Fixed MSR 0x26f 0x0606060606060606
1875 12:44:47.942403 MTRR: Fixed MSR 0x250 0x0606060606060606
1876 12:44:47.945578 call enable_fixed_mtrr()
1877 12:44:47.949009 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 12:44:47.951972 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 12:44:47.958747 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 12:44:47.961932 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 12:44:47.965232 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 12:44:47.968404 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 12:44:47.974832 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 12:44:47.978294 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 12:44:47.981636 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 12:44:47.984661 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 12:44:47.991353 CPU physical address size: 39 bits
1888 12:44:47.994513 call enable_fixed_mtrr()
1889 12:44:47.997904 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 12:44:48.001101 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 12:44:48.004580 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 12:44:48.010867 MTRR: Fixed MSR 0x259 0x0000000000000000
1893 12:44:48.014218 MTRR: Fixed MSR 0x268 0x0606060606060606
1894 12:44:48.017426 MTRR: Fixed MSR 0x269 0x0606060606060606
1895 12:44:48.020569 MTRR: Fixed MSR 0x26a 0x0606060606060606
1896 12:44:48.027343 MTRR: Fixed MSR 0x26b 0x0606060606060606
1897 12:44:48.030504 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 12:44:48.033944 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 12:44:48.036852 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 12:44:48.043640 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 12:44:48.046742 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 12:44:48.050295 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 12:44:48.053329 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 12:44:48.059835 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 12:44:48.063138 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 12:44:48.066387 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 12:44:48.069487 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 12:44:48.076318 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 12:44:48.079649 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 12:44:48.082581 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 12:44:48.085853 call enable_fixed_mtrr()
1912 12:44:48.089125 call enable_fixed_mtrr()
1913 12:44:48.092569 CPU physical address size: 39 bits
1914 12:44:48.095490 CPU physical address size: 39 bits
1915 12:44:48.098828 CPU physical address size: 39 bits
1916 12:44:48.102143 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 12:44:48.108527 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 12:44:48.111806 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 12:44:48.115298 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 12:44:48.118556 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 12:44:48.124945 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 12:44:48.128205 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 12:44:48.131419 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 12:44:48.134832 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 12:44:48.141338 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 12:44:48.144532 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 12:44:48.147692 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 12:44:48.154207 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 12:44:48.157432 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 12:44:48.161002 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 12:44:48.164297 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 12:44:48.170559 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 12:44:48.173917 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 12:44:48.177238 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 12:44:48.180351 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 12:44:48.187017 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 12:44:48.190339 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 12:44:48.193351 call enable_fixed_mtrr()
1939 12:44:48.193435 call enable_fixed_mtrr()
1940 12:44:48.196920 CPU physical address size: 39 bits
1941 12:44:48.203360 CPU physical address size: 39 bits
1942 12:44:48.206391 CBFS: Locating 'fallback/payload'
1943 12:44:48.209766 CBFS: Found @ offset 1c96c0 size 3f798
1944 12:44:48.216371 Checking segment from ROM address 0xffdd16f8
1945 12:44:48.219477 Checking segment from ROM address 0xffdd1714
1946 12:44:48.222817 Loading segment from ROM address 0xffdd16f8
1947 12:44:48.225952 code (compression=0)
1948 12:44:48.235912 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1949 12:44:48.242275 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1950 12:44:48.245453 it's not compressed!
1951 12:44:48.337180 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1952 12:44:48.343887 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1953 12:44:48.347257 Loading segment from ROM address 0xffdd1714
1954 12:44:48.350406 Entry Point 0x30000000
1955 12:44:48.353591 Loaded segments
1956 12:44:48.359623 Finalizing chipset.
1957 12:44:48.362917 Finalizing SMM.
1958 12:44:48.366175 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1959 12:44:48.369430 mp_park_aps done after 0 msecs.
1960 12:44:48.376035 Jumping to boot code at 30000000(99b62000)
1961 12:44:48.382173 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1962 12:44:48.382263
1963 12:44:48.385485 Starting depthcharge on Helios...
1964 12:44:48.385852 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1965 12:44:48.385959 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1966 12:44:48.386049 Setting prompt string to ['hatch:']
1967 12:44:48.386137 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1968 12:44:48.395390 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1969 12:44:48.401749 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1970 12:44:48.408294 board_setup: Info: eMMC controller not present; skipping
1971 12:44:48.411586 New NVMe Controller 0x30053ac0 @ 00:1d:00
1972 12:44:48.418243 board_setup: Info: SDHCI controller not present; skipping
1973 12:44:48.424950 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1974 12:44:48.425036 Wipe memory regions:
1975 12:44:48.431291 [0x00000000001000, 0x000000000a0000)
1976 12:44:48.434593 [0x00000000100000, 0x00000030000000)
1977 12:44:48.499318 [0x00000030657430, 0x00000099a2c000)
1978 12:44:48.631904 [0x00000100000000, 0x0000045e800000)
1979 12:44:49.950742 R8152: Initializing
1980 12:44:49.954002 Version 9 (ocp_data = 6010)
1981 12:44:49.958213 R8152: Done initializing
1982 12:44:49.961650 Adding net device
1983 12:44:50.331443 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1984 12:44:50.331594
1985 12:44:50.331878 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
1987 12:44:50.432667 hatch: tftpboot 192.168.201.1 6819446/tftp-deploy-_g6m80lu/kernel/bzImage 6819446/tftp-deploy-_g6m80lu/kernel/cmdline 6819446/tftp-deploy-_g6m80lu/ramdisk/ramdisk.cpio.gz
1988 12:44:50.432870 Setting prompt string to ['Starting kernel']
1989 12:44:50.432990 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
1990 12:44:50.433066 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
1991 12:44:50.436770 tftpboot 192.168.201.1 6819446/tftp-deploy-_g6m80lu/kernel/bzImoy-_g6m80lu/kernel/cmdline 6819446/tftp-deploy-_g6m80lu/ramdisk/ramdisk.cpio.gz
1992 12:44:50.436864 Waiting for link
1993 12:44:50.638066 done.
1994 12:44:50.638484 MAC: f4:f5:e8:50:e7:f3
1995 12:44:50.641271 Sending DHCP discover... done.
1996 12:44:50.644407 Waiting for reply... done.
1997 12:44:50.647726 Sending DHCP request... done.
1998 12:44:50.650765 Waiting for reply... done.
1999 12:44:50.654114 My ip is 192.168.201.16
2000 12:44:50.657474 The DHCP server ip is 192.168.201.1
2001 12:44:50.660880 TFTP server IP predefined by user: 192.168.201.1
2002 12:44:50.667126 Bootfile predefined by user: 6819446/tftp-deploy-_g6m80lu/kernel/bzImage
2003 12:44:50.673759 Sending tftp read request... done.
2004 12:44:50.677095 Waiting for the transfer...
2005 12:44:50.940370 00000000 ################################################################
2006 12:44:51.198646 00080000 ################################################################
2007 12:44:51.440708 00100000 ################################################################
2008 12:44:51.670971 00180000 ################################################################
2009 12:44:51.899978 00200000 ################################################################
2010 12:44:52.130144 00280000 ################################################################
2011 12:44:52.357788 00300000 ################################################################
2012 12:44:52.586805 00380000 ################################################################
2013 12:44:52.826017 00400000 ################################################################
2014 12:44:53.057544 00480000 ################################################################
2015 12:44:53.287813 00500000 ################################################################
2016 12:44:53.519739 00580000 ################################################################
2017 12:44:53.746880 00600000 ################################################################ done.
2018 12:44:53.750698 The bootfile was 6811536 bytes long.
2019 12:44:53.753687 Sending tftp read request... done.
2020 12:44:53.757019 Waiting for the transfer...
2021 12:44:54.025834 00000000 ################################################################
2022 12:44:54.259923 00080000 ################################################################
2023 12:44:54.492140 00100000 ################################################################
2024 12:44:54.740034 00180000 ################################################################
2025 12:44:54.982390 00200000 ################################################################
2026 12:44:55.219124 00280000 ################################################################
2027 12:44:55.454560 00300000 ################################################################
2028 12:44:55.722131 00380000 ################################################################
2029 12:44:55.982831 00400000 ################################################################
2030 12:44:56.217422 00480000 ################################################################
2031 12:44:56.465932 00500000 ################################################################
2032 12:44:56.715171 00580000 ################################################################
2033 12:44:56.993486 00600000 ################################################################
2034 12:44:57.274624 00680000 ################################################################
2035 12:44:57.559356 00700000 ################################################################
2036 12:44:57.869954 00780000 ################################################################
2037 12:44:57.955188 00800000 #################### done.
2038 12:44:57.958143 Sending tftp read request... done.
2039 12:44:57.961553 Waiting for the transfer...
2040 12:44:57.961677 00000000 # done.
2041 12:44:57.971436 Command line loaded dynamically from TFTP file: 6819446/tftp-deploy-_g6m80lu/kernel/cmdline
2042 12:44:57.987850 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2043 12:44:57.993937 ec_init(0): CrosEC protocol v3 supported (256, 256)
2044 12:44:58.001620 Shutting down all USB controllers.
2045 12:44:58.001722 Removing current net device
2046 12:44:58.005092 Finalizing coreboot
2047 12:44:58.011600 Exiting depthcharge with code 4 at timestamp: 16917372
2048 12:44:58.011685
2049 12:44:58.011751 Starting kernel ...
2050 12:44:58.012046 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2051 12:44:58.012144 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2052 12:44:58.012240 Setting prompt string to ['Linux version [0-9]']
2053 12:44:58.012341 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2054 12:44:58.012425 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2055 12:44:58.014976
2056 12:44:58.015063
2058 12:49:29.012394 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2060 12:49:29.012607 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2062 12:49:29.012758 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2065 12:49:29.013013 end: 2 depthcharge-action (duration 00:05:00) [common]
2067 12:49:29.013201 Cleaning after the job
2068 12:49:29.013282 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/ramdisk
2069 12:49:29.013930 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/kernel
2070 12:49:29.014440 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819446/tftp-deploy-_g6m80lu/modules
2071 12:49:29.014637 start: 5.1 power-off (timeout 00:00:30) [common]
2072 12:49:29.014796 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2073 12:49:29.034398 >> Command sent successfully.
2074 12:49:29.036269 Returned 0 in 0 seconds
2075 12:49:29.137060 end: 5.1 power-off (duration 00:00:00) [common]
2077 12:49:29.137380 start: 5.2 read-feedback (timeout 00:10:00) [common]
2078 12:49:29.137620 Listened to connection for namespace 'common' for up to 1s
2079 12:49:30.139012 Finalising connection for namespace 'common'
2080 12:49:30.139194 Disconnecting from shell: Finalise
2081 12:49:30.239930 end: 5.2 read-feedback (duration 00:00:01) [common]
2082 12:49:30.240058 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819446
2083 12:49:30.244900 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819446
2084 12:49:30.245023 JobError: Your job cannot terminate cleanly.