Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:50:00.068016 lava-dispatcher, installed at version: 2022.04
2 12:50:00.068194 start: 0 validate
3 12:50:00.068325 Start time: 2022-07-14 12:50:00.068318+00:00 (UTC)
4 12:50:00.068449 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:00.068573 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:50:00.361839 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:00.362603 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:00.660199 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:00.660920 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:50:00.956280 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:50:00.956979 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:50:01.253021 validate duration: 1.18
14 12:50:01.254268 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:50:01.254786 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:50:01.255266 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:50:01.255734 Not decompressing ramdisk as can be used compressed.
18 12:50:01.256163 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220708.0/amd64/initrd.cpio.gz
19 12:50:01.256494 saving as /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/ramdisk/initrd.cpio.gz
20 12:50:01.256807 total size: 5411032 (5MB)
21 12:50:01.261726 progress 0% (0MB)
22 12:50:01.269037 progress 5% (0MB)
23 12:50:01.275824 progress 10% (0MB)
24 12:50:01.281192 progress 15% (0MB)
25 12:50:01.285767 progress 20% (1MB)
26 12:50:01.289065 progress 25% (1MB)
27 12:50:01.291887 progress 30% (1MB)
28 12:50:01.294382 progress 35% (1MB)
29 12:50:01.297009 progress 40% (2MB)
30 12:50:01.299159 progress 45% (2MB)
31 12:50:01.301182 progress 50% (2MB)
32 12:50:01.303158 progress 55% (2MB)
33 12:50:01.305141 progress 60% (3MB)
34 12:50:01.306929 progress 65% (3MB)
35 12:50:01.308610 progress 70% (3MB)
36 12:50:01.310192 progress 75% (3MB)
37 12:50:01.311977 progress 80% (4MB)
38 12:50:01.313487 progress 85% (4MB)
39 12:50:01.314961 progress 90% (4MB)
40 12:50:01.316406 progress 95% (4MB)
41 12:50:01.318020 progress 100% (5MB)
42 12:50:01.318200 5MB downloaded in 0.06s (84.05MB/s)
43 12:50:01.318353 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:50:01.318606 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:50:01.318696 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:50:01.318784 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:50:01.318888 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:50:01.318968 saving as /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/kernel/bzImage
50 12:50:01.319031 total size: 6811536 (6MB)
51 12:50:01.319093 No compression specified
52 12:50:01.320176 progress 0% (0MB)
53 12:50:01.321957 progress 5% (0MB)
54 12:50:01.323680 progress 10% (0MB)
55 12:50:01.325468 progress 15% (1MB)
56 12:50:01.327116 progress 20% (1MB)
57 12:50:01.328730 progress 25% (1MB)
58 12:50:01.330500 progress 30% (1MB)
59 12:50:01.332139 progress 35% (2MB)
60 12:50:01.333871 progress 40% (2MB)
61 12:50:01.335502 progress 45% (2MB)
62 12:50:01.337096 progress 50% (3MB)
63 12:50:01.338832 progress 55% (3MB)
64 12:50:01.340418 progress 60% (3MB)
65 12:50:01.342153 progress 65% (4MB)
66 12:50:01.343772 progress 70% (4MB)
67 12:50:01.345347 progress 75% (4MB)
68 12:50:01.347140 progress 80% (5MB)
69 12:50:01.348738 progress 85% (5MB)
70 12:50:01.350524 progress 90% (5MB)
71 12:50:01.352148 progress 95% (6MB)
72 12:50:01.353750 progress 100% (6MB)
73 12:50:01.354012 6MB downloaded in 0.03s (185.72MB/s)
74 12:50:01.354161 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:50:01.354402 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:50:01.354490 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:50:01.354574 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:50:01.354677 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220708.0/amd64/full.rootfs.tar.xz
80 12:50:01.354743 saving as /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/nfsrootfs/full.rootfs.tar
81 12:50:01.354804 total size: 132942648 (126MB)
82 12:50:01.354865 Using unxz to decompress xz
83 12:50:01.358234 progress 0% (0MB)
84 12:50:01.692132 progress 5% (6MB)
85 12:50:02.050097 progress 10% (12MB)
86 12:50:02.318167 progress 15% (19MB)
87 12:50:02.524989 progress 20% (25MB)
88 12:50:02.783688 progress 25% (31MB)
89 12:50:03.123800 progress 30% (38MB)
90 12:50:03.468221 progress 35% (44MB)
91 12:50:03.860158 progress 40% (50MB)
92 12:50:04.240064 progress 45% (57MB)
93 12:50:04.595017 progress 50% (63MB)
94 12:50:04.964157 progress 55% (69MB)
95 12:50:05.323796 progress 60% (76MB)
96 12:50:05.681512 progress 65% (82MB)
97 12:50:06.039839 progress 70% (88MB)
98 12:50:06.403145 progress 75% (95MB)
99 12:50:06.848600 progress 80% (101MB)
100 12:50:07.297567 progress 85% (107MB)
101 12:50:07.583941 progress 90% (114MB)
102 12:50:07.947601 progress 95% (120MB)
103 12:50:08.358450 progress 100% (126MB)
104 12:50:08.363651 126MB downloaded in 7.01s (18.09MB/s)
105 12:50:08.363945 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:50:08.364282 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:50:08.364375 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:50:08.364466 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:50:08.364601 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:50:08.364703 saving as /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/modules/modules.tar
112 12:50:08.364794 total size: 51960 (0MB)
113 12:50:08.364873 Using unxz to decompress xz
114 12:50:08.368203 progress 63% (0MB)
115 12:50:08.368594 progress 100% (0MB)
116 12:50:08.371955 0MB downloaded in 0.01s (6.91MB/s)
117 12:50:08.372184 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:50:08.372447 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:50:08.372541 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:50:08.372639 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:50:09.606794 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819477/extract-nfsrootfs-zmumg7cf
123 12:50:09.607063 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:50:09.607174 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 12:50:09.607312 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx
126 12:50:09.607415 makedir: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin
127 12:50:09.607500 makedir: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/tests
128 12:50:09.607584 makedir: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/results
129 12:50:09.607683 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-add-keys
130 12:50:09.607812 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-add-sources
131 12:50:09.607926 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-background-process-start
132 12:50:09.608039 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-background-process-stop
133 12:50:09.608150 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-common-functions
134 12:50:09.608259 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-echo-ipv4
135 12:50:09.608368 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-install-packages
136 12:50:09.608476 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-installed-packages
137 12:50:09.608583 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-os-build
138 12:50:09.608691 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-probe-channel
139 12:50:09.608799 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-probe-ip
140 12:50:09.608905 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-target-ip
141 12:50:09.609013 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-target-mac
142 12:50:09.609119 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-target-storage
143 12:50:09.609229 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-case
144 12:50:09.609339 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-event
145 12:50:09.609445 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-feedback
146 12:50:09.609551 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-raise
147 12:50:09.609659 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-reference
148 12:50:09.609765 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-runner
149 12:50:09.609872 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-set
150 12:50:09.609978 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-test-shell
151 12:50:09.610089 Updating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-install-packages (oe)
152 12:50:09.610202 Updating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/bin/lava-installed-packages (oe)
153 12:50:09.610298 Creating /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/environment
154 12:50:09.610382 LAVA metadata
155 12:50:09.610448 - LAVA_JOB_ID=6819477
156 12:50:09.610512 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:50:09.610610 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 12:50:09.610675 skipped lava-vland-overlay
159 12:50:09.610750 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:50:09.610833 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 12:50:09.611106 skipped lava-multinode-overlay
162 12:50:09.611187 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:50:09.611272 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 12:50:09.611346 Loading test definitions
165 12:50:09.611439 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
166 12:50:09.611515 Using /lava-6819477 at stage 0
167 12:50:09.611775 uuid=6819477_1.5.2.3.1 testdef=None
168 12:50:09.611866 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:50:09.611954 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
170 12:50:09.612423 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:50:09.612653 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
173 12:50:09.613212 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:50:09.613451 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
176 12:50:09.613984 runner path: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/0/tests/0_dmesg test_uuid 6819477_1.5.2.3.1
177 12:50:09.614130 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:50:09.614364 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
180 12:50:09.614437 Using /lava-6819477 at stage 1
181 12:50:09.614676 uuid=6819477_1.5.2.3.5 testdef=None
182 12:50:09.614765 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:50:09.614851 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
184 12:50:09.615291 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:50:09.615516 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
187 12:50:09.616081 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:50:09.616319 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
190 12:50:09.616862 runner path: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/1/tests/1_bootrr test_uuid 6819477_1.5.2.3.5
191 12:50:09.617001 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:50:09.617214 Creating lava-test-runner.conf files
194 12:50:09.617278 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/0 for stage 0
195 12:50:09.617360 - 0_dmesg
196 12:50:09.617434 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819477/lava-overlay-vql5eclx/lava-6819477/1 for stage 1
197 12:50:09.617516 - 1_bootrr
198 12:50:09.617606 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:50:09.617692 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
200 12:50:09.623291 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:50:09.623398 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
202 12:50:09.623487 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:50:09.623585 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:50:09.623704 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
205 12:50:09.727753 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:50:09.728117 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
207 12:50:09.728257 extracting modules file /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819477/extract-nfsrootfs-zmumg7cf
208 12:50:09.732834 extracting modules file /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819477/extract-overlay-ramdisk-l4t7wr86/ramdisk
209 12:50:09.736834 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:50:09.736954 start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
211 12:50:09.737053 [common] Applying overlay to NFS
212 12:50:09.737125 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819477/compress-overlay-pkufk3mc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819477/extract-nfsrootfs-zmumg7cf
213 12:50:09.740960 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:50:09.741067 start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
215 12:50:09.741158 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:50:09.741248 start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
217 12:50:09.741328 Building ramdisk /var/lib/lava/dispatcher/tmp/6819477/extract-overlay-ramdisk-l4t7wr86/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819477/extract-overlay-ramdisk-l4t7wr86/ramdisk
218 12:50:09.775840 >> 24434 blocks
219 12:50:10.245769 rename /var/lib/lava/dispatcher/tmp/6819477/extract-overlay-ramdisk-l4t7wr86/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/ramdisk/ramdisk.cpio.gz
220 12:50:10.246171 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:50:10.246292 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 12:50:10.246399 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 12:50:10.246498 No mkimage arch provided, not using FIT.
224 12:50:10.246592 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:50:10.246678 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:50:10.246777 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:50:10.246871 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 12:50:10.246988 No LXC device requested
229 12:50:10.247069 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:50:10.247159 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 12:50:10.247240 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:50:10.247310 Checking files for TFTP limit of 4294967296 bytes.
233 12:50:10.247693 end: 1 tftp-deploy (duration 00:00:09) [common]
234 12:50:10.247800 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:50:10.247897 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:50:10.248032 substitutions:
237 12:50:10.248101 - {DTB}: None
238 12:50:10.248167 - {INITRD}: 6819477/tftp-deploy-q1i_d538/ramdisk/ramdisk.cpio.gz
239 12:50:10.248228 - {KERNEL}: 6819477/tftp-deploy-q1i_d538/kernel/bzImage
240 12:50:10.248287 - {LAVA_MAC}: None
241 12:50:10.248344 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819477/extract-nfsrootfs-zmumg7cf
242 12:50:10.248403 - {NFS_SERVER_IP}: 192.168.201.1
243 12:50:10.248460 - {PRESEED_CONFIG}: None
244 12:50:10.248516 - {PRESEED_LOCAL}: None
245 12:50:10.248571 - {RAMDISK}: 6819477/tftp-deploy-q1i_d538/ramdisk/ramdisk.cpio.gz
246 12:50:10.248627 - {ROOT_PART}: None
247 12:50:10.248682 - {ROOT}: None
248 12:50:10.248738 - {SERVER_IP}: 192.168.201.1
249 12:50:10.248793 - {TEE}: None
250 12:50:10.248859 Parsed boot commands:
251 12:50:10.248929 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:50:10.249086 Parsed boot commands: tftpboot 192.168.201.1 6819477/tftp-deploy-q1i_d538/kernel/bzImage 6819477/tftp-deploy-q1i_d538/kernel/cmdline 6819477/tftp-deploy-q1i_d538/ramdisk/ramdisk.cpio.gz
253 12:50:10.249176 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:50:10.249267 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:50:10.249359 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:50:10.249445 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:50:10.249525 Not connected, no need to disconnect.
258 12:50:10.249605 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:50:10.249692 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:50:10.249761 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
261 12:50:10.252577 Setting prompt string to ['lava-test: # ']
262 12:50:10.252873 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:50:10.252983 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:50:10.253082 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:50:10.253171 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:50:10.253350 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
267 12:50:10.273390 >> Command sent successfully.
268 12:50:10.275557 Returned 0 in 0 seconds
269 12:50:10.376366 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:50:10.376744 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:50:10.376845 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:50:10.376936 Setting prompt string to 'Starting depthcharge on Helios...'
274 12:50:10.377002 Changing prompt to 'Starting depthcharge on Helios...'
275 12:50:10.377071 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 12:50:10.377340 [Enter `^Ec?' for help]
277 12:50:16.903671
278 12:50:16.903846
279 12:50:16.913486 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 12:50:16.916635 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 12:50:16.923209 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 12:50:16.926552 CPU: AES supported, TXT NOT supported, VT supported
283 12:50:16.933022 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 12:50:16.939480 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 12:50:16.942921 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 12:50:16.945959 VBOOT: Loading verstage.
287 12:50:16.952677 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
288 12:50:16.955872 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 12:50:16.962626 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 12:50:16.965740 CBFS @ c08000 size 3f8000
291 12:50:16.968969 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 12:50:16.972194 CBFS: Locating 'fallback/verstage'
293 12:50:16.978704 CBFS: Found @ offset 10fb80 size 1072c
294 12:50:16.978793
295 12:50:16.978861
296 12:50:16.988445 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 12:50:17.004400 Probing TPM: . done!
298 12:50:17.007845 TPM ready after 0 ms
299 12:50:17.011214 Connected to device vid:did:rid of 1ae0:0028:00
300 12:50:17.021411 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
301 12:50:17.024863 Initialized TPM device CR50 revision 0
302 12:50:17.069642 tlcl_send_startup: Startup return code is 0
303 12:50:17.069785 TPM: setup succeeded
304 12:50:17.082255 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 12:50:17.085951 Chrome EC: UHEPI supported
306 12:50:17.089246 Phase 1
307 12:50:17.092394 FMAP: area GBB found @ c05000 (12288 bytes)
308 12:50:17.099249 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 12:50:17.102434 Phase 2
310 12:50:17.102519 Phase 3
311 12:50:17.105546 FMAP: area GBB found @ c05000 (12288 bytes)
312 12:50:17.112245 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 12:50:17.118787 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 12:50:17.122052 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 12:50:17.128654 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 12:50:17.144531 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 12:50:17.147673 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 12:50:17.154484 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 12:50:17.158983 Phase 4
320 12:50:17.162313 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
321 12:50:17.171814 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 12:50:17.348499 VB2:vb2_rsa_verify_digest() Digest check failed!
323 12:50:17.355138 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
324 12:50:17.355331 Saving nvdata
325 12:50:17.358439 Reboot requested (10020007)
326 12:50:17.361724 board_reset() called!
327 12:50:17.361905 full_reset() called!
328 12:50:21.870396
329 12:50:21.870549
330 12:50:21.880029 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
331 12:50:21.883322 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
332 12:50:21.890154 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
333 12:50:21.893051 CPU: AES supported, TXT NOT supported, VT supported
334 12:50:21.899738 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
335 12:50:21.906191 PCH: device id 0284 (rev 00) is Cometlake-U Premium
336 12:50:21.909482 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
337 12:50:21.912888 VBOOT: Loading verstage.
338 12:50:21.919473 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
339 12:50:21.922484 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
340 12:50:21.929418 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 12:50:21.929500 CBFS @ c08000 size 3f8000
342 12:50:21.935979 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 12:50:21.939224 CBFS: Locating 'fallback/verstage'
344 12:50:21.945695 CBFS: Found @ offset 10fb80 size 1072c
345 12:50:21.945780
346 12:50:21.945848
347 12:50:21.955650 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
348 12:50:21.971235 Probing TPM: . done!
349 12:50:21.974677 TPM ready after 0 ms
350 12:50:21.978007 Connected to device vid:did:rid of 1ae0:0028:00
351 12:50:21.988173 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
352 12:50:21.991634 Initialized TPM device CR50 revision 0
353 12:50:22.036194 tlcl_send_startup: Startup return code is 0
354 12:50:22.036287 TPM: setup succeeded
355 12:50:22.048888 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
356 12:50:22.052869 Chrome EC: UHEPI supported
357 12:50:22.056112 Phase 1
358 12:50:22.059193 FMAP: area GBB found @ c05000 (12288 bytes)
359 12:50:22.066192 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
360 12:50:22.072603 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
361 12:50:22.075733 Recovery requested (1009000e)
362 12:50:22.081847 Saving nvdata
363 12:50:22.087991 tlcl_extend: response is 0
364 12:50:22.096522 tlcl_extend: response is 0
365 12:50:22.103405 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 12:50:22.106653 CBFS @ c08000 size 3f8000
367 12:50:22.113200 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 12:50:22.116589 CBFS: Locating 'fallback/romstage'
369 12:50:22.119689 CBFS: Found @ offset 80 size 145fc
370 12:50:22.123116 Accumulated console time in verstage 99 ms
371 12:50:22.123194
372 12:50:22.126266
373 12:50:22.136059 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
374 12:50:22.142962 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
375 12:50:22.146093 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 12:50:22.149358 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 12:50:22.156116 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
378 12:50:22.159335 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
379 12:50:22.162524 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
380 12:50:22.166073 TCO_STS: 0000 0000
381 12:50:22.169276 GEN_PMCON: e0015238 00000200
382 12:50:22.172416 GBLRST_CAUSE: 00000000 00000000
383 12:50:22.172489 prev_sleep_state 5
384 12:50:22.176611 Boot Count incremented to 25946
385 12:50:22.183298 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 12:50:22.186730 CBFS @ c08000 size 3f8000
387 12:50:22.193252 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 12:50:22.193333 CBFS: Locating 'fspm.bin'
389 12:50:22.199841 CBFS: Found @ offset 5ffc0 size 71000
390 12:50:22.203147 Chrome EC: UHEPI supported
391 12:50:22.209528 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
392 12:50:22.213365 Probing TPM: done!
393 12:50:22.219740 Connected to device vid:did:rid of 1ae0:0028:00
394 12:50:22.229633 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
395 12:50:22.236336 Initialized TPM device CR50 revision 0
396 12:50:22.245779 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 12:50:22.255534 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
398 12:50:22.255618 MRC cache found, size 1948
399 12:50:22.259090 bootmode is set to: 2
400 12:50:22.262341 PRMRR disabled by config.
401 12:50:22.265475 SPD INDEX = 1
402 12:50:22.268871 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 12:50:22.272116 CBFS @ c08000 size 3f8000
404 12:50:22.278632 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 12:50:22.278713 CBFS: Locating 'spd.bin'
406 12:50:22.281910 CBFS: Found @ offset 5fb80 size 400
407 12:50:22.285475 SPD: module type is LPDDR3
408 12:50:22.288686 SPD: module part is
409 12:50:22.295258 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 12:50:22.298663 SPD: device width 4 bits, bus width 8 bits
411 12:50:22.302312 SPD: module size is 4096 MB (per channel)
412 12:50:22.305456 memory slot: 0 configuration done.
413 12:50:22.308518 memory slot: 2 configuration done.
414 12:50:22.359679 CBMEM:
415 12:50:22.363026 IMD: root @ 99fff000 254 entries.
416 12:50:22.366275 IMD: root @ 99ffec00 62 entries.
417 12:50:22.369668 External stage cache:
418 12:50:22.372802 IMD: root @ 9abff000 254 entries.
419 12:50:22.376173 IMD: root @ 9abfec00 62 entries.
420 12:50:22.383107 Chrome EC: clear events_b mask to 0x0000000020004000
421 12:50:22.396725 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 12:50:22.411767 tlcl_write: response is 0
423 12:50:22.421377 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 12:50:22.428145 MRC: TPM MRC hash updated successfully.
425 12:50:22.428231 2 DIMMs found
426 12:50:22.431328 SMM Memory Map
427 12:50:22.434471 SMRAM : 0x9a000000 0x1000000
428 12:50:22.437753 Subregion 0: 0x9a000000 0xa00000
429 12:50:22.440940 Subregion 1: 0x9aa00000 0x200000
430 12:50:22.444337 Subregion 2: 0x9ac00000 0x400000
431 12:50:22.447690 top_of_ram = 0x9a000000
432 12:50:22.451084 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 12:50:22.457664 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 12:50:22.460943 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 12:50:22.467408 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 12:50:22.470492 CBFS @ c08000 size 3f8000
437 12:50:22.477249 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 12:50:22.480481 CBFS: Locating 'fallback/postcar'
439 12:50:22.483724 CBFS: Found @ offset 107000 size 4b44
440 12:50:22.490299 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 12:50:22.500695 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 12:50:22.503716 Processing 180 relocs. Offset value of 0x97c0c000
443 12:50:22.512155 Accumulated console time in romstage 286 ms
444 12:50:22.512241
445 12:50:22.512309
446 12:50:22.522301 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 12:50:22.528827 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 12:50:22.531934 CBFS @ c08000 size 3f8000
449 12:50:22.538699 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 12:50:22.541925 CBFS: Locating 'fallback/ramstage'
451 12:50:22.545369 CBFS: Found @ offset 43380 size 1b9e8
452 12:50:22.551619 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
453 12:50:22.583865 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
454 12:50:22.590541 Processing 3976 relocs. Offset value of 0x98db0000
455 12:50:22.593945 Accumulated console time in postcar 52 ms
456 12:50:22.594042
457 12:50:22.594111
458 12:50:22.603657 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
459 12:50:22.610088 FMAP: area RO_VPD found @ c00000 (16384 bytes)
460 12:50:22.613449 WARNING: RO_VPD is uninitialized or empty.
461 12:50:22.616792 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 12:50:22.623357 WARNING: RW_VPD is uninitialized or empty.
463 12:50:22.623456 Normal boot.
464 12:50:22.629820 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 12:50:22.632938 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 12:50:22.636506 CBFS @ c08000 size 3f8000
467 12:50:22.643122 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 12:50:22.646518 CBFS: Locating 'cpu_microcode_blob.bin'
469 12:50:22.649400 CBFS: Found @ offset 14700 size 2ec00
470 12:50:22.652840 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 12:50:22.656212 Skip microcode update
472 12:50:22.662628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 12:50:22.662713 CBFS @ c08000 size 3f8000
474 12:50:22.669485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 12:50:22.672642 CBFS: Locating 'fsps.bin'
476 12:50:22.675879 CBFS: Found @ offset d1fc0 size 35000
477 12:50:22.701909 Detected 4 core, 8 thread CPU.
478 12:50:22.705409 Setting up SMI for CPU
479 12:50:22.708700 IED base = 0x9ac00000
480 12:50:22.711821 IED size = 0x00400000
481 12:50:22.711905 Will perform SMM setup.
482 12:50:22.718268 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 12:50:22.724882 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 12:50:22.731439 Processing 16 relocs. Offset value of 0x00030000
485 12:50:22.734690 Attempting to start 7 APs
486 12:50:22.737807 Waiting for 10ms after sending INIT.
487 12:50:22.751694 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
488 12:50:22.751793 done.
489 12:50:22.754851 AP: slot 1 apic_id 2.
490 12:50:22.758540 AP: slot 4 apic_id 3.
491 12:50:22.758626 AP: slot 6 apic_id 4.
492 12:50:22.761605 AP: slot 7 apic_id 5.
493 12:50:22.764853 Waiting for 2nd SIPI to complete...done.
494 12:50:22.768198 AP: slot 2 apic_id 7.
495 12:50:22.771455 AP: slot 5 apic_id 6.
496 12:50:22.778126 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 12:50:22.784490 Processing 13 relocs. Offset value of 0x00038000
498 12:50:22.791419 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 12:50:22.794641 Installing SMM handler to 0x9a000000
500 12:50:22.801299 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 12:50:22.807589 Processing 658 relocs. Offset value of 0x9a010000
502 12:50:22.814406 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 12:50:22.817506 Processing 13 relocs. Offset value of 0x9a008000
504 12:50:22.824377 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 12:50:22.830689 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 12:50:22.837352 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 12:50:22.840944 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 12:50:22.847243 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 12:50:22.853654 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 12:50:22.860281 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 12:50:22.866890 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 12:50:22.869942 Clearing SMI status registers
513 12:50:22.870027 SMI_STS: PM1
514 12:50:22.873269 PM1_STS: PWRBTN
515 12:50:22.873354 TCO_STS: SECOND_TO
516 12:50:22.876582 New SMBASE 0x9a000000
517 12:50:22.879996 In relocation handler: CPU 0
518 12:50:22.883227 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 12:50:22.889963 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 12:50:22.890050 Relocation complete.
521 12:50:22.893052 New SMBASE 0x99fff400
522 12:50:22.896417 In relocation handler: CPU 3
523 12:50:22.899647 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
524 12:50:22.906179 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 12:50:22.906265 Relocation complete.
526 12:50:22.909462 New SMBASE 0x99ffe800
527 12:50:22.912659 In relocation handler: CPU 6
528 12:50:22.915917 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
529 12:50:22.922733 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 12:50:22.922818 Relocation complete.
531 12:50:22.926001 New SMBASE 0x99fff800
532 12:50:22.929177 In relocation handler: CPU 2
533 12:50:22.932569 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
534 12:50:22.939148 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 12:50:22.939233 Relocation complete.
536 12:50:22.942320 New SMBASE 0x99ffec00
537 12:50:22.945620 In relocation handler: CPU 5
538 12:50:22.948761 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
539 12:50:22.955303 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:50:22.955386 Relocation complete.
541 12:50:22.958744 New SMBASE 0x99ffe400
542 12:50:22.961825 In relocation handler: CPU 7
543 12:50:22.965204 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
544 12:50:22.971645 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:50:22.971721 Relocation complete.
546 12:50:22.974795 New SMBASE 0x99fff000
547 12:50:22.978196 In relocation handler: CPU 4
548 12:50:22.981421 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 12:50:22.988207 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:50:22.988289 Relocation complete.
551 12:50:22.991406 New SMBASE 0x99fffc00
552 12:50:22.994770 In relocation handler: CPU 1
553 12:50:22.997749 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 12:50:23.004617 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:50:23.004695 Relocation complete.
556 12:50:23.007804 Initializing CPU #0
557 12:50:23.011132 CPU: vendor Intel device 806ec
558 12:50:23.014513 CPU: family 06, model 8e, stepping 0c
559 12:50:23.017861 Clearing out pending MCEs
560 12:50:23.020847 Setting up local APIC...
561 12:50:23.020922 apic_id: 0x00 done.
562 12:50:23.024287 Turbo is available but hidden
563 12:50:23.027908 Turbo is available and visible
564 12:50:23.031143 VMX status: enabled
565 12:50:23.034300 IA32_FEATURE_CONTROL status: locked
566 12:50:23.037450 Skip microcode update
567 12:50:23.037529 CPU #0 initialized
568 12:50:23.040673 Initializing CPU #3
569 12:50:23.043768 Initializing CPU #4
570 12:50:23.043847 Initializing CPU #1
571 12:50:23.047210 CPU: vendor Intel device 806ec
572 12:50:23.050496 CPU: family 06, model 8e, stepping 0c
573 12:50:23.053948 CPU: vendor Intel device 806ec
574 12:50:23.057083 CPU: family 06, model 8e, stepping 0c
575 12:50:23.060444 Clearing out pending MCEs
576 12:50:23.063611 Clearing out pending MCEs
577 12:50:23.066860 Setting up local APIC...
578 12:50:23.066957 Initializing CPU #7
579 12:50:23.070247 Initializing CPU #6
580 12:50:23.073634 Initializing CPU #5
581 12:50:23.073709 Initializing CPU #2
582 12:50:23.076642 CPU: vendor Intel device 806ec
583 12:50:23.080198 CPU: family 06, model 8e, stepping 0c
584 12:50:23.083483 CPU: vendor Intel device 806ec
585 12:50:23.086690 CPU: family 06, model 8e, stepping 0c
586 12:50:23.089833 Clearing out pending MCEs
587 12:50:23.093026 Clearing out pending MCEs
588 12:50:23.096491 Setting up local APIC...
589 12:50:23.096565 apic_id: 0x03 done.
590 12:50:23.099821 Setting up local APIC...
591 12:50:23.102947 CPU: vendor Intel device 806ec
592 12:50:23.106419 CPU: family 06, model 8e, stepping 0c
593 12:50:23.109606 VMX status: enabled
594 12:50:23.112884 apic_id: 0x02 done.
595 12:50:23.116233 IA32_FEATURE_CONTROL status: locked
596 12:50:23.116305 VMX status: enabled
597 12:50:23.119649 Skip microcode update
598 12:50:23.122649 IA32_FEATURE_CONTROL status: locked
599 12:50:23.126109 CPU #4 initialized
600 12:50:23.126182 Skip microcode update
601 12:50:23.129141 CPU: vendor Intel device 806ec
602 12:50:23.135790 CPU: family 06, model 8e, stepping 0c
603 12:50:23.135865 Clearing out pending MCEs
604 12:50:23.139130 CPU #1 initialized
605 12:50:23.142351 Setting up local APIC...
606 12:50:23.142424 apic_id: 0x06 done.
607 12:50:23.145724 Setting up local APIC...
608 12:50:23.149030 apic_id: 0x01 done.
609 12:50:23.152435 CPU: vendor Intel device 806ec
610 12:50:23.155474 CPU: family 06, model 8e, stepping 0c
611 12:50:23.158829 Clearing out pending MCEs
612 12:50:23.158928 Clearing out pending MCEs
613 12:50:23.162096 Setting up local APIC...
614 12:50:23.165601 VMX status: enabled
615 12:50:23.168968 Setting up local APIC...
616 12:50:23.172069 IA32_FEATURE_CONTROL status: locked
617 12:50:23.172146 apic_id: 0x04 done.
618 12:50:23.175440 apic_id: 0x05 done.
619 12:50:23.178517 VMX status: enabled
620 12:50:23.178589 VMX status: enabled
621 12:50:23.181891 IA32_FEATURE_CONTROL status: locked
622 12:50:23.185361 VMX status: enabled
623 12:50:23.188515 apic_id: 0x07 done.
624 12:50:23.191888 IA32_FEATURE_CONTROL status: locked
625 12:50:23.191964 VMX status: enabled
626 12:50:23.194920 Skip microcode update
627 12:50:23.198286 IA32_FEATURE_CONTROL status: locked
628 12:50:23.201631 Skip microcode update
629 12:50:23.204762 IA32_FEATURE_CONTROL status: locked
630 12:50:23.208216 CPU #6 initialized
631 12:50:23.208289 Skip microcode update
632 12:50:23.211568 Skip microcode update
633 12:50:23.211644 CPU #5 initialized
634 12:50:23.214709 CPU #2 initialized
635 12:50:23.218041 CPU #7 initialized
636 12:50:23.218113 Skip microcode update
637 12:50:23.221264 CPU #3 initialized
638 12:50:23.224538 bsp_do_flight_plan done after 457 msecs.
639 12:50:23.227960 CPU: frequency set to 4200 MHz
640 12:50:23.231191 Enabling SMIs.
641 12:50:23.231262 Locking SMM.
642 12:50:23.246121 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 12:50:23.249499 CBFS @ c08000 size 3f8000
644 12:50:23.256187 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 12:50:23.256268 CBFS: Locating 'vbt.bin'
646 12:50:23.262552 CBFS: Found @ offset 5f5c0 size 499
647 12:50:23.266025 Found a VBT of 4608 bytes after decompression
648 12:50:23.448549 Display FSP Version Info HOB
649 12:50:23.451532 Reference Code - CPU = 9.0.1e.30
650 12:50:23.454983 uCode Version = 0.0.0.ca
651 12:50:23.458127 TXT ACM version = ff.ff.ff.ffff
652 12:50:23.461485 Display FSP Version Info HOB
653 12:50:23.464833 Reference Code - ME = 9.0.1e.30
654 12:50:23.467910 MEBx version = 0.0.0.0
655 12:50:23.471196 ME Firmware Version = Consumer SKU
656 12:50:23.474573 Display FSP Version Info HOB
657 12:50:23.477812 Reference Code - CML PCH = 9.0.1e.30
658 12:50:23.481020 PCH-CRID Status = Disabled
659 12:50:23.484166 PCH-CRID Original Value = ff.ff.ff.ffff
660 12:50:23.487756 PCH-CRID New Value = ff.ff.ff.ffff
661 12:50:23.490670 OPROM - RST - RAID = ff.ff.ff.ffff
662 12:50:23.494054 ChipsetInit Base Version = ff.ff.ff.ffff
663 12:50:23.500589 ChipsetInit Oem Version = ff.ff.ff.ffff
664 12:50:23.500666 Display FSP Version Info HOB
665 12:50:23.507315 Reference Code - SA - System Agent = 9.0.1e.30
666 12:50:23.510245 Reference Code - MRC = 0.7.1.6c
667 12:50:23.513846 SA - PCIe Version = 9.0.1e.30
668 12:50:23.516854 SA-CRID Status = Disabled
669 12:50:23.520406 SA-CRID Original Value = 0.0.0.c
670 12:50:23.520478 SA-CRID New Value = 0.0.0.c
671 12:50:23.523404 OPROM - VBIOS = ff.ff.ff.ffff
672 12:50:23.527441 RTC Init
673 12:50:23.530548 Set power on after power failure.
674 12:50:23.533730 Disabling Deep S3
675 12:50:23.533817 Disabling Deep S3
676 12:50:23.536919 Disabling Deep S4
677 12:50:23.537004 Disabling Deep S4
678 12:50:23.540195 Disabling Deep S5
679 12:50:23.540262 Disabling Deep S5
680 12:50:23.546856 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
681 12:50:23.550190 Enumerating buses...
682 12:50:23.553309 Show all devs... Before device enumeration.
683 12:50:23.556553 Root Device: enabled 1
684 12:50:23.559938 CPU_CLUSTER: 0: enabled 1
685 12:50:23.560012 DOMAIN: 0000: enabled 1
686 12:50:23.563035 APIC: 00: enabled 1
687 12:50:23.566408 PCI: 00:00.0: enabled 1
688 12:50:23.569696 PCI: 00:02.0: enabled 1
689 12:50:23.569768 PCI: 00:04.0: enabled 0
690 12:50:23.573029 PCI: 00:05.0: enabled 0
691 12:50:23.576130 PCI: 00:12.0: enabled 1
692 12:50:23.576199 PCI: 00:12.5: enabled 0
693 12:50:23.579581 PCI: 00:12.6: enabled 0
694 12:50:23.582781 PCI: 00:14.0: enabled 1
695 12:50:23.585845 PCI: 00:14.1: enabled 0
696 12:50:23.585916 PCI: 00:14.3: enabled 1
697 12:50:23.589093 PCI: 00:14.5: enabled 0
698 12:50:23.592488 PCI: 00:15.0: enabled 1
699 12:50:23.595639 PCI: 00:15.1: enabled 1
700 12:50:23.595710 PCI: 00:15.2: enabled 0
701 12:50:23.598975 PCI: 00:15.3: enabled 0
702 12:50:23.602198 PCI: 00:16.0: enabled 1
703 12:50:23.605634 PCI: 00:16.1: enabled 0
704 12:50:23.605705 PCI: 00:16.2: enabled 0
705 12:50:23.608887 PCI: 00:16.3: enabled 0
706 12:50:23.612110 PCI: 00:16.4: enabled 0
707 12:50:23.615669 PCI: 00:16.5: enabled 0
708 12:50:23.615740 PCI: 00:17.0: enabled 1
709 12:50:23.619000 PCI: 00:19.0: enabled 1
710 12:50:23.621948 PCI: 00:19.1: enabled 0
711 12:50:23.625322 PCI: 00:19.2: enabled 0
712 12:50:23.625393 PCI: 00:1a.0: enabled 0
713 12:50:23.628528 PCI: 00:1c.0: enabled 0
714 12:50:23.631617 PCI: 00:1c.1: enabled 0
715 12:50:23.634779 PCI: 00:1c.2: enabled 0
716 12:50:23.634849 PCI: 00:1c.3: enabled 0
717 12:50:23.638202 PCI: 00:1c.4: enabled 0
718 12:50:23.641524 PCI: 00:1c.5: enabled 0
719 12:50:23.644807 PCI: 00:1c.6: enabled 0
720 12:50:23.644878 PCI: 00:1c.7: enabled 0
721 12:50:23.648178 PCI: 00:1d.0: enabled 1
722 12:50:23.651250 PCI: 00:1d.1: enabled 0
723 12:50:23.654362 PCI: 00:1d.2: enabled 0
724 12:50:23.654441 PCI: 00:1d.3: enabled 0
725 12:50:23.657941 PCI: 00:1d.4: enabled 0
726 12:50:23.661169 PCI: 00:1d.5: enabled 1
727 12:50:23.664377 PCI: 00:1e.0: enabled 1
728 12:50:23.664451 PCI: 00:1e.1: enabled 0
729 12:50:23.667481 PCI: 00:1e.2: enabled 1
730 12:50:23.670771 PCI: 00:1e.3: enabled 1
731 12:50:23.674128 PCI: 00:1f.0: enabled 1
732 12:50:23.674199 PCI: 00:1f.1: enabled 1
733 12:50:23.677485 PCI: 00:1f.2: enabled 1
734 12:50:23.680849 PCI: 00:1f.3: enabled 1
735 12:50:23.683729 PCI: 00:1f.4: enabled 1
736 12:50:23.683808 PCI: 00:1f.5: enabled 1
737 12:50:23.687398 PCI: 00:1f.6: enabled 0
738 12:50:23.690560 USB0 port 0: enabled 1
739 12:50:23.690634 I2C: 00:15: enabled 1
740 12:50:23.693755 I2C: 00:5d: enabled 1
741 12:50:23.697049 GENERIC: 0.0: enabled 1
742 12:50:23.700219 I2C: 00:1a: enabled 1
743 12:50:23.700290 I2C: 00:38: enabled 1
744 12:50:23.703563 I2C: 00:39: enabled 1
745 12:50:23.706744 I2C: 00:3a: enabled 1
746 12:50:23.706815 I2C: 00:3b: enabled 1
747 12:50:23.710071 PCI: 00:00.0: enabled 1
748 12:50:23.713477 SPI: 00: enabled 1
749 12:50:23.713555 SPI: 01: enabled 1
750 12:50:23.716596 PNP: 0c09.0: enabled 1
751 12:50:23.719761 USB2 port 0: enabled 1
752 12:50:23.719832 USB2 port 1: enabled 1
753 12:50:23.723307 USB2 port 2: enabled 0
754 12:50:23.726596 USB2 port 3: enabled 0
755 12:50:23.729722 USB2 port 5: enabled 0
756 12:50:23.729821 USB2 port 6: enabled 1
757 12:50:23.733171 USB2 port 9: enabled 1
758 12:50:23.736218 USB3 port 0: enabled 1
759 12:50:23.736302 USB3 port 1: enabled 1
760 12:50:23.739522 USB3 port 2: enabled 1
761 12:50:23.742828 USB3 port 3: enabled 1
762 12:50:23.746000 USB3 port 4: enabled 0
763 12:50:23.746086 APIC: 02: enabled 1
764 12:50:23.749374 APIC: 07: enabled 1
765 12:50:23.749480 APIC: 01: enabled 1
766 12:50:23.752528 APIC: 03: enabled 1
767 12:50:23.755841 APIC: 06: enabled 1
768 12:50:23.755945 APIC: 04: enabled 1
769 12:50:23.759086 APIC: 05: enabled 1
770 12:50:23.762244 Compare with tree...
771 12:50:23.762345 Root Device: enabled 1
772 12:50:23.765524 CPU_CLUSTER: 0: enabled 1
773 12:50:23.768868 APIC: 00: enabled 1
774 12:50:23.768969 APIC: 02: enabled 1
775 12:50:23.772130 APIC: 07: enabled 1
776 12:50:23.775425 APIC: 01: enabled 1
777 12:50:23.778733 APIC: 03: enabled 1
778 12:50:23.778834 APIC: 06: enabled 1
779 12:50:23.782057 APIC: 04: enabled 1
780 12:50:23.785282 APIC: 05: enabled 1
781 12:50:23.785367 DOMAIN: 0000: enabled 1
782 12:50:23.788271 PCI: 00:00.0: enabled 1
783 12:50:23.791601 PCI: 00:02.0: enabled 1
784 12:50:23.795064 PCI: 00:04.0: enabled 0
785 12:50:23.798314 PCI: 00:05.0: enabled 0
786 12:50:23.798398 PCI: 00:12.0: enabled 1
787 12:50:23.801401 PCI: 00:12.5: enabled 0
788 12:50:23.804685 PCI: 00:12.6: enabled 0
789 12:50:23.808086 PCI: 00:14.0: enabled 1
790 12:50:23.811390 USB0 port 0: enabled 1
791 12:50:23.811492 USB2 port 0: enabled 1
792 12:50:23.814673 USB2 port 1: enabled 1
793 12:50:23.817733 USB2 port 2: enabled 0
794 12:50:23.821075 USB2 port 3: enabled 0
795 12:50:23.824471 USB2 port 5: enabled 0
796 12:50:23.827828 USB2 port 6: enabled 1
797 12:50:23.827913 USB2 port 9: enabled 1
798 12:50:23.830847 USB3 port 0: enabled 1
799 12:50:23.834049 USB3 port 1: enabled 1
800 12:50:23.837463 USB3 port 2: enabled 1
801 12:50:23.840759 USB3 port 3: enabled 1
802 12:50:23.843853 USB3 port 4: enabled 0
803 12:50:23.843937 PCI: 00:14.1: enabled 0
804 12:50:23.847017 PCI: 00:14.3: enabled 1
805 12:50:23.850393 PCI: 00:14.5: enabled 0
806 12:50:23.853817 PCI: 00:15.0: enabled 1
807 12:50:23.856964 I2C: 00:15: enabled 1
808 12:50:23.857065 PCI: 00:15.1: enabled 1
809 12:50:23.860239 I2C: 00:5d: enabled 1
810 12:50:23.863406 GENERIC: 0.0: enabled 1
811 12:50:23.866844 PCI: 00:15.2: enabled 0
812 12:50:23.870028 PCI: 00:15.3: enabled 0
813 12:50:23.870114 PCI: 00:16.0: enabled 1
814 12:50:23.873101 PCI: 00:16.1: enabled 0
815 12:50:23.876613 PCI: 00:16.2: enabled 0
816 12:50:23.879875 PCI: 00:16.3: enabled 0
817 12:50:23.883109 PCI: 00:16.4: enabled 0
818 12:50:23.883193 PCI: 00:16.5: enabled 0
819 12:50:23.886399 PCI: 00:17.0: enabled 1
820 12:50:23.889657 PCI: 00:19.0: enabled 1
821 12:50:23.893023 I2C: 00:1a: enabled 1
822 12:50:23.896070 I2C: 00:38: enabled 1
823 12:50:23.896154 I2C: 00:39: enabled 1
824 12:50:23.899385 I2C: 00:3a: enabled 1
825 12:50:23.902523 I2C: 00:3b: enabled 1
826 12:50:23.905962 PCI: 00:19.1: enabled 0
827 12:50:23.909430 PCI: 00:19.2: enabled 0
828 12:50:23.909531 PCI: 00:1a.0: enabled 0
829 12:50:23.912613 PCI: 00:1c.0: enabled 0
830 12:50:23.915885 PCI: 00:1c.1: enabled 0
831 12:50:23.919110 PCI: 00:1c.2: enabled 0
832 12:50:23.922160 PCI: 00:1c.3: enabled 0
833 12:50:23.922245 PCI: 00:1c.4: enabled 0
834 12:50:23.925581 PCI: 00:1c.5: enabled 0
835 12:50:23.928835 PCI: 00:1c.6: enabled 0
836 12:50:23.932296 PCI: 00:1c.7: enabled 0
837 12:50:23.935247 PCI: 00:1d.0: enabled 1
838 12:50:23.935331 PCI: 00:1d.1: enabled 0
839 12:50:23.938998 PCI: 00:1d.2: enabled 0
840 12:50:23.941713 PCI: 00:1d.3: enabled 0
841 12:50:23.945081 PCI: 00:1d.4: enabled 0
842 12:50:23.948336 PCI: 00:1d.5: enabled 1
843 12:50:23.951713 PCI: 00:00.0: enabled 1
844 12:50:23.951798 PCI: 00:1e.0: enabled 1
845 12:50:23.954865 PCI: 00:1e.1: enabled 0
846 12:50:23.958154 PCI: 00:1e.2: enabled 1
847 12:50:23.961420 SPI: 00: enabled 1
848 12:50:23.961505 PCI: 00:1e.3: enabled 1
849 12:50:23.964911 SPI: 01: enabled 1
850 12:50:23.967959 PCI: 00:1f.0: enabled 1
851 12:50:23.971357 PNP: 0c09.0: enabled 1
852 12:50:23.971442 PCI: 00:1f.1: enabled 1
853 12:50:23.974764 PCI: 00:1f.2: enabled 1
854 12:50:23.977865 PCI: 00:1f.3: enabled 1
855 12:50:23.981174 PCI: 00:1f.4: enabled 1
856 12:50:23.984367 PCI: 00:1f.5: enabled 1
857 12:50:23.987580 PCI: 00:1f.6: enabled 0
858 12:50:23.987681 Root Device scanning...
859 12:50:23.991080 scan_static_bus for Root Device
860 12:50:23.994132 CPU_CLUSTER: 0 enabled
861 12:50:23.997401 DOMAIN: 0000 enabled
862 12:50:24.000771 DOMAIN: 0000 scanning...
863 12:50:24.003872 PCI: pci_scan_bus for bus 00
864 12:50:24.003973 PCI: 00:00.0 [8086/0000] ops
865 12:50:24.007046 PCI: 00:00.0 [8086/9b61] enabled
866 12:50:24.010360 PCI: 00:02.0 [8086/0000] bus ops
867 12:50:24.013702 PCI: 00:02.0 [8086/9b41] enabled
868 12:50:24.020250 PCI: 00:04.0 [8086/1903] disabled
869 12:50:24.023661 PCI: 00:08.0 [8086/1911] enabled
870 12:50:24.026791 PCI: 00:12.0 [8086/02f9] enabled
871 12:50:24.030372 PCI: 00:14.0 [8086/0000] bus ops
872 12:50:24.033232 PCI: 00:14.0 [8086/02ed] enabled
873 12:50:24.036623 PCI: 00:14.2 [8086/02ef] enabled
874 12:50:24.039759 PCI: 00:14.3 [8086/02f0] enabled
875 12:50:24.043210 PCI: 00:15.0 [8086/0000] bus ops
876 12:50:24.046446 PCI: 00:15.0 [8086/02e8] enabled
877 12:50:24.049557 PCI: 00:15.1 [8086/0000] bus ops
878 12:50:24.052712 PCI: 00:15.1 [8086/02e9] enabled
879 12:50:24.055952 PCI: 00:16.0 [8086/0000] ops
880 12:50:24.059586 PCI: 00:16.0 [8086/02e0] enabled
881 12:50:24.062530 PCI: 00:17.0 [8086/0000] ops
882 12:50:24.065978 PCI: 00:17.0 [8086/02d3] enabled
883 12:50:24.069212 PCI: 00:19.0 [8086/0000] bus ops
884 12:50:24.072427 PCI: 00:19.0 [8086/02c5] enabled
885 12:50:24.075953 PCI: 00:1d.0 [8086/0000] bus ops
886 12:50:24.078829 PCI: 00:1d.0 [8086/02b0] enabled
887 12:50:24.082045 PCI: Static device PCI: 00:1d.5 not found, disabling it.
888 12:50:24.085611 PCI: 00:1e.0 [8086/0000] ops
889 12:50:24.088757 PCI: 00:1e.0 [8086/02a8] enabled
890 12:50:24.091986 PCI: 00:1e.2 [8086/0000] bus ops
891 12:50:24.095306 PCI: 00:1e.2 [8086/02aa] enabled
892 12:50:24.098693 PCI: 00:1e.3 [8086/0000] bus ops
893 12:50:24.101655 PCI: 00:1e.3 [8086/02ab] enabled
894 12:50:24.105249 PCI: 00:1f.0 [8086/0000] bus ops
895 12:50:24.108623 PCI: 00:1f.0 [8086/0284] enabled
896 12:50:24.114802 PCI: Static device PCI: 00:1f.1 not found, disabling it.
897 12:50:24.121554 PCI: Static device PCI: 00:1f.2 not found, disabling it.
898 12:50:24.124674 PCI: 00:1f.3 [8086/0000] bus ops
899 12:50:24.128005 PCI: 00:1f.3 [8086/02c8] enabled
900 12:50:24.131244 PCI: 00:1f.4 [8086/0000] bus ops
901 12:50:24.134589 PCI: 00:1f.4 [8086/02a3] enabled
902 12:50:24.137717 PCI: 00:1f.5 [8086/0000] bus ops
903 12:50:24.141025 PCI: 00:1f.5 [8086/02a4] enabled
904 12:50:24.144283 PCI: Leftover static devices:
905 12:50:24.144368 PCI: 00:05.0
906 12:50:24.147842 PCI: 00:12.5
907 12:50:24.147925 PCI: 00:12.6
908 12:50:24.150657 PCI: 00:14.1
909 12:50:24.150742 PCI: 00:14.5
910 12:50:24.150809 PCI: 00:15.2
911 12:50:24.154060 PCI: 00:15.3
912 12:50:24.154145 PCI: 00:16.1
913 12:50:24.157320 PCI: 00:16.2
914 12:50:24.157405 PCI: 00:16.3
915 12:50:24.160760 PCI: 00:16.4
916 12:50:24.160844 PCI: 00:16.5
917 12:50:24.160910 PCI: 00:19.1
918 12:50:24.163805 PCI: 00:19.2
919 12:50:24.163889 PCI: 00:1a.0
920 12:50:24.167030 PCI: 00:1c.0
921 12:50:24.167114 PCI: 00:1c.1
922 12:50:24.170226 PCI: 00:1c.2
923 12:50:24.170312 PCI: 00:1c.3
924 12:50:24.170378 PCI: 00:1c.4
925 12:50:24.173449 PCI: 00:1c.5
926 12:50:24.173532 PCI: 00:1c.6
927 12:50:24.176750 PCI: 00:1c.7
928 12:50:24.176834 PCI: 00:1d.1
929 12:50:24.176900 PCI: 00:1d.2
930 12:50:24.180105 PCI: 00:1d.3
931 12:50:24.180189 PCI: 00:1d.4
932 12:50:24.183547 PCI: 00:1d.5
933 12:50:24.183631 PCI: 00:1e.1
934 12:50:24.186674 PCI: 00:1f.1
935 12:50:24.186758 PCI: 00:1f.2
936 12:50:24.186824 PCI: 00:1f.6
937 12:50:24.189911 PCI: Check your devicetree.cb.
938 12:50:24.193337 PCI: 00:02.0 scanning...
939 12:50:24.196393 scan_generic_bus for PCI: 00:02.0
940 12:50:24.199751 scan_generic_bus for PCI: 00:02.0 done
941 12:50:24.206297 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
942 12:50:24.209506 PCI: 00:14.0 scanning...
943 12:50:24.212637 scan_static_bus for PCI: 00:14.0
944 12:50:24.215907 USB0 port 0 enabled
945 12:50:24.215991 USB0 port 0 scanning...
946 12:50:24.219336 scan_static_bus for USB0 port 0
947 12:50:24.222321 USB2 port 0 enabled
948 12:50:24.225738 USB2 port 1 enabled
949 12:50:24.225823 USB2 port 2 disabled
950 12:50:24.229378 USB2 port 3 disabled
951 12:50:24.232206 USB2 port 5 disabled
952 12:50:24.232289 USB2 port 6 enabled
953 12:50:24.235638 USB2 port 9 enabled
954 12:50:24.238908 USB3 port 0 enabled
955 12:50:24.239023 USB3 port 1 enabled
956 12:50:24.242352 USB3 port 2 enabled
957 12:50:24.242436 USB3 port 3 enabled
958 12:50:24.245310 USB3 port 4 disabled
959 12:50:24.248629 USB2 port 0 scanning...
960 12:50:24.251910 scan_static_bus for USB2 port 0
961 12:50:24.255149 scan_static_bus for USB2 port 0 done
962 12:50:24.261693 scan_bus: scanning of bus USB2 port 0 took 9715 usecs
963 12:50:24.261781 USB2 port 1 scanning...
964 12:50:24.265161 scan_static_bus for USB2 port 1
965 12:50:24.271614 scan_static_bus for USB2 port 1 done
966 12:50:24.274822 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
967 12:50:24.278267 USB2 port 6 scanning...
968 12:50:24.281403 scan_static_bus for USB2 port 6
969 12:50:24.284933 scan_static_bus for USB2 port 6 done
970 12:50:24.291482 scan_bus: scanning of bus USB2 port 6 took 9717 usecs
971 12:50:24.294506 USB2 port 9 scanning...
972 12:50:24.297740 scan_static_bus for USB2 port 9
973 12:50:24.300831 scan_static_bus for USB2 port 9 done
974 12:50:24.304443 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
975 12:50:24.307521 USB3 port 0 scanning...
976 12:50:24.310820 scan_static_bus for USB3 port 0
977 12:50:24.313859 scan_static_bus for USB3 port 0 done
978 12:50:24.320662 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
979 12:50:24.323641 USB3 port 1 scanning...
980 12:50:24.326863 scan_static_bus for USB3 port 1
981 12:50:24.330404 scan_static_bus for USB3 port 1 done
982 12:50:24.336724 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
983 12:50:24.336810 USB3 port 2 scanning...
984 12:50:24.340090 scan_static_bus for USB3 port 2
985 12:50:24.346475 scan_static_bus for USB3 port 2 done
986 12:50:24.349877 scan_bus: scanning of bus USB3 port 2 took 9712 usecs
987 12:50:24.353167 USB3 port 3 scanning...
988 12:50:24.356411 scan_static_bus for USB3 port 3
989 12:50:24.359589 scan_static_bus for USB3 port 3 done
990 12:50:24.366238 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
991 12:50:24.369352 scan_static_bus for USB0 port 0 done
992 12:50:24.376006 scan_bus: scanning of bus USB0 port 0 took 155457 usecs
993 12:50:24.379168 scan_static_bus for PCI: 00:14.0 done
994 12:50:24.385735 scan_bus: scanning of bus PCI: 00:14.0 took 173096 usecs
995 12:50:24.385837 PCI: 00:15.0 scanning...
996 12:50:24.389099 scan_generic_bus for PCI: 00:15.0
997 12:50:24.395513 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
998 12:50:24.398787 scan_generic_bus for PCI: 00:15.0 done
999 12:50:24.405253 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1000 12:50:24.405338 PCI: 00:15.1 scanning...
1001 12:50:24.411909 scan_generic_bus for PCI: 00:15.1
1002 12:50:24.415254 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1003 12:50:24.418439 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1004 12:50:24.421647 scan_generic_bus for PCI: 00:15.1 done
1005 12:50:24.428335 scan_bus: scanning of bus PCI: 00:15.1 took 18618 usecs
1006 12:50:24.431445 PCI: 00:19.0 scanning...
1007 12:50:24.434599 scan_generic_bus for PCI: 00:19.0
1008 12:50:24.437935 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1009 12:50:24.441178 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1010 12:50:24.447538 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1011 12:50:24.450732 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1012 12:50:24.454127 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1013 12:50:24.457464 scan_generic_bus for PCI: 00:19.0 done
1014 12:50:24.463778 scan_bus: scanning of bus PCI: 00:19.0 took 30763 usecs
1015 12:50:24.467160 PCI: 00:1d.0 scanning...
1016 12:50:24.470359 do_pci_scan_bridge for PCI: 00:1d.0
1017 12:50:24.473729 PCI: pci_scan_bus for bus 01
1018 12:50:24.477003 PCI: 01:00.0 [1c5c/1327] enabled
1019 12:50:24.480365 Enabling Common Clock Configuration
1020 12:50:24.483770 L1 Sub-State supported from root port 29
1021 12:50:24.486863 L1 Sub-State Support = 0xf
1022 12:50:24.489979 CommonModeRestoreTime = 0x28
1023 12:50:24.496600 Power On Value = 0x16, Power On Scale = 0x0
1024 12:50:24.496685 ASPM: Enabled L1
1025 12:50:24.503168 scan_bus: scanning of bus PCI: 00:1d.0 took 32802 usecs
1026 12:50:24.506694 PCI: 00:1e.2 scanning...
1027 12:50:24.509920 scan_generic_bus for PCI: 00:1e.2
1028 12:50:24.513163 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1029 12:50:24.516301 scan_generic_bus for PCI: 00:1e.2 done
1030 12:50:24.522627 scan_bus: scanning of bus PCI: 00:1e.2 took 14021 usecs
1031 12:50:24.525930 PCI: 00:1e.3 scanning...
1032 12:50:24.529120 scan_generic_bus for PCI: 00:1e.3
1033 12:50:24.532731 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1034 12:50:24.535863 scan_generic_bus for PCI: 00:1e.3 done
1035 12:50:24.542224 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1036 12:50:24.545548 PCI: 00:1f.0 scanning...
1037 12:50:24.548771 scan_static_bus for PCI: 00:1f.0
1038 12:50:24.548857 PNP: 0c09.0 enabled
1039 12:50:24.551994 scan_static_bus for PCI: 00:1f.0 done
1040 12:50:24.558575 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1041 12:50:24.561777 PCI: 00:1f.3 scanning...
1042 12:50:24.568352 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1043 12:50:24.568437 PCI: 00:1f.4 scanning...
1044 12:50:24.575158 scan_generic_bus for PCI: 00:1f.4
1045 12:50:24.578456 scan_generic_bus for PCI: 00:1f.4 done
1046 12:50:24.581737 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1047 12:50:24.584899 PCI: 00:1f.5 scanning...
1048 12:50:24.587986 scan_generic_bus for PCI: 00:1f.5
1049 12:50:24.594857 scan_generic_bus for PCI: 00:1f.5 done
1050 12:50:24.597973 scan_bus: scanning of bus PCI: 00:1f.5 took 10199 usecs
1051 12:50:24.604503 scan_bus: scanning of bus DOMAIN: 0000 took 605390 usecs
1052 12:50:24.607637 scan_static_bus for Root Device done
1053 12:50:24.614393 scan_bus: scanning of bus Root Device took 625301 usecs
1054 12:50:24.614478 done
1055 12:50:24.617576 Chrome EC: UHEPI supported
1056 12:50:24.624024 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1057 12:50:24.630559 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1058 12:50:24.636951 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1059 12:50:24.643620 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1060 12:50:24.646872 SPI flash protection: WPSW=0 SRP0=0
1061 12:50:24.650061 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1062 12:50:24.656647 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1063 12:50:24.659882 found VGA at PCI: 00:02.0
1064 12:50:24.663173 Setting up VGA for PCI: 00:02.0
1065 12:50:24.666356 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1066 12:50:24.673138 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1067 12:50:24.676139 Allocating resources...
1068 12:50:24.676224 Reading resources...
1069 12:50:24.682655 Root Device read_resources bus 0 link: 0
1070 12:50:24.685881 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1071 12:50:24.692626 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1072 12:50:24.695820 DOMAIN: 0000 read_resources bus 0 link: 0
1073 12:50:24.702259 PCI: 00:14.0 read_resources bus 0 link: 0
1074 12:50:24.705496 USB0 port 0 read_resources bus 0 link: 0
1075 12:50:24.713654 USB0 port 0 read_resources bus 0 link: 0 done
1076 12:50:24.716787 PCI: 00:14.0 read_resources bus 0 link: 0 done
1077 12:50:24.724116 PCI: 00:15.0 read_resources bus 1 link: 0
1078 12:50:24.727414 PCI: 00:15.0 read_resources bus 1 link: 0 done
1079 12:50:24.733866 PCI: 00:15.1 read_resources bus 2 link: 0
1080 12:50:24.740460 PCI: 00:15.1 read_resources bus 2 link: 0 done
1081 12:50:24.743675 PCI: 00:19.0 read_resources bus 3 link: 0
1082 12:50:24.750996 PCI: 00:19.0 read_resources bus 3 link: 0 done
1083 12:50:24.754242 PCI: 00:1d.0 read_resources bus 1 link: 0
1084 12:50:24.760941 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1085 12:50:24.764186 PCI: 00:1e.2 read_resources bus 4 link: 0
1086 12:50:24.771425 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1087 12:50:24.774310 PCI: 00:1e.3 read_resources bus 5 link: 0
1088 12:50:24.781245 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1089 12:50:24.784289 PCI: 00:1f.0 read_resources bus 0 link: 0
1090 12:50:24.791007 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1091 12:50:24.797208 DOMAIN: 0000 read_resources bus 0 link: 0 done
1092 12:50:24.800591 Root Device read_resources bus 0 link: 0 done
1093 12:50:24.803908 Done reading resources.
1094 12:50:24.810565 Show resources in subtree (Root Device)...After reading.
1095 12:50:24.813888 Root Device child on link 0 CPU_CLUSTER: 0
1096 12:50:24.816937 CPU_CLUSTER: 0 child on link 0 APIC: 00
1097 12:50:24.820387 APIC: 00
1098 12:50:24.820471 APIC: 02
1099 12:50:24.823486 APIC: 07
1100 12:50:24.823570 APIC: 01
1101 12:50:24.823637 APIC: 03
1102 12:50:24.873348 APIC: 06
1103 12:50:24.873450 APIC: 04
1104 12:50:24.873522 APIC: 05
1105 12:50:24.873778 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 12:50:24.874039 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 12:50:24.874481 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1108 12:50:24.874554 PCI: 00:00.0
1109 12:50:24.874807 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 12:50:24.875097 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 12:50:24.923040 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 12:50:24.923324 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 12:50:24.923589 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 12:50:24.923847 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 12:50:24.924287 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 12:50:24.972595 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 12:50:24.973071 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 12:50:24.973335 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1119 12:50:24.973854 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1120 12:50:24.974224 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1121 12:50:25.003865 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1122 12:50:25.004149 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1123 12:50:25.004513 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1124 12:50:25.004787 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1125 12:50:25.004859 PCI: 00:02.0
1126 12:50:25.013991 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1127 12:50:25.026853 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1128 12:50:25.033723 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1129 12:50:25.037040 PCI: 00:04.0
1130 12:50:25.037124 PCI: 00:08.0
1131 12:50:25.046427 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:50:25.049958 PCI: 00:12.0
1133 12:50:25.059378 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 12:50:25.062873 PCI: 00:14.0 child on link 0 USB0 port 0
1135 12:50:25.072244 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1136 12:50:25.079015 USB0 port 0 child on link 0 USB2 port 0
1137 12:50:25.079101 USB2 port 0
1138 12:50:25.082326 USB2 port 1
1139 12:50:25.082411 USB2 port 2
1140 12:50:25.085364 USB2 port 3
1141 12:50:25.085448 USB2 port 5
1142 12:50:25.088905 USB2 port 6
1143 12:50:25.088989 USB2 port 9
1144 12:50:25.092068 USB3 port 0
1145 12:50:25.092153 USB3 port 1
1146 12:50:25.095237 USB3 port 2
1147 12:50:25.095322 USB3 port 3
1148 12:50:25.098685 USB3 port 4
1149 12:50:25.101777 PCI: 00:14.2
1150 12:50:25.111644 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1151 12:50:25.121397 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1152 12:50:25.121483 PCI: 00:14.3
1153 12:50:25.131174 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 12:50:25.134506 PCI: 00:15.0 child on link 0 I2C: 01:15
1155 12:50:25.147940 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 12:50:25.148036 I2C: 01:15
1157 12:50:25.150887 PCI: 00:15.1 child on link 0 I2C: 02:5d
1158 12:50:25.160740 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 12:50:25.163823 I2C: 02:5d
1160 12:50:25.163908 GENERIC: 0.0
1161 12:50:25.167135 PCI: 00:16.0
1162 12:50:25.176995 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 12:50:25.177088 PCI: 00:17.0
1164 12:50:25.187006 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1165 12:50:25.196671 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1166 12:50:25.206340 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1167 12:50:25.212786 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1168 12:50:25.222749 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1169 12:50:25.229061 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1170 12:50:25.235614 PCI: 00:19.0 child on link 0 I2C: 03:1a
1171 12:50:25.245288 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 12:50:25.245375 I2C: 03:1a
1173 12:50:25.248512 I2C: 03:38
1174 12:50:25.248598 I2C: 03:39
1175 12:50:25.251878 I2C: 03:3a
1176 12:50:25.251964 I2C: 03:3b
1177 12:50:25.258489 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1178 12:50:25.264826 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1179 12:50:25.274770 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1180 12:50:25.284379 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1181 12:50:25.284464 PCI: 01:00.0
1182 12:50:25.297671 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 12:50:25.297756 PCI: 00:1e.0
1184 12:50:25.307302 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1185 12:50:25.316969 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 12:50:25.323842 PCI: 00:1e.2 child on link 0 SPI: 00
1187 12:50:25.333590 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 12:50:25.333679 SPI: 00
1189 12:50:25.336587 PCI: 00:1e.3 child on link 0 SPI: 01
1190 12:50:25.346607 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 12:50:25.349887 SPI: 01
1192 12:50:25.353129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1193 12:50:25.362741 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1194 12:50:25.372584 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1195 12:50:25.372670 PNP: 0c09.0
1196 12:50:25.382375 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1197 12:50:25.382462 PCI: 00:1f.3
1198 12:50:25.392277 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 12:50:25.401801 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1200 12:50:25.405170 PCI: 00:1f.4
1201 12:50:25.414853 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1202 12:50:25.424804 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1203 12:50:25.424891 PCI: 00:1f.5
1204 12:50:25.434558 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1205 12:50:25.441092 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1206 12:50:25.447543 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1207 12:50:25.454254 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1208 12:50:25.457307 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1209 12:50:25.460963 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1210 12:50:25.464300 PCI: 00:17.0 18 * [0x60 - 0x67] io
1211 12:50:25.467494 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1212 12:50:25.473840 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1213 12:50:25.480299 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1214 12:50:25.489830 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 12:50:25.499592 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 12:50:25.506191 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 12:50:25.509680 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1218 12:50:25.516162 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1219 12:50:25.522497 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1220 12:50:25.525729 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1221 12:50:25.532460 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1222 12:50:25.535499 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1223 12:50:25.541981 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1224 12:50:25.545579 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1225 12:50:25.552015 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1226 12:50:25.555350 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1227 12:50:25.561697 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1228 12:50:25.564793 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1229 12:50:25.571454 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1230 12:50:25.574600 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1231 12:50:25.581347 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1232 12:50:25.584675 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1233 12:50:25.587731 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1234 12:50:25.594352 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1235 12:50:25.597695 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1236 12:50:25.604225 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1237 12:50:25.607502 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1238 12:50:25.613809 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1239 12:50:25.617278 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1240 12:50:25.623705 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1241 12:50:25.627212 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1242 12:50:25.636798 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1243 12:50:25.640099 avoid_fixed_resources: DOMAIN: 0000
1244 12:50:25.646642 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1245 12:50:25.653241 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1246 12:50:25.659632 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1247 12:50:25.665940 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1248 12:50:25.675987 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1249 12:50:25.682437 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1250 12:50:25.692202 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1251 12:50:25.698599 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 12:50:25.705353 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1253 12:50:25.714813 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1254 12:50:25.721489 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1255 12:50:25.728126 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1256 12:50:25.731346 Setting resources...
1257 12:50:25.737976 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1258 12:50:25.741093 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1259 12:50:25.744519 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1260 12:50:25.747629 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1261 12:50:25.751079 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1262 12:50:25.757777 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1263 12:50:25.764192 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 12:50:25.770452 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 12:50:25.780306 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1266 12:50:25.783397 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 12:50:25.789901 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 12:50:25.793169 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 12:50:25.799747 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1270 12:50:25.803103 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1271 12:50:25.809637 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1272 12:50:25.812669 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1273 12:50:25.819235 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1274 12:50:25.822578 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1275 12:50:25.829190 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1276 12:50:25.832265 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1277 12:50:25.838800 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1278 12:50:25.842138 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1279 12:50:25.848683 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1280 12:50:25.851751 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1281 12:50:25.858552 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1282 12:50:25.861723 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1283 12:50:25.868430 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1284 12:50:25.871402 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1285 12:50:25.875080 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1286 12:50:25.881432 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1287 12:50:25.884500 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1288 12:50:25.891033 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1289 12:50:25.897598 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1290 12:50:25.904318 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1291 12:50:25.914173 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1292 12:50:25.920343 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1293 12:50:25.926922 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1294 12:50:25.933727 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1295 12:50:25.937049 Root Device assign_resources, bus 0 link: 0
1296 12:50:25.943485 DOMAIN: 0000 assign_resources, bus 0 link: 0
1297 12:50:25.949790 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1298 12:50:25.959649 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1299 12:50:25.966390 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1300 12:50:25.975999 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1301 12:50:25.982456 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1302 12:50:25.992259 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1303 12:50:25.995457 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 12:50:26.001952 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 12:50:26.008726 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1306 12:50:26.018335 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1307 12:50:26.024926 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1308 12:50:26.034470 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1309 12:50:26.037845 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 12:50:26.044429 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 12:50:26.050773 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1312 12:50:26.054121 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 12:50:26.061216 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 12:50:26.067533 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1315 12:50:26.077268 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1316 12:50:26.083503 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1317 12:50:26.093188 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1318 12:50:26.099712 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1319 12:50:26.106399 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1320 12:50:26.116087 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1321 12:50:26.122851 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1322 12:50:26.129056 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 12:50:26.132577 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 12:50:26.142063 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1325 12:50:26.151952 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1326 12:50:26.158268 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1327 12:50:26.164889 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 12:50:26.171646 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1329 12:50:26.177980 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 12:50:26.184735 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1331 12:50:26.194568 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1332 12:50:26.197650 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 12:50:26.200937 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 12:50:26.210999 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1335 12:50:26.213850 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 12:50:26.220592 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 12:50:26.223703 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 12:50:26.230268 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 12:50:26.233485 LPC: Trying to open IO window from 800 size 1ff
1340 12:50:26.243470 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 12:50:26.249718 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 12:50:26.259730 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 12:50:26.266262 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 12:50:26.272598 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 12:50:26.276080 Root Device assign_resources, bus 0 link: 0
1346 12:50:26.279234 Done setting resources.
1347 12:50:26.285723 Show resources in subtree (Root Device)...After assigning values.
1348 12:50:26.289005 Root Device child on link 0 CPU_CLUSTER: 0
1349 12:50:26.295834 CPU_CLUSTER: 0 child on link 0 APIC: 00
1350 12:50:26.295926 APIC: 00
1351 12:50:26.295992 APIC: 02
1352 12:50:26.298825 APIC: 07
1353 12:50:26.298934 APIC: 01
1354 12:50:26.302073 APIC: 03
1355 12:50:26.302156 APIC: 06
1356 12:50:26.302220 APIC: 04
1357 12:50:26.305278 APIC: 05
1358 12:50:26.308765 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1359 12:50:26.318523 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1360 12:50:26.328217 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1361 12:50:26.331448 PCI: 00:00.0
1362 12:50:26.341364 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1363 12:50:26.351087 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1364 12:50:26.360855 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1365 12:50:26.367127 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1366 12:50:26.377143 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1367 12:50:26.386865 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1368 12:50:26.396591 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1369 12:50:26.406349 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1370 12:50:26.416323 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1371 12:50:26.422660 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1372 12:50:26.432643 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1373 12:50:26.442264 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1374 12:50:26.452175 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1375 12:50:26.461794 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1376 12:50:26.471517 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1377 12:50:26.481298 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1378 12:50:26.481391 PCI: 00:02.0
1379 12:50:26.494242 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1380 12:50:26.504160 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1381 12:50:26.513678 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1382 12:50:26.513770 PCI: 00:04.0
1383 12:50:26.517119 PCI: 00:08.0
1384 12:50:26.526727 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1385 12:50:26.526815 PCI: 00:12.0
1386 12:50:26.539859 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1387 12:50:26.543170 PCI: 00:14.0 child on link 0 USB0 port 0
1388 12:50:26.552893 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1389 12:50:26.556103 USB0 port 0 child on link 0 USB2 port 0
1390 12:50:26.559553 USB2 port 0
1391 12:50:26.562696 USB2 port 1
1392 12:50:26.562781 USB2 port 2
1393 12:50:26.565982 USB2 port 3
1394 12:50:26.566067 USB2 port 5
1395 12:50:26.569184 USB2 port 6
1396 12:50:26.569268 USB2 port 9
1397 12:50:26.572481 USB3 port 0
1398 12:50:26.572566 USB3 port 1
1399 12:50:26.575504 USB3 port 2
1400 12:50:26.575590 USB3 port 3
1401 12:50:26.578769 USB3 port 4
1402 12:50:26.578854 PCI: 00:14.2
1403 12:50:26.591831 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1404 12:50:26.601594 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1405 12:50:26.601681 PCI: 00:14.3
1406 12:50:26.611361 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1407 12:50:26.618104 PCI: 00:15.0 child on link 0 I2C: 01:15
1408 12:50:26.627817 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1409 12:50:26.627904 I2C: 01:15
1410 12:50:26.634253 PCI: 00:15.1 child on link 0 I2C: 02:5d
1411 12:50:26.644058 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1412 12:50:26.644152 I2C: 02:5d
1413 12:50:26.647464 GENERIC: 0.0
1414 12:50:26.647548 PCI: 00:16.0
1415 12:50:26.660441 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1416 12:50:26.660533 PCI: 00:17.0
1417 12:50:26.670108 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1418 12:50:26.680031 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1419 12:50:26.689850 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1420 12:50:26.699956 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1421 12:50:26.709629 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1422 12:50:26.719329 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1423 12:50:26.722758 PCI: 00:19.0 child on link 0 I2C: 03:1a
1424 12:50:26.732632 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1425 12:50:26.735612 I2C: 03:1a
1426 12:50:26.735698 I2C: 03:38
1427 12:50:26.738941 I2C: 03:39
1428 12:50:26.739027 I2C: 03:3a
1429 12:50:26.742334 I2C: 03:3b
1430 12:50:26.745497 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1431 12:50:26.755130 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1432 12:50:26.764962 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1433 12:50:26.774805 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1434 12:50:26.778027 PCI: 01:00.0
1435 12:50:26.787736 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1436 12:50:26.787847 PCI: 00:1e.0
1437 12:50:26.800746 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1438 12:50:26.810640 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1439 12:50:26.813777 PCI: 00:1e.2 child on link 0 SPI: 00
1440 12:50:26.823626 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1441 12:50:26.826679 SPI: 00
1442 12:50:26.829881 PCI: 00:1e.3 child on link 0 SPI: 01
1443 12:50:26.839765 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1444 12:50:26.843136 SPI: 01
1445 12:50:26.846197 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1446 12:50:26.856149 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1447 12:50:26.862521 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1448 12:50:26.865732 PNP: 0c09.0
1449 12:50:26.872666 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1450 12:50:26.875688 PCI: 00:1f.3
1451 12:50:26.885386 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1452 12:50:26.895124 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1453 12:50:26.898624 PCI: 00:1f.4
1454 12:50:26.908277 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1455 12:50:26.918037 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1456 12:50:26.918124 PCI: 00:1f.5
1457 12:50:26.927785 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1458 12:50:26.931020 Done allocating resources.
1459 12:50:26.937870 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 12:50:26.940781 Enabling resources...
1461 12:50:26.944094 PCI: 00:00.0 subsystem <- 8086/9b61
1462 12:50:26.947228 PCI: 00:00.0 cmd <- 06
1463 12:50:26.950510 PCI: 00:02.0 subsystem <- 8086/9b41
1464 12:50:26.953857 PCI: 00:02.0 cmd <- 03
1465 12:50:26.956997 PCI: 00:08.0 cmd <- 06
1466 12:50:26.960161 PCI: 00:12.0 subsystem <- 8086/02f9
1467 12:50:26.963751 PCI: 00:12.0 cmd <- 02
1468 12:50:26.966569 PCI: 00:14.0 subsystem <- 8086/02ed
1469 12:50:26.966653 PCI: 00:14.0 cmd <- 02
1470 12:50:26.970092 PCI: 00:14.2 cmd <- 02
1471 12:50:26.973473 PCI: 00:14.3 subsystem <- 8086/02f0
1472 12:50:26.976637 PCI: 00:14.3 cmd <- 02
1473 12:50:26.979863 PCI: 00:15.0 subsystem <- 8086/02e8
1474 12:50:26.983642 PCI: 00:15.0 cmd <- 02
1475 12:50:26.986481 PCI: 00:15.1 subsystem <- 8086/02e9
1476 12:50:26.989640 PCI: 00:15.1 cmd <- 02
1477 12:50:26.993164 PCI: 00:16.0 subsystem <- 8086/02e0
1478 12:50:26.996244 PCI: 00:16.0 cmd <- 02
1479 12:50:26.999532 PCI: 00:17.0 subsystem <- 8086/02d3
1480 12:50:27.002725 PCI: 00:17.0 cmd <- 03
1481 12:50:27.006012 PCI: 00:19.0 subsystem <- 8086/02c5
1482 12:50:27.009480 PCI: 00:19.0 cmd <- 02
1483 12:50:27.012469 PCI: 00:1d.0 bridge ctrl <- 0013
1484 12:50:27.015677 PCI: 00:1d.0 subsystem <- 8086/02b0
1485 12:50:27.019197 PCI: 00:1d.0 cmd <- 06
1486 12:50:27.022435 PCI: 00:1e.0 subsystem <- 8086/02a8
1487 12:50:27.025566 PCI: 00:1e.0 cmd <- 06
1488 12:50:27.028768 PCI: 00:1e.2 subsystem <- 8086/02aa
1489 12:50:27.032009 PCI: 00:1e.2 cmd <- 06
1490 12:50:27.035091 PCI: 00:1e.3 subsystem <- 8086/02ab
1491 12:50:27.035177 PCI: 00:1e.3 cmd <- 02
1492 12:50:27.041856 PCI: 00:1f.0 subsystem <- 8086/0284
1493 12:50:27.041941 PCI: 00:1f.0 cmd <- 407
1494 12:50:27.048302 PCI: 00:1f.3 subsystem <- 8086/02c8
1495 12:50:27.048386 PCI: 00:1f.3 cmd <- 02
1496 12:50:27.051541 PCI: 00:1f.4 subsystem <- 8086/02a3
1497 12:50:27.055013 PCI: 00:1f.4 cmd <- 03
1498 12:50:27.058000 PCI: 00:1f.5 subsystem <- 8086/02a4
1499 12:50:27.061622 PCI: 00:1f.5 cmd <- 406
1500 12:50:27.070749 PCI: 01:00.0 cmd <- 02
1501 12:50:27.075937 done.
1502 12:50:27.087224 ME: Version: 14.0.39.1367
1503 12:50:27.093604 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1504 12:50:27.096947 Initializing devices...
1505 12:50:27.097032 Root Device init ...
1506 12:50:27.103468 Chrome EC: Set SMI mask to 0x0000000000000000
1507 12:50:27.106501 Chrome EC: clear events_b mask to 0x0000000000000000
1508 12:50:27.113462 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1509 12:50:27.120036 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1510 12:50:27.126493 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1511 12:50:27.129761 Chrome EC: Set WAKE mask to 0x0000000000000000
1512 12:50:27.136151 Root Device init finished in 35138 usecs
1513 12:50:27.136245 CPU_CLUSTER: 0 init ...
1514 12:50:27.142856 CPU_CLUSTER: 0 init finished in 2438 usecs
1515 12:50:27.147535 PCI: 00:00.0 init ...
1516 12:50:27.150825 CPU TDP: 15 Watts
1517 12:50:27.154345 CPU PL2 = 64 Watts
1518 12:50:27.157511 PCI: 00:00.0 init finished in 7078 usecs
1519 12:50:27.160896 PCI: 00:02.0 init ...
1520 12:50:27.163917 PCI: 00:02.0 init finished in 2244 usecs
1521 12:50:27.167064 PCI: 00:08.0 init ...
1522 12:50:27.170421 PCI: 00:08.0 init finished in 2251 usecs
1523 12:50:27.173717 PCI: 00:12.0 init ...
1524 12:50:27.176995 PCI: 00:12.0 init finished in 2242 usecs
1525 12:50:27.180332 PCI: 00:14.0 init ...
1526 12:50:27.183540 PCI: 00:14.0 init finished in 2250 usecs
1527 12:50:27.186818 PCI: 00:14.2 init ...
1528 12:50:27.189940 PCI: 00:14.2 init finished in 2251 usecs
1529 12:50:27.193405 PCI: 00:14.3 init ...
1530 12:50:27.196535 PCI: 00:14.3 init finished in 2268 usecs
1531 12:50:27.200054 PCI: 00:15.0 init ...
1532 12:50:27.203256 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 12:50:27.209756 PCI: 00:15.0 init finished in 5965 usecs
1534 12:50:27.209841 PCI: 00:15.1 init ...
1535 12:50:27.216280 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 12:50:27.219458 PCI: 00:15.1 init finished in 5970 usecs
1537 12:50:27.222734 PCI: 00:16.0 init ...
1538 12:50:27.225923 PCI: 00:16.0 init finished in 2249 usecs
1539 12:50:27.229211 PCI: 00:19.0 init ...
1540 12:50:27.232712 DW I2C bus 4 at 0xd1222000 (400 KHz)
1541 12:50:27.235809 PCI: 00:19.0 init finished in 5973 usecs
1542 12:50:27.238917 PCI: 00:1d.0 init ...
1543 12:50:27.242415 Initializing PCH PCIe bridge.
1544 12:50:27.245491 PCI: 00:1d.0 init finished in 5279 usecs
1545 12:50:27.249495 PCI: 00:1f.0 init ...
1546 12:50:27.252636 IOAPIC: Initializing IOAPIC at 0xfec00000
1547 12:50:27.259160 IOAPIC: Bootstrap Processor Local APIC = 0x00
1548 12:50:27.259245 IOAPIC: ID = 0x02
1549 12:50:27.262691 IOAPIC: Dumping registers
1550 12:50:27.265920 reg 0x0000: 0x02000000
1551 12:50:27.269152 reg 0x0001: 0x00770020
1552 12:50:27.272364 reg 0x0002: 0x00000000
1553 12:50:27.275657 PCI: 00:1f.0 init finished in 23515 usecs
1554 12:50:27.278812 PCI: 00:1f.4 init ...
1555 12:50:27.281888 PCI: 00:1f.4 init finished in 2261 usecs
1556 12:50:27.293809 PCI: 01:00.0 init ...
1557 12:50:27.296999 PCI: 01:00.0 init finished in 2251 usecs
1558 12:50:27.301181 PNP: 0c09.0 init ...
1559 12:50:27.304433 Google Chrome EC uptime: 11.157 seconds
1560 12:50:27.310861 Google Chrome AP resets since EC boot: 0
1561 12:50:27.314149 Google Chrome most recent AP reset causes:
1562 12:50:27.320813 Google Chrome EC reset flags at last EC boot: reset-pin
1563 12:50:27.324081 PNP: 0c09.0 init finished in 20555 usecs
1564 12:50:27.327428 Devices initialized
1565 12:50:27.330415 Show all devs... After init.
1566 12:50:27.330500 Root Device: enabled 1
1567 12:50:27.333890 CPU_CLUSTER: 0: enabled 1
1568 12:50:27.336921 DOMAIN: 0000: enabled 1
1569 12:50:27.340357 APIC: 00: enabled 1
1570 12:50:27.340441 PCI: 00:00.0: enabled 1
1571 12:50:27.343602 PCI: 00:02.0: enabled 1
1572 12:50:27.346776 PCI: 00:04.0: enabled 0
1573 12:50:27.346860 PCI: 00:05.0: enabled 0
1574 12:50:27.350155 PCI: 00:12.0: enabled 1
1575 12:50:27.353221 PCI: 00:12.5: enabled 0
1576 12:50:27.356454 PCI: 00:12.6: enabled 0
1577 12:50:27.356535 PCI: 00:14.0: enabled 1
1578 12:50:27.359881 PCI: 00:14.1: enabled 0
1579 12:50:27.363218 PCI: 00:14.3: enabled 1
1580 12:50:27.366567 PCI: 00:14.5: enabled 0
1581 12:50:27.366642 PCI: 00:15.0: enabled 1
1582 12:50:27.369736 PCI: 00:15.1: enabled 1
1583 12:50:27.372968 PCI: 00:15.2: enabled 0
1584 12:50:27.376138 PCI: 00:15.3: enabled 0
1585 12:50:27.376214 PCI: 00:16.0: enabled 1
1586 12:50:27.379672 PCI: 00:16.1: enabled 0
1587 12:50:27.382620 PCI: 00:16.2: enabled 0
1588 12:50:27.386300 PCI: 00:16.3: enabled 0
1589 12:50:27.386377 PCI: 00:16.4: enabled 0
1590 12:50:27.389419 PCI: 00:16.5: enabled 0
1591 12:50:27.392551 PCI: 00:17.0: enabled 1
1592 12:50:27.396011 PCI: 00:19.0: enabled 1
1593 12:50:27.396091 PCI: 00:19.1: enabled 0
1594 12:50:27.399094 PCI: 00:19.2: enabled 0
1595 12:50:27.402468 PCI: 00:1a.0: enabled 0
1596 12:50:27.405720 PCI: 00:1c.0: enabled 0
1597 12:50:27.405796 PCI: 00:1c.1: enabled 0
1598 12:50:27.409031 PCI: 00:1c.2: enabled 0
1599 12:50:27.412234 PCI: 00:1c.3: enabled 0
1600 12:50:27.415519 PCI: 00:1c.4: enabled 0
1601 12:50:27.415599 PCI: 00:1c.5: enabled 0
1602 12:50:27.418779 PCI: 00:1c.6: enabled 0
1603 12:50:27.422064 PCI: 00:1c.7: enabled 0
1604 12:50:27.425158 PCI: 00:1d.0: enabled 1
1605 12:50:27.425236 PCI: 00:1d.1: enabled 0
1606 12:50:27.428388 PCI: 00:1d.2: enabled 0
1607 12:50:27.431756 PCI: 00:1d.3: enabled 0
1608 12:50:27.434875 PCI: 00:1d.4: enabled 0
1609 12:50:27.434993 PCI: 00:1d.5: enabled 0
1610 12:50:27.438389 PCI: 00:1e.0: enabled 1
1611 12:50:27.441535 PCI: 00:1e.1: enabled 0
1612 12:50:27.444557 PCI: 00:1e.2: enabled 1
1613 12:50:27.444636 PCI: 00:1e.3: enabled 1
1614 12:50:27.448040 PCI: 00:1f.0: enabled 1
1615 12:50:27.451379 PCI: 00:1f.1: enabled 0
1616 12:50:27.454631 PCI: 00:1f.2: enabled 0
1617 12:50:27.454715 PCI: 00:1f.3: enabled 1
1618 12:50:27.457770 PCI: 00:1f.4: enabled 1
1619 12:50:27.461023 PCI: 00:1f.5: enabled 1
1620 12:50:27.461102 PCI: 00:1f.6: enabled 0
1621 12:50:27.464442 USB0 port 0: enabled 1
1622 12:50:27.467547 I2C: 01:15: enabled 1
1623 12:50:27.471042 I2C: 02:5d: enabled 1
1624 12:50:27.471116 GENERIC: 0.0: enabled 1
1625 12:50:27.474313 I2C: 03:1a: enabled 1
1626 12:50:27.477487 I2C: 03:38: enabled 1
1627 12:50:27.477559 I2C: 03:39: enabled 1
1628 12:50:27.480715 I2C: 03:3a: enabled 1
1629 12:50:27.483920 I2C: 03:3b: enabled 1
1630 12:50:27.483994 PCI: 00:00.0: enabled 1
1631 12:50:27.487215 SPI: 00: enabled 1
1632 12:50:27.490457 SPI: 01: enabled 1
1633 12:50:27.490533 PNP: 0c09.0: enabled 1
1634 12:50:27.493722 USB2 port 0: enabled 1
1635 12:50:27.496969 USB2 port 1: enabled 1
1636 12:50:27.500151 USB2 port 2: enabled 0
1637 12:50:27.500223 USB2 port 3: enabled 0
1638 12:50:27.503587 USB2 port 5: enabled 0
1639 12:50:27.506942 USB2 port 6: enabled 1
1640 12:50:27.507013 USB2 port 9: enabled 1
1641 12:50:27.510083 USB3 port 0: enabled 1
1642 12:50:27.513126 USB3 port 1: enabled 1
1643 12:50:27.516492 USB3 port 2: enabled 1
1644 12:50:27.516570 USB3 port 3: enabled 1
1645 12:50:27.519780 USB3 port 4: enabled 0
1646 12:50:27.523019 APIC: 02: enabled 1
1647 12:50:27.523095 APIC: 07: enabled 1
1648 12:50:27.526431 APIC: 01: enabled 1
1649 12:50:27.526507 APIC: 03: enabled 1
1650 12:50:27.529778 APIC: 06: enabled 1
1651 12:50:27.533066 APIC: 04: enabled 1
1652 12:50:27.533457 APIC: 05: enabled 1
1653 12:50:27.536405 PCI: 00:08.0: enabled 1
1654 12:50:27.539651 PCI: 00:14.2: enabled 1
1655 12:50:27.542965 PCI: 01:00.0: enabled 1
1656 12:50:27.546701 Disabling ACPI via APMC:
1657 12:50:27.547143 done.
1658 12:50:27.552884 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 12:50:27.556325 ELOG: NV offset 0xaf0000 size 0x4000
1660 12:50:27.562951 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 12:50:27.569381 ELOG: Event(17) added with size 13 at 2022-07-14 11:50:02 UTC
1662 12:50:27.575934 POST: Unexpected post code in previous boot: 0x73
1663 12:50:27.582767 ELOG: Event(A3) added with size 11 at 2022-07-14 11:50:02 UTC
1664 12:50:27.589214 ELOG: Event(92) added with size 9 at 2022-07-14 11:50:02 UTC
1665 12:50:27.595802 ELOG: Event(93) added with size 9 at 2022-07-14 11:50:02 UTC
1666 12:50:27.601999 ELOG: Event(9A) added with size 9 at 2022-07-14 11:50:02 UTC
1667 12:50:27.608489 ELOG: Event(9E) added with size 10 at 2022-07-14 11:50:02 UTC
1668 12:50:27.611815 ELOG: Event(9F) added with size 14 at 2022-07-14 11:50:02 UTC
1669 12:50:27.618416 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1670 12:50:27.624970 ELOG: Event(A1) added with size 10 at 2022-07-14 11:50:02 UTC
1671 12:50:27.634402 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1672 12:50:27.637760 ELOG: Event(A0) added with size 9 at 2022-07-14 11:50:02 UTC
1673 12:50:27.644334 elog_add_boot_reason: Logged dev mode boot
1674 12:50:27.644431 Finalize devices...
1675 12:50:27.647474 PCI: 00:17.0 final
1676 12:50:27.650752 Devices finalized
1677 12:50:27.654205 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1678 12:50:27.660669 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1679 12:50:27.663976 ME: HFSTS1 : 0x90000245
1680 12:50:27.667177 ME: HFSTS2 : 0x3B850126
1681 12:50:27.673731 ME: HFSTS3 : 0x00000020
1682 12:50:27.676969 ME: HFSTS4 : 0x00004800
1683 12:50:27.680175 ME: HFSTS5 : 0x00000000
1684 12:50:27.683352 ME: HFSTS6 : 0x40400006
1685 12:50:27.686609 ME: Manufacturing Mode : NO
1686 12:50:27.689938 ME: FW Partition Table : OK
1687 12:50:27.693404 ME: Bringup Loader Failure : NO
1688 12:50:27.696425 ME: Firmware Init Complete : YES
1689 12:50:27.699863 ME: Boot Options Present : NO
1690 12:50:27.702834 ME: Update In Progress : NO
1691 12:50:27.709447 ME: D0i3 Support : YES
1692 12:50:27.712814 ME: Low Power State Enabled : NO
1693 12:50:27.716064 ME: CPU Replaced : NO
1694 12:50:27.719302 ME: CPU Replacement Valid : YES
1695 12:50:27.722227 ME: Current Working State : 5
1696 12:50:27.725606 ME: Current Operation State : 1
1697 12:50:27.729002 ME: Current Operation Mode : 0
1698 12:50:27.732227 ME: Error Code : 0
1699 12:50:27.735402 ME: CPU Debug Disabled : YES
1700 12:50:27.738589 ME: TXT Support : NO
1701 12:50:27.741923 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1702 12:50:27.748682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 12:50:27.751863 CBFS @ c08000 size 3f8000
1704 12:50:27.755225 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 12:50:27.761619 CBFS: Locating 'fallback/dsdt.aml'
1706 12:50:27.764938 CBFS: Found @ offset 10bb80 size 3fa5
1707 12:50:27.767972 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1708 12:50:27.771217 CBFS @ c08000 size 3f8000
1709 12:50:27.777778 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1710 12:50:27.781140 CBFS: Locating 'fallback/slic'
1711 12:50:27.787797 CBFS: 'fallback/slic' not found.
1712 12:50:27.791154 ACPI: Writing ACPI tables at 99b3e000.
1713 12:50:27.791239 ACPI: * FACS
1714 12:50:27.794407 ACPI: * DSDT
1715 12:50:27.797407 Ramoops buffer: 0x100000@0x99a3d000.
1716 12:50:27.800946 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1717 12:50:27.807589 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1718 12:50:27.810698 Google Chrome EC: version:
1719 12:50:27.814007 ro: helios_v2.0.2659-56403530b
1720 12:50:27.817234 rw: helios_v2.0.2849-c41de27e7d
1721 12:50:27.817319 running image: 1
1722 12:50:27.822082 ACPI: * FADT
1723 12:50:27.822167 SCI is IRQ9
1724 12:50:27.828379 ACPI: added table 1/32, length now 40
1725 12:50:27.828464 ACPI: * SSDT
1726 12:50:27.831577 Found 1 CPU(s) with 8 core(s) each.
1727 12:50:27.835128 Error: Could not locate 'wifi_sar' in VPD.
1728 12:50:27.841452 Checking CBFS for default SAR values
1729 12:50:27.844651 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 12:50:27.847967 CBFS @ c08000 size 3f8000
1731 12:50:27.854528 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 12:50:27.857729 CBFS: Locating 'wifi_sar_defaults.hex'
1733 12:50:27.860953 CBFS: Found @ offset 5fac0 size 77
1734 12:50:27.864347 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1735 12:50:27.871078 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1736 12:50:27.874169 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1737 12:50:27.880607 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1738 12:50:27.884019 failed to find key in VPD: dsm_calib_r0_0
1739 12:50:27.893793 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1740 12:50:27.897007 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1741 12:50:27.903304 failed to find key in VPD: dsm_calib_r0_1
1742 12:50:27.910219 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1743 12:50:27.916424 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1744 12:50:27.919739 failed to find key in VPD: dsm_calib_r0_2
1745 12:50:27.929759 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1746 12:50:27.936025 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1747 12:50:27.939553 failed to find key in VPD: dsm_calib_r0_3
1748 12:50:27.949001 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1749 12:50:27.952428 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1750 12:50:27.958809 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1751 12:50:27.962450 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1752 12:50:27.965600 EC returned error result code 1
1753 12:50:27.969228 EC returned error result code 1
1754 12:50:27.972101 EC returned error result code 1
1755 12:50:27.978772 PS2K: Bad resp from EC. Vivaldi disabled!
1756 12:50:27.981852 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1757 12:50:27.988612 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1758 12:50:27.995091 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1759 12:50:27.998245 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1760 12:50:28.004864 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1761 12:50:28.011215 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1762 12:50:28.017727 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1763 12:50:28.024367 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1764 12:50:28.027437 ACPI: added table 2/32, length now 44
1765 12:50:28.027516 ACPI: * MCFG
1766 12:50:28.030683 ACPI: added table 3/32, length now 48
1767 12:50:28.034165 ACPI: * TPM2
1768 12:50:28.037424 TPM2 log created at 99a2d000
1769 12:50:28.040703 ACPI: added table 4/32, length now 52
1770 12:50:28.040780 ACPI: * MADT
1771 12:50:28.043798 SCI is IRQ9
1772 12:50:28.047117 ACPI: added table 5/32, length now 56
1773 12:50:28.050408 current = 99b43ac0
1774 12:50:28.050487 ACPI: * DMAR
1775 12:50:28.053617 ACPI: added table 6/32, length now 60
1776 12:50:28.056840 ACPI: * IGD OpRegion
1777 12:50:28.059997 GMA: Found VBT in CBFS
1778 12:50:28.063417 GMA: Found valid VBT in CBFS
1779 12:50:28.066709 ACPI: added table 7/32, length now 64
1780 12:50:28.066805 ACPI: * HPET
1781 12:50:28.073086 ACPI: added table 8/32, length now 68
1782 12:50:28.073178 ACPI: done.
1783 12:50:28.076290 ACPI tables: 31744 bytes.
1784 12:50:28.079896 smbios_write_tables: 99a2c000
1785 12:50:28.082931 EC returned error result code 3
1786 12:50:28.086166 Couldn't obtain OEM name from CBI
1787 12:50:28.089404 Create SMBIOS type 17
1788 12:50:28.092631 PCI: 00:00.0 (Intel Cannonlake)
1789 12:50:28.092711 PCI: 00:14.3 (Intel WiFi)
1790 12:50:28.096157 SMBIOS tables: 939 bytes.
1791 12:50:28.102710 Writing table forward entry at 0x00000500
1792 12:50:28.105728 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1793 12:50:28.112166 Writing coreboot table at 0x99b62000
1794 12:50:28.115561 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 12:50:28.122318 1. 0000000000001000-000000000009ffff: RAM
1796 12:50:28.125630 2. 00000000000a0000-00000000000fffff: RESERVED
1797 12:50:28.128849 3. 0000000000100000-0000000099a2bfff: RAM
1798 12:50:28.135207 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1799 12:50:28.141918 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1800 12:50:28.148440 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1801 12:50:28.151570 7. 000000009a000000-000000009f7fffff: RESERVED
1802 12:50:28.154822 8. 00000000e0000000-00000000efffffff: RESERVED
1803 12:50:28.161264 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 12:50:28.164572 10. 00000000fe000000-00000000fe00ffff: RESERVED
1805 12:50:28.170864 11. 00000000fed10000-00000000fed17fff: RESERVED
1806 12:50:28.174164 12. 00000000fed80000-00000000fed83fff: RESERVED
1807 12:50:28.180772 13. 00000000fed90000-00000000fed91fff: RESERVED
1808 12:50:28.184094 14. 00000000feda0000-00000000feda1fff: RESERVED
1809 12:50:28.190621 15. 0000000100000000-000000045e7fffff: RAM
1810 12:50:28.193824 Graphics framebuffer located at 0xc0000000
1811 12:50:28.197014 Passing 5 GPIOs to payload:
1812 12:50:28.200391 NAME | PORT | POLARITY | VALUE
1813 12:50:28.206822 write protect | undefined | high | low
1814 12:50:28.213735 lid | undefined | high | high
1815 12:50:28.216712 power | undefined | high | low
1816 12:50:28.223113 oprom | undefined | high | low
1817 12:50:28.226554 EC in RW | 0x000000cb | high | low
1818 12:50:28.230027 Board ID: 4
1819 12:50:28.233013 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1820 12:50:28.236503 CBFS @ c08000 size 3f8000
1821 12:50:28.243040 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1822 12:50:28.249561 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum ef9
1823 12:50:28.252807 coreboot table: 1452 bytes.
1824 12:50:28.256170 IMD ROOT 0. 99fff000 00001000
1825 12:50:28.259188 IMD SMALL 1. 99ffe000 00001000
1826 12:50:28.262380 FSP MEMORY 2. 99c4e000 003b0000
1827 12:50:28.266089 CONSOLE 3. 99c2e000 00020000
1828 12:50:28.269146 FMAP 4. 99c2d000 0000054e
1829 12:50:28.272410 TIME STAMP 5. 99c2c000 00000910
1830 12:50:28.275703 VBOOT WORK 6. 99c18000 00014000
1831 12:50:28.279228 MRC DATA 7. 99c16000 00001958
1832 12:50:28.282124 ROMSTG STCK 8. 99c15000 00001000
1833 12:50:28.285418 AFTER CAR 9. 99c0b000 0000a000
1834 12:50:28.289001 RAMSTAGE 10. 99baf000 0005c000
1835 12:50:28.292054 REFCODE 11. 99b7a000 00035000
1836 12:50:28.295320 SMM BACKUP 12. 99b6a000 00010000
1837 12:50:28.298850 COREBOOT 13. 99b62000 00008000
1838 12:50:28.301966 ACPI 14. 99b3e000 00024000
1839 12:50:28.305181 ACPI GNVS 15. 99b3d000 00001000
1840 12:50:28.308573 RAMOOPS 16. 99a3d000 00100000
1841 12:50:28.311687 TPM2 TCGLOG17. 99a2d000 00010000
1842 12:50:28.315103 SMBIOS 18. 99a2c000 00000800
1843 12:50:28.315504 IMD small region:
1844 12:50:28.321722 IMD ROOT 0. 99ffec00 00000400
1845 12:50:28.324669 FSP RUNTIME 1. 99ffebe0 00000004
1846 12:50:28.328218 EC HOSTEVENT 2. 99ffebc0 00000008
1847 12:50:28.331404 POWER STATE 3. 99ffeb80 00000040
1848 12:50:28.334755 ROMSTAGE 4. 99ffeb60 00000004
1849 12:50:28.338063 MEM INFO 5. 99ffe9a0 000001b9
1850 12:50:28.341051 MTRR: Physical address space:
1851 12:50:28.347764 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1852 12:50:28.354055 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1853 12:50:28.360616 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1854 12:50:28.367191 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1855 12:50:28.370599 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1856 12:50:28.377142 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1857 12:50:28.383656 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1858 12:50:28.389989 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 12:50:28.393341 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 12:50:28.396516 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 12:50:28.399657 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 12:50:28.406172 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 12:50:28.409442 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 12:50:28.412658 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 12:50:28.416046 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 12:50:28.422767 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 12:50:28.425815 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 12:50:28.428971 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 12:50:28.432607 call enable_fixed_mtrr()
1870 12:50:28.435507 CPU physical address size: 39 bits
1871 12:50:28.442166 MTRR: default type WB/UC MTRR counts: 6/8.
1872 12:50:28.445640 MTRR: WB selected as default type.
1873 12:50:28.451768 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1874 12:50:28.455353 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1875 12:50:28.461654 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1876 12:50:28.468118 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1877 12:50:28.474626 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1878 12:50:28.481042 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1879 12:50:28.487943 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 12:50:28.491219 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 12:50:28.494153 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 12:50:28.497781 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 12:50:28.504155 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 12:50:28.507426 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 12:50:28.510715 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 12:50:28.514136 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 12:50:28.520196 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 12:50:28.523545 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 12:50:28.526748 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 12:50:28.527365
1891 12:50:28.530267 MTRR check
1892 12:50:28.530788 Fixed MTRRs : Enabled
1893 12:50:28.533523 Variable MTRRs: Enabled
1894 12:50:28.533918
1895 12:50:28.536578 call enable_fixed_mtrr()
1896 12:50:28.543401 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1897 12:50:28.546539 CPU physical address size: 39 bits
1898 12:50:28.549826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1899 12:50:28.556083 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 12:50:28.559399 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 12:50:28.562707 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 12:50:28.566323 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 12:50:28.572539 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 12:50:28.575494 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 12:50:28.578929 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 12:50:28.582213 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 12:50:28.588933 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 12:50:28.592255 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 12:50:28.595322 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 12:50:28.598753 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 12:50:28.605406 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 12:50:28.608415 call enable_fixed_mtrr()
1913 12:50:28.611965 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 12:50:28.615100 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 12:50:28.618085 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 12:50:28.624259 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 12:50:28.627448 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 12:50:28.630852 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 12:50:28.634133 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 12:50:28.640451 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 12:50:28.643934 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 12:50:28.647076 CPU physical address size: 39 bits
1923 12:50:28.650539 call enable_fixed_mtrr()
1924 12:50:28.653586 CBFS @ c08000 size 3f8000
1925 12:50:28.656603 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1926 12:50:28.663546 CBFS: Locating 'fallback/payload'
1927 12:50:28.666419 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 12:50:28.669847 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:50:28.673180 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 12:50:28.679977 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 12:50:28.683311 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 12:50:28.686421 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 12:50:28.690097 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 12:50:28.696559 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 12:50:28.699556 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 12:50:28.702752 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 12:50:28.706290 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 12:50:28.712625 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 12:50:28.715879 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 12:50:28.719083 call enable_fixed_mtrr()
1941 12:50:28.722150 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 12:50:28.725505 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 12:50:28.728705 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 12:50:28.735507 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 12:50:28.738717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 12:50:28.741662 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 12:50:28.745015 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 12:50:28.751502 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 12:50:28.755119 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 12:50:28.758097 CPU physical address size: 39 bits
1951 12:50:28.761579 call enable_fixed_mtrr()
1952 12:50:28.764668 CPU physical address size: 39 bits
1953 12:50:28.767801 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 12:50:28.774076 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:50:28.777501 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 12:50:28.780903 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 12:50:28.784020 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 12:50:28.790036 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 12:50:28.793588 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 12:50:28.796615 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 12:50:28.799928 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 12:50:28.806356 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 12:50:28.809683 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 12:50:28.813009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 12:50:28.816358 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 12:50:28.819530 call enable_fixed_mtrr()
1967 12:50:28.823027 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 12:50:28.829426 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 12:50:28.832414 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 12:50:28.835699 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 12:50:28.839054 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 12:50:28.845509 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 12:50:28.849014 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 12:50:28.852274 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 12:50:28.855609 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 12:50:28.861949 CPU physical address size: 39 bits
1977 12:50:28.865377 call enable_fixed_mtrr()
1978 12:50:28.868670 CBFS: Found @ offset 1c96c0 size 3f798
1979 12:50:28.871688 CPU physical address size: 39 bits
1980 12:50:28.874981 Checking segment from ROM address 0xffdd16f8
1981 12:50:28.878363 CPU physical address size: 39 bits
1982 12:50:28.885052 Checking segment from ROM address 0xffdd1714
1983 12:50:28.888273 Loading segment from ROM address 0xffdd16f8
1984 12:50:28.891388 code (compression=0)
1985 12:50:28.897965 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1986 12:50:28.907747 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1987 12:50:28.910835 it's not compressed!
1988 12:50:29.001499 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1989 12:50:29.008351 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1990 12:50:29.014561 Loading segment from ROM address 0xffdd1714
1991 12:50:29.014647 Entry Point 0x30000000
1992 12:50:29.017796 Loaded segments
1993 12:50:29.023899 Finalizing chipset.
1994 12:50:29.027082 Finalizing SMM.
1995 12:50:29.030463 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1996 12:50:29.033609 mp_park_aps done after 0 msecs.
1997 12:50:29.040035 Jumping to boot code at 30000000(99b62000)
1998 12:50:29.046799 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1999 12:50:29.046888
2000 12:50:29.049777 Starting depthcharge on Helios...
2001 12:50:29.050126 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2002 12:50:29.050233 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2003 12:50:29.050320 Setting prompt string to ['hatch:']
2004 12:50:29.050401 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2005 12:50:29.059485 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 12:50:29.066127 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2007 12:50:29.072452 board_setup: Info: eMMC controller not present; skipping
2008 12:50:29.075731 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 12:50:29.082414 board_setup: Info: SDHCI controller not present; skipping
2010 12:50:29.088905 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2011 12:50:29.088991 Wipe memory regions:
2012 12:50:29.095208 [0x00000000001000, 0x000000000a0000)
2013 12:50:29.098592 [0x00000000100000, 0x00000030000000)
2014 12:50:29.162536 [0x00000030657430, 0x00000099a2c000)
2015 12:50:29.294789 [0x00000100000000, 0x0000045e800000)
2016 12:50:30.632229 R8152: Initializing
2017 12:50:30.635499 Version 9 (ocp_data = 6010)
2018 12:50:30.639798 R8152: Done initializing
2019 12:50:30.643080 Adding net device
2020 12:50:31.012804 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 12:50:31.013379
2022 12:50:31.014174 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2024 12:50:31.115805 hatch: tftpboot 192.168.201.1 6819477/tftp-deploy-q1i_d538/kernel/bzImage 6819477/tftp-deploy-q1i_d538/kernel/cmdline 6819477/tftp-deploy-q1i_d538/ramdisk/ramdisk.cpio.gz
2025 12:50:31.116020 Setting prompt string to ['Starting kernel']
2026 12:50:31.116110 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2027 12:50:31.116215 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
2028 12:50:31.120270 tftpboot 192.168.201.1 6819477/tftp-deploy-q1i_d538/kernel/bzImoy-q1i_d538/kernel/cmdline 6819477/tftp-deploy-q1i_d538/ramdisk/ramdisk.cpio.gz
2029 12:50:31.120359 Waiting for link
2030 12:50:31.321332 done.
2031 12:50:31.321472 MAC: f4:f5:e8:50:e7:f3
2032 12:50:31.324684 Sending DHCP discover... done.
2033 12:50:31.327666 Waiting for reply... done.
2034 12:50:31.331112 Sending DHCP request... done.
2035 12:50:31.334575 Waiting for reply... done.
2036 12:50:31.337555 My ip is 192.168.201.16
2037 12:50:31.341112 The DHCP server ip is 192.168.201.1
2038 12:50:31.344530 TFTP server IP predefined by user: 192.168.201.1
2039 12:50:31.350841 Bootfile predefined by user: 6819477/tftp-deploy-q1i_d538/kernel/bzImage
2040 12:50:31.354023 Sending tftp read request... done.
2041 12:50:31.360383 Waiting for the transfer...
2042 12:50:31.629321 00000000 ################################################################
2043 12:50:31.910715 00080000 ################################################################
2044 12:50:32.193795 00100000 ################################################################
2045 12:50:32.427137 00180000 ################################################################
2046 12:50:32.681862 00200000 ################################################################
2047 12:50:32.927807 00280000 ################################################################
2048 12:50:33.198053 00300000 ################################################################
2049 12:50:33.461817 00380000 ################################################################
2050 12:50:33.742138 00400000 ################################################################
2051 12:50:34.012735 00480000 ################################################################
2052 12:50:34.287568 00500000 ################################################################
2053 12:50:34.522809 00580000 ################################################################
2054 12:50:34.776712 00600000 ################################################################ done.
2055 12:50:34.780199 The bootfile was 6811536 bytes long.
2056 12:50:34.786752 Sending tftp read request... done.
2057 12:50:34.786855 Waiting for the transfer...
2058 12:50:35.074134 00000000 ################################################################
2059 12:50:35.366455 00080000 ################################################################
2060 12:50:35.655007 00100000 ################################################################
2061 12:50:35.939906 00180000 ################################################################
2062 12:50:36.208267 00200000 ################################################################
2063 12:50:36.497435 00280000 ################################################################
2064 12:50:36.758035 00300000 ################################################################
2065 12:50:37.017925 00380000 ################################################################
2066 12:50:37.257871 00400000 ################################################################
2067 12:50:37.536569 00480000 ################################################################
2068 12:50:37.670091 00500000 ############################# done.
2069 12:50:37.673331 Sending tftp read request... done.
2070 12:50:37.676627 Waiting for the transfer...
2071 12:50:37.677072 00000000 # done.
2072 12:50:37.686665 Command line loaded dynamically from TFTP file: 6819477/tftp-deploy-q1i_d538/kernel/cmdline
2073 12:50:37.708972 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819477/extract-nfsrootfs-zmumg7cf,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2074 12:50:37.715420 ec_init(0): CrosEC protocol v3 supported (256, 256)
2075 12:50:37.722437 Shutting down all USB controllers.
2076 12:50:37.723057 Removing current net device
2077 12:50:37.725896 Finalizing coreboot
2078 12:50:37.732620 Exiting depthcharge with code 4 at timestamp: 15966582
2079 12:50:37.733115
2080 12:50:37.733599 Starting kernel ...
2081 12:50:37.734571 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2082 12:50:37.735220 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2083 12:50:37.735679 Setting prompt string to ['Linux version [0-9]']
2084 12:50:37.736163 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2085 12:50:37.736666 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2086 12:50:37.737790
2087 12:50:37.738224
2089 12:55:10.735399 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2091 12:55:10.735623 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2093 12:55:10.735784 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2096 12:55:10.736045 end: 2 depthcharge-action (duration 00:05:00) [common]
2098 12:55:10.736242 Cleaning after the job
2099 12:55:10.736326 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/ramdisk
2100 12:55:10.736821 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/kernel
2101 12:55:10.737370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/nfsrootfs
2102 12:55:10.769931 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819477/tftp-deploy-q1i_d538/modules
2103 12:55:10.770237 start: 5.1 power-off (timeout 00:00:30) [common]
2104 12:55:10.770400 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2105 12:55:10.790103 >> Command sent successfully.
2106 12:55:10.792051 Returned 0 in 0 seconds
2107 12:55:10.893171 end: 5.1 power-off (duration 00:00:00) [common]
2109 12:55:10.894538 start: 5.2 read-feedback (timeout 00:10:00) [common]
2110 12:55:10.895632 Listened to connection for namespace 'common' for up to 1s
2111 12:55:11.738846 Listened to connection for namespace 'common' for up to 1s
2112 12:55:11.742227 Listened to connection for namespace 'common' for up to 1s
2113 12:55:11.745328 Listened to connection for namespace 'common' for up to 1s
2114 12:55:11.748752 Listened to connection for namespace 'common' for up to 1s
2115 12:55:11.752318 Listened to connection for namespace 'common' for up to 1s
2116 12:55:11.755439 Listened to connection for namespace 'common' for up to 1s
2117 12:55:11.758871 Listened to connection for namespace 'common' for up to 1s
2118 12:55:11.761934 Listened to connection for namespace 'common' for up to 1s
2119 12:55:11.765178 Listened to connection for namespace 'common' for up to 1s
2120 12:55:11.768646 Listened to connection for namespace 'common' for up to 1s
2121 12:55:11.771765 Listened to connection for namespace 'common' for up to 1s
2122 12:55:11.775384 Listened to connection for namespace 'common' for up to 1s
2123 12:55:11.778457 Listened to connection for namespace 'common' for up to 1s
2124 12:55:11.781524 Listened to connection for namespace 'common' for up to 1s
2125 12:55:11.784839 Listened to connection for namespace 'common' for up to 1s
2126 12:55:11.788243 Listened to connection for namespace 'common' for up to 1s
2127 12:55:11.791405 Listened to connection for namespace 'common' for up to 1s
2128 12:55:11.794687 Listened to connection for namespace 'common' for up to 1s
2129 12:55:11.798293 Listened to connection for namespace 'common' for up to 1s
2130 12:55:11.801383 Listened to connection for namespace 'common' for up to 1s
2131 12:55:11.804564 Listened to connection for namespace 'common' for up to 1s
2132 12:55:11.807793 Listened to connection for namespace 'common' for up to 1s
2133 12:55:11.811215 Listened to connection for namespace 'common' for up to 1s
2134 12:55:11.814479 Listened to connection for namespace 'common' for up to 1s
2135 12:55:11.817902 Listened to connection for namespace 'common' for up to 1s
2136 12:55:11.821314 Listened to connection for namespace 'common' for up to 1s
2137 12:55:11.824215 Listened to connection for namespace 'common' for up to 1s
2138 12:55:11.827753 Listened to connection for namespace 'common' for up to 1s
2139 12:55:11.831178 Listened to connection for namespace 'common' for up to 1s
2140 12:55:11.834383 Listened to connection for namespace 'common' for up to 1s
2141 12:55:11.837681 Listened to connection for namespace 'common' for up to 1s
2142 12:55:11.840931 Listened to connection for namespace 'common' for up to 1s
2143 12:55:11.844080 Listened to connection for namespace 'common' for up to 1s
2144 12:55:11.847380 Listened to connection for namespace 'common' for up to 1s
2145 12:55:11.850698 Listened to connection for namespace 'common' for up to 1s
2146 12:55:11.854177 Listened to connection for namespace 'common' for up to 1s
2147 12:55:11.857400 Listened to connection for namespace 'common' for up to 1s
2148 12:55:11.860890 Listened to connection for namespace 'common' for up to 1s
2149 12:55:11.863979 Listened to connection for namespace 'common' for up to 1s
2150 12:55:11.867013 Listened to connection for namespace 'common' for up to 1s
2151 12:55:11.870309 Listened to connection for namespace 'common' for up to 1s
2152 12:55:11.873837 Listened to connection for namespace 'common' for up to 1s
2153 12:55:11.876905 Listened to connection for namespace 'common' for up to 1s
2154 12:55:11.880456 Listened to connection for namespace 'common' for up to 1s
2155 12:55:11.883571 Listened to connection for namespace 'common' for up to 1s
2156 12:55:11.887024 Listened to connection for namespace 'common' for up to 1s
2157 12:55:11.890095 Listened to connection for namespace 'common' for up to 1s
2158 12:55:11.893505 Listened to connection for namespace 'common' for up to 1s
2159 12:55:11.895101 Finalising connection for namespace 'common'
2160 12:55:11.895215 Disconnecting from shell: Finalise
2161 12:55:11.895293
2162 12:55:11.996020 end: 5.2 read-feedback (duration 00:00:01) [common]
2163 12:55:11.996179 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819477
2164 12:55:12.095695 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819477
2165 12:55:12.095907 JobError: Your job cannot terminate cleanly.