Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:45:17.343670 lava-dispatcher, installed at version: 2022.04
2 12:45:17.343896 start: 0 validate
3 12:45:17.344047 Start time: 2022-07-14 12:45:17.344040+00:00 (UTC)
4 12:45:17.344189 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:45:17.344325 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:45:17.634480 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:45:17.634651 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:45:17.926821 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:45:17.926974 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:45:18.216354 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:45:18.216541 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:45:18.507618 validate duration: 1.16
14 12:45:18.507916 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:45:18.508031 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:45:18.508129 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:45:18.508237 Not decompressing ramdisk as can be used compressed.
18 12:45:18.508323 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220708.0/amd64/initrd.cpio.gz
19 12:45:18.508397 saving as /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/ramdisk/initrd.cpio.gz
20 12:45:18.508463 total size: 5411032 (5MB)
21 12:45:18.509647 progress 0% (0MB)
22 12:45:18.511180 progress 5% (0MB)
23 12:45:18.512578 progress 10% (0MB)
24 12:45:18.514071 progress 15% (0MB)
25 12:45:18.515619 progress 20% (1MB)
26 12:45:18.517047 progress 25% (1MB)
27 12:45:18.518412 progress 30% (1MB)
28 12:45:18.519810 progress 35% (1MB)
29 12:45:18.521350 progress 40% (2MB)
30 12:45:18.522713 progress 45% (2MB)
31 12:45:18.524061 progress 50% (2MB)
32 12:45:18.525466 progress 55% (2MB)
33 12:45:18.527016 progress 60% (3MB)
34 12:45:18.528398 progress 65% (3MB)
35 12:45:18.529789 progress 70% (3MB)
36 12:45:18.531159 progress 75% (3MB)
37 12:45:18.532726 progress 80% (4MB)
38 12:45:18.534097 progress 85% (4MB)
39 12:45:18.535475 progress 90% (4MB)
40 12:45:18.536883 progress 95% (4MB)
41 12:45:18.538435 progress 100% (5MB)
42 12:45:18.538624 5MB downloaded in 0.03s (171.12MB/s)
43 12:45:18.538789 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:45:18.539068 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:45:18.539176 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:45:18.539270 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:45:18.539395 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:45:18.539467 saving as /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/kernel/bzImage
50 12:45:18.539534 total size: 6811536 (6MB)
51 12:45:18.539599 No compression specified
52 12:45:18.540734 progress 0% (0MB)
53 12:45:18.542632 progress 5% (0MB)
54 12:45:18.544394 progress 10% (0MB)
55 12:45:18.546299 progress 15% (1MB)
56 12:45:18.548008 progress 20% (1MB)
57 12:45:18.549740 progress 25% (1MB)
58 12:45:18.551655 progress 30% (1MB)
59 12:45:18.553392 progress 35% (2MB)
60 12:45:18.555263 progress 40% (2MB)
61 12:45:18.556997 progress 45% (2MB)
62 12:45:18.558718 progress 50% (3MB)
63 12:45:18.560546 progress 55% (3MB)
64 12:45:18.562266 progress 60% (3MB)
65 12:45:18.564079 progress 65% (4MB)
66 12:45:18.565825 progress 70% (4MB)
67 12:45:18.567505 progress 75% (4MB)
68 12:45:18.569387 progress 80% (5MB)
69 12:45:18.571091 progress 85% (5MB)
70 12:45:18.572964 progress 90% (5MB)
71 12:45:18.574655 progress 95% (6MB)
72 12:45:18.576371 progress 100% (6MB)
73 12:45:18.576660 6MB downloaded in 0.04s (174.99MB/s)
74 12:45:18.576817 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:45:18.577074 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:45:18.577171 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:45:18.577267 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:45:18.577372 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220708.0/amd64/full.rootfs.tar.xz
80 12:45:18.577440 saving as /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/nfsrootfs/full.rootfs.tar
81 12:45:18.577508 total size: 132942648 (126MB)
82 12:45:18.577572 Using unxz to decompress xz
83 12:45:18.580808 progress 0% (0MB)
84 12:45:18.930280 progress 5% (6MB)
85 12:45:19.306551 progress 10% (12MB)
86 12:45:19.589615 progress 15% (19MB)
87 12:45:19.811154 progress 20% (25MB)
88 12:45:20.086224 progress 25% (31MB)
89 12:45:20.457615 progress 30% (38MB)
90 12:45:20.832155 progress 35% (44MB)
91 12:45:21.233200 progress 40% (50MB)
92 12:45:21.627019 progress 45% (57MB)
93 12:45:21.995883 progress 50% (63MB)
94 12:45:22.378807 progress 55% (69MB)
95 12:45:22.753237 progress 60% (76MB)
96 12:45:23.118166 progress 65% (82MB)
97 12:45:23.487374 progress 70% (88MB)
98 12:45:23.867190 progress 75% (95MB)
99 12:45:24.316388 progress 80% (101MB)
100 12:45:24.767677 progress 85% (107MB)
101 12:45:25.047444 progress 90% (114MB)
102 12:45:25.399473 progress 95% (120MB)
103 12:45:25.800173 progress 100% (126MB)
104 12:45:25.805060 126MB downloaded in 7.23s (17.54MB/s)
105 12:45:25.805315 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:45:25.805722 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:45:25.805818 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:45:25.805917 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:45:25.806041 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:45:25.806117 saving as /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/modules/modules.tar
112 12:45:25.806181 total size: 51960 (0MB)
113 12:45:25.806246 Using unxz to decompress xz
114 12:45:25.809434 progress 63% (0MB)
115 12:45:25.809805 progress 100% (0MB)
116 12:45:25.813097 0MB downloaded in 0.01s (7.17MB/s)
117 12:45:25.813336 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:45:25.813603 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:45:25.813699 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:45:25.813806 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:45:27.097305 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819503/extract-nfsrootfs-t0va3ibe
123 12:45:27.097503 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:45:27.097610 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:45:27.097750 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e
126 12:45:27.097854 makedir: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin
127 12:45:27.097943 makedir: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/tests
128 12:45:27.098028 makedir: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/results
129 12:45:27.098126 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-add-keys
130 12:45:27.098256 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-add-sources
131 12:45:27.098378 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-background-process-start
132 12:45:27.098497 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-background-process-stop
133 12:45:27.098612 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-common-functions
134 12:45:27.098724 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-echo-ipv4
135 12:45:27.098837 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-install-packages
136 12:45:27.098949 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-installed-packages
137 12:45:27.099060 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-os-build
138 12:45:27.099172 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-probe-channel
139 12:45:27.099283 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-probe-ip
140 12:45:27.099394 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-target-ip
141 12:45:27.099504 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-target-mac
142 12:45:27.099614 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-target-storage
143 12:45:27.099727 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-case
144 12:45:27.099838 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-event
145 12:45:27.099950 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-feedback
146 12:45:27.100059 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-raise
147 12:45:27.100169 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-reference
148 12:45:27.100279 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-runner
149 12:45:27.100390 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-set
150 12:45:27.100500 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-test-shell
151 12:45:27.100613 Updating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-install-packages (oe)
152 12:45:27.100728 Updating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/bin/lava-installed-packages (oe)
153 12:45:27.100827 Creating /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/environment
154 12:45:27.100916 LAVA metadata
155 12:45:27.100988 - LAVA_JOB_ID=6819503
156 12:45:27.101054 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:45:27.101154 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:45:27.101222 skipped lava-vland-overlay
159 12:45:27.101299 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:45:27.101383 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:45:27.101447 skipped lava-multinode-overlay
162 12:45:27.101522 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:45:27.101603 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:45:27.101675 Loading test definitions
165 12:45:27.101768 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 12:45:27.101843 Using /lava-6819503 at stage 0
167 12:45:27.102110 uuid=6819503_1.5.2.3.1 testdef=None
168 12:45:27.102203 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:45:27.102293 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 12:45:27.102768 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:45:27.103001 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 12:45:27.103570 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:45:27.103814 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 12:45:27.104355 runner path: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/0/tests/0_dmesg test_uuid 6819503_1.5.2.3.1
177 12:45:27.104505 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:45:27.104741 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 12:45:27.104817 Using /lava-6819503 at stage 1
181 12:45:27.105119 uuid=6819503_1.5.2.3.5 testdef=None
182 12:45:27.105212 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:45:27.105301 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 12:45:27.105744 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:45:27.105973 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 12:45:27.106550 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:45:27.106797 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 12:45:27.107352 runner path: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/1/tests/1_bootrr test_uuid 6819503_1.5.2.3.5
191 12:45:27.107496 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:45:27.107713 Creating lava-test-runner.conf files
194 12:45:27.107780 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/0 for stage 0
195 12:45:27.107864 - 0_dmesg
196 12:45:27.107940 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819503/lava-overlay-7kt_5_7e/lava-6819503/1 for stage 1
197 12:45:27.108023 - 1_bootrr
198 12:45:27.108115 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:45:27.108202 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 12:45:27.113794 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:45:27.113901 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 12:45:27.113991 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:45:27.114080 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:45:27.114168 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 12:45:27.219327 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:45:27.219684 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 12:45:27.219801 extracting modules file /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819503/extract-nfsrootfs-t0va3ibe
208 12:45:27.223834 extracting modules file /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819503/extract-overlay-ramdisk-0recq8og/ramdisk
209 12:45:27.227656 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:45:27.227772 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 12:45:27.227861 [common] Applying overlay to NFS
212 12:45:27.227933 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819503/compress-overlay-olhtb6p6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819503/extract-nfsrootfs-t0va3ibe
213 12:45:27.231743 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:45:27.231854 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 12:45:27.231947 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:45:27.232042 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 12:45:27.232123 Building ramdisk /var/lib/lava/dispatcher/tmp/6819503/extract-overlay-ramdisk-0recq8og/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819503/extract-overlay-ramdisk-0recq8og/ramdisk
218 12:45:27.265972 >> 24434 blocks
219 12:45:27.747701 rename /var/lib/lava/dispatcher/tmp/6819503/extract-overlay-ramdisk-0recq8og/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/ramdisk/ramdisk.cpio.gz
220 12:45:27.748101 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:45:27.748265 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 12:45:27.748370 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 12:45:27.748466 No mkimage arch provided, not using FIT.
224 12:45:27.748555 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:45:27.748641 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:45:27.748735 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:45:27.748843 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 12:45:27.748925 No LXC device requested
229 12:45:27.749033 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:45:27.749119 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 12:45:27.749198 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:45:27.749268 Checking files for TFTP limit of 4294967296 bytes.
233 12:45:27.749645 end: 1 tftp-deploy (duration 00:00:09) [common]
234 12:45:27.749748 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:45:27.749842 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:45:27.749968 substitutions:
237 12:45:27.750034 - {DTB}: None
238 12:45:27.750096 - {INITRD}: 6819503/tftp-deploy-cg7m4xdo/ramdisk/ramdisk.cpio.gz
239 12:45:27.750155 - {KERNEL}: 6819503/tftp-deploy-cg7m4xdo/kernel/bzImage
240 12:45:27.750212 - {LAVA_MAC}: None
241 12:45:27.750269 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819503/extract-nfsrootfs-t0va3ibe
242 12:45:27.750326 - {NFS_SERVER_IP}: 192.168.201.1
243 12:45:27.750381 - {PRESEED_CONFIG}: None
244 12:45:27.750435 - {PRESEED_LOCAL}: None
245 12:45:27.750489 - {RAMDISK}: 6819503/tftp-deploy-cg7m4xdo/ramdisk/ramdisk.cpio.gz
246 12:45:27.750543 - {ROOT_PART}: None
247 12:45:27.750597 - {ROOT}: None
248 12:45:27.750650 - {SERVER_IP}: 192.168.201.1
249 12:45:27.750704 - {TEE}: None
250 12:45:27.750758 Parsed boot commands:
251 12:45:27.750811 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:45:27.750971 Parsed boot commands: tftpboot 192.168.201.1 6819503/tftp-deploy-cg7m4xdo/kernel/bzImage 6819503/tftp-deploy-cg7m4xdo/kernel/cmdline 6819503/tftp-deploy-cg7m4xdo/ramdisk/ramdisk.cpio.gz
253 12:45:27.751063 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:45:27.751150 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:45:27.751238 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:45:27.751322 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:45:27.751389 Not connected, no need to disconnect.
258 12:45:27.751465 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:45:27.751550 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:45:27.751616 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
261 12:45:27.754330 Setting prompt string to ['lava-test: # ']
262 12:45:27.754736 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:45:27.754860 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:45:27.754960 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:45:27.755053 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:45:27.755228 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
267 12:45:27.774705 >> Command sent successfully.
268 12:45:27.776512 Returned 0 in 0 seconds
269 12:45:27.877111 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:45:27.877444 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:45:27.877566 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:45:27.877663 Setting prompt string to 'Starting depthcharge on Voema...'
274 12:45:27.877734 Changing prompt to 'Starting depthcharge on Voema...'
275 12:45:27.877808 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 12:45:27.878085 [Enter `^Ec?' for help]
277 12:45:35.380584
278 12:45:35.380743
279 12:45:35.390327 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 12:45:35.393389 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 12:45:35.399998 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 12:45:35.403266 CPU: AES supported, TXT NOT supported, VT supported
283 12:45:35.410414 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 12:45:35.416783 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 12:45:35.420008 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 12:45:35.423278 VBOOT: Loading verstage.
287 12:45:35.430067 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 12:45:35.433380 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 12:45:35.436637 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 12:45:35.447594 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 12:45:35.453695 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 12:45:35.453814
293 12:45:35.453891
294 12:45:35.467111 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 12:45:35.480705 Probing TPM: . done!
296 12:45:35.483994 TPM ready after 0 ms
297 12:45:35.488013 Connected to device vid:did:rid of 1ae0:0028:00
298 12:45:35.498745 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 12:45:35.505681 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 12:45:35.509040 Initialized TPM device CR50 revision 0
301 12:45:35.555917 tlcl_send_startup: Startup return code is 0
302 12:45:35.556054 TPM: setup succeeded
303 12:45:35.570200 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 12:45:35.584367 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 12:45:35.597116 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 12:45:35.607008 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 12:45:35.610338 Chrome EC: UHEPI supported
308 12:45:35.613681 Phase 1
309 12:45:35.616882 FMAP: area GBB found @ 1805000 (458752 bytes)
310 12:45:35.626744 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 12:45:35.633342 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 12:45:35.640032 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 12:45:35.646765 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 12:45:35.649981 Recovery requested (1009000e)
315 12:45:35.653421 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 12:45:35.665179 tlcl_extend: response is 0
317 12:45:35.671912 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 12:45:35.681432 tlcl_extend: response is 0
319 12:45:35.688045 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 12:45:35.694490 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 12:45:35.701643 BS: verstage times (exec / console): total (unknown) / 142 ms
322 12:45:35.701733
323 12:45:35.701805
324 12:45:35.714691 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 12:45:35.721055 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 12:45:35.724375 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 12:45:35.727800 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 12:45:35.734426 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 12:45:35.737757 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 12:45:35.741045 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 12:45:35.744124 TCO_STS: 0000 0000
332 12:45:35.747547 GEN_PMCON: d0015038 00002200
333 12:45:35.750823 GBLRST_CAUSE: 00000000 00000000
334 12:45:35.753961 HPR_CAUSE0: 00000000
335 12:45:35.754050 prev_sleep_state 5
336 12:45:35.757728 Boot Count incremented to 8587
337 12:45:35.764335 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 12:45:35.770937 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 12:45:35.780799 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 12:45:35.787206 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 12:45:35.790469 Chrome EC: UHEPI supported
342 12:45:35.797135 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 12:45:35.808498 Probing TPM: done!
344 12:45:35.814954 Connected to device vid:did:rid of 1ae0:0028:00
345 12:45:35.825640 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 12:45:35.832825 Initialized TPM device CR50 revision 0
347 12:45:35.842409 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 12:45:35.849113 MRC: Hash idx 0x100b comparison successful.
349 12:45:35.852381 MRC cache found, size faa8
350 12:45:35.852465 bootmode is set to: 2
351 12:45:35.855737 SPD index = 0
352 12:45:35.862371 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 12:45:35.865661 SPD: module type is LPDDR4X
354 12:45:35.868513 SPD: module part number is MT53E512M64D4NW-046
355 12:45:35.875677 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 12:45:35.878901 SPD: device width 16 bits, bus width 16 bits
357 12:45:35.885354 SPD: module size is 1024 MB (per channel)
358 12:45:36.318015 CBMEM:
359 12:45:36.321394 IMD: root @ 0x76fff000 254 entries.
360 12:45:36.324599 IMD: root @ 0x76ffec00 62 entries.
361 12:45:36.327890 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 12:45:36.334563 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 12:45:36.337770 External stage cache:
364 12:45:36.341061 IMD: root @ 0x7b3ff000 254 entries.
365 12:45:36.344138 IMD: root @ 0x7b3fec00 62 entries.
366 12:45:36.359906 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 12:45:36.366505 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 12:45:36.373048 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 12:45:36.386996 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 12:45:36.393601 cse_lite: Skip switching to RW in the recovery path
371 12:45:36.393690 8 DIMMs found
372 12:45:36.396824 SMM Memory Map
373 12:45:36.400723 SMRAM : 0x7b000000 0x800000
374 12:45:36.400808 Subregion 0: 0x7b000000 0x200000
375 12:45:36.407758 Subregion 1: 0x7b200000 0x200000
376 12:45:36.407844 Subregion 2: 0x7b400000 0x400000
377 12:45:36.411164 top_of_ram = 0x77000000
378 12:45:36.417740 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 12:45:36.420906 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 12:45:36.427630 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 12:45:36.431158 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 12:45:36.440804 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 12:45:36.447407 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 12:45:36.457343 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 12:45:36.460588 Processing 211 relocs. Offset value of 0x74c0b000
386 12:45:36.470072 BS: romstage times (exec / console): total (unknown) / 277 ms
387 12:45:36.476137
388 12:45:36.476222
389 12:45:36.485609 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 12:45:36.489291 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 12:45:36.498810 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 12:45:36.505354 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 12:45:36.512534 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 12:45:36.518840 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 12:45:36.566197 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 12:45:36.572839 Processing 5008 relocs. Offset value of 0x75d98000
397 12:45:36.575990 BS: postcar times (exec / console): total (unknown) / 59 ms
398 12:45:36.579288
399 12:45:36.579406
400 12:45:36.589353 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 12:45:36.589459 Normal boot
402 12:45:36.592532 FW_CONFIG value is 0x804c02
403 12:45:36.595836 PCI: 00:07.0 disabled by fw_config
404 12:45:36.599457 PCI: 00:07.1 disabled by fw_config
405 12:45:36.602689 PCI: 00:0d.2 disabled by fw_config
406 12:45:36.606052 PCI: 00:1c.7 disabled by fw_config
407 12:45:36.612491 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 12:45:36.619139 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 12:45:36.622805 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 12:45:36.626099 GENERIC: 0.0 disabled by fw_config
411 12:45:36.632677 GENERIC: 1.0 disabled by fw_config
412 12:45:36.635861 fw_config match found: DB_USB=USB3_ACTIVE
413 12:45:36.639144 fw_config match found: DB_USB=USB3_ACTIVE
414 12:45:36.642359 fw_config match found: DB_USB=USB3_ACTIVE
415 12:45:36.649079 fw_config match found: DB_USB=USB3_ACTIVE
416 12:45:36.652328 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 12:45:36.658920 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 12:45:36.669208 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 12:45:36.675882 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 12:45:36.678648 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 12:45:36.685213 microcode: Update skipped, already up-to-date
422 12:45:36.692023 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 12:45:36.719844 Detected 4 core, 8 thread CPU.
424 12:45:36.723074 Setting up SMI for CPU
425 12:45:36.726268 IED base = 0x7b400000
426 12:45:36.726354 IED size = 0x00400000
427 12:45:36.729532 Will perform SMM setup.
428 12:45:36.736236 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 12:45:36.742739 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 12:45:36.749571 Processing 16 relocs. Offset value of 0x00030000
431 12:45:36.752869 Attempting to start 7 APs
432 12:45:36.756206 Waiting for 10ms after sending INIT.
433 12:45:36.771997 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 12:45:36.774851 AP: slot 5 apic_id 6.
435 12:45:36.778192 AP: slot 2 apic_id 7.
436 12:45:36.778278 AP: slot 3 apic_id 2.
437 12:45:36.781485 AP: slot 6 apic_id 3.
438 12:45:36.785512 AP: slot 4 apic_id 5.
439 12:45:36.785598 AP: slot 7 apic_id 4.
440 12:45:36.785666 done.
441 12:45:36.791499 Waiting for 2nd SIPI to complete...done.
442 12:45:36.798126 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 12:45:36.804796 Processing 13 relocs. Offset value of 0x00038000
444 12:45:36.808506 Unable to locate Global NVS
445 12:45:36.814765 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 12:45:36.818102 Installing permanent SMM handler to 0x7b000000
447 12:45:36.828143 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 12:45:36.831363 Processing 794 relocs. Offset value of 0x7b010000
449 12:45:36.841414 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 12:45:36.844697 Processing 13 relocs. Offset value of 0x7b008000
451 12:45:36.851218 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 12:45:36.858068 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 12:45:36.861391 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 12:45:36.868025 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 12:45:36.874749 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 12:45:36.881519 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 12:45:36.888095 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 12:45:36.888174 Unable to locate Global NVS
459 12:45:36.898085 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 12:45:36.901337 Clearing SMI status registers
461 12:45:36.901414 SMI_STS: PM1
462 12:45:36.904519 PM1_STS: PWRBTN
463 12:45:36.911157 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 12:45:36.914348 In relocation handler: CPU 0
465 12:45:36.917554 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 12:45:36.924200 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 12:45:36.924278 Relocation complete.
468 12:45:36.934457 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 12:45:36.937328 In relocation handler: CPU 1
470 12:45:36.940708 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 12:45:36.940788 Relocation complete.
472 12:45:36.950890 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
473 12:45:36.954145 In relocation handler: CPU 4
474 12:45:36.957489 New SMBASE=0x7afff000 IEDBASE=0x7b400000
475 12:45:36.957567 Relocation complete.
476 12:45:36.967368 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
477 12:45:36.967450 In relocation handler: CPU 7
478 12:45:36.973914 New SMBASE=0x7affe400 IEDBASE=0x7b400000
479 12:45:36.977348 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:45:36.980523 Relocation complete.
481 12:45:36.987174 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
482 12:45:36.990749 In relocation handler: CPU 2
483 12:45:36.993497 New SMBASE=0x7afff800 IEDBASE=0x7b400000
484 12:45:36.996749 Relocation complete.
485 12:45:37.003341 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
486 12:45:37.006940 In relocation handler: CPU 5
487 12:45:37.010252 New SMBASE=0x7affec00 IEDBASE=0x7b400000
488 12:45:37.016825 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 12:45:37.016903 Relocation complete.
490 12:45:37.026684 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
491 12:45:37.026766 In relocation handler: CPU 3
492 12:45:37.033421 New SMBASE=0x7afff400 IEDBASE=0x7b400000
493 12:45:37.036808 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:45:37.040108 Relocation complete.
495 12:45:37.046571 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
496 12:45:37.049874 In relocation handler: CPU 6
497 12:45:37.053192 New SMBASE=0x7affe800 IEDBASE=0x7b400000
498 12:45:37.056472 Relocation complete.
499 12:45:37.056567 Initializing CPU #0
500 12:45:37.059766 CPU: vendor Intel device 806c1
501 12:45:37.067126 CPU: family 06, model 8c, stepping 01
502 12:45:37.067221 Clearing out pending MCEs
503 12:45:37.070985 Setting up local APIC...
504 12:45:37.074437 apic_id: 0x00 done.
505 12:45:37.074532 Turbo is available but hidden
506 12:45:37.077922 Turbo is available and visible
507 12:45:37.083954 microcode: Update skipped, already up-to-date
508 12:45:37.084045 CPU #0 initialized
509 12:45:37.087794 Initializing CPU #3
510 12:45:37.091021 Initializing CPU #6
511 12:45:37.094336 CPU: vendor Intel device 806c1
512 12:45:37.097128 CPU: family 06, model 8c, stepping 01
513 12:45:37.100482 CPU: vendor Intel device 806c1
514 12:45:37.104044 CPU: family 06, model 8c, stepping 01
515 12:45:37.107225 Clearing out pending MCEs
516 12:45:37.107316 Clearing out pending MCEs
517 12:45:37.110568 Setting up local APIC...
518 12:45:37.113870 Initializing CPU #5
519 12:45:37.117116 Setting up local APIC...
520 12:45:37.117202 Initializing CPU #2
521 12:45:37.120556 CPU: vendor Intel device 806c1
522 12:45:37.123873 CPU: family 06, model 8c, stepping 01
523 12:45:37.127348 CPU: vendor Intel device 806c1
524 12:45:37.130555 CPU: family 06, model 8c, stepping 01
525 12:45:37.133950 Clearing out pending MCEs
526 12:45:37.137110 Clearing out pending MCEs
527 12:45:37.140324 Setting up local APIC...
528 12:45:37.140433 Initializing CPU #4
529 12:45:37.144171 Initializing CPU #7
530 12:45:37.146900 CPU: vendor Intel device 806c1
531 12:45:37.150167 CPU: family 06, model 8c, stepping 01
532 12:45:37.153520 CPU: vendor Intel device 806c1
533 12:45:37.157272 CPU: family 06, model 8c, stepping 01
534 12:45:37.160717 Clearing out pending MCEs
535 12:45:37.163826 Clearing out pending MCEs
536 12:45:37.163910 Setting up local APIC...
537 12:45:37.167249 apic_id: 0x02 done.
538 12:45:37.170168 Initializing CPU #1
539 12:45:37.170251 Setting up local APIC...
540 12:45:37.177453 microcode: Update skipped, already up-to-date
541 12:45:37.180188 apic_id: 0x03 done.
542 12:45:37.180267 CPU #3 initialized
543 12:45:37.183523 microcode: Update skipped, already up-to-date
544 12:45:37.186860 apic_id: 0x05 done.
545 12:45:37.190241 apic_id: 0x04 done.
546 12:45:37.193532 microcode: Update skipped, already up-to-date
547 12:45:37.200520 microcode: Update skipped, already up-to-date
548 12:45:37.200608 CPU #4 initialized
549 12:45:37.205852 CPU #7 initialized
550 12:45:37.207087 CPU: vendor Intel device 806c1
551 12:45:37.210339 CPU: family 06, model 8c, stepping 01
552 12:45:37.210424 CPU #6 initialized
553 12:45:37.213621 apic_id: 0x06 done.
554 12:45:37.216977 Setting up local APIC...
555 12:45:37.220264 Clearing out pending MCEs
556 12:45:37.220340 apic_id: 0x07 done.
557 12:45:37.226547 microcode: Update skipped, already up-to-date
558 12:45:37.230039 microcode: Update skipped, already up-to-date
559 12:45:37.233564 CPU #5 initialized
560 12:45:37.233644 CPU #2 initialized
561 12:45:37.236600 Setting up local APIC...
562 12:45:37.240120 apic_id: 0x01 done.
563 12:45:37.243344 microcode: Update skipped, already up-to-date
564 12:45:37.246489 CPU #1 initialized
565 12:45:37.249708 bsp_do_flight_plan done after 455 msecs.
566 12:45:37.253471 CPU: frequency set to 4000 MHz
567 12:45:37.253554 Enabling SMIs.
568 12:45:37.259868 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 12:45:37.276637 SATAXPCIE1 indicates PCIe NVMe is present
570 12:45:37.280321 Probing TPM: done!
571 12:45:37.283702 Connected to device vid:did:rid of 1ae0:0028:00
572 12:45:37.293952 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 12:45:37.297894 Initialized TPM device CR50 revision 0
574 12:45:37.301234 Enabling S0i3.4
575 12:45:37.307751 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 12:45:37.310584 Found a VBT of 8704 bytes after decompression
577 12:45:37.317489 cse_lite: CSE RO boot. HybridStorageMode disabled
578 12:45:37.323644 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 12:45:37.400143 FSPS returned 0
580 12:45:37.403710 Executing Phase 1 of FspMultiPhaseSiInit
581 12:45:37.413450 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 12:45:37.416726 port C0 DISC req: usage 1 usb3 1 usb2 5
583 12:45:37.419993 Raw Buffer output 0 00000511
584 12:45:37.423040 Raw Buffer output 1 00000000
585 12:45:37.427029 pmc_send_ipc_cmd succeeded
586 12:45:37.433702 port C1 DISC req: usage 1 usb3 2 usb2 3
587 12:45:37.433796 Raw Buffer output 0 00000321
588 12:45:37.436913 Raw Buffer output 1 00000000
589 12:45:37.441037 pmc_send_ipc_cmd succeeded
590 12:45:37.446207 Detected 4 core, 8 thread CPU.
591 12:45:37.450029 Detected 4 core, 8 thread CPU.
592 12:45:37.683479 Display FSP Version Info HOB
593 12:45:37.686790 Reference Code - CPU = a.0.4c.31
594 12:45:37.690068 uCode Version = 0.0.0.86
595 12:45:37.693261 TXT ACM version = ff.ff.ff.ffff
596 12:45:37.696459 Reference Code - ME = a.0.4c.31
597 12:45:37.699891 MEBx version = 0.0.0.0
598 12:45:37.703101 ME Firmware Version = Consumer SKU
599 12:45:37.706685 Reference Code - PCH = a.0.4c.31
600 12:45:37.709802 PCH-CRID Status = Disabled
601 12:45:37.713361 PCH-CRID Original Value = ff.ff.ff.ffff
602 12:45:37.716319 PCH-CRID New Value = ff.ff.ff.ffff
603 12:45:37.719581 OPROM - RST - RAID = ff.ff.ff.ffff
604 12:45:37.723278 PCH Hsio Version = 4.0.0.0
605 12:45:37.726635 Reference Code - SA - System Agent = a.0.4c.31
606 12:45:37.729891 Reference Code - MRC = 2.0.0.1
607 12:45:37.733241 SA - PCIe Version = a.0.4c.31
608 12:45:37.736542 SA-CRID Status = Disabled
609 12:45:37.739689 SA-CRID Original Value = 0.0.0.1
610 12:45:37.742843 SA-CRID New Value = 0.0.0.1
611 12:45:37.746325 OPROM - VBIOS = ff.ff.ff.ffff
612 12:45:37.750071 IO Manageability Engine FW Version = 11.1.4.0
613 12:45:37.753276 PHY Build Version = 0.0.0.e0
614 12:45:37.756389 Thunderbolt(TM) FW Version = 0.0.0.0
615 12:45:37.763175 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 12:45:37.766500 ITSS IRQ Polarities Before:
617 12:45:37.766589 IPC0: 0xffffffff
618 12:45:37.769669 IPC1: 0xffffffff
619 12:45:37.769757 IPC2: 0xffffffff
620 12:45:37.772848 IPC3: 0xffffffff
621 12:45:37.776005 ITSS IRQ Polarities After:
622 12:45:37.776093 IPC0: 0xffffffff
623 12:45:37.779728 IPC1: 0xffffffff
624 12:45:37.779815 IPC2: 0xffffffff
625 12:45:37.783121 IPC3: 0xffffffff
626 12:45:37.786037 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 12:45:37.799281 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 12:45:37.809174 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 12:45:37.822416 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 12:45:37.829213 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
631 12:45:37.832347 Enumerating buses...
632 12:45:37.835653 Show all devs... Before device enumeration.
633 12:45:37.839127 Root Device: enabled 1
634 12:45:37.839217 DOMAIN: 0000: enabled 1
635 12:45:37.842263 CPU_CLUSTER: 0: enabled 1
636 12:45:37.845482 PCI: 00:00.0: enabled 1
637 12:45:37.848734 PCI: 00:02.0: enabled 1
638 12:45:37.848824 PCI: 00:04.0: enabled 1
639 12:45:37.851952 PCI: 00:05.0: enabled 1
640 12:45:37.855288 PCI: 00:06.0: enabled 0
641 12:45:37.858892 PCI: 00:07.0: enabled 0
642 12:45:37.858976 PCI: 00:07.1: enabled 0
643 12:45:37.862080 PCI: 00:07.2: enabled 0
644 12:45:37.865784 PCI: 00:07.3: enabled 0
645 12:45:37.868931 PCI: 00:08.0: enabled 1
646 12:45:37.869058 PCI: 00:09.0: enabled 0
647 12:45:37.872064 PCI: 00:0a.0: enabled 0
648 12:45:37.875778 PCI: 00:0d.0: enabled 1
649 12:45:37.875865 PCI: 00:0d.1: enabled 0
650 12:45:37.879008 PCI: 00:0d.2: enabled 0
651 12:45:37.881965 PCI: 00:0d.3: enabled 0
652 12:45:37.885326 PCI: 00:0e.0: enabled 0
653 12:45:37.885410 PCI: 00:10.2: enabled 1
654 12:45:37.888821 PCI: 00:10.6: enabled 0
655 12:45:37.892103 PCI: 00:10.7: enabled 0
656 12:45:37.895376 PCI: 00:12.0: enabled 0
657 12:45:37.895460 PCI: 00:12.6: enabled 0
658 12:45:37.898720 PCI: 00:13.0: enabled 0
659 12:45:37.901973 PCI: 00:14.0: enabled 1
660 12:45:37.905451 PCI: 00:14.1: enabled 0
661 12:45:37.905534 PCI: 00:14.2: enabled 1
662 12:45:37.908645 PCI: 00:14.3: enabled 1
663 12:45:37.912030 PCI: 00:15.0: enabled 1
664 12:45:37.915098 PCI: 00:15.1: enabled 1
665 12:45:37.915180 PCI: 00:15.2: enabled 1
666 12:45:37.918398 PCI: 00:15.3: enabled 1
667 12:45:37.921583 PCI: 00:16.0: enabled 1
668 12:45:37.924992 PCI: 00:16.1: enabled 0
669 12:45:37.925088 PCI: 00:16.2: enabled 0
670 12:45:37.928237 PCI: 00:16.3: enabled 0
671 12:45:37.931985 PCI: 00:16.4: enabled 0
672 12:45:37.932111 PCI: 00:16.5: enabled 0
673 12:45:37.935135 PCI: 00:17.0: enabled 1
674 12:45:37.938499 PCI: 00:19.0: enabled 0
675 12:45:37.941747 PCI: 00:19.1: enabled 1
676 12:45:37.941829 PCI: 00:19.2: enabled 0
677 12:45:37.944876 PCI: 00:1c.0: enabled 1
678 12:45:37.948655 PCI: 00:1c.1: enabled 0
679 12:45:37.951402 PCI: 00:1c.2: enabled 0
680 12:45:37.951500 PCI: 00:1c.3: enabled 0
681 12:45:37.955267 PCI: 00:1c.4: enabled 0
682 12:45:37.958542 PCI: 00:1c.5: enabled 0
683 12:45:37.961867 PCI: 00:1c.6: enabled 1
684 12:45:37.961949 PCI: 00:1c.7: enabled 0
685 12:45:37.965108 PCI: 00:1d.0: enabled 1
686 12:45:37.968095 PCI: 00:1d.1: enabled 0
687 12:45:37.971342 PCI: 00:1d.2: enabled 1
688 12:45:37.971441 PCI: 00:1d.3: enabled 0
689 12:45:37.974695 PCI: 00:1e.0: enabled 1
690 12:45:37.977962 PCI: 00:1e.1: enabled 0
691 12:45:37.978046 PCI: 00:1e.2: enabled 1
692 12:45:37.981210 PCI: 00:1e.3: enabled 1
693 12:45:37.984761 PCI: 00:1f.0: enabled 1
694 12:45:37.987920 PCI: 00:1f.1: enabled 0
695 12:45:37.988019 PCI: 00:1f.2: enabled 1
696 12:45:37.991080 PCI: 00:1f.3: enabled 1
697 12:45:37.994938 PCI: 00:1f.4: enabled 0
698 12:45:37.998136 PCI: 00:1f.5: enabled 1
699 12:45:37.998220 PCI: 00:1f.6: enabled 0
700 12:45:38.001389 PCI: 00:1f.7: enabled 0
701 12:45:38.004688 APIC: 00: enabled 1
702 12:45:38.004774 GENERIC: 0.0: enabled 1
703 12:45:38.007859 GENERIC: 0.0: enabled 1
704 12:45:38.011116 GENERIC: 1.0: enabled 1
705 12:45:38.014474 GENERIC: 0.0: enabled 1
706 12:45:38.014559 GENERIC: 1.0: enabled 1
707 12:45:38.017706 USB0 port 0: enabled 1
708 12:45:38.021086 GENERIC: 0.0: enabled 1
709 12:45:38.024180 USB0 port 0: enabled 1
710 12:45:38.024265 GENERIC: 0.0: enabled 1
711 12:45:38.027462 I2C: 00:1a: enabled 1
712 12:45:38.031152 I2C: 00:31: enabled 1
713 12:45:38.031237 I2C: 00:32: enabled 1
714 12:45:38.034743 I2C: 00:10: enabled 1
715 12:45:38.037901 I2C: 00:15: enabled 1
716 12:45:38.037986 GENERIC: 0.0: enabled 0
717 12:45:38.040691 GENERIC: 1.0: enabled 0
718 12:45:38.043998 GENERIC: 0.0: enabled 1
719 12:45:38.047287 SPI: 00: enabled 1
720 12:45:38.047370 SPI: 00: enabled 1
721 12:45:38.050744 PNP: 0c09.0: enabled 1
722 12:45:38.053922 GENERIC: 0.0: enabled 1
723 12:45:38.054004 USB3 port 0: enabled 1
724 12:45:38.057142 USB3 port 1: enabled 1
725 12:45:38.060532 USB3 port 2: enabled 0
726 12:45:38.060611 USB3 port 3: enabled 0
727 12:45:38.063823 USB2 port 0: enabled 0
728 12:45:38.067375 USB2 port 1: enabled 1
729 12:45:38.070455 USB2 port 2: enabled 1
730 12:45:38.070543 USB2 port 3: enabled 0
731 12:45:38.073694 USB2 port 4: enabled 1
732 12:45:38.077462 USB2 port 5: enabled 0
733 12:45:38.077541 USB2 port 6: enabled 0
734 12:45:38.080784 USB2 port 7: enabled 0
735 12:45:38.084011 USB2 port 8: enabled 0
736 12:45:38.087222 USB2 port 9: enabled 0
737 12:45:38.087302 USB3 port 0: enabled 0
738 12:45:38.090499 USB3 port 1: enabled 1
739 12:45:38.093666 USB3 port 2: enabled 0
740 12:45:38.093774 USB3 port 3: enabled 0
741 12:45:38.097388 GENERIC: 0.0: enabled 1
742 12:45:38.100538 GENERIC: 1.0: enabled 1
743 12:45:38.100626 APIC: 01: enabled 1
744 12:45:38.103769 APIC: 07: enabled 1
745 12:45:38.107087 APIC: 02: enabled 1
746 12:45:38.107174 APIC: 05: enabled 1
747 12:45:38.110485 APIC: 06: enabled 1
748 12:45:38.113259 APIC: 03: enabled 1
749 12:45:38.113346 APIC: 04: enabled 1
750 12:45:38.116851 Compare with tree...
751 12:45:38.120187 Root Device: enabled 1
752 12:45:38.120273 DOMAIN: 0000: enabled 1
753 12:45:38.123514 PCI: 00:00.0: enabled 1
754 12:45:38.126664 PCI: 00:02.0: enabled 1
755 12:45:38.129997 PCI: 00:04.0: enabled 1
756 12:45:38.133711 GENERIC: 0.0: enabled 1
757 12:45:38.133798 PCI: 00:05.0: enabled 1
758 12:45:38.136960 PCI: 00:06.0: enabled 0
759 12:45:38.140170 PCI: 00:07.0: enabled 0
760 12:45:38.143394 GENERIC: 0.0: enabled 1
761 12:45:38.146724 PCI: 00:07.1: enabled 0
762 12:45:38.146812 GENERIC: 1.0: enabled 1
763 12:45:38.149859 PCI: 00:07.2: enabled 0
764 12:45:38.153261 GENERIC: 0.0: enabled 1
765 12:45:38.156498 PCI: 00:07.3: enabled 0
766 12:45:38.159812 GENERIC: 1.0: enabled 1
767 12:45:38.159900 PCI: 00:08.0: enabled 1
768 12:45:38.163265 PCI: 00:09.0: enabled 0
769 12:45:38.166257 PCI: 00:0a.0: enabled 0
770 12:45:38.170023 PCI: 00:0d.0: enabled 1
771 12:45:38.173242 USB0 port 0: enabled 1
772 12:45:38.173333 USB3 port 0: enabled 1
773 12:45:38.176376 USB3 port 1: enabled 1
774 12:45:38.179455 USB3 port 2: enabled 0
775 12:45:38.182767 USB3 port 3: enabled 0
776 12:45:38.186016 PCI: 00:0d.1: enabled 0
777 12:45:38.189290 PCI: 00:0d.2: enabled 0
778 12:45:38.189372 GENERIC: 0.0: enabled 1
779 12:45:38.192575 PCI: 00:0d.3: enabled 0
780 12:45:38.196222 PCI: 00:0e.0: enabled 0
781 12:45:38.199128 PCI: 00:10.2: enabled 1
782 12:45:38.202728 PCI: 00:10.6: enabled 0
783 12:45:38.202811 PCI: 00:10.7: enabled 0
784 12:45:38.206087 PCI: 00:12.0: enabled 0
785 12:45:38.209313 PCI: 00:12.6: enabled 0
786 12:45:38.212608 PCI: 00:13.0: enabled 0
787 12:45:38.215927 PCI: 00:14.0: enabled 1
788 12:45:38.216002 USB0 port 0: enabled 1
789 12:45:38.219182 USB2 port 0: enabled 0
790 12:45:38.222379 USB2 port 1: enabled 1
791 12:45:38.225653 USB2 port 2: enabled 1
792 12:45:38.229129 USB2 port 3: enabled 0
793 12:45:38.232350 USB2 port 4: enabled 1
794 12:45:38.232465 USB2 port 5: enabled 0
795 12:45:38.235534 USB2 port 6: enabled 0
796 12:45:38.239356 USB2 port 7: enabled 0
797 12:45:38.242643 USB2 port 8: enabled 0
798 12:45:38.245668 USB2 port 9: enabled 0
799 12:45:38.248897 USB3 port 0: enabled 0
800 12:45:38.248991 USB3 port 1: enabled 1
801 12:45:38.252311 USB3 port 2: enabled 0
802 12:45:38.255568 USB3 port 3: enabled 0
803 12:45:38.258780 PCI: 00:14.1: enabled 0
804 12:45:38.262167 PCI: 00:14.2: enabled 1
805 12:45:38.262255 PCI: 00:14.3: enabled 1
806 12:45:38.265375 GENERIC: 0.0: enabled 1
807 12:45:38.268514 PCI: 00:15.0: enabled 1
808 12:45:38.272075 I2C: 00:1a: enabled 1
809 12:45:38.275406 I2C: 00:31: enabled 1
810 12:45:38.275493 I2C: 00:32: enabled 1
811 12:45:38.278515 PCI: 00:15.1: enabled 1
812 12:45:38.281916 I2C: 00:10: enabled 1
813 12:45:38.285211 PCI: 00:15.2: enabled 1
814 12:45:38.288545 PCI: 00:15.3: enabled 1
815 12:45:38.288644 PCI: 00:16.0: enabled 1
816 12:45:38.291930 PCI: 00:16.1: enabled 0
817 12:45:38.295315 PCI: 00:16.2: enabled 0
818 12:45:38.298395 PCI: 00:16.3: enabled 0
819 12:45:38.298480 PCI: 00:16.4: enabled 0
820 12:45:38.302044 PCI: 00:16.5: enabled 0
821 12:45:38.305069 PCI: 00:17.0: enabled 1
822 12:45:38.308337 PCI: 00:19.0: enabled 0
823 12:45:38.312138 PCI: 00:19.1: enabled 1
824 12:45:38.312221 I2C: 00:15: enabled 1
825 12:45:38.316159 PCI: 00:19.2: enabled 0
826 12:45:38.319317 PCI: 00:1d.0: enabled 1
827 12:45:38.322629 GENERIC: 0.0: enabled 1
828 12:45:38.322712 PCI: 00:1e.0: enabled 1
829 12:45:38.326009 PCI: 00:1e.1: enabled 0
830 12:45:38.376433 PCI: 00:1e.2: enabled 1
831 12:45:38.376566 SPI: 00: enabled 1
832 12:45:38.376863 PCI: 00:1e.3: enabled 1
833 12:45:38.376964 SPI: 00: enabled 1
834 12:45:38.377044 PCI: 00:1f.0: enabled 1
835 12:45:38.377109 PNP: 0c09.0: enabled 1
836 12:45:38.377172 PCI: 00:1f.1: enabled 0
837 12:45:38.377449 PCI: 00:1f.2: enabled 1
838 12:45:38.377531 GENERIC: 0.0: enabled 1
839 12:45:38.377615 GENERIC: 0.0: enabled 1
840 12:45:38.377874 GENERIC: 1.0: enabled 1
841 12:45:38.377946 PCI: 00:1f.3: enabled 1
842 12:45:38.378025 PCI: 00:1f.4: enabled 0
843 12:45:38.378110 PCI: 00:1f.5: enabled 1
844 12:45:38.378174 PCI: 00:1f.6: enabled 0
845 12:45:38.378239 PCI: 00:1f.7: enabled 0
846 12:45:38.378318 CPU_CLUSTER: 0: enabled 1
847 12:45:38.378573 APIC: 00: enabled 1
848 12:45:38.378649 APIC: 01: enabled 1
849 12:45:38.411739 APIC: 07: enabled 1
850 12:45:38.411857 APIC: 02: enabled 1
851 12:45:38.411934 APIC: 05: enabled 1
852 12:45:38.412230 APIC: 06: enabled 1
853 12:45:38.412313 APIC: 03: enabled 1
854 12:45:38.412397 APIC: 04: enabled 1
855 12:45:38.412479 Root Device scanning...
856 12:45:38.412562 scan_static_bus for Root Device
857 12:45:38.412640 DOMAIN: 0000 enabled
858 12:45:38.412720 CPU_CLUSTER: 0 enabled
859 12:45:38.412813 DOMAIN: 0000 scanning...
860 12:45:38.413084 PCI: pci_scan_bus for bus 00
861 12:45:38.413160 PCI: 00:00.0 [8086/0000] ops
862 12:45:38.415377 PCI: 00:00.0 [8086/9a12] enabled
863 12:45:38.415463 PCI: 00:02.0 [8086/0000] bus ops
864 12:45:38.418732 PCI: 00:02.0 [8086/9a40] enabled
865 12:45:38.422415 PCI: 00:04.0 [8086/0000] bus ops
866 12:45:38.425692 PCI: 00:04.0 [8086/9a03] enabled
867 12:45:38.428872 PCI: 00:05.0 [8086/9a19] enabled
868 12:45:38.431950 PCI: 00:07.0 [0000/0000] hidden
869 12:45:38.435258 PCI: 00:08.0 [8086/9a11] enabled
870 12:45:38.438985 PCI: 00:0a.0 [8086/9a0d] disabled
871 12:45:38.441644 PCI: 00:0d.0 [8086/0000] bus ops
872 12:45:38.445253 PCI: 00:0d.0 [8086/9a13] enabled
873 12:45:38.448531 PCI: 00:14.0 [8086/0000] bus ops
874 12:45:38.451701 PCI: 00:14.0 [8086/a0ed] enabled
875 12:45:38.454948 PCI: 00:14.2 [8086/a0ef] enabled
876 12:45:38.458232 PCI: 00:14.3 [8086/0000] bus ops
877 12:45:38.461861 PCI: 00:14.3 [8086/a0f0] enabled
878 12:45:38.464769 PCI: 00:15.0 [8086/0000] bus ops
879 12:45:38.468674 PCI: 00:15.0 [8086/a0e8] enabled
880 12:45:38.471787 PCI: 00:15.1 [8086/0000] bus ops
881 12:45:38.474921 PCI: 00:15.1 [8086/a0e9] enabled
882 12:45:38.478115 PCI: 00:15.2 [8086/0000] bus ops
883 12:45:38.481639 PCI: 00:15.2 [8086/a0ea] enabled
884 12:45:38.484955 PCI: 00:15.3 [8086/0000] bus ops
885 12:45:38.488504 PCI: 00:15.3 [8086/a0eb] enabled
886 12:45:38.491892 PCI: 00:16.0 [8086/0000] ops
887 12:45:38.495063 PCI: 00:16.0 [8086/a0e0] enabled
888 12:45:38.501531 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 12:45:38.504636 PCI: 00:19.0 [8086/0000] bus ops
890 12:45:38.508355 PCI: 00:19.0 [8086/a0c5] disabled
891 12:45:38.511635 PCI: 00:19.1 [8086/0000] bus ops
892 12:45:38.514846 PCI: 00:19.1 [8086/a0c6] enabled
893 12:45:38.518191 PCI: 00:1d.0 [8086/0000] bus ops
894 12:45:38.521399 PCI: 00:1d.0 [8086/a0b0] enabled
895 12:45:38.524598 PCI: 00:1e.0 [8086/0000] ops
896 12:45:38.527916 PCI: 00:1e.0 [8086/a0a8] enabled
897 12:45:38.531166 PCI: 00:1e.2 [8086/0000] bus ops
898 12:45:38.534547 PCI: 00:1e.2 [8086/a0aa] enabled
899 12:45:38.537900 PCI: 00:1e.3 [8086/0000] bus ops
900 12:45:38.541105 PCI: 00:1e.3 [8086/a0ab] enabled
901 12:45:38.544343 PCI: 00:1f.0 [8086/0000] bus ops
902 12:45:38.547565 PCI: 00:1f.0 [8086/a087] enabled
903 12:45:38.547648 RTC Init
904 12:45:38.554581 Set power on after power failure.
905 12:45:38.554666 Disabling Deep S3
906 12:45:38.557863 Disabling Deep S3
907 12:45:38.557955 Disabling Deep S4
908 12:45:38.561030 Disabling Deep S4
909 12:45:38.561124 Disabling Deep S5
910 12:45:38.564288 Disabling Deep S5
911 12:45:38.567630 PCI: 00:1f.2 [0000/0000] hidden
912 12:45:38.570873 PCI: 00:1f.3 [8086/0000] bus ops
913 12:45:38.574027 PCI: 00:1f.3 [8086/a0c8] enabled
914 12:45:38.577620 PCI: 00:1f.5 [8086/0000] bus ops
915 12:45:38.580870 PCI: 00:1f.5 [8086/a0a4] enabled
916 12:45:38.584066 PCI: Leftover static devices:
917 12:45:38.584143 PCI: 00:10.2
918 12:45:38.587108 PCI: 00:10.6
919 12:45:38.587195 PCI: 00:10.7
920 12:45:38.590923 PCI: 00:06.0
921 12:45:38.591009 PCI: 00:07.1
922 12:45:38.591078 PCI: 00:07.2
923 12:45:38.593758 PCI: 00:07.3
924 12:45:38.593845 PCI: 00:09.0
925 12:45:38.597578 PCI: 00:0d.1
926 12:45:38.597665 PCI: 00:0d.2
927 12:45:38.600236 PCI: 00:0d.3
928 12:45:38.600317 PCI: 00:0e.0
929 12:45:38.600409 PCI: 00:12.0
930 12:45:38.604049 PCI: 00:12.6
931 12:45:38.604124 PCI: 00:13.0
932 12:45:38.607095 PCI: 00:14.1
933 12:45:38.607190 PCI: 00:16.1
934 12:45:38.607267 PCI: 00:16.2
935 12:45:38.610835 PCI: 00:16.3
936 12:45:38.610921 PCI: 00:16.4
937 12:45:38.613519 PCI: 00:16.5
938 12:45:38.613605 PCI: 00:17.0
939 12:45:38.613674 PCI: 00:19.2
940 12:45:38.617073 PCI: 00:1e.1
941 12:45:38.617154 PCI: 00:1f.1
942 12:45:38.620243 PCI: 00:1f.4
943 12:45:38.620344 PCI: 00:1f.6
944 12:45:38.623800 PCI: 00:1f.7
945 12:45:38.626822 PCI: Check your devicetree.cb.
946 12:45:38.626908 PCI: 00:02.0 scanning...
947 12:45:38.630214 scan_generic_bus for PCI: 00:02.0
948 12:45:38.637105 scan_generic_bus for PCI: 00:02.0 done
949 12:45:38.640366 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 12:45:38.643592 PCI: 00:04.0 scanning...
951 12:45:38.646803 scan_generic_bus for PCI: 00:04.0
952 12:45:38.649904 GENERIC: 0.0 enabled
953 12:45:38.653163 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 12:45:38.660191 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 12:45:38.663250 PCI: 00:0d.0 scanning...
956 12:45:38.666536 scan_static_bus for PCI: 00:0d.0
957 12:45:38.666637 USB0 port 0 enabled
958 12:45:38.669761 USB0 port 0 scanning...
959 12:45:38.673053 scan_static_bus for USB0 port 0
960 12:45:38.676815 USB3 port 0 enabled
961 12:45:38.676901 USB3 port 1 enabled
962 12:45:38.679952 USB3 port 2 disabled
963 12:45:38.683200 USB3 port 3 disabled
964 12:45:38.683345 USB3 port 0 scanning...
965 12:45:38.686169 scan_static_bus for USB3 port 0
966 12:45:38.692812 scan_static_bus for USB3 port 0 done
967 12:45:38.696114 scan_bus: bus USB3 port 0 finished in 6 msecs
968 12:45:38.699915 USB3 port 1 scanning...
969 12:45:38.703072 scan_static_bus for USB3 port 1
970 12:45:38.706270 scan_static_bus for USB3 port 1 done
971 12:45:38.709369 scan_bus: bus USB3 port 1 finished in 6 msecs
972 12:45:38.713056 scan_static_bus for USB0 port 0 done
973 12:45:38.719319 scan_bus: bus USB0 port 0 finished in 43 msecs
974 12:45:38.722843 scan_static_bus for PCI: 00:0d.0 done
975 12:45:38.726069 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 12:45:38.729243 PCI: 00:14.0 scanning...
977 12:45:38.732923 scan_static_bus for PCI: 00:14.0
978 12:45:38.735725 USB0 port 0 enabled
979 12:45:38.739018 USB0 port 0 scanning...
980 12:45:38.742783 scan_static_bus for USB0 port 0
981 12:45:38.742873 USB2 port 0 disabled
982 12:45:38.745845 USB2 port 1 enabled
983 12:45:38.749153 USB2 port 2 enabled
984 12:45:38.749233 USB2 port 3 disabled
985 12:45:38.752309 USB2 port 4 enabled
986 12:45:38.752386 USB2 port 5 disabled
987 12:45:38.755474 USB2 port 6 disabled
988 12:45:38.759357 USB2 port 7 disabled
989 12:45:38.759436 USB2 port 8 disabled
990 12:45:38.762578 USB2 port 9 disabled
991 12:45:38.765773 USB3 port 0 disabled
992 12:45:38.765846 USB3 port 1 enabled
993 12:45:38.768960 USB3 port 2 disabled
994 12:45:38.772287 USB3 port 3 disabled
995 12:45:38.772358 USB2 port 1 scanning...
996 12:45:38.775586 scan_static_bus for USB2 port 1
997 12:45:38.782158 scan_static_bus for USB2 port 1 done
998 12:45:38.785585 scan_bus: bus USB2 port 1 finished in 6 msecs
999 12:45:38.788795 USB2 port 2 scanning...
1000 12:45:38.792174 scan_static_bus for USB2 port 2
1001 12:45:38.795404 scan_static_bus for USB2 port 2 done
1002 12:45:38.798696 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 12:45:38.801871 USB2 port 4 scanning...
1004 12:45:38.805037 scan_static_bus for USB2 port 4
1005 12:45:38.808235 scan_static_bus for USB2 port 4 done
1006 12:45:38.815181 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 12:45:38.815263 USB3 port 1 scanning...
1008 12:45:38.818187 scan_static_bus for USB3 port 1
1009 12:45:38.821566 scan_static_bus for USB3 port 1 done
1010 12:45:38.828172 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 12:45:38.831856 scan_static_bus for USB0 port 0 done
1012 12:45:38.835009 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 12:45:38.838366 scan_static_bus for PCI: 00:14.0 done
1014 12:45:38.845120 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 12:45:38.847944 PCI: 00:14.3 scanning...
1016 12:45:38.851586 scan_static_bus for PCI: 00:14.3
1017 12:45:38.851663 GENERIC: 0.0 enabled
1018 12:45:38.858106 scan_static_bus for PCI: 00:14.3 done
1019 12:45:38.861235 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 12:45:38.864849 PCI: 00:15.0 scanning...
1021 12:45:38.868145 scan_static_bus for PCI: 00:15.0
1022 12:45:38.868219 I2C: 00:1a enabled
1023 12:45:38.871971 I2C: 00:31 enabled
1024 12:45:38.874618 I2C: 00:32 enabled
1025 12:45:38.877960 scan_static_bus for PCI: 00:15.0 done
1026 12:45:38.881112 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 12:45:38.884521 PCI: 00:15.1 scanning...
1028 12:45:38.888165 scan_static_bus for PCI: 00:15.1
1029 12:45:38.891801 I2C: 00:10 enabled
1030 12:45:38.895288 scan_static_bus for PCI: 00:15.1 done
1031 12:45:38.898419 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 12:45:38.901517 PCI: 00:15.2 scanning...
1033 12:45:38.904782 scan_static_bus for PCI: 00:15.2
1034 12:45:38.907993 scan_static_bus for PCI: 00:15.2 done
1035 12:45:38.914913 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 12:45:38.914999 PCI: 00:15.3 scanning...
1037 12:45:38.917921 scan_static_bus for PCI: 00:15.3
1038 12:45:38.924915 scan_static_bus for PCI: 00:15.3 done
1039 12:45:38.928217 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 12:45:38.931069 PCI: 00:19.1 scanning...
1041 12:45:38.934842 scan_static_bus for PCI: 00:19.1
1042 12:45:38.934926 I2C: 00:15 enabled
1043 12:45:38.941169 scan_static_bus for PCI: 00:19.1 done
1044 12:45:38.944567 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 12:45:38.947695 PCI: 00:1d.0 scanning...
1046 12:45:38.951061 do_pci_scan_bridge for PCI: 00:1d.0
1047 12:45:38.954283 PCI: pci_scan_bus for bus 01
1048 12:45:38.957816 PCI: 01:00.0 [1c5c/174a] enabled
1049 12:45:38.960761 GENERIC: 0.0 enabled
1050 12:45:38.963861 Enabling Common Clock Configuration
1051 12:45:38.967738 L1 Sub-State supported from root port 29
1052 12:45:38.970856 L1 Sub-State Support = 0xf
1053 12:45:38.974076 CommonModeRestoreTime = 0x28
1054 12:45:38.977346 Power On Value = 0x16, Power On Scale = 0x0
1055 12:45:38.980655 ASPM: Enabled L1
1056 12:45:38.983824 PCIe: Max_Payload_Size adjusted to 128
1057 12:45:38.987461 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 12:45:38.990573 PCI: 00:1e.2 scanning...
1059 12:45:38.993561 scan_generic_bus for PCI: 00:1e.2
1060 12:45:38.996852 SPI: 00 enabled
1061 12:45:39.000310 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 12:45:39.006982 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 12:45:39.010126 PCI: 00:1e.3 scanning...
1064 12:45:39.013470 scan_generic_bus for PCI: 00:1e.3
1065 12:45:39.013550 SPI: 00 enabled
1066 12:45:39.020121 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 12:45:39.027098 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 12:45:39.027182 PCI: 00:1f.0 scanning...
1069 12:45:39.030296 scan_static_bus for PCI: 00:1f.0
1070 12:45:39.033429 PNP: 0c09.0 enabled
1071 12:45:39.036629 PNP: 0c09.0 scanning...
1072 12:45:39.039825 scan_static_bus for PNP: 0c09.0
1073 12:45:39.043014 scan_static_bus for PNP: 0c09.0 done
1074 12:45:39.046347 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 12:45:39.049771 scan_static_bus for PCI: 00:1f.0 done
1076 12:45:39.056621 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 12:45:39.059864 PCI: 00:1f.2 scanning...
1078 12:45:39.063190 scan_static_bus for PCI: 00:1f.2
1079 12:45:39.063275 GENERIC: 0.0 enabled
1080 12:45:39.066318 GENERIC: 0.0 scanning...
1081 12:45:39.069538 scan_static_bus for GENERIC: 0.0
1082 12:45:39.072777 GENERIC: 0.0 enabled
1083 12:45:39.076473 GENERIC: 1.0 enabled
1084 12:45:39.079791 scan_static_bus for GENERIC: 0.0 done
1085 12:45:39.082988 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 12:45:39.086108 scan_static_bus for PCI: 00:1f.2 done
1087 12:45:39.092966 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 12:45:39.096105 PCI: 00:1f.3 scanning...
1089 12:45:39.099878 scan_static_bus for PCI: 00:1f.3
1090 12:45:39.103162 scan_static_bus for PCI: 00:1f.3 done
1091 12:45:39.106272 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 12:45:39.109706 PCI: 00:1f.5 scanning...
1093 12:45:39.112934 scan_generic_bus for PCI: 00:1f.5
1094 12:45:39.116094 scan_generic_bus for PCI: 00:1f.5 done
1095 12:45:39.122464 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 12:45:39.125694 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1097 12:45:39.129584 scan_static_bus for Root Device done
1098 12:45:39.135886 scan_bus: bus Root Device finished in 737 msecs
1099 12:45:39.135965 done
1100 12:45:39.142264 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 12:45:39.145869 Chrome EC: UHEPI supported
1102 12:45:39.152289 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 12:45:39.158870 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 12:45:39.162093 SPI flash protection: WPSW=0 SRP0=0
1105 12:45:39.165329 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 12:45:39.172150 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1107 12:45:39.175419 found VGA at PCI: 00:02.0
1108 12:45:39.178727 Setting up VGA for PCI: 00:02.0
1109 12:45:39.182019 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 12:45:39.189030 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 12:45:39.192134 Allocating resources...
1112 12:45:39.192214 Reading resources...
1113 12:45:39.198909 Root Device read_resources bus 0 link: 0
1114 12:45:39.202064 DOMAIN: 0000 read_resources bus 0 link: 0
1115 12:45:39.205302 PCI: 00:04.0 read_resources bus 1 link: 0
1116 12:45:39.212160 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 12:45:39.215600 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 12:45:39.221764 USB0 port 0 read_resources bus 0 link: 0
1119 12:45:39.225478 USB0 port 0 read_resources bus 0 link: 0 done
1120 12:45:39.231920 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 12:45:39.235382 PCI: 00:14.0 read_resources bus 0 link: 0
1122 12:45:39.238511 USB0 port 0 read_resources bus 0 link: 0
1123 12:45:39.246095 USB0 port 0 read_resources bus 0 link: 0 done
1124 12:45:39.249808 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 12:45:39.256738 PCI: 00:14.3 read_resources bus 0 link: 0
1126 12:45:39.260070 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 12:45:39.266585 PCI: 00:15.0 read_resources bus 0 link: 0
1128 12:45:39.269723 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 12:45:39.276154 PCI: 00:15.1 read_resources bus 0 link: 0
1130 12:45:39.279494 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 12:45:39.287027 PCI: 00:19.1 read_resources bus 0 link: 0
1132 12:45:39.290087 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 12:45:39.296908 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 12:45:39.300083 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 12:45:39.307077 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 12:45:39.310095 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 12:45:39.316725 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 12:45:39.319933 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 12:45:39.326435 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 12:45:39.330112 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 12:45:39.336787 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 12:45:39.339829 GENERIC: 0.0 read_resources bus 0 link: 0
1143 12:45:39.346404 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 12:45:39.349623 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 12:45:39.356352 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 12:45:39.359746 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 12:45:39.366723 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 12:45:39.369925 Root Device read_resources bus 0 link: 0 done
1149 12:45:39.373061 Done reading resources.
1150 12:45:39.379529 Show resources in subtree (Root Device)...After reading.
1151 12:45:39.382841 Root Device child on link 0 DOMAIN: 0000
1152 12:45:39.386032 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 12:45:39.396136 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 12:45:39.406209 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 12:45:39.406303 PCI: 00:00.0
1156 12:45:39.415755 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 12:45:39.425804 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 12:45:39.436019 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 12:45:39.445684 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 12:45:39.455949 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 12:45:39.465506 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 12:45:39.472573 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 12:45:39.482024 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 12:45:39.492328 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 12:45:39.502341 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 12:45:39.511875 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 12:45:39.522033 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 12:45:39.528398 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 12:45:39.538684 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 12:45:39.548424 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 12:45:39.558595 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 12:45:39.568456 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 12:45:39.578288 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 12:45:39.585133 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 12:45:39.594944 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 12:45:39.598292 PCI: 00:02.0
1177 12:45:39.608082 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 12:45:39.617786 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 12:45:39.627975 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 12:45:39.631072 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 12:45:39.641539 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 12:45:39.644693 GENERIC: 0.0
1183 12:45:39.644801 PCI: 00:05.0
1184 12:45:39.654342 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 12:45:39.660771 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 12:45:39.660853 GENERIC: 0.0
1187 12:45:39.664041 PCI: 00:08.0
1188 12:45:39.674207 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 12:45:39.674295 PCI: 00:0a.0
1190 12:45:39.677510 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 12:45:39.687351 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 12:45:39.694420 USB0 port 0 child on link 0 USB3 port 0
1193 12:45:39.694502 USB3 port 0
1194 12:45:39.697567 USB3 port 1
1195 12:45:39.697646 USB3 port 2
1196 12:45:39.700635 USB3 port 3
1197 12:45:39.703812 PCI: 00:14.0 child on link 0 USB0 port 0
1198 12:45:39.713990 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 12:45:39.720845 USB0 port 0 child on link 0 USB2 port 0
1200 12:45:39.720930 USB2 port 0
1201 12:45:39.724104 USB2 port 1
1202 12:45:39.724182 USB2 port 2
1203 12:45:39.727224 USB2 port 3
1204 12:45:39.727302 USB2 port 4
1205 12:45:39.730458 USB2 port 5
1206 12:45:39.730536 USB2 port 6
1207 12:45:39.733908 USB2 port 7
1208 12:45:39.733985 USB2 port 8
1209 12:45:39.737259 USB2 port 9
1210 12:45:39.737339 USB3 port 0
1211 12:45:39.740377 USB3 port 1
1212 12:45:39.743672 USB3 port 2
1213 12:45:39.743771 USB3 port 3
1214 12:45:39.746940 PCI: 00:14.2
1215 12:45:39.756690 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 12:45:39.766929 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 12:45:39.770146 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 12:45:39.779846 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:45:39.779933 GENERIC: 0.0
1220 12:45:39.786844 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 12:45:39.796725 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:45:39.796810 I2C: 00:1a
1223 12:45:39.799594 I2C: 00:31
1224 12:45:39.799671 I2C: 00:32
1225 12:45:39.806424 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 12:45:39.816530 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:45:39.816617 I2C: 00:10
1228 12:45:39.819459 PCI: 00:15.2
1229 12:45:39.829691 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 12:45:39.829802 PCI: 00:15.3
1231 12:45:39.839423 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 12:45:39.842817 PCI: 00:16.0
1233 12:45:39.852490 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:45:39.852580 PCI: 00:19.0
1235 12:45:39.855982 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 12:45:39.865906 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:45:39.869149 I2C: 00:15
1238 12:45:39.872313 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 12:45:39.882504 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 12:45:39.892633 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 12:45:39.902251 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 12:45:39.902336 GENERIC: 0.0
1243 12:45:39.905422 PCI: 01:00.0
1244 12:45:39.915468 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 12:45:39.922197 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 12:45:39.932082 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 12:45:39.935188 PCI: 00:1e.0
1248 12:45:39.944993 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 12:45:39.948745 PCI: 00:1e.2 child on link 0 SPI: 00
1250 12:45:39.958292 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 12:45:39.961570 SPI: 00
1252 12:45:39.964846 PCI: 00:1e.3 child on link 0 SPI: 00
1253 12:45:39.975123 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:45:39.975208 SPI: 00
1255 12:45:39.981651 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 12:45:39.988041 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 12:45:39.991857 PNP: 0c09.0
1258 12:45:39.998226 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 12:45:40.004567 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 12:45:40.015104 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 12:45:40.021326 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 12:45:40.027868 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 12:45:40.027954 GENERIC: 0.0
1264 12:45:40.031007 GENERIC: 1.0
1265 12:45:40.034560 PCI: 00:1f.3
1266 12:45:40.044472 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 12:45:40.054362 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 12:45:40.054453 PCI: 00:1f.5
1269 12:45:40.064067 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 12:45:40.067914 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 12:45:40.071149 APIC: 00
1272 12:45:40.071236 APIC: 01
1273 12:45:40.071305 APIC: 07
1274 12:45:40.074408 APIC: 02
1275 12:45:40.074495 APIC: 05
1276 12:45:40.074565 APIC: 06
1277 12:45:40.077508 APIC: 03
1278 12:45:40.077594 APIC: 04
1279 12:45:40.087251 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 12:45:40.091054 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 12:45:40.097547 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 12:45:40.104162 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 12:45:40.107420 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 12:45:40.113955 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 12:45:40.117081 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 12:45:40.123575 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 12:45:40.130363 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 12:45:40.139998 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 12:45:40.147011 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 12:45:40.153696 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 12:45:40.160180 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 12:45:40.166673 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 12:45:40.173493 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 12:45:40.176718 DOMAIN: 0000: Resource ranges:
1295 12:45:40.179983 * Base: 1000, Size: 800, Tag: 100
1296 12:45:40.186444 * Base: 1900, Size: e700, Tag: 100
1297 12:45:40.190111 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 12:45:40.196424 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 12:45:40.203098 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 12:45:40.213029 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 12:45:40.220147 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 12:45:40.226086 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 12:45:40.236189 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 12:45:40.243022 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 12:45:40.249443 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 12:45:40.259373 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 12:45:40.265865 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 12:45:40.272747 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 12:45:40.282486 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 12:45:40.289091 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 12:45:40.295925 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 12:45:40.305399 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 12:45:40.312333 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 12:45:40.319036 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 12:45:40.328715 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 12:45:40.335172 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 12:45:40.342194 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 12:45:40.351787 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 12:45:40.358201 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 12:45:40.364763 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 12:45:40.374973 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 12:45:40.378039 DOMAIN: 0000: Resource ranges:
1323 12:45:40.381392 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 12:45:40.384675 * Base: d0000000, Size: 28000000, Tag: 200
1325 12:45:40.391540 * Base: fa000000, Size: 1000000, Tag: 200
1326 12:45:40.394841 * Base: fb001000, Size: 2fff000, Tag: 200
1327 12:45:40.398097 * Base: fe010000, Size: 2e000, Tag: 200
1328 12:45:40.401821 * Base: fe03f000, Size: d41000, Tag: 200
1329 12:45:40.408177 * Base: fed88000, Size: 8000, Tag: 200
1330 12:45:40.411519 * Base: fed93000, Size: d000, Tag: 200
1331 12:45:40.414715 * Base: feda2000, Size: 1e000, Tag: 200
1332 12:45:40.417915 * Base: fede0000, Size: 1220000, Tag: 200
1333 12:45:40.424602 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 12:45:40.431013 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 12:45:40.438024 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 12:45:40.444720 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 12:45:40.450845 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 12:45:40.457366 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 12:45:40.464003 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 12:45:40.470904 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 12:45:40.477783 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 12:45:40.484145 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 12:45:40.490557 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 12:45:40.496927 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 12:45:40.503852 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 12:45:40.510370 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 12:45:40.516919 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 12:45:40.523600 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 12:45:40.530493 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 12:45:40.536824 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 12:45:40.543807 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 12:45:40.549912 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 12:45:40.556899 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 12:45:40.563399 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 12:45:40.569933 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 12:45:40.576877 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 12:45:40.586388 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 12:45:40.589544 PCI: 00:1d.0: Resource ranges:
1359 12:45:40.592889 * Base: 7fc00000, Size: 100000, Tag: 200
1360 12:45:40.599754 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 12:45:40.606119 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 12:45:40.613242 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 12:45:40.622887 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 12:45:40.629702 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 12:45:40.632899 Root Device assign_resources, bus 0 link: 0
1366 12:45:40.636049 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 12:45:40.646241 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 12:45:40.653239 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 12:45:40.662674 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 12:45:40.669220 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 12:45:40.676256 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 12:45:40.679398 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 12:45:40.689124 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 12:45:40.695659 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 12:45:40.705721 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 12:45:40.709155 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 12:45:40.712146 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 12:45:40.722004 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 12:45:40.725667 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 12:45:40.732122 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 12:45:40.738888 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 12:45:40.748552 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 12:45:40.755232 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 12:45:40.761720 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 12:45:40.764776 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 12:45:40.771297 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 12:45:40.777758 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 12:45:40.781603 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 12:45:40.791309 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 12:45:40.794503 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 12:45:40.801034 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 12:45:40.807421 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 12:45:40.817753 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 12:45:40.824189 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 12:45:40.834149 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 12:45:40.837544 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 12:45:40.840668 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 12:45:40.850268 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 12:45:40.860364 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 12:45:40.870252 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 12:45:40.873503 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 12:45:40.879968 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 12:45:40.890112 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 12:45:40.896396 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 12:45:40.903392 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 12:45:40.909830 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 12:45:40.916202 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 12:45:40.919527 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 12:45:40.929318 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 12:45:40.932913 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 12:45:40.936089 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 12:45:40.942949 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 12:45:40.946383 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 12:45:40.952322 LPC: Trying to open IO window from 800 size 1ff
1415 12:45:40.959059 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 12:45:40.968856 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 12:45:40.975958 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 12:45:40.982286 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 12:45:40.985560 Root Device assign_resources, bus 0 link: 0
1420 12:45:40.988659 Done setting resources.
1421 12:45:40.995591 Show resources in subtree (Root Device)...After assigning values.
1422 12:45:40.998821 Root Device child on link 0 DOMAIN: 0000
1423 12:45:41.002081 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 12:45:41.011774 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 12:45:41.021550 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 12:45:41.024816 PCI: 00:00.0
1427 12:45:41.034824 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 12:45:41.041751 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 12:45:41.051307 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 12:45:41.061429 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 12:45:41.071070 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 12:45:41.081120 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 12:45:41.091501 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 12:45:41.097720 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 12:45:41.108088 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 12:45:41.117792 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 12:45:41.127690 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 12:45:41.137530 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 12:45:41.147642 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 12:45:41.154110 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 12:45:41.164304 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 12:45:41.173847 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 12:45:41.184146 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 12:45:41.193843 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 12:45:41.203716 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 12:45:41.213960 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 12:45:41.214048 PCI: 00:02.0
1448 12:45:41.223585 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 12:45:41.237279 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 12:45:41.243527 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 12:45:41.250511 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 12:45:41.260329 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 12:45:41.260419 GENERIC: 0.0
1454 12:45:41.263811 PCI: 00:05.0
1455 12:45:41.273509 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 12:45:41.276614 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 12:45:41.280003 GENERIC: 0.0
1458 12:45:41.280088 PCI: 00:08.0
1459 12:45:41.293439 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 12:45:41.293528 PCI: 00:0a.0
1461 12:45:41.296699 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 12:45:41.310060 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 12:45:41.313252 USB0 port 0 child on link 0 USB3 port 0
1464 12:45:41.313338 USB3 port 0
1465 12:45:41.316526 USB3 port 1
1466 12:45:41.316610 USB3 port 2
1467 12:45:41.319734 USB3 port 3
1468 12:45:41.322988 PCI: 00:14.0 child on link 0 USB0 port 0
1469 12:45:41.333384 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 12:45:41.340071 USB0 port 0 child on link 0 USB2 port 0
1471 12:45:41.340157 USB2 port 0
1472 12:45:41.342836 USB2 port 1
1473 12:45:41.342921 USB2 port 2
1474 12:45:41.346455 USB2 port 3
1475 12:45:41.349528 USB2 port 4
1476 12:45:41.349613 USB2 port 5
1477 12:45:41.353270 USB2 port 6
1478 12:45:41.353372 USB2 port 7
1479 12:45:41.356452 USB2 port 8
1480 12:45:41.356536 USB2 port 9
1481 12:45:41.359752 USB3 port 0
1482 12:45:41.359837 USB3 port 1
1483 12:45:41.362836 USB3 port 2
1484 12:45:41.362921 USB3 port 3
1485 12:45:41.366546 PCI: 00:14.2
1486 12:45:41.376378 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 12:45:41.386037 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 12:45:41.389378 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 12:45:41.402817 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 12:45:41.402919 GENERIC: 0.0
1491 12:45:41.405877 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 12:45:41.416022 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 12:45:41.419158 I2C: 00:1a
1494 12:45:41.419244 I2C: 00:31
1495 12:45:41.422542 I2C: 00:32
1496 12:45:41.425879 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 12:45:41.435576 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 12:45:41.438997 I2C: 00:10
1499 12:45:41.439082 PCI: 00:15.2
1500 12:45:41.448841 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 12:45:41.452543 PCI: 00:15.3
1502 12:45:41.462301 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 12:45:41.465416 PCI: 00:16.0
1504 12:45:41.475233 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 12:45:41.475321 PCI: 00:19.0
1506 12:45:41.481885 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 12:45:41.492114 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 12:45:41.492206 I2C: 00:15
1509 12:45:41.495239 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 12:45:41.505395 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 12:45:41.518769 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 12:45:41.528450 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 12:45:41.528539 GENERIC: 0.0
1514 12:45:41.531750 PCI: 01:00.0
1515 12:45:41.541773 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 12:45:41.551487 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 12:45:41.561513 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 12:45:41.564765 PCI: 00:1e.0
1519 12:45:41.574760 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 12:45:41.581574 PCI: 00:1e.2 child on link 0 SPI: 00
1521 12:45:41.591113 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 12:45:41.591204 SPI: 00
1523 12:45:41.594308 PCI: 00:1e.3 child on link 0 SPI: 00
1524 12:45:41.604457 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 12:45:41.607759 SPI: 00
1526 12:45:41.610853 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 12:45:41.620767 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 12:45:41.620856 PNP: 0c09.0
1529 12:45:41.630700 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 12:45:41.634570 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 12:45:41.643957 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 12:45:41.653920 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 12:45:41.657086 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 12:45:41.660895 GENERIC: 0.0
1535 12:45:41.661002 GENERIC: 1.0
1536 12:45:41.664068 PCI: 00:1f.3
1537 12:45:41.674109 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 12:45:41.683949 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 12:45:41.687226 PCI: 00:1f.5
1540 12:45:41.696849 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 12:45:41.700505 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 12:45:41.703818 APIC: 00
1543 12:45:41.703906 APIC: 01
1544 12:45:41.703974 APIC: 07
1545 12:45:41.707036 APIC: 02
1546 12:45:41.707121 APIC: 05
1547 12:45:41.707189 APIC: 06
1548 12:45:41.710081 APIC: 03
1549 12:45:41.710193 APIC: 04
1550 12:45:41.713358 Done allocating resources.
1551 12:45:41.720189 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 12:45:41.726580 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 12:45:41.729892 Configure GPIOs for I2S audio on UP4.
1554 12:45:41.736387 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 12:45:41.739734 Enabling resources...
1556 12:45:41.743454 PCI: 00:00.0 subsystem <- 8086/9a12
1557 12:45:41.746249 PCI: 00:00.0 cmd <- 06
1558 12:45:41.749868 PCI: 00:02.0 subsystem <- 8086/9a40
1559 12:45:41.753131 PCI: 00:02.0 cmd <- 03
1560 12:45:41.756294 PCI: 00:04.0 subsystem <- 8086/9a03
1561 12:45:41.756385 PCI: 00:04.0 cmd <- 02
1562 12:45:41.763098 PCI: 00:05.0 subsystem <- 8086/9a19
1563 12:45:41.763185 PCI: 00:05.0 cmd <- 02
1564 12:45:41.766278 PCI: 00:08.0 subsystem <- 8086/9a11
1565 12:45:41.769778 PCI: 00:08.0 cmd <- 06
1566 12:45:41.772766 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 12:45:41.776401 PCI: 00:0d.0 cmd <- 02
1568 12:45:41.779510 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 12:45:41.783003 PCI: 00:14.0 cmd <- 02
1570 12:45:41.786300 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 12:45:41.789689 PCI: 00:14.2 cmd <- 02
1572 12:45:41.792875 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 12:45:41.796059 PCI: 00:14.3 cmd <- 02
1574 12:45:41.799295 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 12:45:41.802402 PCI: 00:15.0 cmd <- 02
1576 12:45:41.806131 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 12:45:41.806213 PCI: 00:15.1 cmd <- 02
1578 12:45:41.812709 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 12:45:41.812800 PCI: 00:15.2 cmd <- 02
1580 12:45:41.815972 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 12:45:41.819196 PCI: 00:15.3 cmd <- 02
1582 12:45:41.822498 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 12:45:41.825690 PCI: 00:16.0 cmd <- 02
1584 12:45:41.828822 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 12:45:41.832127 PCI: 00:19.1 cmd <- 02
1586 12:45:41.835969 PCI: 00:1d.0 bridge ctrl <- 0013
1587 12:45:41.839270 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 12:45:41.842603 PCI: 00:1d.0 cmd <- 06
1589 12:45:41.845524 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 12:45:41.849203 PCI: 00:1e.0 cmd <- 06
1591 12:45:41.852345 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 12:45:41.855467 PCI: 00:1e.2 cmd <- 06
1593 12:45:41.858578 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 12:45:41.858665 PCI: 00:1e.3 cmd <- 02
1595 12:45:41.865467 PCI: 00:1f.0 subsystem <- 8086/a087
1596 12:45:41.865562 PCI: 00:1f.0 cmd <- 407
1597 12:45:41.869270 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 12:45:41.872504 PCI: 00:1f.3 cmd <- 02
1599 12:45:41.875688 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 12:45:41.878987 PCI: 00:1f.5 cmd <- 406
1601 12:45:41.883658 PCI: 01:00.0 cmd <- 02
1602 12:45:41.887934 done.
1603 12:45:41.891237 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 12:45:41.894485 Initializing devices...
1605 12:45:41.897847 Root Device init
1606 12:45:41.901194 Chrome EC: Set SMI mask to 0x0000000000000000
1607 12:45:41.908099 Chrome EC: clear events_b mask to 0x0000000000000000
1608 12:45:41.914618 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 12:45:41.917896 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 12:45:41.924656 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 12:45:41.931125 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 12:45:41.934394 fw_config match found: DB_USB=USB3_ACTIVE
1613 12:45:41.940860 Configure Right Type-C port orientation for retimer
1614 12:45:41.944521 Root Device init finished in 42 msecs
1615 12:45:41.947842 PCI: 00:00.0 init
1616 12:45:41.951027 CPU TDP = 9 Watts
1617 12:45:41.951105 CPU PL1 = 9 Watts
1618 12:45:41.954484 CPU PL2 = 40 Watts
1619 12:45:41.954572 CPU PL4 = 83 Watts
1620 12:45:41.957741 PCI: 00:00.0 init finished in 8 msecs
1621 12:45:41.960832 PCI: 00:02.0 init
1622 12:45:41.964491 GMA: Found VBT in CBFS
1623 12:45:41.967588 GMA: Found valid VBT in CBFS
1624 12:45:41.971009 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 12:45:41.980844 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 12:45:41.984277 PCI: 00:02.0 init finished in 18 msecs
1627 12:45:41.987282 PCI: 00:05.0 init
1628 12:45:41.990653 PCI: 00:05.0 init finished in 0 msecs
1629 12:45:41.993928 PCI: 00:08.0 init
1630 12:45:41.997075 PCI: 00:08.0 init finished in 0 msecs
1631 12:45:42.000744 PCI: 00:14.0 init
1632 12:45:42.004040 PCI: 00:14.0 init finished in 0 msecs
1633 12:45:42.004118 PCI: 00:14.2 init
1634 12:45:42.007278 PCI: 00:14.2 init finished in 0 msecs
1635 12:45:42.011094 PCI: 00:15.0 init
1636 12:45:42.014704 I2C bus 0 version 0x3230302a
1637 12:45:42.017856 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 12:45:42.021187 PCI: 00:15.0 init finished in 6 msecs
1639 12:45:42.024344 PCI: 00:15.1 init
1640 12:45:42.028042 I2C bus 1 version 0x3230302a
1641 12:45:42.031194 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 12:45:42.034394 PCI: 00:15.1 init finished in 6 msecs
1643 12:45:42.037707 PCI: 00:15.2 init
1644 12:45:42.040858 I2C bus 2 version 0x3230302a
1645 12:45:42.044219 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 12:45:42.047433 PCI: 00:15.2 init finished in 6 msecs
1647 12:45:42.050479 PCI: 00:15.3 init
1648 12:45:42.050557 I2C bus 3 version 0x3230302a
1649 12:45:42.057356 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 12:45:42.060504 PCI: 00:15.3 init finished in 6 msecs
1651 12:45:42.060587 PCI: 00:16.0 init
1652 12:45:42.067082 PCI: 00:16.0 init finished in 0 msecs
1653 12:45:42.067160 PCI: 00:19.1 init
1654 12:45:42.070385 I2C bus 5 version 0x3230302a
1655 12:45:42.073485 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 12:45:42.076787 PCI: 00:19.1 init finished in 6 msecs
1657 12:45:42.080534 PCI: 00:1d.0 init
1658 12:45:42.083711 Initializing PCH PCIe bridge.
1659 12:45:42.087400 PCI: 00:1d.0 init finished in 3 msecs
1660 12:45:42.090502 PCI: 00:1f.0 init
1661 12:45:42.093835 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 12:45:42.100596 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 12:45:42.100686 IOAPIC: ID = 0x02
1664 12:45:42.103876 IOAPIC: Dumping registers
1665 12:45:42.107090 reg 0x0000: 0x02000000
1666 12:45:42.110457 reg 0x0001: 0x00770020
1667 12:45:42.110537 reg 0x0002: 0x00000000
1668 12:45:42.116803 PCI: 00:1f.0 init finished in 21 msecs
1669 12:45:42.116882 PCI: 00:1f.2 init
1670 12:45:42.120121 Disabling ACPI via APMC.
1671 12:45:42.124009 APMC done.
1672 12:45:42.127005 PCI: 00:1f.2 init finished in 5 msecs
1673 12:45:42.139021 PCI: 01:00.0 init
1674 12:45:42.142262 PCI: 01:00.0 init finished in 0 msecs
1675 12:45:42.145329 PNP: 0c09.0 init
1676 12:45:42.148663 Google Chrome EC uptime: 8.394 seconds
1677 12:45:42.155417 Google Chrome AP resets since EC boot: 1
1678 12:45:42.158661 Google Chrome most recent AP reset causes:
1679 12:45:42.161710 0.347: 32775 shutdown: entering G3
1680 12:45:42.168808 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 12:45:42.171971 PNP: 0c09.0 init finished in 22 msecs
1682 12:45:42.177416 Devices initialized
1683 12:45:42.181044 Show all devs... After init.
1684 12:45:42.184160 Root Device: enabled 1
1685 12:45:42.184239 DOMAIN: 0000: enabled 1
1686 12:45:42.187393 CPU_CLUSTER: 0: enabled 1
1687 12:45:42.190651 PCI: 00:00.0: enabled 1
1688 12:45:42.194271 PCI: 00:02.0: enabled 1
1689 12:45:42.194360 PCI: 00:04.0: enabled 1
1690 12:45:42.197604 PCI: 00:05.0: enabled 1
1691 12:45:42.200860 PCI: 00:06.0: enabled 0
1692 12:45:42.203959 PCI: 00:07.0: enabled 0
1693 12:45:42.204035 PCI: 00:07.1: enabled 0
1694 12:45:42.207171 PCI: 00:07.2: enabled 0
1695 12:45:42.210584 PCI: 00:07.3: enabled 0
1696 12:45:42.214138 PCI: 00:08.0: enabled 1
1697 12:45:42.214224 PCI: 00:09.0: enabled 0
1698 12:45:42.217307 PCI: 00:0a.0: enabled 0
1699 12:45:42.220584 PCI: 00:0d.0: enabled 1
1700 12:45:42.224359 PCI: 00:0d.1: enabled 0
1701 12:45:42.224441 PCI: 00:0d.2: enabled 0
1702 12:45:42.227669 PCI: 00:0d.3: enabled 0
1703 12:45:42.230921 PCI: 00:0e.0: enabled 0
1704 12:45:42.231013 PCI: 00:10.2: enabled 1
1705 12:45:42.234160 PCI: 00:10.6: enabled 0
1706 12:45:42.237298 PCI: 00:10.7: enabled 0
1707 12:45:42.240535 PCI: 00:12.0: enabled 0
1708 12:45:42.240610 PCI: 00:12.6: enabled 0
1709 12:45:42.243956 PCI: 00:13.0: enabled 0
1710 12:45:42.247172 PCI: 00:14.0: enabled 1
1711 12:45:42.250367 PCI: 00:14.1: enabled 0
1712 12:45:42.250489 PCI: 00:14.2: enabled 1
1713 12:45:42.253492 PCI: 00:14.3: enabled 1
1714 12:45:42.256867 PCI: 00:15.0: enabled 1
1715 12:45:42.260466 PCI: 00:15.1: enabled 1
1716 12:45:42.260545 PCI: 00:15.2: enabled 1
1717 12:45:42.263701 PCI: 00:15.3: enabled 1
1718 12:45:42.266850 PCI: 00:16.0: enabled 1
1719 12:45:42.270657 PCI: 00:16.1: enabled 0
1720 12:45:42.270737 PCI: 00:16.2: enabled 0
1721 12:45:42.273875 PCI: 00:16.3: enabled 0
1722 12:45:42.277072 PCI: 00:16.4: enabled 0
1723 12:45:42.280275 PCI: 00:16.5: enabled 0
1724 12:45:42.280357 PCI: 00:17.0: enabled 0
1725 12:45:42.283421 PCI: 00:19.0: enabled 0
1726 12:45:42.286616 PCI: 00:19.1: enabled 1
1727 12:45:42.286697 PCI: 00:19.2: enabled 0
1728 12:45:42.290175 PCI: 00:1c.0: enabled 1
1729 12:45:42.293341 PCI: 00:1c.1: enabled 0
1730 12:45:42.296663 PCI: 00:1c.2: enabled 0
1731 12:45:42.296746 PCI: 00:1c.3: enabled 0
1732 12:45:42.299946 PCI: 00:1c.4: enabled 0
1733 12:45:42.303717 PCI: 00:1c.5: enabled 0
1734 12:45:42.306955 PCI: 00:1c.6: enabled 1
1735 12:45:42.307030 PCI: 00:1c.7: enabled 0
1736 12:45:42.310080 PCI: 00:1d.0: enabled 1
1737 12:45:42.313311 PCI: 00:1d.1: enabled 0
1738 12:45:42.316453 PCI: 00:1d.2: enabled 1
1739 12:45:42.316531 PCI: 00:1d.3: enabled 0
1740 12:45:42.320318 PCI: 00:1e.0: enabled 1
1741 12:45:42.323400 PCI: 00:1e.1: enabled 0
1742 12:45:42.323488 PCI: 00:1e.2: enabled 1
1743 12:45:42.326732 PCI: 00:1e.3: enabled 1
1744 12:45:42.329981 PCI: 00:1f.0: enabled 1
1745 12:45:42.333450 PCI: 00:1f.1: enabled 0
1746 12:45:42.333529 PCI: 00:1f.2: enabled 1
1747 12:45:42.336701 PCI: 00:1f.3: enabled 1
1748 12:45:42.339890 PCI: 00:1f.4: enabled 0
1749 12:45:42.343116 PCI: 00:1f.5: enabled 1
1750 12:45:42.343195 PCI: 00:1f.6: enabled 0
1751 12:45:42.346499 PCI: 00:1f.7: enabled 0
1752 12:45:42.349864 APIC: 00: enabled 1
1753 12:45:42.353026 GENERIC: 0.0: enabled 1
1754 12:45:42.353107 GENERIC: 0.0: enabled 1
1755 12:45:42.356196 GENERIC: 1.0: enabled 1
1756 12:45:42.359898 GENERIC: 0.0: enabled 1
1757 12:45:42.359973 GENERIC: 1.0: enabled 1
1758 12:45:42.363083 USB0 port 0: enabled 1
1759 12:45:42.366216 GENERIC: 0.0: enabled 1
1760 12:45:42.369473 USB0 port 0: enabled 1
1761 12:45:42.369559 GENERIC: 0.0: enabled 1
1762 12:45:42.372749 I2C: 00:1a: enabled 1
1763 12:45:42.376509 I2C: 00:31: enabled 1
1764 12:45:42.376584 I2C: 00:32: enabled 1
1765 12:45:42.379750 I2C: 00:10: enabled 1
1766 12:45:42.383074 I2C: 00:15: enabled 1
1767 12:45:42.383149 GENERIC: 0.0: enabled 0
1768 12:45:42.386124 GENERIC: 1.0: enabled 0
1769 12:45:42.389404 GENERIC: 0.0: enabled 1
1770 12:45:42.392605 SPI: 00: enabled 1
1771 12:45:42.392682 SPI: 00: enabled 1
1772 12:45:42.396304 PNP: 0c09.0: enabled 1
1773 12:45:42.399345 GENERIC: 0.0: enabled 1
1774 12:45:42.399448 USB3 port 0: enabled 1
1775 12:45:42.402639 USB3 port 1: enabled 1
1776 12:45:42.405973 USB3 port 2: enabled 0
1777 12:45:42.406076 USB3 port 3: enabled 0
1778 12:45:42.409234 USB2 port 0: enabled 0
1779 12:45:42.412406 USB2 port 1: enabled 1
1780 12:45:42.416050 USB2 port 2: enabled 1
1781 12:45:42.416126 USB2 port 3: enabled 0
1782 12:45:42.419251 USB2 port 4: enabled 1
1783 12:45:42.422494 USB2 port 5: enabled 0
1784 12:45:42.422583 USB2 port 6: enabled 0
1785 12:45:42.425879 USB2 port 7: enabled 0
1786 12:45:42.429103 USB2 port 8: enabled 0
1787 12:45:42.432356 USB2 port 9: enabled 0
1788 12:45:42.432431 USB3 port 0: enabled 0
1789 12:45:42.435417 USB3 port 1: enabled 1
1790 12:45:42.438710 USB3 port 2: enabled 0
1791 12:45:42.438794 USB3 port 3: enabled 0
1792 12:45:42.442386 GENERIC: 0.0: enabled 1
1793 12:45:42.445541 GENERIC: 1.0: enabled 1
1794 12:45:42.445616 APIC: 01: enabled 1
1795 12:45:42.448801 APIC: 07: enabled 1
1796 12:45:42.452111 APIC: 02: enabled 1
1797 12:45:42.452195 APIC: 05: enabled 1
1798 12:45:42.455240 APIC: 06: enabled 1
1799 12:45:42.458938 APIC: 03: enabled 1
1800 12:45:42.459014 APIC: 04: enabled 1
1801 12:45:42.462101 PCI: 01:00.0: enabled 1
1802 12:45:42.468506 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1803 12:45:42.471890 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 12:45:42.475231 ELOG: NV offset 0xf30000 size 0x1000
1805 12:45:42.482703 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 12:45:42.489486 ELOG: Event(17) added with size 13 at 2022-07-14 12:39:52 UTC
1807 12:45:42.495896 ELOG: Event(92) added with size 9 at 2022-07-14 12:39:52 UTC
1808 12:45:42.502873 ELOG: Event(93) added with size 9 at 2022-07-14 12:39:52 UTC
1809 12:45:42.509230 ELOG: Event(9E) added with size 10 at 2022-07-14 12:39:52 UTC
1810 12:45:42.515584 ELOG: Event(9F) added with size 14 at 2022-07-14 12:39:52 UTC
1811 12:45:42.522538 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 12:45:42.529094 ELOG: Event(A1) added with size 10 at 2022-07-14 12:39:52 UTC
1813 12:45:42.532178 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 12:45:42.538703 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 12:45:42.542154 Finalize devices...
1816 12:45:42.542241 Devices finalized
1817 12:45:42.548597 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 12:45:42.555025 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 12:45:42.558699 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 12:45:42.565041 ME: HFSTS1 : 0x80030055
1821 12:45:42.568824 ME: HFSTS2 : 0x30280116
1822 12:45:42.571887 ME: HFSTS3 : 0x00000050
1823 12:45:42.578331 ME: HFSTS4 : 0x00004000
1824 12:45:42.582108 ME: HFSTS5 : 0x00000000
1825 12:45:42.588491 ME: HFSTS6 : 0x00400006
1826 12:45:42.591751 ME: Manufacturing Mode : YES
1827 12:45:42.594821 ME: SPI Protection Mode Enabled : NO
1828 12:45:42.598443 ME: FW Partition Table : OK
1829 12:45:42.601877 ME: Bringup Loader Failure : NO
1830 12:45:42.605031 ME: Firmware Init Complete : NO
1831 12:45:42.608249 ME: Boot Options Present : NO
1832 12:45:42.611486 ME: Update In Progress : NO
1833 12:45:42.618125 ME: D0i3 Support : YES
1834 12:45:42.621381 ME: Low Power State Enabled : NO
1835 12:45:42.624978 ME: CPU Replaced : YES
1836 12:45:42.628190 ME: CPU Replacement Valid : YES
1837 12:45:42.631677 ME: Current Working State : 5
1838 12:45:42.634663 ME: Current Operation State : 1
1839 12:45:42.637907 ME: Current Operation Mode : 3
1840 12:45:42.641679 ME: Error Code : 0
1841 12:45:42.644873 ME: Enhanced Debug Mode : NO
1842 12:45:42.651325 ME: CPU Debug Disabled : YES
1843 12:45:42.654993 ME: TXT Support : NO
1844 12:45:42.661301 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 12:45:42.668092 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 12:45:42.671442 CBFS: 'fallback/slic' not found.
1847 12:45:42.674480 ACPI: Writing ACPI tables at 76b01000.
1848 12:45:42.677642 ACPI: * FACS
1849 12:45:42.677720 ACPI: * DSDT
1850 12:45:42.681395 Ramoops buffer: 0x100000@0x76a00000.
1851 12:45:42.687926 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 12:45:42.691015 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 12:45:42.694853 Google Chrome EC: version:
1854 12:45:42.698611 ro: voema_v2.0.7540-147f8d37d1
1855 12:45:42.701851 rw: voema_v2.0.7540-147f8d37d1
1856 12:45:42.705016 running image: 2
1857 12:45:42.711446 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1858 12:45:42.714672 ACPI: * FADT
1859 12:45:42.714753 SCI is IRQ9
1860 12:45:42.718472 ACPI: added table 1/32, length now 40
1861 12:45:42.721614 ACPI: * SSDT
1862 12:45:42.724839 Found 1 CPU(s) with 8 core(s) each.
1863 12:45:42.731424 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 12:45:42.734707 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 12:45:42.737852 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 12:45:42.741036 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 12:45:42.747625 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 12:45:42.754737 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 12:45:42.757911 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 12:45:42.764247 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 12:45:42.771348 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 12:45:42.774643 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 12:45:42.780798 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 12:45:42.784610 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 12:45:42.791136 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 12:45:42.794272 PS2K: Passing 80 keymaps to kernel
1877 12:45:42.800708 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 12:45:42.807306 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 12:45:42.814292 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 12:45:42.820735 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 12:45:42.827165 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 12:45:42.834064 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 12:45:42.840499 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 12:45:42.848070 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 12:45:42.850619 ACPI: added table 2/32, length now 44
1886 12:45:42.850699 ACPI: * MCFG
1887 12:45:42.853885 ACPI: added table 3/32, length now 48
1888 12:45:42.857110 ACPI: * TPM2
1889 12:45:42.860205 TPM2 log created at 0x769f0000
1890 12:45:42.863486 ACPI: added table 4/32, length now 52
1891 12:45:42.866675 ACPI: * MADT
1892 12:45:42.866759 SCI is IRQ9
1893 12:45:42.869973 ACPI: added table 5/32, length now 56
1894 12:45:42.873595 current = 76b09850
1895 12:45:42.873683 ACPI: * DMAR
1896 12:45:42.876810 ACPI: added table 6/32, length now 60
1897 12:45:42.880066 ACPI: added table 7/32, length now 64
1898 12:45:42.883253 ACPI: * HPET
1899 12:45:42.887025 ACPI: added table 8/32, length now 68
1900 12:45:42.887111 ACPI: done.
1901 12:45:42.890253 ACPI tables: 35216 bytes.
1902 12:45:42.893377 smbios_write_tables: 769ef000
1903 12:45:42.896463 EC returned error result code 3
1904 12:45:42.899703 Couldn't obtain OEM name from CBI
1905 12:45:42.903509 Create SMBIOS type 16
1906 12:45:42.906574 Create SMBIOS type 17
1907 12:45:42.909869 GENERIC: 0.0 (WIFI Device)
1908 12:45:42.909954 SMBIOS tables: 1750 bytes.
1909 12:45:42.916304 Writing table forward entry at 0x00000500
1910 12:45:42.922795 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 12:45:42.926598 Writing coreboot table at 0x76b25000
1912 12:45:42.932831 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 12:45:42.936295 1. 0000000000001000-000000000009ffff: RAM
1914 12:45:42.939339 2. 00000000000a0000-00000000000fffff: RESERVED
1915 12:45:42.946221 3. 0000000000100000-00000000769eefff: RAM
1916 12:45:42.949122 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 12:45:42.956338 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 12:45:42.962622 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 12:45:42.965824 7. 0000000077000000-000000007fbfffff: RESERVED
1920 12:45:42.972780 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 12:45:42.975653 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 12:45:42.979542 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 12:45:42.985845 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 12:45:42.988991 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 12:45:42.995759 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 12:45:42.998829 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 12:45:43.005644 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 12:45:43.009054 16. 0000000100000000-00000002803fffff: RAM
1929 12:45:43.012066 Passing 4 GPIOs to payload:
1930 12:45:43.015856 NAME | PORT | POLARITY | VALUE
1931 12:45:43.022119 lid | undefined | high | high
1932 12:45:43.028592 power | undefined | high | low
1933 12:45:43.032224 oprom | undefined | high | low
1934 12:45:43.038803 EC in RW | 0x000000e5 | high | high
1935 12:45:43.045279 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d440
1936 12:45:43.048752 coreboot table: 1576 bytes.
1937 12:45:43.052029 IMD ROOT 0. 0x76fff000 0x00001000
1938 12:45:43.055209 IMD SMALL 1. 0x76ffe000 0x00001000
1939 12:45:43.058556 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 12:45:43.061901 VPD 3. 0x76c4d000 0x00000367
1941 12:45:43.065252 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 12:45:43.068371 CONSOLE 5. 0x76c2c000 0x00020000
1943 12:45:43.075101 FMAP 6. 0x76c2b000 0x00000578
1944 12:45:43.078216 TIME STAMP 7. 0x76c2a000 0x00000910
1945 12:45:43.081514 VBOOT WORK 8. 0x76c16000 0x00014000
1946 12:45:43.085101 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 12:45:43.088247 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 12:45:43.091377 RAMSTAGE 11. 0x76b97000 0x00073000
1949 12:45:43.094635 REFCODE 12. 0x76b42000 0x00055000
1950 12:45:43.098017 SMM BACKUP 13. 0x76b32000 0x00010000
1951 12:45:43.104455 4f444749 14. 0x76b30000 0x00002000
1952 12:45:43.108036 EXT VBT15. 0x76b2d000 0x0000219f
1953 12:45:43.111208 COREBOOT 16. 0x76b25000 0x00008000
1954 12:45:43.114463 ACPI 17. 0x76b01000 0x00024000
1955 12:45:43.117925 ACPI GNVS 18. 0x76b00000 0x00001000
1956 12:45:43.120980 RAMOOPS 19. 0x76a00000 0x00100000
1957 12:45:43.124214 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 12:45:43.127502 SMBIOS 21. 0x769ef000 0x00000800
1959 12:45:43.131190 IMD small region:
1960 12:45:43.134386 IMD ROOT 0. 0x76ffec00 0x00000400
1961 12:45:43.137672 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 12:45:43.140799 POWER STATE 2. 0x76ffeb80 0x00000044
1963 12:45:43.147803 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 12:45:43.151047 MEM INFO 4. 0x76ffe980 0x000001e0
1965 12:45:43.157699 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 12:45:43.161140 MTRR: Physical address space:
1967 12:45:43.163793 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 12:45:43.170648 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 12:45:43.177197 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 12:45:43.183973 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 12:45:43.190438 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 12:45:43.196978 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 12:45:43.203875 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 12:45:43.206890 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 12:45:43.210547 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 12:45:43.217283 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 12:45:43.220587 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 12:45:43.223844 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 12:45:43.226998 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 12:45:43.233439 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 12:45:43.236635 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 12:45:43.239987 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 12:45:43.243208 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 12:45:43.246400 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 12:45:43.251188 call enable_fixed_mtrr()
1986 12:45:43.254370 CPU physical address size: 39 bits
1987 12:45:43.260841 MTRR: default type WB/UC MTRR counts: 6/6.
1988 12:45:43.264485 MTRR: UC selected as default type.
1989 12:45:43.270989 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1990 12:45:43.274079 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1991 12:45:43.281014 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1992 12:45:43.287445 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1993 12:45:43.294277 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1994 12:45:43.300805 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1995 12:45:43.300891
1996 12:45:43.304045 MTRR check
1997 12:45:43.307102 Fixed MTRRs : Enabled
1998 12:45:43.307188 Variable MTRRs: Enabled
1999 12:45:43.307256
2000 12:45:43.314194 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 12:45:43.317333 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 12:45:43.320579 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 12:45:43.323711 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 12:45:43.330753 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 12:45:43.334169 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 12:45:43.337319 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 12:45:43.340551 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 12:45:43.343868 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 12:45:43.350321 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 12:45:43.353584 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 12:45:43.360202 BS: BS_WRITE_TABLES exit times (exec / console): 3 / 150 ms
2012 12:45:43.364029 call enable_fixed_mtrr()
2013 12:45:43.367216 Checking cr50 for pending updates
2014 12:45:43.371078 CPU physical address size: 39 bits
2015 12:45:43.374343 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 12:45:43.377610 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 12:45:43.381273 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 12:45:43.387828 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 12:45:43.391149 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 12:45:43.394393 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 12:45:43.397861 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 12:45:43.404739 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 12:45:43.407847 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 12:45:43.411179 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 12:45:43.414439 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 12:45:43.421016 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 12:45:43.424258 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:45:43.427403 call enable_fixed_mtrr()
2029 12:45:43.430538 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 12:45:43.433860 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 12:45:43.440637 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 12:45:43.443913 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 12:45:43.447111 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 12:45:43.450894 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 12:45:43.457155 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 12:45:43.460418 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 12:45:43.464192 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 12:45:43.467242 CPU physical address size: 39 bits
2039 12:45:43.471176 call enable_fixed_mtrr()
2040 12:45:43.474680 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 12:45:43.481194 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 12:45:43.484933 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 12:45:43.488218 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 12:45:43.491477 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 12:45:43.498161 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 12:45:43.501295 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 12:45:43.504482 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 12:45:43.507924 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 12:45:43.514460 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 12:45:43.517697 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 12:45:43.520858 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 12:45:43.527941 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 12:45:43.530795 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 12:45:43.534423 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 12:45:43.537519 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 12:45:43.544104 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 12:45:43.547890 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 12:45:43.551036 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 12:45:43.554410 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 12:45:43.557593 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 12:45:43.564257 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 12:45:43.567545 call enable_fixed_mtrr()
2063 12:45:43.570873 call enable_fixed_mtrr()
2064 12:45:43.574274 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 12:45:43.577446 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 12:45:43.580509 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 12:45:43.584348 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 12:45:43.590760 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 12:45:43.594003 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 12:45:43.597185 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 12:45:43.600832 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 12:45:43.607289 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 12:45:43.610586 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 12:45:43.614136 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 12:45:43.616900 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 12:45:43.624867 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 12:45:43.624958 call enable_fixed_mtrr()
2078 12:45:43.631392 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 12:45:43.634652 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 12:45:43.637795 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 12:45:43.641705 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 12:45:43.648032 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 12:45:43.651243 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 12:45:43.654429 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 12:45:43.658143 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 12:45:43.664708 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 12:45:43.668097 CPU physical address size: 39 bits
2088 12:45:43.671363 call enable_fixed_mtrr()
2089 12:45:43.674487 CPU physical address size: 39 bits
2090 12:45:43.677650 CPU physical address size: 39 bits
2091 12:45:43.684632 CPU physical address size: 39 bits
2092 12:45:43.684741 Reading cr50 TPM mode
2093 12:45:43.688339 CPU physical address size: 39 bits
2094 12:45:43.695207 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2095 12:45:43.705184 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2096 12:45:43.708745 Checking segment from ROM address 0xffc02b38
2097 12:45:43.711874 Checking segment from ROM address 0xffc02b54
2098 12:45:43.718234 Loading segment from ROM address 0xffc02b38
2099 12:45:43.718319 code (compression=0)
2100 12:45:43.727831 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2101 12:45:43.738215 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2102 12:45:43.738300 it's not compressed!
2103 12:45:43.878005 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2104 12:45:43.884430 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2105 12:45:43.891198 Loading segment from ROM address 0xffc02b54
2106 12:45:43.894562 Entry Point 0x30000000
2107 12:45:43.894649 Loaded segments
2108 12:45:43.900958 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2109 12:45:43.944185 Finalizing chipset.
2110 12:45:43.947524 Finalizing SMM.
2111 12:45:43.947609 APMC done.
2112 12:45:43.953971 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2113 12:45:43.957229 mp_park_aps done after 0 msecs.
2114 12:45:43.960375 Jumping to boot code at 0x30000000(0x76b25000)
2115 12:45:43.970130 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2116 12:45:43.970216
2117 12:45:43.973792 Starting depthcharge on Voema...
2118 12:45:43.974140 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2119 12:45:43.974248 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2120 12:45:43.974333 Setting prompt string to ['volteer:']
2121 12:45:43.974415 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2122 12:45:43.983814 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2123 12:45:43.990284 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2124 12:45:43.996908 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 12:45:44.000254 Failed to find eMMC card reader
2126 12:45:44.000350 Wipe memory regions:
2127 12:45:44.006789 [0x00000000001000, 0x000000000a0000)
2128 12:45:44.009988 [0x00000000100000, 0x00000030000000)
2129 12:45:44.039328 [0x00000032662db0, 0x000000769ef000)
2130 12:45:44.078310 [0x00000100000000, 0x00000280400000)
2131 12:45:44.282391 ec_init: CrosEC protocol v3 supported (256, 256)
2132 12:45:44.289082 update_port_state: port C0 state: usb enable 1 mux conn 0
2133 12:45:44.298951 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2134 12:45:44.305757 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2135 12:45:44.309178 send_conn_disc_msg: pmc_send_cmd succeeded
2136 12:45:44.740150 R8152: Initializing
2137 12:45:44.743293 Version 6 (ocp_data = 5c30)
2138 12:45:44.746595 R8152: Done initializing
2139 12:45:44.749945 Adding net device
2140 12:45:45.054415 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2141 12:45:45.054559
2142 12:45:45.057814 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2144 12:45:45.158484 volteer: tftpboot 192.168.201.1 6819503/tftp-deploy-cg7m4xdo/kernel/bzImage 6819503/tftp-deploy-cg7m4xdo/kernel/cmdline 6819503/tftp-deploy-cg7m4xdo/ramdisk/ramdisk.cpio.gz
2145 12:45:45.158652 Setting prompt string to ['Starting kernel']
2146 12:45:45.158731 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2147 12:45:45.158815 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:43)
2148 12:45:45.162582 tftpboot 192.168.201.1 6819503/tftp-deploy-cg7m4xdo/kernel/bzImoy-cg7m4xdo/kernel/cmdline 6819503/tftp-deploy-cg7m4xdo/ramdisk/ramdisk.cpio.gz
2149 12:45:45.162670 Waiting for link
2150 12:45:45.365896 done.
2151 12:45:45.366032 MAC: 00:24:32:30:7b:ec
2152 12:45:45.369467 Sending DHCP discover... done.
2153 12:45:45.372116 Waiting for reply... done.
2154 12:45:45.375874 Sending DHCP request... done.
2155 12:45:45.379121 Waiting for reply... done.
2156 12:45:45.382625 My ip is 192.168.201.13
2157 12:45:45.385634 The DHCP server ip is 192.168.201.1
2158 12:45:45.392271 TFTP server IP predefined by user: 192.168.201.1
2159 12:45:45.398848 Bootfile predefined by user: 6819503/tftp-deploy-cg7m4xdo/kernel/bzImage
2160 12:45:45.402037 Sending tftp read request... done.
2161 12:45:45.405061 Waiting for the transfer...
2162 12:45:45.924839 00000000 ################################################################
2163 12:45:46.442358 00080000 ################################################################
2164 12:45:46.962038 00100000 ################################################################
2165 12:45:47.496372 00180000 ################################################################
2166 12:45:48.032276 00200000 ################################################################
2167 12:45:48.573870 00280000 ################################################################
2168 12:45:49.117105 00300000 ################################################################
2169 12:45:49.660453 00380000 ################################################################
2170 12:45:50.212751 00400000 ################################################################
2171 12:45:50.758129 00480000 ################################################################
2172 12:45:51.308947 00500000 ################################################################
2173 12:45:51.865171 00580000 ################################################################
2174 12:45:52.396135 00600000 ################################################################ done.
2175 12:45:52.399063 The bootfile was 6811536 bytes long.
2176 12:45:52.402663 Sending tftp read request... done.
2177 12:45:52.405966 Waiting for the transfer...
2178 12:45:52.932406 00000000 ################################################################
2179 12:45:53.479969 00080000 ################################################################
2180 12:45:54.056651 00100000 ################################################################
2181 12:45:54.626127 00180000 ################################################################
2182 12:45:55.173499 00200000 ################################################################
2183 12:45:55.843351 00280000 ################################################################
2184 12:45:56.573286 00300000 ################################################################
2185 12:45:57.317403 00380000 ################################################################
2186 12:45:58.010558 00400000 ################################################################
2187 12:45:58.707679 00480000 ################################################################
2188 12:45:59.022110 00500000 ############################# done.
2189 12:45:59.025277 Sending tftp read request... done.
2190 12:45:59.028483 Waiting for the transfer...
2191 12:45:59.029003 00000000 # done.
2192 12:45:59.038549 Command line loaded dynamically from TFTP file: 6819503/tftp-deploy-cg7m4xdo/kernel/cmdline
2193 12:45:59.061164 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819503/extract-nfsrootfs-t0va3ibe,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 12:45:59.068282 Shutting down all USB controllers.
2195 12:45:59.068885 Removing current net device
2196 12:45:59.071486 Finalizing coreboot
2197 12:45:59.078260 Exiting depthcharge with code 4 at timestamp: 23734229
2198 12:45:59.078851
2199 12:45:59.079245 Starting kernel ...
2200 12:45:59.079605
2201 12:45:59.079954
2202 12:45:59.080825 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2203 12:45:59.081397 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2204 12:45:59.081815 Setting prompt string to ['Linux version [0-9]']
2205 12:45:59.082353 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2206 12:45:59.082878 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2208 12:50:28.081615 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2210 12:50:28.081835 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2212 12:50:28.081994 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2215 12:50:28.082255 end: 2 depthcharge-action (duration 00:05:00) [common]
2217 12:50:28.082496 Cleaning after the job
2218 12:50:28.082581 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/ramdisk
2219 12:50:28.083035 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/kernel
2220 12:50:28.083531 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/nfsrootfs
2221 12:50:28.114950 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819503/tftp-deploy-cg7m4xdo/modules
2222 12:50:28.115290 start: 5.1 power-off (timeout 00:00:30) [common]
2223 12:50:28.115474 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2224 12:50:28.136293 >> Command sent successfully.
2225 12:50:28.138468 Returned 0 in 0 seconds
2226 12:50:28.239674 end: 5.1 power-off (duration 00:00:00) [common]
2228 12:50:28.241148 start: 5.2 read-feedback (timeout 00:10:00) [common]
2229 12:50:28.242246 Listened to connection for namespace 'common' for up to 1s
2230 12:50:29.245082 Finalising connection for namespace 'common'
2231 12:50:29.245335 Disconnecting from shell: Finalise
2232 12:50:29.346260 end: 5.2 read-feedback (duration 00:00:01) [common]
2233 12:50:29.346436 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819503
2234 12:50:29.442963 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819503
2235 12:50:29.443162 JobError: Your job cannot terminate cleanly.