Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:44:37.013812 lava-dispatcher, installed at version: 2022.04
2 12:44:37.014010 start: 0 validate
3 12:44:37.014142 Start time: 2022-07-14 12:44:37.014135+00:00 (UTC)
4 12:44:37.014271 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:37.014397 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20220708.0%2Famd64%2Frootfs.cpio.gz exists
6 12:44:37.305288 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:37.305465 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:37.306547 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:37.306657 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:44:37.308857 validate duration: 0.29
12 12:44:37.309137 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:44:37.309238 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:44:37.309337 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:44:37.309447 Not decompressing ramdisk as can be used compressed.
16 12:44:37.309531 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20220708.0/amd64/rootfs.cpio.gz
17 12:44:37.309595 saving as /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/ramdisk/rootfs.cpio.gz
18 12:44:37.309656 total size: 35734170 (34MB)
19 12:44:37.310612 progress 0% (0MB)
20 12:44:37.319503 progress 5% (1MB)
21 12:44:37.328239 progress 10% (3MB)
22 12:44:37.336742 progress 15% (5MB)
23 12:44:37.345354 progress 20% (6MB)
24 12:44:37.354208 progress 25% (8MB)
25 12:44:37.362996 progress 30% (10MB)
26 12:44:37.371586 progress 35% (11MB)
27 12:44:37.380231 progress 40% (13MB)
28 12:44:37.388702 progress 45% (15MB)
29 12:44:37.397278 progress 50% (17MB)
30 12:44:37.405790 progress 55% (18MB)
31 12:44:37.414476 progress 60% (20MB)
32 12:44:37.422975 progress 65% (22MB)
33 12:44:37.431515 progress 70% (23MB)
34 12:44:37.439873 progress 75% (25MB)
35 12:44:37.448450 progress 80% (27MB)
36 12:44:37.457014 progress 85% (28MB)
37 12:44:37.465706 progress 90% (30MB)
38 12:44:37.474079 progress 95% (32MB)
39 12:44:37.482545 progress 100% (34MB)
40 12:44:37.482806 34MB downloaded in 0.17s (196.82MB/s)
41 12:44:37.482968 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:44:37.483216 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:44:37.483306 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:44:37.483392 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:44:37.483503 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:44:37.483574 saving as /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/kernel/bzImage
48 12:44:37.483636 total size: 6811536 (6MB)
49 12:44:37.483696 No compression specified
50 12:44:37.484743 progress 0% (0MB)
51 12:44:37.486488 progress 5% (0MB)
52 12:44:37.488136 progress 10% (0MB)
53 12:44:37.489923 progress 15% (1MB)
54 12:44:37.491544 progress 20% (1MB)
55 12:44:37.493168 progress 25% (1MB)
56 12:44:37.494951 progress 30% (1MB)
57 12:44:37.496574 progress 35% (2MB)
58 12:44:37.498318 progress 40% (2MB)
59 12:44:37.499917 progress 45% (2MB)
60 12:44:37.501527 progress 50% (3MB)
61 12:44:37.503288 progress 55% (3MB)
62 12:44:37.504888 progress 60% (3MB)
63 12:44:37.506652 progress 65% (4MB)
64 12:44:37.508242 progress 70% (4MB)
65 12:44:37.509881 progress 75% (4MB)
66 12:44:37.511667 progress 80% (5MB)
67 12:44:37.513332 progress 85% (5MB)
68 12:44:37.515072 progress 90% (5MB)
69 12:44:37.516672 progress 95% (6MB)
70 12:44:37.518302 progress 100% (6MB)
71 12:44:37.518565 6MB downloaded in 0.03s (186.00MB/s)
72 12:44:37.518713 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:44:37.518951 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:44:37.519039 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:44:37.519125 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:44:37.519232 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:44:37.519299 saving as /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/modules/modules.tar
79 12:44:37.519359 total size: 51960 (0MB)
80 12:44:37.519420 Using unxz to decompress xz
81 12:44:37.522790 progress 63% (0MB)
82 12:44:37.523164 progress 100% (0MB)
83 12:44:37.526391 0MB downloaded in 0.01s (7.05MB/s)
84 12:44:37.526609 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:44:37.526876 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:44:37.526969 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 12:44:37.527065 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 12:44:37.527149 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:44:37.527233 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 12:44:37.527399 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt
92 12:44:37.527507 makedir: /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin
93 12:44:37.527591 makedir: /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/tests
94 12:44:37.527671 makedir: /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/results
95 12:44:37.527775 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-add-keys
96 12:44:37.527906 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-add-sources
97 12:44:37.528022 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-background-process-start
98 12:44:37.528136 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-background-process-stop
99 12:44:37.528247 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-common-functions
100 12:44:37.528356 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-echo-ipv4
101 12:44:37.528466 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-install-packages
102 12:44:37.528576 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-installed-packages
103 12:44:37.528683 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-os-build
104 12:44:37.528791 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-probe-channel
105 12:44:37.528901 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-probe-ip
106 12:44:37.529021 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-target-ip
107 12:44:37.529130 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-target-mac
108 12:44:37.529237 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-target-storage
109 12:44:37.529348 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-case
110 12:44:37.529457 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-event
111 12:44:37.529565 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-feedback
112 12:44:37.529676 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-raise
113 12:44:37.529804 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-reference
114 12:44:37.529913 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-runner
115 12:44:37.530021 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-set
116 12:44:37.530129 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-test-shell
117 12:44:37.530255 Updating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-install-packages (oe)
118 12:44:37.530373 Updating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/bin/lava-installed-packages (oe)
119 12:44:37.530474 Creating /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/environment
120 12:44:37.530562 LAVA metadata
121 12:44:37.530631 - LAVA_JOB_ID=6819443
122 12:44:37.530700 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:44:37.530804 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 12:44:37.530870 skipped lava-vland-overlay
125 12:44:37.530947 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:44:37.531030 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 12:44:37.531095 skipped lava-multinode-overlay
128 12:44:37.531169 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:44:37.531252 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 12:44:37.531327 Loading test definitions
131 12:44:37.531424 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 12:44:37.531500 Using /lava-6819443 at stage 0
133 12:44:37.531754 uuid=6819443_1.4.2.3.1 testdef=None
134 12:44:37.531843 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:44:37.531932 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 12:44:37.532403 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:44:37.532633 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 12:44:37.533224 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:44:37.533472 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 12:44:37.533977 runner path: /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/0/tests/0_cros-ec test_uuid 6819443_1.4.2.3.1
143 12:44:37.534123 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:44:37.534338 Creating lava-test-runner.conf files
146 12:44:37.534402 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819443/lava-overlay-zgrzrpqt/lava-6819443/0 for stage 0
147 12:44:37.534484 - 0_cros-ec
148 12:44:37.534577 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 12:44:37.534667 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
150 12:44:37.539688 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 12:44:37.539880 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
152 12:44:37.539969 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 12:44:37.540055 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 12:44:37.540141 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
155 12:44:38.293212 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 12:44:38.293561 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
157 12:44:38.293674 extracting modules file /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819443/extract-overlay-ramdisk-uqnh11t9/ramdisk
158 12:44:38.297949 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 12:44:38.298065 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
160 12:44:38.298154 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819443/compress-overlay-qbrs8s9v/overlay-1.4.2.4.tar.gz to ramdisk
161 12:44:38.298237 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819443/compress-overlay-qbrs8s9v/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819443/extract-overlay-ramdisk-uqnh11t9/ramdisk
162 12:44:38.301489 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 12:44:38.301597 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
164 12:44:38.301688 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 12:44:38.301778 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
166 12:44:38.301859 Building ramdisk /var/lib/lava/dispatcher/tmp/6819443/extract-overlay-ramdisk-uqnh11t9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819443/extract-overlay-ramdisk-uqnh11t9/ramdisk
167 12:44:38.551869 >> 182230 blocks
168 12:44:41.744888 rename /var/lib/lava/dispatcher/tmp/6819443/extract-overlay-ramdisk-uqnh11t9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/ramdisk/ramdisk.cpio.gz
169 12:44:41.745353 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 12:44:41.745471 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
171 12:44:41.745576 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
172 12:44:41.745671 No mkimage arch provided, not using FIT.
173 12:44:41.745766 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 12:44:41.745852 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 12:44:41.745951 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 12:44:41.746044 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
177 12:44:41.746121 No LXC device requested
178 12:44:41.746203 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 12:44:41.746292 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
180 12:44:41.746374 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 12:44:41.746444 Checking files for TFTP limit of 4294967296 bytes.
182 12:44:41.746835 end: 1 tftp-deploy (duration 00:00:04) [common]
183 12:44:41.746943 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 12:44:41.747042 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 12:44:41.747190 substitutions:
186 12:44:41.747261 - {DTB}: None
187 12:44:41.747325 - {INITRD}: 6819443/tftp-deploy-qqqs7iw9/ramdisk/ramdisk.cpio.gz
188 12:44:41.747386 - {KERNEL}: 6819443/tftp-deploy-qqqs7iw9/kernel/bzImage
189 12:44:41.747445 - {LAVA_MAC}: None
190 12:44:41.747505 - {PRESEED_CONFIG}: None
191 12:44:41.747561 - {PRESEED_LOCAL}: None
192 12:44:41.747619 - {RAMDISK}: 6819443/tftp-deploy-qqqs7iw9/ramdisk/ramdisk.cpio.gz
193 12:44:41.747676 - {ROOT_PART}: None
194 12:44:41.747732 - {ROOT}: None
195 12:44:41.747788 - {SERVER_IP}: 192.168.201.1
196 12:44:41.747843 - {TEE}: None
197 12:44:41.747899 Parsed boot commands:
198 12:44:41.747954 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 12:44:41.748102 Parsed boot commands: tftpboot 192.168.201.1 6819443/tftp-deploy-qqqs7iw9/kernel/bzImage 6819443/tftp-deploy-qqqs7iw9/kernel/cmdline 6819443/tftp-deploy-qqqs7iw9/ramdisk/ramdisk.cpio.gz
200 12:44:41.748195 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 12:44:41.748281 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 12:44:41.748374 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 12:44:41.748458 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 12:44:41.748528 Not connected, no need to disconnect.
205 12:44:41.748604 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 12:44:41.748688 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 12:44:41.748756 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
208 12:44:41.751574 Setting prompt string to ['lava-test: # ']
209 12:44:41.751850 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 12:44:41.751957 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 12:44:41.752052 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 12:44:41.752141 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 12:44:41.752320 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
214 12:44:41.771999 >> Command sent successfully.
215 12:44:41.773895 Returned 0 in 0 seconds
216 12:44:41.874782 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 12:44:41.875116 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 12:44:41.875214 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 12:44:41.875303 Setting prompt string to 'Starting depthcharge on Voema...'
221 12:44:41.875368 Changing prompt to 'Starting depthcharge on Voema...'
222 12:44:41.875436 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 12:44:41.875704 [Enter `^Ec?' for help]
224 12:44:49.207479
225 12:44:49.207647
226 12:44:49.217342 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 12:44:49.223433 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
228 12:44:49.226955 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 12:44:49.230092 CPU: AES supported, TXT NOT supported, VT supported
230 12:44:49.236887 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 12:44:49.240679 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 12:44:49.247773 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 12:44:49.251545 VBOOT: Loading verstage.
234 12:44:49.254571 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
235 12:44:49.261138 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 12:44:49.264333 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 12:44:49.274699 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 12:44:49.280756 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 12:44:49.280842
240 12:44:49.280910
241 12:44:49.294022 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 12:44:49.307935 Probing TPM: . done!
243 12:44:49.310855 TPM ready after 0 ms
244 12:44:49.315117 Connected to device vid:did:rid of 1ae0:0028:00
245 12:44:49.325729 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
246 12:44:49.332171 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 12:44:49.335551 Initialized TPM device CR50 revision 0
248 12:44:49.388147 tlcl_send_startup: Startup return code is 0
249 12:44:49.388273 TPM: setup succeeded
250 12:44:49.402384 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 12:44:49.417065 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 12:44:49.429556 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 12:44:49.439766 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 12:44:49.442888 Chrome EC: UHEPI supported
255 12:44:49.446456 Phase 1
256 12:44:49.449912 FMAP: area GBB found @ 1805000 (458752 bytes)
257 12:44:49.460162 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 12:44:49.466281 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 12:44:49.473523 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 12:44:49.479514 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 12:44:49.482842 Recovery requested (1009000e)
262 12:44:49.486438 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 12:44:49.497726 tlcl_extend: response is 0
264 12:44:49.504555 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 12:44:49.514711 tlcl_extend: response is 0
266 12:44:49.520917 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 12:44:49.527864 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 12:44:49.534250 BS: verstage times (exec / console): total (unknown) / 142 ms
269 12:44:49.534349
270 12:44:49.534421
271 12:44:49.547270 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 12:44:49.554009 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 12:44:49.557555 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 12:44:49.560916 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 12:44:49.567249 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 12:44:49.570891 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 12:44:49.573967 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 12:44:49.577526 TCO_STS: 0000 0000
279 12:44:49.580338 GEN_PMCON: d0015038 00002200
280 12:44:49.583730 GBLRST_CAUSE: 00000000 00000000
281 12:44:49.586917 HPR_CAUSE0: 00000000
282 12:44:49.587004 prev_sleep_state 5
283 12:44:49.590682 Boot Count incremented to 6075
284 12:44:49.596774 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 12:44:49.603597 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 12:44:49.613701 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 12:44:49.620121 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 12:44:49.623621 Chrome EC: UHEPI supported
289 12:44:49.629909 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 12:44:49.641534 Probing TPM: done!
291 12:44:49.648338 Connected to device vid:did:rid of 1ae0:0028:00
292 12:44:49.657631 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
293 12:44:49.660992 Initialized TPM device CR50 revision 0
294 12:44:49.679665 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 12:44:49.682634 MRC: Hash idx 0x100b comparison successful.
296 12:44:49.685767 MRC cache found, size faa8
297 12:44:49.685855 bootmode is set to: 2
298 12:44:49.689285 SPD index = 2
299 12:44:49.696456 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 12:44:49.699144 SPD: module type is LPDDR4X
301 12:44:49.702653 SPD: module part number is MT53D1G64D4NW-046
302 12:44:49.709499 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
303 12:44:49.712941 SPD: device width 16 bits, bus width 16 bits
304 12:44:49.718941 SPD: module size is 2048 MB (per channel)
305 12:44:50.148613 CBMEM:
306 12:44:50.151832 IMD: root @ 0x76fff000 254 entries.
307 12:44:50.155381 IMD: root @ 0x76ffec00 62 entries.
308 12:44:50.158826 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 12:44:50.164932 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 12:44:50.168842 External stage cache:
311 12:44:50.171959 IMD: root @ 0x7b3ff000 254 entries.
312 12:44:50.175665 IMD: root @ 0x7b3fec00 62 entries.
313 12:44:50.190046 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 12:44:50.196931 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 12:44:50.203170 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 12:44:50.216936 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 12:44:50.223216 cse_lite: Skip switching to RW in the recovery path
318 12:44:50.223303 8 DIMMs found
319 12:44:50.223373 SMM Memory Map
320 12:44:50.230781 SMRAM : 0x7b000000 0x800000
321 12:44:50.233319 Subregion 0: 0x7b000000 0x200000
322 12:44:50.236900 Subregion 1: 0x7b200000 0x200000
323 12:44:50.239960 Subregion 2: 0x7b400000 0x400000
324 12:44:50.240046 top_of_ram = 0x77000000
325 12:44:50.246914 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 12:44:50.253246 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 12:44:50.256896 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 12:44:50.263755 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 12:44:50.269884 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 12:44:50.276559 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 12:44:50.286587 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 12:44:50.292905 Processing 211 relocs. Offset value of 0x74c0b000
333 12:44:50.299980 BS: romstage times (exec / console): total (unknown) / 276 ms
334 12:44:50.305782
335 12:44:50.305867
336 12:44:50.315846 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 12:44:50.319215 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 12:44:50.329413 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 12:44:50.336077 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 12:44:50.342284 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 12:44:50.348958 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 12:44:50.393110 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 12:44:50.399094 Processing 5008 relocs. Offset value of 0x75d98000
344 12:44:50.402425 BS: postcar times (exec / console): total (unknown) / 59 ms
345 12:44:50.405781
346 12:44:50.405898
347 12:44:50.415566 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 12:44:50.415654 Normal boot
349 12:44:50.418884 FW_CONFIG value is 0x804c02
350 12:44:50.422674 PCI: 00:07.0 disabled by fw_config
351 12:44:50.425491 PCI: 00:07.1 disabled by fw_config
352 12:44:50.429449 PCI: 00:0d.2 disabled by fw_config
353 12:44:50.435192 PCI: 00:1c.7 disabled by fw_config
354 12:44:50.438922 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 12:44:50.445358 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 12:44:50.448671 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 12:44:50.455457 GENERIC: 0.0 disabled by fw_config
358 12:44:50.458469 GENERIC: 1.0 disabled by fw_config
359 12:44:50.462153 fw_config match found: DB_USB=USB3_ACTIVE
360 12:44:50.465361 fw_config match found: DB_USB=USB3_ACTIVE
361 12:44:50.468472 fw_config match found: DB_USB=USB3_ACTIVE
362 12:44:50.474922 fw_config match found: DB_USB=USB3_ACTIVE
363 12:44:50.478454 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 12:44:50.488446 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 12:44:50.495233 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 12:44:50.501872 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 12:44:50.508401 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 12:44:50.511783 microcode: Update skipped, already up-to-date
369 12:44:50.517977 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 12:44:50.545875 Detected 4 core, 8 thread CPU.
371 12:44:50.549293 Setting up SMI for CPU
372 12:44:50.552600 IED base = 0x7b400000
373 12:44:50.552721 IED size = 0x00400000
374 12:44:50.556270 Will perform SMM setup.
375 12:44:50.563335 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
376 12:44:50.569486 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 12:44:50.576217 Processing 16 relocs. Offset value of 0x00030000
378 12:44:50.579151 Attempting to start 7 APs
379 12:44:50.582950 Waiting for 10ms after sending INIT.
380 12:44:50.598303 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 12:44:50.598390 done.
382 12:44:50.601500 AP: slot 3 apic_id 2.
383 12:44:50.604724 AP: slot 6 apic_id 3.
384 12:44:50.604809 AP: slot 2 apic_id 7.
385 12:44:50.608116 AP: slot 5 apic_id 6.
386 12:44:50.611360 AP: slot 4 apic_id 4.
387 12:44:50.611445 AP: slot 7 apic_id 5.
388 12:44:50.618682 Waiting for 2nd SIPI to complete...done.
389 12:44:50.624389 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 12:44:50.631022 Processing 13 relocs. Offset value of 0x00038000
391 12:44:50.634489 Unable to locate Global NVS
392 12:44:50.641179 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 12:44:50.644361 Installing permanent SMM handler to 0x7b000000
394 12:44:50.654464 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 12:44:50.657390 Processing 794 relocs. Offset value of 0x7b010000
396 12:44:50.667677 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 12:44:50.670947 Processing 13 relocs. Offset value of 0x7b008000
398 12:44:50.677338 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 12:44:50.684344 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 12:44:50.687418 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 12:44:50.694903 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 12:44:50.700635 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 12:44:50.707093 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 12:44:50.714344 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 12:44:50.714430 Unable to locate Global NVS
406 12:44:50.723946 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 12:44:50.727002 Clearing SMI status registers
408 12:44:50.727088 SMI_STS: PM1
409 12:44:50.730167 PM1_STS: PWRBTN
410 12:44:50.737084 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 12:44:50.740340 In relocation handler: CPU 0
412 12:44:50.743519 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 12:44:50.750609 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 12:44:50.750698 Relocation complete.
415 12:44:50.760018 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 12:44:50.763468 In relocation handler: CPU 1
417 12:44:50.766840 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 12:44:50.766927 Relocation complete.
419 12:44:50.776521 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
420 12:44:50.780324 In relocation handler: CPU 7
421 12:44:50.783387 New SMBASE=0x7affe400 IEDBASE=0x7b400000
422 12:44:50.783474 Relocation complete.
423 12:44:50.793535 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
424 12:44:50.796531 In relocation handler: CPU 2
425 12:44:50.799550 New SMBASE=0x7afff800 IEDBASE=0x7b400000
426 12:44:50.799636 Relocation complete.
427 12:44:50.809604 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
428 12:44:50.809686 In relocation handler: CPU 5
429 12:44:50.816664 New SMBASE=0x7affec00 IEDBASE=0x7b400000
430 12:44:50.819736 Writing SMRR. base = 0x7b000006, mask=0xff800c00
431 12:44:50.822913 Relocation complete.
432 12:44:50.829578 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
433 12:44:50.833117 In relocation handler: CPU 6
434 12:44:50.836405 New SMBASE=0x7affe800 IEDBASE=0x7b400000
435 12:44:50.839665 Relocation complete.
436 12:44:50.846116 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
437 12:44:50.849478 In relocation handler: CPU 3
438 12:44:50.852493 New SMBASE=0x7afff400 IEDBASE=0x7b400000
439 12:44:50.859415 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 12:44:50.859512 Relocation complete.
441 12:44:50.869042 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
442 12:44:50.869157 In relocation handler: CPU 4
443 12:44:50.875905 New SMBASE=0x7afff000 IEDBASE=0x7b400000
444 12:44:50.878693 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 12:44:50.882657 Relocation complete.
446 12:44:50.882737 Initializing CPU #0
447 12:44:50.885506 CPU: vendor Intel device 806c1
448 12:44:50.892745 CPU: family 06, model 8c, stepping 01
449 12:44:50.892828 Clearing out pending MCEs
450 12:44:50.895705 Setting up local APIC...
451 12:44:50.898986 apic_id: 0x00 done.
452 12:44:50.903050 Turbo is available but hidden
453 12:44:50.906145 Turbo is available and visible
454 12:44:50.908642 microcode: Update skipped, already up-to-date
455 12:44:50.912223 CPU #0 initialized
456 12:44:50.912309 Initializing CPU #7
457 12:44:50.915966 Initializing CPU #4
458 12:44:50.918616 Initializing CPU #3
459 12:44:50.918741 Initializing CPU #5
460 12:44:50.922061 Initializing CPU #2
461 12:44:50.925236 CPU: vendor Intel device 806c1
462 12:44:50.928778 CPU: family 06, model 8c, stepping 01
463 12:44:50.932082 CPU: vendor Intel device 806c1
464 12:44:50.935421 CPU: family 06, model 8c, stepping 01
465 12:44:50.938749 Clearing out pending MCEs
466 12:44:50.941800 Clearing out pending MCEs
467 12:44:50.941892 Setting up local APIC...
468 12:44:50.945354 CPU: vendor Intel device 806c1
469 12:44:50.951855 CPU: family 06, model 8c, stepping 01
470 12:44:50.951945 CPU: vendor Intel device 806c1
471 12:44:50.958499 CPU: family 06, model 8c, stepping 01
472 12:44:50.958588 Clearing out pending MCEs
473 12:44:50.961598 Clearing out pending MCEs
474 12:44:50.965152 Setting up local APIC...
475 12:44:50.968597 CPU: vendor Intel device 806c1
476 12:44:50.971578 CPU: family 06, model 8c, stepping 01
477 12:44:50.975120 Initializing CPU #6
478 12:44:50.975208 Clearing out pending MCEs
479 12:44:50.979215 CPU: vendor Intel device 806c1
480 12:44:50.982660 CPU: family 06, model 8c, stepping 01
481 12:44:50.986967 Setting up local APIC...
482 12:44:50.989307 Initializing CPU #1
483 12:44:50.989394 apic_id: 0x02 done.
484 12:44:50.994049 Clearing out pending MCEs
485 12:44:50.996366 microcode: Update skipped, already up-to-date
486 12:44:50.999667 Setting up local APIC...
487 12:44:51.002923 Setting up local APIC...
488 12:44:51.006463 Setting up local APIC...
489 12:44:51.006549 apic_id: 0x03 done.
490 12:44:51.009634 CPU #3 initialized
491 12:44:51.012926 microcode: Update skipped, already up-to-date
492 12:44:51.015964 apic_id: 0x07 done.
493 12:44:51.019647 apic_id: 0x06 done.
494 12:44:51.023239 microcode: Update skipped, already up-to-date
495 12:44:51.025689 microcode: Update skipped, already up-to-date
496 12:44:51.028932 CPU #2 initialized
497 12:44:51.032307 CPU #5 initialized
498 12:44:51.032414 CPU #6 initialized
499 12:44:51.035697 apic_id: 0x04 done.
500 12:44:51.035782 apic_id: 0x05 done.
501 12:44:51.042416 microcode: Update skipped, already up-to-date
502 12:44:51.045609 microcode: Update skipped, already up-to-date
503 12:44:51.049157 CPU #4 initialized
504 12:44:51.049264 CPU #7 initialized
505 12:44:51.052516 CPU: vendor Intel device 806c1
506 12:44:51.058683 CPU: family 06, model 8c, stepping 01
507 12:44:51.058779 Clearing out pending MCEs
508 12:44:51.062130 Setting up local APIC...
509 12:44:51.065379 apic_id: 0x01 done.
510 12:44:51.068777 microcode: Update skipped, already up-to-date
511 12:44:51.071922 CPU #1 initialized
512 12:44:51.075551 bsp_do_flight_plan done after 454 msecs.
513 12:44:51.078426 CPU: frequency set to 4400 MHz
514 12:44:51.081902 Enabling SMIs.
515 12:44:51.088954 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 12:44:51.102669 SATAXPCIE1 indicates PCIe NVMe is present
517 12:44:51.106410 Probing TPM: done!
518 12:44:51.109942 Connected to device vid:did:rid of 1ae0:0028:00
519 12:44:51.120242 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
520 12:44:51.123493 Initialized TPM device CR50 revision 0
521 12:44:51.126813 Enabling S0i3.4
522 12:44:51.133278 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 12:44:51.136815 Found a VBT of 8704 bytes after decompression
524 12:44:51.143045 cse_lite: CSE RO boot. HybridStorageMode disabled
525 12:44:51.150131 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 12:44:51.226523 FSPS returned 0
527 12:44:51.228579 Executing Phase 1 of FspMultiPhaseSiInit
528 12:44:51.239419 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 12:44:51.242007 port C0 DISC req: usage 1 usb3 1 usb2 5
530 12:44:51.245362 Raw Buffer output 0 00000511
531 12:44:51.248940 Raw Buffer output 1 00000000
532 12:44:51.252359 pmc_send_ipc_cmd succeeded
533 12:44:51.259377 port C1 DISC req: usage 1 usb3 2 usb2 3
534 12:44:51.259465 Raw Buffer output 0 00000321
535 12:44:51.262479 Raw Buffer output 1 00000000
536 12:44:51.266337 pmc_send_ipc_cmd succeeded
537 12:44:51.271423 Detected 4 core, 8 thread CPU.
538 12:44:51.275394 Detected 4 core, 8 thread CPU.
539 12:44:51.475450 Display FSP Version Info HOB
540 12:44:51.478639 Reference Code - CPU = a.0.4c.31
541 12:44:51.481947 uCode Version = 0.0.0.86
542 12:44:51.485110 TXT ACM version = ff.ff.ff.ffff
543 12:44:51.488517 Reference Code - ME = a.0.4c.31
544 12:44:51.491579 MEBx version = 0.0.0.0
545 12:44:51.494925 ME Firmware Version = Consumer SKU
546 12:44:51.498400 Reference Code - PCH = a.0.4c.31
547 12:44:51.501818 PCH-CRID Status = Disabled
548 12:44:51.505302 PCH-CRID Original Value = ff.ff.ff.ffff
549 12:44:51.508447 PCH-CRID New Value = ff.ff.ff.ffff
550 12:44:51.511521 OPROM - RST - RAID = ff.ff.ff.ffff
551 12:44:51.514812 PCH Hsio Version = 4.0.0.0
552 12:44:51.518663 Reference Code - SA - System Agent = a.0.4c.31
553 12:44:51.521617 Reference Code - MRC = 2.0.0.1
554 12:44:51.525102 SA - PCIe Version = a.0.4c.31
555 12:44:51.528424 SA-CRID Status = Disabled
556 12:44:51.531769 SA-CRID Original Value = 0.0.0.1
557 12:44:51.534827 SA-CRID New Value = 0.0.0.1
558 12:44:51.538238 OPROM - VBIOS = ff.ff.ff.ffff
559 12:44:51.541827 IO Manageability Engine FW Version = 11.1.4.0
560 12:44:51.544843 PHY Build Version = 0.0.0.e0
561 12:44:51.547987 Thunderbolt(TM) FW Version = 0.0.0.0
562 12:44:51.554600 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 12:44:51.558806 ITSS IRQ Polarities Before:
564 12:44:51.558888 IPC0: 0xffffffff
565 12:44:51.562859 IPC1: 0xffffffff
566 12:44:51.562940 IPC2: 0xffffffff
567 12:44:51.565609 IPC3: 0xffffffff
568 12:44:51.565683 ITSS IRQ Polarities After:
569 12:44:51.569472 IPC0: 0xffffffff
570 12:44:51.571789 IPC1: 0xffffffff
571 12:44:51.571895 IPC2: 0xffffffff
572 12:44:51.576271 IPC3: 0xffffffff
573 12:44:51.578891 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 12:44:51.591650 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 12:44:51.601923 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 12:44:51.614816 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 12:44:51.621327 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
578 12:44:51.621428 Enumerating buses...
579 12:44:51.628288 Show all devs... Before device enumeration.
580 12:44:51.631029 Root Device: enabled 1
581 12:44:51.631122 DOMAIN: 0000: enabled 1
582 12:44:51.634546 CPU_CLUSTER: 0: enabled 1
583 12:44:51.637839 PCI: 00:00.0: enabled 1
584 12:44:51.641314 PCI: 00:02.0: enabled 1
585 12:44:51.641402 PCI: 00:04.0: enabled 1
586 12:44:51.644502 PCI: 00:05.0: enabled 1
587 12:44:51.648002 PCI: 00:06.0: enabled 0
588 12:44:51.648089 PCI: 00:07.0: enabled 0
589 12:44:51.651058 PCI: 00:07.1: enabled 0
590 12:44:51.654574 PCI: 00:07.2: enabled 0
591 12:44:51.657545 PCI: 00:07.3: enabled 0
592 12:44:51.657631 PCI: 00:08.0: enabled 1
593 12:44:51.661696 PCI: 00:09.0: enabled 0
594 12:44:51.664172 PCI: 00:0a.0: enabled 0
595 12:44:51.668040 PCI: 00:0d.0: enabled 1
596 12:44:51.668132 PCI: 00:0d.1: enabled 0
597 12:44:51.671671 PCI: 00:0d.2: enabled 0
598 12:44:51.674185 PCI: 00:0d.3: enabled 0
599 12:44:51.677965 PCI: 00:0e.0: enabled 0
600 12:44:51.678052 PCI: 00:10.2: enabled 1
601 12:44:51.681238 PCI: 00:10.6: enabled 0
602 12:44:51.684019 PCI: 00:10.7: enabled 0
603 12:44:51.687652 PCI: 00:12.0: enabled 0
604 12:44:51.687739 PCI: 00:12.6: enabled 0
605 12:44:51.690980 PCI: 00:13.0: enabled 0
606 12:44:51.694313 PCI: 00:14.0: enabled 1
607 12:44:51.697245 PCI: 00:14.1: enabled 0
608 12:44:51.697331 PCI: 00:14.2: enabled 1
609 12:44:51.700452 PCI: 00:14.3: enabled 1
610 12:44:51.703877 PCI: 00:15.0: enabled 1
611 12:44:51.703961 PCI: 00:15.1: enabled 1
612 12:44:51.707430 PCI: 00:15.2: enabled 1
613 12:44:51.710730 PCI: 00:15.3: enabled 1
614 12:44:51.713838 PCI: 00:16.0: enabled 1
615 12:44:51.713925 PCI: 00:16.1: enabled 0
616 12:44:51.716774 PCI: 00:16.2: enabled 0
617 12:44:51.720584 PCI: 00:16.3: enabled 0
618 12:44:51.723547 PCI: 00:16.4: enabled 0
619 12:44:51.723633 PCI: 00:16.5: enabled 0
620 12:44:51.726990 PCI: 00:17.0: enabled 1
621 12:44:51.730460 PCI: 00:19.0: enabled 0
622 12:44:51.733999 PCI: 00:19.1: enabled 1
623 12:44:51.734131 PCI: 00:19.2: enabled 0
624 12:44:51.737191 PCI: 00:1c.0: enabled 1
625 12:44:51.740373 PCI: 00:1c.1: enabled 0
626 12:44:51.743422 PCI: 00:1c.2: enabled 0
627 12:44:51.743506 PCI: 00:1c.3: enabled 0
628 12:44:51.746755 PCI: 00:1c.4: enabled 0
629 12:44:51.749993 PCI: 00:1c.5: enabled 0
630 12:44:51.753770 PCI: 00:1c.6: enabled 1
631 12:44:51.753859 PCI: 00:1c.7: enabled 0
632 12:44:51.756825 PCI: 00:1d.0: enabled 1
633 12:44:51.760434 PCI: 00:1d.1: enabled 0
634 12:44:51.763635 PCI: 00:1d.2: enabled 1
635 12:44:51.763711 PCI: 00:1d.3: enabled 0
636 12:44:51.766731 PCI: 00:1e.0: enabled 1
637 12:44:51.769777 PCI: 00:1e.1: enabled 0
638 12:44:51.769862 PCI: 00:1e.2: enabled 1
639 12:44:51.773237 PCI: 00:1e.3: enabled 1
640 12:44:51.776407 PCI: 00:1f.0: enabled 1
641 12:44:51.780213 PCI: 00:1f.1: enabled 0
642 12:44:51.780297 PCI: 00:1f.2: enabled 1
643 12:44:51.783206 PCI: 00:1f.3: enabled 1
644 12:44:51.786559 PCI: 00:1f.4: enabled 0
645 12:44:51.789812 PCI: 00:1f.5: enabled 1
646 12:44:51.789913 PCI: 00:1f.6: enabled 0
647 12:44:51.792927 PCI: 00:1f.7: enabled 0
648 12:44:51.796100 APIC: 00: enabled 1
649 12:44:51.796187 GENERIC: 0.0: enabled 1
650 12:44:51.799714 GENERIC: 0.0: enabled 1
651 12:44:51.803135 GENERIC: 1.0: enabled 1
652 12:44:51.806357 GENERIC: 0.0: enabled 1
653 12:44:51.806444 GENERIC: 1.0: enabled 1
654 12:44:51.809406 USB0 port 0: enabled 1
655 12:44:51.813236 GENERIC: 0.0: enabled 1
656 12:44:51.816970 USB0 port 0: enabled 1
657 12:44:51.817063 GENERIC: 0.0: enabled 1
658 12:44:51.819412 I2C: 00:1a: enabled 1
659 12:44:51.823440 I2C: 00:31: enabled 1
660 12:44:51.823530 I2C: 00:32: enabled 1
661 12:44:51.826308 I2C: 00:10: enabled 1
662 12:44:51.829994 I2C: 00:15: enabled 1
663 12:44:51.830082 GENERIC: 0.0: enabled 0
664 12:44:51.832714 GENERIC: 1.0: enabled 0
665 12:44:51.836303 GENERIC: 0.0: enabled 1
666 12:44:51.836390 SPI: 00: enabled 1
667 12:44:51.839272 SPI: 00: enabled 1
668 12:44:51.842886 PNP: 0c09.0: enabled 1
669 12:44:51.846201 GENERIC: 0.0: enabled 1
670 12:44:51.846278 USB3 port 0: enabled 1
671 12:44:51.849197 USB3 port 1: enabled 1
672 12:44:51.853305 USB3 port 2: enabled 0
673 12:44:51.853390 USB3 port 3: enabled 0
674 12:44:51.855815 USB2 port 0: enabled 0
675 12:44:51.859618 USB2 port 1: enabled 1
676 12:44:51.862630 USB2 port 2: enabled 1
677 12:44:51.862735 USB2 port 3: enabled 0
678 12:44:51.866143 USB2 port 4: enabled 1
679 12:44:51.869322 USB2 port 5: enabled 0
680 12:44:51.869449 USB2 port 6: enabled 0
681 12:44:51.873150 USB2 port 7: enabled 0
682 12:44:51.875929 USB2 port 8: enabled 0
683 12:44:51.876031 USB2 port 9: enabled 0
684 12:44:51.879080 USB3 port 0: enabled 0
685 12:44:51.882932 USB3 port 1: enabled 1
686 12:44:51.885967 USB3 port 2: enabled 0
687 12:44:51.886053 USB3 port 3: enabled 0
688 12:44:51.889426 GENERIC: 0.0: enabled 1
689 12:44:51.892319 GENERIC: 1.0: enabled 1
690 12:44:51.892404 APIC: 01: enabled 1
691 12:44:51.895461 APIC: 07: enabled 1
692 12:44:51.899749 APIC: 02: enabled 1
693 12:44:51.899855 APIC: 04: enabled 1
694 12:44:51.902077 APIC: 06: enabled 1
695 12:44:51.902161 APIC: 03: enabled 1
696 12:44:51.906014 APIC: 05: enabled 1
697 12:44:51.908849 Compare with tree...
698 12:44:51.908934 Root Device: enabled 1
699 12:44:51.912159 DOMAIN: 0000: enabled 1
700 12:44:51.915613 PCI: 00:00.0: enabled 1
701 12:44:51.919135 PCI: 00:02.0: enabled 1
702 12:44:51.922330 PCI: 00:04.0: enabled 1
703 12:44:51.922414 GENERIC: 0.0: enabled 1
704 12:44:51.925700 PCI: 00:05.0: enabled 1
705 12:44:51.929200 PCI: 00:06.0: enabled 0
706 12:44:51.931910 PCI: 00:07.0: enabled 0
707 12:44:51.935535 GENERIC: 0.0: enabled 1
708 12:44:51.935620 PCI: 00:07.1: enabled 0
709 12:44:51.939040 GENERIC: 1.0: enabled 1
710 12:44:51.942021 PCI: 00:07.2: enabled 0
711 12:44:51.945669 GENERIC: 0.0: enabled 1
712 12:44:51.948528 PCI: 00:07.3: enabled 0
713 12:44:51.952441 GENERIC: 1.0: enabled 1
714 12:44:51.952527 PCI: 00:08.0: enabled 1
715 12:44:51.955105 PCI: 00:09.0: enabled 0
716 12:44:51.958874 PCI: 00:0a.0: enabled 0
717 12:44:51.961864 PCI: 00:0d.0: enabled 1
718 12:44:51.961957 USB0 port 0: enabled 1
719 12:44:51.965115 USB3 port 0: enabled 1
720 12:44:51.968667 USB3 port 1: enabled 1
721 12:44:51.972149 USB3 port 2: enabled 0
722 12:44:51.975050 USB3 port 3: enabled 0
723 12:44:51.978448 PCI: 00:0d.1: enabled 0
724 12:44:51.978553 PCI: 00:0d.2: enabled 0
725 12:44:51.981777 GENERIC: 0.0: enabled 1
726 12:44:51.985039 PCI: 00:0d.3: enabled 0
727 12:44:51.988161 PCI: 00:0e.0: enabled 0
728 12:44:51.991974 PCI: 00:10.2: enabled 1
729 12:44:51.992058 PCI: 00:10.6: enabled 0
730 12:44:51.995243 PCI: 00:10.7: enabled 0
731 12:44:51.998470 PCI: 00:12.0: enabled 0
732 12:44:52.001566 PCI: 00:12.6: enabled 0
733 12:44:52.004871 PCI: 00:13.0: enabled 0
734 12:44:52.004986 PCI: 00:14.0: enabled 1
735 12:44:52.008110 USB0 port 0: enabled 1
736 12:44:52.011775 USB2 port 0: enabled 0
737 12:44:52.014953 USB2 port 1: enabled 1
738 12:44:52.018007 USB2 port 2: enabled 1
739 12:44:52.018120 USB2 port 3: enabled 0
740 12:44:52.021783 USB2 port 4: enabled 1
741 12:44:52.024897 USB2 port 5: enabled 0
742 12:44:52.028020 USB2 port 6: enabled 0
743 12:44:52.031639 USB2 port 7: enabled 0
744 12:44:52.035002 USB2 port 8: enabled 0
745 12:44:52.035089 USB2 port 9: enabled 0
746 12:44:52.038215 USB3 port 0: enabled 0
747 12:44:52.041791 USB3 port 1: enabled 1
748 12:44:52.045326 USB3 port 2: enabled 0
749 12:44:52.048053 USB3 port 3: enabled 0
750 12:44:52.048138 PCI: 00:14.1: enabled 0
751 12:44:52.052129 PCI: 00:14.2: enabled 1
752 12:44:52.054949 PCI: 00:14.3: enabled 1
753 12:44:52.058773 GENERIC: 0.0: enabled 1
754 12:44:52.061165 PCI: 00:15.0: enabled 1
755 12:44:52.061242 I2C: 00:1a: enabled 1
756 12:44:52.064850 I2C: 00:31: enabled 1
757 12:44:52.068193 I2C: 00:32: enabled 1
758 12:44:52.071056 PCI: 00:15.1: enabled 1
759 12:44:52.074667 I2C: 00:10: enabled 1
760 12:44:52.074754 PCI: 00:15.2: enabled 1
761 12:44:52.078118 PCI: 00:15.3: enabled 1
762 12:44:52.081707 PCI: 00:16.0: enabled 1
763 12:44:52.084965 PCI: 00:16.1: enabled 0
764 12:44:52.087933 PCI: 00:16.2: enabled 0
765 12:44:52.088018 PCI: 00:16.3: enabled 0
766 12:44:52.091104 PCI: 00:16.4: enabled 0
767 12:44:52.094978 PCI: 00:16.5: enabled 0
768 12:44:52.098376 PCI: 00:17.0: enabled 1
769 12:44:52.098462 PCI: 00:19.0: enabled 0
770 12:44:52.100931 PCI: 00:19.1: enabled 1
771 12:44:52.104419 I2C: 00:15: enabled 1
772 12:44:52.108237 PCI: 00:19.2: enabled 0
773 12:44:52.111177 PCI: 00:1d.0: enabled 1
774 12:44:52.111264 GENERIC: 0.0: enabled 1
775 12:44:52.114547 PCI: 00:1e.0: enabled 1
776 12:44:52.117687 PCI: 00:1e.1: enabled 0
777 12:44:52.121637 PCI: 00:1e.2: enabled 1
778 12:44:52.124583 SPI: 00: enabled 1
779 12:44:52.124668 PCI: 00:1e.3: enabled 1
780 12:44:52.127847 SPI: 00: enabled 1
781 12:44:52.131154 PCI: 00:1f.0: enabled 1
782 12:44:52.134326 PNP: 0c09.0: enabled 1
783 12:44:52.134439 PCI: 00:1f.1: enabled 0
784 12:44:52.137930 PCI: 00:1f.2: enabled 1
785 12:44:52.140859 GENERIC: 0.0: enabled 1
786 12:44:52.144229 GENERIC: 0.0: enabled 1
787 12:44:52.147405 GENERIC: 1.0: enabled 1
788 12:44:52.147516 PCI: 00:1f.3: enabled 1
789 12:44:52.150949 PCI: 00:1f.4: enabled 0
790 12:44:52.154890 PCI: 00:1f.5: enabled 1
791 12:44:52.157463 PCI: 00:1f.6: enabled 0
792 12:44:52.161045 PCI: 00:1f.7: enabled 0
793 12:44:52.161159 CPU_CLUSTER: 0: enabled 1
794 12:44:52.213171 APIC: 00: enabled 1
795 12:44:52.213270 APIC: 01: enabled 1
796 12:44:52.213543 APIC: 07: enabled 1
797 12:44:52.213631 APIC: 02: enabled 1
798 12:44:52.213712 APIC: 04: enabled 1
799 12:44:52.213963 APIC: 06: enabled 1
800 12:44:52.214037 APIC: 03: enabled 1
801 12:44:52.214099 APIC: 05: enabled 1
802 12:44:52.214638 Root Device scanning...
803 12:44:52.214722 scan_static_bus for Root Device
804 12:44:52.215078 DOMAIN: 0000 enabled
805 12:44:52.215176 CPU_CLUSTER: 0 enabled
806 12:44:52.215245 DOMAIN: 0000 scanning...
807 12:44:52.215513 PCI: pci_scan_bus for bus 00
808 12:44:52.215582 PCI: 00:00.0 [8086/0000] ops
809 12:44:52.215832 PCI: 00:00.0 [8086/9a12] enabled
810 12:44:52.215901 PCI: 00:02.0 [8086/0000] bus ops
811 12:44:52.216365 PCI: 00:02.0 [8086/9a40] enabled
812 12:44:52.216449 PCI: 00:04.0 [8086/0000] bus ops
813 12:44:52.263012 PCI: 00:04.0 [8086/9a03] enabled
814 12:44:52.263331 PCI: 00:05.0 [8086/9a19] enabled
815 12:44:52.263408 PCI: 00:07.0 [0000/0000] hidden
816 12:44:52.263677 PCI: 00:08.0 [8086/9a11] enabled
817 12:44:52.263749 PCI: 00:0a.0 [8086/9a0d] disabled
818 12:44:52.264073 PCI: 00:0d.0 [8086/0000] bus ops
819 12:44:52.264159 PCI: 00:0d.0 [8086/9a13] enabled
820 12:44:52.264487 PCI: 00:14.0 [8086/0000] bus ops
821 12:44:52.264573 PCI: 00:14.0 [8086/a0ed] enabled
822 12:44:52.265057 PCI: 00:14.2 [8086/a0ef] enabled
823 12:44:52.265142 PCI: 00:14.3 [8086/0000] bus ops
824 12:44:52.265399 PCI: 00:14.3 [8086/a0f0] enabled
825 12:44:52.265472 PCI: 00:15.0 [8086/0000] bus ops
826 12:44:52.265805 PCI: 00:15.0 [8086/a0e8] enabled
827 12:44:52.265890 PCI: 00:15.1 [8086/0000] bus ops
828 12:44:52.312908 PCI: 00:15.1 [8086/a0e9] enabled
829 12:44:52.313047 PCI: 00:15.2 [8086/0000] bus ops
830 12:44:52.313310 PCI: 00:15.2 [8086/a0ea] enabled
831 12:44:52.313386 PCI: 00:15.3 [8086/0000] bus ops
832 12:44:52.313463 PCI: 00:15.3 [8086/a0eb] enabled
833 12:44:52.313714 PCI: 00:16.0 [8086/0000] ops
834 12:44:52.313783 PCI: 00:16.0 [8086/a0e0] enabled
835 12:44:52.313853 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 12:44:52.314103 PCI: 00:19.0 [8086/0000] bus ops
837 12:44:52.314171 PCI: 00:19.0 [8086/a0c5] disabled
838 12:44:52.314514 PCI: 00:19.1 [8086/0000] bus ops
839 12:44:52.314601 PCI: 00:19.1 [8086/a0c6] enabled
840 12:44:52.314979 PCI: 00:1d.0 [8086/0000] bus ops
841 12:44:52.315067 PCI: 00:1d.0 [8086/a0b0] enabled
842 12:44:52.317391 PCI: 00:1e.0 [8086/0000] ops
843 12:44:52.320642 PCI: 00:1e.0 [8086/a0a8] enabled
844 12:44:52.324351 PCI: 00:1e.2 [8086/0000] bus ops
845 12:44:52.327852 PCI: 00:1e.2 [8086/a0aa] enabled
846 12:44:52.330713 PCI: 00:1e.3 [8086/0000] bus ops
847 12:44:52.334004 PCI: 00:1e.3 [8086/a0ab] enabled
848 12:44:52.337719 PCI: 00:1f.0 [8086/0000] bus ops
849 12:44:52.340303 PCI: 00:1f.0 [8086/a087] enabled
850 12:44:52.340389 RTC Init
851 12:44:52.343798 Set power on after power failure.
852 12:44:52.347373 Disabling Deep S3
853 12:44:52.347459 Disabling Deep S3
854 12:44:52.350282 Disabling Deep S4
855 12:44:52.350367 Disabling Deep S4
856 12:44:52.353681 Disabling Deep S5
857 12:44:52.353767 Disabling Deep S5
858 12:44:52.357558 PCI: 00:1f.2 [0000/0000] hidden
859 12:44:52.360161 PCI: 00:1f.3 [8086/0000] bus ops
860 12:44:52.363516 PCI: 00:1f.3 [8086/a0c8] enabled
861 12:44:52.366911 PCI: 00:1f.5 [8086/0000] bus ops
862 12:44:52.370256 PCI: 00:1f.5 [8086/a0a4] enabled
863 12:44:52.374002 PCI: Leftover static devices:
864 12:44:52.376851 PCI: 00:10.2
865 12:44:52.376936 PCI: 00:10.6
866 12:44:52.380679 PCI: 00:10.7
867 12:44:52.380764 PCI: 00:06.0
868 12:44:52.380831 PCI: 00:07.1
869 12:44:52.384084 PCI: 00:07.2
870 12:44:52.384169 PCI: 00:07.3
871 12:44:52.387365 PCI: 00:09.0
872 12:44:52.387450 PCI: 00:0d.1
873 12:44:52.390250 PCI: 00:0d.2
874 12:44:52.390343 PCI: 00:0d.3
875 12:44:52.390412 PCI: 00:0e.0
876 12:44:52.394128 PCI: 00:12.0
877 12:44:52.394226 PCI: 00:12.6
878 12:44:52.397310 PCI: 00:13.0
879 12:44:52.397394 PCI: 00:14.1
880 12:44:52.397461 PCI: 00:16.1
881 12:44:52.399947 PCI: 00:16.2
882 12:44:52.400042 PCI: 00:16.3
883 12:44:52.403046 PCI: 00:16.4
884 12:44:52.403131 PCI: 00:16.5
885 12:44:52.407477 PCI: 00:17.0
886 12:44:52.407581 PCI: 00:19.2
887 12:44:52.407663 PCI: 00:1e.1
888 12:44:52.410310 PCI: 00:1f.1
889 12:44:52.410400 PCI: 00:1f.4
890 12:44:52.412967 PCI: 00:1f.6
891 12:44:52.413065 PCI: 00:1f.7
892 12:44:52.417147 PCI: Check your devicetree.cb.
893 12:44:52.419945 PCI: 00:02.0 scanning...
894 12:44:52.423217 scan_generic_bus for PCI: 00:02.0
895 12:44:52.426311 scan_generic_bus for PCI: 00:02.0 done
896 12:44:52.430034 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 12:44:52.432781 PCI: 00:04.0 scanning...
898 12:44:52.436324 scan_generic_bus for PCI: 00:04.0
899 12:44:52.439558 GENERIC: 0.0 enabled
900 12:44:52.446345 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 12:44:52.449698 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 12:44:52.452770 PCI: 00:0d.0 scanning...
903 12:44:52.456313 scan_static_bus for PCI: 00:0d.0
904 12:44:52.459371 USB0 port 0 enabled
905 12:44:52.459475 USB0 port 0 scanning...
906 12:44:52.462863 scan_static_bus for USB0 port 0
907 12:44:52.466237 USB3 port 0 enabled
908 12:44:52.469370 USB3 port 1 enabled
909 12:44:52.469454 USB3 port 2 disabled
910 12:44:52.472603 USB3 port 3 disabled
911 12:44:52.475710 USB3 port 0 scanning...
912 12:44:52.479621 scan_static_bus for USB3 port 0
913 12:44:52.482707 scan_static_bus for USB3 port 0 done
914 12:44:52.485934 scan_bus: bus USB3 port 0 finished in 6 msecs
915 12:44:52.489300 USB3 port 1 scanning...
916 12:44:52.492494 scan_static_bus for USB3 port 1
917 12:44:52.495706 scan_static_bus for USB3 port 1 done
918 12:44:52.502313 scan_bus: bus USB3 port 1 finished in 6 msecs
919 12:44:52.505642 scan_static_bus for USB0 port 0 done
920 12:44:52.508823 scan_bus: bus USB0 port 0 finished in 43 msecs
921 12:44:52.512398 scan_static_bus for PCI: 00:0d.0 done
922 12:44:52.519127 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 12:44:52.519214 PCI: 00:14.0 scanning...
924 12:44:52.522952 scan_static_bus for PCI: 00:14.0
925 12:44:52.525821 USB0 port 0 enabled
926 12:44:52.529668 USB0 port 0 scanning...
927 12:44:52.532933 scan_static_bus for USB0 port 0
928 12:44:52.535590 USB2 port 0 disabled
929 12:44:52.535677 USB2 port 1 enabled
930 12:44:52.539197 USB2 port 2 enabled
931 12:44:52.539282 USB2 port 3 disabled
932 12:44:52.542262 USB2 port 4 enabled
933 12:44:52.545909 USB2 port 5 disabled
934 12:44:52.545995 USB2 port 6 disabled
935 12:44:52.548910 USB2 port 7 disabled
936 12:44:52.552771 USB2 port 8 disabled
937 12:44:52.552857 USB2 port 9 disabled
938 12:44:52.555556 USB3 port 0 disabled
939 12:44:52.558862 USB3 port 1 enabled
940 12:44:52.558948 USB3 port 2 disabled
941 12:44:52.562393 USB3 port 3 disabled
942 12:44:52.565498 USB2 port 1 scanning...
943 12:44:52.568940 scan_static_bus for USB2 port 1
944 12:44:52.572180 scan_static_bus for USB2 port 1 done
945 12:44:52.575511 scan_bus: bus USB2 port 1 finished in 6 msecs
946 12:44:52.578663 USB2 port 2 scanning...
947 12:44:52.582174 scan_static_bus for USB2 port 2
948 12:44:52.585179 scan_static_bus for USB2 port 2 done
949 12:44:52.588528 scan_bus: bus USB2 port 2 finished in 6 msecs
950 12:44:52.591783 USB2 port 4 scanning...
951 12:44:52.595699 scan_static_bus for USB2 port 4
952 12:44:52.598732 scan_static_bus for USB2 port 4 done
953 12:44:52.604920 scan_bus: bus USB2 port 4 finished in 6 msecs
954 12:44:52.605045 USB3 port 1 scanning...
955 12:44:52.608934 scan_static_bus for USB3 port 1
956 12:44:52.616374 scan_static_bus for USB3 port 1 done
957 12:44:52.618934 scan_bus: bus USB3 port 1 finished in 6 msecs
958 12:44:52.622446 scan_static_bus for USB0 port 0 done
959 12:44:52.625247 scan_bus: bus USB0 port 0 finished in 93 msecs
960 12:44:52.632287 scan_static_bus for PCI: 00:14.0 done
961 12:44:52.635484 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
962 12:44:52.638818 PCI: 00:14.3 scanning...
963 12:44:52.642037 scan_static_bus for PCI: 00:14.3
964 12:44:52.645428 GENERIC: 0.0 enabled
965 12:44:52.648478 scan_static_bus for PCI: 00:14.3 done
966 12:44:52.652574 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 12:44:52.655125 PCI: 00:15.0 scanning...
968 12:44:52.658933 scan_static_bus for PCI: 00:15.0
969 12:44:52.661944 I2C: 00:1a enabled
970 12:44:52.662031 I2C: 00:31 enabled
971 12:44:52.664918 I2C: 00:32 enabled
972 12:44:52.668501 scan_static_bus for PCI: 00:15.0 done
973 12:44:52.671696 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
974 12:44:52.675005 PCI: 00:15.1 scanning...
975 12:44:52.678468 scan_static_bus for PCI: 00:15.1
976 12:44:52.681719 I2C: 00:10 enabled
977 12:44:52.684778 scan_static_bus for PCI: 00:15.1 done
978 12:44:52.688254 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 12:44:52.691762 PCI: 00:15.2 scanning...
980 12:44:52.694848 scan_static_bus for PCI: 00:15.2
981 12:44:52.697952 scan_static_bus for PCI: 00:15.2 done
982 12:44:52.705041 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 12:44:52.708094 PCI: 00:15.3 scanning...
984 12:44:52.711840 scan_static_bus for PCI: 00:15.3
985 12:44:52.714425 scan_static_bus for PCI: 00:15.3 done
986 12:44:52.717657 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 12:44:52.721198 PCI: 00:19.1 scanning...
988 12:44:52.725249 scan_static_bus for PCI: 00:19.1
989 12:44:52.727651 I2C: 00:15 enabled
990 12:44:52.731389 scan_static_bus for PCI: 00:19.1 done
991 12:44:52.734366 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 12:44:52.737927 PCI: 00:1d.0 scanning...
993 12:44:52.741001 do_pci_scan_bridge for PCI: 00:1d.0
994 12:44:52.744995 PCI: pci_scan_bus for bus 01
995 12:44:52.747471 PCI: 01:00.0 [15b7/5009] enabled
996 12:44:52.751212 GENERIC: 0.0 enabled
997 12:44:52.754506 Enabling Common Clock Configuration
998 12:44:52.757686 L1 Sub-State supported from root port 29
999 12:44:52.761407 L1 Sub-State Support = 0x5
1000 12:44:52.764009 CommonModeRestoreTime = 0x28
1001 12:44:52.767299 Power On Value = 0x16, Power On Scale = 0x0
1002 12:44:52.771016 ASPM: Enabled L1
1003 12:44:52.774069 PCIe: Max_Payload_Size adjusted to 128
1004 12:44:52.777324 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 12:44:52.780384 PCI: 00:1e.2 scanning...
1006 12:44:52.783730 scan_generic_bus for PCI: 00:1e.2
1007 12:44:52.787431 SPI: 00 enabled
1008 12:44:52.793605 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 12:44:52.796785 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 12:44:52.800430 PCI: 00:1e.3 scanning...
1011 12:44:52.803532 scan_generic_bus for PCI: 00:1e.3
1012 12:44:52.803656 SPI: 00 enabled
1013 12:44:52.811154 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 12:44:52.817675 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 12:44:52.817767 PCI: 00:1f.0 scanning...
1016 12:44:52.820725 scan_static_bus for PCI: 00:1f.0
1017 12:44:52.824406 PNP: 0c09.0 enabled
1018 12:44:52.827893 PNP: 0c09.0 scanning...
1019 12:44:52.830676 scan_static_bus for PNP: 0c09.0
1020 12:44:52.834464 scan_static_bus for PNP: 0c09.0 done
1021 12:44:52.837204 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 12:44:52.840489 scan_static_bus for PCI: 00:1f.0 done
1023 12:44:52.847479 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 12:44:52.850778 PCI: 00:1f.2 scanning...
1025 12:44:52.853786 scan_static_bus for PCI: 00:1f.2
1026 12:44:52.853873 GENERIC: 0.0 enabled
1027 12:44:52.857585 GENERIC: 0.0 scanning...
1028 12:44:52.860919 scan_static_bus for GENERIC: 0.0
1029 12:44:52.864027 GENERIC: 0.0 enabled
1030 12:44:52.867137 GENERIC: 1.0 enabled
1031 12:44:52.870494 scan_static_bus for GENERIC: 0.0 done
1032 12:44:52.873560 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 12:44:52.876875 scan_static_bus for PCI: 00:1f.2 done
1034 12:44:52.883678 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 12:44:52.883769 PCI: 00:1f.3 scanning...
1036 12:44:52.887286 scan_static_bus for PCI: 00:1f.3
1037 12:44:52.893730 scan_static_bus for PCI: 00:1f.3 done
1038 12:44:52.897315 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 12:44:52.900404 PCI: 00:1f.5 scanning...
1040 12:44:52.903551 scan_generic_bus for PCI: 00:1f.5
1041 12:44:52.906970 scan_generic_bus for PCI: 00:1f.5 done
1042 12:44:52.913452 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 12:44:52.918515 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1044 12:44:52.920714 scan_static_bus for Root Device done
1045 12:44:52.927510 scan_bus: bus Root Device finished in 736 msecs
1046 12:44:52.927613 done
1047 12:44:52.933230 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1048 12:44:52.936727 Chrome EC: UHEPI supported
1049 12:44:52.943322 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 12:44:52.949942 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 12:44:52.953309 SPI flash protection: WPSW=0 SRP0=1
1052 12:44:52.957235 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 12:44:52.963619 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1054 12:44:52.966332 found VGA at PCI: 00:02.0
1055 12:44:52.970885 Setting up VGA for PCI: 00:02.0
1056 12:44:52.973246 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 12:44:52.980005 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 12:44:52.982861 Allocating resources...
1059 12:44:52.982948 Reading resources...
1060 12:44:52.989493 Root Device read_resources bus 0 link: 0
1061 12:44:52.992896 DOMAIN: 0000 read_resources bus 0 link: 0
1062 12:44:52.996873 PCI: 00:04.0 read_resources bus 1 link: 0
1063 12:44:53.003038 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 12:44:53.006346 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 12:44:53.012449 USB0 port 0 read_resources bus 0 link: 0
1066 12:44:53.016114 USB0 port 0 read_resources bus 0 link: 0 done
1067 12:44:53.022322 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 12:44:53.025544 PCI: 00:14.0 read_resources bus 0 link: 0
1069 12:44:53.032187 USB0 port 0 read_resources bus 0 link: 0
1070 12:44:53.035783 USB0 port 0 read_resources bus 0 link: 0 done
1071 12:44:53.042099 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 12:44:53.045419 PCI: 00:14.3 read_resources bus 0 link: 0
1073 12:44:53.051883 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 12:44:53.055203 PCI: 00:15.0 read_resources bus 0 link: 0
1075 12:44:53.062048 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 12:44:53.065623 PCI: 00:15.1 read_resources bus 0 link: 0
1077 12:44:53.072265 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 12:44:53.075061 PCI: 00:19.1 read_resources bus 0 link: 0
1079 12:44:53.082298 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 12:44:53.085445 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 12:44:53.092233 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 12:44:53.095840 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 12:44:53.102614 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 12:44:53.105503 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 12:44:53.112219 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 12:44:53.115589 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 12:44:53.121910 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 12:44:53.125509 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 12:44:53.128470 GENERIC: 0.0 read_resources bus 0 link: 0
1090 12:44:53.135750 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 12:44:53.139085 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 12:44:53.146057 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 12:44:53.150247 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 12:44:53.156262 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 12:44:53.159889 Root Device read_resources bus 0 link: 0 done
1096 12:44:53.162924 Done reading resources.
1097 12:44:53.169183 Show resources in subtree (Root Device)...After reading.
1098 12:44:53.172925 Root Device child on link 0 DOMAIN: 0000
1099 12:44:53.176585 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 12:44:53.185955 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 12:44:53.195998 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 12:44:53.199314 PCI: 00:00.0
1103 12:44:53.209685 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 12:44:53.215954 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 12:44:53.225689 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 12:44:53.235667 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 12:44:53.245690 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 12:44:53.255802 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 12:44:53.265706 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 12:44:53.271931 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 12:44:53.282070 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 12:44:53.291878 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 12:44:53.302574 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 12:44:53.312209 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 12:44:53.318747 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 12:44:53.328833 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 12:44:53.338374 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 12:44:53.348182 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 12:44:53.358620 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 12:44:53.368431 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 12:44:53.378196 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 12:44:53.384976 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 12:44:53.388077 PCI: 00:02.0
1124 12:44:53.398206 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 12:44:53.407883 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 12:44:53.417945 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 12:44:53.421134 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 12:44:53.431182 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 12:44:53.434601 GENERIC: 0.0
1130 12:44:53.434690 PCI: 00:05.0
1131 12:44:53.444124 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 12:44:53.451226 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 12:44:53.451314 GENERIC: 0.0
1134 12:44:53.454627 PCI: 00:08.0
1135 12:44:53.464479 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 12:44:53.464565 PCI: 00:0a.0
1137 12:44:53.470398 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 12:44:53.480592 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 12:44:53.483479 USB0 port 0 child on link 0 USB3 port 0
1140 12:44:53.487021 USB3 port 0
1141 12:44:53.487108 USB3 port 1
1142 12:44:53.490586 USB3 port 2
1143 12:44:53.490688 USB3 port 3
1144 12:44:53.493740 PCI: 00:14.0 child on link 0 USB0 port 0
1145 12:44:53.503702 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 12:44:53.510238 USB0 port 0 child on link 0 USB2 port 0
1147 12:44:53.510326 USB2 port 0
1148 12:44:53.514317 USB2 port 1
1149 12:44:53.514403 USB2 port 2
1150 12:44:53.516467 USB2 port 3
1151 12:44:53.516553 USB2 port 4
1152 12:44:53.519895 USB2 port 5
1153 12:44:53.523339 USB2 port 6
1154 12:44:53.523438 USB2 port 7
1155 12:44:53.526380 USB2 port 8
1156 12:44:53.526465 USB2 port 9
1157 12:44:53.530407 USB3 port 0
1158 12:44:53.530492 USB3 port 1
1159 12:44:53.533651 USB3 port 2
1160 12:44:53.533737 USB3 port 3
1161 12:44:53.536654 PCI: 00:14.2
1162 12:44:53.546474 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 12:44:53.556333 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 12:44:53.559541 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 12:44:53.569405 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 12:44:53.573194 GENERIC: 0.0
1167 12:44:53.576526 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 12:44:53.586639 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:44:53.589545 I2C: 00:1a
1170 12:44:53.589631 I2C: 00:31
1171 12:44:53.589698 I2C: 00:32
1172 12:44:53.595911 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 12:44:53.606066 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 12:44:53.606156 I2C: 00:10
1175 12:44:53.609456 PCI: 00:15.2
1176 12:44:53.619315 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 12:44:53.619404 PCI: 00:15.3
1178 12:44:53.629099 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 12:44:53.632373 PCI: 00:16.0
1180 12:44:53.642288 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:44:53.642416 PCI: 00:19.0
1182 12:44:53.649065 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 12:44:53.658682 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 12:44:53.658812 I2C: 00:15
1185 12:44:53.662224 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 12:44:53.671993 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 12:44:53.682068 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 12:44:53.691719 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 12:44:53.691856 GENERIC: 0.0
1190 12:44:53.695074 PCI: 01:00.0
1191 12:44:53.705483 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 12:44:53.715352 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1193 12:44:53.715439 PCI: 00:1e.0
1194 12:44:53.728677 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1195 12:44:53.731566 PCI: 00:1e.2 child on link 0 SPI: 00
1196 12:44:53.742084 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:44:53.742218 SPI: 00
1198 12:44:53.748388 PCI: 00:1e.3 child on link 0 SPI: 00
1199 12:44:53.757928 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 12:44:53.758060 SPI: 00
1201 12:44:53.760974 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1202 12:44:53.771468 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1203 12:44:53.771556 PNP: 0c09.0
1204 12:44:53.780950 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1205 12:44:53.784223 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1206 12:44:53.794551 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1207 12:44:53.804739 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1208 12:44:53.807723 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1209 12:44:53.810856 GENERIC: 0.0
1210 12:44:53.814183 GENERIC: 1.0
1211 12:44:53.814270 PCI: 00:1f.3
1212 12:44:53.824457 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1213 12:44:53.834169 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1214 12:44:53.837623 PCI: 00:1f.5
1215 12:44:53.844269 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1216 12:44:53.850675 CPU_CLUSTER: 0 child on link 0 APIC: 00
1217 12:44:53.850764 APIC: 00
1218 12:44:53.850850 APIC: 01
1219 12:44:53.854189 APIC: 07
1220 12:44:53.854277 APIC: 02
1221 12:44:53.857083 APIC: 04
1222 12:44:53.857170 APIC: 06
1223 12:44:53.857257 APIC: 03
1224 12:44:53.860651 APIC: 05
1225 12:44:53.867005 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1226 12:44:53.874109 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1227 12:44:53.880199 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1228 12:44:53.886623 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1229 12:44:53.890873 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1230 12:44:53.893193 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1231 12:44:53.900450 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 12:44:53.906777 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1233 12:44:53.916485 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1234 12:44:53.923238 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1235 12:44:53.929756 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1236 12:44:53.936149 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1237 12:44:53.942984 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1238 12:44:53.953125 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1239 12:44:53.956092 DOMAIN: 0000: Resource ranges:
1240 12:44:53.959794 * Base: 1000, Size: 800, Tag: 100
1241 12:44:53.963014 * Base: 1900, Size: e700, Tag: 100
1242 12:44:53.969453 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1243 12:44:53.976023 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1244 12:44:53.982642 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1245 12:44:53.989626 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1246 12:44:53.995917 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1247 12:44:54.006054 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1248 12:44:54.012523 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1249 12:44:54.019119 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1250 12:44:54.028872 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1251 12:44:54.035179 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1252 12:44:54.041949 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1253 12:44:54.051909 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1254 12:44:54.058841 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1255 12:44:54.065151 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1256 12:44:54.075207 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1257 12:44:54.081622 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1258 12:44:54.088410 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1259 12:44:54.098471 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1260 12:44:54.104889 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1261 12:44:54.111355 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1262 12:44:54.121205 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1263 12:44:54.127909 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1264 12:44:54.134606 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1265 12:44:54.144264 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1266 12:44:54.150832 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1267 12:44:54.154229 DOMAIN: 0000: Resource ranges:
1268 12:44:54.157547 * Base: 7fc00000, Size: 40400000, Tag: 200
1269 12:44:54.164579 * Base: d0000000, Size: 28000000, Tag: 200
1270 12:44:54.167415 * Base: fa000000, Size: 1000000, Tag: 200
1271 12:44:54.171146 * Base: fb001000, Size: 2fff000, Tag: 200
1272 12:44:54.174062 * Base: fe010000, Size: 2e000, Tag: 200
1273 12:44:54.180824 * Base: fe03f000, Size: d41000, Tag: 200
1274 12:44:54.183983 * Base: fed88000, Size: 8000, Tag: 200
1275 12:44:54.187642 * Base: fed93000, Size: d000, Tag: 200
1276 12:44:54.191005 * Base: feda2000, Size: 1e000, Tag: 200
1277 12:44:54.197249 * Base: fede0000, Size: 1220000, Tag: 200
1278 12:44:54.200676 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1279 12:44:54.207322 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1280 12:44:54.214112 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1281 12:44:54.221153 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1282 12:44:54.226987 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1283 12:44:54.233604 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1284 12:44:54.240697 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1285 12:44:54.247003 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1286 12:44:54.253733 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1287 12:44:54.260506 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1288 12:44:54.267168 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1289 12:44:54.273971 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1290 12:44:54.280386 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1291 12:44:54.286742 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1292 12:44:54.293791 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1293 12:44:54.299554 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1294 12:44:54.306362 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1295 12:44:54.312882 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1296 12:44:54.319749 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1297 12:44:54.326520 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1298 12:44:54.332867 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1299 12:44:54.339543 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1300 12:44:54.345918 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1301 12:44:54.355809 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1302 12:44:54.362731 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1303 12:44:54.366092 PCI: 00:1d.0: Resource ranges:
1304 12:44:54.369039 * Base: 7fc00000, Size: 100000, Tag: 200
1305 12:44:54.375671 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1306 12:44:54.382339 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1307 12:44:54.392333 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1308 12:44:54.398707 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1309 12:44:54.402227 Root Device assign_resources, bus 0 link: 0
1310 12:44:54.408667 DOMAIN: 0000 assign_resources, bus 0 link: 0
1311 12:44:54.415525 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1312 12:44:54.425389 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1313 12:44:54.432614 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1314 12:44:54.442143 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1315 12:44:54.445309 PCI: 00:04.0 assign_resources, bus 1 link: 0
1316 12:44:54.448387 PCI: 00:04.0 assign_resources, bus 1 link: 0
1317 12:44:54.458664 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1318 12:44:54.464642 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1319 12:44:54.475108 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1320 12:44:54.478729 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1321 12:44:54.484844 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1322 12:44:54.491975 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1323 12:44:54.497702 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 12:44:54.501597 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 12:44:54.507745 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1326 12:44:54.518075 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1327 12:44:54.524594 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1328 12:44:54.530905 PCI: 00:14.3 assign_resources, bus 0 link: 0
1329 12:44:54.534169 PCI: 00:14.3 assign_resources, bus 0 link: 0
1330 12:44:54.544476 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1331 12:44:54.547457 PCI: 00:15.0 assign_resources, bus 0 link: 0
1332 12:44:54.550890 PCI: 00:15.0 assign_resources, bus 0 link: 0
1333 12:44:54.560511 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1334 12:44:54.564118 PCI: 00:15.1 assign_resources, bus 0 link: 0
1335 12:44:54.571118 PCI: 00:15.1 assign_resources, bus 0 link: 0
1336 12:44:54.577265 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1337 12:44:54.586993 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1338 12:44:54.593567 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1339 12:44:54.603519 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1340 12:44:54.606711 PCI: 00:19.1 assign_resources, bus 0 link: 0
1341 12:44:54.613407 PCI: 00:19.1 assign_resources, bus 0 link: 0
1342 12:44:54.620607 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1343 12:44:54.629921 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1344 12:44:54.640018 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1345 12:44:54.643383 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1346 12:44:54.653180 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1347 12:44:54.660312 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1348 12:44:54.663065 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 12:44:54.673262 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1350 12:44:54.676879 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1351 12:44:54.683411 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1352 12:44:54.689679 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1353 12:44:54.696397 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1354 12:44:54.699373 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1355 12:44:54.702726 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1356 12:44:54.709717 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1357 12:44:54.712844 LPC: Trying to open IO window from 800 size 1ff
1358 12:44:54.722840 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1359 12:44:54.729630 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1360 12:44:54.739569 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1361 12:44:54.742724 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 12:44:54.749826 Root Device assign_resources, bus 0 link: 0
1363 12:44:54.749913 Done setting resources.
1364 12:44:54.755824 Show resources in subtree (Root Device)...After assigning values.
1365 12:44:54.762640 Root Device child on link 0 DOMAIN: 0000
1366 12:44:54.766046 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1367 12:44:54.776014 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1368 12:44:54.785630 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1369 12:44:54.785720 PCI: 00:00.0
1370 12:44:54.795602 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1371 12:44:54.805357 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1372 12:44:54.815153 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1373 12:44:54.825084 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1374 12:44:54.834696 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1375 12:44:54.841508 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1376 12:44:54.851686 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1377 12:44:54.861550 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1378 12:44:54.871654 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1379 12:44:54.881062 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1380 12:44:54.888395 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1381 12:44:54.897786 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1382 12:44:54.907785 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1383 12:44:54.917482 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1384 12:44:54.927587 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1385 12:44:54.938108 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1386 12:44:54.948219 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1387 12:44:54.953807 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1388 12:44:54.964205 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1389 12:44:54.974058 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1390 12:44:54.977190 PCI: 00:02.0
1391 12:44:54.987647 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1392 12:44:54.997439 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1393 12:44:55.007148 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1394 12:44:55.010251 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1395 12:44:55.019952 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1396 12:44:55.023531 GENERIC: 0.0
1397 12:44:55.023642 PCI: 00:05.0
1398 12:44:55.037154 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1399 12:44:55.039892 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1400 12:44:55.043451 GENERIC: 0.0
1401 12:44:55.043560 PCI: 00:08.0
1402 12:44:55.053238 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1403 12:44:55.056532 PCI: 00:0a.0
1404 12:44:55.059851 PCI: 00:0d.0 child on link 0 USB0 port 0
1405 12:44:55.069619 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1406 12:44:55.076393 USB0 port 0 child on link 0 USB3 port 0
1407 12:44:55.076585 USB3 port 0
1408 12:44:55.079679 USB3 port 1
1409 12:44:55.079782 USB3 port 2
1410 12:44:55.082895 USB3 port 3
1411 12:44:55.086158 PCI: 00:14.0 child on link 0 USB0 port 0
1412 12:44:55.096241 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1413 12:44:55.099440 USB0 port 0 child on link 0 USB2 port 0
1414 12:44:55.102578 USB2 port 0
1415 12:44:55.105977 USB2 port 1
1416 12:44:55.106076 USB2 port 2
1417 12:44:55.109220 USB2 port 3
1418 12:44:55.109320 USB2 port 4
1419 12:44:55.112845 USB2 port 5
1420 12:44:55.112940 USB2 port 6
1421 12:44:55.116130 USB2 port 7
1422 12:44:55.116214 USB2 port 8
1423 12:44:55.119174 USB2 port 9
1424 12:44:55.119272 USB3 port 0
1425 12:44:55.122684 USB3 port 1
1426 12:44:55.122780 USB3 port 2
1427 12:44:55.126136 USB3 port 3
1428 12:44:55.126232 PCI: 00:14.2
1429 12:44:55.139853 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1430 12:44:55.148995 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1431 12:44:55.152222 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1432 12:44:55.162696 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1433 12:44:55.165774 GENERIC: 0.0
1434 12:44:55.168828 PCI: 00:15.0 child on link 0 I2C: 00:1a
1435 12:44:55.178582 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1436 12:44:55.181918 I2C: 00:1a
1437 12:44:55.182048 I2C: 00:31
1438 12:44:55.185235 I2C: 00:32
1439 12:44:55.188881 PCI: 00:15.1 child on link 0 I2C: 00:10
1440 12:44:55.198870 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1441 12:44:55.198976 I2C: 00:10
1442 12:44:55.201683 PCI: 00:15.2
1443 12:44:55.212038 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1444 12:44:55.215430 PCI: 00:15.3
1445 12:44:55.224925 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1446 12:44:55.225054 PCI: 00:16.0
1447 12:44:55.235167 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1448 12:44:55.238335 PCI: 00:19.0
1449 12:44:55.241615 PCI: 00:19.1 child on link 0 I2C: 00:15
1450 12:44:55.251550 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1451 12:44:55.254799 I2C: 00:15
1452 12:44:55.258070 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1453 12:44:55.268015 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1454 12:44:55.278003 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1455 12:44:55.291564 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1456 12:44:55.291671 GENERIC: 0.0
1457 12:44:55.294834 PCI: 01:00.0
1458 12:44:55.304817 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1459 12:44:55.314888 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1460 12:44:55.314976 PCI: 00:1e.0
1461 12:44:55.327980 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1462 12:44:55.331046 PCI: 00:1e.2 child on link 0 SPI: 00
1463 12:44:55.341011 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1464 12:44:55.341137 SPI: 00
1465 12:44:55.347921 PCI: 00:1e.3 child on link 0 SPI: 00
1466 12:44:55.358048 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1467 12:44:55.358175 SPI: 00
1468 12:44:55.364243 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1469 12:44:55.371493 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1470 12:44:55.374491 PNP: 0c09.0
1471 12:44:55.380955 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1472 12:44:55.387659 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1473 12:44:55.394606 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1474 12:44:55.404007 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1475 12:44:55.410749 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1476 12:44:55.410956 GENERIC: 0.0
1477 12:44:55.414414 GENERIC: 1.0
1478 12:44:55.414638 PCI: 00:1f.3
1479 12:44:55.424038 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1480 12:44:55.437615 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1481 12:44:55.438149 PCI: 00:1f.5
1482 12:44:55.447007 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1483 12:44:55.450633 CPU_CLUSTER: 0 child on link 0 APIC: 00
1484 12:44:55.454484 APIC: 00
1485 12:44:55.454797 APIC: 01
1486 12:44:55.456917 APIC: 07
1487 12:44:55.457266 APIC: 02
1488 12:44:55.457513 APIC: 04
1489 12:44:55.460221 APIC: 06
1490 12:44:55.460531 APIC: 03
1491 12:44:55.463963 APIC: 05
1492 12:44:55.464277 Done allocating resources.
1493 12:44:55.470294 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1494 12:44:55.476683 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1495 12:44:55.479808 Configure GPIOs for I2S audio on UP4.
1496 12:44:55.487258 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1497 12:44:55.490284 Enabling resources...
1498 12:44:55.493802 PCI: 00:00.0 subsystem <- 8086/9a12
1499 12:44:55.496867 PCI: 00:00.0 cmd <- 06
1500 12:44:55.500084 PCI: 00:02.0 subsystem <- 8086/9a40
1501 12:44:55.503257 PCI: 00:02.0 cmd <- 03
1502 12:44:55.507078 PCI: 00:04.0 subsystem <- 8086/9a03
1503 12:44:55.509987 PCI: 00:04.0 cmd <- 02
1504 12:44:55.513545 PCI: 00:05.0 subsystem <- 8086/9a19
1505 12:44:55.513635 PCI: 00:05.0 cmd <- 02
1506 12:44:55.520361 PCI: 00:08.0 subsystem <- 8086/9a11
1507 12:44:55.520454 PCI: 00:08.0 cmd <- 06
1508 12:44:55.523577 PCI: 00:0d.0 subsystem <- 8086/9a13
1509 12:44:55.526965 PCI: 00:0d.0 cmd <- 02
1510 12:44:55.530043 PCI: 00:14.0 subsystem <- 8086/a0ed
1511 12:44:55.532920 PCI: 00:14.0 cmd <- 02
1512 12:44:55.536903 PCI: 00:14.2 subsystem <- 8086/a0ef
1513 12:44:55.539602 PCI: 00:14.2 cmd <- 02
1514 12:44:55.543225 PCI: 00:14.3 subsystem <- 8086/a0f0
1515 12:44:55.546470 PCI: 00:14.3 cmd <- 02
1516 12:44:55.549618 PCI: 00:15.0 subsystem <- 8086/a0e8
1517 12:44:55.552787 PCI: 00:15.0 cmd <- 02
1518 12:44:55.556030 PCI: 00:15.1 subsystem <- 8086/a0e9
1519 12:44:55.559230 PCI: 00:15.1 cmd <- 02
1520 12:44:55.563062 PCI: 00:15.2 subsystem <- 8086/a0ea
1521 12:44:55.566226 PCI: 00:15.2 cmd <- 02
1522 12:44:55.569837 PCI: 00:15.3 subsystem <- 8086/a0eb
1523 12:44:55.569927 PCI: 00:15.3 cmd <- 02
1524 12:44:55.575998 PCI: 00:16.0 subsystem <- 8086/a0e0
1525 12:44:55.576095 PCI: 00:16.0 cmd <- 02
1526 12:44:55.579411 PCI: 00:19.1 subsystem <- 8086/a0c6
1527 12:44:55.582442 PCI: 00:19.1 cmd <- 02
1528 12:44:55.585596 PCI: 00:1d.0 bridge ctrl <- 0013
1529 12:44:55.589100 PCI: 00:1d.0 subsystem <- 8086/a0b0
1530 12:44:55.592670 PCI: 00:1d.0 cmd <- 06
1531 12:44:55.595617 PCI: 00:1e.0 subsystem <- 8086/a0a8
1532 12:44:55.599297 PCI: 00:1e.0 cmd <- 06
1533 12:44:55.602317 PCI: 00:1e.2 subsystem <- 8086/a0aa
1534 12:44:55.605466 PCI: 00:1e.2 cmd <- 06
1535 12:44:55.608734 PCI: 00:1e.3 subsystem <- 8086/a0ab
1536 12:44:55.612497 PCI: 00:1e.3 cmd <- 02
1537 12:44:55.615157 PCI: 00:1f.0 subsystem <- 8086/a087
1538 12:44:55.618862 PCI: 00:1f.0 cmd <- 407
1539 12:44:55.621871 PCI: 00:1f.3 subsystem <- 8086/a0c8
1540 12:44:55.625219 PCI: 00:1f.3 cmd <- 02
1541 12:44:55.628346 PCI: 00:1f.5 subsystem <- 8086/a0a4
1542 12:44:55.628435 PCI: 00:1f.5 cmd <- 406
1543 12:44:55.634173 PCI: 01:00.0 cmd <- 02
1544 12:44:55.638918 done.
1545 12:44:55.642082 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1546 12:44:55.645292 Initializing devices...
1547 12:44:55.648894 Root Device init
1548 12:44:55.651777 Chrome EC: Set SMI mask to 0x0000000000000000
1549 12:44:55.658776 Chrome EC: clear events_b mask to 0x0000000000000000
1550 12:44:55.665159 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1551 12:44:55.671915 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1552 12:44:55.678119 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1553 12:44:55.681338 Chrome EC: Set WAKE mask to 0x0000000000000000
1554 12:44:55.689979 fw_config match found: DB_USB=USB3_ACTIVE
1555 12:44:55.693401 Configure Right Type-C port orientation for retimer
1556 12:44:55.696599 Root Device init finished in 46 msecs
1557 12:44:55.700878 PCI: 00:00.0 init
1558 12:44:55.704124 CPU TDP = 9 Watts
1559 12:44:55.704285 CPU PL1 = 9 Watts
1560 12:44:55.707282 CPU PL2 = 40 Watts
1561 12:44:55.710554 CPU PL4 = 83 Watts
1562 12:44:55.713619 PCI: 00:00.0 init finished in 8 msecs
1563 12:44:55.713795 PCI: 00:02.0 init
1564 12:44:55.717676 GMA: Found VBT in CBFS
1565 12:44:55.720410 GMA: Found valid VBT in CBFS
1566 12:44:55.727903 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1567 12:44:55.733953 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1568 12:44:55.737293 PCI: 00:02.0 init finished in 18 msecs
1569 12:44:55.741018 PCI: 00:05.0 init
1570 12:44:55.743671 PCI: 00:05.0 init finished in 0 msecs
1571 12:44:55.747607 PCI: 00:08.0 init
1572 12:44:55.750318 PCI: 00:08.0 init finished in 0 msecs
1573 12:44:55.753880 PCI: 00:14.0 init
1574 12:44:55.757074 PCI: 00:14.0 init finished in 0 msecs
1575 12:44:55.759942 PCI: 00:14.2 init
1576 12:44:55.763899 PCI: 00:14.2 init finished in 0 msecs
1577 12:44:55.767032 PCI: 00:15.0 init
1578 12:44:55.770786 I2C bus 0 version 0x3230302a
1579 12:44:55.774018 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1580 12:44:55.776651 PCI: 00:15.0 init finished in 6 msecs
1581 12:44:55.779858 PCI: 00:15.1 init
1582 12:44:55.780358 I2C bus 1 version 0x3230302a
1583 12:44:55.786466 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1584 12:44:55.789770 PCI: 00:15.1 init finished in 6 msecs
1585 12:44:55.790217 PCI: 00:15.2 init
1586 12:44:55.793053 I2C bus 2 version 0x3230302a
1587 12:44:55.796541 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1588 12:44:55.803303 PCI: 00:15.2 init finished in 6 msecs
1589 12:44:55.803841 PCI: 00:15.3 init
1590 12:44:55.806925 I2C bus 3 version 0x3230302a
1591 12:44:55.809432 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1592 12:44:55.813307 PCI: 00:15.3 init finished in 6 msecs
1593 12:44:55.816498 PCI: 00:16.0 init
1594 12:44:55.819361 PCI: 00:16.0 init finished in 0 msecs
1595 12:44:55.822802 PCI: 00:19.1 init
1596 12:44:55.826313 I2C bus 5 version 0x3230302a
1597 12:44:55.829831 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1598 12:44:55.832682 PCI: 00:19.1 init finished in 6 msecs
1599 12:44:55.836226 PCI: 00:1d.0 init
1600 12:44:55.839006 Initializing PCH PCIe bridge.
1601 12:44:55.842668 PCI: 00:1d.0 init finished in 3 msecs
1602 12:44:55.845909 PCI: 00:1f.0 init
1603 12:44:55.849974 IOAPIC: Initializing IOAPIC at 0xfec00000
1604 12:44:55.852870 IOAPIC: Bootstrap Processor Local APIC = 0x00
1605 12:44:55.856268 IOAPIC: ID = 0x02
1606 12:44:55.859270 IOAPIC: Dumping registers
1607 12:44:55.862237 reg 0x0000: 0x02000000
1608 12:44:55.862683 reg 0x0001: 0x00770020
1609 12:44:55.865895 reg 0x0002: 0x00000000
1610 12:44:55.869457 PCI: 00:1f.0 init finished in 21 msecs
1611 12:44:55.872772 PCI: 00:1f.2 init
1612 12:44:55.875650 Disabling ACPI via APMC.
1613 12:44:55.878990 APMC done.
1614 12:44:55.882571 PCI: 00:1f.2 init finished in 5 msecs
1615 12:44:55.893112 PCI: 01:00.0 init
1616 12:44:55.896512 PCI: 01:00.0 init finished in 0 msecs
1617 12:44:55.899574 PNP: 0c09.0 init
1618 12:44:55.902963 Google Chrome EC uptime: 8.255 seconds
1619 12:44:55.909654 Google Chrome AP resets since EC boot: 1
1620 12:44:55.912889 Google Chrome most recent AP reset causes:
1621 12:44:55.916472 0.451: 32775 shutdown: entering G3
1622 12:44:55.923196 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1623 12:44:55.926427 PNP: 0c09.0 init finished in 22 msecs
1624 12:44:55.932021 Devices initialized
1625 12:44:55.935134 Show all devs... After init.
1626 12:44:55.938507 Root Device: enabled 1
1627 12:44:55.938944 DOMAIN: 0000: enabled 1
1628 12:44:55.942201 CPU_CLUSTER: 0: enabled 1
1629 12:44:55.945308 PCI: 00:00.0: enabled 1
1630 12:44:55.949361 PCI: 00:02.0: enabled 1
1631 12:44:55.949901 PCI: 00:04.0: enabled 1
1632 12:44:55.951668 PCI: 00:05.0: enabled 1
1633 12:44:55.955021 PCI: 00:06.0: enabled 0
1634 12:44:55.958268 PCI: 00:07.0: enabled 0
1635 12:44:55.958708 PCI: 00:07.1: enabled 0
1636 12:44:55.961803 PCI: 00:07.2: enabled 0
1637 12:44:55.965187 PCI: 00:07.3: enabled 0
1638 12:44:55.968348 PCI: 00:08.0: enabled 1
1639 12:44:55.968790 PCI: 00:09.0: enabled 0
1640 12:44:55.972098 PCI: 00:0a.0: enabled 0
1641 12:44:55.975138 PCI: 00:0d.0: enabled 1
1642 12:44:55.978244 PCI: 00:0d.1: enabled 0
1643 12:44:55.978688 PCI: 00:0d.2: enabled 0
1644 12:44:55.981294 PCI: 00:0d.3: enabled 0
1645 12:44:55.984492 PCI: 00:0e.0: enabled 0
1646 12:44:55.987741 PCI: 00:10.2: enabled 1
1647 12:44:55.988221 PCI: 00:10.6: enabled 0
1648 12:44:55.991380 PCI: 00:10.7: enabled 0
1649 12:44:55.994485 PCI: 00:12.0: enabled 0
1650 12:44:55.994931 PCI: 00:12.6: enabled 0
1651 12:44:55.998290 PCI: 00:13.0: enabled 0
1652 12:44:56.001245 PCI: 00:14.0: enabled 1
1653 12:44:56.004794 PCI: 00:14.1: enabled 0
1654 12:44:56.005428 PCI: 00:14.2: enabled 1
1655 12:44:56.008179 PCI: 00:14.3: enabled 1
1656 12:44:56.010974 PCI: 00:15.0: enabled 1
1657 12:44:56.014892 PCI: 00:15.1: enabled 1
1658 12:44:56.015428 PCI: 00:15.2: enabled 1
1659 12:44:56.017636 PCI: 00:15.3: enabled 1
1660 12:44:56.021311 PCI: 00:16.0: enabled 1
1661 12:44:56.024645 PCI: 00:16.1: enabled 0
1662 12:44:56.025228 PCI: 00:16.2: enabled 0
1663 12:44:56.027972 PCI: 00:16.3: enabled 0
1664 12:44:56.031097 PCI: 00:16.4: enabled 0
1665 12:44:56.034247 PCI: 00:16.5: enabled 0
1666 12:44:56.034693 PCI: 00:17.0: enabled 0
1667 12:44:56.037305 PCI: 00:19.0: enabled 0
1668 12:44:56.040933 PCI: 00:19.1: enabled 1
1669 12:44:56.043838 PCI: 00:19.2: enabled 0
1670 12:44:56.044325 PCI: 00:1c.0: enabled 1
1671 12:44:56.047477 PCI: 00:1c.1: enabled 0
1672 12:44:56.050568 PCI: 00:1c.2: enabled 0
1673 12:44:56.053521 PCI: 00:1c.3: enabled 0
1674 12:44:56.053961 PCI: 00:1c.4: enabled 0
1675 12:44:56.056875 PCI: 00:1c.5: enabled 0
1676 12:44:56.060192 PCI: 00:1c.6: enabled 1
1677 12:44:56.063992 PCI: 00:1c.7: enabled 0
1678 12:44:56.064535 PCI: 00:1d.0: enabled 1
1679 12:44:56.067689 PCI: 00:1d.1: enabled 0
1680 12:44:56.070809 PCI: 00:1d.2: enabled 1
1681 12:44:56.071345 PCI: 00:1d.3: enabled 0
1682 12:44:56.073828 PCI: 00:1e.0: enabled 1
1683 12:44:56.077093 PCI: 00:1e.1: enabled 0
1684 12:44:56.080459 PCI: 00:1e.2: enabled 1
1685 12:44:56.081121 PCI: 00:1e.3: enabled 1
1686 12:44:56.083673 PCI: 00:1f.0: enabled 1
1687 12:44:56.086491 PCI: 00:1f.1: enabled 0
1688 12:44:56.090150 PCI: 00:1f.2: enabled 1
1689 12:44:56.090704 PCI: 00:1f.3: enabled 1
1690 12:44:56.094362 PCI: 00:1f.4: enabled 0
1691 12:44:56.096419 PCI: 00:1f.5: enabled 1
1692 12:44:56.100019 PCI: 00:1f.6: enabled 0
1693 12:44:56.100557 PCI: 00:1f.7: enabled 0
1694 12:44:56.103182 APIC: 00: enabled 1
1695 12:44:56.106413 GENERIC: 0.0: enabled 1
1696 12:44:56.106839 GENERIC: 0.0: enabled 1
1697 12:44:56.109856 GENERIC: 1.0: enabled 1
1698 12:44:56.112712 GENERIC: 0.0: enabled 1
1699 12:44:56.116088 GENERIC: 1.0: enabled 1
1700 12:44:56.116562 USB0 port 0: enabled 1
1701 12:44:56.119554 GENERIC: 0.0: enabled 1
1702 12:44:56.123270 USB0 port 0: enabled 1
1703 12:44:56.126164 GENERIC: 0.0: enabled 1
1704 12:44:56.126685 I2C: 00:1a: enabled 1
1705 12:44:56.129721 I2C: 00:31: enabled 1
1706 12:44:56.132920 I2C: 00:32: enabled 1
1707 12:44:56.133449 I2C: 00:10: enabled 1
1708 12:44:56.135880 I2C: 00:15: enabled 1
1709 12:44:56.139675 GENERIC: 0.0: enabled 0
1710 12:44:56.140103 GENERIC: 1.0: enabled 0
1711 12:44:56.142468 GENERIC: 0.0: enabled 1
1712 12:44:56.146191 SPI: 00: enabled 1
1713 12:44:56.146620 SPI: 00: enabled 1
1714 12:44:56.149577 PNP: 0c09.0: enabled 1
1715 12:44:56.152481 GENERIC: 0.0: enabled 1
1716 12:44:56.155950 USB3 port 0: enabled 1
1717 12:44:56.156487 USB3 port 1: enabled 1
1718 12:44:56.159468 USB3 port 2: enabled 0
1719 12:44:56.162432 USB3 port 3: enabled 0
1720 12:44:56.162964 USB2 port 0: enabled 0
1721 12:44:56.166059 USB2 port 1: enabled 1
1722 12:44:56.168838 USB2 port 2: enabled 1
1723 12:44:56.172446 USB2 port 3: enabled 0
1724 12:44:56.173010 USB2 port 4: enabled 1
1725 12:44:56.175833 USB2 port 5: enabled 0
1726 12:44:56.178987 USB2 port 6: enabled 0
1727 12:44:56.179423 USB2 port 7: enabled 0
1728 12:44:56.181852 USB2 port 8: enabled 0
1729 12:44:56.185348 USB2 port 9: enabled 0
1730 12:44:56.188787 USB3 port 0: enabled 0
1731 12:44:56.189263 USB3 port 1: enabled 1
1732 12:44:56.192274 USB3 port 2: enabled 0
1733 12:44:56.195411 USB3 port 3: enabled 0
1734 12:44:56.195844 GENERIC: 0.0: enabled 1
1735 12:44:56.198571 GENERIC: 1.0: enabled 1
1736 12:44:56.202289 APIC: 01: enabled 1
1737 12:44:56.202738 APIC: 07: enabled 1
1738 12:44:56.205569 APIC: 02: enabled 1
1739 12:44:56.208335 APIC: 04: enabled 1
1740 12:44:56.208760 APIC: 06: enabled 1
1741 12:44:56.211624 APIC: 03: enabled 1
1742 12:44:56.215641 APIC: 05: enabled 1
1743 12:44:56.216167 PCI: 01:00.0: enabled 1
1744 12:44:56.221610 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1745 12:44:56.224985 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1746 12:44:56.228152 ELOG: NV offset 0xf30000 size 0x1000
1747 12:44:56.236937 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1748 12:44:56.243514 ELOG: Event(17) added with size 13 at 2022-07-14 12:40:56 UTC
1749 12:44:56.250155 ELOG: Event(92) added with size 9 at 2022-07-14 12:40:56 UTC
1750 12:44:56.256762 ELOG: Event(93) added with size 9 at 2022-07-14 12:40:56 UTC
1751 12:44:56.263625 ELOG: Event(9E) added with size 10 at 2022-07-14 12:40:56 UTC
1752 12:44:56.270017 ELOG: Event(9F) added with size 14 at 2022-07-14 12:40:56 UTC
1753 12:44:56.277054 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1754 12:44:56.283029 ELOG: Event(A1) added with size 10 at 2022-07-14 12:40:56 UTC
1755 12:44:56.289657 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1756 12:44:56.296312 ELOG: Event(A0) added with size 9 at 2022-07-14 12:40:56 UTC
1757 12:44:56.299779 elog_add_boot_reason: Logged dev mode boot
1758 12:44:56.306484 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1759 12:44:56.306935 Finalize devices...
1760 12:44:56.309631 Devices finalized
1761 12:44:56.316360 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1762 12:44:56.319437 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1763 12:44:56.326335 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1764 12:44:56.329830 ME: HFSTS1 : 0x80030055
1765 12:44:56.336541 ME: HFSTS2 : 0x30280116
1766 12:44:56.339251 ME: HFSTS3 : 0x00000050
1767 12:44:56.343076 ME: HFSTS4 : 0x00004000
1768 12:44:56.349419 ME: HFSTS5 : 0x00000000
1769 12:44:56.352215 ME: HFSTS6 : 0x40400006
1770 12:44:56.355834 ME: Manufacturing Mode : YES
1771 12:44:56.359101 ME: SPI Protection Mode Enabled : NO
1772 12:44:56.365810 ME: FW Partition Table : OK
1773 12:44:56.369198 ME: Bringup Loader Failure : NO
1774 12:44:56.372133 ME: Firmware Init Complete : NO
1775 12:44:56.375393 ME: Boot Options Present : NO
1776 12:44:56.378781 ME: Update In Progress : NO
1777 12:44:56.382197 ME: D0i3 Support : YES
1778 12:44:56.385083 ME: Low Power State Enabled : NO
1779 12:44:56.388936 ME: CPU Replaced : YES
1780 12:44:56.395226 ME: CPU Replacement Valid : YES
1781 12:44:56.398389 ME: Current Working State : 5
1782 12:44:56.401578 ME: Current Operation State : 1
1783 12:44:56.405314 ME: Current Operation Mode : 3
1784 12:44:56.408223 ME: Error Code : 0
1785 12:44:56.411755 ME: Enhanced Debug Mode : NO
1786 12:44:56.415010 ME: CPU Debug Disabled : YES
1787 12:44:56.418180 ME: TXT Support : NO
1788 12:44:56.424818 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1789 12:44:56.434801 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1790 12:44:56.438091 CBFS: 'fallback/slic' not found.
1791 12:44:56.441623 ACPI: Writing ACPI tables at 76b01000.
1792 12:44:56.441728 ACPI: * FACS
1793 12:44:56.445151 ACPI: * DSDT
1794 12:44:56.448001 Ramoops buffer: 0x100000@0x76a00000.
1795 12:44:56.451169 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1796 12:44:56.457940 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1797 12:44:56.461635 Google Chrome EC: version:
1798 12:44:56.464573 ro: voema_v2.0.10114-a447f03e46
1799 12:44:56.467950 rw: voema_v2.0.10114-a447f03e46
1800 12:44:56.468073 running image: 2
1801 12:44:56.474534 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1802 12:44:56.479718 ACPI: * FADT
1803 12:44:56.479828 SCI is IRQ9
1804 12:44:56.486357 ACPI: added table 1/32, length now 40
1805 12:44:56.486479 ACPI: * SSDT
1806 12:44:56.489412 Found 1 CPU(s) with 8 core(s) each.
1807 12:44:56.496054 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1808 12:44:56.499042 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1809 12:44:56.502630 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1810 12:44:56.505817 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1811 12:44:56.512306 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1812 12:44:56.519438 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1813 12:44:56.522489 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1814 12:44:56.528938 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1815 12:44:56.536082 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1816 12:44:56.538834 \_SB.PCI0.RP09: Added StorageD3Enable property
1817 12:44:56.545703 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1818 12:44:56.548800 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1819 12:44:56.555569 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1820 12:44:56.558611 PS2K: Passing 80 keymaps to kernel
1821 12:44:56.565436 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1822 12:44:56.571988 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1823 12:44:56.579165 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1824 12:44:56.585152 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1825 12:44:56.591986 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1826 12:44:56.598509 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1827 12:44:56.605210 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1828 12:44:56.611707 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1829 12:44:56.615267 ACPI: added table 2/32, length now 44
1830 12:44:56.615399 ACPI: * MCFG
1831 12:44:56.618851 ACPI: added table 3/32, length now 48
1832 12:44:56.621860 ACPI: * TPM2
1833 12:44:56.625109 TPM2 log created at 0x769f0000
1834 12:44:56.628361 ACPI: added table 4/32, length now 52
1835 12:44:56.631616 ACPI: * MADT
1836 12:44:56.631779 SCI is IRQ9
1837 12:44:56.634979 ACPI: added table 5/32, length now 56
1838 12:44:56.638948 current = 76b09850
1839 12:44:56.639075 ACPI: * DMAR
1840 12:44:56.641476 ACPI: added table 6/32, length now 60
1841 12:44:56.644721 ACPI: added table 7/32, length now 64
1842 12:44:56.648044 ACPI: * HPET
1843 12:44:56.651368 ACPI: added table 8/32, length now 68
1844 12:44:56.651500 ACPI: done.
1845 12:44:56.654942 ACPI tables: 35216 bytes.
1846 12:44:56.658303 smbios_write_tables: 769ef000
1847 12:44:56.661791 EC returned error result code 3
1848 12:44:56.668479 Couldn't obtain OEM name from CBI
1849 12:44:56.668658 Create SMBIOS type 16
1850 12:44:56.671405 Create SMBIOS type 17
1851 12:44:56.675388 GENERIC: 0.0 (WIFI Device)
1852 12:44:56.678282 SMBIOS tables: 1734 bytes.
1853 12:44:56.681630 Writing table forward entry at 0x00000500
1854 12:44:56.688336 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1855 12:44:56.691684 Writing coreboot table at 0x76b25000
1856 12:44:56.698591 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1857 12:44:56.701365 1. 0000000000001000-000000000009ffff: RAM
1858 12:44:56.708082 2. 00000000000a0000-00000000000fffff: RESERVED
1859 12:44:56.711188 3. 0000000000100000-00000000769eefff: RAM
1860 12:44:56.718220 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1861 12:44:56.721045 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1862 12:44:56.727983 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1863 12:44:56.731192 7. 0000000077000000-000000007fbfffff: RESERVED
1864 12:44:56.737734 8. 00000000c0000000-00000000cfffffff: RESERVED
1865 12:44:56.741137 9. 00000000f8000000-00000000f9ffffff: RESERVED
1866 12:44:56.747763 10. 00000000fb000000-00000000fb000fff: RESERVED
1867 12:44:56.750949 11. 00000000fe000000-00000000fe00ffff: RESERVED
1868 12:44:56.757872 12. 00000000fed80000-00000000fed87fff: RESERVED
1869 12:44:56.760915 13. 00000000fed90000-00000000fed92fff: RESERVED
1870 12:44:56.764674 14. 00000000feda0000-00000000feda1fff: RESERVED
1871 12:44:56.770761 15. 00000000fedc0000-00000000feddffff: RESERVED
1872 12:44:56.774143 16. 0000000100000000-00000004803fffff: RAM
1873 12:44:56.777217 Passing 4 GPIOs to payload:
1874 12:44:56.784186 NAME | PORT | POLARITY | VALUE
1875 12:44:56.787386 lid | undefined | high | high
1876 12:44:56.793933 power | undefined | high | low
1877 12:44:56.797219 oprom | undefined | high | low
1878 12:44:56.803948 EC in RW | 0x000000e5 | high | high
1879 12:44:56.810498 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1880 12:44:56.813928 coreboot table: 1576 bytes.
1881 12:44:56.817690 IMD ROOT 0. 0x76fff000 0x00001000
1882 12:44:56.820726 IMD SMALL 1. 0x76ffe000 0x00001000
1883 12:44:56.823959 FSP MEMORY 2. 0x76c4e000 0x003b0000
1884 12:44:56.826877 VPD 3. 0x76c4d000 0x00000367
1885 12:44:56.830242 RO MCACHE 4. 0x76c4c000 0x00000fdc
1886 12:44:56.836682 CONSOLE 5. 0x76c2c000 0x00020000
1887 12:44:56.840097 FMAP 6. 0x76c2b000 0x00000578
1888 12:44:56.843612 TIME STAMP 7. 0x76c2a000 0x00000910
1889 12:44:56.846671 VBOOT WORK 8. 0x76c16000 0x00014000
1890 12:44:56.850009 ROMSTG STCK 9. 0x76c15000 0x00001000
1891 12:44:56.853017 AFTER CAR 10. 0x76c0a000 0x0000b000
1892 12:44:56.856495 RAMSTAGE 11. 0x76b97000 0x00073000
1893 12:44:56.862949 REFCODE 12. 0x76b42000 0x00055000
1894 12:44:56.866249 SMM BACKUP 13. 0x76b32000 0x00010000
1895 12:44:56.869786 4f444749 14. 0x76b30000 0x00002000
1896 12:44:56.873417 EXT VBT15. 0x76b2d000 0x0000219f
1897 12:44:56.876237 COREBOOT 16. 0x76b25000 0x00008000
1898 12:44:56.879678 ACPI 17. 0x76b01000 0x00024000
1899 12:44:56.882905 ACPI GNVS 18. 0x76b00000 0x00001000
1900 12:44:56.886214 RAMOOPS 19. 0x76a00000 0x00100000
1901 12:44:56.889468 TPM2 TCGLOG20. 0x769f0000 0x00010000
1902 12:44:56.895980 SMBIOS 21. 0x769ef000 0x00000800
1903 12:44:56.896093 IMD small region:
1904 12:44:56.899493 IMD ROOT 0. 0x76ffec00 0x00000400
1905 12:44:56.902729 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1906 12:44:56.909301 POWER STATE 2. 0x76ffeb80 0x00000044
1907 12:44:56.912523 ROMSTAGE 3. 0x76ffeb60 0x00000004
1908 12:44:56.915965 MEM INFO 4. 0x76ffe980 0x000001e0
1909 12:44:56.922475 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1910 12:44:56.925849 MTRR: Physical address space:
1911 12:44:56.932683 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1912 12:44:56.938890 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1913 12:44:56.942527 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1914 12:44:56.949146 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1915 12:44:56.955449 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1916 12:44:56.962129 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1917 12:44:56.968828 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1918 12:44:56.972313 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 12:44:56.975485 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 12:44:56.982341 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 12:44:56.985483 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 12:44:56.988551 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 12:44:56.991987 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 12:44:56.998767 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 12:44:57.002116 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 12:44:57.005350 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 12:44:57.008570 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 12:44:57.015403 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 12:44:57.018425 call enable_fixed_mtrr()
1930 12:44:57.021718 CPU physical address size: 39 bits
1931 12:44:57.025156 MTRR: default type WB/UC MTRR counts: 6/7.
1932 12:44:57.028175 MTRR: WB selected as default type.
1933 12:44:57.034834 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1934 12:44:57.041572 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1935 12:44:57.048292 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1936 12:44:57.054616 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1937 12:44:57.061229 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1938 12:44:57.067955 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1939 12:44:57.068072
1940 12:44:57.071953 MTRR check
1941 12:44:57.074535 Fixed MTRRs : Enabled
1942 12:44:57.074622 Variable MTRRs: Enabled
1943 12:44:57.074690
1944 12:44:57.081112 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 12:44:57.085014 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 12:44:57.087524 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 12:44:57.091075 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 12:44:57.097806 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 12:44:57.101303 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 12:44:57.104790 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 12:44:57.107759 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 12:44:57.110922 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 12:44:57.117853 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 12:44:57.121102 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 12:44:57.127700 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1956 12:44:57.130994 call enable_fixed_mtrr()
1957 12:44:57.134440 Checking cr50 for pending updates
1958 12:44:57.138072 CPU physical address size: 39 bits
1959 12:44:57.141703 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 12:44:57.144983 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 12:44:57.151629 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 12:44:57.155451 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 12:44:57.158205 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 12:44:57.161665 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 12:44:57.165735 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 12:44:57.171498 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 12:44:57.174870 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 12:44:57.178440 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 12:44:57.182126 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 12:44:57.188351 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 12:44:57.191727 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 12:44:57.194965 call enable_fixed_mtrr()
1973 12:44:57.198068 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:44:57.204698 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:44:57.208452 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 12:44:57.211572 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 12:44:57.214412 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 12:44:57.221132 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 12:44:57.224649 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 12:44:57.227614 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 12:44:57.231056 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 12:44:57.235843 CPU physical address size: 39 bits
1983 12:44:57.242548 call enable_fixed_mtrr()
1984 12:44:57.246105 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 12:44:57.249172 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 12:44:57.252456 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 12:44:57.259228 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 12:44:57.262510 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 12:44:57.265942 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 12:44:57.269009 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 12:44:57.275776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 12:44:57.278893 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 12:44:57.282557 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 12:44:57.285463 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 12:44:57.292215 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 12:44:57.295464 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 12:44:57.298601 call enable_fixed_mtrr()
1998 12:44:57.302387 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 12:44:57.309038 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 12:44:57.311984 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 12:44:57.315117 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 12:44:57.318447 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 12:44:57.325345 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 12:44:57.328896 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 12:44:57.331811 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 12:44:57.335120 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 12:44:57.342354 CPU physical address size: 39 bits
2008 12:44:57.345525 call enable_fixed_mtrr()
2009 12:44:57.348597 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 12:44:57.355262 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 12:44:57.358542 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 12:44:57.361741 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 12:44:57.365150 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 12:44:57.371611 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 12:44:57.375123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 12:44:57.378175 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 12:44:57.381650 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 12:44:57.388015 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 12:44:57.391341 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 12:44:57.394767 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 12:44:57.401858 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 12:44:57.401962 call enable_fixed_mtrr()
2023 12:44:57.408419 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 12:44:57.412155 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 12:44:57.415169 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 12:44:57.418667 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 12:44:57.424918 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 12:44:57.428569 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 12:44:57.431370 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 12:44:57.434746 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:44:57.441664 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:44:57.444296 CPU physical address size: 39 bits
2033 12:44:57.449597 call enable_fixed_mtrr()
2034 12:44:57.452907 CPU physical address size: 39 bits
2035 12:44:57.455988 Reading cr50 TPM mode
2036 12:44:57.459781 CPU physical address size: 39 bits
2037 12:44:57.462933 CPU physical address size: 39 bits
2038 12:44:57.469306 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2039 12:44:57.476264 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2040 12:44:57.479352 Checking segment from ROM address 0xffc02b38
2041 12:44:57.486461 Checking segment from ROM address 0xffc02b54
2042 12:44:57.489255 Loading segment from ROM address 0xffc02b38
2043 12:44:57.492542 code (compression=0)
2044 12:44:57.499156 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2045 12:44:57.508814 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2046 12:44:57.512196 it's not compressed!
2047 12:44:57.650987 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2048 12:44:57.657407 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2049 12:44:57.664692 Loading segment from ROM address 0xffc02b54
2050 12:44:57.667778 Entry Point 0x30000000
2051 12:44:57.667859 Loaded segments
2052 12:44:57.674178 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2053 12:44:57.719427 Finalizing chipset.
2054 12:44:57.723090 Finalizing SMM.
2055 12:44:57.723190 APMC done.
2056 12:44:57.729282 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2057 12:44:57.732613 mp_park_aps done after 0 msecs.
2058 12:44:57.735645 Jumping to boot code at 0x30000000(0x76b25000)
2059 12:44:57.745905 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2060 12:44:57.749164
2061 12:44:57.749560 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2062 12:44:57.749677 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2063 12:44:57.749765 Setting prompt string to ['volteer:']
2064 12:44:57.749850 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2065 12:44:57.752217 Starting depthcharge on Voema...
2066 12:44:57.758821 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2067 12:44:57.765774 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2068 12:44:57.772525 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2069 12:44:57.775399 Failed to find eMMC card reader
2070 12:44:57.778513 Wipe memory regions:
2071 12:44:57.782422 [0x00000000001000, 0x000000000a0000)
2072 12:44:57.785493 [0x00000000100000, 0x00000030000000)
2073 12:44:57.822819 [0x00000032662db0, 0x000000769ef000)
2074 12:44:57.873473 [0x00000100000000, 0x00000480400000)
2075 12:44:58.521898 ec_init: CrosEC protocol v3 supported (256, 256)
2076 12:44:58.954131 R8152: Initializing
2077 12:44:58.957343 Version 6 (ocp_data = 5c30)
2078 12:44:58.960808 R8152: Done initializing
2079 12:44:58.964227 Adding net device
2080 12:44:59.268752 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2081 12:44:59.268902
2082 12:44:59.272255 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2084 12:44:59.372999 volteer: tftpboot 192.168.201.1 6819443/tftp-deploy-qqqs7iw9/kernel/bzImage 6819443/tftp-deploy-qqqs7iw9/kernel/cmdline 6819443/tftp-deploy-qqqs7iw9/ramdisk/ramdisk.cpio.gz
2085 12:44:59.373199 Setting prompt string to ['Starting kernel']
2086 12:44:59.373325 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2087 12:44:59.373439 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:42)
2088 12:44:59.377695 tftpboot 192.168.201.1 6819443/tftp-deploy-qqqs7iw9/kernel/bzImoy-qqqs7iw9/kernel/cmdline 6819443/tftp-deploy-qqqs7iw9/ramdisk/ramdisk.cpio.gz
2089 12:44:59.377791 Waiting for link
2090 12:44:59.581604 done.
2091 12:44:59.581756 MAC: 00:24:32:30:7d:ab
2092 12:44:59.585195 Sending DHCP discover... done.
2093 12:44:59.588104 Waiting for reply... done.
2094 12:44:59.591398 Sending DHCP request... done.
2095 12:44:59.594897 Waiting for reply... done.
2096 12:44:59.598007 My ip is 192.168.201.22
2097 12:44:59.601363 The DHCP server ip is 192.168.201.1
2098 12:44:59.604319 TFTP server IP predefined by user: 192.168.201.1
2099 12:44:59.611155 Bootfile predefined by user: 6819443/tftp-deploy-qqqs7iw9/kernel/bzImage
2100 12:44:59.617531 Sending tftp read request... done.
2101 12:44:59.620994 Waiting for the transfer...
2102 12:45:00.162707 00000000 ################################################################
2103 12:45:00.692430 00080000 ################################################################
2104 12:45:01.229989 00100000 ################################################################
2105 12:45:01.768735 00180000 ################################################################
2106 12:45:02.312083 00200000 ################################################################
2107 12:45:02.845853 00280000 ################################################################
2108 12:45:03.382065 00300000 ################################################################
2109 12:45:03.921784 00380000 ################################################################
2110 12:45:04.467989 00400000 ################################################################
2111 12:45:05.023137 00480000 ################################################################
2112 12:45:05.573724 00500000 ################################################################
2113 12:45:06.114471 00580000 ################################################################
2114 12:45:06.665129 00600000 ################################################################ done.
2115 12:45:06.668350 The bootfile was 6811536 bytes long.
2116 12:45:06.671617 Sending tftp read request... done.
2117 12:45:06.674934 Waiting for the transfer...
2118 12:45:07.216323 00000000 ################################################################
2119 12:45:07.771380 00080000 ################################################################
2120 12:45:08.315933 00100000 ################################################################
2121 12:45:08.864236 00180000 ################################################################
2122 12:45:09.427183 00200000 ################################################################
2123 12:45:09.977416 00280000 ################################################################
2124 12:45:10.524806 00300000 ################################################################
2125 12:45:11.075871 00380000 ################################################################
2126 12:45:11.627333 00400000 ################################################################
2127 12:45:12.176330 00480000 ################################################################
2128 12:45:12.737145 00500000 ################################################################
2129 12:45:13.292352 00580000 ################################################################
2130 12:45:13.852250 00600000 ################################################################
2131 12:45:14.379552 00680000 ################################################################
2132 12:45:14.899806 00700000 ################################################################
2133 12:45:15.411524 00780000 ################################################################
2134 12:45:15.928604 00800000 ################################################################
2135 12:45:16.446545 00880000 ################################################################
2136 12:45:16.967745 00900000 ################################################################
2137 12:45:17.486436 00980000 ################################################################
2138 12:45:18.000723 00a00000 ################################################################
2139 12:45:18.511162 00a80000 ################################################################
2140 12:45:19.027345 00b00000 ################################################################
2141 12:45:19.543374 00b80000 ################################################################
2142 12:45:20.058145 00c00000 ################################################################
2143 12:45:20.578112 00c80000 ################################################################
2144 12:45:21.102840 00d00000 ################################################################
2145 12:45:21.619804 00d80000 ################################################################
2146 12:45:22.143298 00e00000 ################################################################
2147 12:45:22.667942 00e80000 ################################################################
2148 12:45:23.190319 00f00000 ################################################################
2149 12:45:23.714187 00f80000 ################################################################
2150 12:45:24.242029 01000000 ################################################################
2151 12:45:24.773628 01080000 ################################################################
2152 12:45:25.299149 01100000 ################################################################
2153 12:45:25.822187 01180000 ################################################################
2154 12:45:26.358212 01200000 ################################################################
2155 12:45:26.902867 01280000 ################################################################
2156 12:45:27.427038 01300000 ################################################################
2157 12:45:27.943992 01380000 ################################################################
2158 12:45:28.467196 01400000 ################################################################
2159 12:45:29.000555 01480000 ################################################################
2160 12:45:29.538758 01500000 ################################################################
2161 12:45:30.074178 01580000 ################################################################
2162 12:45:30.642043 01600000 ################################################################
2163 12:45:31.152932 01680000 ################################################################
2164 12:45:31.689930 01700000 ################################################################
2165 12:45:32.256564 01780000 ################################################################
2166 12:45:32.809687 01800000 ################################################################
2167 12:45:33.331511 01880000 ################################################################
2168 12:45:33.847714 01900000 ################################################################
2169 12:45:34.362115 01980000 ################################################################
2170 12:45:34.883780 01a00000 ################################################################
2171 12:45:35.404721 01a80000 ################################################################
2172 12:45:35.934650 01b00000 ################################################################
2173 12:45:36.449248 01b80000 ################################################################
2174 12:45:36.986764 01c00000 ################################################################
2175 12:45:37.502020 01c80000 ################################################################
2176 12:45:38.018529 01d00000 ################################################################
2177 12:45:38.540163 01d80000 ################################################################
2178 12:45:39.069740 01e00000 ################################################################
2179 12:45:39.586370 01e80000 ################################################################
2180 12:45:40.125257 01f00000 ################################################################
2181 12:45:40.652757 01f80000 ################################################################
2182 12:45:41.168216 02000000 ################################################################
2183 12:45:41.687014 02080000 ################################################################
2184 12:45:42.195551 02100000 ################################################################
2185 12:45:42.711035 02180000 ################################################################
2186 12:45:42.844283 02200000 ################# done.
2187 12:45:42.848075 Sending tftp read request... done.
2188 12:45:42.850842 Waiting for the transfer...
2189 12:45:42.850943 00000000 # done.
2190 12:45:42.860431 Command line loaded dynamically from TFTP file: 6819443/tftp-deploy-qqqs7iw9/kernel/cmdline
2191 12:45:42.873312 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2192 12:45:42.883312 Shutting down all USB controllers.
2193 12:45:42.883412 Removing current net device
2194 12:45:42.886631 Finalizing coreboot
2195 12:45:42.893084 Exiting depthcharge with code 4 at timestamp: 53712845
2196 12:45:42.893172
2197 12:45:42.893239 Starting kernel ...
2198 12:45:42.893301
2199 12:45:42.893417
2200 12:45:42.893778 end: 2.2.4 bootloader-commands (duration 00:00:45) [common]
2201 12:45:42.893887 start: 2.2.5 auto-login-action (timeout 00:03:59) [common]
2202 12:45:42.893966 Setting prompt string to ['Linux version [0-9]']
2203 12:45:42.894037 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2204 12:45:42.894114 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2206 12:49:41.894896 end: 2.2.5 auto-login-action (duration 00:03:59) [common]
2208 12:49:41.896997 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 239 seconds'
2210 12:49:41.897905 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2213 12:49:41.899355 end: 2 depthcharge-action (duration 00:05:00) [common]
2215 12:49:41.900439 Cleaning after the job
2216 12:49:41.900880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/ramdisk
2217 12:49:41.912128 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/kernel
2218 12:49:41.914868 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819443/tftp-deploy-qqqs7iw9/modules
2219 12:49:41.915917 start: 4.1 power-off (timeout 00:00:30) [common]
2220 12:49:41.916938 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2221 12:49:41.943519 >> Command sent successfully.
2222 12:49:41.945368 Returned 0 in 0 seconds
2223 12:49:42.046557 end: 4.1 power-off (duration 00:00:00) [common]
2225 12:49:42.048109 start: 4.2 read-feedback (timeout 00:10:00) [common]
2226 12:49:42.049349 Listened to connection for namespace 'common' for up to 1s
2227 12:49:43.053236 Finalising connection for namespace 'common'
2228 12:49:43.053961 Disconnecting from shell: Finalise
2229 12:49:43.155452 end: 4.2 read-feedback (duration 00:00:01) [common]
2230 12:49:43.156105 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819443
2231 12:49:43.184271 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819443
2232 12:49:43.184442 JobError: Your job cannot terminate cleanly.