Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:44:34.175498 lava-dispatcher, installed at version: 2022.04
2 12:44:34.175688 start: 0 validate
3 12:44:34.175817 Start time: 2022-07-14 12:44:34.175809+00:00 (UTC)
4 12:44:34.175946 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:34.176070 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:34.468918 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:34.469675 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:34.764297 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:34.764989 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:35.054202 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:35.054977 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:35.345892 validate duration: 1.17
14 12:44:35.346178 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:35.346293 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:35.346383 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:35.346482 Not decompressing ramdisk as can be used compressed.
18 12:44:35.346568 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220708.0/amd64/initrd.cpio.gz
19 12:44:35.346634 saving as /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/ramdisk/initrd.cpio.gz
20 12:44:35.346697 total size: 5411032 (5MB)
21 12:44:35.347829 progress 0% (0MB)
22 12:44:35.349297 progress 5% (0MB)
23 12:44:35.350631 progress 10% (0MB)
24 12:44:35.352076 progress 15% (0MB)
25 12:44:35.353535 progress 20% (1MB)
26 12:44:35.354879 progress 25% (1MB)
27 12:44:35.356185 progress 30% (1MB)
28 12:44:35.357475 progress 35% (1MB)
29 12:44:35.358978 progress 40% (2MB)
30 12:44:35.360328 progress 45% (2MB)
31 12:44:35.361643 progress 50% (2MB)
32 12:44:35.363035 progress 55% (2MB)
33 12:44:35.364506 progress 60% (3MB)
34 12:44:35.365811 progress 65% (3MB)
35 12:44:35.367198 progress 70% (3MB)
36 12:44:35.368503 progress 75% (3MB)
37 12:44:35.369946 progress 80% (4MB)
38 12:44:35.371284 progress 85% (4MB)
39 12:44:35.372583 progress 90% (4MB)
40 12:44:35.373887 progress 95% (4MB)
41 12:44:35.375360 progress 100% (5MB)
42 12:44:35.375538 5MB downloaded in 0.03s (178.95MB/s)
43 12:44:35.375688 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:35.375937 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:35.376024 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:35.376115 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:35.376260 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:44:35.376334 saving as /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/kernel/bzImage
50 12:44:35.376399 total size: 6811536 (6MB)
51 12:44:35.376460 No compression specified
52 12:44:36.878446 progress 0% (0MB)
53 12:44:36.889001 progress 5% (0MB)
54 12:44:36.898765 progress 10% (0MB)
55 12:44:36.905910 progress 15% (1MB)
56 12:44:36.907780 progress 20% (1MB)
57 12:44:36.909467 progress 25% (1MB)
58 12:44:36.911391 progress 30% (1MB)
59 12:44:36.913024 progress 35% (2MB)
60 12:44:36.914812 progress 40% (2MB)
61 12:44:36.916607 progress 45% (2MB)
62 12:44:36.918250 progress 50% (3MB)
63 12:44:36.920054 progress 55% (3MB)
64 12:44:36.921687 progress 60% (3MB)
65 12:44:36.923694 progress 65% (4MB)
66 12:44:36.925540 progress 70% (4MB)
67 12:44:36.927489 progress 75% (4MB)
68 12:44:36.929499 progress 80% (5MB)
69 12:44:36.931333 progress 85% (5MB)
70 12:44:36.933107 progress 90% (5MB)
71 12:44:36.934724 progress 95% (6MB)
72 12:44:36.936486 progress 100% (6MB)
73 12:44:36.936793 6MB downloaded in 1.56s (4.16MB/s)
74 12:44:36.936982 end: 1.2.1 http-download (duration 00:00:02) [common]
76 12:44:36.937262 end: 1.2 download-retry (duration 00:00:02) [common]
77 12:44:36.937378 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:44:36.937493 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:44:36.937628 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220708.0/amd64/full.rootfs.tar.xz
80 12:44:36.937723 saving as /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/nfsrootfs/full.rootfs.tar
81 12:44:36.937786 total size: 207060584 (197MB)
82 12:44:36.937849 Using unxz to decompress xz
83 12:44:36.941124 progress 0% (0MB)
84 12:44:37.530416 progress 5% (9MB)
85 12:44:38.094751 progress 10% (19MB)
86 12:44:38.699175 progress 15% (29MB)
87 12:44:39.068027 progress 20% (39MB)
88 12:44:39.450402 progress 25% (49MB)
89 12:44:40.069017 progress 30% (59MB)
90 12:44:40.629480 progress 35% (69MB)
91 12:44:41.243286 progress 40% (79MB)
92 12:44:41.825383 progress 45% (88MB)
93 12:44:42.411935 progress 50% (98MB)
94 12:44:43.041297 progress 55% (108MB)
95 12:44:43.735761 progress 60% (118MB)
96 12:44:43.891914 progress 65% (128MB)
97 12:44:44.051708 progress 70% (138MB)
98 12:44:44.165626 progress 75% (148MB)
99 12:44:44.241195 progress 80% (158MB)
100 12:44:44.312672 progress 85% (167MB)
101 12:44:44.422583 progress 90% (177MB)
102 12:44:44.704450 progress 95% (187MB)
103 12:44:45.304477 progress 100% (197MB)
104 12:44:45.311069 197MB downloaded in 8.37s (23.58MB/s)
105 12:44:45.311348 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:44:45.311616 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:44:45.311712 start: 1.4 download-retry (timeout 00:09:50) [common]
109 12:44:45.311806 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 12:44:45.311920 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:44:45.311996 saving as /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/modules/modules.tar
112 12:44:45.312061 total size: 51960 (0MB)
113 12:44:45.312126 Using unxz to decompress xz
114 12:44:45.315374 progress 63% (0MB)
115 12:44:45.315756 progress 100% (0MB)
116 12:44:45.319035 0MB downloaded in 0.01s (7.11MB/s)
117 12:44:45.319263 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:44:45.319525 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:44:45.319624 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 12:44:45.319723 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 12:44:47.349645 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819480/extract-nfsrootfs-h58vheqj
123 12:44:47.349852 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:44:47.349957 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
125 12:44:47.350131 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv
126 12:44:47.350241 makedir: /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin
127 12:44:47.350339 makedir: /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/tests
128 12:44:47.350430 makedir: /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/results
129 12:44:47.350530 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-add-keys
130 12:44:47.350660 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-add-sources
131 12:44:47.350821 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-background-process-start
132 12:44:47.350938 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-background-process-stop
133 12:44:47.351050 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-common-functions
134 12:44:47.351161 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-echo-ipv4
135 12:44:47.351271 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-install-packages
136 12:44:47.351380 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-installed-packages
137 12:44:47.351490 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-os-build
138 12:44:47.351599 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-probe-channel
139 12:44:47.351711 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-probe-ip
140 12:44:47.351820 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-target-ip
141 12:44:47.351928 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-target-mac
142 12:44:47.352037 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-target-storage
143 12:44:47.352147 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-case
144 12:44:47.352258 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-event
145 12:44:47.352366 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-feedback
146 12:44:47.352474 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-raise
147 12:44:47.352582 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-reference
148 12:44:47.352690 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-runner
149 12:44:47.352798 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-set
150 12:44:47.352912 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-test-shell
151 12:44:47.353024 Updating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-add-keys (debian)
152 12:44:47.353136 Updating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-add-sources (debian)
153 12:44:47.353248 Updating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-install-packages (debian)
154 12:44:47.353359 Updating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-installed-packages (debian)
155 12:44:47.353471 Updating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/bin/lava-os-build (debian)
156 12:44:47.353567 Creating /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/environment
157 12:44:47.353654 LAVA metadata
158 12:44:47.353722 - LAVA_JOB_ID=6819480
159 12:44:47.353787 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:44:47.353896 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
161 12:44:47.353979 skipped lava-vland-overlay
162 12:44:47.354073 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:44:47.354156 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
164 12:44:47.354218 skipped lava-multinode-overlay
165 12:44:47.354292 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:44:47.354372 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
167 12:44:47.354447 Loading test definitions
168 12:44:47.354538 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
169 12:44:47.354613 Using /lava-6819480 at stage 0
170 12:44:47.355015 uuid=6819480_1.5.2.3.1 testdef=None
171 12:44:47.355108 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:44:47.355196 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
173 12:44:47.355609 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:44:47.355840 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
176 12:44:47.356324 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:44:47.356562 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
179 12:44:47.357017 runner path: /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/0/tests/0_timesync-off test_uuid 6819480_1.5.2.3.1
180 12:44:47.357168 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:44:47.357441 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
183 12:44:47.357547 Using /lava-6819480 at stage 0
184 12:44:47.357703 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:44:47.357802 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/0/tests/1_kselftest-alsa'
186 12:44:55.177682 Running '/usr/bin/git checkout kernelci.org
187 12:44:55.305049 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 12:44:55.305716 uuid=6819480_1.5.2.3.5 testdef=None
189 12:44:55.305889 end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
191 12:44:55.306209 start: 1.5.2.3.6 test-overlay (timeout 00:09:40) [common]
192 12:44:55.307114 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:44:55.307404 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:40) [common]
195 12:44:55.308270 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:44:55.308522 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
198 12:44:55.309425 runner path: /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/0/tests/1_kselftest-alsa test_uuid 6819480_1.5.2.3.5
199 12:44:55.309520 BOARD='asus-cx9400-volteer'
200 12:44:55.309587 BRANCH='cip'
201 12:44:55.309649 SKIPFILE='skipfile-lkft.yaml'
202 12:44:55.309709 TESTPROG_URL='None'
203 12:44:55.309766 TST_CASENAME=''
204 12:44:55.309825 TST_CMDFILES='alsa'
205 12:44:55.309959 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 12:44:55.310169 Creating lava-test-runner.conf files
208 12:44:55.310233 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819480/lava-overlay-7u38qrlv/lava-6819480/0 for stage 0
209 12:44:55.310320 - 0_timesync-off
210 12:44:55.310389 - 1_kselftest-alsa
211 12:44:55.310482 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
212 12:44:55.310571 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
213 12:45:02.489851 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 12:45:02.490019 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
215 12:45:02.490117 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:45:02.490223 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
217 12:45:02.490317 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
218 12:45:02.592441 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:45:02.592793 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
220 12:45:02.592903 extracting modules file /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819480/extract-nfsrootfs-h58vheqj
221 12:45:02.596896 extracting modules file /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819480/extract-overlay-ramdisk-ub5x6kmh/ramdisk
222 12:45:02.600635 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:45:02.600745 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
224 12:45:02.600831 [common] Applying overlay to NFS
225 12:45:02.600903 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819480/compress-overlay-gx6ybhzu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819480/extract-nfsrootfs-h58vheqj
226 12:45:03.043526 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:45:03.043695 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
228 12:45:03.043796 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:45:03.043888 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
230 12:45:03.043972 Building ramdisk /var/lib/lava/dispatcher/tmp/6819480/extract-overlay-ramdisk-ub5x6kmh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819480/extract-overlay-ramdisk-ub5x6kmh/ramdisk
231 12:45:03.077549 >> 24434 blocks
232 12:45:03.542260 rename /var/lib/lava/dispatcher/tmp/6819480/extract-overlay-ramdisk-ub5x6kmh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/ramdisk/ramdisk.cpio.gz
233 12:45:03.542674 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
234 12:45:03.542801 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
235 12:45:03.542905 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
236 12:45:03.543004 No mkimage arch provided, not using FIT.
237 12:45:03.543096 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:45:03.543182 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:45:03.543285 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
240 12:45:03.543385 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
241 12:45:03.543462 No LXC device requested
242 12:45:03.543549 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:45:03.543635 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
244 12:45:03.543718 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:45:03.543791 Checking files for TFTP limit of 4294967296 bytes.
246 12:45:03.544162 end: 1 tftp-deploy (duration 00:00:28) [common]
247 12:45:03.544263 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:45:03.544356 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:45:03.544486 substitutions:
250 12:45:03.544556 - {DTB}: None
251 12:45:03.544622 - {INITRD}: 6819480/tftp-deploy-7xaxojzq/ramdisk/ramdisk.cpio.gz
252 12:45:03.544683 - {KERNEL}: 6819480/tftp-deploy-7xaxojzq/kernel/bzImage
253 12:45:03.544743 - {LAVA_MAC}: None
254 12:45:03.544802 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819480/extract-nfsrootfs-h58vheqj
255 12:45:03.544862 - {NFS_SERVER_IP}: 192.168.201.1
256 12:45:03.544919 - {PRESEED_CONFIG}: None
257 12:45:03.544978 - {PRESEED_LOCAL}: None
258 12:45:03.545034 - {RAMDISK}: 6819480/tftp-deploy-7xaxojzq/ramdisk/ramdisk.cpio.gz
259 12:45:03.545091 - {ROOT_PART}: None
260 12:45:03.545148 - {ROOT}: None
261 12:45:03.545205 - {SERVER_IP}: 192.168.201.1
262 12:45:03.545261 - {TEE}: None
263 12:45:03.545327 Parsed boot commands:
264 12:45:03.545383 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:45:03.545534 Parsed boot commands: tftpboot 192.168.201.1 6819480/tftp-deploy-7xaxojzq/kernel/bzImage 6819480/tftp-deploy-7xaxojzq/kernel/cmdline 6819480/tftp-deploy-7xaxojzq/ramdisk/ramdisk.cpio.gz
266 12:45:03.545625 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:45:03.545711 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:45:03.545805 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:45:03.545899 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:45:03.545972 Not connected, no need to disconnect.
271 12:45:03.546050 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:45:03.546132 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:45:03.546201 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
274 12:45:03.548984 Setting prompt string to ['lava-test: # ']
275 12:45:03.549268 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:45:03.549372 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:45:03.549468 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:45:03.549568 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:45:03.549745 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
280 12:45:03.568849 >> Command sent successfully.
281 12:45:03.570679 Returned 0 in 0 seconds
282 12:45:03.671468 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 12:45:03.671797 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 12:45:03.671896 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 12:45:03.671985 Setting prompt string to 'Starting depthcharge on Voema...'
287 12:45:03.672054 Changing prompt to 'Starting depthcharge on Voema...'
288 12:45:03.672123 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 12:45:03.672421 [Enter `^Ec?' for help]
290 12:45:10.993386
291 12:45:10.993995
292 12:45:11.003735 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 12:45:11.006711 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
294 12:45:11.013390 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 12:45:11.016882 CPU: AES supported, TXT NOT supported, VT supported
296 12:45:11.023946 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 12:45:11.027106 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 12:45:11.034101 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 12:45:11.037475 VBOOT: Loading verstage.
300 12:45:11.040594 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
301 12:45:11.047261 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 12:45:11.050364 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 12:45:11.061028 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 12:45:11.067132 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 12:45:11.067627
306 12:45:11.068016
307 12:45:11.077998 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 12:45:11.093937 Probing TPM: . done!
309 12:45:11.097423 TPM ready after 0 ms
310 12:45:11.101026 Connected to device vid:did:rid of 1ae0:0028:00
311 12:45:11.112046 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
312 12:45:11.119088 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 12:45:11.122230 Initialized TPM device CR50 revision 0
314 12:45:11.178042 tlcl_send_startup: Startup return code is 0
315 12:45:11.178584 TPM: setup succeeded
316 12:45:11.194162 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 12:45:11.207965 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:45:11.220657 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 12:45:11.230667 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 12:45:11.234127 Chrome EC: UHEPI supported
321 12:45:11.237635 Phase 1
322 12:45:11.240456 FMAP: area GBB found @ 1805000 (458752 bytes)
323 12:45:11.250850 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 12:45:11.257424 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 12:45:11.263986 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 12:45:11.270496 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 12:45:11.273606 Recovery requested (1009000e)
328 12:45:11.277446 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 12:45:11.289014 tlcl_extend: response is 0
330 12:45:11.295481 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 12:45:11.305437 tlcl_extend: response is 0
332 12:45:11.311987 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 12:45:11.318679 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 12:45:11.325507 BS: verstage times (exec / console): total (unknown) / 142 ms
335 12:45:11.326091
336 12:45:11.326485
337 12:45:11.338640 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 12:45:11.345180 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 12:45:11.348379 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 12:45:11.351317 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 12:45:11.358409 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 12:45:11.361347 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 12:45:11.365095 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 12:45:11.368051 TCO_STS: 0000 0000
345 12:45:11.371499 GEN_PMCON: d0015038 00002200
346 12:45:11.374532 GBLRST_CAUSE: 00000000 00000000
347 12:45:11.378107 HPR_CAUSE0: 00000000
348 12:45:11.378568 prev_sleep_state 5
349 12:45:11.381628 Boot Count incremented to 6003
350 12:45:11.387822 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:45:11.394809 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:45:11.404857 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:45:11.411279 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 12:45:11.414278 Chrome EC: UHEPI supported
355 12:45:11.421118 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 12:45:11.432200 Probing TPM: done!
357 12:45:11.438543 Connected to device vid:did:rid of 1ae0:0028:00
358 12:45:11.448345 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
359 12:45:11.451927 Initialized TPM device CR50 revision 0
360 12:45:11.470233 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 12:45:11.473263 MRC: Hash idx 0x100b comparison successful.
362 12:45:11.476843 MRC cache found, size faa8
363 12:45:11.477298 bootmode is set to: 2
364 12:45:11.479868 SPD index = 2
365 12:45:11.486800 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 12:45:11.490226 SPD: module type is LPDDR4X
367 12:45:11.493059 SPD: module part number is MT53D1G64D4NW-046
368 12:45:11.499625 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
369 12:45:11.506035 SPD: device width 16 bits, bus width 16 bits
370 12:45:11.509636 SPD: module size is 2048 MB (per channel)
371 12:45:11.938515 CBMEM:
372 12:45:11.942185 IMD: root @ 0x76fff000 254 entries.
373 12:45:11.945555 IMD: root @ 0x76ffec00 62 entries.
374 12:45:11.948647 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 12:45:11.955113 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 12:45:11.958566 External stage cache:
377 12:45:11.961367 IMD: root @ 0x7b3ff000 254 entries.
378 12:45:11.965001 IMD: root @ 0x7b3fec00 62 entries.
379 12:45:11.980340 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 12:45:11.986908 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 12:45:11.992928 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 12:45:12.006831 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 12:45:12.013331 cse_lite: Skip switching to RW in the recovery path
384 12:45:12.013818 8 DIMMs found
385 12:45:12.014212 SMM Memory Map
386 12:45:12.019959 SMRAM : 0x7b000000 0x800000
387 12:45:12.023705 Subregion 0: 0x7b000000 0x200000
388 12:45:12.027169 Subregion 1: 0x7b200000 0x200000
389 12:45:12.030085 Subregion 2: 0x7b400000 0x400000
390 12:45:12.030591 top_of_ram = 0x77000000
391 12:45:12.036497 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 12:45:12.043111 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 12:45:12.046688 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 12:45:12.053251 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 12:45:12.060022 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 12:45:12.066315 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 12:45:12.076774 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 12:45:12.083312 Processing 211 relocs. Offset value of 0x74c0b000
399 12:45:12.090048 BS: romstage times (exec / console): total (unknown) / 277 ms
400 12:45:12.095183
401 12:45:12.095745
402 12:45:12.106087 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 12:45:12.109575 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 12:45:12.116180 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 12:45:12.126133 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 12:45:12.132725 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 12:45:12.139400 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 12:45:12.182484 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 12:45:12.188874 Processing 5008 relocs. Offset value of 0x75d98000
410 12:45:12.192651 BS: postcar times (exec / console): total (unknown) / 59 ms
411 12:45:12.195494
412 12:45:12.195984
413 12:45:12.205417 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 12:45:12.206050 Normal boot
415 12:45:12.208517 FW_CONFIG value is 0x804c02
416 12:45:12.212112 PCI: 00:07.0 disabled by fw_config
417 12:45:12.215494 PCI: 00:07.1 disabled by fw_config
418 12:45:12.218496 PCI: 00:0d.2 disabled by fw_config
419 12:45:12.225672 PCI: 00:1c.7 disabled by fw_config
420 12:45:12.228707 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:45:12.235325 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:45:12.238892 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 12:45:12.245321 GENERIC: 0.0 disabled by fw_config
424 12:45:12.248887 GENERIC: 1.0 disabled by fw_config
425 12:45:12.252142 fw_config match found: DB_USB=USB3_ACTIVE
426 12:45:12.255232 fw_config match found: DB_USB=USB3_ACTIVE
427 12:45:12.258578 fw_config match found: DB_USB=USB3_ACTIVE
428 12:45:12.264972 fw_config match found: DB_USB=USB3_ACTIVE
429 12:45:12.268518 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 12:45:12.275448 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 12:45:12.285257 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 12:45:12.291649 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 12:45:12.295295 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 12:45:12.301930 microcode: Update skipped, already up-to-date
435 12:45:12.307935 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 12:45:12.335689 Detected 4 core, 8 thread CPU.
437 12:45:12.339146 Setting up SMI for CPU
438 12:45:12.342717 IED base = 0x7b400000
439 12:45:12.343183 IED size = 0x00400000
440 12:45:12.345838 Will perform SMM setup.
441 12:45:12.352238 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
442 12:45:12.359248 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 12:45:12.365534 Processing 16 relocs. Offset value of 0x00030000
444 12:45:12.369139 Attempting to start 7 APs
445 12:45:12.372108 Waiting for 10ms after sending INIT.
446 12:45:12.387639 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 12:45:12.391412 AP: slot 3 apic_id 7.
448 12:45:12.394381 AP: slot 5 apic_id 4.
449 12:45:12.394995 AP: slot 4 apic_id 5.
450 12:45:12.397915 AP: slot 7 apic_id 6.
451 12:45:12.398437 done.
452 12:45:12.400790 AP: slot 2 apic_id 3.
453 12:45:12.404342 Waiting for 2nd SIPI to complete...done.
454 12:45:12.407505 AP: slot 6 apic_id 2.
455 12:45:12.414483 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 12:45:12.420684 Processing 13 relocs. Offset value of 0x00038000
457 12:45:12.424206 Unable to locate Global NVS
458 12:45:12.430786 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 12:45:12.433882 Installing permanent SMM handler to 0x7b000000
460 12:45:12.444139 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 12:45:12.447484 Processing 794 relocs. Offset value of 0x7b010000
462 12:45:12.457169 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 12:45:12.460763 Processing 13 relocs. Offset value of 0x7b008000
464 12:45:12.467075 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 12:45:12.473758 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 12:45:12.480385 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 12:45:12.483852 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 12:45:12.490418 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 12:45:12.496978 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 12:45:12.503497 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 12:45:12.506903 Unable to locate Global NVS
472 12:45:12.513447 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 12:45:12.517074 Clearing SMI status registers
474 12:45:12.519871 SMI_STS: PM1
475 12:45:12.520408 PM1_STS: PWRBTN
476 12:45:12.526296 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 12:45:12.529984 In relocation handler: CPU 0
478 12:45:12.532826 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 12:45:12.539511 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:45:12.543090 Relocation complete.
481 12:45:12.549497 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 12:45:12.553045 In relocation handler: CPU 1
483 12:45:12.556030 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 12:45:12.559444 Relocation complete.
485 12:45:12.565997 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
486 12:45:12.569296 In relocation handler: CPU 5
487 12:45:12.572353 New SMBASE=0x7affec00 IEDBASE=0x7b400000
488 12:45:12.575804 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 12:45:12.579493 Relocation complete.
490 12:45:12.586050 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
491 12:45:12.588946 In relocation handler: CPU 4
492 12:45:12.592562 New SMBASE=0x7afff000 IEDBASE=0x7b400000
493 12:45:12.595646 Relocation complete.
494 12:45:12.602621 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
495 12:45:12.605672 In relocation handler: CPU 7
496 12:45:12.609133 New SMBASE=0x7affe400 IEDBASE=0x7b400000
497 12:45:12.615826 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 12:45:12.616337 Relocation complete.
499 12:45:12.625617 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
500 12:45:12.629181 In relocation handler: CPU 3
501 12:45:12.632491 New SMBASE=0x7afff400 IEDBASE=0x7b400000
502 12:45:12.632943 Relocation complete.
503 12:45:12.642160 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
504 12:45:12.642636 In relocation handler: CPU 6
505 12:45:12.648742 New SMBASE=0x7affe800 IEDBASE=0x7b400000
506 12:45:12.652406 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 12:45:12.655274 Relocation complete.
508 12:45:12.661882 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
509 12:45:12.665346 In relocation handler: CPU 2
510 12:45:12.668737 New SMBASE=0x7afff800 IEDBASE=0x7b400000
511 12:45:12.672252 Relocation complete.
512 12:45:12.672690 Initializing CPU #0
513 12:45:12.675804 CPU: vendor Intel device 806c1
514 12:45:12.682186 CPU: family 06, model 8c, stepping 01
515 12:45:12.682625 Clearing out pending MCEs
516 12:45:12.685816 Setting up local APIC...
517 12:45:12.688643 apic_id: 0x00 done.
518 12:45:12.692498 Turbo is available but hidden
519 12:45:12.695354 Turbo is available and visible
520 12:45:12.698354 microcode: Update skipped, already up-to-date
521 12:45:12.701904 CPU #0 initialized
522 12:45:12.702339 Initializing CPU #5
523 12:45:12.705464 Initializing CPU #4
524 12:45:12.708502 CPU: vendor Intel device 806c1
525 12:45:12.711989 CPU: family 06, model 8c, stepping 01
526 12:45:12.715034 Initializing CPU #1
527 12:45:12.715475 Initializing CPU #3
528 12:45:12.718613 Initializing CPU #7
529 12:45:12.722124 CPU: vendor Intel device 806c1
530 12:45:12.724902 CPU: family 06, model 8c, stepping 01
531 12:45:12.728392 CPU: vendor Intel device 806c1
532 12:45:12.731776 CPU: family 06, model 8c, stepping 01
533 12:45:12.734915 Clearing out pending MCEs
534 12:45:12.738327 Clearing out pending MCEs
535 12:45:12.741445 Setting up local APIC...
536 12:45:12.741885 Initializing CPU #6
537 12:45:12.744975 Initializing CPU #2
538 12:45:12.748705 CPU: vendor Intel device 806c1
539 12:45:12.751582 CPU: family 06, model 8c, stepping 01
540 12:45:12.755154 CPU: vendor Intel device 806c1
541 12:45:12.758100 CPU: family 06, model 8c, stepping 01
542 12:45:12.761853 Clearing out pending MCEs
543 12:45:12.762290 Clearing out pending MCEs
544 12:45:12.765802 Setting up local APIC...
545 12:45:12.769380 Clearing out pending MCEs
546 12:45:12.772991 CPU: vendor Intel device 806c1
547 12:45:12.775977 CPU: family 06, model 8c, stepping 01
548 12:45:12.779613 Setting up local APIC...
549 12:45:12.782417 CPU: vendor Intel device 806c1
550 12:45:12.785890 CPU: family 06, model 8c, stepping 01
551 12:45:12.786328 Clearing out pending MCEs
552 12:45:12.789343 apic_id: 0x04 done.
553 12:45:12.792788 Setting up local APIC...
554 12:45:12.795759 Setting up local APIC...
555 12:45:12.796171 Setting up local APIC...
556 12:45:12.799372 apic_id: 0x05 done.
557 12:45:12.802422 microcode: Update skipped, already up-to-date
558 12:45:12.808908 microcode: Update skipped, already up-to-date
559 12:45:12.809458 CPU #5 initialized
560 12:45:12.812551 apic_id: 0x03 done.
561 12:45:12.816006 apic_id: 0x02 done.
562 12:45:12.818983 microcode: Update skipped, already up-to-date
563 12:45:12.822543 microcode: Update skipped, already up-to-date
564 12:45:12.826015 CPU #2 initialized
565 12:45:12.829125 CPU #6 initialized
566 12:45:12.829567 apic_id: 0x07 done.
567 12:45:12.832618 apic_id: 0x06 done.
568 12:45:12.835530 microcode: Update skipped, already up-to-date
569 12:45:12.842021 microcode: Update skipped, already up-to-date
570 12:45:12.842268 CPU #3 initialized
571 12:45:12.845611 CPU #7 initialized
572 12:45:12.845803 CPU #4 initialized
573 12:45:12.848550 Clearing out pending MCEs
574 12:45:12.852206 Setting up local APIC...
575 12:45:12.855175 apic_id: 0x01 done.
576 12:45:12.858638 microcode: Update skipped, already up-to-date
577 12:45:12.862159 CPU #1 initialized
578 12:45:12.865001 bsp_do_flight_plan done after 457 msecs.
579 12:45:12.868716 CPU: frequency set to 4400 MHz
580 12:45:12.868818 Enabling SMIs.
581 12:45:12.874956 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 12:45:12.892334 SATAXPCIE1 indicates PCIe NVMe is present
583 12:45:12.895786 Probing TPM: done!
584 12:45:12.899379 Connected to device vid:did:rid of 1ae0:0028:00
585 12:45:12.909648 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
586 12:45:12.912747 Initialized TPM device CR50 revision 0
587 12:45:12.916363 Enabling S0i3.4
588 12:45:12.922948 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 12:45:12.925943 Found a VBT of 8704 bytes after decompression
590 12:45:12.932569 cse_lite: CSE RO boot. HybridStorageMode disabled
591 12:45:12.939671 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 12:45:13.014459 FSPS returned 0
593 12:45:13.017529 Executing Phase 1 of FspMultiPhaseSiInit
594 12:45:13.027556 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 12:45:13.030486 port C0 DISC req: usage 1 usb3 1 usb2 5
596 12:45:13.034102 Raw Buffer output 0 00000511
597 12:45:13.036937 Raw Buffer output 1 00000000
598 12:45:13.041159 pmc_send_ipc_cmd succeeded
599 12:45:13.047924 port C1 DISC req: usage 1 usb3 2 usb2 3
600 12:45:13.048059 Raw Buffer output 0 00000321
601 12:45:13.050702 Raw Buffer output 1 00000000
602 12:45:13.054862 pmc_send_ipc_cmd succeeded
603 12:45:13.060375 Detected 4 core, 8 thread CPU.
604 12:45:13.063288 Detected 4 core, 8 thread CPU.
605 12:45:13.263870 Display FSP Version Info HOB
606 12:45:13.267381 Reference Code - CPU = a.0.4c.31
607 12:45:13.270281 uCode Version = 0.0.0.86
608 12:45:13.273987 TXT ACM version = ff.ff.ff.ffff
609 12:45:13.277169 Reference Code - ME = a.0.4c.31
610 12:45:13.280555 MEBx version = 0.0.0.0
611 12:45:13.284228 ME Firmware Version = Consumer SKU
612 12:45:13.286944 Reference Code - PCH = a.0.4c.31
613 12:45:13.290415 PCH-CRID Status = Disabled
614 12:45:13.293926 PCH-CRID Original Value = ff.ff.ff.ffff
615 12:45:13.297387 PCH-CRID New Value = ff.ff.ff.ffff
616 12:45:13.300284 OPROM - RST - RAID = ff.ff.ff.ffff
617 12:45:13.303725 PCH Hsio Version = 4.0.0.0
618 12:45:13.307140 Reference Code - SA - System Agent = a.0.4c.31
619 12:45:13.310228 Reference Code - MRC = 2.0.0.1
620 12:45:13.313726 SA - PCIe Version = a.0.4c.31
621 12:45:13.317322 SA-CRID Status = Disabled
622 12:45:13.320728 SA-CRID Original Value = 0.0.0.1
623 12:45:13.323743 SA-CRID New Value = 0.0.0.1
624 12:45:13.327405 OPROM - VBIOS = ff.ff.ff.ffff
625 12:45:13.330280 IO Manageability Engine FW Version = 11.1.4.0
626 12:45:13.333868 PHY Build Version = 0.0.0.e0
627 12:45:13.337377 Thunderbolt(TM) FW Version = 0.0.0.0
628 12:45:13.343962 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 12:45:13.348088 ITSS IRQ Polarities Before:
630 12:45:13.348571 IPC0: 0xffffffff
631 12:45:13.348958 IPC1: 0xffffffff
632 12:45:13.351189 IPC2: 0xffffffff
633 12:45:13.354834 IPC3: 0xffffffff
634 12:45:13.355321 ITSS IRQ Polarities After:
635 12:45:13.357927 IPC0: 0xffffffff
636 12:45:13.358412 IPC1: 0xffffffff
637 12:45:13.360787 IPC2: 0xffffffff
638 12:45:13.364421 IPC3: 0xffffffff
639 12:45:13.367559 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 12:45:13.377512 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 12:45:13.391135 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 12:45:13.404005 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 12:45:13.410854 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
644 12:45:13.411369 Enumerating buses...
645 12:45:13.417536 Show all devs... Before device enumeration.
646 12:45:13.418195 Root Device: enabled 1
647 12:45:13.420622 DOMAIN: 0000: enabled 1
648 12:45:13.424200 CPU_CLUSTER: 0: enabled 1
649 12:45:13.427157 PCI: 00:00.0: enabled 1
650 12:45:13.427665 PCI: 00:02.0: enabled 1
651 12:45:13.430677 PCI: 00:04.0: enabled 1
652 12:45:13.434185 PCI: 00:05.0: enabled 1
653 12:45:13.434628 PCI: 00:06.0: enabled 0
654 12:45:13.437064 PCI: 00:07.0: enabled 0
655 12:45:13.440541 PCI: 00:07.1: enabled 0
656 12:45:13.444097 PCI: 00:07.2: enabled 0
657 12:45:13.444541 PCI: 00:07.3: enabled 0
658 12:45:13.447002 PCI: 00:08.0: enabled 1
659 12:45:13.450596 PCI: 00:09.0: enabled 0
660 12:45:13.453497 PCI: 00:0a.0: enabled 0
661 12:45:13.453935 PCI: 00:0d.0: enabled 1
662 12:45:13.457099 PCI: 00:0d.1: enabled 0
663 12:45:13.460105 PCI: 00:0d.2: enabled 0
664 12:45:13.463897 PCI: 00:0d.3: enabled 0
665 12:45:13.464335 PCI: 00:0e.0: enabled 0
666 12:45:13.466983 PCI: 00:10.2: enabled 1
667 12:45:13.470649 PCI: 00:10.6: enabled 0
668 12:45:13.473703 PCI: 00:10.7: enabled 0
669 12:45:13.474143 PCI: 00:12.0: enabled 0
670 12:45:13.477162 PCI: 00:12.6: enabled 0
671 12:45:13.480127 PCI: 00:13.0: enabled 0
672 12:45:13.480598 PCI: 00:14.0: enabled 1
673 12:45:13.483752 PCI: 00:14.1: enabled 0
674 12:45:13.487381 PCI: 00:14.2: enabled 1
675 12:45:13.490338 PCI: 00:14.3: enabled 1
676 12:45:13.490814 PCI: 00:15.0: enabled 1
677 12:45:13.493728 PCI: 00:15.1: enabled 1
678 12:45:13.497235 PCI: 00:15.2: enabled 1
679 12:45:13.500272 PCI: 00:15.3: enabled 1
680 12:45:13.500735 PCI: 00:16.0: enabled 1
681 12:45:13.503691 PCI: 00:16.1: enabled 0
682 12:45:13.506770 PCI: 00:16.2: enabled 0
683 12:45:13.510260 PCI: 00:16.3: enabled 0
684 12:45:13.510698 PCI: 00:16.4: enabled 0
685 12:45:13.513790 PCI: 00:16.5: enabled 0
686 12:45:13.516630 PCI: 00:17.0: enabled 1
687 12:45:13.520267 PCI: 00:19.0: enabled 0
688 12:45:13.520823 PCI: 00:19.1: enabled 1
689 12:45:13.523852 PCI: 00:19.2: enabled 0
690 12:45:13.526880 PCI: 00:1c.0: enabled 1
691 12:45:13.527331 PCI: 00:1c.1: enabled 0
692 12:45:13.530393 PCI: 00:1c.2: enabled 0
693 12:45:13.533255 PCI: 00:1c.3: enabled 0
694 12:45:13.536837 PCI: 00:1c.4: enabled 0
695 12:45:13.537317 PCI: 00:1c.5: enabled 0
696 12:45:13.540327 PCI: 00:1c.6: enabled 1
697 12:45:13.543263 PCI: 00:1c.7: enabled 0
698 12:45:13.546982 PCI: 00:1d.0: enabled 1
699 12:45:13.547487 PCI: 00:1d.1: enabled 0
700 12:45:13.549806 PCI: 00:1d.2: enabled 1
701 12:45:13.553542 PCI: 00:1d.3: enabled 0
702 12:45:13.556467 PCI: 00:1e.0: enabled 1
703 12:45:13.556902 PCI: 00:1e.1: enabled 0
704 12:45:13.560198 PCI: 00:1e.2: enabled 1
705 12:45:13.563220 PCI: 00:1e.3: enabled 1
706 12:45:13.563652 PCI: 00:1f.0: enabled 1
707 12:45:13.566899 PCI: 00:1f.1: enabled 0
708 12:45:13.569828 PCI: 00:1f.2: enabled 1
709 12:45:13.573461 PCI: 00:1f.3: enabled 1
710 12:45:13.573915 PCI: 00:1f.4: enabled 0
711 12:45:13.576545 PCI: 00:1f.5: enabled 1
712 12:45:13.580320 PCI: 00:1f.6: enabled 0
713 12:45:13.583651 PCI: 00:1f.7: enabled 0
714 12:45:13.584089 APIC: 00: enabled 1
715 12:45:13.586571 GENERIC: 0.0: enabled 1
716 12:45:13.589596 GENERIC: 0.0: enabled 1
717 12:45:13.590026 GENERIC: 1.0: enabled 1
718 12:45:13.593340 GENERIC: 0.0: enabled 1
719 12:45:13.596832 GENERIC: 1.0: enabled 1
720 12:45:13.599782 USB0 port 0: enabled 1
721 12:45:13.600216 GENERIC: 0.0: enabled 1
722 12:45:13.603158 USB0 port 0: enabled 1
723 12:45:13.606578 GENERIC: 0.0: enabled 1
724 12:45:13.607036 I2C: 00:1a: enabled 1
725 12:45:13.610021 I2C: 00:31: enabled 1
726 12:45:13.612933 I2C: 00:32: enabled 1
727 12:45:13.616609 I2C: 00:10: enabled 1
728 12:45:13.617039 I2C: 00:15: enabled 1
729 12:45:13.620170 GENERIC: 0.0: enabled 0
730 12:45:13.623104 GENERIC: 1.0: enabled 0
731 12:45:13.623537 GENERIC: 0.0: enabled 1
732 12:45:13.626772 SPI: 00: enabled 1
733 12:45:13.629827 SPI: 00: enabled 1
734 12:45:13.630261 PNP: 0c09.0: enabled 1
735 12:45:13.633319 GENERIC: 0.0: enabled 1
736 12:45:13.636275 USB3 port 0: enabled 1
737 12:45:13.636707 USB3 port 1: enabled 1
738 12:45:13.639828 USB3 port 2: enabled 0
739 12:45:13.643353 USB3 port 3: enabled 0
740 12:45:13.646280 USB2 port 0: enabled 0
741 12:45:13.646719 USB2 port 1: enabled 1
742 12:45:13.649864 USB2 port 2: enabled 1
743 12:45:13.652739 USB2 port 3: enabled 0
744 12:45:13.653173 USB2 port 4: enabled 1
745 12:45:13.656296 USB2 port 5: enabled 0
746 12:45:13.659901 USB2 port 6: enabled 0
747 12:45:13.660431 USB2 port 7: enabled 0
748 12:45:13.662835 USB2 port 8: enabled 0
749 12:45:13.666858 USB2 port 9: enabled 0
750 12:45:13.669581 USB3 port 0: enabled 0
751 12:45:13.670120 USB3 port 1: enabled 1
752 12:45:13.673157 USB3 port 2: enabled 0
753 12:45:13.676214 USB3 port 3: enabled 0
754 12:45:13.676700 GENERIC: 0.0: enabled 1
755 12:45:13.679992 GENERIC: 1.0: enabled 1
756 12:45:13.682691 APIC: 01: enabled 1
757 12:45:13.683133 APIC: 03: enabled 1
758 12:45:13.686358 APIC: 07: enabled 1
759 12:45:13.689217 APIC: 05: enabled 1
760 12:45:13.689650 APIC: 04: enabled 1
761 12:45:13.692769 APIC: 02: enabled 1
762 12:45:13.696308 APIC: 06: enabled 1
763 12:45:13.696743 Compare with tree...
764 12:45:13.699307 Root Device: enabled 1
765 12:45:13.702716 DOMAIN: 0000: enabled 1
766 12:45:13.703168 PCI: 00:00.0: enabled 1
767 12:45:13.706311 PCI: 00:02.0: enabled 1
768 12:45:13.709737 PCI: 00:04.0: enabled 1
769 12:45:13.712453 GENERIC: 0.0: enabled 1
770 12:45:13.716120 PCI: 00:05.0: enabled 1
771 12:45:13.716569 PCI: 00:06.0: enabled 0
772 12:45:13.719203 PCI: 00:07.0: enabled 0
773 12:45:13.722726 GENERIC: 0.0: enabled 1
774 12:45:13.726309 PCI: 00:07.1: enabled 0
775 12:45:13.729734 GENERIC: 1.0: enabled 1
776 12:45:13.730276 PCI: 00:07.2: enabled 0
777 12:45:13.732519 GENERIC: 0.0: enabled 1
778 12:45:13.735944 PCI: 00:07.3: enabled 0
779 12:45:13.739008 GENERIC: 1.0: enabled 1
780 12:45:13.742456 PCI: 00:08.0: enabled 1
781 12:45:13.742914 PCI: 00:09.0: enabled 0
782 12:45:13.745814 PCI: 00:0a.0: enabled 0
783 12:45:13.749577 PCI: 00:0d.0: enabled 1
784 12:45:13.752479 USB0 port 0: enabled 1
785 12:45:13.755936 USB3 port 0: enabled 1
786 12:45:13.759486 USB3 port 1: enabled 1
787 12:45:13.759914 USB3 port 2: enabled 0
788 12:45:13.762387 USB3 port 3: enabled 0
789 12:45:13.766041 PCI: 00:0d.1: enabled 0
790 12:45:13.769200 PCI: 00:0d.2: enabled 0
791 12:45:13.772650 GENERIC: 0.0: enabled 1
792 12:45:13.773099 PCI: 00:0d.3: enabled 0
793 12:45:13.775781 PCI: 00:0e.0: enabled 0
794 12:45:13.779465 PCI: 00:10.2: enabled 1
795 12:45:13.782477 PCI: 00:10.6: enabled 0
796 12:45:13.785636 PCI: 00:10.7: enabled 0
797 12:45:13.786069 PCI: 00:12.0: enabled 0
798 12:45:13.789114 PCI: 00:12.6: enabled 0
799 12:45:13.792632 PCI: 00:13.0: enabled 0
800 12:45:13.795760 PCI: 00:14.0: enabled 1
801 12:45:13.799211 USB0 port 0: enabled 1
802 12:45:13.799643 USB2 port 0: enabled 0
803 12:45:13.802681 USB2 port 1: enabled 1
804 12:45:13.805594 USB2 port 2: enabled 1
805 12:45:13.808882 USB2 port 3: enabled 0
806 12:45:13.812245 USB2 port 4: enabled 1
807 12:45:13.812820 USB2 port 5: enabled 0
808 12:45:13.815862 USB2 port 6: enabled 0
809 12:45:13.819194 USB2 port 7: enabled 0
810 12:45:13.822119 USB2 port 8: enabled 0
811 12:45:13.825570 USB2 port 9: enabled 0
812 12:45:13.829219 USB3 port 0: enabled 0
813 12:45:13.829654 USB3 port 1: enabled 1
814 12:45:13.832210 USB3 port 2: enabled 0
815 12:45:13.835739 USB3 port 3: enabled 0
816 12:45:13.838726 PCI: 00:14.1: enabled 0
817 12:45:13.842313 PCI: 00:14.2: enabled 1
818 12:45:13.842782 PCI: 00:14.3: enabled 1
819 12:45:13.845304 GENERIC: 0.0: enabled 1
820 12:45:13.848657 PCI: 00:15.0: enabled 1
821 12:45:13.852102 I2C: 00:1a: enabled 1
822 12:45:13.855709 I2C: 00:31: enabled 1
823 12:45:13.856151 I2C: 00:32: enabled 1
824 12:45:13.858675 PCI: 00:15.1: enabled 1
825 12:45:13.861934 I2C: 00:10: enabled 1
826 12:45:13.865278 PCI: 00:15.2: enabled 1
827 12:45:13.868741 PCI: 00:15.3: enabled 1
828 12:45:13.869246 PCI: 00:16.0: enabled 1
829 12:45:13.871786 PCI: 00:16.1: enabled 0
830 12:45:13.875434 PCI: 00:16.2: enabled 0
831 12:45:13.878544 PCI: 00:16.3: enabled 0
832 12:45:13.879062 PCI: 00:16.4: enabled 0
833 12:45:13.882057 PCI: 00:16.5: enabled 0
834 12:45:13.885094 PCI: 00:17.0: enabled 1
835 12:45:13.888720 PCI: 00:19.0: enabled 0
836 12:45:13.891693 PCI: 00:19.1: enabled 1
837 12:45:13.892189 I2C: 00:15: enabled 1
838 12:45:13.895143 PCI: 00:19.2: enabled 0
839 12:45:13.898906 PCI: 00:1d.0: enabled 1
840 12:45:13.901784 GENERIC: 0.0: enabled 1
841 12:45:13.905267 PCI: 00:1e.0: enabled 1
842 12:45:13.905703 PCI: 00:1e.1: enabled 0
843 12:45:13.908116 PCI: 00:1e.2: enabled 1
844 12:45:13.911560 SPI: 00: enabled 1
845 12:45:13.914938 PCI: 00:1e.3: enabled 1
846 12:45:13.915451 SPI: 00: enabled 1
847 12:45:13.918359 PCI: 00:1f.0: enabled 1
848 12:45:13.921745 PNP: 0c09.0: enabled 1
849 12:45:13.925184 PCI: 00:1f.1: enabled 0
850 12:45:13.928196 PCI: 00:1f.2: enabled 1
851 12:45:13.928666 GENERIC: 0.0: enabled 1
852 12:45:13.931954 GENERIC: 0.0: enabled 1
853 12:45:13.935011 GENERIC: 1.0: enabled 1
854 12:45:13.938594 PCI: 00:1f.3: enabled 1
855 12:45:13.941402 PCI: 00:1f.4: enabled 0
856 12:45:13.941840 PCI: 00:1f.5: enabled 1
857 12:45:13.945019 PCI: 00:1f.6: enabled 0
858 12:45:13.948377 PCI: 00:1f.7: enabled 0
859 12:45:13.951270 CPU_CLUSTER: 0: enabled 1
860 12:45:13.955070 APIC: 00: enabled 1
861 12:45:13.955559 APIC: 01: enabled 1
862 12:45:14.006899 APIC: 03: enabled 1
863 12:45:14.007579 APIC: 07: enabled 1
864 12:45:14.008077 APIC: 05: enabled 1
865 12:45:14.008449 APIC: 04: enabled 1
866 12:45:14.008796 APIC: 02: enabled 1
867 12:45:14.009137 APIC: 06: enabled 1
868 12:45:14.009473 Root Device scanning...
869 12:45:14.009802 scan_static_bus for Root Device
870 12:45:14.010532 DOMAIN: 0000 enabled
871 12:45:14.011048 CPU_CLUSTER: 0 enabled
872 12:45:14.011614 DOMAIN: 0000 scanning...
873 12:45:14.012089 PCI: pci_scan_bus for bus 00
874 12:45:14.012446 PCI: 00:00.0 [8086/0000] ops
875 12:45:14.012782 PCI: 00:00.0 [8086/9a12] enabled
876 12:45:14.013107 PCI: 00:02.0 [8086/0000] bus ops
877 12:45:14.013488 PCI: 00:02.0 [8086/9a40] enabled
878 12:45:14.013927 PCI: 00:04.0 [8086/0000] bus ops
879 12:45:14.014315 PCI: 00:04.0 [8086/9a03] enabled
880 12:45:14.057054 PCI: 00:05.0 [8086/9a19] enabled
881 12:45:14.057644 PCI: 00:07.0 [0000/0000] hidden
882 12:45:14.058420 PCI: 00:08.0 [8086/9a11] enabled
883 12:45:14.058857 PCI: 00:0a.0 [8086/9a0d] disabled
884 12:45:14.059234 PCI: 00:0d.0 [8086/0000] bus ops
885 12:45:14.059583 PCI: 00:0d.0 [8086/9a13] enabled
886 12:45:14.059924 PCI: 00:14.0 [8086/0000] bus ops
887 12:45:14.060254 PCI: 00:14.0 [8086/a0ed] enabled
888 12:45:14.060577 PCI: 00:14.2 [8086/a0ef] enabled
889 12:45:14.060917 PCI: 00:14.3 [8086/0000] bus ops
890 12:45:14.061307 PCI: 00:14.3 [8086/a0f0] enabled
891 12:45:14.061632 PCI: 00:15.0 [8086/0000] bus ops
892 12:45:14.061948 PCI: 00:15.0 [8086/a0e8] enabled
893 12:45:14.062264 PCI: 00:15.1 [8086/0000] bus ops
894 12:45:14.062578 PCI: 00:15.1 [8086/a0e9] enabled
895 12:45:14.084180 PCI: 00:15.2 [8086/0000] bus ops
896 12:45:14.084736 PCI: 00:15.2 [8086/a0ea] enabled
897 12:45:14.085124 PCI: 00:15.3 [8086/0000] bus ops
898 12:45:14.085484 PCI: 00:15.3 [8086/a0eb] enabled
899 12:45:14.086206 PCI: 00:16.0 [8086/0000] ops
900 12:45:14.086578 PCI: 00:16.0 [8086/a0e0] enabled
901 12:45:14.086978 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 12:45:14.087677 PCI: 00:19.0 [8086/0000] bus ops
903 12:45:14.088052 PCI: 00:19.0 [8086/a0c5] disabled
904 12:45:14.091110 PCI: 00:19.1 [8086/0000] bus ops
905 12:45:14.094097 PCI: 00:19.1 [8086/a0c6] enabled
906 12:45:14.097675 PCI: 00:1d.0 [8086/0000] bus ops
907 12:45:14.101204 PCI: 00:1d.0 [8086/a0b0] enabled
908 12:45:14.104219 PCI: 00:1e.0 [8086/0000] ops
909 12:45:14.107638 PCI: 00:1e.0 [8086/a0a8] enabled
910 12:45:14.111005 PCI: 00:1e.2 [8086/0000] bus ops
911 12:45:14.114016 PCI: 00:1e.2 [8086/a0aa] enabled
912 12:45:14.117563 PCI: 00:1e.3 [8086/0000] bus ops
913 12:45:14.121024 PCI: 00:1e.3 [8086/a0ab] enabled
914 12:45:14.124453 PCI: 00:1f.0 [8086/0000] bus ops
915 12:45:14.127283 PCI: 00:1f.0 [8086/a087] enabled
916 12:45:14.130710 RTC Init
917 12:45:14.133813 Set power on after power failure.
918 12:45:14.134346 Disabling Deep S3
919 12:45:14.137189 Disabling Deep S3
920 12:45:14.137679 Disabling Deep S4
921 12:45:14.140796 Disabling Deep S4
922 12:45:14.141269 Disabling Deep S5
923 12:45:14.143717 Disabling Deep S5
924 12:45:14.147369 PCI: 00:1f.2 [0000/0000] hidden
925 12:45:14.150251 PCI: 00:1f.3 [8086/0000] bus ops
926 12:45:14.153884 PCI: 00:1f.3 [8086/a0c8] enabled
927 12:45:14.157171 PCI: 00:1f.5 [8086/0000] bus ops
928 12:45:14.160237 PCI: 00:1f.5 [8086/a0a4] enabled
929 12:45:14.163613 PCI: Leftover static devices:
930 12:45:14.164051 PCI: 00:10.2
931 12:45:14.167192 PCI: 00:10.6
932 12:45:14.167632 PCI: 00:10.7
933 12:45:14.170632 PCI: 00:06.0
934 12:45:14.171135 PCI: 00:07.1
935 12:45:14.171489 PCI: 00:07.2
936 12:45:14.173778 PCI: 00:07.3
937 12:45:14.174219 PCI: 00:09.0
938 12:45:14.177314 PCI: 00:0d.1
939 12:45:14.177753 PCI: 00:0d.2
940 12:45:14.178104 PCI: 00:0d.3
941 12:45:14.180588 PCI: 00:0e.0
942 12:45:14.181124 PCI: 00:12.0
943 12:45:14.183998 PCI: 00:12.6
944 12:45:14.184480 PCI: 00:13.0
945 12:45:14.186881 PCI: 00:14.1
946 12:45:14.187327 PCI: 00:16.1
947 12:45:14.187681 PCI: 00:16.2
948 12:45:14.190575 PCI: 00:16.3
949 12:45:14.191066 PCI: 00:16.4
950 12:45:14.193718 PCI: 00:16.5
951 12:45:14.194162 PCI: 00:17.0
952 12:45:14.194516 PCI: 00:19.2
953 12:45:14.197019 PCI: 00:1e.1
954 12:45:14.197471 PCI: 00:1f.1
955 12:45:14.200517 PCI: 00:1f.4
956 12:45:14.200961 PCI: 00:1f.6
957 12:45:14.201311 PCI: 00:1f.7
958 12:45:14.203487 PCI: Check your devicetree.cb.
959 12:45:14.207051 PCI: 00:02.0 scanning...
960 12:45:14.210454 scan_generic_bus for PCI: 00:02.0
961 12:45:14.213551 scan_generic_bus for PCI: 00:02.0 done
962 12:45:14.220096 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 12:45:14.223445 PCI: 00:04.0 scanning...
964 12:45:14.226802 scan_generic_bus for PCI: 00:04.0
965 12:45:14.227290 GENERIC: 0.0 enabled
966 12:45:14.233490 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 12:45:14.240007 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 12:45:14.240468 PCI: 00:0d.0 scanning...
969 12:45:14.243560 scan_static_bus for PCI: 00:0d.0
970 12:45:14.246606 USB0 port 0 enabled
971 12:45:14.250013 USB0 port 0 scanning...
972 12:45:14.253060 scan_static_bus for USB0 port 0
973 12:45:14.256524 USB3 port 0 enabled
974 12:45:14.256714 USB3 port 1 enabled
975 12:45:14.259853 USB3 port 2 disabled
976 12:45:14.260012 USB3 port 3 disabled
977 12:45:14.262949 USB3 port 0 scanning...
978 12:45:14.266366 scan_static_bus for USB3 port 0
979 12:45:14.269843 scan_static_bus for USB3 port 0 done
980 12:45:14.276535 scan_bus: bus USB3 port 0 finished in 6 msecs
981 12:45:14.276645 USB3 port 1 scanning...
982 12:45:14.279501 scan_static_bus for USB3 port 1
983 12:45:14.286632 scan_static_bus for USB3 port 1 done
984 12:45:14.289651 scan_bus: bus USB3 port 1 finished in 6 msecs
985 12:45:14.293173 scan_static_bus for USB0 port 0 done
986 12:45:14.296104 scan_bus: bus USB0 port 0 finished in 43 msecs
987 12:45:14.302656 scan_static_bus for PCI: 00:0d.0 done
988 12:45:14.306305 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 12:45:14.309294 PCI: 00:14.0 scanning...
990 12:45:14.312666 scan_static_bus for PCI: 00:14.0
991 12:45:14.316136 USB0 port 0 enabled
992 12:45:14.316224 USB0 port 0 scanning...
993 12:45:14.319598 scan_static_bus for USB0 port 0
994 12:45:14.322961 USB2 port 0 disabled
995 12:45:14.325951 USB2 port 1 enabled
996 12:45:14.326045 USB2 port 2 enabled
997 12:45:14.329391 USB2 port 3 disabled
998 12:45:14.329479 USB2 port 4 enabled
999 12:45:14.332934 USB2 port 5 disabled
1000 12:45:14.335810 USB2 port 6 disabled
1001 12:45:14.335896 USB2 port 7 disabled
1002 12:45:14.339309 USB2 port 8 disabled
1003 12:45:14.342852 USB2 port 9 disabled
1004 12:45:14.342938 USB3 port 0 disabled
1005 12:45:14.345817 USB3 port 1 enabled
1006 12:45:14.349362 USB3 port 2 disabled
1007 12:45:14.349448 USB3 port 3 disabled
1008 12:45:14.352399 USB2 port 1 scanning...
1009 12:45:14.355855 scan_static_bus for USB2 port 1
1010 12:45:14.359432 scan_static_bus for USB2 port 1 done
1011 12:45:14.365872 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 12:45:14.365981 USB2 port 2 scanning...
1013 12:45:14.368743 scan_static_bus for USB2 port 2
1014 12:45:14.372544 scan_static_bus for USB2 port 2 done
1015 12:45:14.378856 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 12:45:14.382472 USB2 port 4 scanning...
1017 12:45:14.385497 scan_static_bus for USB2 port 4
1018 12:45:14.389066 scan_static_bus for USB2 port 4 done
1019 12:45:14.392083 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 12:45:14.395638 USB3 port 1 scanning...
1021 12:45:14.398552 scan_static_bus for USB3 port 1
1022 12:45:14.402092 scan_static_bus for USB3 port 1 done
1023 12:45:14.405604 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 12:45:14.412017 scan_static_bus for USB0 port 0 done
1025 12:45:14.415479 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 12:45:14.418500 scan_static_bus for PCI: 00:14.0 done
1027 12:45:14.425482 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1028 12:45:14.425568 PCI: 00:14.3 scanning...
1029 12:45:14.428444 scan_static_bus for PCI: 00:14.3
1030 12:45:14.431764 GENERIC: 0.0 enabled
1031 12:45:14.435285 scan_static_bus for PCI: 00:14.3 done
1032 12:45:14.441794 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 12:45:14.441880 PCI: 00:15.0 scanning...
1034 12:45:14.445302 scan_static_bus for PCI: 00:15.0
1035 12:45:14.448266 I2C: 00:1a enabled
1036 12:45:14.451800 I2C: 00:31 enabled
1037 12:45:14.451886 I2C: 00:32 enabled
1038 12:45:14.454867 scan_static_bus for PCI: 00:15.0 done
1039 12:45:14.461886 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 12:45:14.465372 PCI: 00:15.1 scanning...
1041 12:45:14.468159 scan_static_bus for PCI: 00:15.1
1042 12:45:14.468245 I2C: 00:10 enabled
1043 12:45:14.471576 scan_static_bus for PCI: 00:15.1 done
1044 12:45:14.478003 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 12:45:14.481648 PCI: 00:15.2 scanning...
1046 12:45:14.484672 scan_static_bus for PCI: 00:15.2
1047 12:45:14.488265 scan_static_bus for PCI: 00:15.2 done
1048 12:45:14.491391 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 12:45:14.495001 PCI: 00:15.3 scanning...
1050 12:45:14.497895 scan_static_bus for PCI: 00:15.3
1051 12:45:14.501636 scan_static_bus for PCI: 00:15.3 done
1052 12:45:14.508352 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 12:45:14.508452 PCI: 00:19.1 scanning...
1054 12:45:14.511707 scan_static_bus for PCI: 00:19.1
1055 12:45:14.514702 I2C: 00:15 enabled
1056 12:45:14.518249 scan_static_bus for PCI: 00:19.1 done
1057 12:45:14.524596 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 12:45:14.524688 PCI: 00:1d.0 scanning...
1059 12:45:14.531108 do_pci_scan_bridge for PCI: 00:1d.0
1060 12:45:14.531196 PCI: pci_scan_bus for bus 01
1061 12:45:14.534639 PCI: 01:00.0 [15b7/5009] enabled
1062 12:45:14.538173 GENERIC: 0.0 enabled
1063 12:45:14.541735 Enabling Common Clock Configuration
1064 12:45:14.548089 L1 Sub-State supported from root port 29
1065 12:45:14.548178 L1 Sub-State Support = 0x5
1066 12:45:14.551053 CommonModeRestoreTime = 0x28
1067 12:45:14.557718 Power On Value = 0x16, Power On Scale = 0x0
1068 12:45:14.557804 ASPM: Enabled L1
1069 12:45:14.561271 PCIe: Max_Payload_Size adjusted to 128
1070 12:45:14.567652 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 12:45:14.571036 PCI: 00:1e.2 scanning...
1072 12:45:14.573984 scan_generic_bus for PCI: 00:1e.2
1073 12:45:14.574068 SPI: 00 enabled
1074 12:45:14.581017 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 12:45:14.583988 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 12:45:14.587583 PCI: 00:1e.3 scanning...
1077 12:45:14.591149 scan_generic_bus for PCI: 00:1e.3
1078 12:45:14.594214 SPI: 00 enabled
1079 12:45:14.600732 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 12:45:14.604369 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 12:45:14.607361 PCI: 00:1f.0 scanning...
1082 12:45:14.610927 scan_static_bus for PCI: 00:1f.0
1083 12:45:14.611013 PNP: 0c09.0 enabled
1084 12:45:14.614042 PNP: 0c09.0 scanning...
1085 12:45:14.617263 scan_static_bus for PNP: 0c09.0
1086 12:45:14.620806 scan_static_bus for PNP: 0c09.0 done
1087 12:45:14.627373 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 12:45:14.630863 scan_static_bus for PCI: 00:1f.0 done
1089 12:45:14.634402 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 12:45:14.637173 PCI: 00:1f.2 scanning...
1091 12:45:14.640677 scan_static_bus for PCI: 00:1f.2
1092 12:45:14.644177 GENERIC: 0.0 enabled
1093 12:45:14.647394 GENERIC: 0.0 scanning...
1094 12:45:14.650907 scan_static_bus for GENERIC: 0.0
1095 12:45:14.650993 GENERIC: 0.0 enabled
1096 12:45:14.653960 GENERIC: 1.0 enabled
1097 12:45:14.657510 scan_static_bus for GENERIC: 0.0 done
1098 12:45:14.663670 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 12:45:14.667195 scan_static_bus for PCI: 00:1f.2 done
1100 12:45:14.670594 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 12:45:14.673520 PCI: 00:1f.3 scanning...
1102 12:45:14.676908 scan_static_bus for PCI: 00:1f.3
1103 12:45:14.680597 scan_static_bus for PCI: 00:1f.3 done
1104 12:45:14.686574 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 12:45:14.686660 PCI: 00:1f.5 scanning...
1106 12:45:14.693332 scan_generic_bus for PCI: 00:1f.5
1107 12:45:14.696859 scan_generic_bus for PCI: 00:1f.5 done
1108 12:45:14.700183 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 12:45:14.706766 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1110 12:45:14.709770 scan_static_bus for Root Device done
1111 12:45:14.713316 scan_bus: bus Root Device finished in 736 msecs
1112 12:45:14.713407 done
1113 12:45:14.719963 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1114 12:45:14.723463 Chrome EC: UHEPI supported
1115 12:45:14.730044 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 12:45:14.736632 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 12:45:14.739535 SPI flash protection: WPSW=0 SRP0=1
1118 12:45:14.742993 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 12:45:14.749574 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 12:45:14.753256 found VGA at PCI: 00:02.0
1121 12:45:14.756252 Setting up VGA for PCI: 00:02.0
1122 12:45:14.762698 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 12:45:14.766192 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 12:45:14.769721 Allocating resources...
1125 12:45:14.769838 Reading resources...
1126 12:45:14.776110 Root Device read_resources bus 0 link: 0
1127 12:45:14.779122 DOMAIN: 0000 read_resources bus 0 link: 0
1128 12:45:14.786285 PCI: 00:04.0 read_resources bus 1 link: 0
1129 12:45:14.789104 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 12:45:14.795709 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 12:45:14.799264 USB0 port 0 read_resources bus 0 link: 0
1132 12:45:14.805587 USB0 port 0 read_resources bus 0 link: 0 done
1133 12:45:14.809116 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 12:45:14.812117 PCI: 00:14.0 read_resources bus 0 link: 0
1135 12:45:14.818718 USB0 port 0 read_resources bus 0 link: 0
1136 12:45:14.822355 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:45:14.829314 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 12:45:14.832305 PCI: 00:14.3 read_resources bus 0 link: 0
1139 12:45:14.839358 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 12:45:14.842117 PCI: 00:15.0 read_resources bus 0 link: 0
1141 12:45:14.848715 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 12:45:14.852391 PCI: 00:15.1 read_resources bus 0 link: 0
1143 12:45:14.859011 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 12:45:14.862003 PCI: 00:19.1 read_resources bus 0 link: 0
1145 12:45:14.869088 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 12:45:14.872612 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 12:45:14.879139 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 12:45:14.882722 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 12:45:14.889419 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 12:45:14.892381 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 12:45:14.898733 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 12:45:14.902427 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 12:45:14.908917 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 12:45:14.912420 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 12:45:14.915492 GENERIC: 0.0 read_resources bus 0 link: 0
1156 12:45:14.922612 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 12:45:14.926199 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 12:45:14.933604 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 12:45:14.936537 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 12:45:14.943463 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 12:45:14.946442 Root Device read_resources bus 0 link: 0 done
1162 12:45:14.949506 Done reading resources.
1163 12:45:14.956137 Show resources in subtree (Root Device)...After reading.
1164 12:45:14.959766 Root Device child on link 0 DOMAIN: 0000
1165 12:45:14.963250 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 12:45:14.972782 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 12:45:14.982667 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 12:45:14.986350 PCI: 00:00.0
1169 12:45:14.996005 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 12:45:15.002691 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 12:45:15.012601 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 12:45:15.022674 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 12:45:15.032592 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 12:45:15.042391 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 12:45:15.052398 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 12:45:15.058990 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 12:45:15.069391 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 12:45:15.078982 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 12:45:15.088962 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 12:45:15.098709 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 12:45:15.105765 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 12:45:15.115279 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 12:45:15.125496 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 12:45:15.135479 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 12:45:15.145371 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 12:45:15.155497 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 12:45:15.165153 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 12:45:15.171625 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 12:45:15.175102 PCI: 00:02.0
1190 12:45:15.185045 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:45:15.195034 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 12:45:15.204741 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 12:45:15.208252 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:45:15.218265 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 12:45:15.221740 GENERIC: 0.0
1196 12:45:15.221830 PCI: 00:05.0
1197 12:45:15.231277 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 12:45:15.238440 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 12:45:15.238531 GENERIC: 0.0
1200 12:45:15.241559 PCI: 00:08.0
1201 12:45:15.251529 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 12:45:15.251619 PCI: 00:0a.0
1203 12:45:15.255099 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 12:45:15.264879 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:45:15.271297 USB0 port 0 child on link 0 USB3 port 0
1206 12:45:15.271383 USB3 port 0
1207 12:45:15.274475 USB3 port 1
1208 12:45:15.274559 USB3 port 2
1209 12:45:15.277895 USB3 port 3
1210 12:45:15.281311 PCI: 00:14.0 child on link 0 USB0 port 0
1211 12:45:15.291297 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 12:45:15.297780 USB0 port 0 child on link 0 USB2 port 0
1213 12:45:15.297887 USB2 port 0
1214 12:45:15.301425 USB2 port 1
1215 12:45:15.301537 USB2 port 2
1216 12:45:15.304442 USB2 port 3
1217 12:45:15.304528 USB2 port 4
1218 12:45:15.307923 USB2 port 5
1219 12:45:15.308009 USB2 port 6
1220 12:45:15.311329 USB2 port 7
1221 12:45:15.311415 USB2 port 8
1222 12:45:15.314243 USB2 port 9
1223 12:45:15.314330 USB3 port 0
1224 12:45:15.317837 USB3 port 1
1225 12:45:15.320939 USB3 port 2
1226 12:45:15.321025 USB3 port 3
1227 12:45:15.324487 PCI: 00:14.2
1228 12:45:15.334428 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 12:45:15.344109 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 12:45:15.347546 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 12:45:15.357379 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 12:45:15.357503 GENERIC: 0.0
1233 12:45:15.363934 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 12:45:15.374074 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:45:15.374166 I2C: 00:1a
1236 12:45:15.377113 I2C: 00:31
1237 12:45:15.377199 I2C: 00:32
1238 12:45:15.380591 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 12:45:15.390713 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:45:15.393689 I2C: 00:10
1241 12:45:15.393777 PCI: 00:15.2
1242 12:45:15.403982 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:45:15.406987 PCI: 00:15.3
1244 12:45:15.416952 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:45:15.417044 PCI: 00:16.0
1246 12:45:15.427162 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:45:15.430416 PCI: 00:19.0
1248 12:45:15.433984 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 12:45:15.443360 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:45:15.446890 I2C: 00:15
1251 12:45:15.450409 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 12:45:15.459906 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 12:45:15.470452 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 12:45:15.477067 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 12:45:15.480028 GENERIC: 0.0
1256 12:45:15.480120 PCI: 01:00.0
1257 12:45:15.493374 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 12:45:15.499841 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1259 12:45:15.503407 PCI: 00:1e.0
1260 12:45:15.513380 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 12:45:15.519821 PCI: 00:1e.2 child on link 0 SPI: 00
1262 12:45:15.529979 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:45:15.530076 SPI: 00
1264 12:45:15.533070 PCI: 00:1e.3 child on link 0 SPI: 00
1265 12:45:15.543008 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 12:45:15.546425 SPI: 00
1267 12:45:15.549946 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 12:45:15.556256 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 12:45:15.559917 PNP: 0c09.0
1270 12:45:15.569922 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 12:45:15.573048 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 12:45:15.582997 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 12:45:15.592895 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 12:45:15.596315 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 12:45:15.599816 GENERIC: 0.0
1276 12:45:15.599902 GENERIC: 1.0
1277 12:45:15.602690 PCI: 00:1f.3
1278 12:45:15.612440 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 12:45:15.622929 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 12:45:15.623029 PCI: 00:1f.5
1281 12:45:15.632407 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 12:45:15.636033 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 12:45:15.639526 APIC: 00
1284 12:45:15.639612 APIC: 01
1285 12:45:15.639679 APIC: 03
1286 12:45:15.642428 APIC: 07
1287 12:45:15.642527 APIC: 05
1288 12:45:15.646010 APIC: 04
1289 12:45:15.646099 APIC: 02
1290 12:45:15.646166 APIC: 06
1291 12:45:15.655987 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 12:45:15.659006 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 12:45:15.665447 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 12:45:15.672129 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 12:45:15.675739 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 12:45:15.682289 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1297 12:45:15.688668 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1298 12:45:15.695273 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1299 12:45:15.702347 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1300 12:45:15.708901 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1301 12:45:15.715434 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1302 12:45:15.725466 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1303 12:45:15.731751 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1304 12:45:15.738379 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1305 12:45:15.741849 DOMAIN: 0000: Resource ranges:
1306 12:45:15.745500 * Base: 1000, Size: 800, Tag: 100
1307 12:45:15.748584 * Base: 1900, Size: e700, Tag: 100
1308 12:45:15.754998 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1309 12:45:15.762092 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1310 12:45:15.768736 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1311 12:45:15.775350 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1312 12:45:15.784808 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1313 12:45:15.791810 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1314 12:45:15.798156 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1315 12:45:15.808375 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1316 12:45:15.814970 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1317 12:45:15.821457 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1318 12:45:15.831587 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1319 12:45:15.837980 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1320 12:45:15.844466 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1321 12:45:15.851089 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1322 12:45:15.861541 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1323 12:45:15.867933 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1324 12:45:15.874925 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1325 12:45:15.884448 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1326 12:45:15.891016 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1327 12:45:15.900973 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1328 12:45:15.907388 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1329 12:45:15.914396 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1330 12:45:15.921118 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1331 12:45:15.930501 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1332 12:45:15.937163 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1333 12:45:15.940812 DOMAIN: 0000: Resource ranges:
1334 12:45:15.944345 * Base: 7fc00000, Size: 40400000, Tag: 200
1335 12:45:15.950684 * Base: d0000000, Size: 28000000, Tag: 200
1336 12:45:15.953802 * Base: fa000000, Size: 1000000, Tag: 200
1337 12:45:15.957265 * Base: fb001000, Size: 2fff000, Tag: 200
1338 12:45:15.964251 * Base: fe010000, Size: 2e000, Tag: 200
1339 12:45:15.967138 * Base: fe03f000, Size: d41000, Tag: 200
1340 12:45:15.970653 * Base: fed88000, Size: 8000, Tag: 200
1341 12:45:15.974121 * Base: fed93000, Size: d000, Tag: 200
1342 12:45:15.977079 * Base: feda2000, Size: 1e000, Tag: 200
1343 12:45:15.983652 * Base: fede0000, Size: 1220000, Tag: 200
1344 12:45:15.987325 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1345 12:45:15.993784 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1346 12:45:16.000266 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1347 12:45:16.006855 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1348 12:45:16.013383 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1349 12:45:16.019957 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1350 12:45:16.027078 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1351 12:45:16.033612 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1352 12:45:16.040073 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1353 12:45:16.046490 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1354 12:45:16.053405 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1355 12:45:16.059811 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1356 12:45:16.066484 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1357 12:45:16.072950 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1358 12:45:16.079600 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1359 12:45:16.086666 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1360 12:45:16.092820 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1361 12:45:16.099675 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1362 12:45:16.106149 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1363 12:45:16.112819 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1364 12:45:16.119359 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1365 12:45:16.125997 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1366 12:45:16.132574 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1367 12:45:16.142637 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1368 12:45:16.149357 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1369 12:45:16.152391 PCI: 00:1d.0: Resource ranges:
1370 12:45:16.155983 * Base: 7fc00000, Size: 100000, Tag: 200
1371 12:45:16.162290 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1372 12:45:16.169081 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1373 12:45:16.179214 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1374 12:45:16.185816 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1375 12:45:16.188725 Root Device assign_resources, bus 0 link: 0
1376 12:45:16.195791 DOMAIN: 0000 assign_resources, bus 0 link: 0
1377 12:45:16.202264 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1378 12:45:16.212001 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1379 12:45:16.218626 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1380 12:45:16.228844 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1381 12:45:16.231738 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 12:45:16.238863 PCI: 00:04.0 assign_resources, bus 1 link: 0
1383 12:45:16.245266 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1384 12:45:16.255232 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1385 12:45:16.261487 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1386 12:45:16.264942 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 12:45:16.271381 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1388 12:45:16.277871 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1389 12:45:16.284595 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 12:45:16.288040 PCI: 00:14.0 assign_resources, bus 0 link: 0
1391 12:45:16.297631 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1392 12:45:16.304629 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1393 12:45:16.314580 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1394 12:45:16.317608 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 12:45:16.321311 PCI: 00:14.3 assign_resources, bus 0 link: 0
1396 12:45:16.331049 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1397 12:45:16.333934 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 12:45:16.341068 PCI: 00:15.0 assign_resources, bus 0 link: 0
1399 12:45:16.347443 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1400 12:45:16.350976 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 12:45:16.357543 PCI: 00:15.1 assign_resources, bus 0 link: 0
1402 12:45:16.363861 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1403 12:45:16.374194 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1404 12:45:16.380767 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1405 12:45:16.390340 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1406 12:45:16.393836 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 12:45:16.400250 PCI: 00:19.1 assign_resources, bus 0 link: 0
1408 12:45:16.406859 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1409 12:45:16.416863 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1410 12:45:16.426851 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1411 12:45:16.430341 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 12:45:16.439854 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1413 12:45:16.446410 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1414 12:45:16.453480 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 12:45:16.460037 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1416 12:45:16.463028 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 12:45:16.469556 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1418 12:45:16.476340 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1419 12:45:16.482849 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 12:45:16.486388 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1421 12:45:16.493043 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 12:45:16.496044 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1423 12:45:16.503064 LPC: Trying to open IO window from 800 size 1ff
1424 12:45:16.509455 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1425 12:45:16.519340 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1426 12:45:16.525936 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1427 12:45:16.529575 DOMAIN: 0000 assign_resources, bus 0 link: 0
1428 12:45:16.536145 Root Device assign_resources, bus 0 link: 0
1429 12:45:16.539274 Done setting resources.
1430 12:45:16.545806 Show resources in subtree (Root Device)...After assigning values.
1431 12:45:16.549297 Root Device child on link 0 DOMAIN: 0000
1432 12:45:16.552317 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1433 12:45:16.562667 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1434 12:45:16.572536 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1435 12:45:16.572636 PCI: 00:00.0
1436 12:45:16.582498 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1437 12:45:16.592553 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1438 12:45:16.602008 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1439 12:45:16.612400 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1440 12:45:16.622345 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1441 12:45:16.628411 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1442 12:45:16.638489 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1443 12:45:16.648674 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1444 12:45:16.658634 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1445 12:45:16.668754 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1446 12:45:16.678496 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1447 12:45:16.684801 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1448 12:45:16.694913 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1449 12:45:16.705034 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1450 12:45:16.714914 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1451 12:45:16.724994 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1452 12:45:16.734514 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1453 12:45:16.744553 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1454 12:45:16.750888 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1455 12:45:16.760939 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1456 12:45:16.764299 PCI: 00:02.0
1457 12:45:16.774278 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1458 12:45:16.784081 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1459 12:45:16.794570 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1460 12:45:16.797533 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1461 12:45:16.807587 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1462 12:45:16.811079 GENERIC: 0.0
1463 12:45:16.811167 PCI: 00:05.0
1464 12:45:16.823879 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1465 12:45:16.827421 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1466 12:45:16.831055 GENERIC: 0.0
1467 12:45:16.831200 PCI: 00:08.0
1468 12:45:16.841023 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1469 12:45:16.843828 PCI: 00:0a.0
1470 12:45:16.847384 PCI: 00:0d.0 child on link 0 USB0 port 0
1471 12:45:16.857269 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1472 12:45:16.860804 USB0 port 0 child on link 0 USB3 port 0
1473 12:45:16.863725 USB3 port 0
1474 12:45:16.867316 USB3 port 1
1475 12:45:16.867458 USB3 port 2
1476 12:45:16.870652 USB3 port 3
1477 12:45:16.873673 PCI: 00:14.0 child on link 0 USB0 port 0
1478 12:45:16.883904 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1479 12:45:16.886844 USB0 port 0 child on link 0 USB2 port 0
1480 12:45:16.890344 USB2 port 0
1481 12:45:16.893928 USB2 port 1
1482 12:45:16.894008 USB2 port 2
1483 12:45:16.896929 USB2 port 3
1484 12:45:16.897009 USB2 port 4
1485 12:45:16.900450 USB2 port 5
1486 12:45:16.900526 USB2 port 6
1487 12:45:16.903949 USB2 port 7
1488 12:45:16.904020 USB2 port 8
1489 12:45:16.906937 USB2 port 9
1490 12:45:16.907009 USB3 port 0
1491 12:45:16.910459 USB3 port 1
1492 12:45:16.910528 USB3 port 2
1493 12:45:16.913453 USB3 port 3
1494 12:45:16.913539 PCI: 00:14.2
1495 12:45:16.926925 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1496 12:45:16.936476 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1497 12:45:16.940028 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1498 12:45:16.950109 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1499 12:45:16.953107 GENERIC: 0.0
1500 12:45:16.956464 PCI: 00:15.0 child on link 0 I2C: 00:1a
1501 12:45:16.966342 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1502 12:45:16.969886 I2C: 00:1a
1503 12:45:16.969987 I2C: 00:31
1504 12:45:16.970091 I2C: 00:32
1505 12:45:16.976842 PCI: 00:15.1 child on link 0 I2C: 00:10
1506 12:45:16.986707 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1507 12:45:16.986815 I2C: 00:10
1508 12:45:16.989650 PCI: 00:15.2
1509 12:45:16.999710 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1510 12:45:16.999798 PCI: 00:15.3
1511 12:45:17.012741 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1512 12:45:17.012856 PCI: 00:16.0
1513 12:45:17.022930 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1514 12:45:17.026531 PCI: 00:19.0
1515 12:45:17.029510 PCI: 00:19.1 child on link 0 I2C: 00:15
1516 12:45:17.039561 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1517 12:45:17.042503 I2C: 00:15
1518 12:45:17.046062 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1519 12:45:17.056015 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1520 12:45:17.065941 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1521 12:45:17.075844 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1522 12:45:17.079403 GENERIC: 0.0
1523 12:45:17.082220 PCI: 01:00.0
1524 12:45:17.092628 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1525 12:45:17.102269 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1526 12:45:17.102363 PCI: 00:1e.0
1527 12:45:17.115385 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1528 12:45:17.118697 PCI: 00:1e.2 child on link 0 SPI: 00
1529 12:45:17.128755 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1530 12:45:17.128849 SPI: 00
1531 12:45:17.135302 PCI: 00:1e.3 child on link 0 SPI: 00
1532 12:45:17.145525 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1533 12:45:17.145613 SPI: 00
1534 12:45:17.148951 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1535 12:45:17.158859 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1536 12:45:17.159007 PNP: 0c09.0
1537 12:45:17.168231 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1538 12:45:17.175382 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1539 12:45:17.181796 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1540 12:45:17.191606 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1541 12:45:17.198534 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1542 12:45:17.198639 GENERIC: 0.0
1543 12:45:17.202071 GENERIC: 1.0
1544 12:45:17.202156 PCI: 00:1f.3
1545 12:45:17.211937 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1546 12:45:17.221439 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1547 12:45:17.224872 PCI: 00:1f.5
1548 12:45:17.234876 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1549 12:45:17.238340 CPU_CLUSTER: 0 child on link 0 APIC: 00
1550 12:45:17.241261 APIC: 00
1551 12:45:17.241346 APIC: 01
1552 12:45:17.241412 APIC: 03
1553 12:45:17.244906 APIC: 07
1554 12:45:17.244989 APIC: 05
1555 12:45:17.247864 APIC: 04
1556 12:45:17.247949 APIC: 02
1557 12:45:17.248029 APIC: 06
1558 12:45:17.251295 Done allocating resources.
1559 12:45:17.257955 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1560 12:45:17.264871 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1561 12:45:17.267815 Configure GPIOs for I2S audio on UP4.
1562 12:45:17.274307 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1563 12:45:17.277939 Enabling resources...
1564 12:45:17.280748 PCI: 00:00.0 subsystem <- 8086/9a12
1565 12:45:17.284269 PCI: 00:00.0 cmd <- 06
1566 12:45:17.287769 PCI: 00:02.0 subsystem <- 8086/9a40
1567 12:45:17.291144 PCI: 00:02.0 cmd <- 03
1568 12:45:17.294037 PCI: 00:04.0 subsystem <- 8086/9a03
1569 12:45:17.297553 PCI: 00:04.0 cmd <- 02
1570 12:45:17.301014 PCI: 00:05.0 subsystem <- 8086/9a19
1571 12:45:17.301101 PCI: 00:05.0 cmd <- 02
1572 12:45:17.307570 PCI: 00:08.0 subsystem <- 8086/9a11
1573 12:45:17.307658 PCI: 00:08.0 cmd <- 06
1574 12:45:17.310546 PCI: 00:0d.0 subsystem <- 8086/9a13
1575 12:45:17.314005 PCI: 00:0d.0 cmd <- 02
1576 12:45:17.317476 PCI: 00:14.0 subsystem <- 8086/a0ed
1577 12:45:17.320780 PCI: 00:14.0 cmd <- 02
1578 12:45:17.323624 PCI: 00:14.2 subsystem <- 8086/a0ef
1579 12:45:17.327038 PCI: 00:14.2 cmd <- 02
1580 12:45:17.330506 PCI: 00:14.3 subsystem <- 8086/a0f0
1581 12:45:17.333541 PCI: 00:14.3 cmd <- 02
1582 12:45:17.337154 PCI: 00:15.0 subsystem <- 8086/a0e8
1583 12:45:17.340268 PCI: 00:15.0 cmd <- 02
1584 12:45:17.343816 PCI: 00:15.1 subsystem <- 8086/a0e9
1585 12:45:17.346716 PCI: 00:15.1 cmd <- 02
1586 12:45:17.350256 PCI: 00:15.2 subsystem <- 8086/a0ea
1587 12:45:17.350342 PCI: 00:15.2 cmd <- 02
1588 12:45:17.357242 PCI: 00:15.3 subsystem <- 8086/a0eb
1589 12:45:17.357328 PCI: 00:15.3 cmd <- 02
1590 12:45:17.360159 PCI: 00:16.0 subsystem <- 8086/a0e0
1591 12:45:17.363554 PCI: 00:16.0 cmd <- 02
1592 12:45:17.367181 PCI: 00:19.1 subsystem <- 8086/a0c6
1593 12:45:17.370151 PCI: 00:19.1 cmd <- 02
1594 12:45:17.373741 PCI: 00:1d.0 bridge ctrl <- 0013
1595 12:45:17.376607 PCI: 00:1d.0 subsystem <- 8086/a0b0
1596 12:45:17.380181 PCI: 00:1d.0 cmd <- 06
1597 12:45:17.383586 PCI: 00:1e.0 subsystem <- 8086/a0a8
1598 12:45:17.386512 PCI: 00:1e.0 cmd <- 06
1599 12:45:17.389941 PCI: 00:1e.2 subsystem <- 8086/a0aa
1600 12:45:17.393278 PCI: 00:1e.2 cmd <- 06
1601 12:45:17.396887 PCI: 00:1e.3 subsystem <- 8086/a0ab
1602 12:45:17.399836 PCI: 00:1e.3 cmd <- 02
1603 12:45:17.403380 PCI: 00:1f.0 subsystem <- 8086/a087
1604 12:45:17.403465 PCI: 00:1f.0 cmd <- 407
1605 12:45:17.409945 PCI: 00:1f.3 subsystem <- 8086/a0c8
1606 12:45:17.410029 PCI: 00:1f.3 cmd <- 02
1607 12:45:17.413323 PCI: 00:1f.5 subsystem <- 8086/a0a4
1608 12:45:17.416367 PCI: 00:1f.5 cmd <- 406
1609 12:45:17.421653 PCI: 01:00.0 cmd <- 02
1610 12:45:17.426197 done.
1611 12:45:17.429065 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1612 12:45:17.432647 Initializing devices...
1613 12:45:17.435742 Root Device init
1614 12:45:17.439277 Chrome EC: Set SMI mask to 0x0000000000000000
1615 12:45:17.446315 Chrome EC: clear events_b mask to 0x0000000000000000
1616 12:45:17.452869 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1617 12:45:17.459309 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1618 12:45:17.466306 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1619 12:45:17.469264 Chrome EC: Set WAKE mask to 0x0000000000000000
1620 12:45:17.477431 fw_config match found: DB_USB=USB3_ACTIVE
1621 12:45:17.480435 Configure Right Type-C port orientation for retimer
1622 12:45:17.483960 Root Device init finished in 46 msecs
1623 12:45:17.488056 PCI: 00:00.0 init
1624 12:45:17.491552 CPU TDP = 9 Watts
1625 12:45:17.491638 CPU PL1 = 9 Watts
1626 12:45:17.494507 CPU PL2 = 40 Watts
1627 12:45:17.498092 CPU PL4 = 83 Watts
1628 12:45:17.501585 PCI: 00:00.0 init finished in 8 msecs
1629 12:45:17.501672 PCI: 00:02.0 init
1630 12:45:17.504492 GMA: Found VBT in CBFS
1631 12:45:17.508028 GMA: Found valid VBT in CBFS
1632 12:45:17.514476 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1633 12:45:17.521051 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1634 12:45:17.524651 PCI: 00:02.0 init finished in 18 msecs
1635 12:45:17.528185 PCI: 00:05.0 init
1636 12:45:17.531053 PCI: 00:05.0 init finished in 0 msecs
1637 12:45:17.534536 PCI: 00:08.0 init
1638 12:45:17.538013 PCI: 00:08.0 init finished in 0 msecs
1639 12:45:17.540987 PCI: 00:14.0 init
1640 12:45:17.544740 PCI: 00:14.0 init finished in 0 msecs
1641 12:45:17.547670 PCI: 00:14.2 init
1642 12:45:17.551268 PCI: 00:14.2 init finished in 0 msecs
1643 12:45:17.554248 PCI: 00:15.0 init
1644 12:45:17.554332 I2C bus 0 version 0x3230302a
1645 12:45:17.560699 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1646 12:45:17.564170 PCI: 00:15.0 init finished in 6 msecs
1647 12:45:17.564255 PCI: 00:15.1 init
1648 12:45:17.567575 I2C bus 1 version 0x3230302a
1649 12:45:17.571051 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1650 12:45:17.577473 PCI: 00:15.1 init finished in 6 msecs
1651 12:45:17.577558 PCI: 00:15.2 init
1652 12:45:17.580796 I2C bus 2 version 0x3230302a
1653 12:45:17.583756 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1654 12:45:17.587379 PCI: 00:15.2 init finished in 6 msecs
1655 12:45:17.590902 PCI: 00:15.3 init
1656 12:45:17.594286 I2C bus 3 version 0x3230302a
1657 12:45:17.597282 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1658 12:45:17.600718 PCI: 00:15.3 init finished in 6 msecs
1659 12:45:17.603648 PCI: 00:16.0 init
1660 12:45:17.607159 PCI: 00:16.0 init finished in 0 msecs
1661 12:45:17.610651 PCI: 00:19.1 init
1662 12:45:17.613533 I2C bus 5 version 0x3230302a
1663 12:45:17.617201 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1664 12:45:17.620596 PCI: 00:19.1 init finished in 6 msecs
1665 12:45:17.623704 PCI: 00:1d.0 init
1666 12:45:17.627100 Initializing PCH PCIe bridge.
1667 12:45:17.630590 PCI: 00:1d.0 init finished in 3 msecs
1668 12:45:17.633591 PCI: 00:1f.0 init
1669 12:45:17.636970 IOAPIC: Initializing IOAPIC at 0xfec00000
1670 12:45:17.640452 IOAPIC: Bootstrap Processor Local APIC = 0x00
1671 12:45:17.643459 IOAPIC: ID = 0x02
1672 12:45:17.647086 IOAPIC: Dumping registers
1673 12:45:17.647218 reg 0x0000: 0x02000000
1674 12:45:17.649980 reg 0x0001: 0x00770020
1675 12:45:17.653544 reg 0x0002: 0x00000000
1676 12:45:17.656488 PCI: 00:1f.0 init finished in 21 msecs
1677 12:45:17.659922 PCI: 00:1f.2 init
1678 12:45:17.663472 Disabling ACPI via APMC.
1679 12:45:17.666724 APMC done.
1680 12:45:17.670327 PCI: 00:1f.2 init finished in 6 msecs
1681 12:45:17.680937 PCI: 01:00.0 init
1682 12:45:17.684432 PCI: 01:00.0 init finished in 0 msecs
1683 12:45:17.687962 PNP: 0c09.0 init
1684 12:45:17.690859 Google Chrome EC uptime: 8.253 seconds
1685 12:45:17.697648 Google Chrome AP resets since EC boot: 1
1686 12:45:17.701174 Google Chrome most recent AP reset causes:
1687 12:45:17.703996 0.451: 32775 shutdown: entering G3
1688 12:45:17.710644 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1689 12:45:17.714238 PNP: 0c09.0 init finished in 22 msecs
1690 12:45:17.719462 Devices initialized
1691 12:45:17.723034 Show all devs... After init.
1692 12:45:17.725982 Root Device: enabled 1
1693 12:45:17.726083 DOMAIN: 0000: enabled 1
1694 12:45:17.729540 CPU_CLUSTER: 0: enabled 1
1695 12:45:17.733058 PCI: 00:00.0: enabled 1
1696 12:45:17.736037 PCI: 00:02.0: enabled 1
1697 12:45:17.736122 PCI: 00:04.0: enabled 1
1698 12:45:17.739574 PCI: 00:05.0: enabled 1
1699 12:45:17.743028 PCI: 00:06.0: enabled 0
1700 12:45:17.746051 PCI: 00:07.0: enabled 0
1701 12:45:17.746136 PCI: 00:07.1: enabled 0
1702 12:45:17.749624 PCI: 00:07.2: enabled 0
1703 12:45:17.752593 PCI: 00:07.3: enabled 0
1704 12:45:17.756053 PCI: 00:08.0: enabled 1
1705 12:45:17.756141 PCI: 00:09.0: enabled 0
1706 12:45:17.759553 PCI: 00:0a.0: enabled 0
1707 12:45:17.762534 PCI: 00:0d.0: enabled 1
1708 12:45:17.766117 PCI: 00:0d.1: enabled 0
1709 12:45:17.766202 PCI: 00:0d.2: enabled 0
1710 12:45:17.769623 PCI: 00:0d.3: enabled 0
1711 12:45:17.772480 PCI: 00:0e.0: enabled 0
1712 12:45:17.772564 PCI: 00:10.2: enabled 1
1713 12:45:17.776036 PCI: 00:10.6: enabled 0
1714 12:45:17.778993 PCI: 00:10.7: enabled 0
1715 12:45:17.782545 PCI: 00:12.0: enabled 0
1716 12:45:17.782630 PCI: 00:12.6: enabled 0
1717 12:45:17.786006 PCI: 00:13.0: enabled 0
1718 12:45:17.789516 PCI: 00:14.0: enabled 1
1719 12:45:17.792513 PCI: 00:14.1: enabled 0
1720 12:45:17.792598 PCI: 00:14.2: enabled 1
1721 12:45:17.796064 PCI: 00:14.3: enabled 1
1722 12:45:17.799025 PCI: 00:15.0: enabled 1
1723 12:45:17.802551 PCI: 00:15.1: enabled 1
1724 12:45:17.802635 PCI: 00:15.2: enabled 1
1725 12:45:17.806100 PCI: 00:15.3: enabled 1
1726 12:45:17.809073 PCI: 00:16.0: enabled 1
1727 12:45:17.812558 PCI: 00:16.1: enabled 0
1728 12:45:17.812644 PCI: 00:16.2: enabled 0
1729 12:45:17.815469 PCI: 00:16.3: enabled 0
1730 12:45:17.818951 PCI: 00:16.4: enabled 0
1731 12:45:17.819065 PCI: 00:16.5: enabled 0
1732 12:45:17.822549 PCI: 00:17.0: enabled 0
1733 12:45:17.825495 PCI: 00:19.0: enabled 0
1734 12:45:17.828992 PCI: 00:19.1: enabled 1
1735 12:45:17.829076 PCI: 00:19.2: enabled 0
1736 12:45:17.832355 PCI: 00:1c.0: enabled 1
1737 12:45:17.835315 PCI: 00:1c.1: enabled 0
1738 12:45:17.838875 PCI: 00:1c.2: enabled 0
1739 12:45:17.838960 PCI: 00:1c.3: enabled 0
1740 12:45:17.842180 PCI: 00:1c.4: enabled 0
1741 12:45:17.845193 PCI: 00:1c.5: enabled 0
1742 12:45:17.848719 PCI: 00:1c.6: enabled 1
1743 12:45:17.848806 PCI: 00:1c.7: enabled 0
1744 12:45:17.852297 PCI: 00:1d.0: enabled 1
1745 12:45:17.855417 PCI: 00:1d.1: enabled 0
1746 12:45:17.858924 PCI: 00:1d.2: enabled 1
1747 12:45:17.859009 PCI: 00:1d.3: enabled 0
1748 12:45:17.861910 PCI: 00:1e.0: enabled 1
1749 12:45:17.865366 PCI: 00:1e.1: enabled 0
1750 12:45:17.865445 PCI: 00:1e.2: enabled 1
1751 12:45:17.868972 PCI: 00:1e.3: enabled 1
1752 12:45:17.871875 PCI: 00:1f.0: enabled 1
1753 12:45:17.875371 PCI: 00:1f.1: enabled 0
1754 12:45:17.875451 PCI: 00:1f.2: enabled 1
1755 12:45:17.878378 PCI: 00:1f.3: enabled 1
1756 12:45:17.882046 PCI: 00:1f.4: enabled 0
1757 12:45:17.885482 PCI: 00:1f.5: enabled 1
1758 12:45:17.885563 PCI: 00:1f.6: enabled 0
1759 12:45:17.888399 PCI: 00:1f.7: enabled 0
1760 12:45:17.891963 APIC: 00: enabled 1
1761 12:45:17.892044 GENERIC: 0.0: enabled 1
1762 12:45:17.895349 GENERIC: 0.0: enabled 1
1763 12:45:17.898798 GENERIC: 1.0: enabled 1
1764 12:45:17.901618 GENERIC: 0.0: enabled 1
1765 12:45:17.901707 GENERIC: 1.0: enabled 1
1766 12:45:17.905082 USB0 port 0: enabled 1
1767 12:45:17.908359 GENERIC: 0.0: enabled 1
1768 12:45:17.911956 USB0 port 0: enabled 1
1769 12:45:17.912047 GENERIC: 0.0: enabled 1
1770 12:45:17.914928 I2C: 00:1a: enabled 1
1771 12:45:17.918330 I2C: 00:31: enabled 1
1772 12:45:17.918418 I2C: 00:32: enabled 1
1773 12:45:17.921879 I2C: 00:10: enabled 1
1774 12:45:17.925285 I2C: 00:15: enabled 1
1775 12:45:17.925400 GENERIC: 0.0: enabled 0
1776 12:45:17.928211 GENERIC: 1.0: enabled 0
1777 12:45:17.931714 GENERIC: 0.0: enabled 1
1778 12:45:17.931793 SPI: 00: enabled 1
1779 12:45:17.934807 SPI: 00: enabled 1
1780 12:45:17.938238 PNP: 0c09.0: enabled 1
1781 12:45:17.938321 GENERIC: 0.0: enabled 1
1782 12:45:17.941751 USB3 port 0: enabled 1
1783 12:45:17.945221 USB3 port 1: enabled 1
1784 12:45:17.948141 USB3 port 2: enabled 0
1785 12:45:17.948244 USB3 port 3: enabled 0
1786 12:45:17.951717 USB2 port 0: enabled 0
1787 12:45:17.954752 USB2 port 1: enabled 1
1788 12:45:17.954850 USB2 port 2: enabled 1
1789 12:45:17.958438 USB2 port 3: enabled 0
1790 12:45:17.961324 USB2 port 4: enabled 1
1791 12:45:17.964822 USB2 port 5: enabled 0
1792 12:45:17.964902 USB2 port 6: enabled 0
1793 12:45:17.968425 USB2 port 7: enabled 0
1794 12:45:17.971372 USB2 port 8: enabled 0
1795 12:45:17.971460 USB2 port 9: enabled 0
1796 12:45:17.974810 USB3 port 0: enabled 0
1797 12:45:17.978239 USB3 port 1: enabled 1
1798 12:45:17.978314 USB3 port 2: enabled 0
1799 12:45:17.981804 USB3 port 3: enabled 0
1800 12:45:17.984858 GENERIC: 0.0: enabled 1
1801 12:45:17.988322 GENERIC: 1.0: enabled 1
1802 12:45:17.988408 APIC: 01: enabled 1
1803 12:45:17.991364 APIC: 03: enabled 1
1804 12:45:17.994823 APIC: 07: enabled 1
1805 12:45:17.994901 APIC: 05: enabled 1
1806 12:45:17.997817 APIC: 04: enabled 1
1807 12:45:17.997899 APIC: 02: enabled 1
1808 12:45:18.001297 APIC: 06: enabled 1
1809 12:45:18.004575 PCI: 01:00.0: enabled 1
1810 12:45:18.008097 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1811 12:45:18.014583 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1812 12:45:18.018116 ELOG: NV offset 0xf30000 size 0x1000
1813 12:45:18.024755 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1814 12:45:18.031387 ELOG: Event(17) added with size 13 at 2022-07-14 12:37:29 UTC
1815 12:45:18.037695 ELOG: Event(92) added with size 9 at 2022-07-14 12:37:29 UTC
1816 12:45:18.044210 ELOG: Event(93) added with size 9 at 2022-07-14 12:37:29 UTC
1817 12:45:18.050816 ELOG: Event(9E) added with size 10 at 2022-07-14 12:37:29 UTC
1818 12:45:18.057255 ELOG: Event(9F) added with size 14 at 2022-07-14 12:37:29 UTC
1819 12:45:18.064400 ELOG: Event(16) added with size 11 at 2022-07-14 12:37:29 UTC
1820 12:45:18.067352 Erasing flash addr f30000 + 4 KiB
1821 12:45:18.121080 BS: BS_DEV_INIT exit times (exec / console): 50 / 55 ms
1822 12:45:18.127597 ELOG: Event(A1) added with size 10 at 2022-07-14 12:37:29 UTC
1823 12:45:18.134157 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1824 12:45:18.141042 ELOG: Event(A0) added with size 9 at 2022-07-14 12:37:29 UTC
1825 12:45:18.147438 elog_add_boot_reason: Logged dev mode boot
1826 12:45:18.150921 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1827 12:45:18.154467 Finalize devices...
1828 12:45:18.157498 Devices finalized
1829 12:45:18.161129 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1830 12:45:18.167073 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1831 12:45:18.173992 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1832 12:45:18.177001 ME: HFSTS1 : 0x80030055
1833 12:45:18.180485 ME: HFSTS2 : 0x30280116
1834 12:45:18.187002 ME: HFSTS3 : 0x00000050
1835 12:45:18.190474 ME: HFSTS4 : 0x00004000
1836 12:45:18.193418 ME: HFSTS5 : 0x00000000
1837 12:45:18.200396 ME: HFSTS6 : 0x40400006
1838 12:45:18.203371 ME: Manufacturing Mode : YES
1839 12:45:18.206761 ME: SPI Protection Mode Enabled : NO
1840 12:45:18.210257 ME: FW Partition Table : OK
1841 12:45:18.213647 ME: Bringup Loader Failure : NO
1842 12:45:18.217185 ME: Firmware Init Complete : NO
1843 12:45:18.223625 ME: Boot Options Present : NO
1844 12:45:18.227156 ME: Update In Progress : NO
1845 12:45:18.229983 ME: D0i3 Support : YES
1846 12:45:18.233709 ME: Low Power State Enabled : NO
1847 12:45:18.236667 ME: CPU Replaced : YES
1848 12:45:18.240258 ME: CPU Replacement Valid : YES
1849 12:45:18.243647 ME: Current Working State : 5
1850 12:45:18.246445 ME: Current Operation State : 1
1851 12:45:18.249935 ME: Current Operation Mode : 3
1852 12:45:18.256462 ME: Error Code : 0
1853 12:45:18.259930 ME: Enhanced Debug Mode : NO
1854 12:45:18.263632 ME: CPU Debug Disabled : YES
1855 12:45:18.266648 ME: TXT Support : NO
1856 12:45:18.273160 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1857 12:45:18.279617 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1858 12:45:18.283134 CBFS: 'fallback/slic' not found.
1859 12:45:18.286659 ACPI: Writing ACPI tables at 76b01000.
1860 12:45:18.289600 ACPI: * FACS
1861 12:45:18.289684 ACPI: * DSDT
1862 12:45:18.293099 Ramoops buffer: 0x100000@0x76a00000.
1863 12:45:18.299546 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1864 12:45:18.302969 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1865 12:45:18.306969 Google Chrome EC: version:
1866 12:45:18.309863 ro: voema_v2.0.10114-a447f03e46
1867 12:45:18.313369 rw: voema_v2.0.10114-a447f03e46
1868 12:45:18.316793 running image: 2
1869 12:45:18.323188 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1870 12:45:18.326707 ACPI: * FADT
1871 12:45:18.326802 SCI is IRQ9
1872 12:45:18.333286 ACPI: added table 1/32, length now 40
1873 12:45:18.333368 ACPI: * SSDT
1874 12:45:18.336370 Found 1 CPU(s) with 8 core(s) each.
1875 12:45:18.342942 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1876 12:45:18.346349 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1877 12:45:18.349362 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1878 12:45:18.352784 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1879 12:45:18.359387 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1880 12:45:18.365963 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1881 12:45:18.369547 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1882 12:45:18.376019 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1883 12:45:18.382948 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1884 12:45:18.385899 \_SB.PCI0.RP09: Added StorageD3Enable property
1885 12:45:18.392367 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1886 12:45:18.395923 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1887 12:45:18.402326 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1888 12:45:18.405742 PS2K: Passing 80 keymaps to kernel
1889 12:45:18.412561 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1890 12:45:18.418946 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1891 12:45:18.425822 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1892 12:45:18.432402 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1893 12:45:18.438891 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1894 12:45:18.445470 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1895 12:45:18.452272 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1896 12:45:18.458992 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1897 12:45:18.462077 ACPI: added table 2/32, length now 44
1898 12:45:18.462165 ACPI: * MCFG
1899 12:45:18.465741 ACPI: added table 3/32, length now 48
1900 12:45:18.468755 ACPI: * TPM2
1901 12:45:18.472326 TPM2 log created at 0x769f0000
1902 12:45:18.475314 ACPI: added table 4/32, length now 52
1903 12:45:18.475407 ACPI: * MADT
1904 12:45:18.478825 SCI is IRQ9
1905 12:45:18.482367 ACPI: added table 5/32, length now 56
1906 12:45:18.485233 current = 76b09850
1907 12:45:18.485314 ACPI: * DMAR
1908 12:45:18.488650 ACPI: added table 6/32, length now 60
1909 12:45:18.492176 ACPI: added table 7/32, length now 64
1910 12:45:18.495169 ACPI: * HPET
1911 12:45:18.498593 ACPI: added table 8/32, length now 68
1912 12:45:18.498674 ACPI: done.
1913 12:45:18.502105 ACPI tables: 35216 bytes.
1914 12:45:18.505606 smbios_write_tables: 769ef000
1915 12:45:18.508413 EC returned error result code 3
1916 12:45:18.511903 Couldn't obtain OEM name from CBI
1917 12:45:18.515333 Create SMBIOS type 16
1918 12:45:18.518250 Create SMBIOS type 17
1919 12:45:18.521782 GENERIC: 0.0 (WIFI Device)
1920 12:45:18.521864 SMBIOS tables: 1734 bytes.
1921 12:45:18.528262 Writing table forward entry at 0x00000500
1922 12:45:18.534734 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1923 12:45:18.538382 Writing coreboot table at 0x76b25000
1924 12:45:18.544973 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1925 12:45:18.548354 1. 0000000000001000-000000000009ffff: RAM
1926 12:45:18.551355 2. 00000000000a0000-00000000000fffff: RESERVED
1927 12:45:18.558294 3. 0000000000100000-00000000769eefff: RAM
1928 12:45:18.561220 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1929 12:45:18.567827 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1930 12:45:18.575028 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1931 12:45:18.577841 7. 0000000077000000-000000007fbfffff: RESERVED
1932 12:45:18.584909 8. 00000000c0000000-00000000cfffffff: RESERVED
1933 12:45:18.587800 9. 00000000f8000000-00000000f9ffffff: RESERVED
1934 12:45:18.591285 10. 00000000fb000000-00000000fb000fff: RESERVED
1935 12:45:18.597757 11. 00000000fe000000-00000000fe00ffff: RESERVED
1936 12:45:18.601296 12. 00000000fed80000-00000000fed87fff: RESERVED
1937 12:45:18.607807 13. 00000000fed90000-00000000fed92fff: RESERVED
1938 12:45:18.611119 14. 00000000feda0000-00000000feda1fff: RESERVED
1939 12:45:18.617920 15. 00000000fedc0000-00000000feddffff: RESERVED
1940 12:45:18.621398 16. 0000000100000000-00000004803fffff: RAM
1941 12:45:18.624415 Passing 4 GPIOs to payload:
1942 12:45:18.627862 NAME | PORT | POLARITY | VALUE
1943 12:45:18.634416 lid | undefined | high | high
1944 12:45:18.640874 power | undefined | high | low
1945 12:45:18.644520 oprom | undefined | high | low
1946 12:45:18.650803 EC in RW | 0x000000e5 | high | high
1947 12:45:18.657359 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1948 12:45:18.660886 coreboot table: 1576 bytes.
1949 12:45:18.664406 IMD ROOT 0. 0x76fff000 0x00001000
1950 12:45:18.667383 IMD SMALL 1. 0x76ffe000 0x00001000
1951 12:45:18.670979 FSP MEMORY 2. 0x76c4e000 0x003b0000
1952 12:45:18.673915 VPD 3. 0x76c4d000 0x00000367
1953 12:45:18.677446 RO MCACHE 4. 0x76c4c000 0x00000fdc
1954 12:45:18.680930 CONSOLE 5. 0x76c2c000 0x00020000
1955 12:45:18.683971 FMAP 6. 0x76c2b000 0x00000578
1956 12:45:18.687406 TIME STAMP 7. 0x76c2a000 0x00000910
1957 12:45:18.693836 VBOOT WORK 8. 0x76c16000 0x00014000
1958 12:45:18.697472 ROMSTG STCK 9. 0x76c15000 0x00001000
1959 12:45:18.700963 AFTER CAR 10. 0x76c0a000 0x0000b000
1960 12:45:18.703912 RAMSTAGE 11. 0x76b97000 0x00073000
1961 12:45:18.707362 REFCODE 12. 0x76b42000 0x00055000
1962 12:45:18.710782 SMM BACKUP 13. 0x76b32000 0x00010000
1963 12:45:18.713767 4f444749 14. 0x76b30000 0x00002000
1964 12:45:18.717099 EXT VBT15. 0x76b2d000 0x0000219f
1965 12:45:18.720607 COREBOOT 16. 0x76b25000 0x00008000
1966 12:45:18.726980 ACPI 17. 0x76b01000 0x00024000
1967 12:45:18.730576 ACPI GNVS 18. 0x76b00000 0x00001000
1968 12:45:18.733508 RAMOOPS 19. 0x76a00000 0x00100000
1969 12:45:18.736985 TPM2 TCGLOG20. 0x769f0000 0x00010000
1970 12:45:18.740675 SMBIOS 21. 0x769ef000 0x00000800
1971 12:45:18.743640 IMD small region:
1972 12:45:18.746639 IMD ROOT 0. 0x76ffec00 0x00000400
1973 12:45:18.750195 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1974 12:45:18.753623 POWER STATE 2. 0x76ffeb80 0x00000044
1975 12:45:18.756601 ROMSTAGE 3. 0x76ffeb60 0x00000004
1976 12:45:18.763402 MEM INFO 4. 0x76ffe980 0x000001e0
1977 12:45:18.766892 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1978 12:45:18.769869 MTRR: Physical address space:
1979 12:45:18.776560 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1980 12:45:18.783163 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1981 12:45:18.790345 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1982 12:45:18.796801 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1983 12:45:18.803215 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1984 12:45:18.810141 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1985 12:45:18.816643 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1986 12:45:18.820017 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 12:45:18.822921 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 12:45:18.826393 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 12:45:18.829881 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 12:45:18.836490 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 12:45:18.839952 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 12:45:18.842892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 12:45:18.846481 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 12:45:18.852896 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 12:45:18.856391 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 12:45:18.859348 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 12:45:18.863915 call enable_fixed_mtrr()
1998 12:45:18.867355 CPU physical address size: 39 bits
1999 12:45:18.873912 MTRR: default type WB/UC MTRR counts: 6/7.
2000 12:45:18.877457 MTRR: WB selected as default type.
2001 12:45:18.883974 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2002 12:45:18.886997 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2003 12:45:18.894044 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2004 12:45:18.900546 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2005 12:45:18.906931 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2006 12:45:18.913426 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2007 12:45:18.918172
2008 12:45:18.918317 MTRR check
2009 12:45:18.921687 Fixed MTRRs : Enabled
2010 12:45:18.921786 Variable MTRRs: Enabled
2011 12:45:18.921876
2012 12:45:18.928000 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 12:45:18.931515 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 12:45:18.934502 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 12:45:18.937996 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 12:45:18.944560 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 12:45:18.947618 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 12:45:18.951261 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 12:45:18.954624 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 12:45:18.960962 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 12:45:18.964401 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 12:45:18.967866 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 12:45:18.970779 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 12:45:18.974420 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:45:18.980850 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:45:18.984420 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:45:18.987344 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:45:18.990833 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:45:18.997751 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:45:19.000644 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:45:19.004185 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:45:19.007619 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:45:19.014123 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:45:19.017627 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:45:19.024109 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 12:45:19.027612 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 12:45:19.031019 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 12:45:19.034477 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 12:45:19.041012 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 12:45:19.044025 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 12:45:19.047588 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 12:45:19.050660 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 12:45:19.057701 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 12:45:19.060672 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 12:45:19.064222 call enable_fixed_mtrr()
2046 12:45:19.067611 call enable_fixed_mtrr()
2047 12:45:19.071046 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:45:19.074113 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 12:45:19.080622 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:45:19.084272 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 12:45:19.087145 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 12:45:19.090559 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 12:45:19.097514 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 12:45:19.100413 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 12:45:19.104048 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 12:45:19.107434 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 12:45:19.113866 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 12:45:19.117288 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 12:45:19.123753 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 12:45:19.123846 call enable_fixed_mtrr()
2061 12:45:19.130582 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 12:45:19.134079 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 12:45:19.136858 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 12:45:19.140288 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 12:45:19.146861 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 12:45:19.150356 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 12:45:19.153937 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 12:45:19.156810 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 12:45:19.163861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 12:45:19.166728 CPU physical address size: 39 bits
2071 12:45:19.171802 call enable_fixed_mtrr()
2072 12:45:19.178831 BS: BS_WRITE_TABLES exit times (exec / console): 5 / 150 ms
2073 12:45:19.181815 call enable_fixed_mtrr()
2074 12:45:19.184855 Checking cr50 for pending updates
2075 12:45:19.188537 CPU physical address size: 39 bits
2076 12:45:19.192063 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 12:45:19.195659 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 12:45:19.198612 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 12:45:19.205562 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 12:45:19.208618 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 12:45:19.212143 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 12:45:19.215011 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 12:45:19.221972 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 12:45:19.225515 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 12:45:19.228464 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 12:45:19.231938 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 12:45:19.238477 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 12:45:19.242129 CPU physical address size: 39 bits
2089 12:45:19.245101 CPU physical address size: 39 bits
2090 12:45:19.248602 CPU physical address size: 39 bits
2091 12:45:19.255135 MTRR: Fixed MSR 0x258 0x0606060606060606
2092 12:45:19.255221 call enable_fixed_mtrr()
2093 12:45:19.261838 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 12:45:19.265217 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 12:45:19.268139 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 12:45:19.271551 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 12:45:19.277940 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 12:45:19.281553 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 12:45:19.284564 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 12:45:19.288106 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 12:45:19.294600 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 12:45:19.298242 CPU physical address size: 39 bits
2103 12:45:19.303045 call enable_fixed_mtrr()
2104 12:45:19.306559 Reading cr50 TPM mode
2105 12:45:19.310105 CPU physical address size: 39 bits
2106 12:45:19.316531 BS: BS_PAYLOAD_LOAD entry times (exec / console): 126 / 6 ms
2107 12:45:19.323122 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2108 12:45:19.329987 Checking segment from ROM address 0xffc02b38
2109 12:45:19.333388 Checking segment from ROM address 0xffc02b54
2110 12:45:19.336732 Loading segment from ROM address 0xffc02b38
2111 12:45:19.339641 code (compression=0)
2112 12:45:19.349717 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2113 12:45:19.356263 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2114 12:45:19.359794 it's not compressed!
2115 12:45:19.508940 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2116 12:45:19.515383 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2117 12:45:19.522921 Loading segment from ROM address 0xffc02b54
2118 12:45:19.525860 Entry Point 0x30000000
2119 12:45:19.525945 Loaded segments
2120 12:45:19.532263 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2121 12:45:19.578282 Finalizing chipset.
2122 12:45:19.581805 Finalizing SMM.
2123 12:45:19.581898 APMC done.
2124 12:45:19.587890 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2125 12:45:19.591479 mp_park_aps done after 0 msecs.
2126 12:45:19.594448 Jumping to boot code at 0x30000000(0x76b25000)
2127 12:45:19.604378 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2128 12:45:19.604495
2129 12:45:19.607896 Starting depthcharge on Voema...
2130 12:45:19.608251 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2131 12:45:19.608361 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2132 12:45:19.608448 Setting prompt string to ['volteer:']
2133 12:45:19.608533 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2134 12:45:19.617899 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2135 12:45:19.624429 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 12:45:19.630831 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2137 12:45:19.634298 Failed to find eMMC card reader
2138 12:45:19.634389 Wipe memory regions:
2139 12:45:19.641337 [0x00000000001000, 0x000000000a0000)
2140 12:45:19.644152 [0x00000000100000, 0x00000030000000)
2141 12:45:19.686260 [0x00000032662db0, 0x000000769ef000)
2142 12:45:19.744417 [0x00000100000000, 0x00000480400000)
2143 12:45:20.441713 ec_init: CrosEC protocol v3 supported (256, 256)
2144 12:45:20.874281 R8152: Initializing
2145 12:45:20.877183 Version 6 (ocp_data = 5c30)
2146 12:45:20.880686 R8152: Done initializing
2147 12:45:20.883630 Adding net device
2148 12:45:21.188682 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2149 12:45:21.188828
2150 12:45:21.191872 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2152 12:45:21.292682 volteer: tftpboot 192.168.201.1 6819480/tftp-deploy-7xaxojzq/kernel/bzImage 6819480/tftp-deploy-7xaxojzq/kernel/cmdline 6819480/tftp-deploy-7xaxojzq/ramdisk/ramdisk.cpio.gz
2153 12:45:21.292877 Setting prompt string to ['Starting kernel']
2154 12:45:21.292982 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2155 12:45:21.293066 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:42)
2156 12:45:21.297311 tftpboot 192.168.201.1 6819480/tftp-deploy-7xaxojzq/kernel/bzImoy-7xaxojzq/kernel/cmdline 6819480/tftp-deploy-7xaxojzq/ramdisk/ramdisk.cpio.gz
2157 12:45:21.297403 Waiting for link
2158 12:45:21.500216 done.
2159 12:45:21.500376 MAC: 00:24:32:30:77:d1
2160 12:45:21.503741 Sending DHCP discover... done.
2161 12:45:21.507010 Waiting for reply... done.
2162 12:45:21.510487 Sending DHCP request... done.
2163 12:45:21.513324 Waiting for reply... done.
2164 12:45:21.516875 My ip is 192.168.201.23
2165 12:45:21.520273 The DHCP server ip is 192.168.201.1
2166 12:45:21.526630 TFTP server IP predefined by user: 192.168.201.1
2167 12:45:21.533142 Bootfile predefined by user: 6819480/tftp-deploy-7xaxojzq/kernel/bzImage
2168 12:45:21.536740 Sending tftp read request... done.
2169 12:45:21.539586 Waiting for the transfer...
2170 12:45:22.077883 00000000 ################################################################
2171 12:45:22.600775 00080000 ################################################################
2172 12:45:23.150136 00100000 ################################################################
2173 12:45:23.696399 00180000 ################################################################
2174 12:45:24.239388 00200000 ################################################################
2175 12:45:24.824647 00280000 ################################################################
2176 12:45:25.383216 00300000 ################################################################
2177 12:45:25.931893 00380000 ################################################################
2178 12:45:26.483322 00400000 ################################################################
2179 12:45:27.069935 00480000 ################################################################
2180 12:45:27.649520 00500000 ################################################################
2181 12:45:28.220951 00580000 ################################################################
2182 12:45:28.831807 00600000 ################################################################ done.
2183 12:45:28.835240 The bootfile was 6811536 bytes long.
2184 12:45:28.838709 Sending tftp read request... done.
2185 12:45:28.841809 Waiting for the transfer...
2186 12:45:29.457107 00000000 ################################################################
2187 12:45:30.034759 00080000 ################################################################
2188 12:45:30.615666 00100000 ################################################################
2189 12:45:31.204992 00180000 ################################################################
2190 12:45:31.746288 00200000 ################################################################
2191 12:45:32.320559 00280000 ################################################################
2192 12:45:32.884955 00300000 ################################################################
2193 12:45:33.450570 00380000 ################################################################
2194 12:45:34.034662 00400000 ################################################################
2195 12:45:34.615340 00480000 ################################################################
2196 12:45:34.858506 00500000 ############################# done.
2197 12:45:34.862033 Sending tftp read request... done.
2198 12:45:34.865558 Waiting for the transfer...
2199 12:45:34.865646 00000000 # done.
2200 12:45:34.875413 Command line loaded dynamically from TFTP file: 6819480/tftp-deploy-7xaxojzq/kernel/cmdline
2201 12:45:34.898451 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819480/extract-nfsrootfs-h58vheqj,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2202 12:45:34.901401 Shutting down all USB controllers.
2203 12:45:34.904905 Removing current net device
2204 12:45:34.908370 Finalizing coreboot
2205 12:45:34.914983 Exiting depthcharge with code 4 at timestamp: 23947141
2206 12:45:34.915070
2207 12:45:34.915142 Starting kernel ...
2208 12:45:34.915206
2209 12:45:34.915269
2210 12:45:34.915558 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2211 12:45:34.915655 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2212 12:45:34.915730 Setting prompt string to ['Linux version [0-9]']
2213 12:45:34.915801 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2214 12:45:34.915873 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2216 12:50:03.916634 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2218 12:50:03.917863 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2220 12:50:03.918781 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2223 12:50:03.920386 end: 2 depthcharge-action (duration 00:05:00) [common]
2225 12:50:03.921075 Cleaning after the job
2226 12:50:03.921191 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/ramdisk
2227 12:50:03.921677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/kernel
2228 12:50:03.922197 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/nfsrootfs
2229 12:50:03.961890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819480/tftp-deploy-7xaxojzq/modules
2230 12:50:03.962207 start: 4.1 power-off (timeout 00:00:30) [common]
2231 12:50:03.962376 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2232 12:50:03.981534 >> Command sent successfully.
2233 12:50:03.983406 Returned 0 in 0 seconds
2234 12:50:04.084591 end: 4.1 power-off (duration 00:00:00) [common]
2236 12:50:04.086220 start: 4.2 read-feedback (timeout 00:10:00) [common]
2237 12:50:04.087490 Listened to connection for namespace 'common' for up to 1s
2238 12:50:05.091158 Finalising connection for namespace 'common'
2239 12:50:05.091871 Disconnecting from shell: Finalise
2240 12:50:05.193291 end: 4.2 read-feedback (duration 00:00:01) [common]
2241 12:50:05.193918 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819480
2242 12:50:05.402932 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819480
2243 12:50:05.403129 JobError: Your job cannot terminate cleanly.