Boot log: asus-C436FA-Flip-hatch

    1 12:51:03.389077  lava-dispatcher, installed at version: 2022.04
    2 12:51:03.389267  start: 0 validate
    3 12:51:03.389401  Start time: 2022-07-14 12:51:03.389394+00:00 (UTC)
    4 12:51:03.389522  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:51:03.389649  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:51:03.678983  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:51:03.679739  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:51:03.970004  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:51:03.970703  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:51:04.260142  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:51:04.260877  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:51:04.554693  validate duration: 1.17
   14 12:51:04.554971  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:51:04.555080  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:51:04.555178  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:51:04.555274  Not decompressing ramdisk as can be used compressed.
   18 12:51:04.555362  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220708.0/amd64/initrd.cpio.gz
   19 12:51:04.555432  saving as /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/ramdisk/initrd.cpio.gz
   20 12:51:04.555515  total size: 5411032 (5MB)
   21 12:51:04.556624  progress   0% (0MB)
   22 12:51:04.558067  progress   5% (0MB)
   23 12:51:04.559382  progress  10% (0MB)
   24 12:51:04.560724  progress  15% (0MB)
   25 12:51:04.562179  progress  20% (1MB)
   26 12:51:04.563449  progress  25% (1MB)
   27 12:51:04.564712  progress  30% (1MB)
   28 12:51:04.565982  progress  35% (1MB)
   29 12:51:04.567393  progress  40% (2MB)
   30 12:51:04.568654  progress  45% (2MB)
   31 12:51:04.569955  progress  50% (2MB)
   32 12:51:04.571349  progress  55% (2MB)
   33 12:51:04.572773  progress  60% (3MB)
   34 12:51:04.574109  progress  65% (3MB)
   35 12:51:04.575374  progress  70% (3MB)
   36 12:51:04.576636  progress  75% (3MB)
   37 12:51:04.578242  progress  80% (4MB)
   38 12:51:04.579516  progress  85% (4MB)
   39 12:51:04.580780  progress  90% (4MB)
   40 12:51:04.582103  progress  95% (4MB)
   41 12:51:04.583530  progress 100% (5MB)
   42 12:51:04.583701  5MB downloaded in 0.03s (183.12MB/s)
   43 12:51:04.583851  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:51:04.584093  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:51:04.584181  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:51:04.584266  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:51:04.584366  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 12:51:04.584437  saving as /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/kernel/bzImage
   50 12:51:04.584498  total size: 6811536 (6MB)
   51 12:51:04.584558  No compression specified
   52 12:51:04.585689  progress   0% (0MB)
   53 12:51:04.587540  progress   5% (0MB)
   54 12:51:04.589225  progress  10% (0MB)
   55 12:51:04.590989  progress  15% (1MB)
   56 12:51:04.592576  progress  20% (1MB)
   57 12:51:04.594227  progress  25% (1MB)
   58 12:51:04.595966  progress  30% (1MB)
   59 12:51:04.597586  progress  35% (2MB)
   60 12:51:04.599295  progress  40% (2MB)
   61 12:51:04.600857  progress  45% (2MB)
   62 12:51:04.602518  progress  50% (3MB)
   63 12:51:04.604232  progress  55% (3MB)
   64 12:51:04.605839  progress  60% (3MB)
   65 12:51:04.607550  progress  65% (4MB)
   66 12:51:04.609153  progress  70% (4MB)
   67 12:51:04.610711  progress  75% (4MB)
   68 12:51:04.612419  progress  80% (5MB)
   69 12:51:04.613980  progress  85% (5MB)
   70 12:51:04.615714  progress  90% (5MB)
   71 12:51:04.617318  progress  95% (6MB)
   72 12:51:04.618922  progress 100% (6MB)
   73 12:51:04.619178  6MB downloaded in 0.03s (187.34MB/s)
   74 12:51:04.619323  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:51:04.619556  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:51:04.619644  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:51:04.619730  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:51:04.619833  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220708.0/amd64/full.rootfs.tar.xz
   80 12:51:04.619900  saving as /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/nfsrootfs/full.rootfs.tar
   81 12:51:04.619961  total size: 207060584 (197MB)
   82 12:51:04.620037  Using unxz to decompress xz
   83 12:51:04.623273  progress   0% (0MB)
   84 12:51:05.175714  progress   5% (9MB)
   85 12:51:05.703008  progress  10% (19MB)
   86 12:51:06.287761  progress  15% (29MB)
   87 12:51:06.641769  progress  20% (39MB)
   88 12:51:07.002325  progress  25% (49MB)
   89 12:51:07.584293  progress  30% (59MB)
   90 12:51:08.123071  progress  35% (69MB)
   91 12:51:08.710616  progress  40% (79MB)
   92 12:51:09.253425  progress  45% (88MB)
   93 12:51:09.821683  progress  50% (98MB)
   94 12:51:10.432408  progress  55% (108MB)
   95 12:51:11.104054  progress  60% (118MB)
   96 12:51:11.248198  progress  65% (128MB)
   97 12:51:11.397957  progress  70% (138MB)
   98 12:51:11.496574  progress  75% (148MB)
   99 12:51:11.568660  progress  80% (158MB)
  100 12:51:11.635303  progress  85% (167MB)
  101 12:51:11.736127  progress  90% (177MB)
  102 12:51:11.999565  progress  95% (187MB)
  103 12:51:12.573567  progress 100% (197MB)
  104 12:51:12.579921  197MB downloaded in 7.96s (24.81MB/s)
  105 12:51:12.580175  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:51:12.580431  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:51:12.580523  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:51:12.580609  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:51:12.580724  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 12:51:12.580797  saving as /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/modules/modules.tar
  112 12:51:12.580858  total size: 51960 (0MB)
  113 12:51:12.580920  Using unxz to decompress xz
  114 12:51:12.584300  progress  63% (0MB)
  115 12:51:12.584680  progress 100% (0MB)
  116 12:51:12.587935  0MB downloaded in 0.01s (7.01MB/s)
  117 12:51:12.588148  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 12:51:12.588402  end: 1.4 download-retry (duration 00:00:00) [common]
  120 12:51:12.588497  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 12:51:12.588589  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 12:51:14.593939  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819482/extract-nfsrootfs-41cwzfn3
  123 12:51:14.594150  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 12:51:14.594254  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 12:51:14.594416  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp
  126 12:51:14.594518  makedir: /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin
  127 12:51:14.594602  makedir: /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/tests
  128 12:51:14.594680  makedir: /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/results
  129 12:51:14.594776  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-add-keys
  130 12:51:14.594909  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-add-sources
  131 12:51:14.595062  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-background-process-start
  132 12:51:14.595175  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-background-process-stop
  133 12:51:14.595286  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-common-functions
  134 12:51:14.595394  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-echo-ipv4
  135 12:51:14.595502  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-install-packages
  136 12:51:14.595608  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-installed-packages
  137 12:51:14.595714  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-os-build
  138 12:51:14.595820  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-probe-channel
  139 12:51:14.595925  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-probe-ip
  140 12:51:14.596030  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-target-ip
  141 12:51:14.596136  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-target-mac
  142 12:51:14.596241  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-target-storage
  143 12:51:14.596348  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-case
  144 12:51:14.596455  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-event
  145 12:51:14.596560  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-feedback
  146 12:51:14.596664  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-raise
  147 12:51:14.596768  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-reference
  148 12:51:14.596873  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-runner
  149 12:51:14.597147  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-set
  150 12:51:14.597256  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-test-shell
  151 12:51:14.597364  Updating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-add-keys (debian)
  152 12:51:14.597474  Updating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-add-sources (debian)
  153 12:51:14.597584  Updating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-install-packages (debian)
  154 12:51:14.597692  Updating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-installed-packages (debian)
  155 12:51:14.597800  Updating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/bin/lava-os-build (debian)
  156 12:51:14.597893  Creating /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/environment
  157 12:51:14.597977  LAVA metadata
  158 12:51:14.598042  - LAVA_JOB_ID=6819482
  159 12:51:14.598104  - LAVA_DISPATCHER_IP=192.168.201.1
  160 12:51:14.598199  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  161 12:51:14.598262  skipped lava-vland-overlay
  162 12:51:14.598336  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 12:51:14.598415  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  164 12:51:14.598474  skipped lava-multinode-overlay
  165 12:51:14.598545  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 12:51:14.598623  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  167 12:51:14.598694  Loading test definitions
  168 12:51:14.598781  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  169 12:51:14.598852  Using /lava-6819482 at stage 0
  170 12:51:14.599077  uuid=6819482_1.5.2.3.1 testdef=None
  171 12:51:14.599165  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 12:51:14.599247  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  173 12:51:14.599686  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 12:51:14.599908  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  176 12:51:14.600383  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 12:51:14.600618  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  179 12:51:14.601126  runner path: /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/0/tests/0_timesync-off test_uuid 6819482_1.5.2.3.1
  180 12:51:14.601272  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 12:51:14.601500  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  183 12:51:14.601572  Using /lava-6819482 at stage 0
  184 12:51:14.601667  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 12:51:14.601747  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/0/tests/1_kselftest-filesystems'
  186 12:51:19.166583  Running '/usr/bin/git checkout kernelci.org
  187 12:51:19.286954  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  188 12:51:19.287609  uuid=6819482_1.5.2.3.5 testdef=None
  189 12:51:19.287771  end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
  191 12:51:19.288020  start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
  192 12:51:19.288696  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 12:51:19.288932  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
  195 12:51:19.289824  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 12:51:19.290067  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
  198 12:51:19.290941  runner path: /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/0/tests/1_kselftest-filesystems test_uuid 6819482_1.5.2.3.5
  199 12:51:19.291032  BOARD='asus-C436FA-Flip-hatch'
  200 12:51:19.291098  BRANCH='cip'
  201 12:51:19.291157  SKIPFILE='skipfile-lkft.yaml'
  202 12:51:19.291216  TESTPROG_URL='None'
  203 12:51:19.291273  TST_CASENAME=''
  204 12:51:19.291330  TST_CMDFILES='filesystems'
  205 12:51:19.291460  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 12:51:19.291670  Creating lava-test-runner.conf files
  208 12:51:19.291735  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819482/lava-overlay-gxjjjhnp/lava-6819482/0 for stage 0
  209 12:51:19.291818  - 0_timesync-off
  210 12:51:19.291886  - 1_kselftest-filesystems
  211 12:51:19.291975  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  212 12:51:19.292062  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  213 12:51:26.302502  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 12:51:26.302667  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
  215 12:51:26.302765  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 12:51:26.302867  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  217 12:51:26.302958  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
  218 12:51:26.403999  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 12:51:26.404343  start: 1.5.4 extract-modules (timeout 00:09:38) [common]
  220 12:51:26.404457  extracting modules file /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819482/extract-nfsrootfs-41cwzfn3
  221 12:51:26.408471  extracting modules file /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819482/extract-overlay-ramdisk-h4j_xk_l/ramdisk
  222 12:51:26.412338  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 12:51:26.412450  start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
  224 12:51:26.412540  [common] Applying overlay to NFS
  225 12:51:26.412614  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819482/compress-overlay-oofe__h1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819482/extract-nfsrootfs-41cwzfn3
  226 12:51:26.850787  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 12:51:26.850953  start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
  228 12:51:26.851050  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 12:51:26.851139  start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
  230 12:51:26.851222  Building ramdisk /var/lib/lava/dispatcher/tmp/6819482/extract-overlay-ramdisk-h4j_xk_l/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819482/extract-overlay-ramdisk-h4j_xk_l/ramdisk
  231 12:51:26.884305  >> 24434 blocks

  232 12:51:27.349897  rename /var/lib/lava/dispatcher/tmp/6819482/extract-overlay-ramdisk-h4j_xk_l/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/ramdisk/ramdisk.cpio.gz
  233 12:51:27.350302  end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
  234 12:51:27.350425  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  235 12:51:27.350525  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  236 12:51:27.350622  No mkimage arch provided, not using FIT.
  237 12:51:27.350711  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 12:51:27.350792  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 12:51:27.350888  end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
  240 12:51:27.350976  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  241 12:51:27.351052  No LXC device requested
  242 12:51:27.351139  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 12:51:27.351229  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  244 12:51:27.351313  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 12:51:27.351381  Checking files for TFTP limit of 4294967296 bytes.
  246 12:51:27.351791  end: 1 tftp-deploy (duration 00:00:23) [common]
  247 12:51:27.351893  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 12:51:27.351987  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 12:51:27.352116  substitutions:
  250 12:51:27.352186  - {DTB}: None
  251 12:51:27.352247  - {INITRD}: 6819482/tftp-deploy-d9ijljyq/ramdisk/ramdisk.cpio.gz
  252 12:51:27.352307  - {KERNEL}: 6819482/tftp-deploy-d9ijljyq/kernel/bzImage
  253 12:51:27.352365  - {LAVA_MAC}: None
  254 12:51:27.352421  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819482/extract-nfsrootfs-41cwzfn3
  255 12:51:27.352480  - {NFS_SERVER_IP}: 192.168.201.1
  256 12:51:27.352536  - {PRESEED_CONFIG}: None
  257 12:51:27.352592  - {PRESEED_LOCAL}: None
  258 12:51:27.352647  - {RAMDISK}: 6819482/tftp-deploy-d9ijljyq/ramdisk/ramdisk.cpio.gz
  259 12:51:27.352703  - {ROOT_PART}: None
  260 12:51:27.352757  - {ROOT}: None
  261 12:51:27.352811  - {SERVER_IP}: 192.168.201.1
  262 12:51:27.352866  - {TEE}: None
  263 12:51:27.352921  Parsed boot commands:
  264 12:51:27.353003  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 12:51:27.353171  Parsed boot commands: tftpboot 192.168.201.1 6819482/tftp-deploy-d9ijljyq/kernel/bzImage 6819482/tftp-deploy-d9ijljyq/kernel/cmdline 6819482/tftp-deploy-d9ijljyq/ramdisk/ramdisk.cpio.gz
  266 12:51:27.353262  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 12:51:27.353350  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 12:51:27.353440  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 12:51:27.353527  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 12:51:27.353596  Not connected, no need to disconnect.
  271 12:51:27.353671  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 12:51:27.353754  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 12:51:27.353822  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 12:51:27.356479  Setting prompt string to ['lava-test: # ']
  275 12:51:27.356759  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 12:51:27.356864  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 12:51:27.356985  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 12:51:27.357086  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 12:51:27.357259  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 12:51:27.375924  >> Command sent successfully.

  281 12:51:27.377804  Returned 0 in 0 seconds
  282 12:51:27.479025  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 12:51:27.480419  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 12:51:27.480904  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 12:51:27.481394  Setting prompt string to 'Starting depthcharge on Helios...'
  287 12:51:27.481739  Changing prompt to 'Starting depthcharge on Helios...'
  288 12:51:27.482103  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 12:51:27.483303  [Enter `^Ec?' for help]
  290 12:51:34.179082  
  291 12:51:34.179686  
  292 12:51:34.189154  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 12:51:34.191833  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 12:51:34.198719  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 12:51:34.201976  CPU: AES supported, TXT NOT supported, VT supported
  296 12:51:34.208727  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 12:51:34.212317  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 12:51:34.219049  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 12:51:34.221844  VBOOT: Loading verstage.
  300 12:51:34.225868  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 12:51:34.231744  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 12:51:34.238901  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 12:51:34.239488  CBFS @ c08000 size 3f8000
  304 12:51:34.245373  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 12:51:34.248770  CBFS: Locating 'fallback/verstage'
  306 12:51:34.251742  CBFS: Found @ offset 10fb80 size 1072c
  307 12:51:34.255960  
  308 12:51:34.256447  
  309 12:51:34.265705  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 12:51:34.279932  Probing TPM: . done!
  311 12:51:34.283402  TPM ready after 0 ms
  312 12:51:34.286940  Connected to device vid:did:rid of 1ae0:0028:00
  313 12:51:34.296628  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 12:51:34.300645  Initialized TPM device CR50 revision 0
  315 12:51:34.335777  tlcl_send_startup: Startup return code is 0
  316 12:51:34.336368  TPM: setup succeeded
  317 12:51:34.348461  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 12:51:34.352068  Chrome EC: UHEPI supported
  319 12:51:34.355548  Phase 1
  320 12:51:34.359204  FMAP: area GBB found @ c05000 (12288 bytes)
  321 12:51:34.365739  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 12:51:34.369333  Phase 2
  323 12:51:34.369917  Phase 3
  324 12:51:34.372444  FMAP: area GBB found @ c05000 (12288 bytes)
  325 12:51:34.378769  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 12:51:34.385444  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  327 12:51:34.389048  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  328 12:51:34.395409  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 12:51:34.411364  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  330 12:51:34.414375  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  331 12:51:34.421707  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 12:51:34.425491  Phase 4
  333 12:51:34.429170  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  334 12:51:34.435243  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 12:51:34.615041  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 12:51:34.621889  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 12:51:34.622477  Saving nvdata
  338 12:51:34.624769  Reboot requested (10020007)
  339 12:51:34.628576  board_reset() called!
  340 12:51:34.629195  full_reset() called!
  341 12:51:39.146075  
  342 12:51:39.146659  
  343 12:51:39.155775  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 12:51:39.159104  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 12:51:39.165714  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 12:51:39.169217  CPU: AES supported, TXT NOT supported, VT supported
  347 12:51:39.175331  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 12:51:39.179096  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 12:51:39.185520  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 12:51:39.188661  VBOOT: Loading verstage.
  351 12:51:39.192623  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 12:51:39.198906  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 12:51:39.205238  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 12:51:39.205474  CBFS @ c08000 size 3f8000
  355 12:51:39.212050  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 12:51:39.215639  CBFS: Locating 'fallback/verstage'
  357 12:51:39.218839  CBFS: Found @ offset 10fb80 size 1072c
  358 12:51:39.222771  
  359 12:51:39.223162  
  360 12:51:39.232807  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 12:51:39.247509  Probing TPM: . done!
  362 12:51:39.250871  TPM ready after 0 ms
  363 12:51:39.254251  Connected to device vid:did:rid of 1ae0:0028:00
  364 12:51:39.264154  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 12:51:39.267891  Initialized TPM device CR50 revision 0
  366 12:51:39.302776  tlcl_send_startup: Startup return code is 0
  367 12:51:39.303385  TPM: setup succeeded
  368 12:51:39.315790  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 12:51:39.319379  Chrome EC: UHEPI supported
  370 12:51:39.322415  Phase 1
  371 12:51:39.326196  FMAP: area GBB found @ c05000 (12288 bytes)
  372 12:51:39.332489  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 12:51:39.339615  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 12:51:39.342455  Recovery requested (1009000e)
  375 12:51:39.348809  Saving nvdata
  376 12:51:39.354499  tlcl_extend: response is 0
  377 12:51:39.363862  tlcl_extend: response is 0
  378 12:51:39.370500  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 12:51:39.373342  CBFS @ c08000 size 3f8000
  380 12:51:39.380563  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 12:51:39.383561  CBFS: Locating 'fallback/romstage'
  382 12:51:39.386846  CBFS: Found @ offset 80 size 145fc
  383 12:51:39.389924  Accumulated console time in verstage 99 ms
  384 12:51:39.390399  
  385 12:51:39.390778  
  386 12:51:39.403418  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 12:51:39.410289  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 12:51:39.413058  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 12:51:39.416621  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 12:51:39.423392  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 12:51:39.426425  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 12:51:39.430625  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  393 12:51:39.433540  TCO_STS:   0000 0000
  394 12:51:39.436632  GEN_PMCON: e0015238 00000200
  395 12:51:39.440284  GBLRST_CAUSE: 00000000 00000000
  396 12:51:39.440854  prev_sleep_state 5
  397 12:51:39.443293  Boot Count incremented to 32347
  398 12:51:39.450049  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 12:51:39.453465  CBFS @ c08000 size 3f8000
  400 12:51:39.459740  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 12:51:39.460306  CBFS: Locating 'fspm.bin'
  402 12:51:39.466898  CBFS: Found @ offset 5ffc0 size 71000
  403 12:51:39.470451  Chrome EC: UHEPI supported
  404 12:51:39.476289  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 12:51:39.480212  Probing TPM:  done!
  406 12:51:39.487380  Connected to device vid:did:rid of 1ae0:0028:00
  407 12:51:39.496797  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 12:51:39.502950  Initialized TPM device CR50 revision 0
  409 12:51:39.511953  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 12:51:39.518538  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 12:51:39.521868  MRC cache found, size 1948
  412 12:51:39.525477  bootmode is set to: 2
  413 12:51:39.528002  PRMRR disabled by config.
  414 12:51:39.528486  SPD INDEX = 1
  415 12:51:39.534986  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 12:51:39.538831  CBFS @ c08000 size 3f8000
  417 12:51:39.545324  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 12:51:39.545894  CBFS: Locating 'spd.bin'
  419 12:51:39.548215  CBFS: Found @ offset 5fb80 size 400
  420 12:51:39.551878  SPD: module type is LPDDR3
  421 12:51:39.554959  SPD: module part is 
  422 12:51:39.561803  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 12:51:39.565006  SPD: device width 4 bits, bus width 8 bits
  424 12:51:39.568724  SPD: module size is 4096 MB (per channel)
  425 12:51:39.571534  memory slot: 0 configuration done.
  426 12:51:39.574856  memory slot: 2 configuration done.
  427 12:51:39.626526  CBMEM:
  428 12:51:39.629787  IMD: root @ 99fff000 254 entries.
  429 12:51:39.633286  IMD: root @ 99ffec00 62 entries.
  430 12:51:39.636283  External stage cache:
  431 12:51:39.639751  IMD: root @ 9abff000 254 entries.
  432 12:51:39.642634  IMD: root @ 9abfec00 62 entries.
  433 12:51:39.646250  Chrome EC: clear events_b mask to 0x0000000020004000
  434 12:51:39.662904  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 12:51:39.675751  tlcl_write: response is 0
  436 12:51:39.685018  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 12:51:39.691834  MRC: TPM MRC hash updated successfully.
  438 12:51:39.692410  2 DIMMs found
  439 12:51:39.694388  SMM Memory Map
  440 12:51:39.697584  SMRAM       : 0x9a000000 0x1000000
  441 12:51:39.701226   Subregion 0: 0x9a000000 0xa00000
  442 12:51:39.704505   Subregion 1: 0x9aa00000 0x200000
  443 12:51:39.708268   Subregion 2: 0x9ac00000 0x400000
  444 12:51:39.711151  top_of_ram = 0x9a000000
  445 12:51:39.714496  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 12:51:39.721202  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 12:51:39.724176  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 12:51:39.730870  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 12:51:39.734053  CBFS @ c08000 size 3f8000
  450 12:51:39.737594  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 12:51:39.741038  CBFS: Locating 'fallback/postcar'
  452 12:51:39.747225  CBFS: Found @ offset 107000 size 4b44
  453 12:51:39.754186  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 12:51:39.764785  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 12:51:39.767547  Processing 180 relocs. Offset value of 0x97c0c000
  456 12:51:39.775837  Accumulated console time in romstage 286 ms
  457 12:51:39.776396  
  458 12:51:39.776826  
  459 12:51:39.785620  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 12:51:39.791930  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 12:51:39.795746  CBFS @ c08000 size 3f8000
  462 12:51:39.798715  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 12:51:39.805985  CBFS: Locating 'fallback/ramstage'
  464 12:51:39.808573  CBFS: Found @ offset 43380 size 1b9e8
  465 12:51:39.815336  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 12:51:39.847324  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 12:51:39.850866  Processing 3976 relocs. Offset value of 0x98db0000
  468 12:51:39.857468  Accumulated console time in postcar 52 ms
  469 12:51:39.858050  
  470 12:51:39.858439  
  471 12:51:39.867292  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 12:51:39.873911  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 12:51:39.876941  WARNING: RO_VPD is uninitialized or empty.
  474 12:51:39.880693  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 12:51:39.887091  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 12:51:39.887579  Normal boot.
  477 12:51:39.893580  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 12:51:39.897408  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 12:51:39.900382  CBFS @ c08000 size 3f8000
  480 12:51:39.906771  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 12:51:39.910726  CBFS: Locating 'cpu_microcode_blob.bin'
  482 12:51:39.913806  CBFS: Found @ offset 14700 size 2ec00
  483 12:51:39.917627  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 12:51:39.920523  Skip microcode update
  485 12:51:39.926772  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 12:51:39.927349  CBFS @ c08000 size 3f8000
  487 12:51:39.933602  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 12:51:39.936873  CBFS: Locating 'fsps.bin'
  489 12:51:39.940051  CBFS: Found @ offset d1fc0 size 35000
  490 12:51:39.965644  Detected 4 core, 8 thread CPU.
  491 12:51:39.969208  Setting up SMI for CPU
  492 12:51:39.972331  IED base = 0x9ac00000
  493 12:51:39.972909  IED size = 0x00400000
  494 12:51:39.975538  Will perform SMM setup.
  495 12:51:39.982273  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 12:51:39.989519  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 12:51:39.995249  Processing 16 relocs. Offset value of 0x00030000
  498 12:51:39.995863  Attempting to start 7 APs
  499 12:51:40.001542  Waiting for 10ms after sending INIT.
  500 12:51:40.015638  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
  501 12:51:40.016218  done.
  502 12:51:40.018533  AP: slot 1 apic_id 2.
  503 12:51:40.021781  AP: slot 4 apic_id 3.
  504 12:51:40.022353  AP: slot 7 apic_id 5.
  505 12:51:40.025502  AP: slot 6 apic_id 4.
  506 12:51:40.028861  Waiting for 2nd SIPI to complete...done.
  507 12:51:40.031973  AP: slot 5 apic_id 7.
  508 12:51:40.035375  AP: slot 2 apic_id 6.
  509 12:51:40.041446  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 12:51:40.048538  Processing 13 relocs. Offset value of 0x00038000
  511 12:51:40.055171  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 12:51:40.058291  Installing SMM handler to 0x9a000000
  513 12:51:40.064980  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 12:51:40.071541  Processing 658 relocs. Offset value of 0x9a010000
  515 12:51:40.077893  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 12:51:40.081275  Processing 13 relocs. Offset value of 0x9a008000
  517 12:51:40.088037  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 12:51:40.094259  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 12:51:40.101328  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 12:51:40.105214  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 12:51:40.111995  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 12:51:40.118116  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 12:51:40.124226  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 12:51:40.130559  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 12:51:40.134664  Clearing SMI status registers
  526 12:51:40.135278  SMI_STS: PM1 
  527 12:51:40.137730  PM1_STS: PWRBTN 
  528 12:51:40.138320  TCO_STS: SECOND_TO 
  529 12:51:40.141128  New SMBASE 0x9a000000
  530 12:51:40.144214  In relocation handler: CPU 0
  531 12:51:40.147451  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 12:51:40.150647  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 12:51:40.154090  Relocation complete.
  534 12:51:40.157678  New SMBASE 0x99fff400
  535 12:51:40.160718  In relocation handler: CPU 3
  536 12:51:40.164321  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  537 12:51:40.167055  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 12:51:40.171724  Relocation complete.
  539 12:51:40.174013  New SMBASE 0x99ffec00
  540 12:51:40.177496  In relocation handler: CPU 5
  541 12:51:40.180926  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  542 12:51:40.184267  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 12:51:40.186873  Relocation complete.
  544 12:51:40.190256  New SMBASE 0x99fff800
  545 12:51:40.193822  In relocation handler: CPU 2
  546 12:51:40.197330  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  547 12:51:40.200488  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 12:51:40.203714  Relocation complete.
  549 12:51:40.206932  New SMBASE 0x99fffc00
  550 12:51:40.210348  In relocation handler: CPU 1
  551 12:51:40.213897  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  552 12:51:40.217514  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 12:51:40.221511  Relocation complete.
  554 12:51:40.223499  New SMBASE 0x99fff000
  555 12:51:40.224087  In relocation handler: CPU 4
  556 12:51:40.230647  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  557 12:51:40.233649  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 12:51:40.236885  Relocation complete.
  559 12:51:40.240630  New SMBASE 0x99ffe400
  560 12:51:40.241153  In relocation handler: CPU 7
  561 12:51:40.246594  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  562 12:51:40.250219  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 12:51:40.253762  Relocation complete.
  564 12:51:40.257506  New SMBASE 0x99ffe800
  565 12:51:40.258137  In relocation handler: CPU 6
  566 12:51:40.263311  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  567 12:51:40.266256  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 12:51:40.269849  Relocation complete.
  569 12:51:40.270437  Initializing CPU #0
  570 12:51:40.273158  CPU: vendor Intel device 806ec
  571 12:51:40.279665  CPU: family 06, model 8e, stepping 0c
  572 12:51:40.280242  Clearing out pending MCEs
  573 12:51:40.282970  Setting up local APIC...
  574 12:51:40.286477   apic_id: 0x00 done.
  575 12:51:40.289916  Turbo is available but hidden
  576 12:51:40.292862  Turbo is available and visible
  577 12:51:40.293379  VMX status: enabled
  578 12:51:40.296238  IA32_FEATURE_CONTROL status: locked
  579 12:51:40.299989  Skip microcode update
  580 12:51:40.302950  CPU #0 initialized
  581 12:51:40.303552  Initializing CPU #3
  582 12:51:40.306314  Initializing CPU #2
  583 12:51:40.309403  Initializing CPU #5
  584 12:51:40.309888  CPU: vendor Intel device 806ec
  585 12:51:40.316500  CPU: family 06, model 8e, stepping 0c
  586 12:51:40.319256  CPU: vendor Intel device 806ec
  587 12:51:40.323561  CPU: family 06, model 8e, stepping 0c
  588 12:51:40.326346  Clearing out pending MCEs
  589 12:51:40.326934  Clearing out pending MCEs
  590 12:51:40.329189  CPU: vendor Intel device 806ec
  591 12:51:40.332627  CPU: family 06, model 8e, stepping 0c
  592 12:51:40.335978  Clearing out pending MCEs
  593 12:51:40.338997  Initializing CPU #7
  594 12:51:40.339482  Initializing CPU #6
  595 12:51:40.342384  CPU: vendor Intel device 806ec
  596 12:51:40.348930  CPU: family 06, model 8e, stepping 0c
  597 12:51:40.349598  CPU: vendor Intel device 806ec
  598 12:51:40.355559  CPU: family 06, model 8e, stepping 0c
  599 12:51:40.356132  Clearing out pending MCEs
  600 12:51:40.359595  Clearing out pending MCEs
  601 12:51:40.362321  Setting up local APIC...
  602 12:51:40.366088  Setting up local APIC...
  603 12:51:40.366668   apic_id: 0x05 done.
  604 12:51:40.369594   apic_id: 0x01 done.
  605 12:51:40.372669  VMX status: enabled
  606 12:51:40.373296  Setting up local APIC...
  607 12:51:40.375862  Initializing CPU #1
  608 12:51:40.378987  Initializing CPU #4
  609 12:51:40.382483  CPU: vendor Intel device 806ec
  610 12:51:40.385240  CPU: family 06, model 8e, stepping 0c
  611 12:51:40.388775  CPU: vendor Intel device 806ec
  612 12:51:40.392429  CPU: family 06, model 8e, stepping 0c
  613 12:51:40.395621  Clearing out pending MCEs
  614 12:51:40.396105  Clearing out pending MCEs
  615 12:51:40.398841  Setting up local APIC...
  616 12:51:40.402313  VMX status: enabled
  617 12:51:40.402904   apic_id: 0x04 done.
  618 12:51:40.408640  IA32_FEATURE_CONTROL status: locked
  619 12:51:40.409155  VMX status: enabled
  620 12:51:40.412205  Skip microcode update
  621 12:51:40.415553  IA32_FEATURE_CONTROL status: locked
  622 12:51:40.418601  CPU #7 initialized
  623 12:51:40.419095  Skip microcode update
  624 12:51:40.421735  IA32_FEATURE_CONTROL status: locked
  625 12:51:40.426413   apic_id: 0x02 done.
  626 12:51:40.428362  Setting up local APIC...
  627 12:51:40.431627  Setting up local APIC...
  628 12:51:40.432211   apic_id: 0x03 done.
  629 12:51:40.434832  VMX status: enabled
  630 12:51:40.435314  VMX status: enabled
  631 12:51:40.438524  IA32_FEATURE_CONTROL status: locked
  632 12:51:40.444979  IA32_FEATURE_CONTROL status: locked
  633 12:51:40.445588  Skip microcode update
  634 12:51:40.448127  Skip microcode update
  635 12:51:40.451359  CPU #1 initialized
  636 12:51:40.451943  CPU #4 initialized
  637 12:51:40.454821  CPU #6 initialized
  638 12:51:40.455405  Skip microcode update
  639 12:51:40.458181   apic_id: 0x07 done.
  640 12:51:40.461753  Setting up local APIC...
  641 12:51:40.462345  CPU #3 initialized
  642 12:51:40.464668   apic_id: 0x06 done.
  643 12:51:40.467734  VMX status: enabled
  644 12:51:40.468216  VMX status: enabled
  645 12:51:40.471763  IA32_FEATURE_CONTROL status: locked
  646 12:51:40.474639  IA32_FEATURE_CONTROL status: locked
  647 12:51:40.477644  Skip microcode update
  648 12:51:40.481308  Skip microcode update
  649 12:51:40.481817  CPU #5 initialized
  650 12:51:40.484712  CPU #2 initialized
  651 12:51:40.488177  bsp_do_flight_plan done after 457 msecs.
  652 12:51:40.491256  CPU: frequency set to 4200 MHz
  653 12:51:40.494413  Enabling SMIs.
  654 12:51:40.494898  Locking SMM.
  655 12:51:40.509529  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 12:51:40.513138  CBFS @ c08000 size 3f8000
  657 12:51:40.519413  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 12:51:40.520142  CBFS: Locating 'vbt.bin'
  659 12:51:40.522430  CBFS: Found @ offset 5f5c0 size 499
  660 12:51:40.529508  Found a VBT of 4608 bytes after decompression
  661 12:51:40.713183  Display FSP Version Info HOB
  662 12:51:40.716646  Reference Code - CPU = 9.0.1e.30
  663 12:51:40.719678  uCode Version = 0.0.0.ca
  664 12:51:40.722861  TXT ACM version = ff.ff.ff.ffff
  665 12:51:40.726782  Display FSP Version Info HOB
  666 12:51:40.729653  Reference Code - ME = 9.0.1e.30
  667 12:51:40.733134  MEBx version = 0.0.0.0
  668 12:51:40.736320  ME Firmware Version = Consumer SKU
  669 12:51:40.740007  Display FSP Version Info HOB
  670 12:51:40.742604  Reference Code - CML PCH = 9.0.1e.30
  671 12:51:40.746081  PCH-CRID Status = Disabled
  672 12:51:40.749170  PCH-CRID Original Value = ff.ff.ff.ffff
  673 12:51:40.753055  PCH-CRID New Value = ff.ff.ff.ffff
  674 12:51:40.756046  OPROM - RST - RAID = ff.ff.ff.ffff
  675 12:51:40.759367  ChipsetInit Base Version = ff.ff.ff.ffff
  676 12:51:40.762620  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 12:51:40.766083  Display FSP Version Info HOB
  678 12:51:40.773164  Reference Code - SA - System Agent = 9.0.1e.30
  679 12:51:40.776148  Reference Code - MRC = 0.7.1.6c
  680 12:51:40.779097  SA - PCIe Version = 9.0.1e.30
  681 12:51:40.779586  SA-CRID Status = Disabled
  682 12:51:40.782752  SA-CRID Original Value = 0.0.0.c
  683 12:51:40.786673  SA-CRID New Value = 0.0.0.c
  684 12:51:40.789088  OPROM - VBIOS = ff.ff.ff.ffff
  685 12:51:40.792337  RTC Init
  686 12:51:40.795632  Set power on after power failure.
  687 12:51:40.796048  Disabling Deep S3
  688 12:51:40.798835  Disabling Deep S3
  689 12:51:40.799311  Disabling Deep S4
  690 12:51:40.802735  Disabling Deep S4
  691 12:51:40.805791  Disabling Deep S5
  692 12:51:40.806265  Disabling Deep S5
  693 12:51:40.812240  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
  694 12:51:40.815876  Enumerating buses...
  695 12:51:40.819492  Show all devs... Before device enumeration.
  696 12:51:40.822420  Root Device: enabled 1
  697 12:51:40.822897  CPU_CLUSTER: 0: enabled 1
  698 12:51:40.825555  DOMAIN: 0000: enabled 1
  699 12:51:40.828935  APIC: 00: enabled 1
  700 12:51:40.829557  PCI: 00:00.0: enabled 1
  701 12:51:40.832569  PCI: 00:02.0: enabled 1
  702 12:51:40.835649  PCI: 00:04.0: enabled 0
  703 12:51:40.838863  PCI: 00:05.0: enabled 0
  704 12:51:40.839432  PCI: 00:12.0: enabled 1
  705 12:51:40.841951  PCI: 00:12.5: enabled 0
  706 12:51:40.845523  PCI: 00:12.6: enabled 0
  707 12:51:40.848461  PCI: 00:14.0: enabled 1
  708 12:51:40.848989  PCI: 00:14.1: enabled 0
  709 12:51:40.852115  PCI: 00:14.3: enabled 1
  710 12:51:40.855711  PCI: 00:14.5: enabled 0
  711 12:51:40.859076  PCI: 00:15.0: enabled 1
  712 12:51:40.859661  PCI: 00:15.1: enabled 1
  713 12:51:40.861803  PCI: 00:15.2: enabled 0
  714 12:51:40.865169  PCI: 00:15.3: enabled 0
  715 12:51:40.865824  PCI: 00:16.0: enabled 1
  716 12:51:40.868866  PCI: 00:16.1: enabled 0
  717 12:51:40.872061  PCI: 00:16.2: enabled 0
  718 12:51:40.875309  PCI: 00:16.3: enabled 0
  719 12:51:40.875893  PCI: 00:16.4: enabled 0
  720 12:51:40.878908  PCI: 00:16.5: enabled 0
  721 12:51:40.881801  PCI: 00:17.0: enabled 1
  722 12:51:40.885192  PCI: 00:19.0: enabled 1
  723 12:51:40.885701  PCI: 00:19.1: enabled 0
  724 12:51:40.888414  PCI: 00:19.2: enabled 0
  725 12:51:40.891576  PCI: 00:1a.0: enabled 0
  726 12:51:40.895689  PCI: 00:1c.0: enabled 0
  727 12:51:40.896274  PCI: 00:1c.1: enabled 0
  728 12:51:40.898682  PCI: 00:1c.2: enabled 0
  729 12:51:40.901474  PCI: 00:1c.3: enabled 0
  730 12:51:40.901960  PCI: 00:1c.4: enabled 0
  731 12:51:40.905292  PCI: 00:1c.5: enabled 0
  732 12:51:40.908503  PCI: 00:1c.6: enabled 0
  733 12:51:40.911982  PCI: 00:1c.7: enabled 0
  734 12:51:40.912568  PCI: 00:1d.0: enabled 1
  735 12:51:40.914928  PCI: 00:1d.1: enabled 0
  736 12:51:40.918178  PCI: 00:1d.2: enabled 0
  737 12:51:40.921743  PCI: 00:1d.3: enabled 0
  738 12:51:40.922225  PCI: 00:1d.4: enabled 0
  739 12:51:40.924576  PCI: 00:1d.5: enabled 1
  740 12:51:40.927998  PCI: 00:1e.0: enabled 1
  741 12:51:40.931761  PCI: 00:1e.1: enabled 0
  742 12:51:40.932342  PCI: 00:1e.2: enabled 1
  743 12:51:40.935034  PCI: 00:1e.3: enabled 1
  744 12:51:40.937995  PCI: 00:1f.0: enabled 1
  745 12:51:40.941716  PCI: 00:1f.1: enabled 1
  746 12:51:40.942330  PCI: 00:1f.2: enabled 1
  747 12:51:40.944445  PCI: 00:1f.3: enabled 1
  748 12:51:40.948350  PCI: 00:1f.4: enabled 1
  749 12:51:40.951366  PCI: 00:1f.5: enabled 1
  750 12:51:40.951957  PCI: 00:1f.6: enabled 0
  751 12:51:40.954425  USB0 port 0: enabled 1
  752 12:51:40.957922  I2C: 00:15: enabled 1
  753 12:51:40.958403  I2C: 00:5d: enabled 1
  754 12:51:40.961071  GENERIC: 0.0: enabled 1
  755 12:51:40.964132  I2C: 00:1a: enabled 1
  756 12:51:40.964614  I2C: 00:38: enabled 1
  757 12:51:40.968217  I2C: 00:39: enabled 1
  758 12:51:40.971319  I2C: 00:3a: enabled 1
  759 12:51:40.971904  I2C: 00:3b: enabled 1
  760 12:51:40.974425  PCI: 00:00.0: enabled 1
  761 12:51:40.977884  SPI: 00: enabled 1
  762 12:51:40.978466  SPI: 01: enabled 1
  763 12:51:40.981293  PNP: 0c09.0: enabled 1
  764 12:51:40.984087  USB2 port 0: enabled 1
  765 12:51:40.987481  USB2 port 1: enabled 1
  766 12:51:40.988018  USB2 port 2: enabled 0
  767 12:51:40.990917  USB2 port 3: enabled 0
  768 12:51:40.994610  USB2 port 5: enabled 0
  769 12:51:40.995187  USB2 port 6: enabled 1
  770 12:51:40.997330  USB2 port 9: enabled 1
  771 12:51:41.000707  USB3 port 0: enabled 1
  772 12:51:41.001376  USB3 port 1: enabled 1
  773 12:51:41.004212  USB3 port 2: enabled 1
  774 12:51:41.007187  USB3 port 3: enabled 1
  775 12:51:41.010885  USB3 port 4: enabled 0
  776 12:51:41.011461  APIC: 02: enabled 1
  777 12:51:41.013574  APIC: 06: enabled 1
  778 12:51:41.014050  APIC: 01: enabled 1
  779 12:51:41.017188  APIC: 03: enabled 1
  780 12:51:41.020991  APIC: 07: enabled 1
  781 12:51:41.021578  APIC: 04: enabled 1
  782 12:51:41.023875  APIC: 05: enabled 1
  783 12:51:41.027285  Compare with tree...
  784 12:51:41.027862  Root Device: enabled 1
  785 12:51:41.030750   CPU_CLUSTER: 0: enabled 1
  786 12:51:41.033992    APIC: 00: enabled 1
  787 12:51:41.034572    APIC: 02: enabled 1
  788 12:51:41.037000    APIC: 06: enabled 1
  789 12:51:41.040850    APIC: 01: enabled 1
  790 12:51:41.041466    APIC: 03: enabled 1
  791 12:51:41.044293    APIC: 07: enabled 1
  792 12:51:41.046774    APIC: 04: enabled 1
  793 12:51:41.047273    APIC: 05: enabled 1
  794 12:51:41.050454   DOMAIN: 0000: enabled 1
  795 12:51:41.053620    PCI: 00:00.0: enabled 1
  796 12:51:41.057295    PCI: 00:02.0: enabled 1
  797 12:51:41.060150    PCI: 00:04.0: enabled 0
  798 12:51:41.060757    PCI: 00:05.0: enabled 0
  799 12:51:41.063683    PCI: 00:12.0: enabled 1
  800 12:51:41.067234    PCI: 00:12.5: enabled 0
  801 12:51:41.069878    PCI: 00:12.6: enabled 0
  802 12:51:41.073448    PCI: 00:14.0: enabled 1
  803 12:51:41.073921     USB0 port 0: enabled 1
  804 12:51:41.076710      USB2 port 0: enabled 1
  805 12:51:41.080062      USB2 port 1: enabled 1
  806 12:51:41.083023      USB2 port 2: enabled 0
  807 12:51:41.086562      USB2 port 3: enabled 0
  808 12:51:41.090269      USB2 port 5: enabled 0
  809 12:51:41.090796      USB2 port 6: enabled 1
  810 12:51:41.092974      USB2 port 9: enabled 1
  811 12:51:41.096549      USB3 port 0: enabled 1
  812 12:51:41.100063      USB3 port 1: enabled 1
  813 12:51:41.103183      USB3 port 2: enabled 1
  814 12:51:41.103660      USB3 port 3: enabled 1
  815 12:51:41.106881      USB3 port 4: enabled 0
  816 12:51:41.109654    PCI: 00:14.1: enabled 0
  817 12:51:41.113365    PCI: 00:14.3: enabled 1
  818 12:51:41.116881    PCI: 00:14.5: enabled 0
  819 12:51:41.117509    PCI: 00:15.0: enabled 1
  820 12:51:41.120016     I2C: 00:15: enabled 1
  821 12:51:41.123421    PCI: 00:15.1: enabled 1
  822 12:51:41.126033     I2C: 00:5d: enabled 1
  823 12:51:41.129697     GENERIC: 0.0: enabled 1
  824 12:51:41.130277    PCI: 00:15.2: enabled 0
  825 12:51:41.133151    PCI: 00:15.3: enabled 0
  826 12:51:41.136524    PCI: 00:16.0: enabled 1
  827 12:51:41.139533    PCI: 00:16.1: enabled 0
  828 12:51:41.143108    PCI: 00:16.2: enabled 0
  829 12:51:41.143692    PCI: 00:16.3: enabled 0
  830 12:51:41.146330    PCI: 00:16.4: enabled 0
  831 12:51:41.149260    PCI: 00:16.5: enabled 0
  832 12:51:41.152827    PCI: 00:17.0: enabled 1
  833 12:51:41.156033    PCI: 00:19.0: enabled 1
  834 12:51:41.156647     I2C: 00:1a: enabled 1
  835 12:51:41.159352     I2C: 00:38: enabled 1
  836 12:51:41.162535     I2C: 00:39: enabled 1
  837 12:51:41.166055     I2C: 00:3a: enabled 1
  838 12:51:41.166539     I2C: 00:3b: enabled 1
  839 12:51:41.169588    PCI: 00:19.1: enabled 0
  840 12:51:41.172762    PCI: 00:19.2: enabled 0
  841 12:51:41.176199    PCI: 00:1a.0: enabled 0
  842 12:51:41.179776    PCI: 00:1c.0: enabled 0
  843 12:51:41.180367    PCI: 00:1c.1: enabled 0
  844 12:51:41.183444    PCI: 00:1c.2: enabled 0
  845 12:51:41.185884    PCI: 00:1c.3: enabled 0
  846 12:51:41.189039    PCI: 00:1c.4: enabled 0
  847 12:51:41.192732    PCI: 00:1c.5: enabled 0
  848 12:51:41.193342    PCI: 00:1c.6: enabled 0
  849 12:51:41.196549    PCI: 00:1c.7: enabled 0
  850 12:51:41.199627    PCI: 00:1d.0: enabled 1
  851 12:51:41.202576    PCI: 00:1d.1: enabled 0
  852 12:51:41.206282    PCI: 00:1d.2: enabled 0
  853 12:51:41.206932    PCI: 00:1d.3: enabled 0
  854 12:51:41.209275    PCI: 00:1d.4: enabled 0
  855 12:51:41.213034    PCI: 00:1d.5: enabled 1
  856 12:51:41.216135     PCI: 00:00.0: enabled 1
  857 12:51:41.219219    PCI: 00:1e.0: enabled 1
  858 12:51:41.219796    PCI: 00:1e.1: enabled 0
  859 12:51:41.222323    PCI: 00:1e.2: enabled 1
  860 12:51:41.225416     SPI: 00: enabled 1
  861 12:51:41.228920    PCI: 00:1e.3: enabled 1
  862 12:51:41.229425     SPI: 01: enabled 1
  863 12:51:41.232377    PCI: 00:1f.0: enabled 1
  864 12:51:41.235348     PNP: 0c09.0: enabled 1
  865 12:51:41.239104    PCI: 00:1f.1: enabled 1
  866 12:51:41.239680    PCI: 00:1f.2: enabled 1
  867 12:51:41.243108    PCI: 00:1f.3: enabled 1
  868 12:51:41.245610    PCI: 00:1f.4: enabled 1
  869 12:51:41.248808    PCI: 00:1f.5: enabled 1
  870 12:51:41.252931    PCI: 00:1f.6: enabled 0
  871 12:51:41.253544  Root Device scanning...
  872 12:51:41.255846  scan_static_bus for Root Device
  873 12:51:41.258793  CPU_CLUSTER: 0 enabled
  874 12:51:41.261987  DOMAIN: 0000 enabled
  875 12:51:41.265463  DOMAIN: 0000 scanning...
  876 12:51:41.268533  PCI: pci_scan_bus for bus 00
  877 12:51:41.269166  PCI: 00:00.0 [8086/0000] ops
  878 12:51:41.272177  PCI: 00:00.0 [8086/9b61] enabled
  879 12:51:41.275691  PCI: 00:02.0 [8086/0000] bus ops
  880 12:51:41.278518  PCI: 00:02.0 [8086/9b41] enabled
  881 12:51:41.281622  PCI: 00:04.0 [8086/1903] disabled
  882 12:51:41.285237  PCI: 00:08.0 [8086/1911] enabled
  883 12:51:41.288557  PCI: 00:12.0 [8086/02f9] enabled
  884 12:51:41.292078  PCI: 00:14.0 [8086/0000] bus ops
  885 12:51:41.295219  PCI: 00:14.0 [8086/02ed] enabled
  886 12:51:41.298744  PCI: 00:14.2 [8086/02ef] enabled
  887 12:51:41.302140  PCI: 00:14.3 [8086/02f0] enabled
  888 12:51:41.305490  PCI: 00:15.0 [8086/0000] bus ops
  889 12:51:41.309124  PCI: 00:15.0 [8086/02e8] enabled
  890 12:51:41.314801  PCI: 00:15.1 [8086/0000] bus ops
  891 12:51:41.318251  PCI: 00:15.1 [8086/02e9] enabled
  892 12:51:41.318757  PCI: 00:16.0 [8086/0000] ops
  893 12:51:41.321598  PCI: 00:16.0 [8086/02e0] enabled
  894 12:51:41.325040  PCI: 00:17.0 [8086/0000] ops
  895 12:51:41.328696  PCI: 00:17.0 [8086/02d3] enabled
  896 12:51:41.331820  PCI: 00:19.0 [8086/0000] bus ops
  897 12:51:41.335660  PCI: 00:19.0 [8086/02c5] enabled
  898 12:51:41.338445  PCI: 00:1d.0 [8086/0000] bus ops
  899 12:51:41.341635  PCI: 00:1d.0 [8086/02b0] enabled
  900 12:51:41.348566  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 12:51:41.351468  PCI: 00:1e.0 [8086/0000] ops
  902 12:51:41.355233  PCI: 00:1e.0 [8086/02a8] enabled
  903 12:51:41.358294  PCI: 00:1e.2 [8086/0000] bus ops
  904 12:51:41.361396  PCI: 00:1e.2 [8086/02aa] enabled
  905 12:51:41.365055  PCI: 00:1e.3 [8086/0000] bus ops
  906 12:51:41.368693  PCI: 00:1e.3 [8086/02ab] enabled
  907 12:51:41.371432  PCI: 00:1f.0 [8086/0000] bus ops
  908 12:51:41.374450  PCI: 00:1f.0 [8086/0284] enabled
  909 12:51:41.381621  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 12:51:41.384239  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 12:51:41.387909  PCI: 00:1f.3 [8086/0000] bus ops
  912 12:51:41.390880  PCI: 00:1f.3 [8086/02c8] enabled
  913 12:51:41.394765  PCI: 00:1f.4 [8086/0000] bus ops
  914 12:51:41.397624  PCI: 00:1f.4 [8086/02a3] enabled
  915 12:51:41.401533  PCI: 00:1f.5 [8086/0000] bus ops
  916 12:51:41.404685  PCI: 00:1f.5 [8086/02a4] enabled
  917 12:51:41.407736  PCI: Leftover static devices:
  918 12:51:41.410664  PCI: 00:05.0
  919 12:51:41.411146  PCI: 00:12.5
  920 12:51:41.413997  PCI: 00:12.6
  921 12:51:41.414485  PCI: 00:14.1
  922 12:51:41.414863  PCI: 00:14.5
  923 12:51:41.417330  PCI: 00:15.2
  924 12:51:41.417813  PCI: 00:15.3
  925 12:51:41.421030  PCI: 00:16.1
  926 12:51:41.421540  PCI: 00:16.2
  927 12:51:41.421953  PCI: 00:16.3
  928 12:51:41.424113  PCI: 00:16.4
  929 12:51:41.424690  PCI: 00:16.5
  930 12:51:41.428075  PCI: 00:19.1
  931 12:51:41.428650  PCI: 00:19.2
  932 12:51:41.431348  PCI: 00:1a.0
  933 12:51:41.431930  PCI: 00:1c.0
  934 12:51:41.432316  PCI: 00:1c.1
  935 12:51:41.434124  PCI: 00:1c.2
  936 12:51:41.434606  PCI: 00:1c.3
  937 12:51:41.438370  PCI: 00:1c.4
  938 12:51:41.438851  PCI: 00:1c.5
  939 12:51:41.439233  PCI: 00:1c.6
  940 12:51:41.440700  PCI: 00:1c.7
  941 12:51:41.441267  PCI: 00:1d.1
  942 12:51:41.444086  PCI: 00:1d.2
  943 12:51:41.444665  PCI: 00:1d.3
  944 12:51:41.445085  PCI: 00:1d.4
  945 12:51:41.447603  PCI: 00:1d.5
  946 12:51:41.448121  PCI: 00:1e.1
  947 12:51:41.450418  PCI: 00:1f.1
  948 12:51:41.450901  PCI: 00:1f.2
  949 12:51:41.454329  PCI: 00:1f.6
  950 12:51:41.454909  PCI: Check your devicetree.cb.
  951 12:51:41.457256  PCI: 00:02.0 scanning...
  952 12:51:41.460694  scan_generic_bus for PCI: 00:02.0
  953 12:51:41.467516  scan_generic_bus for PCI: 00:02.0 done
  954 12:51:41.470555  scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
  955 12:51:41.474016  PCI: 00:14.0 scanning...
  956 12:51:41.477022  scan_static_bus for PCI: 00:14.0
  957 12:51:41.480302  USB0 port 0 enabled
  958 12:51:41.480879  USB0 port 0 scanning...
  959 12:51:41.483874  scan_static_bus for USB0 port 0
  960 12:51:41.487589  USB2 port 0 enabled
  961 12:51:41.490246  USB2 port 1 enabled
  962 12:51:41.490727  USB2 port 2 disabled
  963 12:51:41.494112  USB2 port 3 disabled
  964 12:51:41.497141  USB2 port 5 disabled
  965 12:51:41.497621  USB2 port 6 enabled
  966 12:51:41.500232  USB2 port 9 enabled
  967 12:51:41.500711  USB3 port 0 enabled
  968 12:51:41.504000  USB3 port 1 enabled
  969 12:51:41.507392  USB3 port 2 enabled
  970 12:51:41.507972  USB3 port 3 enabled
  971 12:51:41.510189  USB3 port 4 disabled
  972 12:51:41.513539  USB2 port 0 scanning...
  973 12:51:41.516795  scan_static_bus for USB2 port 0
  974 12:51:41.520491  scan_static_bus for USB2 port 0 done
  975 12:51:41.527289  scan_bus: scanning of bus USB2 port 0 took 9712 usecs
  976 12:51:41.527865  USB2 port 1 scanning...
  977 12:51:41.530171  scan_static_bus for USB2 port 1
  978 12:51:41.533715  scan_static_bus for USB2 port 1 done
  979 12:51:41.540559  scan_bus: scanning of bus USB2 port 1 took 9713 usecs
  980 12:51:41.543303  USB2 port 6 scanning...
  981 12:51:41.547027  scan_static_bus for USB2 port 6
  982 12:51:41.549830  scan_static_bus for USB2 port 6 done
  983 12:51:41.556324  scan_bus: scanning of bus USB2 port 6 took 9703 usecs
  984 12:51:41.556910  USB2 port 9 scanning...
  985 12:51:41.560064  scan_static_bus for USB2 port 9
  986 12:51:41.566773  scan_static_bus for USB2 port 9 done
  987 12:51:41.569759  scan_bus: scanning of bus USB2 port 9 took 9713 usecs
  988 12:51:41.572930  USB3 port 0 scanning...
  989 12:51:41.576781  scan_static_bus for USB3 port 0
  990 12:51:41.579782  scan_static_bus for USB3 port 0 done
  991 12:51:41.586107  scan_bus: scanning of bus USB3 port 0 took 9705 usecs
  992 12:51:41.586685  USB3 port 1 scanning...
  993 12:51:41.589638  scan_static_bus for USB3 port 1
  994 12:51:41.596644  scan_static_bus for USB3 port 1 done
  995 12:51:41.599470  scan_bus: scanning of bus USB3 port 1 took 9705 usecs
  996 12:51:41.603007  USB3 port 2 scanning...
  997 12:51:41.607032  scan_static_bus for USB3 port 2
  998 12:51:41.609735  scan_static_bus for USB3 port 2 done
  999 12:51:41.616452  scan_bus: scanning of bus USB3 port 2 took 9712 usecs
 1000 12:51:41.617087  USB3 port 3 scanning...
 1001 12:51:41.619951  scan_static_bus for USB3 port 3
 1002 12:51:41.626667  scan_static_bus for USB3 port 3 done
 1003 12:51:41.629729  scan_bus: scanning of bus USB3 port 3 took 9712 usecs
 1004 12:51:41.633440  scan_static_bus for USB0 port 0 done
 1005 12:51:41.639618  scan_bus: scanning of bus USB0 port 0 took 155445 usecs
 1006 12:51:41.643521  scan_static_bus for PCI: 00:14.0 done
 1007 12:51:41.649762  scan_bus: scanning of bus PCI: 00:14.0 took 173083 usecs
 1008 12:51:41.652526  PCI: 00:15.0 scanning...
 1009 12:51:41.656043  scan_generic_bus for PCI: 00:15.0
 1010 12:51:41.659719  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 12:51:41.662607  scan_generic_bus for PCI: 00:15.0 done
 1012 12:51:41.669313  scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
 1013 12:51:41.672439  PCI: 00:15.1 scanning...
 1014 12:51:41.675820  scan_generic_bus for PCI: 00:15.1
 1015 12:51:41.679154  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 12:51:41.682485  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 12:51:41.685518  scan_generic_bus for PCI: 00:15.1 done
 1018 12:51:41.692680  scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
 1019 12:51:41.695886  PCI: 00:19.0 scanning...
 1020 12:51:41.699438  scan_generic_bus for PCI: 00:19.0
 1021 12:51:41.702162  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 12:51:41.706013  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 12:51:41.712612  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 12:51:41.715846  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 12:51:41.718921  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 12:51:41.722300  scan_generic_bus for PCI: 00:19.0 done
 1027 12:51:41.729247  scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
 1028 12:51:41.732329  PCI: 00:1d.0 scanning...
 1029 12:51:41.735457  do_pci_scan_bridge for PCI: 00:1d.0
 1030 12:51:41.738636  PCI: pci_scan_bus for bus 01
 1031 12:51:41.742212  PCI: 01:00.0 [1c5c/1327] enabled
 1032 12:51:41.745839  Enabling Common Clock Configuration
 1033 12:51:41.748989  L1 Sub-State supported from root port 29
 1034 12:51:41.752386  L1 Sub-State Support = 0xf
 1035 12:51:41.755895  CommonModeRestoreTime = 0x28
 1036 12:51:41.759012  Power On Value = 0x16, Power On Scale = 0x0
 1037 12:51:41.762373  ASPM: Enabled L1
 1038 12:51:41.768866  scan_bus: scanning of bus PCI: 00:1d.0 took 32816 usecs
 1039 12:51:41.769494  PCI: 00:1e.2 scanning...
 1040 12:51:41.771937  scan_generic_bus for PCI: 00:1e.2
 1041 12:51:41.778766  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 12:51:41.781736  scan_generic_bus for PCI: 00:1e.2 done
 1043 12:51:41.785577  scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
 1044 12:51:41.788213  PCI: 00:1e.3 scanning...
 1045 12:51:41.791490  scan_generic_bus for PCI: 00:1e.3
 1046 12:51:41.795339  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 12:51:41.802094  scan_generic_bus for PCI: 00:1e.3 done
 1048 12:51:41.805461  scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
 1049 12:51:41.808212  PCI: 00:1f.0 scanning...
 1050 12:51:41.811859  scan_static_bus for PCI: 00:1f.0
 1051 12:51:41.815180  PNP: 0c09.0 enabled
 1052 12:51:41.818346  scan_static_bus for PCI: 00:1f.0 done
 1053 12:51:41.825499  scan_bus: scanning of bus PCI: 00:1f.0 took 12065 usecs
 1054 12:51:41.826085  PCI: 00:1f.3 scanning...
 1055 12:51:41.831507  scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
 1056 12:51:41.835460  PCI: 00:1f.4 scanning...
 1057 12:51:41.838403  scan_generic_bus for PCI: 00:1f.4
 1058 12:51:41.842186  scan_generic_bus for PCI: 00:1f.4 done
 1059 12:51:41.848454  scan_bus: scanning of bus PCI: 00:1f.4 took 10201 usecs
 1060 12:51:41.851909  PCI: 00:1f.5 scanning...
 1061 12:51:41.854872  scan_generic_bus for PCI: 00:1f.5
 1062 12:51:41.858504  scan_generic_bus for PCI: 00:1f.5 done
 1063 12:51:41.864658  scan_bus: scanning of bus PCI: 00:1f.5 took 10201 usecs
 1064 12:51:41.868019  scan_bus: scanning of bus DOMAIN: 0000 took 605373 usecs
 1065 12:51:41.871686  scan_static_bus for Root Device done
 1066 12:51:41.878106  scan_bus: scanning of bus Root Device took 625259 usecs
 1067 12:51:41.878673  done
 1068 12:51:41.881697  Chrome EC: UHEPI supported
 1069 12:51:41.888052  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 12:51:41.894668  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 12:51:41.901080  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 12:51:41.907790  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 12:51:41.911249  SPI flash protection: WPSW=0 SRP0=0
 1074 12:51:41.917667  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 12:51:41.921098  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 12:51:41.924344  found VGA at PCI: 00:02.0
 1077 12:51:41.928077  Setting up VGA for PCI: 00:02.0
 1078 12:51:41.931259  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 12:51:41.937682  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 12:51:41.941150  Allocating resources...
 1081 12:51:41.941744  Reading resources...
 1082 12:51:41.947735  Root Device read_resources bus 0 link: 0
 1083 12:51:41.950998  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 12:51:41.957466  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 12:51:41.961141  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 12:51:41.967710  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 12:51:41.970807  USB0 port 0 read_resources bus 0 link: 0
 1088 12:51:41.978377  USB0 port 0 read_resources bus 0 link: 0 done
 1089 12:51:41.982584  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 12:51:41.988986  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 12:51:41.992337  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 12:51:41.999290  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 12:51:42.002370  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 12:51:42.010032  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 12:51:42.016696  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 12:51:42.019669  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 12:51:42.026508  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 12:51:42.029835  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 12:51:42.036424  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 12:51:42.039945  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 12:51:42.046092  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 12:51:42.050139  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 12:51:42.056354  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 12:51:42.063003  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 12:51:42.065979  Root Device read_resources bus 0 link: 0 done
 1106 12:51:42.069599  Done reading resources.
 1107 12:51:42.076382  Show resources in subtree (Root Device)...After reading.
 1108 12:51:42.079607   Root Device child on link 0 CPU_CLUSTER: 0
 1109 12:51:42.082804    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 12:51:42.085923     APIC: 00
 1111 12:51:42.086494     APIC: 02
 1112 12:51:42.086888     APIC: 06
 1113 12:51:42.089451     APIC: 01
 1114 12:51:42.089932     APIC: 03
 1115 12:51:42.090312     APIC: 07
 1116 12:51:42.093033     APIC: 04
 1117 12:51:42.093512     APIC: 05
 1118 12:51:42.099285    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 12:51:42.105854    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 12:51:42.162493    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 12:51:42.163111     PCI: 00:00.0
 1122 12:51:42.163502     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 12:51:42.164288     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 12:51:42.164698     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 12:51:42.165098     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 12:51:42.212099     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 12:51:42.213152     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 12:51:42.213573     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 12:51:42.214300     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 12:51:42.214679     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 12:51:42.215382     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 12:51:42.262226     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 12:51:42.263253     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 12:51:42.263689     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 12:51:42.264442     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 12:51:42.265169     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 12:51:42.281074     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 12:51:42.281649     PCI: 00:02.0
 1139 12:51:42.282517     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 12:51:42.291612     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 12:51:42.297804     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 12:51:42.300787     PCI: 00:04.0
 1143 12:51:42.301235     PCI: 00:08.0
 1144 12:51:42.310842     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 12:51:42.314543     PCI: 00:12.0
 1146 12:51:42.324402     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 12:51:42.327958     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 12:51:42.337606     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 12:51:42.344426      USB0 port 0 child on link 0 USB2 port 0
 1150 12:51:42.345047       USB2 port 0
 1151 12:51:42.347387       USB2 port 1
 1152 12:51:42.348004       USB2 port 2
 1153 12:51:42.350997       USB2 port 3
 1154 12:51:42.351523       USB2 port 5
 1155 12:51:42.354198       USB2 port 6
 1156 12:51:42.354675       USB2 port 9
 1157 12:51:42.357424       USB3 port 0
 1158 12:51:42.358006       USB3 port 1
 1159 12:51:42.361103       USB3 port 2
 1160 12:51:42.361687       USB3 port 3
 1161 12:51:42.364525       USB3 port 4
 1162 12:51:42.365142     PCI: 00:14.2
 1163 12:51:42.374159     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 12:51:42.384286     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 12:51:42.387259     PCI: 00:14.3
 1166 12:51:42.397012     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 12:51:42.400430     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 12:51:42.410269     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 12:51:42.413877      I2C: 01:15
 1170 12:51:42.417071     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 12:51:42.427063     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 12:51:42.427656      I2C: 02:5d
 1173 12:51:42.430065      GENERIC: 0.0
 1174 12:51:42.430546     PCI: 00:16.0
 1175 12:51:42.440266     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 12:51:42.443549     PCI: 00:17.0
 1177 12:51:42.453187     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 12:51:42.459935     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 12:51:42.470304     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 12:51:42.476906     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 12:51:42.486776     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 12:51:42.496326     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 12:51:42.499892     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 12:51:42.510055     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 12:51:42.510651      I2C: 03:1a
 1186 12:51:42.513291      I2C: 03:38
 1187 12:51:42.513780      I2C: 03:39
 1188 12:51:42.516942      I2C: 03:3a
 1189 12:51:42.517562      I2C: 03:3b
 1190 12:51:42.523087     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 12:51:42.530090     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 12:51:42.539885     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 12:51:42.549446     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 12:51:42.550213      PCI: 01:00.0
 1195 12:51:42.559410      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 12:51:42.562856     PCI: 00:1e.0
 1197 12:51:42.572871     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 12:51:42.583020     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 12:51:42.589125     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 12:51:42.599208     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 12:51:42.599785      SPI: 00
 1202 12:51:42.602891     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 12:51:42.612790     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 12:51:42.613392      SPI: 01
 1205 12:51:42.619346     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 12:51:42.625861     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 12:51:42.636179     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 12:51:42.639898      PNP: 0c09.0
 1209 12:51:42.645908      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 12:51:42.649402     PCI: 00:1f.3
 1211 12:51:42.658818     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 12:51:42.668923     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 12:51:42.669538     PCI: 00:1f.4
 1214 12:51:42.679443     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 12:51:42.688628     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 12:51:42.689235     PCI: 00:1f.5
 1217 12:51:42.698369     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 12:51:42.705341  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 12:51:42.711935  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 12:51:42.718845  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 12:51:42.721822  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 12:51:42.725385  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 12:51:42.729058  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 12:51:42.732057  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 12:51:42.741900  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 12:51:42.748454  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 12:51:42.755007  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 12:51:42.762079  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 12:51:42.772398  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 12:51:42.775478  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 12:51:42.781296  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 12:51:42.785105  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 12:51:42.791415  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 12:51:42.794699  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 12:51:42.801542  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 12:51:42.804761  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 12:51:42.811415  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 12:51:42.814670  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 12:51:42.821204  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 12:51:42.824390  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 12:51:42.831601  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 12:51:42.834629  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 12:51:42.841242  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 12:51:42.844791  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 12:51:42.851248  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 12:51:42.854300  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 12:51:42.861113  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 12:51:42.864384  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 12:51:42.867677  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 12:51:42.873966  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 12:51:42.877598  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 12:51:42.884163  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 12:51:42.887486  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 12:51:42.893954  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 12:51:42.900687  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 12:51:42.907242  avoid_fixed_resources: DOMAIN: 0000
 1257 12:51:42.910431  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 12:51:42.917072  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 12:51:42.923959  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 12:51:42.933598  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 12:51:42.940819  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 12:51:42.946862  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 12:51:42.957109  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 12:51:42.963721  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 12:51:42.970191  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 12:51:42.980603  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 12:51:42.986808  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 12:51:42.993092  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 12:51:42.996346  Setting resources...
 1270 12:51:43.003332  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 12:51:43.006416  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 12:51:43.009958  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 12:51:43.013575  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 12:51:43.016571  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 12:51:43.023261  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 12:51:43.029748  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 12:51:43.036230  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 12:51:43.043630  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 12:51:43.049892  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 12:51:43.053050  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 12:51:43.059632  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 12:51:43.062757  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 12:51:43.069775  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 12:51:43.072735  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 12:51:43.079489  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 12:51:43.082671  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 12:51:43.089513  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 12:51:43.092616  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 12:51:43.099011  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 12:51:43.103462  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 12:51:43.109054  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 12:51:43.112665  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 12:51:43.119592  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 12:51:43.122464  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 12:51:43.125692  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 12:51:43.133030  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 12:51:43.135586  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 12:51:43.142662  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 12:51:43.146187  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 12:51:43.152312  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 12:51:43.155330  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 12:51:43.165476  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 12:51:43.172380  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 12:51:43.178657  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 12:51:43.185840  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 12:51:43.191685  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 12:51:43.198752  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 12:51:43.202603  Root Device assign_resources, bus 0 link: 0
 1309 12:51:43.208934  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 12:51:43.215158  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 12:51:43.225721  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 12:51:43.232150  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 12:51:43.241867  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 12:51:43.249014  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 12:51:43.258234  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 12:51:43.261755  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 12:51:43.265262  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 12:51:43.274942  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 12:51:43.281849  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 12:51:43.291482  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 12:51:43.298316  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 12:51:43.304939  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 12:51:43.308245  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 12:51:43.317698  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 12:51:43.321061  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 12:51:43.324917  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 12:51:43.335190  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 12:51:43.341580  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 12:51:43.351786  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 12:51:43.357540  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 12:51:43.364601  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 12:51:43.374542  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 12:51:43.380728  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 12:51:43.390623  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 12:51:43.393933  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 12:51:43.397076  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 12:51:43.407170  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 12:51:43.417042  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 12:51:43.423830  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 12:51:43.430243  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 12:51:43.436925  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 12:51:43.443218  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 12:51:43.450002  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 12:51:43.459536  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 12:51:43.462792  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 12:51:43.466220  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 12:51:43.476227  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 12:51:43.479828  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 12:51:43.486686  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 12:51:43.489761  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 12:51:43.496477  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 12:51:43.499854  LPC: Trying to open IO window from 800 size 1ff
 1353 12:51:43.509799  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 12:51:43.516319  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 12:51:43.526476  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 12:51:43.532696  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 12:51:43.536383  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 12:51:43.543420  Root Device assign_resources, bus 0 link: 0
 1359 12:51:43.546279  Done setting resources.
 1360 12:51:43.552704  Show resources in subtree (Root Device)...After assigning values.
 1361 12:51:43.556665   Root Device child on link 0 CPU_CLUSTER: 0
 1362 12:51:43.559370    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 12:51:43.559847     APIC: 00
 1364 12:51:43.563182     APIC: 02
 1365 12:51:43.563787     APIC: 06
 1366 12:51:43.566720     APIC: 01
 1367 12:51:43.567189     APIC: 03
 1368 12:51:43.567555     APIC: 07
 1369 12:51:43.569588     APIC: 04
 1370 12:51:43.570061     APIC: 05
 1371 12:51:43.576132    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 12:51:43.583022    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 12:51:43.595728    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 12:51:43.596310     PCI: 00:00.0
 1375 12:51:43.605634     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 12:51:43.615850     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 12:51:43.626064     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 12:51:43.635928     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 12:51:43.645376     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 12:51:43.652278     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 12:51:43.662209     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 12:51:43.671840     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 12:51:43.681946     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 12:51:43.691570     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 12:51:43.697955     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 12:51:43.707963     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 12:51:43.718008     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 12:51:43.727580     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 12:51:43.737941     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 12:51:43.748098     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 12:51:43.748680     PCI: 00:02.0
 1392 12:51:43.757749     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 12:51:43.770857     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 12:51:43.777720     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 12:51:43.780440     PCI: 00:04.0
 1396 12:51:43.780923     PCI: 00:08.0
 1397 12:51:43.793922     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 12:51:43.794551     PCI: 00:12.0
 1399 12:51:43.804513     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 12:51:43.810763     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 12:51:43.820865     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 12:51:43.823740      USB0 port 0 child on link 0 USB2 port 0
 1403 12:51:43.826755       USB2 port 0
 1404 12:51:43.827293       USB2 port 1
 1405 12:51:43.830453       USB2 port 2
 1406 12:51:43.830932       USB2 port 3
 1407 12:51:43.833624       USB2 port 5
 1408 12:51:43.834101       USB2 port 6
 1409 12:51:43.836812       USB2 port 9
 1410 12:51:43.837317       USB3 port 0
 1411 12:51:43.839901       USB3 port 1
 1412 12:51:43.840385       USB3 port 2
 1413 12:51:43.843449       USB3 port 3
 1414 12:51:43.844047       USB3 port 4
 1415 12:51:43.846844     PCI: 00:14.2
 1416 12:51:43.857003     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 12:51:43.866674     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 12:51:43.870035     PCI: 00:14.3
 1419 12:51:43.880246     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 12:51:43.883062     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 12:51:43.892899     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 12:51:43.896335      I2C: 01:15
 1423 12:51:43.899541     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 12:51:43.909413     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 12:51:43.912534      I2C: 02:5d
 1426 12:51:43.913057      GENERIC: 0.0
 1427 12:51:43.915923     PCI: 00:16.0
 1428 12:51:43.926301     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 12:51:43.926871     PCI: 00:17.0
 1430 12:51:43.935963     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 12:51:43.946096     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 12:51:43.956519     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 12:51:43.967135     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 12:51:43.975806     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 12:51:43.986206     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 12:51:43.989667     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 12:51:43.998592     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 12:51:44.002082      I2C: 03:1a
 1439 12:51:44.002560      I2C: 03:38
 1440 12:51:44.005512      I2C: 03:39
 1441 12:51:44.005989      I2C: 03:3a
 1442 12:51:44.006555      I2C: 03:3b
 1443 12:51:44.012194     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 12:51:44.022308     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 12:51:44.032094     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 12:51:44.041569     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 12:51:44.042149      PCI: 01:00.0
 1448 12:51:44.055053      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 12:51:44.055636     PCI: 00:1e.0
 1450 12:51:44.065079     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 12:51:44.078444     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 12:51:44.081562     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 12:51:44.091473     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 12:51:44.092081      SPI: 00
 1455 12:51:44.094933     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 12:51:44.107744     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 12:51:44.108334      SPI: 01
 1458 12:51:44.111021     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 12:51:44.121390     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 12:51:44.131129     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 12:51:44.131619      PNP: 0c09.0
 1462 12:51:44.141089      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 12:51:44.141673     PCI: 00:1f.3
 1464 12:51:44.151065     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 12:51:44.164143     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 12:51:44.164750     PCI: 00:1f.4
 1467 12:51:44.174086     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 12:51:44.184055     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 12:51:44.184651     PCI: 00:1f.5
 1470 12:51:44.197047     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 12:51:44.197654  Done allocating resources.
 1472 12:51:44.203738  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 12:51:44.207144  Enabling resources...
 1474 12:51:44.210107  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 12:51:44.213461  PCI: 00:00.0 cmd <- 06
 1476 12:51:44.216464  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 12:51:44.220733  PCI: 00:02.0 cmd <- 03
 1478 12:51:44.223605  PCI: 00:08.0 cmd <- 06
 1479 12:51:44.226380  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 12:51:44.229856  PCI: 00:12.0 cmd <- 02
 1481 12:51:44.232896  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 12:51:44.233355  PCI: 00:14.0 cmd <- 02
 1483 12:51:44.236464  PCI: 00:14.2 cmd <- 02
 1484 12:51:44.239667  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 12:51:44.243154  PCI: 00:14.3 cmd <- 02
 1486 12:51:44.246545  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 12:51:44.249943  PCI: 00:15.0 cmd <- 02
 1488 12:51:44.253576  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 12:51:44.256588  PCI: 00:15.1 cmd <- 02
 1490 12:51:44.259756  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 12:51:44.263574  PCI: 00:16.0 cmd <- 02
 1492 12:51:44.266665  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 12:51:44.269854  PCI: 00:17.0 cmd <- 03
 1494 12:51:44.273404  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 12:51:44.275927  PCI: 00:19.0 cmd <- 02
 1496 12:51:44.279785  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 12:51:44.282960  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 12:51:44.285855  PCI: 00:1d.0 cmd <- 06
 1499 12:51:44.289316  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 12:51:44.289905  PCI: 00:1e.0 cmd <- 06
 1501 12:51:44.296041  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 12:51:44.296638  PCI: 00:1e.2 cmd <- 06
 1503 12:51:44.299100  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 12:51:44.302311  PCI: 00:1e.3 cmd <- 02
 1505 12:51:44.305786  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 12:51:44.309322  PCI: 00:1f.0 cmd <- 407
 1507 12:51:44.312331  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 12:51:44.315519  PCI: 00:1f.3 cmd <- 02
 1509 12:51:44.319340  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 12:51:44.322285  PCI: 00:1f.4 cmd <- 03
 1511 12:51:44.325710  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 12:51:44.328809  PCI: 00:1f.5 cmd <- 406
 1513 12:51:44.337626  PCI: 01:00.0 cmd <- 02
 1514 12:51:44.342675  done.
 1515 12:51:44.353252  ME: Version: 14.0.39.1367
 1516 12:51:44.360104  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
 1517 12:51:44.363801  Initializing devices...
 1518 12:51:44.364389  Root Device init ...
 1519 12:51:44.369930  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 12:51:44.373162  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 12:51:44.380008  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 12:51:44.386256  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 12:51:44.393158  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 12:51:44.396394  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 12:51:44.399994  Root Device init finished in 35164 usecs
 1526 12:51:44.403350  CPU_CLUSTER: 0 init ...
 1527 12:51:44.409622  CPU_CLUSTER: 0 init finished in 2447 usecs
 1528 12:51:44.413977  PCI: 00:00.0 init ...
 1529 12:51:44.417809  CPU TDP: 15 Watts
 1530 12:51:44.420714  CPU PL2 = 64 Watts
 1531 12:51:44.423801  PCI: 00:00.0 init finished in 7082 usecs
 1532 12:51:44.427295  PCI: 00:02.0 init ...
 1533 12:51:44.430626  PCI: 00:02.0 init finished in 2252 usecs
 1534 12:51:44.434357  PCI: 00:08.0 init ...
 1535 12:51:44.437478  PCI: 00:08.0 init finished in 2251 usecs
 1536 12:51:44.440369  PCI: 00:12.0 init ...
 1537 12:51:44.443914  PCI: 00:12.0 init finished in 2244 usecs
 1538 12:51:44.446708  PCI: 00:14.0 init ...
 1539 12:51:44.450328  PCI: 00:14.0 init finished in 2253 usecs
 1540 12:51:44.453589  PCI: 00:14.2 init ...
 1541 12:51:44.456927  PCI: 00:14.2 init finished in 2252 usecs
 1542 12:51:44.460666  PCI: 00:14.3 init ...
 1543 12:51:44.463462  PCI: 00:14.3 init finished in 2270 usecs
 1544 12:51:44.466826  PCI: 00:15.0 init ...
 1545 12:51:44.469914  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 12:51:44.473451  PCI: 00:15.0 init finished in 5979 usecs
 1547 12:51:44.477051  PCI: 00:15.1 init ...
 1548 12:51:44.480533  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 12:51:44.486874  PCI: 00:15.1 init finished in 5969 usecs
 1550 12:51:44.487455  PCI: 00:16.0 init ...
 1551 12:51:44.493085  PCI: 00:16.0 init finished in 2252 usecs
 1552 12:51:44.496848  PCI: 00:19.0 init ...
 1553 12:51:44.499596  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 12:51:44.503424  PCI: 00:19.0 init finished in 5978 usecs
 1555 12:51:44.506794  PCI: 00:1d.0 init ...
 1556 12:51:44.509727  Initializing PCH PCIe bridge.
 1557 12:51:44.513128  PCI: 00:1d.0 init finished in 5285 usecs
 1558 12:51:44.516564  PCI: 00:1f.0 init ...
 1559 12:51:44.520765  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 12:51:44.526772  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 12:51:44.527348  IOAPIC: ID = 0x02
 1562 12:51:44.530075  IOAPIC: Dumping registers
 1563 12:51:44.533551    reg 0x0000: 0x02000000
 1564 12:51:44.536756    reg 0x0001: 0x00770020
 1565 12:51:44.537366    reg 0x0002: 0x00000000
 1566 12:51:44.542841  PCI: 00:1f.0 init finished in 23545 usecs
 1567 12:51:44.546511  PCI: 00:1f.4 init ...
 1568 12:51:44.549311  PCI: 00:1f.4 init finished in 2261 usecs
 1569 12:51:44.560280  PCI: 01:00.0 init ...
 1570 12:51:44.563125  PCI: 01:00.0 init finished in 2244 usecs
 1571 12:51:44.568022  PNP: 0c09.0 init ...
 1572 12:51:44.571385  Google Chrome EC uptime: 11.091 seconds
 1573 12:51:44.577658  Google Chrome AP resets since EC boot: 0
 1574 12:51:44.581570  Google Chrome most recent AP reset causes:
 1575 12:51:44.588101  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 12:51:44.591238  PNP: 0c09.0 init finished in 20639 usecs
 1577 12:51:44.594394  Devices initialized
 1578 12:51:44.597033  Show all devs... After init.
 1579 12:51:44.597626  Root Device: enabled 1
 1580 12:51:44.600505  CPU_CLUSTER: 0: enabled 1
 1581 12:51:44.603868  DOMAIN: 0000: enabled 1
 1582 12:51:44.604371  APIC: 00: enabled 1
 1583 12:51:44.607149  PCI: 00:00.0: enabled 1
 1584 12:51:44.610990  PCI: 00:02.0: enabled 1
 1585 12:51:44.614027  PCI: 00:04.0: enabled 0
 1586 12:51:44.614511  PCI: 00:05.0: enabled 0
 1587 12:51:44.616925  PCI: 00:12.0: enabled 1
 1588 12:51:44.620696  PCI: 00:12.5: enabled 0
 1589 12:51:44.624007  PCI: 00:12.6: enabled 0
 1590 12:51:44.624579  PCI: 00:14.0: enabled 1
 1591 12:51:44.627414  PCI: 00:14.1: enabled 0
 1592 12:51:44.630234  PCI: 00:14.3: enabled 1
 1593 12:51:44.633649  PCI: 00:14.5: enabled 0
 1594 12:51:44.634224  PCI: 00:15.0: enabled 1
 1595 12:51:44.637329  PCI: 00:15.1: enabled 1
 1596 12:51:44.640331  PCI: 00:15.2: enabled 0
 1597 12:51:44.640911  PCI: 00:15.3: enabled 0
 1598 12:51:44.643651  PCI: 00:16.0: enabled 1
 1599 12:51:44.646536  PCI: 00:16.1: enabled 0
 1600 12:51:44.650045  PCI: 00:16.2: enabled 0
 1601 12:51:44.650622  PCI: 00:16.3: enabled 0
 1602 12:51:44.653492  PCI: 00:16.4: enabled 0
 1603 12:51:44.657129  PCI: 00:16.5: enabled 0
 1604 12:51:44.660285  PCI: 00:17.0: enabled 1
 1605 12:51:44.660858  PCI: 00:19.0: enabled 1
 1606 12:51:44.663730  PCI: 00:19.1: enabled 0
 1607 12:51:44.666975  PCI: 00:19.2: enabled 0
 1608 12:51:44.669988  PCI: 00:1a.0: enabled 0
 1609 12:51:44.670559  PCI: 00:1c.0: enabled 0
 1610 12:51:44.673997  PCI: 00:1c.1: enabled 0
 1611 12:51:44.676610  PCI: 00:1c.2: enabled 0
 1612 12:51:44.677209  PCI: 00:1c.3: enabled 0
 1613 12:51:44.679770  PCI: 00:1c.4: enabled 0
 1614 12:51:44.683372  PCI: 00:1c.5: enabled 0
 1615 12:51:44.686832  PCI: 00:1c.6: enabled 0
 1616 12:51:44.687411  PCI: 00:1c.7: enabled 0
 1617 12:51:44.690176  PCI: 00:1d.0: enabled 1
 1618 12:51:44.693307  PCI: 00:1d.1: enabled 0
 1619 12:51:44.696232  PCI: 00:1d.2: enabled 0
 1620 12:51:44.696706  PCI: 00:1d.3: enabled 0
 1621 12:51:44.699660  PCI: 00:1d.4: enabled 0
 1622 12:51:44.703268  PCI: 00:1d.5: enabled 0
 1623 12:51:44.706272  PCI: 00:1e.0: enabled 1
 1624 12:51:44.706744  PCI: 00:1e.1: enabled 0
 1625 12:51:44.709890  PCI: 00:1e.2: enabled 1
 1626 12:51:44.713061  PCI: 00:1e.3: enabled 1
 1627 12:51:44.715991  PCI: 00:1f.0: enabled 1
 1628 12:51:44.716506  PCI: 00:1f.1: enabled 0
 1629 12:51:44.719216  PCI: 00:1f.2: enabled 0
 1630 12:51:44.722890  PCI: 00:1f.3: enabled 1
 1631 12:51:44.723434  PCI: 00:1f.4: enabled 1
 1632 12:51:44.726313  PCI: 00:1f.5: enabled 1
 1633 12:51:44.729242  PCI: 00:1f.6: enabled 0
 1634 12:51:44.732763  USB0 port 0: enabled 1
 1635 12:51:44.733285  I2C: 01:15: enabled 1
 1636 12:51:44.736060  I2C: 02:5d: enabled 1
 1637 12:51:44.739217  GENERIC: 0.0: enabled 1
 1638 12:51:44.739789  I2C: 03:1a: enabled 1
 1639 12:51:44.743116  I2C: 03:38: enabled 1
 1640 12:51:44.746022  I2C: 03:39: enabled 1
 1641 12:51:44.749399  I2C: 03:3a: enabled 1
 1642 12:51:44.750015  I2C: 03:3b: enabled 1
 1643 12:51:44.752299  PCI: 00:00.0: enabled 1
 1644 12:51:44.755606  SPI: 00: enabled 1
 1645 12:51:44.756269  SPI: 01: enabled 1
 1646 12:51:44.759362  PNP: 0c09.0: enabled 1
 1647 12:51:44.762177  USB2 port 0: enabled 1
 1648 12:51:44.762674  USB2 port 1: enabled 1
 1649 12:51:44.765169  USB2 port 2: enabled 0
 1650 12:51:44.768545  USB2 port 3: enabled 0
 1651 12:51:44.769049  USB2 port 5: enabled 0
 1652 12:51:44.771938  USB2 port 6: enabled 1
 1653 12:51:44.775554  USB2 port 9: enabled 1
 1654 12:51:44.778969  USB3 port 0: enabled 1
 1655 12:51:44.779541  USB3 port 1: enabled 1
 1656 12:51:44.781791  USB3 port 2: enabled 1
 1657 12:51:44.785093  USB3 port 3: enabled 1
 1658 12:51:44.785573  USB3 port 4: enabled 0
 1659 12:51:44.788866  APIC: 02: enabled 1
 1660 12:51:44.792100  APIC: 06: enabled 1
 1661 12:51:44.792679  APIC: 01: enabled 1
 1662 12:51:44.795504  APIC: 03: enabled 1
 1663 12:51:44.796072  APIC: 07: enabled 1
 1664 12:51:44.798336  APIC: 04: enabled 1
 1665 12:51:44.801773  APIC: 05: enabled 1
 1666 12:51:44.802320  PCI: 00:08.0: enabled 1
 1667 12:51:44.804939  PCI: 00:14.2: enabled 1
 1668 12:51:44.808150  PCI: 01:00.0: enabled 1
 1669 12:51:44.811920  Disabling ACPI via APMC:
 1670 12:51:44.815486  done.
 1671 12:51:44.818413  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 12:51:44.821832  ELOG: NV offset 0xaf0000 size 0x4000
 1673 12:51:44.828994  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 12:51:44.835646  ELOG: Event(17) added with size 13 at 2022-07-14 12:51:12 UTC
 1675 12:51:44.842576  ELOG: Event(92) added with size 9 at 2022-07-14 12:51:12 UTC
 1676 12:51:44.849822  ELOG: Event(93) added with size 9 at 2022-07-14 12:51:12 UTC
 1677 12:51:44.855955  ELOG: Event(9A) added with size 9 at 2022-07-14 12:51:12 UTC
 1678 12:51:44.862198  ELOG: Event(9E) added with size 10 at 2022-07-14 12:51:12 UTC
 1679 12:51:44.869301  ELOG: Event(9F) added with size 14 at 2022-07-14 12:51:12 UTC
 1680 12:51:44.872199  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1681 12:51:44.880252  ELOG: Event(A1) added with size 10 at 2022-07-14 12:51:12 UTC
 1682 12:51:44.889476  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 12:51:44.896580  ELOG: Event(A0) added with size 9 at 2022-07-14 12:51:12 UTC
 1684 12:51:44.899370  elog_add_boot_reason: Logged dev mode boot
 1685 12:51:44.899848  Finalize devices...
 1686 12:51:44.902740  PCI: 00:17.0 final
 1687 12:51:44.906332  Devices finalized
 1688 12:51:44.909778  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 12:51:44.916232  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 12:51:44.919662  ME: HFSTS1                  : 0x90000245
 1691 12:51:44.922854  ME: HFSTS2                  : 0x3B850126
 1692 12:51:44.929793  ME: HFSTS3                  : 0x00000020
 1693 12:51:44.932766  ME: HFSTS4                  : 0x00004800
 1694 12:51:44.936082  ME: HFSTS5                  : 0x00000000
 1695 12:51:44.939684  ME: HFSTS6                  : 0x40400006
 1696 12:51:44.942794  ME: Manufacturing Mode      : NO
 1697 12:51:44.945901  ME: FW Partition Table      : OK
 1698 12:51:44.949457  ME: Bringup Loader Failure  : NO
 1699 12:51:44.952482  ME: Firmware Init Complete  : YES
 1700 12:51:44.955693  ME: Boot Options Present    : NO
 1701 12:51:44.959034  ME: Update In Progress      : NO
 1702 12:51:44.962411  ME: D0i3 Support            : YES
 1703 12:51:44.965912  ME: Low Power State Enabled : NO
 1704 12:51:44.969300  ME: CPU Replaced            : NO
 1705 12:51:44.972383  ME: CPU Replacement Valid   : YES
 1706 12:51:44.975680  ME: Current Working State   : 5
 1707 12:51:44.979559  ME: Current Operation State : 1
 1708 12:51:44.982382  ME: Current Operation Mode  : 0
 1709 12:51:44.985927  ME: Error Code              : 0
 1710 12:51:44.988697  ME: CPU Debug Disabled      : YES
 1711 12:51:44.992066  ME: TXT Support             : NO
 1712 12:51:44.998989  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 12:51:45.005145  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 12:51:45.005631  CBFS @ c08000 size 3f8000
 1715 12:51:45.012598  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 12:51:45.015667  CBFS: Locating 'fallback/dsdt.aml'
 1717 12:51:45.018977  CBFS: Found @ offset 10bb80 size 3fa5
 1718 12:51:45.025615  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 12:51:45.028912  CBFS @ c08000 size 3f8000
 1720 12:51:45.031800  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 12:51:45.035659  CBFS: Locating 'fallback/slic'
 1722 12:51:45.040535  CBFS: 'fallback/slic' not found.
 1723 12:51:45.047566  ACPI: Writing ACPI tables at 99b3e000.
 1724 12:51:45.048149  ACPI:    * FACS
 1725 12:51:45.050453  ACPI:    * DSDT
 1726 12:51:45.053616  Ramoops buffer: 0x100000@0x99a3d000.
 1727 12:51:45.056625  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 12:51:45.063249  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 12:51:45.066827  Google Chrome EC: version:
 1730 12:51:45.069991  	ro: helios_v2.0.2659-56403530b
 1731 12:51:45.073506  	rw: helios_v2.0.2849-c41de27e7d
 1732 12:51:45.073982    running image: 1
 1733 12:51:45.077710  ACPI:    * FADT
 1734 12:51:45.078184  SCI is IRQ9
 1735 12:51:45.084434  ACPI: added table 1/32, length now 40
 1736 12:51:45.085065  ACPI:     * SSDT
 1737 12:51:45.087709  Found 1 CPU(s) with 8 core(s) each.
 1738 12:51:45.090693  Error: Could not locate 'wifi_sar' in VPD.
 1739 12:51:45.097729  Checking CBFS for default SAR values
 1740 12:51:45.100850  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 12:51:45.104132  CBFS @ c08000 size 3f8000
 1742 12:51:45.110593  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 12:51:45.113842  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 12:51:45.117430  CBFS: Found @ offset 5fac0 size 77
 1745 12:51:45.121154  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 12:51:45.127836  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 12:51:45.130732  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 12:51:45.137256  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 12:51:45.140683  failed to find key in VPD: dsm_calib_r0_0
 1750 12:51:45.150520  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 12:51:45.153666  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 12:51:45.157337  failed to find key in VPD: dsm_calib_r0_1
 1753 12:51:45.166783  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 12:51:45.173474  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 12:51:45.176983  failed to find key in VPD: dsm_calib_r0_2
 1756 12:51:45.186737  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 12:51:45.190231  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 12:51:45.197134  failed to find key in VPD: dsm_calib_r0_3
 1759 12:51:45.202941  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 12:51:45.209560  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 12:51:45.213082  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 12:51:45.220299  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 12:51:45.223440  EC returned error result code 1
 1764 12:51:45.226641  EC returned error result code 1
 1765 12:51:45.230535  EC returned error result code 1
 1766 12:51:45.234012  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 12:51:45.240126  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 12:51:45.246954  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 12:51:45.250136  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 12:51:45.257061  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 12:51:45.260438  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 12:51:45.266353  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 12:51:45.273066  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 12:51:45.280054  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 12:51:45.283061  ACPI: added table 2/32, length now 44
 1776 12:51:45.283647  ACPI:    * MCFG
 1777 12:51:45.289899  ACPI: added table 3/32, length now 48
 1778 12:51:45.290482  ACPI:    * TPM2
 1779 12:51:45.293269  TPM2 log created at 99a2d000
 1780 12:51:45.296240  ACPI: added table 4/32, length now 52
 1781 12:51:45.299635  ACPI:    * MADT
 1782 12:51:45.300213  SCI is IRQ9
 1783 12:51:45.302471  ACPI: added table 5/32, length now 56
 1784 12:51:45.306102  current = 99b43ac0
 1785 12:51:45.306578  ACPI:    * DMAR
 1786 12:51:45.309638  ACPI: added table 6/32, length now 60
 1787 12:51:45.312736  ACPI:    * IGD OpRegion
 1788 12:51:45.316342  GMA: Found VBT in CBFS
 1789 12:51:45.319239  GMA: Found valid VBT in CBFS
 1790 12:51:45.322738  ACPI: added table 7/32, length now 64
 1791 12:51:45.323217  ACPI:    * HPET
 1792 12:51:45.325743  ACPI: added table 8/32, length now 68
 1793 12:51:45.329106  ACPI: done.
 1794 12:51:45.332749  ACPI tables: 31744 bytes.
 1795 12:51:45.336017  smbios_write_tables: 99a2c000
 1796 12:51:45.339290  EC returned error result code 3
 1797 12:51:45.342662  Couldn't obtain OEM name from CBI
 1798 12:51:45.345738  Create SMBIOS type 17
 1799 12:51:45.348863  PCI: 00:00.0 (Intel Cannonlake)
 1800 12:51:45.349370  PCI: 00:14.3 (Intel WiFi)
 1801 12:51:45.353049  SMBIOS tables: 939 bytes.
 1802 12:51:45.356176  Writing table forward entry at 0x00000500
 1803 12:51:45.362398  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 12:51:45.365766  Writing coreboot table at 0x99b62000
 1805 12:51:45.372586   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 12:51:45.375808   1. 0000000000001000-000000000009ffff: RAM
 1807 12:51:45.382363   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 12:51:45.385974   3. 0000000000100000-0000000099a2bfff: RAM
 1809 12:51:45.392358   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 12:51:45.395819   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 12:51:45.402394   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 12:51:45.408780   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 12:51:45.412470   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 12:51:45.415473   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 12:51:45.421726  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 12:51:45.425761  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 12:51:45.431911  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 12:51:45.435184  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 12:51:45.441457  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 12:51:45.445204  15. 0000000100000000-000000045e7fffff: RAM
 1821 12:51:45.448625  Graphics framebuffer located at 0xc0000000
 1822 12:51:45.452439  Passing 5 GPIOs to payload:
 1823 12:51:45.458924              NAME |       PORT | POLARITY |     VALUE
 1824 12:51:45.461848     write protect |  undefined |     high |       low
 1825 12:51:45.468093               lid |  undefined |     high |      high
 1826 12:51:45.474665             power |  undefined |     high |       low
 1827 12:51:45.478073             oprom |  undefined |     high |       low
 1828 12:51:45.485208          EC in RW | 0x000000cb |     high |       low
 1829 12:51:45.485806  Board ID: 4
 1830 12:51:45.492114  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 12:51:45.492696  CBFS @ c08000 size 3f8000
 1832 12:51:45.497795  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 12:51:45.504911  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b60
 1834 12:51:45.507696  coreboot table: 1492 bytes.
 1835 12:51:45.511037  IMD ROOT    0. 99fff000 00001000
 1836 12:51:45.515071  IMD SMALL   1. 99ffe000 00001000
 1837 12:51:45.517595  FSP MEMORY  2. 99c4e000 003b0000
 1838 12:51:45.521223  CONSOLE     3. 99c2e000 00020000
 1839 12:51:45.524567  FMAP        4. 99c2d000 0000054e
 1840 12:51:45.527872  TIME STAMP  5. 99c2c000 00000910
 1841 12:51:45.531230  VBOOT WORK  6. 99c18000 00014000
 1842 12:51:45.534180  MRC DATA    7. 99c16000 00001958
 1843 12:51:45.537614  ROMSTG STCK 8. 99c15000 00001000
 1844 12:51:45.541256  AFTER CAR   9. 99c0b000 0000a000
 1845 12:51:45.544414  RAMSTAGE   10. 99baf000 0005c000
 1846 12:51:45.548130  REFCODE    11. 99b7a000 00035000
 1847 12:51:45.551229  SMM BACKUP 12. 99b6a000 00010000
 1848 12:51:45.554545  COREBOOT   13. 99b62000 00008000
 1849 12:51:45.557933  ACPI       14. 99b3e000 00024000
 1850 12:51:45.560980  ACPI GNVS  15. 99b3d000 00001000
 1851 12:51:45.564351  RAMOOPS    16. 99a3d000 00100000
 1852 12:51:45.567489  TPM2 TCGLOG17. 99a2d000 00010000
 1853 12:51:45.570969  SMBIOS     18. 99a2c000 00000800
 1854 12:51:45.573932  IMD small region:
 1855 12:51:45.577073    IMD ROOT    0. 99ffec00 00000400
 1856 12:51:45.580760    FSP RUNTIME 1. 99ffebe0 00000004
 1857 12:51:45.583723    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 12:51:45.588036    POWER STATE 3. 99ffeb80 00000040
 1859 12:51:45.590664    ROMSTAGE    4. 99ffeb60 00000004
 1860 12:51:45.594077    MEM INFO    5. 99ffe9a0 000001b9
 1861 12:51:45.596920    VPD         6. 99ffe960 00000036
 1862 12:51:45.600844  MTRR: Physical address space:
 1863 12:51:45.607033  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 12:51:45.613602  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 12:51:45.620123  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 12:51:45.624135  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 12:51:45.630141  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 12:51:45.636869  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 12:51:45.643031  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 12:51:45.647034  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 12:51:45.653393  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 12:51:45.657371  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 12:51:45.660595  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 12:51:45.663446  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 12:51:45.669655  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 12:51:45.673051  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 12:51:45.676436  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 12:51:45.680200  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 12:51:45.686455  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 12:51:45.689507  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 12:51:45.693105  call enable_fixed_mtrr()
 1882 12:51:45.696361  CPU physical address size: 39 bits
 1883 12:51:45.699983  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 12:51:45.702512  MTRR: WB selected as default type.
 1885 12:51:45.709389  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 12:51:45.715838  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 12:51:45.722199  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 12:51:45.729495  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 12:51:45.735762  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 12:51:45.742336  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 12:51:45.745508  MTRR: Fixed MSR 0x250 0x0606060606060606
 1892 12:51:45.748608  MTRR: Fixed MSR 0x258 0x0606060606060606
 1893 12:51:45.755794  MTRR: Fixed MSR 0x259 0x0000000000000000
 1894 12:51:45.758484  MTRR: Fixed MSR 0x268 0x0606060606060606
 1895 12:51:45.761683  MTRR: Fixed MSR 0x269 0x0606060606060606
 1896 12:51:45.765340  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1897 12:51:45.771806  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1898 12:51:45.775064  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1899 12:51:45.778420  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1900 12:51:45.782336  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1901 12:51:45.788572  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1902 12:51:45.789189  
 1903 12:51:45.789590  MTRR check
 1904 12:51:45.791852  Fixed MTRRs   : Enabled
 1905 12:51:45.795467  Variable MTRRs: Enabled
 1906 12:51:45.796042  
 1907 12:51:45.796429  call enable_fixed_mtrr()
 1908 12:51:45.801307  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1909 12:51:45.805117  CPU physical address size: 39 bits
 1910 12:51:45.811803  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1911 12:51:45.814801  MTRR: Fixed MSR 0x250 0x0606060606060606
 1912 12:51:45.818289  MTRR: Fixed MSR 0x250 0x0606060606060606
 1913 12:51:45.821355  MTRR: Fixed MSR 0x258 0x0606060606060606
 1914 12:51:45.827912  MTRR: Fixed MSR 0x259 0x0000000000000000
 1915 12:51:45.831676  MTRR: Fixed MSR 0x268 0x0606060606060606
 1916 12:51:45.834469  MTRR: Fixed MSR 0x269 0x0606060606060606
 1917 12:51:45.837989  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1918 12:51:45.844918  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1919 12:51:45.848256  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1920 12:51:45.851688  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1921 12:51:45.854741  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1922 12:51:45.858464  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1923 12:51:45.864602  MTRR: Fixed MSR 0x258 0x0606060606060606
 1924 12:51:45.867836  call enable_fixed_mtrr()
 1925 12:51:45.871515  MTRR: Fixed MSR 0x259 0x0000000000000000
 1926 12:51:45.874274  MTRR: Fixed MSR 0x268 0x0606060606060606
 1927 12:51:45.877456  MTRR: Fixed MSR 0x269 0x0606060606060606
 1928 12:51:45.884513  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1929 12:51:45.887791  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1930 12:51:45.890991  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1931 12:51:45.894471  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1932 12:51:45.897433  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1933 12:51:45.904452  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1934 12:51:45.907376  CPU physical address size: 39 bits
 1935 12:51:45.910362  call enable_fixed_mtrr()
 1936 12:51:45.914601  MTRR: Fixed MSR 0x250 0x0606060606060606
 1937 12:51:45.917296  MTRR: Fixed MSR 0x250 0x0606060606060606
 1938 12:51:45.920527  MTRR: Fixed MSR 0x258 0x0606060606060606
 1939 12:51:45.927364  MTRR: Fixed MSR 0x259 0x0000000000000000
 1940 12:51:45.930954  MTRR: Fixed MSR 0x268 0x0606060606060606
 1941 12:51:45.933860  MTRR: Fixed MSR 0x269 0x0606060606060606
 1942 12:51:45.937221  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1943 12:51:45.943751  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1944 12:51:45.946765  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1945 12:51:45.950421  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1946 12:51:45.953896  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1947 12:51:45.959988  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1948 12:51:45.963847  MTRR: Fixed MSR 0x258 0x0606060606060606
 1949 12:51:45.966797  call enable_fixed_mtrr()
 1950 12:51:45.969767  MTRR: Fixed MSR 0x259 0x0000000000000000
 1951 12:51:45.973551  MTRR: Fixed MSR 0x268 0x0606060606060606
 1952 12:51:45.977578  MTRR: Fixed MSR 0x269 0x0606060606060606
 1953 12:51:45.983114  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1954 12:51:45.986926  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1955 12:51:45.989817  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1956 12:51:45.993388  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1957 12:51:46.000037  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1958 12:51:46.003392  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1959 12:51:46.007101  CPU physical address size: 39 bits
 1960 12:51:46.010268  call enable_fixed_mtrr()
 1961 12:51:46.013073  CBFS @ c08000 size 3f8000
 1962 12:51:46.016436  CPU physical address size: 39 bits
 1963 12:51:46.019382  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1964 12:51:46.026630  MTRR: Fixed MSR 0x250 0x0606060606060606
 1965 12:51:46.029738  MTRR: Fixed MSR 0x258 0x0606060606060606
 1966 12:51:46.032866  MTRR: Fixed MSR 0x259 0x0000000000000000
 1967 12:51:46.035807  MTRR: Fixed MSR 0x268 0x0606060606060606
 1968 12:51:46.042825  MTRR: Fixed MSR 0x269 0x0606060606060606
 1969 12:51:46.046678  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1970 12:51:46.049395  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1971 12:51:46.053204  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1972 12:51:46.059686  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1973 12:51:46.062575  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1974 12:51:46.065999  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1975 12:51:46.068915  MTRR: Fixed MSR 0x250 0x0606060606060606
 1976 12:51:46.072703  call enable_fixed_mtrr()
 1977 12:51:46.075880  MTRR: Fixed MSR 0x258 0x0606060606060606
 1978 12:51:46.082052  MTRR: Fixed MSR 0x259 0x0000000000000000
 1979 12:51:46.085840  MTRR: Fixed MSR 0x268 0x0606060606060606
 1980 12:51:46.089062  MTRR: Fixed MSR 0x269 0x0606060606060606
 1981 12:51:46.092502  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1982 12:51:46.098641  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1983 12:51:46.102381  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1984 12:51:46.105068  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1985 12:51:46.108605  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1986 12:51:46.115496  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1987 12:51:46.118637  CPU physical address size: 39 bits
 1988 12:51:46.122057  call enable_fixed_mtrr()
 1989 12:51:46.125647  CPU physical address size: 39 bits
 1990 12:51:46.128784  CPU physical address size: 39 bits
 1991 12:51:46.132334  CBFS: Locating 'fallback/payload'
 1992 12:51:46.135292  CBFS: Found @ offset 1c96c0 size 3f798
 1993 12:51:46.141575  Checking segment from ROM address 0xffdd16f8
 1994 12:51:46.145343  Checking segment from ROM address 0xffdd1714
 1995 12:51:46.148754  Loading segment from ROM address 0xffdd16f8
 1996 12:51:46.151691    code (compression=0)
 1997 12:51:46.162273    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 12:51:46.168697  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 12:51:46.171778  it's not compressed!
 2000 12:51:46.262944  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 12:51:46.270102  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 12:51:46.273421  Loading segment from ROM address 0xffdd1714
 2003 12:51:46.276267    Entry Point 0x30000000
 2004 12:51:46.279544  Loaded segments
 2005 12:51:46.285573  Finalizing chipset.
 2006 12:51:46.288670  Finalizing SMM.
 2007 12:51:46.292122  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
 2008 12:51:46.295192  mp_park_aps done after 0 msecs.
 2009 12:51:46.301699  Jumping to boot code at 30000000(99b62000)
 2010 12:51:46.308201  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 12:51:46.308704  
 2012 12:51:46.311745  Starting depthcharge on Helios...
 2013 12:51:46.312934  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2014 12:51:46.313556  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2015 12:51:46.314020  Setting prompt string to ['hatch:']
 2016 12:51:46.314512  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2017 12:51:46.321324  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 12:51:46.328328  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 12:51:46.334725  board_setup: Info: eMMC controller not present; skipping
 2020 12:51:46.338076  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 12:51:46.344617  board_setup: Info: SDHCI controller not present; skipping
 2022 12:51:46.350704  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 12:51:46.351279  Wipe memory regions:
 2024 12:51:46.354335  	[0x00000000001000, 0x000000000a0000)
 2025 12:51:46.360729  	[0x00000000100000, 0x00000030000000)
 2026 12:51:46.427556  	[0x00000030657430, 0x00000099a2c000)
 2027 12:51:46.568999  	[0x00000100000000, 0x0000045e800000)
 2028 12:51:47.951460  R8152: Initializing
 2029 12:51:47.954457  Version 9 (ocp_data = 6010)
 2030 12:51:47.958888  R8152: Done initializing
 2031 12:51:47.961806  Adding net device
 2032 12:51:48.458890  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 12:51:48.459455  
 2034 12:51:48.460248  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
 2036 12:51:48.562004  hatch: tftpboot 192.168.201.1 6819482/tftp-deploy-d9ijljyq/kernel/bzImage 6819482/tftp-deploy-d9ijljyq/kernel/cmdline 6819482/tftp-deploy-d9ijljyq/ramdisk/ramdisk.cpio.gz
 2037 12:51:48.562650  Setting prompt string to ['Starting kernel']
 2038 12:51:48.563150  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
 2039 12:51:48.563603  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
 2040 12:51:48.567676  tftpboot 192.168.201.1 6819482/tftp-deploy-d9ijljyq/kernel/bzImoy-d9ijljyq/kernel/cmdline 6819482/tftp-deploy-d9ijljyq/ramdisk/ramdisk.cpio.gz
 2041 12:51:48.568262  Waiting for link
 2042 12:51:48.769086  done.
 2043 12:51:48.769740  MAC: f4:f5:e8:50:dc:f7
 2044 12:51:48.771469  Sending DHCP discover... done.
 2045 12:51:48.775399  Waiting for reply... done.
 2046 12:51:48.778060  Sending DHCP request... done.
 2047 12:51:48.781668  Waiting for reply... done.
 2048 12:51:48.784826  My ip is 192.168.201.10
 2049 12:51:48.788678  The DHCP server ip is 192.168.201.1
 2050 12:51:48.792190  TFTP server IP predefined by user: 192.168.201.1
 2051 12:51:48.798325  Bootfile predefined by user: 6819482/tftp-deploy-d9ijljyq/kernel/bzImage
 2052 12:51:48.801538  Sending tftp read request... done.
 2053 12:51:48.804542  Waiting for the transfer... 
 2054 12:51:49.069084  00000000 ################################################################
 2055 12:51:49.305863  00080000 ################################################################
 2056 12:51:49.533644  00100000 ################################################################
 2057 12:51:49.796016  00180000 ################################################################
 2058 12:51:50.064587  00200000 ################################################################
 2059 12:51:50.335885  00280000 ################################################################
 2060 12:51:50.604692  00300000 ################################################################
 2061 12:51:50.876048  00380000 ################################################################
 2062 12:51:51.126016  00400000 ################################################################
 2063 12:51:51.421269  00480000 ################################################################
 2064 12:51:51.716525  00500000 ################################################################
 2065 12:51:51.982141  00580000 ################################################################
 2066 12:51:52.244236  00600000 ################################################################ done.
 2067 12:51:52.247821  The bootfile was 6811536 bytes long.
 2068 12:51:52.250553  Sending tftp read request... done.
 2069 12:51:52.254053  Waiting for the transfer... 
 2070 12:51:52.626855  00000000 ################################################################
 2071 12:51:53.006504  00080000 ################################################################
 2072 12:51:53.391043  00100000 ################################################################
 2073 12:51:53.769746  00180000 ################################################################
 2074 12:51:54.148893  00200000 ################################################################
 2075 12:51:54.504383  00280000 ################################################################
 2076 12:51:54.844982  00300000 ################################################################
 2077 12:51:55.086609  00380000 ################################################################
 2078 12:51:55.338046  00400000 ################################################################
 2079 12:51:55.624859  00480000 ################################################################
 2080 12:51:55.752091  00500000 ############################# done.
 2081 12:51:55.755674  Sending tftp read request... done.
 2082 12:51:55.758752  Waiting for the transfer... 
 2083 12:51:55.758843  00000000 # done.
 2084 12:51:55.768910  Command line loaded dynamically from TFTP file: 6819482/tftp-deploy-d9ijljyq/kernel/cmdline
 2085 12:51:55.795217  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819482/extract-nfsrootfs-41cwzfn3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2086 12:51:55.801853  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2087 12:51:55.805219  Shutting down all USB controllers.
 2088 12:51:55.808362  Removing current net device
 2089 12:51:55.812289  Finalizing coreboot
 2090 12:51:55.818997  Exiting depthcharge with code 4 at timestamp: 16781671
 2091 12:51:55.819481  
 2092 12:51:55.819862  Starting kernel ...
 2093 12:51:55.820212  
 2094 12:51:55.820549  
 2095 12:51:55.821409  end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
 2096 12:51:55.821942  start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
 2097 12:51:55.822358  Setting prompt string to ['Linux version [0-9]']
 2098 12:51:55.822741  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
 2099 12:51:55.823132  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
 2101 12:56:27.822443  end: 2.2.5 auto-login-action (duration 00:04:32) [common]
 2103 12:56:27.823034  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
 2105 12:56:27.823484  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2108 12:56:27.824258  end: 2 depthcharge-action (duration 00:05:00) [common]
 2110 12:56:27.824827  Cleaning after the job
 2111 12:56:27.825099  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/ramdisk
 2112 12:56:27.826314  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/kernel
 2113 12:56:27.827640  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/nfsrootfs
 2114 12:56:27.890493  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819482/tftp-deploy-d9ijljyq/modules
 2115 12:56:27.890787  start: 4.1 power-off (timeout 00:00:30) [common]
 2116 12:56:27.890954  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2117 12:56:27.910516  >> Command sent successfully.

 2118 12:56:27.912542  Returned 0 in 0 seconds
 2119 12:56:28.013102  end: 4.1 power-off (duration 00:00:00) [common]
 2121 12:56:28.013514  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2122 12:56:28.013826  Listened to connection for namespace 'common' for up to 1s
 2123 12:56:29.017042  Finalising connection for namespace 'common'
 2124 12:56:29.017208  Disconnecting from shell: Finalise
 2125 12:56:29.117968  end: 4.2 read-feedback (duration 00:00:01) [common]
 2126 12:56:29.118131  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819482
 2127 12:56:29.289675  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819482
 2128 12:56:29.289871  JobError: Your job cannot terminate cleanly.