Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:44:56.812589 lava-dispatcher, installed at version: 2022.04
2 12:44:56.812782 start: 0 validate
3 12:44:56.812925 Start time: 2022-07-14 12:44:56.812917+00:00 (UTC)
4 12:44:56.813079 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:56.813214 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:56.815524 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:56.815658 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:56.816634 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:56.816749 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:56.817674 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:56.817795 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:56.820111 validate duration: 0.01
14 12:44:56.820366 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:56.820485 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:56.820582 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:56.820685 Not decompressing ramdisk as can be used compressed.
18 12:44:56.820771 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220708.0/amd64/initrd.cpio.gz
19 12:44:56.820838 saving as /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/ramdisk/initrd.cpio.gz
20 12:44:56.820902 total size: 5411032 (5MB)
21 12:44:56.821945 progress 0% (0MB)
22 12:44:56.823428 progress 5% (0MB)
23 12:44:56.824788 progress 10% (0MB)
24 12:44:56.826202 progress 15% (0MB)
25 12:44:56.827696 progress 20% (1MB)
26 12:44:56.829027 progress 25% (1MB)
27 12:44:56.830357 progress 30% (1MB)
28 12:44:56.831679 progress 35% (1MB)
29 12:44:56.833158 progress 40% (2MB)
30 12:44:56.834480 progress 45% (2MB)
31 12:44:56.835802 progress 50% (2MB)
32 12:44:56.837127 progress 55% (2MB)
33 12:44:56.838601 progress 60% (3MB)
34 12:44:56.839919 progress 65% (3MB)
35 12:44:56.841248 progress 70% (3MB)
36 12:44:56.842570 progress 75% (3MB)
37 12:44:56.844064 progress 80% (4MB)
38 12:44:56.845402 progress 85% (4MB)
39 12:44:56.846755 progress 90% (4MB)
40 12:44:56.848081 progress 95% (4MB)
41 12:44:56.849608 progress 100% (5MB)
42 12:44:56.849789 5MB downloaded in 0.03s (178.67MB/s)
43 12:44:56.849947 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:56.850203 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:56.850297 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:56.850388 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:56.850499 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:44:56.850572 saving as /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/kernel/bzImage
50 12:44:56.850636 total size: 6811536 (6MB)
51 12:44:56.850699 No compression specified
52 12:44:56.851800 progress 0% (0MB)
53 12:44:56.853602 progress 5% (0MB)
54 12:44:56.855305 progress 10% (0MB)
55 12:44:56.857161 progress 15% (1MB)
56 12:44:56.858825 progress 20% (1MB)
57 12:44:56.860489 progress 25% (1MB)
58 12:44:56.862322 progress 30% (1MB)
59 12:44:56.863980 progress 35% (2MB)
60 12:44:56.865783 progress 40% (2MB)
61 12:44:56.867421 progress 45% (2MB)
62 12:44:56.869063 progress 50% (3MB)
63 12:44:56.870853 progress 55% (3MB)
64 12:44:56.872485 progress 60% (3MB)
65 12:44:56.874283 progress 65% (4MB)
66 12:44:56.875912 progress 70% (4MB)
67 12:44:56.877553 progress 75% (4MB)
68 12:44:56.879340 progress 80% (5MB)
69 12:44:56.880981 progress 85% (5MB)
70 12:44:56.882766 progress 90% (5MB)
71 12:44:56.884403 progress 95% (6MB)
72 12:44:56.886067 progress 100% (6MB)
73 12:44:56.886343 6MB downloaded in 0.04s (181.95MB/s)
74 12:44:56.886498 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:44:56.886744 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:44:56.886837 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:44:56.886927 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:44:56.887036 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220708.0/amd64/full.rootfs.tar.xz
80 12:44:56.887105 saving as /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/nfsrootfs/full.rootfs.tar
81 12:44:56.887169 total size: 207060584 (197MB)
82 12:44:56.887233 Using unxz to decompress xz
83 12:44:56.890590 progress 0% (0MB)
84 12:44:57.463795 progress 5% (9MB)
85 12:44:58.007981 progress 10% (19MB)
86 12:44:58.614969 progress 15% (29MB)
87 12:44:58.983366 progress 20% (39MB)
88 12:44:59.364242 progress 25% (49MB)
89 12:44:59.984359 progress 30% (59MB)
90 12:45:00.561746 progress 35% (69MB)
91 12:45:01.182059 progress 40% (79MB)
92 12:45:01.764422 progress 45% (88MB)
93 12:45:02.361113 progress 50% (98MB)
94 12:45:03.009014 progress 55% (108MB)
95 12:45:03.713177 progress 60% (118MB)
96 12:45:03.867619 progress 65% (128MB)
97 12:45:04.028072 progress 70% (138MB)
98 12:45:04.134942 progress 75% (148MB)
99 12:45:04.211389 progress 80% (158MB)
100 12:45:04.280909 progress 85% (167MB)
101 12:45:04.391029 progress 90% (177MB)
102 12:45:04.678387 progress 95% (187MB)
103 12:45:05.326868 progress 100% (197MB)
104 12:45:05.333788 197MB downloaded in 8.45s (23.38MB/s)
105 12:45:05.334071 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:45:05.334347 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:45:05.334446 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:45:05.334538 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:45:05.334653 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:45:05.334728 saving as /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/modules/modules.tar
112 12:45:05.334793 total size: 51960 (0MB)
113 12:45:05.334861 Using unxz to decompress xz
114 12:45:05.338048 progress 63% (0MB)
115 12:45:05.338441 progress 100% (0MB)
116 12:45:05.341738 0MB downloaded in 0.01s (7.14MB/s)
117 12:45:05.341972 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:45:05.342248 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:45:05.342350 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 12:45:05.342451 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 12:45:07.436398 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819454/extract-nfsrootfs-dguvbfgy
123 12:45:07.436606 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:45:07.436714 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 12:45:07.436862 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm
126 12:45:07.437239 makedir: /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin
127 12:45:07.437340 makedir: /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/tests
128 12:45:07.437428 makedir: /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/results
129 12:45:07.437529 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-add-keys
130 12:45:07.437679 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-add-sources
131 12:45:07.437801 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-background-process-start
132 12:45:07.437929 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-background-process-stop
133 12:45:07.438044 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-common-functions
134 12:45:07.438168 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-echo-ipv4
135 12:45:07.438282 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-install-packages
136 12:45:07.438407 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-installed-packages
137 12:45:07.438519 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-os-build
138 12:45:07.438640 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-probe-channel
139 12:45:07.438753 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-probe-ip
140 12:45:07.438872 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-target-ip
141 12:45:07.438985 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-target-mac
142 12:45:07.439101 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-target-storage
143 12:45:07.439221 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-case
144 12:45:07.439335 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-event
145 12:45:07.439459 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-feedback
146 12:45:07.439570 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-raise
147 12:45:07.439694 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-reference
148 12:45:07.439812 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-runner
149 12:45:07.439939 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-set
150 12:45:07.440052 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-test-shell
151 12:45:07.440176 Updating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-add-keys (debian)
152 12:45:07.440293 Updating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-add-sources (debian)
153 12:45:07.440415 Updating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-install-packages (debian)
154 12:45:07.440534 Updating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-installed-packages (debian)
155 12:45:07.440648 Updating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/bin/lava-os-build (debian)
156 12:45:07.440759 Creating /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/environment
157 12:45:07.440850 LAVA metadata
158 12:45:07.440921 - LAVA_JOB_ID=6819454
159 12:45:07.441010 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:45:07.441117 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
161 12:45:07.441186 skipped lava-vland-overlay
162 12:45:07.441269 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:45:07.441362 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
164 12:45:07.441428 skipped lava-multinode-overlay
165 12:45:07.441504 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:45:07.441597 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 12:45:07.441673 Loading test definitions
168 12:45:07.441766 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 12:45:07.441852 Using /lava-6819454 at stage 0
170 12:45:07.442099 uuid=6819454_1.5.2.3.1 testdef=None
171 12:45:07.442192 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:45:07.442281 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 12:45:07.442737 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:45:07.442989 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 12:45:07.443513 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:45:07.443779 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 12:45:07.444269 runner path: /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/0/tests/0_timesync-off test_uuid 6819454_1.5.2.3.1
180 12:45:07.444429 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:45:07.444682 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 12:45:07.444761 Using /lava-6819454 at stage 0
184 12:45:07.444873 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:45:07.444967 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/0/tests/1_kselftest-futex'
186 12:45:14.180159 Running '/usr/bin/git checkout kernelci.org
187 12:45:14.316770 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
188 12:45:14.317670 uuid=6819454_1.5.2.3.5 testdef=None
189 12:45:14.317877 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
191 12:45:14.318257 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
192 12:45:14.319312 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:45:14.319677 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
195 12:45:14.321039 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:45:14.321412 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
198 12:45:14.322801 runner path: /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/0/tests/1_kselftest-futex test_uuid 6819454_1.5.2.3.5
199 12:45:14.322927 BOARD='asus-C436FA-Flip-hatch'
200 12:45:14.323024 BRANCH='cip'
201 12:45:14.323117 SKIPFILE='skipfile-lkft.yaml'
202 12:45:14.323207 TESTPROG_URL='None'
203 12:45:14.323297 TST_CASENAME=''
204 12:45:14.323392 TST_CMDFILES='futex'
205 12:45:14.323579 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 12:45:14.323919 Creating lava-test-runner.conf files
208 12:45:14.324021 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819454/lava-overlay-cv2s19xm/lava-6819454/0 for stage 0
209 12:45:14.324142 - 0_timesync-off
210 12:45:14.324244 - 1_kselftest-futex
211 12:45:14.324379 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
212 12:45:14.324509 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
213 12:45:21.670685 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 12:45:21.670846 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
215 12:45:21.670946 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:45:21.671059 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
217 12:45:21.671153 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
218 12:45:21.777201 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:45:21.777546 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
220 12:45:21.777659 extracting modules file /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819454/extract-nfsrootfs-dguvbfgy
221 12:45:21.781795 extracting modules file /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819454/extract-overlay-ramdisk-1dcrexnh/ramdisk
222 12:45:21.785764 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:45:21.785887 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
224 12:45:21.785979 [common] Applying overlay to NFS
225 12:45:21.786054 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819454/compress-overlay-06d3_xsl/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819454/extract-nfsrootfs-dguvbfgy
226 12:45:22.243484 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:45:22.243663 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
228 12:45:22.243762 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:45:22.243852 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
230 12:45:22.243940 Building ramdisk /var/lib/lava/dispatcher/tmp/6819454/extract-overlay-ramdisk-1dcrexnh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819454/extract-overlay-ramdisk-1dcrexnh/ramdisk
231 12:45:22.277593 >> 24434 blocks
232 12:45:22.776633 rename /var/lib/lava/dispatcher/tmp/6819454/extract-overlay-ramdisk-1dcrexnh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/ramdisk/ramdisk.cpio.gz
233 12:45:22.777086 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:45:22.777225 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
235 12:45:22.777354 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
236 12:45:22.777470 No mkimage arch provided, not using FIT.
237 12:45:22.777574 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:45:22.777671 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:45:22.777799 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
240 12:45:22.777917 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
241 12:45:22.778020 No LXC device requested
242 12:45:22.778117 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:45:22.778228 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
244 12:45:22.778319 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:45:22.778396 Checking files for TFTP limit of 4294967296 bytes.
246 12:45:22.778821 end: 1 tftp-deploy (duration 00:00:26) [common]
247 12:45:22.778936 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:45:22.779047 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:45:22.779195 substitutions:
250 12:45:22.779285 - {DTB}: None
251 12:45:22.779353 - {INITRD}: 6819454/tftp-deploy-t3q46dv7/ramdisk/ramdisk.cpio.gz
252 12:45:22.779423 - {KERNEL}: 6819454/tftp-deploy-t3q46dv7/kernel/bzImage
253 12:45:22.779507 - {LAVA_MAC}: None
254 12:45:22.779570 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819454/extract-nfsrootfs-dguvbfgy
255 12:45:22.779631 - {NFS_SERVER_IP}: 192.168.201.1
256 12:45:22.779700 - {PRESEED_CONFIG}: None
257 12:45:22.779765 - {PRESEED_LOCAL}: None
258 12:45:22.779825 - {RAMDISK}: 6819454/tftp-deploy-t3q46dv7/ramdisk/ramdisk.cpio.gz
259 12:45:22.779883 - {ROOT_PART}: None
260 12:45:22.779967 - {ROOT}: None
261 12:45:22.780030 - {SERVER_IP}: 192.168.201.1
262 12:45:22.780087 - {TEE}: None
263 12:45:22.780155 Parsed boot commands:
264 12:45:22.780228 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:45:22.780391 Parsed boot commands: tftpboot 192.168.201.1 6819454/tftp-deploy-t3q46dv7/kernel/bzImage 6819454/tftp-deploy-t3q46dv7/kernel/cmdline 6819454/tftp-deploy-t3q46dv7/ramdisk/ramdisk.cpio.gz
266 12:45:22.780508 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:45:22.780601 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:45:22.780710 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:45:22.780810 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:45:22.780888 Not connected, no need to disconnect.
271 12:45:22.780985 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:45:22.781078 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:45:22.781167 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
274 12:45:22.784180 Setting prompt string to ['lava-test: # ']
275 12:45:22.784550 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:45:22.784668 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:45:22.784779 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:45:22.784899 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:45:22.785165 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
280 12:45:22.805814 >> Command sent successfully.
281 12:45:22.807818 Returned 0 in 0 seconds
282 12:45:22.908580 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 12:45:22.908902 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 12:45:22.909012 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 12:45:22.909102 Setting prompt string to 'Starting depthcharge on Helios...'
287 12:45:22.909171 Changing prompt to 'Starting depthcharge on Helios...'
288 12:45:22.909241 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 12:45:22.909554 [Enter `^Ec?' for help]
290 12:45:29.395467
291 12:45:29.395622
292 12:45:29.404991 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 12:45:29.408263 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 12:45:29.415058 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 12:45:29.418365 CPU: AES supported, TXT NOT supported, VT supported
296 12:45:29.424928 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 12:45:29.428215 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 12:45:29.434823 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 12:45:29.438743 VBOOT: Loading verstage.
300 12:45:29.441969 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
301 12:45:29.448434 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 12:45:29.455120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 12:45:29.455207 CBFS @ c08000 size 3f8000
304 12:45:29.461556 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 12:45:29.464750 CBFS: Locating 'fallback/verstage'
306 12:45:29.468134 CBFS: Found @ offset 10fb80 size 1072c
307 12:45:29.471935
308 12:45:29.472012
309 12:45:29.482403 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 12:45:29.496390 Probing TPM: . done!
311 12:45:29.499539 TPM ready after 0 ms
312 12:45:29.502903 Connected to device vid:did:rid of 1ae0:0028:00
313 12:45:29.513476 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
314 12:45:29.516629 Initialized TPM device CR50 revision 0
315 12:45:29.552032 tlcl_send_startup: Startup return code is 0
316 12:45:29.552131 TPM: setup succeeded
317 12:45:29.565086 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 12:45:29.568876 Chrome EC: UHEPI supported
319 12:45:29.572100 Phase 1
320 12:45:29.575228 FMAP: area GBB found @ c05000 (12288 bytes)
321 12:45:29.581804 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 12:45:29.581886 Phase 2
323 12:45:29.585281 Phase 3
324 12:45:29.588483 FMAP: area GBB found @ c05000 (12288 bytes)
325 12:45:29.595122 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 12:45:29.601688 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 12:45:29.605050 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 12:45:29.611761 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 12:45:29.627429 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 12:45:29.630709 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 12:45:29.637485 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 12:45:29.641579 Phase 4
333 12:45:29.644727 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 12:45:29.651283 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 12:45:29.831267 VB2:vb2_rsa_verify_digest() Digest check failed!
336 12:45:29.837476 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 12:45:29.837578 Saving nvdata
338 12:45:29.840798 Reboot requested (10020007)
339 12:45:29.844167 board_reset() called!
340 12:45:29.844250 full_reset() called!
341 12:45:34.362331
342 12:45:34.362472
343 12:45:34.371904 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 12:45:34.375202 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 12:45:34.382136 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 12:45:34.385429 CPU: AES supported, TXT NOT supported, VT supported
347 12:45:34.391849 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 12:45:34.395180 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 12:45:34.401753 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 12:45:34.405152 VBOOT: Loading verstage.
351 12:45:34.408526 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
352 12:45:34.415145 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 12:45:34.421723 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 12:45:34.421802 CBFS @ c08000 size 3f8000
355 12:45:34.428273 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 12:45:34.431601 CBFS: Locating 'fallback/verstage'
357 12:45:34.435037 CBFS: Found @ offset 10fb80 size 1072c
358 12:45:34.438900
359 12:45:34.438987
360 12:45:34.449296 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 12:45:34.463341 Probing TPM: . done!
362 12:45:34.467171 TPM ready after 0 ms
363 12:45:34.470339 Connected to device vid:did:rid of 1ae0:0028:00
364 12:45:34.480358 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
365 12:45:34.483725 Initialized TPM device CR50 revision 0
366 12:45:34.519268 tlcl_send_startup: Startup return code is 0
367 12:45:34.519363 TPM: setup succeeded
368 12:45:34.531955 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 12:45:34.535838 Chrome EC: UHEPI supported
370 12:45:34.539290 Phase 1
371 12:45:34.542500 FMAP: area GBB found @ c05000 (12288 bytes)
372 12:45:34.548998 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 12:45:34.555465 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 12:45:34.558721 Recovery requested (1009000e)
375 12:45:34.564545 Saving nvdata
376 12:45:34.570777 tlcl_extend: response is 0
377 12:45:34.579446 tlcl_extend: response is 0
378 12:45:34.586387 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:45:34.589665 CBFS @ c08000 size 3f8000
380 12:45:34.596443 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:45:34.599698 CBFS: Locating 'fallback/romstage'
382 12:45:34.603083 CBFS: Found @ offset 80 size 145fc
383 12:45:34.606888 Accumulated console time in verstage 98 ms
384 12:45:34.606968
385 12:45:34.607034
386 12:45:34.619649 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 12:45:34.626428 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 12:45:34.629797 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 12:45:34.633089 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 12:45:34.639760 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 12:45:34.642596 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 12:45:34.646418 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 12:45:34.649749 TCO_STS: 0000 0000
394 12:45:34.652959 GEN_PMCON: e0015238 00000200
395 12:45:34.655821 GBLRST_CAUSE: 00000000 00000000
396 12:45:34.655900 prev_sleep_state 5
397 12:45:34.659605 Boot Count incremented to 32346
398 12:45:34.666230 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 12:45:34.670061 CBFS @ c08000 size 3f8000
400 12:45:34.675830 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 12:45:34.675918 CBFS: Locating 'fspm.bin'
402 12:45:34.682828 CBFS: Found @ offset 5ffc0 size 71000
403 12:45:34.686236 Chrome EC: UHEPI supported
404 12:45:34.692679 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 12:45:34.696436 Probing TPM: done!
406 12:45:34.702752 Connected to device vid:did:rid of 1ae0:0028:00
407 12:45:34.712682 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
408 12:45:34.718692 Initialized TPM device CR50 revision 0
409 12:45:34.727987 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 12:45:34.734541 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 12:45:34.737974 MRC cache found, size 1948
412 12:45:34.741308 bootmode is set to: 2
413 12:45:34.744848 PRMRR disabled by config.
414 12:45:34.744936 SPD INDEX = 1
415 12:45:34.751195 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 12:45:34.754527 CBFS @ c08000 size 3f8000
417 12:45:34.760919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 12:45:34.761046 CBFS: Locating 'spd.bin'
419 12:45:34.764355 CBFS: Found @ offset 5fb80 size 400
420 12:45:34.767997 SPD: module type is LPDDR3
421 12:45:34.771708 SPD: module part is
422 12:45:34.777594 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 12:45:34.780801 SPD: device width 4 bits, bus width 8 bits
424 12:45:34.784240 SPD: module size is 4096 MB (per channel)
425 12:45:34.788091 memory slot: 0 configuration done.
426 12:45:34.790752 memory slot: 2 configuration done.
427 12:45:34.842775 CBMEM:
428 12:45:34.846100 IMD: root @ 99fff000 254 entries.
429 12:45:34.849306 IMD: root @ 99ffec00 62 entries.
430 12:45:34.852605 External stage cache:
431 12:45:34.855822 IMD: root @ 9abff000 254 entries.
432 12:45:34.859435 IMD: root @ 9abfec00 62 entries.
433 12:45:34.862647 Chrome EC: clear events_b mask to 0x0000000020004000
434 12:45:34.878516 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 12:45:34.892099 tlcl_write: response is 0
436 12:45:34.900824 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 12:45:34.907278 MRC: TPM MRC hash updated successfully.
438 12:45:34.907364 2 DIMMs found
439 12:45:34.910583 SMM Memory Map
440 12:45:34.913972 SMRAM : 0x9a000000 0x1000000
441 12:45:34.917282 Subregion 0: 0x9a000000 0xa00000
442 12:45:34.921158 Subregion 1: 0x9aa00000 0x200000
443 12:45:34.924386 Subregion 2: 0x9ac00000 0x400000
444 12:45:34.927709 top_of_ram = 0x9a000000
445 12:45:34.931018 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 12:45:34.937719 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 12:45:34.940526 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 12:45:34.947195 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 12:45:34.950514 CBFS @ c08000 size 3f8000
450 12:45:34.953929 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 12:45:34.957195 CBFS: Locating 'fallback/postcar'
452 12:45:34.963943 CBFS: Found @ offset 107000 size 4b44
453 12:45:34.966969 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 12:45:34.979843 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 12:45:34.982950 Processing 180 relocs. Offset value of 0x97c0c000
456 12:45:34.991722 Accumulated console time in romstage 286 ms
457 12:45:34.991805
458 12:45:34.991873
459 12:45:35.001535 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 12:45:35.008692 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 12:45:35.011956 CBFS @ c08000 size 3f8000
462 12:45:35.015178 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 12:45:35.018474 CBFS: Locating 'fallback/ramstage'
464 12:45:35.025066 CBFS: Found @ offset 43380 size 1b9e8
465 12:45:35.031694 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 12:45:35.063180 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 12:45:35.066466 Processing 3976 relocs. Offset value of 0x98db0000
468 12:45:35.073134 Accumulated console time in postcar 52 ms
469 12:45:35.073216
470 12:45:35.073293
471 12:45:35.082940 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 12:45:35.090069 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 12:45:35.093314 WARNING: RO_VPD is uninitialized or empty.
474 12:45:35.096570 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 12:45:35.103173 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 12:45:35.103260 Normal boot.
477 12:45:35.109723 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 12:45:35.113130 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:45:35.116386 CBFS @ c08000 size 3f8000
480 12:45:35.122962 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:45:35.126280 CBFS: Locating 'cpu_microcode_blob.bin'
482 12:45:35.129503 CBFS: Found @ offset 14700 size 2ec00
483 12:45:35.132794 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 12:45:35.136137 Skip microcode update
485 12:45:35.142709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 12:45:35.142791 CBFS @ c08000 size 3f8000
487 12:45:35.149465 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 12:45:35.152604 CBFS: Locating 'fsps.bin'
489 12:45:35.155916 CBFS: Found @ offset d1fc0 size 35000
490 12:45:35.181651 Detected 4 core, 8 thread CPU.
491 12:45:35.184885 Setting up SMI for CPU
492 12:45:35.188005 IED base = 0x9ac00000
493 12:45:35.188081 IED size = 0x00400000
494 12:45:35.191356 Will perform SMM setup.
495 12:45:35.198285 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 12:45:35.205013 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 12:45:35.207802 Processing 16 relocs. Offset value of 0x00030000
498 12:45:35.211962 Attempting to start 7 APs
499 12:45:35.214761 Waiting for 10ms after sending INIT.
500 12:45:35.231114 Waiting for 1st SIPI to complete...done.
501 12:45:35.231194 AP: slot 3 apic_id 1.
502 12:45:35.238174 Waiting for 2nd SIPI to complete...done.
503 12:45:35.238257 AP: slot 4 apic_id 2.
504 12:45:35.241429 AP: slot 1 apic_id 3.
505 12:45:35.244721 AP: slot 2 apic_id 6.
506 12:45:35.244797 AP: slot 7 apic_id 7.
507 12:45:35.247991 AP: slot 5 apic_id 5.
508 12:45:35.250891 AP: slot 6 apic_id 4.
509 12:45:35.257643 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 12:45:35.264271 Processing 13 relocs. Offset value of 0x00038000
511 12:45:35.267594 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 12:45:35.274096 Installing SMM handler to 0x9a000000
513 12:45:35.281094 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 12:45:35.284572 Processing 658 relocs. Offset value of 0x9a010000
515 12:45:35.294098 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 12:45:35.297811 Processing 13 relocs. Offset value of 0x9a008000
517 12:45:35.304443 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 12:45:35.310820 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 12:45:35.314127 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 12:45:35.320660 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 12:45:35.327318 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 12:45:35.334082 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 12:45:35.337545 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 12:45:35.343994 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 12:45:35.347358 Clearing SMI status registers
526 12:45:35.350634 SMI_STS: PM1
527 12:45:35.350713 PM1_STS: PWRBTN
528 12:45:35.353864 TCO_STS: SECOND_TO
529 12:45:35.357188 New SMBASE 0x9a000000
530 12:45:35.360545 In relocation handler: CPU 0
531 12:45:35.363962 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 12:45:35.367351 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 12:45:35.370721 Relocation complete.
534 12:45:35.373890 New SMBASE 0x99fff400
535 12:45:35.373968 In relocation handler: CPU 3
536 12:45:35.380905 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 12:45:35.384135 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 12:45:35.387344 Relocation complete.
539 12:45:35.390650 New SMBASE 0x99fff800
540 12:45:35.390732 In relocation handler: CPU 2
541 12:45:35.397068 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
542 12:45:35.400303 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 12:45:35.404120 Relocation complete.
544 12:45:35.404202 New SMBASE 0x99fffc00
545 12:45:35.407313 In relocation handler: CPU 1
546 12:45:35.413802 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
547 12:45:35.417080 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:45:35.420324 Relocation complete.
549 12:45:35.420401 New SMBASE 0x99fff000
550 12:45:35.423549 In relocation handler: CPU 4
551 12:45:35.427019 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
552 12:45:35.433845 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 12:45:35.436880 Relocation complete.
554 12:45:35.436985 New SMBASE 0x99ffe400
555 12:45:35.440206 In relocation handler: CPU 7
556 12:45:35.444053 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
557 12:45:35.450647 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 12:45:35.453974 Relocation complete.
559 12:45:35.454094 New SMBASE 0x99ffe800
560 12:45:35.456792 In relocation handler: CPU 6
561 12:45:35.460146 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
562 12:45:35.466865 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 12:45:35.466943 Relocation complete.
564 12:45:35.470174 New SMBASE 0x99ffec00
565 12:45:35.473325 In relocation handler: CPU 5
566 12:45:35.476666 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
567 12:45:35.483763 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 12:45:35.483841 Relocation complete.
569 12:45:35.487364 Initializing CPU #0
570 12:45:35.490102 CPU: vendor Intel device 806ec
571 12:45:35.493683 CPU: family 06, model 8e, stepping 0c
572 12:45:35.496845 Clearing out pending MCEs
573 12:45:35.500080 Setting up local APIC...
574 12:45:35.500155 apic_id: 0x00 done.
575 12:45:35.503825 Turbo is available but hidden
576 12:45:35.506717 Turbo is available and visible
577 12:45:35.509929 VMX status: enabled
578 12:45:35.513255 IA32_FEATURE_CONTROL status: locked
579 12:45:35.516847 Skip microcode update
580 12:45:35.516925 CPU #0 initialized
581 12:45:35.520213 Initializing CPU #3
582 12:45:35.520290 Initializing CPU #5
583 12:45:35.523350 Initializing CPU #6
584 12:45:35.526641 CPU: vendor Intel device 806ec
585 12:45:35.530129 CPU: family 06, model 8e, stepping 0c
586 12:45:35.533395 CPU: vendor Intel device 806ec
587 12:45:35.536687 CPU: family 06, model 8e, stepping 0c
588 12:45:35.540023 Clearing out pending MCEs
589 12:45:35.543347 Initializing CPU #1
590 12:45:35.543434 Initializing CPU #4
591 12:45:35.546708 CPU: vendor Intel device 806ec
592 12:45:35.549996 CPU: family 06, model 8e, stepping 0c
593 12:45:35.553432 CPU: vendor Intel device 806ec
594 12:45:35.556155 CPU: family 06, model 8e, stepping 0c
595 12:45:35.559483 Clearing out pending MCEs
596 12:45:35.562962 Clearing out pending MCEs
597 12:45:35.566210 Setting up local APIC...
598 12:45:35.569429 CPU: vendor Intel device 806ec
599 12:45:35.572719 CPU: family 06, model 8e, stepping 0c
600 12:45:35.576423 Clearing out pending MCEs
601 12:45:35.579900 Clearing out pending MCEs
602 12:45:35.580036 Setting up local APIC...
603 12:45:35.583110 Initializing CPU #2
604 12:45:35.586267 Initializing CPU #7
605 12:45:35.586346 Setting up local APIC...
606 12:45:35.589739 CPU: vendor Intel device 806ec
607 12:45:35.592845 CPU: family 06, model 8e, stepping 0c
608 12:45:35.595897 CPU: vendor Intel device 806ec
609 12:45:35.599146 CPU: family 06, model 8e, stepping 0c
610 12:45:35.602920 Clearing out pending MCEs
611 12:45:35.606374 Clearing out pending MCEs
612 12:45:35.609616 Setting up local APIC...
613 12:45:35.609698 apic_id: 0x02 done.
614 12:45:35.612938 apic_id: 0x03 done.
615 12:45:35.616059 VMX status: enabled
616 12:45:35.616139 VMX status: enabled
617 12:45:35.619261 IA32_FEATURE_CONTROL status: locked
618 12:45:35.622656 IA32_FEATURE_CONTROL status: locked
619 12:45:35.625942 Skip microcode update
620 12:45:35.629223 Setting up local APIC...
621 12:45:35.632492 apic_id: 0x04 done.
622 12:45:35.632568 Setting up local APIC...
623 12:45:35.635869 apic_id: 0x01 done.
624 12:45:35.639172 apic_id: 0x05 done.
625 12:45:35.639269 VMX status: enabled
626 12:45:35.642474 VMX status: enabled
627 12:45:35.645881 IA32_FEATURE_CONTROL status: locked
628 12:45:35.649167 IA32_FEATURE_CONTROL status: locked
629 12:45:35.652622 Skip microcode update
630 12:45:35.652702 Skip microcode update
631 12:45:35.655919 CPU #6 initialized
632 12:45:35.659213 CPU #5 initialized
633 12:45:35.659290 CPU #4 initialized
634 12:45:35.662624 Skip microcode update
635 12:45:35.662700 VMX status: enabled
636 12:45:35.666026 Setting up local APIC...
637 12:45:35.668832 CPU #1 initialized
638 12:45:35.672183 IA32_FEATURE_CONTROL status: locked
639 12:45:35.675517 apic_id: 0x06 done.
640 12:45:35.675597 apic_id: 0x07 done.
641 12:45:35.678877 VMX status: enabled
642 12:45:35.678951 VMX status: enabled
643 12:45:35.682119 IA32_FEATURE_CONTROL status: locked
644 12:45:35.688864 IA32_FEATURE_CONTROL status: locked
645 12:45:35.688941 Skip microcode update
646 12:45:35.692189 Skip microcode update
647 12:45:35.692268 CPU #2 initialized
648 12:45:35.695692 CPU #7 initialized
649 12:45:35.699342 Skip microcode update
650 12:45:35.699424 CPU #3 initialized
651 12:45:35.705759 bsp_do_flight_plan done after 466 msecs.
652 12:45:35.709059 CPU: frequency set to 4200 MHz
653 12:45:35.709135 Enabling SMIs.
654 12:45:35.709200 Locking SMM.
655 12:45:35.725281 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 12:45:35.728528 CBFS @ c08000 size 3f8000
657 12:45:35.735249 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 12:45:35.735327 CBFS: Locating 'vbt.bin'
659 12:45:35.738564 CBFS: Found @ offset 5f5c0 size 499
660 12:45:35.745520 Found a VBT of 4608 bytes after decompression
661 12:45:35.924558 Display FSP Version Info HOB
662 12:45:35.927685 Reference Code - CPU = 9.0.1e.30
663 12:45:35.931032 uCode Version = 0.0.0.ca
664 12:45:35.934277 TXT ACM version = ff.ff.ff.ffff
665 12:45:35.938206 Display FSP Version Info HOB
666 12:45:35.941047 Reference Code - ME = 9.0.1e.30
667 12:45:35.944577 MEBx version = 0.0.0.0
668 12:45:35.947743 ME Firmware Version = Consumer SKU
669 12:45:35.951526 Display FSP Version Info HOB
670 12:45:35.954330 Reference Code - CML PCH = 9.0.1e.30
671 12:45:35.954413 PCH-CRID Status = Disabled
672 12:45:35.961266 PCH-CRID Original Value = ff.ff.ff.ffff
673 12:45:35.964707 PCH-CRID New Value = ff.ff.ff.ffff
674 12:45:35.968113 OPROM - RST - RAID = ff.ff.ff.ffff
675 12:45:35.970985 ChipsetInit Base Version = ff.ff.ff.ffff
676 12:45:35.974316 ChipsetInit Oem Version = ff.ff.ff.ffff
677 12:45:35.977640 Display FSP Version Info HOB
678 12:45:35.984292 Reference Code - SA - System Agent = 9.0.1e.30
679 12:45:35.984379 Reference Code - MRC = 0.7.1.6c
680 12:45:35.988092 SA - PCIe Version = 9.0.1e.30
681 12:45:35.991531 SA-CRID Status = Disabled
682 12:45:35.994710 SA-CRID Original Value = 0.0.0.c
683 12:45:35.998571 SA-CRID New Value = 0.0.0.c
684 12:45:36.001373 OPROM - VBIOS = ff.ff.ff.ffff
685 12:45:36.001459 RTC Init
686 12:45:36.007732 Set power on after power failure.
687 12:45:36.007818 Disabling Deep S3
688 12:45:36.011146 Disabling Deep S3
689 12:45:36.011232 Disabling Deep S4
690 12:45:36.014565 Disabling Deep S4
691 12:45:36.014651 Disabling Deep S5
692 12:45:36.017590 Disabling Deep S5
693 12:45:36.024240 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
694 12:45:36.024322 Enumerating buses...
695 12:45:36.030963 Show all devs... Before device enumeration.
696 12:45:36.031043 Root Device: enabled 1
697 12:45:36.034156 CPU_CLUSTER: 0: enabled 1
698 12:45:36.037876 DOMAIN: 0000: enabled 1
699 12:45:36.037965 APIC: 00: enabled 1
700 12:45:36.040742 PCI: 00:00.0: enabled 1
701 12:45:36.044505 PCI: 00:02.0: enabled 1
702 12:45:36.047769 PCI: 00:04.0: enabled 0
703 12:45:36.047863 PCI: 00:05.0: enabled 0
704 12:45:36.051128 PCI: 00:12.0: enabled 1
705 12:45:36.054428 PCI: 00:12.5: enabled 0
706 12:45:36.057698 PCI: 00:12.6: enabled 0
707 12:45:36.057788 PCI: 00:14.0: enabled 1
708 12:45:36.060997 PCI: 00:14.1: enabled 0
709 12:45:36.064297 PCI: 00:14.3: enabled 1
710 12:45:36.067570 PCI: 00:14.5: enabled 0
711 12:45:36.067659 PCI: 00:15.0: enabled 1
712 12:45:36.070884 PCI: 00:15.1: enabled 1
713 12:45:36.074242 PCI: 00:15.2: enabled 0
714 12:45:36.074331 PCI: 00:15.3: enabled 0
715 12:45:36.077700 PCI: 00:16.0: enabled 1
716 12:45:36.081002 PCI: 00:16.1: enabled 0
717 12:45:36.084346 PCI: 00:16.2: enabled 0
718 12:45:36.084438 PCI: 00:16.3: enabled 0
719 12:45:36.087585 PCI: 00:16.4: enabled 0
720 12:45:36.090802 PCI: 00:16.5: enabled 0
721 12:45:36.094134 PCI: 00:17.0: enabled 1
722 12:45:36.094225 PCI: 00:19.0: enabled 1
723 12:45:36.097424 PCI: 00:19.1: enabled 0
724 12:45:36.100735 PCI: 00:19.2: enabled 0
725 12:45:36.104080 PCI: 00:1a.0: enabled 0
726 12:45:36.104168 PCI: 00:1c.0: enabled 0
727 12:45:36.107268 PCI: 00:1c.1: enabled 0
728 12:45:36.110511 PCI: 00:1c.2: enabled 0
729 12:45:36.110597 PCI: 00:1c.3: enabled 0
730 12:45:36.113864 PCI: 00:1c.4: enabled 0
731 12:45:36.117304 PCI: 00:1c.5: enabled 0
732 12:45:36.120533 PCI: 00:1c.6: enabled 0
733 12:45:36.120619 PCI: 00:1c.7: enabled 0
734 12:45:36.123712 PCI: 00:1d.0: enabled 1
735 12:45:36.126885 PCI: 00:1d.1: enabled 0
736 12:45:36.130765 PCI: 00:1d.2: enabled 0
737 12:45:36.130851 PCI: 00:1d.3: enabled 0
738 12:45:36.133977 PCI: 00:1d.4: enabled 0
739 12:45:36.137326 PCI: 00:1d.5: enabled 1
740 12:45:36.140651 PCI: 00:1e.0: enabled 1
741 12:45:36.140741 PCI: 00:1e.1: enabled 0
742 12:45:36.143852 PCI: 00:1e.2: enabled 1
743 12:45:36.147368 PCI: 00:1e.3: enabled 1
744 12:45:36.147452 PCI: 00:1f.0: enabled 1
745 12:45:36.150623 PCI: 00:1f.1: enabled 1
746 12:45:36.153936 PCI: 00:1f.2: enabled 1
747 12:45:36.157316 PCI: 00:1f.3: enabled 1
748 12:45:36.157405 PCI: 00:1f.4: enabled 1
749 12:45:36.160573 PCI: 00:1f.5: enabled 1
750 12:45:36.163877 PCI: 00:1f.6: enabled 0
751 12:45:36.167179 USB0 port 0: enabled 1
752 12:45:36.167264 I2C: 00:15: enabled 1
753 12:45:36.170606 I2C: 00:5d: enabled 1
754 12:45:36.173852 GENERIC: 0.0: enabled 1
755 12:45:36.173937 I2C: 00:1a: enabled 1
756 12:45:36.177052 I2C: 00:38: enabled 1
757 12:45:36.180662 I2C: 00:39: enabled 1
758 12:45:36.180747 I2C: 00:3a: enabled 1
759 12:45:36.183899 I2C: 00:3b: enabled 1
760 12:45:36.186960 PCI: 00:00.0: enabled 1
761 12:45:36.187045 SPI: 00: enabled 1
762 12:45:36.190205 SPI: 01: enabled 1
763 12:45:36.193589 PNP: 0c09.0: enabled 1
764 12:45:36.193690 USB2 port 0: enabled 1
765 12:45:36.196919 USB2 port 1: enabled 1
766 12:45:36.200071 USB2 port 2: enabled 0
767 12:45:36.200157 USB2 port 3: enabled 0
768 12:45:36.203447 USB2 port 5: enabled 0
769 12:45:36.207259 USB2 port 6: enabled 1
770 12:45:36.210482 USB2 port 9: enabled 1
771 12:45:36.210567 USB3 port 0: enabled 1
772 12:45:36.213763 USB3 port 1: enabled 1
773 12:45:36.216895 USB3 port 2: enabled 1
774 12:45:36.217019 USB3 port 3: enabled 1
775 12:45:36.220396 USB3 port 4: enabled 0
776 12:45:36.223522 APIC: 03: enabled 1
777 12:45:36.223607 APIC: 06: enabled 1
778 12:45:36.226794 APIC: 01: enabled 1
779 12:45:36.230432 APIC: 02: enabled 1
780 12:45:36.230518 APIC: 05: enabled 1
781 12:45:36.233745 APIC: 04: enabled 1
782 12:45:36.233863 APIC: 07: enabled 1
783 12:45:36.236922 Compare with tree...
784 12:45:36.240151 Root Device: enabled 1
785 12:45:36.243498 CPU_CLUSTER: 0: enabled 1
786 12:45:36.243584 APIC: 00: enabled 1
787 12:45:36.246786 APIC: 03: enabled 1
788 12:45:36.250168 APIC: 06: enabled 1
789 12:45:36.250254 APIC: 01: enabled 1
790 12:45:36.253449 APIC: 02: enabled 1
791 12:45:36.256686 APIC: 05: enabled 1
792 12:45:36.256771 APIC: 04: enabled 1
793 12:45:36.259963 APIC: 07: enabled 1
794 12:45:36.263280 DOMAIN: 0000: enabled 1
795 12:45:36.263366 PCI: 00:00.0: enabled 1
796 12:45:36.266569 PCI: 00:02.0: enabled 1
797 12:45:36.269906 PCI: 00:04.0: enabled 0
798 12:45:36.273189 PCI: 00:05.0: enabled 0
799 12:45:36.276505 PCI: 00:12.0: enabled 1
800 12:45:36.276591 PCI: 00:12.5: enabled 0
801 12:45:36.279907 PCI: 00:12.6: enabled 0
802 12:45:36.283274 PCI: 00:14.0: enabled 1
803 12:45:36.286487 USB0 port 0: enabled 1
804 12:45:36.289770 USB2 port 0: enabled 1
805 12:45:36.289856 USB2 port 1: enabled 1
806 12:45:36.292988 USB2 port 2: enabled 0
807 12:45:36.296242 USB2 port 3: enabled 0
808 12:45:36.300013 USB2 port 5: enabled 0
809 12:45:36.303137 USB2 port 6: enabled 1
810 12:45:36.306454 USB2 port 9: enabled 1
811 12:45:36.306540 USB3 port 0: enabled 1
812 12:45:36.309925 USB3 port 1: enabled 1
813 12:45:36.312879 USB3 port 2: enabled 1
814 12:45:36.316205 USB3 port 3: enabled 1
815 12:45:36.319508 USB3 port 4: enabled 0
816 12:45:36.322725 PCI: 00:14.1: enabled 0
817 12:45:36.322811 PCI: 00:14.3: enabled 1
818 12:45:36.326022 PCI: 00:14.5: enabled 0
819 12:45:36.329387 PCI: 00:15.0: enabled 1
820 12:45:36.332778 I2C: 00:15: enabled 1
821 12:45:36.332864 PCI: 00:15.1: enabled 1
822 12:45:36.335978 I2C: 00:5d: enabled 1
823 12:45:36.339764 GENERIC: 0.0: enabled 1
824 12:45:36.342884 PCI: 00:15.2: enabled 0
825 12:45:36.346123 PCI: 00:15.3: enabled 0
826 12:45:36.346208 PCI: 00:16.0: enabled 1
827 12:45:36.349351 PCI: 00:16.1: enabled 0
828 12:45:36.352596 PCI: 00:16.2: enabled 0
829 12:45:36.356244 PCI: 00:16.3: enabled 0
830 12:45:36.359140 PCI: 00:16.4: enabled 0
831 12:45:36.359226 PCI: 00:16.5: enabled 0
832 12:45:36.362458 PCI: 00:17.0: enabled 1
833 12:45:36.365798 PCI: 00:19.0: enabled 1
834 12:45:36.369055 I2C: 00:1a: enabled 1
835 12:45:36.369141 I2C: 00:38: enabled 1
836 12:45:36.372319 I2C: 00:39: enabled 1
837 12:45:36.375700 I2C: 00:3a: enabled 1
838 12:45:36.379272 I2C: 00:3b: enabled 1
839 12:45:36.382625 PCI: 00:19.1: enabled 0
840 12:45:36.382713 PCI: 00:19.2: enabled 0
841 12:45:36.386071 PCI: 00:1a.0: enabled 0
842 12:45:36.388912 PCI: 00:1c.0: enabled 0
843 12:45:36.392341 PCI: 00:1c.1: enabled 0
844 12:45:36.395592 PCI: 00:1c.2: enabled 0
845 12:45:36.395672 PCI: 00:1c.3: enabled 0
846 12:45:36.398780 PCI: 00:1c.4: enabled 0
847 12:45:36.402222 PCI: 00:1c.5: enabled 0
848 12:45:36.405299 PCI: 00:1c.6: enabled 0
849 12:45:36.408608 PCI: 00:1c.7: enabled 0
850 12:45:36.408686 PCI: 00:1d.0: enabled 1
851 12:45:36.411967 PCI: 00:1d.1: enabled 0
852 12:45:36.415676 PCI: 00:1d.2: enabled 0
853 12:45:36.418490 PCI: 00:1d.3: enabled 0
854 12:45:36.418567 PCI: 00:1d.4: enabled 0
855 12:45:36.421949 PCI: 00:1d.5: enabled 1
856 12:45:36.425298 PCI: 00:00.0: enabled 1
857 12:45:36.428397 PCI: 00:1e.0: enabled 1
858 12:45:36.431980 PCI: 00:1e.1: enabled 0
859 12:45:36.432056 PCI: 00:1e.2: enabled 1
860 12:45:36.435115 SPI: 00: enabled 1
861 12:45:36.438843 PCI: 00:1e.3: enabled 1
862 12:45:36.441728 SPI: 01: enabled 1
863 12:45:36.441816 PCI: 00:1f.0: enabled 1
864 12:45:36.445544 PNP: 0c09.0: enabled 1
865 12:45:36.448843 PCI: 00:1f.1: enabled 1
866 12:45:36.452101 PCI: 00:1f.2: enabled 1
867 12:45:36.455701 PCI: 00:1f.3: enabled 1
868 12:45:36.455785 PCI: 00:1f.4: enabled 1
869 12:45:36.458690 PCI: 00:1f.5: enabled 1
870 12:45:36.462087 PCI: 00:1f.6: enabled 0
871 12:45:36.465387 Root Device scanning...
872 12:45:36.468652 scan_static_bus for Root Device
873 12:45:36.468735 CPU_CLUSTER: 0 enabled
874 12:45:36.471551 DOMAIN: 0000 enabled
875 12:45:36.475289 DOMAIN: 0000 scanning...
876 12:45:36.478093 PCI: pci_scan_bus for bus 00
877 12:45:36.482112 PCI: 00:00.0 [8086/0000] ops
878 12:45:36.484822 PCI: 00:00.0 [8086/9b61] enabled
879 12:45:36.488559 PCI: 00:02.0 [8086/0000] bus ops
880 12:45:36.491987 PCI: 00:02.0 [8086/9b41] enabled
881 12:45:36.495209 PCI: 00:04.0 [8086/1903] disabled
882 12:45:36.498510 PCI: 00:08.0 [8086/1911] enabled
883 12:45:36.501926 PCI: 00:12.0 [8086/02f9] enabled
884 12:45:36.505178 PCI: 00:14.0 [8086/0000] bus ops
885 12:45:36.508460 PCI: 00:14.0 [8086/02ed] enabled
886 12:45:36.511684 PCI: 00:14.2 [8086/02ef] enabled
887 12:45:36.515122 PCI: 00:14.3 [8086/02f0] enabled
888 12:45:36.518173 PCI: 00:15.0 [8086/0000] bus ops
889 12:45:36.521793 PCI: 00:15.0 [8086/02e8] enabled
890 12:45:36.525085 PCI: 00:15.1 [8086/0000] bus ops
891 12:45:36.528293 PCI: 00:15.1 [8086/02e9] enabled
892 12:45:36.531559 PCI: 00:16.0 [8086/0000] ops
893 12:45:36.534943 PCI: 00:16.0 [8086/02e0] enabled
894 12:45:36.538503 PCI: 00:17.0 [8086/0000] ops
895 12:45:36.542865 PCI: 00:17.0 [8086/02d3] enabled
896 12:45:36.545115 PCI: 00:19.0 [8086/0000] bus ops
897 12:45:36.548368 PCI: 00:19.0 [8086/02c5] enabled
898 12:45:36.551645 PCI: 00:1d.0 [8086/0000] bus ops
899 12:45:36.554982 PCI: 00:1d.0 [8086/02b0] enabled
900 12:45:36.557981 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 12:45:36.561536 PCI: 00:1e.0 [8086/0000] ops
902 12:45:36.564916 PCI: 00:1e.0 [8086/02a8] enabled
903 12:45:36.568182 PCI: 00:1e.2 [8086/0000] bus ops
904 12:45:36.571432 PCI: 00:1e.2 [8086/02aa] enabled
905 12:45:36.574650 PCI: 00:1e.3 [8086/0000] bus ops
906 12:45:36.577925 PCI: 00:1e.3 [8086/02ab] enabled
907 12:45:36.581307 PCI: 00:1f.0 [8086/0000] bus ops
908 12:45:36.584655 PCI: 00:1f.0 [8086/0284] enabled
909 12:45:36.591231 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 12:45:36.597756 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 12:45:36.601361 PCI: 00:1f.3 [8086/0000] bus ops
912 12:45:36.604650 PCI: 00:1f.3 [8086/02c8] enabled
913 12:45:36.607914 PCI: 00:1f.4 [8086/0000] bus ops
914 12:45:36.611267 PCI: 00:1f.4 [8086/02a3] enabled
915 12:45:36.614625 PCI: 00:1f.5 [8086/0000] bus ops
916 12:45:36.617766 PCI: 00:1f.5 [8086/02a4] enabled
917 12:45:36.620965 PCI: Leftover static devices:
918 12:45:36.621050 PCI: 00:05.0
919 12:45:36.621117 PCI: 00:12.5
920 12:45:36.624154 PCI: 00:12.6
921 12:45:36.624238 PCI: 00:14.1
922 12:45:36.627575 PCI: 00:14.5
923 12:45:36.627659 PCI: 00:15.2
924 12:45:36.627724 PCI: 00:15.3
925 12:45:36.630768 PCI: 00:16.1
926 12:45:36.630852 PCI: 00:16.2
927 12:45:36.634034 PCI: 00:16.3
928 12:45:36.634119 PCI: 00:16.4
929 12:45:36.637783 PCI: 00:16.5
930 12:45:36.637867 PCI: 00:19.1
931 12:45:36.637932 PCI: 00:19.2
932 12:45:36.641074 PCI: 00:1a.0
933 12:45:36.641159 PCI: 00:1c.0
934 12:45:36.644275 PCI: 00:1c.1
935 12:45:36.644360 PCI: 00:1c.2
936 12:45:36.644426 PCI: 00:1c.3
937 12:45:36.647660 PCI: 00:1c.4
938 12:45:36.647745 PCI: 00:1c.5
939 12:45:36.651083 PCI: 00:1c.6
940 12:45:36.651167 PCI: 00:1c.7
941 12:45:36.651233 PCI: 00:1d.1
942 12:45:36.654267 PCI: 00:1d.2
943 12:45:36.654351 PCI: 00:1d.3
944 12:45:36.657595 PCI: 00:1d.4
945 12:45:36.657709 PCI: 00:1d.5
946 12:45:36.660856 PCI: 00:1e.1
947 12:45:36.660940 PCI: 00:1f.1
948 12:45:36.661043 PCI: 00:1f.2
949 12:45:36.664118 PCI: 00:1f.6
950 12:45:36.667327 PCI: Check your devicetree.cb.
951 12:45:36.667411 PCI: 00:02.0 scanning...
952 12:45:36.674376 scan_generic_bus for PCI: 00:02.0
953 12:45:36.677781 scan_generic_bus for PCI: 00:02.0 done
954 12:45:36.681152 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
955 12:45:36.683992 PCI: 00:14.0 scanning...
956 12:45:36.687832 scan_static_bus for PCI: 00:14.0
957 12:45:36.690659 USB0 port 0 enabled
958 12:45:36.693962 USB0 port 0 scanning...
959 12:45:36.697256 scan_static_bus for USB0 port 0
960 12:45:36.697340 USB2 port 0 enabled
961 12:45:36.700919 USB2 port 1 enabled
962 12:45:36.703968 USB2 port 2 disabled
963 12:45:36.704052 USB2 port 3 disabled
964 12:45:36.707559 USB2 port 5 disabled
965 12:45:36.707643 USB2 port 6 enabled
966 12:45:36.710730 USB2 port 9 enabled
967 12:45:36.714198 USB3 port 0 enabled
968 12:45:36.714283 USB3 port 1 enabled
969 12:45:36.717324 USB3 port 2 enabled
970 12:45:36.717416 USB3 port 3 enabled
971 12:45:36.720699 USB3 port 4 disabled
972 12:45:36.723813 USB2 port 0 scanning...
973 12:45:36.727524 scan_static_bus for USB2 port 0
974 12:45:36.731064 scan_static_bus for USB2 port 0 done
975 12:45:36.737625 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
976 12:45:36.737713 USB2 port 1 scanning...
977 12:45:36.740824 scan_static_bus for USB2 port 1
978 12:45:36.747365 scan_static_bus for USB2 port 1 done
979 12:45:36.750949 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
980 12:45:36.754399 USB2 port 6 scanning...
981 12:45:36.757634 scan_static_bus for USB2 port 6
982 12:45:36.760751 scan_static_bus for USB2 port 6 done
983 12:45:36.767225 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
984 12:45:36.767305 USB2 port 9 scanning...
985 12:45:36.770637 scan_static_bus for USB2 port 9
986 12:45:36.777342 scan_static_bus for USB2 port 9 done
987 12:45:36.780649 scan_bus: scanning of bus USB2 port 9 took 9693 usecs
988 12:45:36.783966 USB3 port 0 scanning...
989 12:45:36.787392 scan_static_bus for USB3 port 0
990 12:45:36.790666 scan_static_bus for USB3 port 0 done
991 12:45:36.796875 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
992 12:45:36.796982 USB3 port 1 scanning...
993 12:45:36.800641 scan_static_bus for USB3 port 1
994 12:45:36.807128 scan_static_bus for USB3 port 1 done
995 12:45:36.810844 scan_bus: scanning of bus USB3 port 1 took 9706 usecs
996 12:45:36.813978 USB3 port 2 scanning...
997 12:45:36.817221 scan_static_bus for USB3 port 2
998 12:45:36.820494 scan_static_bus for USB3 port 2 done
999 12:45:36.827426 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1000 12:45:36.827512 USB3 port 3 scanning...
1001 12:45:36.830536 scan_static_bus for USB3 port 3
1002 12:45:36.837244 scan_static_bus for USB3 port 3 done
1003 12:45:36.840595 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
1004 12:45:36.843790 scan_static_bus for USB0 port 0 done
1005 12:45:36.850537 scan_bus: scanning of bus USB0 port 0 took 155395 usecs
1006 12:45:36.853878 scan_static_bus for PCI: 00:14.0 done
1007 12:45:36.860537 scan_bus: scanning of bus PCI: 00:14.0 took 173017 usecs
1008 12:45:36.863879 PCI: 00:15.0 scanning...
1009 12:45:36.867180 scan_generic_bus for PCI: 00:15.0
1010 12:45:36.870491 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 12:45:36.873335 scan_generic_bus for PCI: 00:15.0 done
1012 12:45:36.880051 scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs
1013 12:45:36.883475 PCI: 00:15.1 scanning...
1014 12:45:36.886793 scan_generic_bus for PCI: 00:15.1
1015 12:45:36.890003 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 12:45:36.893371 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 12:45:36.896690 scan_generic_bus for PCI: 00:15.1 done
1018 12:45:36.903239 scan_bus: scanning of bus PCI: 00:15.1 took 18596 usecs
1019 12:45:36.906490 PCI: 00:19.0 scanning...
1020 12:45:36.909814 scan_generic_bus for PCI: 00:19.0
1021 12:45:36.913148 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 12:45:36.916696 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 12:45:36.923320 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 12:45:36.926539 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 12:45:36.929785 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 12:45:36.933081 scan_generic_bus for PCI: 00:19.0 done
1027 12:45:36.939908 scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
1028 12:45:36.943092 PCI: 00:1d.0 scanning...
1029 12:45:36.946138 do_pci_scan_bridge for PCI: 00:1d.0
1030 12:45:36.949486 PCI: pci_scan_bus for bus 01
1031 12:45:36.952830 PCI: 01:00.0 [1c5c/1327] enabled
1032 12:45:36.956142 Enabling Common Clock Configuration
1033 12:45:36.959409 L1 Sub-State supported from root port 29
1034 12:45:36.963136 L1 Sub-State Support = 0xf
1035 12:45:36.966148 CommonModeRestoreTime = 0x28
1036 12:45:36.969655 Power On Value = 0x16, Power On Scale = 0x0
1037 12:45:36.973017 ASPM: Enabled L1
1038 12:45:36.979662 scan_bus: scanning of bus PCI: 00:1d.0 took 32804 usecs
1039 12:45:36.979738 PCI: 00:1e.2 scanning...
1040 12:45:36.983007 scan_generic_bus for PCI: 00:1e.2
1041 12:45:36.989219 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 12:45:36.992649 scan_generic_bus for PCI: 00:1e.2 done
1043 12:45:36.995967 scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
1044 12:45:36.999159 PCI: 00:1e.3 scanning...
1045 12:45:37.002440 scan_generic_bus for PCI: 00:1e.3
1046 12:45:37.005744 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 12:45:37.012741 scan_generic_bus for PCI: 00:1e.3 done
1048 12:45:37.015918 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1049 12:45:37.019066 PCI: 00:1f.0 scanning...
1050 12:45:37.022647 scan_static_bus for PCI: 00:1f.0
1051 12:45:37.025466 PNP: 0c09.0 enabled
1052 12:45:37.029061 scan_static_bus for PCI: 00:1f.0 done
1053 12:45:37.035896 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1054 12:45:37.035974 PCI: 00:1f.3 scanning...
1055 12:45:37.042469 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1056 12:45:37.045900 PCI: 00:1f.4 scanning...
1057 12:45:37.048978 scan_generic_bus for PCI: 00:1f.4
1058 12:45:37.052276 scan_generic_bus for PCI: 00:1f.4 done
1059 12:45:37.058936 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1060 12:45:37.062254 PCI: 00:1f.5 scanning...
1061 12:45:37.065683 scan_generic_bus for PCI: 00:1f.5
1062 12:45:37.069061 scan_generic_bus for PCI: 00:1f.5 done
1063 12:45:37.075208 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1064 12:45:37.078934 scan_bus: scanning of bus DOMAIN: 0000 took 605171 usecs
1065 12:45:37.082057 scan_static_bus for Root Device done
1066 12:45:37.088531 scan_bus: scanning of bus Root Device took 625052 usecs
1067 12:45:37.088613 done
1068 12:45:37.091912 Chrome EC: UHEPI supported
1069 12:45:37.098485 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 12:45:37.104813 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 12:45:37.111365 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 12:45:37.118548 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 12:45:37.121316 SPI flash protection: WPSW=0 SRP0=0
1074 12:45:37.128259 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 12:45:37.131433 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 12:45:37.134800 found VGA at PCI: 00:02.0
1077 12:45:37.137919 Setting up VGA for PCI: 00:02.0
1078 12:45:37.144376 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 12:45:37.147760 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 12:45:37.151099 Allocating resources...
1081 12:45:37.151185 Reading resources...
1082 12:45:37.157610 Root Device read_resources bus 0 link: 0
1083 12:45:37.161485 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 12:45:37.168068 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 12:45:37.170931 DOMAIN: 0000 read_resources bus 0 link: 0
1086 12:45:37.177591 PCI: 00:14.0 read_resources bus 0 link: 0
1087 12:45:37.180992 USB0 port 0 read_resources bus 0 link: 0
1088 12:45:37.189285 USB0 port 0 read_resources bus 0 link: 0 done
1089 12:45:37.192738 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 12:45:37.199747 PCI: 00:15.0 read_resources bus 1 link: 0
1091 12:45:37.205848 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 12:45:37.209594 PCI: 00:15.1 read_resources bus 2 link: 0
1093 12:45:37.212917 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 12:45:37.220480 PCI: 00:19.0 read_resources bus 3 link: 0
1095 12:45:37.226927 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 12:45:37.230343 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 12:45:37.236770 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 12:45:37.240396 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 12:45:37.246820 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 12:45:37.250471 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 12:45:37.256819 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 12:45:37.260173 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 12:45:37.266858 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 12:45:37.273403 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 12:45:37.277082 Root Device read_resources bus 0 link: 0 done
1106 12:45:37.280139 Done reading resources.
1107 12:45:37.286764 Show resources in subtree (Root Device)...After reading.
1108 12:45:37.290049 Root Device child on link 0 CPU_CLUSTER: 0
1109 12:45:37.293297 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 12:45:37.293398 APIC: 00
1111 12:45:37.296529 APIC: 03
1112 12:45:37.296614 APIC: 06
1113 12:45:37.299894 APIC: 01
1114 12:45:37.299979 APIC: 02
1115 12:45:37.300047 APIC: 05
1116 12:45:37.303218 APIC: 04
1117 12:45:37.303305 APIC: 07
1118 12:45:37.306470 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 12:45:37.316711 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 12:45:37.326859 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 12:45:37.330072 PCI: 00:00.0
1122 12:45:37.380188 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 12:45:37.380522 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 12:45:37.380793 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 12:45:37.381056 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 12:45:37.381811 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 12:45:37.429474 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 12:45:37.430294 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 12:45:37.430574 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 12:45:37.430851 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 12:45:37.431118 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 12:45:37.479418 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 12:45:37.479765 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 12:45:37.480036 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 12:45:37.480113 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 12:45:37.480377 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 12:45:37.481020 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 12:45:37.481096 PCI: 00:02.0
1139 12:45:37.497015 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 12:45:37.503275 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 12:45:37.509861 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 12:45:37.509945 PCI: 00:04.0
1143 12:45:37.513099 PCI: 00:08.0
1144 12:45:37.523061 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 12:45:37.523145 PCI: 00:12.0
1146 12:45:37.532918 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 12:45:37.539541 PCI: 00:14.0 child on link 0 USB0 port 0
1148 12:45:37.549360 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 12:45:37.553044 USB0 port 0 child on link 0 USB2 port 0
1150 12:45:37.556491 USB2 port 0
1151 12:45:37.556599 USB2 port 1
1152 12:45:37.559547 USB2 port 2
1153 12:45:37.559630 USB2 port 3
1154 12:45:37.562692 USB2 port 5
1155 12:45:37.562773 USB2 port 6
1156 12:45:37.566377 USB2 port 9
1157 12:45:37.566472 USB3 port 0
1158 12:45:37.569395 USB3 port 1
1159 12:45:37.569486 USB3 port 2
1160 12:45:37.572813 USB3 port 3
1161 12:45:37.572901 USB3 port 4
1162 12:45:37.575995 PCI: 00:14.2
1163 12:45:37.586170 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 12:45:37.596218 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 12:45:37.596328 PCI: 00:14.3
1166 12:45:37.605927 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 12:45:37.612813 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 12:45:37.622914 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:45:37.623062 I2C: 01:15
1170 12:45:37.626001 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 12:45:37.635568 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 12:45:37.638883 I2C: 02:5d
1173 12:45:37.639009 GENERIC: 0.0
1174 12:45:37.642248 PCI: 00:16.0
1175 12:45:37.652523 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:45:37.652648 PCI: 00:17.0
1177 12:45:37.662251 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 12:45:37.672376 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 12:45:37.678790 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 12:45:37.688744 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 12:45:37.695197 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 12:45:37.705239 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 12:45:37.708626 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 12:45:37.718775 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:45:37.721965 I2C: 03:1a
1186 12:45:37.722054 I2C: 03:38
1187 12:45:37.725297 I2C: 03:39
1188 12:45:37.725374 I2C: 03:3a
1189 12:45:37.728523 I2C: 03:3b
1190 12:45:37.731798 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 12:45:37.741653 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 12:45:37.751379 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 12:45:37.758561 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 12:45:37.761646 PCI: 01:00.0
1195 12:45:37.771495 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 12:45:37.774670 PCI: 00:1e.0
1197 12:45:37.784874 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 12:45:37.794752 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 12:45:37.797897 PCI: 00:1e.2 child on link 0 SPI: 00
1200 12:45:37.808002 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:45:37.808091 SPI: 00
1202 12:45:37.814532 PCI: 00:1e.3 child on link 0 SPI: 01
1203 12:45:37.824458 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 12:45:37.824547 SPI: 01
1205 12:45:37.827638 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 12:45:37.837739 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 12:45:37.847449 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 12:45:37.847560 PNP: 0c09.0
1209 12:45:37.857748 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 12:45:37.857840 PCI: 00:1f.3
1211 12:45:37.867782 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 12:45:37.877686 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 12:45:37.880766 PCI: 00:1f.4
1214 12:45:37.890879 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 12:45:37.900705 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 12:45:37.900794 PCI: 00:1f.5
1217 12:45:37.910730 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 12:45:37.917079 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 12:45:37.924100 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 12:45:37.930204 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 12:45:37.933973 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 12:45:37.937097 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 12:45:37.940415 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 12:45:37.943753 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 12:45:37.950656 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 12:45:37.957230 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 12:45:37.963777 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 12:45:37.973926 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 12:45:37.980349 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 12:45:37.983488 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 12:45:37.993632 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 12:45:37.996712 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 12:45:38.000749 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 12:45:38.007139 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 12:45:38.010413 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 12:45:38.016949 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 12:45:38.020358 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 12:45:38.026678 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 12:45:38.029919 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 12:45:38.036511 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 12:45:38.039854 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 12:45:38.046443 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 12:45:38.050164 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 12:45:38.056573 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 12:45:38.059875 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 12:45:38.066625 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 12:45:38.069634 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 12:45:38.072788 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 12:45:38.080050 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 12:45:38.083172 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 12:45:38.089704 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 12:45:38.092847 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 12:45:38.099737 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 12:45:38.103022 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 12:45:38.112916 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 12:45:38.116029 avoid_fixed_resources: DOMAIN: 0000
1257 12:45:38.122676 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 12:45:38.129153 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 12:45:38.136220 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 12:45:38.142728 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 12:45:38.149147 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 12:45:38.159114 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 12:45:38.166067 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 12:45:38.172480 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 12:45:38.182175 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 12:45:38.189149 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 12:45:38.195525 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 12:45:38.202002 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 12:45:38.205738 Setting resources...
1270 12:45:38.212446 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 12:45:38.215878 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 12:45:38.218957 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 12:45:38.225538 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 12:45:38.228727 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 12:45:38.235358 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 12:45:38.242284 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 12:45:38.245677 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 12:45:38.255390 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 12:45:38.258596 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 12:45:38.265119 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 12:45:38.268803 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 12:45:38.275233 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 12:45:38.278855 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 12:45:38.285015 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 12:45:38.288271 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 12:45:38.294999 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 12:45:38.298248 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 12:45:38.304811 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 12:45:38.308226 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 12:45:38.311998 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 12:45:38.318484 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 12:45:38.321966 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 12:45:38.328508 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 12:45:38.331671 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 12:45:38.338112 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 12:45:38.341361 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 12:45:38.348480 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 12:45:38.351508 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 12:45:38.358314 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 12:45:38.361383 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 12:45:38.367878 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 12:45:38.375031 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 12:45:38.381300 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 12:45:38.387623 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 12:45:38.397654 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 12:45:38.401404 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 12:45:38.408008 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 12:45:38.414380 Root Device assign_resources, bus 0 link: 0
1309 12:45:38.417915 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 12:45:38.427577 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 12:45:38.434492 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 12:45:38.440845 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 12:45:38.451443 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 12:45:38.457483 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 12:45:38.467767 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 12:45:38.471023 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 12:45:38.477833 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 12:45:38.484195 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 12:45:38.494364 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 12:45:38.500808 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 12:45:38.510854 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 12:45:38.514165 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 12:45:38.517493 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 12:45:38.527271 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 12:45:38.530461 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 12:45:38.537351 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 12:45:38.543785 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 12:45:38.553872 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 12:45:38.560814 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 12:45:38.567374 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 12:45:38.576950 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 12:45:38.583767 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 12:45:38.590287 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 12:45:38.600088 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 12:45:38.603942 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 12:45:38.609956 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 12:45:38.616914 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 12:45:38.626670 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 12:45:38.636330 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 12:45:38.639562 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 12:45:38.646049 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 12:45:38.652954 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 12:45:38.659365 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 12:45:38.669502 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 12:45:38.672760 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 12:45:38.679538 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 12:45:38.685883 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 12:45:38.692668 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 12:45:38.695766 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 12:45:38.699007 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 12:45:38.706555 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 12:45:38.709634 LPC: Trying to open IO window from 800 size 1ff
1353 12:45:38.719787 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 12:45:38.726320 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 12:45:38.736003 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 12:45:38.742497 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 12:45:38.749484 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 12:45:38.752873 Root Device assign_resources, bus 0 link: 0
1359 12:45:38.755935 Done setting resources.
1360 12:45:38.762324 Show resources in subtree (Root Device)...After assigning values.
1361 12:45:38.765732 Root Device child on link 0 CPU_CLUSTER: 0
1362 12:45:38.768872 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 12:45:38.772777 APIC: 00
1364 12:45:38.772867 APIC: 03
1365 12:45:38.772935 APIC: 06
1366 12:45:38.775868 APIC: 01
1367 12:45:38.775941 APIC: 02
1368 12:45:38.779086 APIC: 05
1369 12:45:38.779163 APIC: 04
1370 12:45:38.779233 APIC: 07
1371 12:45:38.785885 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 12:45:38.795577 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 12:45:38.805345 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 12:45:38.805428 PCI: 00:00.0
1375 12:45:38.815364 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 12:45:38.825198 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 12:45:38.835345 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 12:45:38.845421 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 12:45:38.855110 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 12:45:38.865193 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 12:45:38.872192 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 12:45:38.881918 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 12:45:38.891708 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 12:45:38.901315 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 12:45:38.910992 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 12:45:38.917765 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 12:45:38.927474 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 12:45:38.937772 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 12:45:38.947445 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 12:45:38.957642 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 12:45:38.957765 PCI: 00:02.0
1392 12:45:38.970663 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 12:45:38.980448 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 12:45:38.990377 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 12:45:38.990476 PCI: 00:04.0
1396 12:45:38.993988 PCI: 00:08.0
1397 12:45:39.003502 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 12:45:39.003592 PCI: 00:12.0
1399 12:45:39.013792 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 12:45:39.020073 PCI: 00:14.0 child on link 0 USB0 port 0
1401 12:45:39.030014 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 12:45:39.033380 USB0 port 0 child on link 0 USB2 port 0
1403 12:45:39.036531 USB2 port 0
1404 12:45:39.036618 USB2 port 1
1405 12:45:39.040231 USB2 port 2
1406 12:45:39.040333 USB2 port 3
1407 12:45:39.043407 USB2 port 5
1408 12:45:39.043493 USB2 port 6
1409 12:45:39.046749 USB2 port 9
1410 12:45:39.046834 USB3 port 0
1411 12:45:39.050025 USB3 port 1
1412 12:45:39.053366 USB3 port 2
1413 12:45:39.053451 USB3 port 3
1414 12:45:39.056453 USB3 port 4
1415 12:45:39.056538 PCI: 00:14.2
1416 12:45:39.066137 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 12:45:39.076328 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 12:45:39.079643 PCI: 00:14.3
1419 12:45:39.089506 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 12:45:39.092645 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 12:45:39.102752 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 12:45:39.105997 I2C: 01:15
1423 12:45:39.109367 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 12:45:39.119497 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 12:45:39.122709 I2C: 02:5d
1426 12:45:39.122787 GENERIC: 0.0
1427 12:45:39.125937 PCI: 00:16.0
1428 12:45:39.135723 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 12:45:39.135805 PCI: 00:17.0
1430 12:45:39.148922 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 12:45:39.158613 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 12:45:39.165183 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 12:45:39.175280 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 12:45:39.185015 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 12:45:39.195013 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 12:45:39.198293 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 12:45:39.208190 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 12:45:39.211404 I2C: 03:1a
1439 12:45:39.211487 I2C: 03:38
1440 12:45:39.214693 I2C: 03:39
1441 12:45:39.214784 I2C: 03:3a
1442 12:45:39.217984 I2C: 03:3b
1443 12:45:39.221534 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 12:45:39.231326 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 12:45:39.241069 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 12:45:39.251067 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 12:45:39.254273 PCI: 01:00.0
1448 12:45:39.264821 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 12:45:39.264912 PCI: 00:1e.0
1450 12:45:39.277535 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 12:45:39.287334 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 12:45:39.291124 PCI: 00:1e.2 child on link 0 SPI: 00
1453 12:45:39.301121 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 12:45:39.304193 SPI: 00
1455 12:45:39.307237 PCI: 00:1e.3 child on link 0 SPI: 01
1456 12:45:39.317003 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 12:45:39.317089 SPI: 01
1458 12:45:39.324021 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 12:45:39.330694 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 12:45:39.340812 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 12:45:39.340896 PNP: 0c09.0
1462 12:45:39.350471 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 12:45:39.353536 PCI: 00:1f.3
1464 12:45:39.363785 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 12:45:39.373360 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 12:45:39.373446 PCI: 00:1f.4
1467 12:45:39.383613 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 12:45:39.393328 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 12:45:39.396487 PCI: 00:1f.5
1470 12:45:39.406614 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 12:45:39.409671 Done allocating resources.
1472 12:45:39.412899 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 12:45:39.416157 Enabling resources...
1474 12:45:39.423069 PCI: 00:00.0 subsystem <- 8086/9b61
1475 12:45:39.423155 PCI: 00:00.0 cmd <- 06
1476 12:45:39.426171 PCI: 00:02.0 subsystem <- 8086/9b41
1477 12:45:39.429883 PCI: 00:02.0 cmd <- 03
1478 12:45:39.433113 PCI: 00:08.0 cmd <- 06
1479 12:45:39.436330 PCI: 00:12.0 subsystem <- 8086/02f9
1480 12:45:39.439704 PCI: 00:12.0 cmd <- 02
1481 12:45:39.442890 PCI: 00:14.0 subsystem <- 8086/02ed
1482 12:45:39.446057 PCI: 00:14.0 cmd <- 02
1483 12:45:39.446143 PCI: 00:14.2 cmd <- 02
1484 12:45:39.452932 PCI: 00:14.3 subsystem <- 8086/02f0
1485 12:45:39.453035 PCI: 00:14.3 cmd <- 02
1486 12:45:39.456201 PCI: 00:15.0 subsystem <- 8086/02e8
1487 12:45:39.459426 PCI: 00:15.0 cmd <- 02
1488 12:45:39.462791 PCI: 00:15.1 subsystem <- 8086/02e9
1489 12:45:39.466351 PCI: 00:15.1 cmd <- 02
1490 12:45:39.469703 PCI: 00:16.0 subsystem <- 8086/02e0
1491 12:45:39.472904 PCI: 00:16.0 cmd <- 02
1492 12:45:39.476125 PCI: 00:17.0 subsystem <- 8086/02d3
1493 12:45:39.479484 PCI: 00:17.0 cmd <- 03
1494 12:45:39.482790 PCI: 00:19.0 subsystem <- 8086/02c5
1495 12:45:39.486075 PCI: 00:19.0 cmd <- 02
1496 12:45:39.489368 PCI: 00:1d.0 bridge ctrl <- 0013
1497 12:45:39.492747 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 12:45:39.495800 PCI: 00:1d.0 cmd <- 06
1499 12:45:39.498806 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 12:45:39.502626 PCI: 00:1e.0 cmd <- 06
1501 12:45:39.505900 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 12:45:39.509066 PCI: 00:1e.2 cmd <- 06
1503 12:45:39.512235 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 12:45:39.512311 PCI: 00:1e.3 cmd <- 02
1505 12:45:39.519097 PCI: 00:1f.0 subsystem <- 8086/0284
1506 12:45:39.519177 PCI: 00:1f.0 cmd <- 407
1507 12:45:39.525490 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 12:45:39.525577 PCI: 00:1f.3 cmd <- 02
1509 12:45:39.528734 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 12:45:39.532010 PCI: 00:1f.4 cmd <- 03
1511 12:45:39.535218 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 12:45:39.538537 PCI: 00:1f.5 cmd <- 406
1513 12:45:39.547688 PCI: 01:00.0 cmd <- 02
1514 12:45:39.553053 done.
1515 12:45:39.564916 ME: Version: 14.0.39.1367
1516 12:45:39.571584 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1517 12:45:39.574802 Initializing devices...
1518 12:45:39.574887 Root Device init ...
1519 12:45:39.581651 Chrome EC: Set SMI mask to 0x0000000000000000
1520 12:45:39.584934 Chrome EC: clear events_b mask to 0x0000000000000000
1521 12:45:39.591543 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 12:45:39.598289 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 12:45:39.604742 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 12:45:39.608012 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 12:45:39.611169 Root Device init finished in 35208 usecs
1526 12:45:39.614954 CPU_CLUSTER: 0 init ...
1527 12:45:39.621292 CPU_CLUSTER: 0 init finished in 2440 usecs
1528 12:45:39.625653 PCI: 00:00.0 init ...
1529 12:45:39.629288 CPU TDP: 15 Watts
1530 12:45:39.632499 CPU PL2 = 64 Watts
1531 12:45:39.635821 PCI: 00:00.0 init finished in 7081 usecs
1532 12:45:39.639246 PCI: 00:02.0 init ...
1533 12:45:39.642337 PCI: 00:02.0 init finished in 2254 usecs
1534 12:45:39.645584 PCI: 00:08.0 init ...
1535 12:45:39.648862 PCI: 00:08.0 init finished in 2253 usecs
1536 12:45:39.652552 PCI: 00:12.0 init ...
1537 12:45:39.655776 PCI: 00:12.0 init finished in 2252 usecs
1538 12:45:39.658983 PCI: 00:14.0 init ...
1539 12:45:39.662209 PCI: 00:14.0 init finished in 2252 usecs
1540 12:45:39.665585 PCI: 00:14.2 init ...
1541 12:45:39.668638 PCI: 00:14.2 init finished in 2253 usecs
1542 12:45:39.672470 PCI: 00:14.3 init ...
1543 12:45:39.675746 PCI: 00:14.3 init finished in 2270 usecs
1544 12:45:39.678904 PCI: 00:15.0 init ...
1545 12:45:39.682070 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 12:45:39.685467 PCI: 00:15.0 init finished in 5977 usecs
1547 12:45:39.688869 PCI: 00:15.1 init ...
1548 12:45:39.692014 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 12:45:39.698445 PCI: 00:15.1 init finished in 5979 usecs
1550 12:45:39.698530 PCI: 00:16.0 init ...
1551 12:45:39.705179 PCI: 00:16.0 init finished in 2252 usecs
1552 12:45:39.708435 PCI: 00:19.0 init ...
1553 12:45:39.712129 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 12:45:39.715128 PCI: 00:19.0 init finished in 5977 usecs
1555 12:45:39.718489 PCI: 00:1d.0 init ...
1556 12:45:39.721827 Initializing PCH PCIe bridge.
1557 12:45:39.724879 PCI: 00:1d.0 init finished in 5284 usecs
1558 12:45:39.728129 PCI: 00:1f.0 init ...
1559 12:45:39.731902 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 12:45:39.738076 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 12:45:39.738161 IOAPIC: ID = 0x02
1562 12:45:39.741960 IOAPIC: Dumping registers
1563 12:45:39.745174 reg 0x0000: 0x02000000
1564 12:45:39.747836 reg 0x0001: 0x00770020
1565 12:45:39.747915 reg 0x0002: 0x00000000
1566 12:45:39.754833 PCI: 00:1f.0 init finished in 23551 usecs
1567 12:45:39.758075 PCI: 00:1f.4 init ...
1568 12:45:39.761390 PCI: 00:1f.4 init finished in 2262 usecs
1569 12:45:39.772095 PCI: 01:00.0 init ...
1570 12:45:39.775386 PCI: 01:00.0 init finished in 2253 usecs
1571 12:45:39.779552 PNP: 0c09.0 init ...
1572 12:45:39.782884 Google Chrome EC uptime: 11.092 seconds
1573 12:45:39.789437 Google Chrome AP resets since EC boot: 0
1574 12:45:39.792789 Google Chrome most recent AP reset causes:
1575 12:45:39.799284 Google Chrome EC reset flags at last EC boot: reset-pin
1576 12:45:39.802883 PNP: 0c09.0 init finished in 20573 usecs
1577 12:45:39.806078 Devices initialized
1578 12:45:39.806174 Show all devs... After init.
1579 12:45:39.809377 Root Device: enabled 1
1580 12:45:39.812513 CPU_CLUSTER: 0: enabled 1
1581 12:45:39.815810 DOMAIN: 0000: enabled 1
1582 12:45:39.815888 APIC: 00: enabled 1
1583 12:45:39.819305 PCI: 00:00.0: enabled 1
1584 12:45:39.822550 PCI: 00:02.0: enabled 1
1585 12:45:39.825828 PCI: 00:04.0: enabled 0
1586 12:45:39.825905 PCI: 00:05.0: enabled 0
1587 12:45:39.828970 PCI: 00:12.0: enabled 1
1588 12:45:39.832434 PCI: 00:12.5: enabled 0
1589 12:45:39.832554 PCI: 00:12.6: enabled 0
1590 12:45:39.836031 PCI: 00:14.0: enabled 1
1591 12:45:39.839585 PCI: 00:14.1: enabled 0
1592 12:45:39.842613 PCI: 00:14.3: enabled 1
1593 12:45:39.842690 PCI: 00:14.5: enabled 0
1594 12:45:39.845741 PCI: 00:15.0: enabled 1
1595 12:45:39.849064 PCI: 00:15.1: enabled 1
1596 12:45:39.852350 PCI: 00:15.2: enabled 0
1597 12:45:39.852427 PCI: 00:15.3: enabled 0
1598 12:45:39.855934 PCI: 00:16.0: enabled 1
1599 12:45:39.859132 PCI: 00:16.1: enabled 0
1600 12:45:39.862330 PCI: 00:16.2: enabled 0
1601 12:45:39.862412 PCI: 00:16.3: enabled 0
1602 12:45:39.865688 PCI: 00:16.4: enabled 0
1603 12:45:39.868956 PCI: 00:16.5: enabled 0
1604 12:45:39.872175 PCI: 00:17.0: enabled 1
1605 12:45:39.872248 PCI: 00:19.0: enabled 1
1606 12:45:39.875353 PCI: 00:19.1: enabled 0
1607 12:45:39.879072 PCI: 00:19.2: enabled 0
1608 12:45:39.879149 PCI: 00:1a.0: enabled 0
1609 12:45:39.882276 PCI: 00:1c.0: enabled 0
1610 12:45:39.885407 PCI: 00:1c.1: enabled 0
1611 12:45:39.888709 PCI: 00:1c.2: enabled 0
1612 12:45:39.888790 PCI: 00:1c.3: enabled 0
1613 12:45:39.892093 PCI: 00:1c.4: enabled 0
1614 12:45:39.895187 PCI: 00:1c.5: enabled 0
1615 12:45:39.898434 PCI: 00:1c.6: enabled 0
1616 12:45:39.898520 PCI: 00:1c.7: enabled 0
1617 12:45:39.902119 PCI: 00:1d.0: enabled 1
1618 12:45:39.905200 PCI: 00:1d.1: enabled 0
1619 12:45:39.908318 PCI: 00:1d.2: enabled 0
1620 12:45:39.908404 PCI: 00:1d.3: enabled 0
1621 12:45:39.912338 PCI: 00:1d.4: enabled 0
1622 12:45:39.915339 PCI: 00:1d.5: enabled 0
1623 12:45:39.915424 PCI: 00:1e.0: enabled 1
1624 12:45:39.918601 PCI: 00:1e.1: enabled 0
1625 12:45:39.921617 PCI: 00:1e.2: enabled 1
1626 12:45:39.925221 PCI: 00:1e.3: enabled 1
1627 12:45:39.925306 PCI: 00:1f.0: enabled 1
1628 12:45:39.928513 PCI: 00:1f.1: enabled 0
1629 12:45:39.931842 PCI: 00:1f.2: enabled 0
1630 12:45:39.935014 PCI: 00:1f.3: enabled 1
1631 12:45:39.935100 PCI: 00:1f.4: enabled 1
1632 12:45:39.938163 PCI: 00:1f.5: enabled 1
1633 12:45:39.941433 PCI: 00:1f.6: enabled 0
1634 12:45:39.944733 USB0 port 0: enabled 1
1635 12:45:39.944823 I2C: 01:15: enabled 1
1636 12:45:39.948478 I2C: 02:5d: enabled 1
1637 12:45:39.951914 GENERIC: 0.0: enabled 1
1638 12:45:39.952002 I2C: 03:1a: enabled 1
1639 12:45:39.954995 I2C: 03:38: enabled 1
1640 12:45:39.958284 I2C: 03:39: enabled 1
1641 12:45:39.958367 I2C: 03:3a: enabled 1
1642 12:45:39.961388 I2C: 03:3b: enabled 1
1643 12:45:39.965177 PCI: 00:00.0: enabled 1
1644 12:45:39.965257 SPI: 00: enabled 1
1645 12:45:39.968380 SPI: 01: enabled 1
1646 12:45:39.971691 PNP: 0c09.0: enabled 1
1647 12:45:39.971771 USB2 port 0: enabled 1
1648 12:45:39.974965 USB2 port 1: enabled 1
1649 12:45:39.978163 USB2 port 2: enabled 0
1650 12:45:39.978240 USB2 port 3: enabled 0
1651 12:45:39.981406 USB2 port 5: enabled 0
1652 12:45:39.984674 USB2 port 6: enabled 1
1653 12:45:39.987847 USB2 port 9: enabled 1
1654 12:45:39.987921 USB3 port 0: enabled 1
1655 12:45:39.991194 USB3 port 1: enabled 1
1656 12:45:39.994798 USB3 port 2: enabled 1
1657 12:45:39.994876 USB3 port 3: enabled 1
1658 12:45:39.998068 USB3 port 4: enabled 0
1659 12:45:40.001325 APIC: 03: enabled 1
1660 12:45:40.001404 APIC: 06: enabled 1
1661 12:45:40.004395 APIC: 01: enabled 1
1662 12:45:40.008105 APIC: 02: enabled 1
1663 12:45:40.008200 APIC: 05: enabled 1
1664 12:45:40.011185 APIC: 04: enabled 1
1665 12:45:40.011274 APIC: 07: enabled 1
1666 12:45:40.014447 PCI: 00:08.0: enabled 1
1667 12:45:40.017723 PCI: 00:14.2: enabled 1
1668 12:45:40.021099 PCI: 01:00.0: enabled 1
1669 12:45:40.024408 Disabling ACPI via APMC:
1670 12:45:40.024488 done.
1671 12:45:40.031451 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 12:45:40.034318 ELOG: NV offset 0xaf0000 size 0x4000
1673 12:45:40.041058 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 12:45:40.047549 ELOG: Event(17) added with size 13 at 2022-07-14 12:45:07 UTC
1675 12:45:40.054668 ELOG: Event(92) added with size 9 at 2022-07-14 12:45:07 UTC
1676 12:45:40.061422 ELOG: Event(93) added with size 9 at 2022-07-14 12:45:07 UTC
1677 12:45:40.067591 ELOG: Event(9A) added with size 9 at 2022-07-14 12:45:07 UTC
1678 12:45:40.074151 ELOG: Event(9E) added with size 10 at 2022-07-14 12:45:07 UTC
1679 12:45:40.081143 ELOG: Event(9F) added with size 14 at 2022-07-14 12:45:07 UTC
1680 12:45:40.084284 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1681 12:45:40.091424 ELOG: Event(A1) added with size 10 at 2022-07-14 12:45:07 UTC
1682 12:45:40.101235 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 12:45:40.108071 ELOG: Event(A0) added with size 9 at 2022-07-14 12:45:07 UTC
1684 12:45:40.111145 elog_add_boot_reason: Logged dev mode boot
1685 12:45:40.114253 Finalize devices...
1686 12:45:40.114342 PCI: 00:17.0 final
1687 12:45:40.117439 Devices finalized
1688 12:45:40.120653 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1689 12:45:40.127688 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1690 12:45:40.130656 ME: HFSTS1 : 0x90000245
1691 12:45:40.133906 ME: HFSTS2 : 0x3B850126
1692 12:45:40.140928 ME: HFSTS3 : 0x00000020
1693 12:45:40.144121 ME: HFSTS4 : 0x00004800
1694 12:45:40.147330 ME: HFSTS5 : 0x00000000
1695 12:45:40.150725 ME: HFSTS6 : 0x40400006
1696 12:45:40.153960 ME: Manufacturing Mode : NO
1697 12:45:40.157601 ME: FW Partition Table : OK
1698 12:45:40.160791 ME: Bringup Loader Failure : NO
1699 12:45:40.163791 ME: Firmware Init Complete : YES
1700 12:45:40.166963 ME: Boot Options Present : NO
1701 12:45:40.170657 ME: Update In Progress : NO
1702 12:45:40.173902 ME: D0i3 Support : YES
1703 12:45:40.177145 ME: Low Power State Enabled : NO
1704 12:45:40.180303 ME: CPU Replaced : NO
1705 12:45:40.183500 ME: CPU Replacement Valid : YES
1706 12:45:40.187228 ME: Current Working State : 5
1707 12:45:40.190399 ME: Current Operation State : 1
1708 12:45:40.193506 ME: Current Operation Mode : 0
1709 12:45:40.196749 ME: Error Code : 0
1710 12:45:40.200006 ME: CPU Debug Disabled : YES
1711 12:45:40.203284 ME: TXT Support : NO
1712 12:45:40.210241 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1713 12:45:40.216564 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 12:45:40.216646 CBFS @ c08000 size 3f8000
1715 12:45:40.223637 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 12:45:40.226735 CBFS: Locating 'fallback/dsdt.aml'
1717 12:45:40.230121 CBFS: Found @ offset 10bb80 size 3fa5
1718 12:45:40.236474 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1719 12:45:40.239879 CBFS @ c08000 size 3f8000
1720 12:45:40.246476 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1721 12:45:40.246565 CBFS: Locating 'fallback/slic'
1722 12:45:40.251930 CBFS: 'fallback/slic' not found.
1723 12:45:40.258573 ACPI: Writing ACPI tables at 99b3e000.
1724 12:45:40.258660 ACPI: * FACS
1725 12:45:40.261818 ACPI: * DSDT
1726 12:45:40.264962 Ramoops buffer: 0x100000@0x99a3d000.
1727 12:45:40.268353 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1728 12:45:40.275141 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1729 12:45:40.278393 Google Chrome EC: version:
1730 12:45:40.281760 ro: helios_v2.0.2659-56403530b
1731 12:45:40.285006 rw: helios_v2.0.2849-c41de27e7d
1732 12:45:40.285093 running image: 1
1733 12:45:40.289367 ACPI: * FADT
1734 12:45:40.289451 SCI is IRQ9
1735 12:45:40.295844 ACPI: added table 1/32, length now 40
1736 12:45:40.295938 ACPI: * SSDT
1737 12:45:40.299073 Found 1 CPU(s) with 8 core(s) each.
1738 12:45:40.302392 Error: Could not locate 'wifi_sar' in VPD.
1739 12:45:40.308979 Checking CBFS for default SAR values
1740 12:45:40.312572 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 12:45:40.315840 CBFS @ c08000 size 3f8000
1742 12:45:40.323126 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 12:45:40.325389 CBFS: Locating 'wifi_sar_defaults.hex'
1744 12:45:40.329100 CBFS: Found @ offset 5fac0 size 77
1745 12:45:40.332265 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1746 12:45:40.338740 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1747 12:45:40.341967 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1748 12:45:40.348916 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1749 12:45:40.352009 failed to find key in VPD: dsm_calib_r0_0
1750 12:45:40.361888 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1751 12:45:40.365100 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1752 12:45:40.368870 failed to find key in VPD: dsm_calib_r0_1
1753 12:45:40.378381 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1754 12:45:40.385497 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 12:45:40.388711 failed to find key in VPD: dsm_calib_r0_2
1756 12:45:40.398412 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 12:45:40.401574 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 12:45:40.408432 failed to find key in VPD: dsm_calib_r0_3
1759 12:45:40.414834 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 12:45:40.421776 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 12:45:40.424956 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 12:45:40.431372 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 12:45:40.435208 EC returned error result code 1
1764 12:45:40.438489 EC returned error result code 1
1765 12:45:40.441863 EC returned error result code 1
1766 12:45:40.445158 PS2K: Bad resp from EC. Vivaldi disabled!
1767 12:45:40.451775 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 12:45:40.458311 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 12:45:40.461624 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 12:45:40.468425 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 12:45:40.471702 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 12:45:40.478079 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 12:45:40.484663 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 12:45:40.491448 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1775 12:45:40.494734 ACPI: added table 2/32, length now 44
1776 12:45:40.494816 ACPI: * MCFG
1777 12:45:40.501520 ACPI: added table 3/32, length now 48
1778 12:45:40.501609 ACPI: * TPM2
1779 12:45:40.504783 TPM2 log created at 99a2d000
1780 12:45:40.507995 ACPI: added table 4/32, length now 52
1781 12:45:40.511322 ACPI: * MADT
1782 12:45:40.511423 SCI is IRQ9
1783 12:45:40.514541 ACPI: added table 5/32, length now 56
1784 12:45:40.517709 current = 99b43ac0
1785 12:45:40.517799 ACPI: * DMAR
1786 12:45:40.521419 ACPI: added table 6/32, length now 60
1787 12:45:40.524509 ACPI: * IGD OpRegion
1788 12:45:40.527698 GMA: Found VBT in CBFS
1789 12:45:40.530832 GMA: Found valid VBT in CBFS
1790 12:45:40.534297 ACPI: added table 7/32, length now 64
1791 12:45:40.534377 ACPI: * HPET
1792 12:45:40.537616 ACPI: added table 8/32, length now 68
1793 12:45:40.540965 ACPI: done.
1794 12:45:40.544226 ACPI tables: 31744 bytes.
1795 12:45:40.547958 smbios_write_tables: 99a2c000
1796 12:45:40.550836 EC returned error result code 3
1797 12:45:40.554540 Couldn't obtain OEM name from CBI
1798 12:45:40.554634 Create SMBIOS type 17
1799 12:45:40.557890 PCI: 00:00.0 (Intel Cannonlake)
1800 12:45:40.561111 PCI: 00:14.3 (Intel WiFi)
1801 12:45:40.564587 SMBIOS tables: 939 bytes.
1802 12:45:40.567698 Writing table forward entry at 0x00000500
1803 12:45:40.573938 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1804 12:45:40.577672 Writing coreboot table at 0x99b62000
1805 12:45:40.584095 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1806 12:45:40.587335 1. 0000000000001000-000000000009ffff: RAM
1807 12:45:40.593841 2. 00000000000a0000-00000000000fffff: RESERVED
1808 12:45:40.597574 3. 0000000000100000-0000000099a2bfff: RAM
1809 12:45:40.604056 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1810 12:45:40.607044 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1811 12:45:40.614116 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1812 12:45:40.620498 7. 000000009a000000-000000009f7fffff: RESERVED
1813 12:45:40.623701 8. 00000000e0000000-00000000efffffff: RESERVED
1814 12:45:40.626807 9. 00000000fc000000-00000000fc000fff: RESERVED
1815 12:45:40.633733 10. 00000000fe000000-00000000fe00ffff: RESERVED
1816 12:45:40.637149 11. 00000000fed10000-00000000fed17fff: RESERVED
1817 12:45:40.643399 12. 00000000fed80000-00000000fed83fff: RESERVED
1818 12:45:40.646625 13. 00000000fed90000-00000000fed91fff: RESERVED
1819 12:45:40.653407 14. 00000000feda0000-00000000feda1fff: RESERVED
1820 12:45:40.656653 15. 0000000100000000-000000045e7fffff: RAM
1821 12:45:40.660620 Graphics framebuffer located at 0xc0000000
1822 12:45:40.663552 Passing 5 GPIOs to payload:
1823 12:45:40.670204 NAME | PORT | POLARITY | VALUE
1824 12:45:40.673269 write protect | undefined | high | low
1825 12:45:40.679754 lid | undefined | high | high
1826 12:45:40.683578 power | undefined | high | low
1827 12:45:40.689853 oprom | undefined | high | low
1828 12:45:40.696423 EC in RW | 0x000000cb | high | low
1829 12:45:40.696559 Board ID: 4
1830 12:45:40.703482 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1831 12:45:40.703564 CBFS @ c08000 size 3f8000
1832 12:45:40.709923 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1833 12:45:40.716409 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b60
1834 12:45:40.719631 coreboot table: 1492 bytes.
1835 12:45:40.723338 IMD ROOT 0. 99fff000 00001000
1836 12:45:40.726421 IMD SMALL 1. 99ffe000 00001000
1837 12:45:40.729893 FSP MEMORY 2. 99c4e000 003b0000
1838 12:45:40.733328 CONSOLE 3. 99c2e000 00020000
1839 12:45:40.736383 FMAP 4. 99c2d000 0000054e
1840 12:45:40.739691 TIME STAMP 5. 99c2c000 00000910
1841 12:45:40.742880 VBOOT WORK 6. 99c18000 00014000
1842 12:45:40.746129 MRC DATA 7. 99c16000 00001958
1843 12:45:40.749380 ROMSTG STCK 8. 99c15000 00001000
1844 12:45:40.753213 AFTER CAR 9. 99c0b000 0000a000
1845 12:45:40.756103 RAMSTAGE 10. 99baf000 0005c000
1846 12:45:40.759790 REFCODE 11. 99b7a000 00035000
1847 12:45:40.763076 SMM BACKUP 12. 99b6a000 00010000
1848 12:45:40.766301 COREBOOT 13. 99b62000 00008000
1849 12:45:40.769474 ACPI 14. 99b3e000 00024000
1850 12:45:40.772735 ACPI GNVS 15. 99b3d000 00001000
1851 12:45:40.775976 RAMOOPS 16. 99a3d000 00100000
1852 12:45:40.779165 TPM2 TCGLOG17. 99a2d000 00010000
1853 12:45:40.783035 SMBIOS 18. 99a2c000 00000800
1854 12:45:40.783129 IMD small region:
1855 12:45:40.786128 IMD ROOT 0. 99ffec00 00000400
1856 12:45:40.792725 FSP RUNTIME 1. 99ffebe0 00000004
1857 12:45:40.796040 EC HOSTEVENT 2. 99ffebc0 00000008
1858 12:45:40.799247 POWER STATE 3. 99ffeb80 00000040
1859 12:45:40.802624 ROMSTAGE 4. 99ffeb60 00000004
1860 12:45:40.805642 MEM INFO 5. 99ffe9a0 000001b9
1861 12:45:40.808890 VPD 6. 99ffe960 00000036
1862 12:45:40.812175 MTRR: Physical address space:
1863 12:45:40.819245 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1864 12:45:40.825620 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1865 12:45:40.831946 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1866 12:45:40.835727 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1867 12:45:40.842003 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1868 12:45:40.848426 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1869 12:45:40.855478 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1870 12:45:40.858481 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 12:45:40.865254 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 12:45:40.868386 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 12:45:40.871724 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 12:45:40.875122 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 12:45:40.878734 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 12:45:40.885080 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 12:45:40.888278 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 12:45:40.891470 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 12:45:40.894671 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 12:45:40.901519 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 12:45:40.904792 call enable_fixed_mtrr()
1882 12:45:40.907795 CPU physical address size: 39 bits
1883 12:45:40.911119 MTRR: default type WB/UC MTRR counts: 6/8.
1884 12:45:40.914378 MTRR: WB selected as default type.
1885 12:45:40.920975 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1886 12:45:40.927979 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1887 12:45:40.934310 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1888 12:45:40.941222 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1889 12:45:40.947816 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1890 12:45:40.954397 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1891 12:45:40.957636 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 12:45:40.960417 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 12:45:40.967500 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 12:45:40.970807 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 12:45:40.974217 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 12:45:40.977288 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 12:45:40.980419 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 12:45:40.986994 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 12:45:40.990764 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 12:45:40.993856 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 12:45:40.996966 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 12:45:40.997056
1903 12:45:41.000229 MTRR check
1904 12:45:41.003427 call enable_fixed_mtrr()
1905 12:45:41.003499 Fixed MTRRs : Enabled
1906 12:45:41.007207 Variable MTRRs: Enabled
1907 12:45:41.007281
1908 12:45:41.010346 CPU physical address size: 39 bits
1909 12:45:41.016429 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1910 12:45:41.020409 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 12:45:41.026640 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 12:45:41.029902 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 12:45:41.033160 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 12:45:41.036311 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 12:45:41.039499 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 12:45:41.046357 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 12:45:41.049508 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 12:45:41.052812 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 12:45:41.056054 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 12:45:41.062792 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 12:45:41.065992 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 12:45:41.069542 call enable_fixed_mtrr()
1923 12:45:41.072663 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 12:45:41.075954 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 12:45:41.079436 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 12:45:41.086237 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 12:45:41.089660 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 12:45:41.092870 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 12:45:41.096012 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 12:45:41.102553 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 12:45:41.105718 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 12:45:41.108996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 12:45:41.112258 CPU physical address size: 39 bits
1934 12:45:41.116042 call enable_fixed_mtrr()
1935 12:45:41.119216 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 12:45:41.125864 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 12:45:41.129534 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 12:45:41.132831 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 12:45:41.135990 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 12:45:41.139085 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 12:45:41.145796 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 12:45:41.148963 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 12:45:41.152821 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 12:45:41.155551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 12:45:41.162633 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 12:45:41.165709 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 12:45:41.168867 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 12:45:41.175292 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 12:45:41.178626 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 12:45:41.181890 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 12:45:41.185105 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 12:45:41.188894 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 12:45:41.195207 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 12:45:41.198534 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 12:45:41.201775 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 12:45:41.205173 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 12:45:41.208286 call enable_fixed_mtrr()
1958 12:45:41.212070 call enable_fixed_mtrr()
1959 12:45:41.215348 CPU physical address size: 39 bits
1960 12:45:41.218561 CPU physical address size: 39 bits
1961 12:45:41.221823 CPU physical address size: 39 bits
1962 12:45:41.228544 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 12:45:41.231749 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 12:45:41.235093 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 12:45:41.238086 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 12:45:41.241889 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 12:45:41.248224 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 12:45:41.251439 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 12:45:41.254618 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 12:45:41.258352 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 12:45:41.264738 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 12:45:41.268072 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 12:45:41.271507 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 12:45:41.274856 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 12:45:41.278046 call enable_fixed_mtrr()
1976 12:45:41.281356 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 12:45:41.287864 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 12:45:41.291056 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 12:45:41.294261 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 12:45:41.297919 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 12:45:41.304319 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 12:45:41.307572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 12:45:41.310909 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 12:45:41.314133 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 12:45:41.320578 CPU physical address size: 39 bits
1986 12:45:41.320666 call enable_fixed_mtrr()
1987 12:45:41.327074 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1988 12:45:41.330893 CPU physical address size: 39 bits
1989 12:45:41.333939 CBFS @ c08000 size 3f8000
1990 12:45:41.340359 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1991 12:45:41.343709 CBFS: Locating 'fallback/payload'
1992 12:45:41.347227 CBFS: Found @ offset 1c96c0 size 3f798
1993 12:45:41.350459 Checking segment from ROM address 0xffdd16f8
1994 12:45:41.356753 Checking segment from ROM address 0xffdd1714
1995 12:45:41.360573 Loading segment from ROM address 0xffdd16f8
1996 12:45:41.363657 code (compression=0)
1997 12:45:41.370607 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1998 12:45:41.380474 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1999 12:45:41.383163 it's not compressed!
2000 12:45:41.474652 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2001 12:45:41.481122 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2002 12:45:41.484292 Loading segment from ROM address 0xffdd1714
2003 12:45:41.487497 Entry Point 0x30000000
2004 12:45:41.490769 Loaded segments
2005 12:45:41.496583 Finalizing chipset.
2006 12:45:41.499880 Finalizing SMM.
2007 12:45:41.503024 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2008 12:45:41.506313 mp_park_aps done after 0 msecs.
2009 12:45:41.513288 Jumping to boot code at 30000000(99b62000)
2010 12:45:41.519583 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2011 12:45:41.519690
2012 12:45:41.522810 Starting depthcharge on Helios...
2013 12:45:41.523169 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2014 12:45:41.523285 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2015 12:45:41.523434 Setting prompt string to ['hatch:']
2016 12:45:41.523515 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2017 12:45:41.532626 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2018 12:45:41.539597 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2019 12:45:41.545945 board_setup: Info: eMMC controller not present; skipping
2020 12:45:41.549200 New NVMe Controller 0x30053ac0 @ 00:1d:00
2021 12:45:41.556041 board_setup: Info: SDHCI controller not present; skipping
2022 12:45:41.562363 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 12:45:41.562454 Wipe memory regions:
2024 12:45:41.565741 [0x00000000001000, 0x000000000a0000)
2025 12:45:41.572395 [0x00000000100000, 0x00000030000000)
2026 12:45:41.638941 [0x00000030657430, 0x00000099a2c000)
2027 12:45:41.779369 [0x00000100000000, 0x0000045e800000)
2028 12:45:43.161412 R8152: Initializing
2029 12:45:43.165160 Version 9 (ocp_data = 6010)
2030 12:45:43.169325 R8152: Done initializing
2031 12:45:43.172383 Adding net device
2032 12:45:43.669433 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2033 12:45:43.669573
2034 12:45:43.669859 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2036 12:45:43.770637 hatch: tftpboot 192.168.201.1 6819454/tftp-deploy-t3q46dv7/kernel/bzImage 6819454/tftp-deploy-t3q46dv7/kernel/cmdline 6819454/tftp-deploy-t3q46dv7/ramdisk/ramdisk.cpio.gz
2037 12:45:43.770796 Setting prompt string to ['Starting kernel']
2038 12:45:43.770869 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2039 12:45:43.770941 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
2040 12:45:43.775208 tftpboot 192.168.201.1 6819454/tftp-deploy-t3q46dv7/kernel/bzImoy-t3q46dv7/kernel/cmdline 6819454/tftp-deploy-t3q46dv7/ramdisk/ramdisk.cpio.gz
2041 12:45:43.775294 Waiting for link
2042 12:45:43.976300 done.
2043 12:45:43.976438 MAC: f4:f5:e8:50:dc:f7
2044 12:45:43.979607 Sending DHCP discover... done.
2045 12:45:43.982942 Waiting for reply... done.
2046 12:45:43.986505 Sending DHCP request... done.
2047 12:45:43.989395 Waiting for reply... done.
2048 12:45:43.993061 My ip is 192.168.201.10
2049 12:45:43.996312 The DHCP server ip is 192.168.201.1
2050 12:45:44.002763 TFTP server IP predefined by user: 192.168.201.1
2051 12:45:44.009358 Bootfile predefined by user: 6819454/tftp-deploy-t3q46dv7/kernel/bzImage
2052 12:45:44.012536 Sending tftp read request... done.
2053 12:45:44.015833 Waiting for the transfer...
2054 12:45:44.259747 00000000 ################################################################
2055 12:45:44.504717 00080000 ################################################################
2056 12:45:44.756191 00100000 ################################################################
2057 12:45:45.000457 00180000 ################################################################
2058 12:45:45.244891 00200000 ################################################################
2059 12:45:45.483476 00280000 ################################################################
2060 12:45:45.742003 00300000 ################################################################
2061 12:45:45.983811 00380000 ################################################################
2062 12:45:46.225125 00400000 ################################################################
2063 12:45:46.478497 00480000 ################################################################
2064 12:45:46.729127 00500000 ################################################################
2065 12:45:46.978559 00580000 ################################################################
2066 12:45:47.215918 00600000 ################################################################ done.
2067 12:45:47.219060 The bootfile was 6811536 bytes long.
2068 12:45:47.222657 Sending tftp read request... done.
2069 12:45:47.225829 Waiting for the transfer...
2070 12:45:47.467326 00000000 ################################################################
2071 12:45:47.704755 00080000 ################################################################
2072 12:45:47.945174 00100000 ################################################################
2073 12:45:48.188432 00180000 ################################################################
2074 12:45:48.431627 00200000 ################################################################
2075 12:45:48.674942 00280000 ################################################################
2076 12:45:48.919940 00300000 ################################################################
2077 12:45:49.175471 00380000 ################################################################
2078 12:45:49.430966 00400000 ################################################################
2079 12:45:49.682370 00480000 ################################################################
2080 12:45:49.789342 00500000 ############################# done.
2081 12:45:49.792426 Sending tftp read request... done.
2082 12:45:49.795679 Waiting for the transfer...
2083 12:45:49.795776 00000000 # done.
2084 12:45:49.805518 Command line loaded dynamically from TFTP file: 6819454/tftp-deploy-t3q46dv7/kernel/cmdline
2085 12:45:49.828486 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819454/extract-nfsrootfs-dguvbfgy,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2086 12:45:49.835337 ec_init(0): CrosEC protocol v3 supported (256, 256)
2087 12:45:49.838552 Shutting down all USB controllers.
2088 12:45:49.841564 Removing current net device
2089 12:45:49.845915 Finalizing coreboot
2090 12:45:49.852210 Exiting depthcharge with code 4 at timestamp: 15591782
2091 12:45:49.852293
2092 12:45:49.852368 Starting kernel ...
2093 12:45:49.852431
2094 12:45:49.852491
2095 12:45:49.852790 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2096 12:45:49.852912 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2097 12:45:49.852999 Setting prompt string to ['Linux version [0-9]']
2098 12:45:49.853069 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2099 12:45:49.853153 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2101 12:50:22.853918 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2103 12:50:22.855092 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2105 12:50:22.855965 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2108 12:50:22.857480 end: 2 depthcharge-action (duration 00:05:00) [common]
2110 12:50:22.858285 Cleaning after the job
2111 12:50:22.858368 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/ramdisk
2112 12:50:22.858851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/kernel
2113 12:50:22.859361 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/nfsrootfs
2114 12:50:22.898208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819454/tftp-deploy-t3q46dv7/modules
2115 12:50:22.898512 start: 4.1 power-off (timeout 00:00:30) [common]
2116 12:50:22.898679 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2117 12:50:22.917844 >> Command sent successfully.
2118 12:50:22.919566 Returned 0 in 0 seconds
2119 12:50:23.020910 end: 4.1 power-off (duration 00:00:00) [common]
2121 12:50:23.022588 start: 4.2 read-feedback (timeout 00:10:00) [common]
2122 12:50:23.023737 Listened to connection for namespace 'common' for up to 1s
2123 12:50:23.298459 Listened to connection for namespace 'common' for up to 1s
2124 12:50:23.301616 Listened to connection for namespace 'common' for up to 1s
2125 12:50:23.304975 Listened to connection for namespace 'common' for up to 1s
2126 12:50:23.308902 Listened to connection for namespace 'common' for up to 1s
2127 12:50:23.312026 Listened to connection for namespace 'common' for up to 1s
2128 12:50:23.314948 Listened to connection for namespace 'common' for up to 1s
2129 12:50:23.318513 Listened to connection for namespace 'common' for up to 1s
2130 12:50:23.321760 Listened to connection for namespace 'common' for up to 1s
2131 12:50:23.325271 Listened to connection for namespace 'common' for up to 1s
2132 12:50:23.328880 Listened to connection for namespace 'common' for up to 1s
2133 12:50:23.332188 Listened to connection for namespace 'common' for up to 1s
2134 12:50:23.334968 Listened to connection for namespace 'common' for up to 1s
2135 12:50:23.338479 Listened to connection for namespace 'common' for up to 1s
2136 12:50:23.342003 Listened to connection for namespace 'common' for up to 1s
2137 12:50:23.346795 Listened to connection for namespace 'common' for up to 1s
2138 12:50:23.350605 Listened to connection for namespace 'common' for up to 1s
2139 12:50:24.025268 Finalising connection for namespace 'common'
2140 12:50:24.025969 Disconnecting from shell: Finalise
2141 12:50:24.026406
2142 12:50:24.127902 end: 4.2 read-feedback (duration 00:00:01) [common]
2143 12:50:24.128552 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819454
2144 12:50:24.297475 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819454
2145 12:50:24.297685 JobError: Your job cannot terminate cleanly.