Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:45:17.339269 lava-dispatcher, installed at version: 2022.04
2 12:45:17.339468 start: 0 validate
3 12:45:17.339617 Start time: 2022-07-14 12:45:17.339609+00:00 (UTC)
4 12:45:17.339760 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:45:17.339909 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:45:17.631284 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:45:17.631469 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:45:17.924227 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:45:17.924393 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:45:18.209171 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:45:18.209343 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:45:18.501957 validate duration: 1.16
14 12:45:18.502288 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:45:18.502405 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:45:18.502511 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:45:18.502629 Not decompressing ramdisk as can be used compressed.
18 12:45:18.502727 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220708.0/amd64/initrd.cpio.gz
19 12:45:18.502802 saving as /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/ramdisk/initrd.cpio.gz
20 12:45:18.502872 total size: 5411082 (5MB)
21 12:45:18.504105 progress 0% (0MB)
22 12:45:18.505824 progress 5% (0MB)
23 12:45:18.507316 progress 10% (0MB)
24 12:45:18.508862 progress 15% (0MB)
25 12:45:18.510490 progress 20% (1MB)
26 12:45:18.511975 progress 25% (1MB)
27 12:45:18.513432 progress 30% (1MB)
28 12:45:18.514921 progress 35% (1MB)
29 12:45:18.516538 progress 40% (2MB)
30 12:45:18.518018 progress 45% (2MB)
31 12:45:18.519554 progress 50% (2MB)
32 12:45:18.520958 progress 55% (2MB)
33 12:45:18.522565 progress 60% (3MB)
34 12:45:18.523969 progress 65% (3MB)
35 12:45:18.525419 progress 70% (3MB)
36 12:45:18.526864 progress 75% (3MB)
37 12:45:18.528437 progress 80% (4MB)
38 12:45:18.529957 progress 85% (4MB)
39 12:45:18.531368 progress 90% (4MB)
40 12:45:18.532771 progress 95% (4MB)
41 12:45:18.534397 progress 100% (5MB)
42 12:45:18.534586 5MB downloaded in 0.03s (162.74MB/s)
43 12:45:18.534746 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:45:18.535018 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:45:18.535117 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:45:18.535213 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:45:18.535326 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:45:18.535402 saving as /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/kernel/bzImage
50 12:45:18.535486 total size: 6811536 (6MB)
51 12:45:18.535567 No compression specified
52 12:45:18.536731 progress 0% (0MB)
53 12:45:18.538743 progress 5% (0MB)
54 12:45:18.540564 progress 10% (0MB)
55 12:45:18.542560 progress 15% (1MB)
56 12:45:18.544376 progress 20% (1MB)
57 12:45:18.546183 progress 25% (1MB)
58 12:45:18.548122 progress 30% (1MB)
59 12:45:18.549920 progress 35% (2MB)
60 12:45:18.551820 progress 40% (2MB)
61 12:45:18.553591 progress 45% (2MB)
62 12:45:18.555366 progress 50% (3MB)
63 12:45:18.557310 progress 55% (3MB)
64 12:45:18.559043 progress 60% (3MB)
65 12:45:18.560943 progress 65% (4MB)
66 12:45:18.562758 progress 70% (4MB)
67 12:45:18.564531 progress 75% (4MB)
68 12:45:18.566546 progress 80% (5MB)
69 12:45:18.568358 progress 85% (5MB)
70 12:45:18.570462 progress 90% (5MB)
71 12:45:18.572261 progress 95% (6MB)
72 12:45:18.574084 progress 100% (6MB)
73 12:45:18.574383 6MB downloaded in 0.04s (167.02MB/s)
74 12:45:18.574551 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:45:18.574820 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:45:18.574923 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:45:18.575023 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:45:18.575140 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220708.0/amd64/full.rootfs.tar.xz
80 12:45:18.575217 saving as /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/nfsrootfs/full.rootfs.tar
81 12:45:18.575287 total size: 122473712 (116MB)
82 12:45:18.575357 Using unxz to decompress xz
83 12:45:18.578900 progress 0% (0MB)
84 12:45:19.056061 progress 5% (5MB)
85 12:45:19.546531 progress 10% (11MB)
86 12:45:20.041518 progress 15% (17MB)
87 12:45:20.542228 progress 20% (23MB)
88 12:45:20.889012 progress 25% (29MB)
89 12:45:21.257625 progress 30% (35MB)
90 12:45:21.524669 progress 35% (40MB)
91 12:45:21.743964 progress 40% (46MB)
92 12:45:22.118960 progress 45% (52MB)
93 12:45:22.507558 progress 50% (58MB)
94 12:45:22.871581 progress 55% (64MB)
95 12:45:23.251506 progress 60% (70MB)
96 12:45:23.610179 progress 65% (75MB)
97 12:45:24.020074 progress 70% (81MB)
98 12:45:24.464972 progress 75% (87MB)
99 12:45:24.909783 progress 80% (93MB)
100 12:45:25.031406 progress 85% (99MB)
101 12:45:25.210037 progress 90% (105MB)
102 12:45:25.566590 progress 95% (110MB)
103 12:45:25.965175 progress 100% (116MB)
104 12:45:25.971639 116MB downloaded in 7.40s (15.79MB/s)
105 12:45:25.971921 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:45:25.972230 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:45:25.972338 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:45:25.972440 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:45:25.972573 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:45:25.972657 saving as /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/modules/modules.tar
112 12:45:25.972728 total size: 51960 (0MB)
113 12:45:25.972809 Using unxz to decompress xz
114 12:45:25.976275 progress 63% (0MB)
115 12:45:25.976695 progress 100% (0MB)
116 12:45:25.980281 0MB downloaded in 0.01s (6.57MB/s)
117 12:45:25.980529 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:45:25.980838 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:45:25.980948 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:45:25.981067 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:45:27.850682 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819487/extract-nfsrootfs-rjsvy8bi
123 12:45:27.850928 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:45:27.851042 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:45:27.851188 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7
126 12:45:27.851298 makedir: /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin
127 12:45:27.851389 makedir: /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/tests
128 12:45:27.851478 makedir: /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/results
129 12:45:27.851582 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-add-keys
130 12:45:27.851719 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-add-sources
131 12:45:27.851843 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-background-process-start
132 12:45:27.851965 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-background-process-stop
133 12:45:27.852084 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-common-functions
134 12:45:27.852202 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-echo-ipv4
135 12:45:27.852320 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-install-packages
136 12:45:27.852440 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-installed-packages
137 12:45:27.852556 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-os-build
138 12:45:27.852672 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-probe-channel
139 12:45:27.852787 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-probe-ip
140 12:45:27.852902 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-target-ip
141 12:45:27.853018 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-target-mac
142 12:45:27.853142 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-target-storage
143 12:45:27.853260 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-case
144 12:45:27.853379 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-event
145 12:45:27.853495 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-feedback
146 12:45:27.853610 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-raise
147 12:45:27.853724 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-reference
148 12:45:27.853839 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-runner
149 12:45:27.853955 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-set
150 12:45:27.854069 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-test-shell
151 12:45:27.854185 Updating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-install-packages (oe)
152 12:45:27.854306 Updating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/bin/lava-installed-packages (oe)
153 12:45:27.854409 Creating /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/environment
154 12:45:27.854499 LAVA metadata
155 12:45:27.854597 - LAVA_JOB_ID=6819487
156 12:45:27.854666 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:45:27.854771 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:45:27.854840 skipped lava-vland-overlay
159 12:45:27.854921 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:45:27.855008 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:45:27.855074 skipped lava-multinode-overlay
162 12:45:27.855152 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:45:27.855239 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:45:27.855314 Loading test definitions
165 12:45:27.855409 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 12:45:27.855487 Using /lava-6819487 at stage 0
167 12:45:27.855590 Fetching tests from https://github.com/kernelci/test-definitions
168 12:45:27.855675 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/0/tests/0_ltp-ipc'
169 12:45:33.309998 Running '/usr/bin/git checkout kernelci.org
170 12:45:33.457127 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 12:45:33.457948 uuid=6819487_1.5.2.3.1 testdef=None
172 12:45:33.458139 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
174 12:45:33.458452 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 12:45:33.459329 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:45:33.459641 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 12:45:33.460742 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:45:33.461058 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 12:45:33.462122 runner path: /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/0/tests/0_ltp-ipc test_uuid 6819487_1.5.2.3.1
182 12:45:33.462233 SKIPFILE='skipfile-lkft.yaml'
183 12:45:33.462321 SKIP_INSTALL='true'
184 12:45:33.462411 TST_CMDFILES='ipc'
185 12:45:33.462595 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 12:45:33.462865 Creating lava-test-runner.conf files
188 12:45:33.462956 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819487/lava-overlay-1i_8qlg7/lava-6819487/0 for stage 0
189 12:45:33.463075 - 0_ltp-ipc
190 12:45:33.463202 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
191 12:45:33.463319 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
192 12:45:41.692749 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 12:45:41.692916 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
194 12:45:41.693025 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 12:45:41.693149 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 12:45:41.693253 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
197 12:45:41.806565 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 12:45:41.806926 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
199 12:45:41.807056 extracting modules file /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819487/extract-nfsrootfs-rjsvy8bi
200 12:45:41.811464 extracting modules file /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819487/extract-overlay-ramdisk-bjdr931t/ramdisk
201 12:45:41.815607 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 12:45:41.815733 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
203 12:45:41.815831 [common] Applying overlay to NFS
204 12:45:41.815918 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819487/compress-overlay-botm04_q/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819487/extract-nfsrootfs-rjsvy8bi
205 12:45:42.301371 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 12:45:42.301549 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
207 12:45:42.301659 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 12:45:42.301758 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
209 12:45:42.301852 Building ramdisk /var/lib/lava/dispatcher/tmp/6819487/extract-overlay-ramdisk-bjdr931t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819487/extract-overlay-ramdisk-bjdr931t/ramdisk
210 12:45:42.338905 >> 24434 blocks
211 12:45:42.857980 rename /var/lib/lava/dispatcher/tmp/6819487/extract-overlay-ramdisk-bjdr931t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/ramdisk/ramdisk.cpio.gz
212 12:45:42.858416 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 12:45:42.858551 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
214 12:45:42.858680 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
215 12:45:42.858787 No mkimage arch provided, not using FIT.
216 12:45:42.858892 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 12:45:42.858986 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 12:45:42.859098 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
219 12:45:42.859203 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
220 12:45:42.859289 No LXC device requested
221 12:45:42.859383 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 12:45:42.859480 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
223 12:45:42.859576 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 12:45:42.859654 Checking files for TFTP limit of 4294967296 bytes.
225 12:45:42.860084 end: 1 tftp-deploy (duration 00:00:24) [common]
226 12:45:42.860202 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 12:45:42.860308 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 12:45:42.860451 substitutions:
229 12:45:42.860529 - {DTB}: None
230 12:45:42.860602 - {INITRD}: 6819487/tftp-deploy-6m8jmv5x/ramdisk/ramdisk.cpio.gz
231 12:45:42.860671 - {KERNEL}: 6819487/tftp-deploy-6m8jmv5x/kernel/bzImage
232 12:45:42.860737 - {LAVA_MAC}: None
233 12:45:42.860802 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819487/extract-nfsrootfs-rjsvy8bi
234 12:45:42.860868 - {NFS_SERVER_IP}: 192.168.201.1
235 12:45:42.860931 - {PRESEED_CONFIG}: None
236 12:45:42.860996 - {PRESEED_LOCAL}: None
237 12:45:42.861059 - {RAMDISK}: 6819487/tftp-deploy-6m8jmv5x/ramdisk/ramdisk.cpio.gz
238 12:45:42.861130 - {ROOT_PART}: None
239 12:45:42.861205 - {ROOT}: None
240 12:45:42.861266 - {SERVER_IP}: 192.168.201.1
241 12:45:42.861326 - {TEE}: None
242 12:45:42.861387 Parsed boot commands:
243 12:45:42.861447 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 12:45:42.861613 Parsed boot commands: tftpboot 192.168.201.1 6819487/tftp-deploy-6m8jmv5x/kernel/bzImage 6819487/tftp-deploy-6m8jmv5x/kernel/cmdline 6819487/tftp-deploy-6m8jmv5x/ramdisk/ramdisk.cpio.gz
245 12:45:42.861745 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 12:45:42.861842 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 12:45:42.861944 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 12:45:42.862042 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 12:45:42.862119 Not connected, no need to disconnect.
250 12:45:42.862204 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 12:45:42.862293 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 12:45:42.862398 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
253 12:45:42.865413 Setting prompt string to ['lava-test: # ']
254 12:45:42.865735 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 12:45:42.865849 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 12:45:42.865956 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 12:45:42.866120 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 12:45:42.866319 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
259 12:45:42.887389 >> Command sent successfully.
260 12:45:42.889507 Returned 0 in 0 seconds
261 12:45:42.990579 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 12:45:42.991589 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 12:45:42.991967 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 12:45:42.992297 Setting prompt string to 'Starting depthcharge on Voema...'
266 12:45:42.992561 Changing prompt to 'Starting depthcharge on Voema...'
267 12:45:42.992822 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 12:45:42.993728 [Enter `^Ec?' for help]
269 12:45:50.784173
270 12:45:50.784354
271 12:45:50.794123 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 12:45:50.797508 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 12:45:50.804143 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 12:45:50.807670 CPU: AES supported, TXT NOT supported, VT supported
275 12:45:50.814201 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 12:45:50.820803 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 12:45:50.823963 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 12:45:50.827579 VBOOT: Loading verstage.
279 12:45:50.831018 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
280 12:45:50.837575 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 12:45:50.840644 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 12:45:50.851149 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 12:45:50.857757 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 12:45:50.857848
285 12:45:50.857928
286 12:45:50.871317 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 12:45:50.885036 Probing TPM: . done!
288 12:45:50.888489 TPM ready after 0 ms
289 12:45:50.891753 Connected to device vid:did:rid of 1ae0:0028:00
290 12:45:50.902596 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
291 12:45:50.909334 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 12:45:50.913519 Initialized TPM device CR50 revision 0
293 12:45:50.964267 tlcl_send_startup: Startup return code is 0
294 12:45:50.964371 TPM: setup succeeded
295 12:45:50.979757 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 12:45:50.994018 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 12:45:51.006783 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 12:45:51.016786 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 12:45:51.020335 Chrome EC: UHEPI supported
300 12:45:51.024142 Phase 1
301 12:45:51.027010 FMAP: area GBB found @ 1805000 (458752 bytes)
302 12:45:51.037082 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 12:45:51.043688 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 12:45:51.050164 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 12:45:51.056711 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 12:45:51.060151 Recovery requested (1009000e)
307 12:45:51.063738 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 12:45:51.075197 tlcl_extend: response is 0
309 12:45:51.081549 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 12:45:51.091306 tlcl_extend: response is 0
311 12:45:51.098164 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 12:45:51.104973 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 12:45:51.111653 BS: verstage times (exec / console): total (unknown) / 142 ms
314 12:45:51.111738
315 12:45:51.111816
316 12:45:51.124616 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 12:45:51.131341 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 12:45:51.134542 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 12:45:51.138090 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 12:45:51.145024 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 12:45:51.147747 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 12:45:51.150992 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 12:45:51.154391 TCO_STS: 0000 0000
324 12:45:51.158094 GEN_PMCON: d0015038 00002200
325 12:45:51.160954 GBLRST_CAUSE: 00000000 00000000
326 12:45:51.161057 HPR_CAUSE0: 00000000
327 12:45:51.164676 prev_sleep_state 5
328 12:45:51.167761 Boot Count incremented to 8308
329 12:45:51.174595 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 12:45:51.181243 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 12:45:51.187802 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 12:45:51.194065 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 12:45:51.198883 Chrome EC: UHEPI supported
334 12:45:51.205943 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 12:45:51.218157 Probing TPM: done!
336 12:45:51.224844 Connected to device vid:did:rid of 1ae0:0028:00
337 12:45:51.235598 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
338 12:45:51.244907 Initialized TPM device CR50 revision 0
339 12:45:51.254739 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 12:45:51.261038 MRC: Hash idx 0x100b comparison successful.
341 12:45:51.264530 MRC cache found, size faa8
342 12:45:51.264624 bootmode is set to: 2
343 12:45:51.268324 SPD index = 0
344 12:45:51.274414 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 12:45:51.277682 SPD: module type is LPDDR4X
346 12:45:51.281003 SPD: module part number is MT53E512M64D4NW-046
347 12:45:51.288029 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 12:45:51.290972 SPD: device width 16 bits, bus width 16 bits
349 12:45:51.297872 SPD: module size is 1024 MB (per channel)
350 12:45:51.730291 CBMEM:
351 12:45:51.733806 IMD: root @ 0x76fff000 254 entries.
352 12:45:51.736898 IMD: root @ 0x76ffec00 62 entries.
353 12:45:51.740176 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 12:45:51.747185 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 12:45:51.750576 External stage cache:
356 12:45:51.753603 IMD: root @ 0x7b3ff000 254 entries.
357 12:45:51.756984 IMD: root @ 0x7b3fec00 62 entries.
358 12:45:51.772382 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 12:45:51.778885 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 12:45:51.785454 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 12:45:51.799461 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 12:45:51.806013 cse_lite: Skip switching to RW in the recovery path
363 12:45:51.806588 8 DIMMs found
364 12:45:51.806950 SMM Memory Map
365 12:45:51.812683 SMRAM : 0x7b000000 0x800000
366 12:45:51.816492 Subregion 0: 0x7b000000 0x200000
367 12:45:51.819816 Subregion 1: 0x7b200000 0x200000
368 12:45:51.820256 Subregion 2: 0x7b400000 0x400000
369 12:45:51.823735 top_of_ram = 0x77000000
370 12:45:51.830337 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
371 12:45:51.833523 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
372 12:45:51.840385 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
373 12:45:51.843637 MTRR Range: Start=ff000000 End=0 (Size 1000000)
374 12:45:51.853692 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
375 12:45:51.859939 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
376 12:45:51.870179 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
377 12:45:51.873842 Processing 211 relocs. Offset value of 0x74c0b000
378 12:45:51.882523 BS: romstage times (exec / console): total (unknown) / 277 ms
379 12:45:51.888335
380 12:45:51.888773
381 12:45:51.898152 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
382 12:45:51.901799 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 12:45:51.911494 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 12:45:51.918431 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 12:45:51.924941 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
386 12:45:51.931423 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
387 12:45:51.978646 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
388 12:45:51.985294 Processing 5008 relocs. Offset value of 0x75d98000
389 12:45:51.988543 BS: postcar times (exec / console): total (unknown) / 59 ms
390 12:45:51.991729
391 12:45:51.992240
392 12:45:52.001552 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
393 12:45:52.002099 Normal boot
394 12:45:52.004951 FW_CONFIG value is 0x804c02
395 12:45:52.008273 PCI: 00:07.0 disabled by fw_config
396 12:45:52.011737 PCI: 00:07.1 disabled by fw_config
397 12:45:52.015419 PCI: 00:0d.2 disabled by fw_config
398 12:45:52.018486 PCI: 00:1c.7 disabled by fw_config
399 12:45:52.025161 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
400 12:45:52.032083 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
401 12:45:52.035419 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 12:45:52.038809 GENERIC: 0.0 disabled by fw_config
403 12:45:52.041856 GENERIC: 1.0 disabled by fw_config
404 12:45:52.048312 fw_config match found: DB_USB=USB3_ACTIVE
405 12:45:52.051607 fw_config match found: DB_USB=USB3_ACTIVE
406 12:45:52.055224 fw_config match found: DB_USB=USB3_ACTIVE
407 12:45:52.061503 fw_config match found: DB_USB=USB3_ACTIVE
408 12:45:52.065139 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 12:45:52.072055 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 12:45:52.081803 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 12:45:52.088459 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
412 12:45:52.091609 microcode: sig=0x806c1 pf=0x80 revision=0x86
413 12:45:52.098418 microcode: Update skipped, already up-to-date
414 12:45:52.105270 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
415 12:45:52.132209 Detected 4 core, 8 thread CPU.
416 12:45:52.135408 Setting up SMI for CPU
417 12:45:52.138798 IED base = 0x7b400000
418 12:45:52.139389 IED size = 0x00400000
419 12:45:52.142318 Will perform SMM setup.
420 12:45:52.148943 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
421 12:45:52.155422 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
422 12:45:52.161653 Processing 16 relocs. Offset value of 0x00030000
423 12:45:52.165661 Attempting to start 7 APs
424 12:45:52.168416 Waiting for 10ms after sending INIT.
425 12:45:52.184207 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
426 12:45:52.187803 AP: slot 4 apic_id 4.
427 12:45:52.190713 AP: slot 7 apic_id 5.
428 12:45:52.191158 AP: slot 6 apic_id 3.
429 12:45:52.194043 AP: slot 3 apic_id 2.
430 12:45:52.197497 AP: slot 2 apic_id 7.
431 12:45:52.197937 done.
432 12:45:52.198280 AP: slot 5 apic_id 6.
433 12:45:52.204135 Waiting for 2nd SIPI to complete...done.
434 12:45:52.211029 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
435 12:45:52.217288 Processing 13 relocs. Offset value of 0x00038000
436 12:45:52.217732 Unable to locate Global NVS
437 12:45:52.227197 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
438 12:45:52.230500 Installing permanent SMM handler to 0x7b000000
439 12:45:52.240309 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
440 12:45:52.243712 Processing 794 relocs. Offset value of 0x7b010000
441 12:45:52.253887 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
442 12:45:52.257275 Processing 13 relocs. Offset value of 0x7b008000
443 12:45:52.263730 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
444 12:45:52.270339 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
445 12:45:52.273780 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
446 12:45:52.280768 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
447 12:45:52.286965 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
448 12:45:52.293483 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
449 12:45:52.300324 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
450 12:45:52.300903 Unable to locate Global NVS
451 12:45:52.310617 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
452 12:45:52.313562 Clearing SMI status registers
453 12:45:52.314010 SMI_STS: PM1
454 12:45:52.317006 PM1_STS: PWRBTN
455 12:45:52.323475 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 12:45:52.327348 In relocation handler: CPU 0
457 12:45:52.329998 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 12:45:52.336991 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 12:45:52.337476 Relocation complete.
460 12:45:52.347114 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 12:45:52.347559 In relocation handler: CPU 1
462 12:45:52.353335 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 12:45:52.353783 Relocation complete.
464 12:45:52.363230 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
465 12:45:52.363675 In relocation handler: CPU 6
466 12:45:52.369673 New SMBASE=0x7affe800 IEDBASE=0x7b400000
467 12:45:52.370120 Relocation complete.
468 12:45:52.379963 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
469 12:45:52.380408 In relocation handler: CPU 3
470 12:45:52.386321 New SMBASE=0x7afff400 IEDBASE=0x7b400000
471 12:45:52.389597 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:45:52.392937 Relocation complete.
473 12:45:52.399710 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
474 12:45:52.403701 In relocation handler: CPU 2
475 12:45:52.406429 New SMBASE=0x7afff800 IEDBASE=0x7b400000
476 12:45:52.410126 Relocation complete.
477 12:45:52.416497 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
478 12:45:52.419722 In relocation handler: CPU 5
479 12:45:52.423055 New SMBASE=0x7affec00 IEDBASE=0x7b400000
480 12:45:52.426853 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 12:45:52.429789 Relocation complete.
482 12:45:52.436568 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
483 12:45:52.439871 In relocation handler: CPU 4
484 12:45:52.443467 New SMBASE=0x7afff000 IEDBASE=0x7b400000
485 12:45:52.449692 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 12:45:52.453218 Relocation complete.
487 12:45:52.459942 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
488 12:45:52.463176 In relocation handler: CPU 7
489 12:45:52.466738 New SMBASE=0x7affe400 IEDBASE=0x7b400000
490 12:45:52.467181 Relocation complete.
491 12:45:52.470086 Initializing CPU #0
492 12:45:52.473239 CPU: vendor Intel device 806c1
493 12:45:52.476638 CPU: family 06, model 8c, stepping 01
494 12:45:52.479796 Clearing out pending MCEs
495 12:45:52.483585 Setting up local APIC...
496 12:45:52.484022 apic_id: 0x00 done.
497 12:45:52.487502 Turbo is available but hidden
498 12:45:52.490871 Turbo is available and visible
499 12:45:52.494552 microcode: Update skipped, already up-to-date
500 12:45:52.497997 CPU #0 initialized
501 12:45:52.498441 Initializing CPU #5
502 12:45:52.501539 Initializing CPU #6
503 12:45:52.504791 Initializing CPU #1
504 12:45:52.505263 Initializing CPU #2
505 12:45:52.508243 CPU: vendor Intel device 806c1
506 12:45:52.511213 CPU: family 06, model 8c, stepping 01
507 12:45:52.514705 CPU: vendor Intel device 806c1
508 12:45:52.521487 CPU: family 06, model 8c, stepping 01
509 12:45:52.521932 Clearing out pending MCEs
510 12:45:52.524872 Clearing out pending MCEs
511 12:45:52.528094 Setting up local APIC...
512 12:45:52.528544 Initializing CPU #4
513 12:45:52.531199 Initializing CPU #7
514 12:45:52.534655 CPU: vendor Intel device 806c1
515 12:45:52.538128 CPU: family 06, model 8c, stepping 01
516 12:45:52.541414 CPU: vendor Intel device 806c1
517 12:45:52.544493 CPU: family 06, model 8c, stepping 01
518 12:45:52.547971 Clearing out pending MCEs
519 12:45:52.551165 Clearing out pending MCEs
520 12:45:52.554766 Setting up local APIC...
521 12:45:52.558015 CPU: vendor Intel device 806c1
522 12:45:52.561220 CPU: family 06, model 8c, stepping 01
523 12:45:52.561707 Setting up local APIC...
524 12:45:52.564695 CPU: vendor Intel device 806c1
525 12:45:52.571546 CPU: family 06, model 8c, stepping 01
526 12:45:52.572120 apic_id: 0x04 done.
527 12:45:52.574412 Setting up local APIC...
528 12:45:52.577911 Initializing CPU #3
529 12:45:52.578407 Clearing out pending MCEs
530 12:45:52.581559 CPU: vendor Intel device 806c1
531 12:45:52.585100 CPU: family 06, model 8c, stepping 01
532 12:45:52.588302 Clearing out pending MCEs
533 12:45:52.591669 Setting up local APIC...
534 12:45:52.594598 microcode: Update skipped, already up-to-date
535 12:45:52.598121 apic_id: 0x05 done.
536 12:45:52.601229 CPU #4 initialized
537 12:45:52.604673 microcode: Update skipped, already up-to-date
538 12:45:52.608225 apic_id: 0x03 done.
539 12:45:52.608805 Setting up local APIC...
540 12:45:52.611034 CPU #7 initialized
541 12:45:52.614954 apic_id: 0x02 done.
542 12:45:52.618070 microcode: Update skipped, already up-to-date
543 12:45:52.621266 microcode: Update skipped, already up-to-date
544 12:45:52.624867 CPU #6 initialized
545 12:45:52.627765 CPU #3 initialized
546 12:45:52.628204 Clearing out pending MCEs
547 12:45:52.630997 apic_id: 0x06 done.
548 12:45:52.634485 apic_id: 0x07 done.
549 12:45:52.638068 microcode: Update skipped, already up-to-date
550 12:45:52.641042 microcode: Update skipped, already up-to-date
551 12:45:52.644623 CPU #5 initialized
552 12:45:52.647951 CPU #2 initialized
553 12:45:52.648386 Setting up local APIC...
554 12:45:52.651141 apic_id: 0x01 done.
555 12:45:52.654636 microcode: Update skipped, already up-to-date
556 12:45:52.658104 CPU #1 initialized
557 12:45:52.661194 bsp_do_flight_plan done after 455 msecs.
558 12:45:52.664317 CPU: frequency set to 4000 MHz
559 12:45:52.667786 Enabling SMIs.
560 12:45:52.674469 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
561 12:45:52.689270 SATAXPCIE1 indicates PCIe NVMe is present
562 12:45:52.692755 Probing TPM: done!
563 12:45:52.696169 Connected to device vid:did:rid of 1ae0:0028:00
564 12:45:52.706930 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
565 12:45:52.710274 Initialized TPM device CR50 revision 0
566 12:45:52.712999 Enabling S0i3.4
567 12:45:52.719801 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
568 12:45:52.723180 Found a VBT of 8704 bytes after decompression
569 12:45:52.729775 cse_lite: CSE RO boot. HybridStorageMode disabled
570 12:45:52.736500 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
571 12:45:52.812200 FSPS returned 0
572 12:45:52.815637 Executing Phase 1 of FspMultiPhaseSiInit
573 12:45:52.825410 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
574 12:45:52.829041 port C0 DISC req: usage 1 usb3 1 usb2 5
575 12:45:52.832275 Raw Buffer output 0 00000511
576 12:45:52.835291 Raw Buffer output 1 00000000
577 12:45:52.839148 pmc_send_ipc_cmd succeeded
578 12:45:52.845642 port C1 DISC req: usage 1 usb3 2 usb2 3
579 12:45:52.846101 Raw Buffer output 0 00000321
580 12:45:52.848985 Raw Buffer output 1 00000000
581 12:45:52.853201 pmc_send_ipc_cmd succeeded
582 12:45:52.858528 Detected 4 core, 8 thread CPU.
583 12:45:52.861986 Detected 4 core, 8 thread CPU.
584 12:45:53.096288 Display FSP Version Info HOB
585 12:45:53.099553 Reference Code - CPU = a.0.4c.31
586 12:45:53.102220 uCode Version = 0.0.0.86
587 12:45:53.105969 TXT ACM version = ff.ff.ff.ffff
588 12:45:53.108927 Reference Code - ME = a.0.4c.31
589 12:45:53.112451 MEBx version = 0.0.0.0
590 12:45:53.115922 ME Firmware Version = Consumer SKU
591 12:45:53.119163 Reference Code - PCH = a.0.4c.31
592 12:45:53.122313 PCH-CRID Status = Disabled
593 12:45:53.125615 PCH-CRID Original Value = ff.ff.ff.ffff
594 12:45:53.128855 PCH-CRID New Value = ff.ff.ff.ffff
595 12:45:53.131928 OPROM - RST - RAID = ff.ff.ff.ffff
596 12:45:53.135466 PCH Hsio Version = 4.0.0.0
597 12:45:53.138796 Reference Code - SA - System Agent = a.0.4c.31
598 12:45:53.142388 Reference Code - MRC = 2.0.0.1
599 12:45:53.145673 SA - PCIe Version = a.0.4c.31
600 12:45:53.148517 SA-CRID Status = Disabled
601 12:45:53.152199 SA-CRID Original Value = 0.0.0.1
602 12:45:53.155641 SA-CRID New Value = 0.0.0.1
603 12:45:53.159087 OPROM - VBIOS = ff.ff.ff.ffff
604 12:45:53.162277 IO Manageability Engine FW Version = 11.1.4.0
605 12:45:53.165470 PHY Build Version = 0.0.0.e0
606 12:45:53.168762 Thunderbolt(TM) FW Version = 0.0.0.0
607 12:45:53.175884 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
608 12:45:53.178609 ITSS IRQ Polarities Before:
609 12:45:53.179037 IPC0: 0xffffffff
610 12:45:53.182125 IPC1: 0xffffffff
611 12:45:53.182714 IPC2: 0xffffffff
612 12:45:53.185647 IPC3: 0xffffffff
613 12:45:53.189096 ITSS IRQ Polarities After:
614 12:45:53.189542 IPC0: 0xffffffff
615 12:45:53.192059 IPC1: 0xffffffff
616 12:45:53.192498 IPC2: 0xffffffff
617 12:45:53.195244 IPC3: 0xffffffff
618 12:45:53.199148 Found PCIe Root Port #9 at PCI: 00:1d.0.
619 12:45:53.211840 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
620 12:45:53.221984 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
621 12:45:53.235449 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
622 12:45:53.242109 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
623 12:45:53.245174 Enumerating buses...
624 12:45:53.248554 Show all devs... Before device enumeration.
625 12:45:53.251901 Root Device: enabled 1
626 12:45:53.252345 DOMAIN: 0000: enabled 1
627 12:45:53.255387 CPU_CLUSTER: 0: enabled 1
628 12:45:53.258435 PCI: 00:00.0: enabled 1
629 12:45:53.261890 PCI: 00:02.0: enabled 1
630 12:45:53.262334 PCI: 00:04.0: enabled 1
631 12:45:53.265169 PCI: 00:05.0: enabled 1
632 12:45:53.268657 PCI: 00:06.0: enabled 0
633 12:45:53.271832 PCI: 00:07.0: enabled 0
634 12:45:53.272276 PCI: 00:07.1: enabled 0
635 12:45:53.275329 PCI: 00:07.2: enabled 0
636 12:45:53.278666 PCI: 00:07.3: enabled 0
637 12:45:53.279106 PCI: 00:08.0: enabled 1
638 12:45:53.281813 PCI: 00:09.0: enabled 0
639 12:45:53.285390 PCI: 00:0a.0: enabled 0
640 12:45:53.288390 PCI: 00:0d.0: enabled 1
641 12:45:53.288834 PCI: 00:0d.1: enabled 0
642 12:45:53.291944 PCI: 00:0d.2: enabled 0
643 12:45:53.295054 PCI: 00:0d.3: enabled 0
644 12:45:53.298573 PCI: 00:0e.0: enabled 0
645 12:45:53.299014 PCI: 00:10.2: enabled 1
646 12:45:53.301673 PCI: 00:10.6: enabled 0
647 12:45:53.305021 PCI: 00:10.7: enabled 0
648 12:45:53.308488 PCI: 00:12.0: enabled 0
649 12:45:53.308927 PCI: 00:12.6: enabled 0
650 12:45:53.311463 PCI: 00:13.0: enabled 0
651 12:45:53.314922 PCI: 00:14.0: enabled 1
652 12:45:53.318127 PCI: 00:14.1: enabled 0
653 12:45:53.318568 PCI: 00:14.2: enabled 1
654 12:45:53.322014 PCI: 00:14.3: enabled 1
655 12:45:53.324678 PCI: 00:15.0: enabled 1
656 12:45:53.325147 PCI: 00:15.1: enabled 1
657 12:45:53.328519 PCI: 00:15.2: enabled 1
658 12:45:53.331708 PCI: 00:15.3: enabled 1
659 12:45:53.335032 PCI: 00:16.0: enabled 1
660 12:45:53.335473 PCI: 00:16.1: enabled 0
661 12:45:53.337885 PCI: 00:16.2: enabled 0
662 12:45:53.341375 PCI: 00:16.3: enabled 0
663 12:45:53.344492 PCI: 00:16.4: enabled 0
664 12:45:53.344933 PCI: 00:16.5: enabled 0
665 12:45:53.348071 PCI: 00:17.0: enabled 1
666 12:45:53.351517 PCI: 00:19.0: enabled 0
667 12:45:53.354523 PCI: 00:19.1: enabled 1
668 12:45:53.354967 PCI: 00:19.2: enabled 0
669 12:45:53.358134 PCI: 00:1c.0: enabled 1
670 12:45:53.361078 PCI: 00:1c.1: enabled 0
671 12:45:53.364782 PCI: 00:1c.2: enabled 0
672 12:45:53.365253 PCI: 00:1c.3: enabled 0
673 12:45:53.367901 PCI: 00:1c.4: enabled 0
674 12:45:53.371494 PCI: 00:1c.5: enabled 0
675 12:45:53.371937 PCI: 00:1c.6: enabled 1
676 12:45:53.374707 PCI: 00:1c.7: enabled 0
677 12:45:53.378172 PCI: 00:1d.0: enabled 1
678 12:45:53.381355 PCI: 00:1d.1: enabled 0
679 12:45:53.381796 PCI: 00:1d.2: enabled 1
680 12:45:53.384733 PCI: 00:1d.3: enabled 0
681 12:45:53.388107 PCI: 00:1e.0: enabled 1
682 12:45:53.391374 PCI: 00:1e.1: enabled 0
683 12:45:53.391816 PCI: 00:1e.2: enabled 1
684 12:45:53.394576 PCI: 00:1e.3: enabled 1
685 12:45:53.397656 PCI: 00:1f.0: enabled 1
686 12:45:53.401129 PCI: 00:1f.1: enabled 0
687 12:45:53.401573 PCI: 00:1f.2: enabled 1
688 12:45:53.404396 PCI: 00:1f.3: enabled 1
689 12:45:53.408037 PCI: 00:1f.4: enabled 0
690 12:45:53.408481 PCI: 00:1f.5: enabled 1
691 12:45:53.411370 PCI: 00:1f.6: enabled 0
692 12:45:53.414820 PCI: 00:1f.7: enabled 0
693 12:45:53.417745 APIC: 00: enabled 1
694 12:45:53.418188 GENERIC: 0.0: enabled 1
695 12:45:53.421281 GENERIC: 0.0: enabled 1
696 12:45:53.424566 GENERIC: 1.0: enabled 1
697 12:45:53.427535 GENERIC: 0.0: enabled 1
698 12:45:53.427979 GENERIC: 1.0: enabled 1
699 12:45:53.431087 USB0 port 0: enabled 1
700 12:45:53.434241 GENERIC: 0.0: enabled 1
701 12:45:53.434690 USB0 port 0: enabled 1
702 12:45:53.437650 GENERIC: 0.0: enabled 1
703 12:45:53.441050 I2C: 00:1a: enabled 1
704 12:45:53.441558 I2C: 00:31: enabled 1
705 12:45:53.444153 I2C: 00:32: enabled 1
706 12:45:53.447769 I2C: 00:10: enabled 1
707 12:45:53.450742 I2C: 00:15: enabled 1
708 12:45:53.451181 GENERIC: 0.0: enabled 0
709 12:45:53.454578 GENERIC: 1.0: enabled 0
710 12:45:53.457655 GENERIC: 0.0: enabled 1
711 12:45:53.458095 SPI: 00: enabled 1
712 12:45:53.460790 SPI: 00: enabled 1
713 12:45:53.464288 PNP: 0c09.0: enabled 1
714 12:45:53.464730 GENERIC: 0.0: enabled 1
715 12:45:53.467808 USB3 port 0: enabled 1
716 12:45:53.471063 USB3 port 1: enabled 1
717 12:45:53.471506 USB3 port 2: enabled 0
718 12:45:53.474351 USB3 port 3: enabled 0
719 12:45:53.477323 USB2 port 0: enabled 0
720 12:45:53.480963 USB2 port 1: enabled 1
721 12:45:53.481554 USB2 port 2: enabled 1
722 12:45:53.484496 USB2 port 3: enabled 0
723 12:45:53.487238 USB2 port 4: enabled 1
724 12:45:53.487679 USB2 port 5: enabled 0
725 12:45:53.490907 USB2 port 6: enabled 0
726 12:45:53.493986 USB2 port 7: enabled 0
727 12:45:53.497470 USB2 port 8: enabled 0
728 12:45:53.497909 USB2 port 9: enabled 0
729 12:45:53.500569 USB3 port 0: enabled 0
730 12:45:53.504006 USB3 port 1: enabled 1
731 12:45:53.504573 USB3 port 2: enabled 0
732 12:45:53.507339 USB3 port 3: enabled 0
733 12:45:53.510912 GENERIC: 0.0: enabled 1
734 12:45:53.514412 GENERIC: 1.0: enabled 1
735 12:45:53.514969 APIC: 01: enabled 1
736 12:45:53.517674 APIC: 07: enabled 1
737 12:45:53.518128 APIC: 02: enabled 1
738 12:45:53.520629 APIC: 04: enabled 1
739 12:45:53.523756 APIC: 06: enabled 1
740 12:45:53.524231 APIC: 03: enabled 1
741 12:45:53.527282 APIC: 05: enabled 1
742 12:45:53.530669 Compare with tree...
743 12:45:53.531136 Root Device: enabled 1
744 12:45:53.533685 DOMAIN: 0000: enabled 1
745 12:45:53.537535 PCI: 00:00.0: enabled 1
746 12:45:53.540646 PCI: 00:02.0: enabled 1
747 12:45:53.541136 PCI: 00:04.0: enabled 1
748 12:45:53.543622 GENERIC: 0.0: enabled 1
749 12:45:53.547101 PCI: 00:05.0: enabled 1
750 12:45:53.550438 PCI: 00:06.0: enabled 0
751 12:45:53.554014 PCI: 00:07.0: enabled 0
752 12:45:53.554472 GENERIC: 0.0: enabled 1
753 12:45:53.556978 PCI: 00:07.1: enabled 0
754 12:45:53.560507 GENERIC: 1.0: enabled 1
755 12:45:53.564198 PCI: 00:07.2: enabled 0
756 12:45:53.566809 GENERIC: 0.0: enabled 1
757 12:45:53.570467 PCI: 00:07.3: enabled 0
758 12:45:53.570998 GENERIC: 1.0: enabled 1
759 12:45:53.573586 PCI: 00:08.0: enabled 1
760 12:45:53.577157 PCI: 00:09.0: enabled 0
761 12:45:53.580523 PCI: 00:0a.0: enabled 0
762 12:45:53.583651 PCI: 00:0d.0: enabled 1
763 12:45:53.584111 USB0 port 0: enabled 1
764 12:45:53.587307 USB3 port 0: enabled 1
765 12:45:53.590240 USB3 port 1: enabled 1
766 12:45:53.593273 USB3 port 2: enabled 0
767 12:45:53.596717 USB3 port 3: enabled 0
768 12:45:53.597264 PCI: 00:0d.1: enabled 0
769 12:45:53.600055 PCI: 00:0d.2: enabled 0
770 12:45:53.603718 GENERIC: 0.0: enabled 1
771 12:45:53.607088 PCI: 00:0d.3: enabled 0
772 12:45:53.609857 PCI: 00:0e.0: enabled 0
773 12:45:53.610345 PCI: 00:10.2: enabled 1
774 12:45:53.613243 PCI: 00:10.6: enabled 0
775 12:45:53.616872 PCI: 00:10.7: enabled 0
776 12:45:53.619900 PCI: 00:12.0: enabled 0
777 12:45:53.623425 PCI: 00:12.6: enabled 0
778 12:45:53.623918 PCI: 00:13.0: enabled 0
779 12:45:53.626518 PCI: 00:14.0: enabled 1
780 12:45:53.629818 USB0 port 0: enabled 1
781 12:45:53.633204 USB2 port 0: enabled 0
782 12:45:53.636554 USB2 port 1: enabled 1
783 12:45:53.637005 USB2 port 2: enabled 1
784 12:45:53.639815 USB2 port 3: enabled 0
785 12:45:53.643359 USB2 port 4: enabled 1
786 12:45:53.646388 USB2 port 5: enabled 0
787 12:45:53.649830 USB2 port 6: enabled 0
788 12:45:53.653054 USB2 port 7: enabled 0
789 12:45:53.653544 USB2 port 8: enabled 0
790 12:45:53.656373 USB2 port 9: enabled 0
791 12:45:53.659783 USB3 port 0: enabled 0
792 12:45:53.662894 USB3 port 1: enabled 1
793 12:45:53.666247 USB3 port 2: enabled 0
794 12:45:53.669992 USB3 port 3: enabled 0
795 12:45:53.670446 PCI: 00:14.1: enabled 0
796 12:45:53.673304 PCI: 00:14.2: enabled 1
797 12:45:53.676061 PCI: 00:14.3: enabled 1
798 12:45:53.679692 GENERIC: 0.0: enabled 1
799 12:45:53.683218 PCI: 00:15.0: enabled 1
800 12:45:53.683766 I2C: 00:1a: enabled 1
801 12:45:53.686345 I2C: 00:31: enabled 1
802 12:45:53.690027 I2C: 00:32: enabled 1
803 12:45:53.692932 PCI: 00:15.1: enabled 1
804 12:45:53.693413 I2C: 00:10: enabled 1
805 12:45:53.696038 PCI: 00:15.2: enabled 1
806 12:45:53.699544 PCI: 00:15.3: enabled 1
807 12:45:53.702884 PCI: 00:16.0: enabled 1
808 12:45:53.706356 PCI: 00:16.1: enabled 0
809 12:45:53.706896 PCI: 00:16.2: enabled 0
810 12:45:53.709283 PCI: 00:16.3: enabled 0
811 12:45:53.712733 PCI: 00:16.4: enabled 0
812 12:45:53.716235 PCI: 00:16.5: enabled 0
813 12:45:53.719397 PCI: 00:17.0: enabled 1
814 12:45:53.719841 PCI: 00:19.0: enabled 0
815 12:45:53.722605 PCI: 00:19.1: enabled 1
816 12:45:53.725872 I2C: 00:15: enabled 1
817 12:45:53.729164 PCI: 00:19.2: enabled 0
818 12:45:53.732552 PCI: 00:1d.0: enabled 1
819 12:45:53.732994 GENERIC: 0.0: enabled 1
820 12:45:53.735778 PCI: 00:1e.0: enabled 1
821 12:45:53.739134 PCI: 00:1e.1: enabled 0
822 12:45:53.742539 PCI: 00:1e.2: enabled 1
823 12:45:53.743065 SPI: 00: enabled 1
824 12:45:53.746047 PCI: 00:1e.3: enabled 1
825 12:45:53.750076 SPI: 00: enabled 1
826 12:45:53.750514 PCI: 00:1f.0: enabled 1
827 12:45:53.753703 PNP: 0c09.0: enabled 1
828 12:45:53.757230 PCI: 00:1f.1: enabled 0
829 12:45:53.808326 PCI: 00:1f.2: enabled 1
830 12:45:53.808739 GENERIC: 0.0: enabled 1
831 12:45:53.809549 GENERIC: 0.0: enabled 1
832 12:45:53.809947 GENERIC: 1.0: enabled 1
833 12:45:53.810312 PCI: 00:1f.3: enabled 1
834 12:45:53.810659 PCI: 00:1f.4: enabled 0
835 12:45:53.811009 PCI: 00:1f.5: enabled 1
836 12:45:53.811319 PCI: 00:1f.6: enabled 0
837 12:45:53.811653 PCI: 00:1f.7: enabled 0
838 12:45:53.812365 CPU_CLUSTER: 0: enabled 1
839 12:45:53.812703 APIC: 00: enabled 1
840 12:45:53.813054 APIC: 01: enabled 1
841 12:45:53.813398 APIC: 07: enabled 1
842 12:45:53.813753 APIC: 02: enabled 1
843 12:45:53.814052 APIC: 04: enabled 1
844 12:45:53.814390 APIC: 06: enabled 1
845 12:45:53.814693 APIC: 03: enabled 1
846 12:45:53.815014 APIC: 05: enabled 1
847 12:45:53.815322 Root Device scanning...
848 12:45:53.815618 scan_static_bus for Root Device
849 12:45:53.859409 DOMAIN: 0000 enabled
850 12:45:53.859906 CPU_CLUSTER: 0 enabled
851 12:45:53.860318 DOMAIN: 0000 scanning...
852 12:45:53.861034 PCI: pci_scan_bus for bus 00
853 12:45:53.861440 PCI: 00:00.0 [8086/0000] ops
854 12:45:53.861817 PCI: 00:00.0 [8086/9a12] enabled
855 12:45:53.862157 PCI: 00:02.0 [8086/0000] bus ops
856 12:45:53.862495 PCI: 00:02.0 [8086/9a40] enabled
857 12:45:53.862812 PCI: 00:04.0 [8086/0000] bus ops
858 12:45:53.863156 PCI: 00:04.0 [8086/9a03] enabled
859 12:45:53.863460 PCI: 00:05.0 [8086/9a19] enabled
860 12:45:53.863798 PCI: 00:07.0 [0000/0000] hidden
861 12:45:53.864086 PCI: 00:08.0 [8086/9a11] enabled
862 12:45:53.864442 PCI: 00:0a.0 [8086/9a0d] disabled
863 12:45:53.864731 PCI: 00:0d.0 [8086/0000] bus ops
864 12:45:53.865113 PCI: 00:0d.0 [8086/9a13] enabled
865 12:45:53.873633 PCI: 00:14.0 [8086/0000] bus ops
866 12:45:53.874094 PCI: 00:14.0 [8086/a0ed] enabled
867 12:45:53.874462 PCI: 00:14.2 [8086/a0ef] enabled
868 12:45:53.874832 PCI: 00:14.3 [8086/0000] bus ops
869 12:45:53.877599 PCI: 00:14.3 [8086/a0f0] enabled
870 12:45:53.880815 PCI: 00:15.0 [8086/0000] bus ops
871 12:45:53.881300 PCI: 00:15.0 [8086/a0e8] enabled
872 12:45:53.884208 PCI: 00:15.1 [8086/0000] bus ops
873 12:45:53.887104 PCI: 00:15.1 [8086/a0e9] enabled
874 12:45:53.890796 PCI: 00:15.2 [8086/0000] bus ops
875 12:45:53.893940 PCI: 00:15.2 [8086/a0ea] enabled
876 12:45:53.897616 PCI: 00:15.3 [8086/0000] bus ops
877 12:45:53.900373 PCI: 00:15.3 [8086/a0eb] enabled
878 12:45:53.903927 PCI: 00:16.0 [8086/0000] ops
879 12:45:53.907739 PCI: 00:16.0 [8086/a0e0] enabled
880 12:45:53.913775 PCI: Static device PCI: 00:17.0 not found, disabling it.
881 12:45:53.917191 PCI: 00:19.0 [8086/0000] bus ops
882 12:45:53.920561 PCI: 00:19.0 [8086/a0c5] disabled
883 12:45:53.923772 PCI: 00:19.1 [8086/0000] bus ops
884 12:45:53.927192 PCI: 00:19.1 [8086/a0c6] enabled
885 12:45:53.930642 PCI: 00:1d.0 [8086/0000] bus ops
886 12:45:53.933801 PCI: 00:1d.0 [8086/a0b0] enabled
887 12:45:53.937520 PCI: 00:1e.0 [8086/0000] ops
888 12:45:53.940623 PCI: 00:1e.0 [8086/a0a8] enabled
889 12:45:53.943643 PCI: 00:1e.2 [8086/0000] bus ops
890 12:45:53.947061 PCI: 00:1e.2 [8086/a0aa] enabled
891 12:45:53.950332 PCI: 00:1e.3 [8086/0000] bus ops
892 12:45:53.953651 PCI: 00:1e.3 [8086/a0ab] enabled
893 12:45:53.957222 PCI: 00:1f.0 [8086/0000] bus ops
894 12:45:53.960125 PCI: 00:1f.0 [8086/a087] enabled
895 12:45:53.960560 RTC Init
896 12:45:53.963712 Set power on after power failure.
897 12:45:53.967127 Disabling Deep S3
898 12:45:53.970617 Disabling Deep S3
899 12:45:53.971153 Disabling Deep S4
900 12:45:53.973780 Disabling Deep S4
901 12:45:53.974291 Disabling Deep S5
902 12:45:53.977094 Disabling Deep S5
903 12:45:53.980437 PCI: 00:1f.2 [0000/0000] hidden
904 12:45:53.983825 PCI: 00:1f.3 [8086/0000] bus ops
905 12:45:53.986997 PCI: 00:1f.3 [8086/a0c8] enabled
906 12:45:53.990241 PCI: 00:1f.5 [8086/0000] bus ops
907 12:45:53.993727 PCI: 00:1f.5 [8086/a0a4] enabled
908 12:45:53.996848 PCI: Leftover static devices:
909 12:45:53.997313 PCI: 00:10.2
910 12:45:54.000608 PCI: 00:10.6
911 12:45:54.001044 PCI: 00:10.7
912 12:45:54.001416 PCI: 00:06.0
913 12:45:54.003654 PCI: 00:07.1
914 12:45:54.004090 PCI: 00:07.2
915 12:45:54.006797 PCI: 00:07.3
916 12:45:54.007232 PCI: 00:09.0
917 12:45:54.007574 PCI: 00:0d.1
918 12:45:54.010384 PCI: 00:0d.2
919 12:45:54.010822 PCI: 00:0d.3
920 12:45:54.013554 PCI: 00:0e.0
921 12:45:54.013990 PCI: 00:12.0
922 12:45:54.016844 PCI: 00:12.6
923 12:45:54.017308 PCI: 00:13.0
924 12:45:54.017649 PCI: 00:14.1
925 12:45:54.020313 PCI: 00:16.1
926 12:45:54.020748 PCI: 00:16.2
927 12:45:54.023645 PCI: 00:16.3
928 12:45:54.024079 PCI: 00:16.4
929 12:45:54.024419 PCI: 00:16.5
930 12:45:54.026986 PCI: 00:17.0
931 12:45:54.027423 PCI: 00:19.2
932 12:45:54.030225 PCI: 00:1e.1
933 12:45:54.030660 PCI: 00:1f.1
934 12:45:54.031003 PCI: 00:1f.4
935 12:45:54.033694 PCI: 00:1f.6
936 12:45:54.034130 PCI: 00:1f.7
937 12:45:54.037145 PCI: Check your devicetree.cb.
938 12:45:54.040220 PCI: 00:02.0 scanning...
939 12:45:54.044059 scan_generic_bus for PCI: 00:02.0
940 12:45:54.047141 scan_generic_bus for PCI: 00:02.0 done
941 12:45:54.053405 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
942 12:45:54.053845 PCI: 00:04.0 scanning...
943 12:45:54.060403 scan_generic_bus for PCI: 00:04.0
944 12:45:54.060838 GENERIC: 0.0 enabled
945 12:45:54.066917 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
946 12:45:54.070103 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
947 12:45:54.073514 PCI: 00:0d.0 scanning...
948 12:45:54.076969 scan_static_bus for PCI: 00:0d.0
949 12:45:54.079873 USB0 port 0 enabled
950 12:45:54.083939 USB0 port 0 scanning...
951 12:45:54.086596 scan_static_bus for USB0 port 0
952 12:45:54.087033 USB3 port 0 enabled
953 12:45:54.090024 USB3 port 1 enabled
954 12:45:54.093407 USB3 port 2 disabled
955 12:45:54.093955 USB3 port 3 disabled
956 12:45:54.096619 USB3 port 0 scanning...
957 12:45:54.099838 scan_static_bus for USB3 port 0
958 12:45:54.103655 scan_static_bus for USB3 port 0 done
959 12:45:54.110022 scan_bus: bus USB3 port 0 finished in 6 msecs
960 12:45:54.110575 USB3 port 1 scanning...
961 12:45:54.113149 scan_static_bus for USB3 port 1
962 12:45:54.116937 scan_static_bus for USB3 port 1 done
963 12:45:54.123159 scan_bus: bus USB3 port 1 finished in 6 msecs
964 12:45:54.126341 scan_static_bus for USB0 port 0 done
965 12:45:54.129865 scan_bus: bus USB0 port 0 finished in 43 msecs
966 12:45:54.136385 scan_static_bus for PCI: 00:0d.0 done
967 12:45:54.139841 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
968 12:45:54.143142 PCI: 00:14.0 scanning...
969 12:45:54.146168 scan_static_bus for PCI: 00:14.0
970 12:45:54.146616 USB0 port 0 enabled
971 12:45:54.150057 USB0 port 0 scanning...
972 12:45:54.152988 scan_static_bus for USB0 port 0
973 12:45:54.156519 USB2 port 0 disabled
974 12:45:54.156967 USB2 port 1 enabled
975 12:45:54.159733 USB2 port 2 enabled
976 12:45:54.162889 USB2 port 3 disabled
977 12:45:54.163358 USB2 port 4 enabled
978 12:45:54.166034 USB2 port 5 disabled
979 12:45:54.169737 USB2 port 6 disabled
980 12:45:54.170185 USB2 port 7 disabled
981 12:45:54.172894 USB2 port 8 disabled
982 12:45:54.176435 USB2 port 9 disabled
983 12:45:54.176882 USB3 port 0 disabled
984 12:45:54.179276 USB3 port 1 enabled
985 12:45:54.179727 USB3 port 2 disabled
986 12:45:54.182854 USB3 port 3 disabled
987 12:45:54.186356 USB2 port 1 scanning...
988 12:45:54.189616 scan_static_bus for USB2 port 1
989 12:45:54.192832 scan_static_bus for USB2 port 1 done
990 12:45:54.196093 scan_bus: bus USB2 port 1 finished in 6 msecs
991 12:45:54.199793 USB2 port 2 scanning...
992 12:45:54.202754 scan_static_bus for USB2 port 2
993 12:45:54.206156 scan_static_bus for USB2 port 2 done
994 12:45:54.212914 scan_bus: bus USB2 port 2 finished in 6 msecs
995 12:45:54.213476 USB2 port 4 scanning...
996 12:45:54.216325 scan_static_bus for USB2 port 4
997 12:45:54.223069 scan_static_bus for USB2 port 4 done
998 12:45:54.226295 scan_bus: bus USB2 port 4 finished in 6 msecs
999 12:45:54.229224 USB3 port 1 scanning...
1000 12:45:54.233056 scan_static_bus for USB3 port 1
1001 12:45:54.235740 scan_static_bus for USB3 port 1 done
1002 12:45:54.239072 scan_bus: bus USB3 port 1 finished in 6 msecs
1003 12:45:54.243128 scan_static_bus for USB0 port 0 done
1004 12:45:54.249519 scan_bus: bus USB0 port 0 finished in 93 msecs
1005 12:45:54.252447 scan_static_bus for PCI: 00:14.0 done
1006 12:45:54.256256 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1007 12:45:54.259291 PCI: 00:14.3 scanning...
1008 12:45:54.262978 scan_static_bus for PCI: 00:14.3
1009 12:45:54.265867 GENERIC: 0.0 enabled
1010 12:45:54.269382 scan_static_bus for PCI: 00:14.3 done
1011 12:45:54.272557 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1012 12:45:54.276038 PCI: 00:15.0 scanning...
1013 12:45:54.279703 scan_static_bus for PCI: 00:15.0
1014 12:45:54.282417 I2C: 00:1a enabled
1015 12:45:54.282873 I2C: 00:31 enabled
1016 12:45:54.285887 I2C: 00:32 enabled
1017 12:45:54.288952 scan_static_bus for PCI: 00:15.0 done
1018 12:45:54.295888 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1019 12:45:54.296333 PCI: 00:15.1 scanning...
1020 12:45:54.299206 scan_static_bus for PCI: 00:15.1
1021 12:45:54.302863 I2C: 00:10 enabled
1022 12:45:54.306216 scan_static_bus for PCI: 00:15.1 done
1023 12:45:54.312606 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1024 12:45:54.313189 PCI: 00:15.2 scanning...
1025 12:45:54.315951 scan_static_bus for PCI: 00:15.2
1026 12:45:54.322376 scan_static_bus for PCI: 00:15.2 done
1027 12:45:54.325693 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1028 12:45:54.329882 PCI: 00:15.3 scanning...
1029 12:45:54.333237 scan_static_bus for PCI: 00:15.3
1030 12:45:54.337101 scan_static_bus for PCI: 00:15.3 done
1031 12:45:54.340174 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1032 12:45:54.343179 PCI: 00:19.1 scanning...
1033 12:45:54.346475 scan_static_bus for PCI: 00:19.1
1034 12:45:54.349908 I2C: 00:15 enabled
1035 12:45:54.352844 scan_static_bus for PCI: 00:19.1 done
1036 12:45:54.356432 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1037 12:45:54.360141 PCI: 00:1d.0 scanning...
1038 12:45:54.363213 do_pci_scan_bridge for PCI: 00:1d.0
1039 12:45:54.366426 PCI: pci_scan_bus for bus 01
1040 12:45:54.369719 PCI: 01:00.0 [1c5c/174a] enabled
1041 12:45:54.373055 GENERIC: 0.0 enabled
1042 12:45:54.376339 Enabling Common Clock Configuration
1043 12:45:54.379781 L1 Sub-State supported from root port 29
1044 12:45:54.383334 L1 Sub-State Support = 0xf
1045 12:45:54.386586 CommonModeRestoreTime = 0x28
1046 12:45:54.389889 Power On Value = 0x16, Power On Scale = 0x0
1047 12:45:54.393128 ASPM: Enabled L1
1048 12:45:54.396546 PCIe: Max_Payload_Size adjusted to 128
1049 12:45:54.399804 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1050 12:45:54.403083 PCI: 00:1e.2 scanning...
1051 12:45:54.406363 scan_generic_bus for PCI: 00:1e.2
1052 12:45:54.409598 SPI: 00 enabled
1053 12:45:54.413374 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1054 12:45:54.419557 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1055 12:45:54.422831 PCI: 00:1e.3 scanning...
1056 12:45:54.426196 scan_generic_bus for PCI: 00:1e.3
1057 12:45:54.426649 SPI: 00 enabled
1058 12:45:54.433630 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1059 12:45:54.436388 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1060 12:45:54.439491 PCI: 00:1f.0 scanning...
1061 12:45:54.442987 scan_static_bus for PCI: 00:1f.0
1062 12:45:54.446543 PNP: 0c09.0 enabled
1063 12:45:54.449518 PNP: 0c09.0 scanning...
1064 12:45:54.453008 scan_static_bus for PNP: 0c09.0
1065 12:45:54.455977 scan_static_bus for PNP: 0c09.0 done
1066 12:45:54.459862 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1067 12:45:54.462889 scan_static_bus for PCI: 00:1f.0 done
1068 12:45:54.469912 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1069 12:45:54.470365 PCI: 00:1f.2 scanning...
1070 12:45:54.473360 scan_static_bus for PCI: 00:1f.2
1071 12:45:54.476632 GENERIC: 0.0 enabled
1072 12:45:54.479846 GENERIC: 0.0 scanning...
1073 12:45:54.483150 scan_static_bus for GENERIC: 0.0
1074 12:45:54.486456 GENERIC: 0.0 enabled
1075 12:45:54.486898 GENERIC: 1.0 enabled
1076 12:45:54.490116 scan_static_bus for GENERIC: 0.0 done
1077 12:45:54.496484 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1078 12:45:54.499494 scan_static_bus for PCI: 00:1f.2 done
1079 12:45:54.503237 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1080 12:45:54.506642 PCI: 00:1f.3 scanning...
1081 12:45:54.509767 scan_static_bus for PCI: 00:1f.3
1082 12:45:54.512864 scan_static_bus for PCI: 00:1f.3 done
1083 12:45:54.519819 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1084 12:45:54.522701 PCI: 00:1f.5 scanning...
1085 12:45:54.526223 scan_generic_bus for PCI: 00:1f.5
1086 12:45:54.529373 scan_generic_bus for PCI: 00:1f.5 done
1087 12:45:54.532607 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1088 12:45:54.539592 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1089 12:45:54.542958 scan_static_bus for Root Device done
1090 12:45:54.546330 scan_bus: bus Root Device finished in 736 msecs
1091 12:45:54.549544 done
1092 12:45:54.552532 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1093 12:45:54.556413 Chrome EC: UHEPI supported
1094 12:45:54.562720 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1095 12:45:54.569474 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1096 12:45:54.572640 SPI flash protection: WPSW=0 SRP0=0
1097 12:45:54.579444 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1098 12:45:54.582732 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1099 12:45:54.586268 found VGA at PCI: 00:02.0
1100 12:45:54.589237 Setting up VGA for PCI: 00:02.0
1101 12:45:54.595859 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1102 12:45:54.599511 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1103 12:45:54.602580 Allocating resources...
1104 12:45:54.606420 Reading resources...
1105 12:45:54.609196 Root Device read_resources bus 0 link: 0
1106 12:45:54.612703 DOMAIN: 0000 read_resources bus 0 link: 0
1107 12:45:54.619280 PCI: 00:04.0 read_resources bus 1 link: 0
1108 12:45:54.622843 PCI: 00:04.0 read_resources bus 1 link: 0 done
1109 12:45:54.629436 PCI: 00:0d.0 read_resources bus 0 link: 0
1110 12:45:54.632736 USB0 port 0 read_resources bus 0 link: 0
1111 12:45:54.639255 USB0 port 0 read_resources bus 0 link: 0 done
1112 12:45:54.642622 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1113 12:45:54.645928 PCI: 00:14.0 read_resources bus 0 link: 0
1114 12:45:54.652800 USB0 port 0 read_resources bus 0 link: 0
1115 12:45:54.655717 USB0 port 0 read_resources bus 0 link: 0 done
1116 12:45:54.662525 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 12:45:54.665897 PCI: 00:14.3 read_resources bus 0 link: 0
1118 12:45:54.672685 PCI: 00:14.3 read_resources bus 0 link: 0 done
1119 12:45:54.675887 PCI: 00:15.0 read_resources bus 0 link: 0
1120 12:45:54.682951 PCI: 00:15.0 read_resources bus 0 link: 0 done
1121 12:45:54.686059 PCI: 00:15.1 read_resources bus 0 link: 0
1122 12:45:54.693032 PCI: 00:15.1 read_resources bus 0 link: 0 done
1123 12:45:54.696234 PCI: 00:19.1 read_resources bus 0 link: 0
1124 12:45:54.702904 PCI: 00:19.1 read_resources bus 0 link: 0 done
1125 12:45:54.706429 PCI: 00:1d.0 read_resources bus 1 link: 0
1126 12:45:54.713102 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1127 12:45:54.716509 PCI: 00:1e.2 read_resources bus 2 link: 0
1128 12:45:54.723431 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1129 12:45:54.726402 PCI: 00:1e.3 read_resources bus 3 link: 0
1130 12:45:54.733293 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1131 12:45:54.736523 PCI: 00:1f.0 read_resources bus 0 link: 0
1132 12:45:54.743020 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1133 12:45:54.746235 PCI: 00:1f.2 read_resources bus 0 link: 0
1134 12:45:54.749704 GENERIC: 0.0 read_resources bus 0 link: 0
1135 12:45:54.756574 GENERIC: 0.0 read_resources bus 0 link: 0 done
1136 12:45:54.760124 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1137 12:45:54.767298 DOMAIN: 0000 read_resources bus 0 link: 0 done
1138 12:45:54.770947 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1139 12:45:54.777131 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1140 12:45:54.780374 Root Device read_resources bus 0 link: 0 done
1141 12:45:54.784549 Done reading resources.
1142 12:45:54.790922 Show resources in subtree (Root Device)...After reading.
1143 12:45:54.793738 Root Device child on link 0 DOMAIN: 0000
1144 12:45:54.797056 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 12:45:54.807372 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 12:45:54.817113 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1147 12:45:54.820477 PCI: 00:00.0
1148 12:45:54.830061 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 12:45:54.837029 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 12:45:54.846811 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 12:45:54.856969 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 12:45:54.867214 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 12:45:54.876843 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 12:45:54.883194 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 12:45:54.893194 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 12:45:54.902984 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 12:45:54.913039 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1158 12:45:54.923198 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1159 12:45:54.933428 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1160 12:45:54.940011 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1161 12:45:54.949628 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1162 12:45:54.959493 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1163 12:45:54.969840 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1164 12:45:54.979657 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 12:45:54.989859 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 12:45:54.995982 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 12:45:55.006066 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 12:45:55.009341 PCI: 00:02.0
1169 12:45:55.019210 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 12:45:55.029024 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 12:45:55.039264 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 12:45:55.042402 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 12:45:55.052337 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 12:45:55.055557 GENERIC: 0.0
1175 12:45:55.055978 PCI: 00:05.0
1176 12:45:55.065823 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 12:45:55.072310 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 12:45:55.072713 GENERIC: 0.0
1179 12:45:55.075680 PCI: 00:08.0
1180 12:45:55.085653 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:45:55.086117 PCI: 00:0a.0
1182 12:45:55.089047 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 12:45:55.099053 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 12:45:55.105905 USB0 port 0 child on link 0 USB3 port 0
1185 12:45:55.106331 USB3 port 0
1186 12:45:55.108739 USB3 port 1
1187 12:45:55.109168 USB3 port 2
1188 12:45:55.112293 USB3 port 3
1189 12:45:55.115752 PCI: 00:14.0 child on link 0 USB0 port 0
1190 12:45:55.125751 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 12:45:55.132344 USB0 port 0 child on link 0 USB2 port 0
1192 12:45:55.132745 USB2 port 0
1193 12:45:55.135563 USB2 port 1
1194 12:45:55.135950 USB2 port 2
1195 12:45:55.138981 USB2 port 3
1196 12:45:55.139366 USB2 port 4
1197 12:45:55.142028 USB2 port 5
1198 12:45:55.142440 USB2 port 6
1199 12:45:55.145343 USB2 port 7
1200 12:45:55.145797 USB2 port 8
1201 12:45:55.148540 USB2 port 9
1202 12:45:55.148987 USB3 port 0
1203 12:45:55.152110 USB3 port 1
1204 12:45:55.152558 USB3 port 2
1205 12:45:55.155436 USB3 port 3
1206 12:45:55.155887 PCI: 00:14.2
1207 12:45:55.165318 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 12:45:55.175512 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 12:45:55.181852 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 12:45:55.191710 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 12:45:55.192170 GENERIC: 0.0
1212 12:45:55.198668 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 12:45:55.208509 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:45:55.208959 I2C: 00:1a
1215 12:45:55.211850 I2C: 00:31
1216 12:45:55.212271 I2C: 00:32
1217 12:45:55.215333 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 12:45:55.225297 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 12:45:55.228757 I2C: 00:10
1220 12:45:55.229170 PCI: 00:15.2
1221 12:45:55.238215 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:45:55.241970 PCI: 00:15.3
1223 12:45:55.251659 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 12:45:55.252117 PCI: 00:16.0
1225 12:45:55.261891 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 12:45:55.265120 PCI: 00:19.0
1227 12:45:55.268489 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 12:45:55.278487 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 12:45:55.281594 I2C: 00:15
1230 12:45:55.284840 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 12:45:55.294798 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 12:45:55.301525 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 12:45:55.311537 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 12:45:55.314556 GENERIC: 0.0
1235 12:45:55.314955 PCI: 01:00.0
1236 12:45:55.324767 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 12:45:55.335163 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 12:45:55.344722 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 12:45:55.345209 PCI: 00:1e.0
1240 12:45:55.358028 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 12:45:55.361154 PCI: 00:1e.2 child on link 0 SPI: 00
1242 12:45:55.371344 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:45:55.371814 SPI: 00
1244 12:45:55.377774 PCI: 00:1e.3 child on link 0 SPI: 00
1245 12:45:55.388230 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 12:45:55.388793 SPI: 00
1247 12:45:55.391545 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 12:45:55.401403 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 12:45:55.401860 PNP: 0c09.0
1250 12:45:55.410996 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 12:45:55.414508 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 12:45:55.424413 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 12:45:55.434524 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 12:45:55.437733 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 12:45:55.441164 GENERIC: 0.0
1256 12:45:55.441712 GENERIC: 1.0
1257 12:45:55.444409 PCI: 00:1f.3
1258 12:45:55.454612 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 12:45:55.464554 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 12:45:55.467606 PCI: 00:1f.5
1261 12:45:55.474197 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 12:45:55.480881 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 12:45:55.481369 APIC: 00
1264 12:45:55.481748 APIC: 01
1265 12:45:55.484431 APIC: 07
1266 12:45:55.484973 APIC: 02
1267 12:45:55.485378 APIC: 04
1268 12:45:55.488013 APIC: 06
1269 12:45:55.488453 APIC: 03
1270 12:45:55.491323 APIC: 05
1271 12:45:55.497924 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 12:45:55.504117 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 12:45:55.510591 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 12:45:55.514510 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 12:45:55.520617 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 12:45:55.524196 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 12:45:55.527303 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 12:45:55.533978 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 12:45:55.543839 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 12:45:55.550491 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 12:45:55.557320 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 12:45:55.564212 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 12:45:55.570588 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 12:45:55.577219 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 12:45:55.586790 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 12:45:55.590640 DOMAIN: 0000: Resource ranges:
1287 12:45:55.593574 * Base: 1000, Size: 800, Tag: 100
1288 12:45:55.596928 * Base: 1900, Size: e700, Tag: 100
1289 12:45:55.600184 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 12:45:55.606942 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 12:45:55.617046 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 12:45:55.623797 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 12:45:55.630231 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 12:45:55.640301 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 12:45:55.646940 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 12:45:55.653877 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 12:45:55.660089 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 12:45:55.669995 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 12:45:55.676825 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 12:45:55.683537 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 12:45:55.693194 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 12:45:55.699891 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 12:45:55.706290 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 12:45:55.716325 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 12:45:55.723091 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 12:45:55.730146 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 12:45:55.739654 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 12:45:55.746271 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 12:45:55.753087 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 12:45:55.762777 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 12:45:55.769417 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 12:45:55.776392 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 12:45:55.785990 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 12:45:55.789259 DOMAIN: 0000: Resource ranges:
1315 12:45:55.792788 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 12:45:55.796083 * Base: d0000000, Size: 28000000, Tag: 200
1317 12:45:55.802981 * Base: fa000000, Size: 1000000, Tag: 200
1318 12:45:55.805893 * Base: fb001000, Size: 2fff000, Tag: 200
1319 12:45:55.809558 * Base: fe010000, Size: 2e000, Tag: 200
1320 12:45:55.812770 * Base: fe03f000, Size: d41000, Tag: 200
1321 12:45:55.819388 * Base: fed88000, Size: 8000, Tag: 200
1322 12:45:55.822747 * Base: fed93000, Size: d000, Tag: 200
1323 12:45:55.825906 * Base: feda2000, Size: 1e000, Tag: 200
1324 12:45:55.829244 * Base: fede0000, Size: 1220000, Tag: 200
1325 12:45:55.836094 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 12:45:55.842557 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 12:45:55.849164 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 12:45:55.855949 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 12:45:55.862602 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 12:45:55.868801 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 12:45:55.875603 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 12:45:55.882280 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 12:45:55.888860 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 12:45:55.895746 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 12:45:55.902501 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 12:45:55.908899 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 12:45:55.915647 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 12:45:55.922336 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 12:45:55.928627 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 12:45:55.935658 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 12:45:55.941939 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 12:45:55.948626 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 12:45:55.955506 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 12:45:55.961680 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 12:45:55.968763 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 12:45:55.974980 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 12:45:55.981704 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 12:45:55.988419 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 12:45:55.998382 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 12:45:56.001842 PCI: 00:1d.0: Resource ranges:
1351 12:45:56.005173 * Base: 7fc00000, Size: 100000, Tag: 200
1352 12:45:56.011949 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 12:45:56.018514 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 12:45:56.025171 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 12:45:56.031489 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 12:45:56.038131 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 12:45:56.044976 Root Device assign_resources, bus 0 link: 0
1358 12:45:56.048634 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 12:45:56.058148 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 12:45:56.064907 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 12:45:56.074459 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 12:45:56.081474 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 12:45:56.084779 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 12:45:56.091683 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 12:45:56.098002 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 12:45:56.107985 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 12:45:56.114634 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 12:45:56.121382 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 12:45:56.124822 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 12:45:56.134786 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 12:45:56.138062 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 12:45:56.141357 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 12:45:56.151227 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 12:45:56.158006 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 12:45:56.167812 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 12:45:56.171433 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 12:45:56.174479 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 12:45:56.184512 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 12:45:56.187985 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 12:45:56.195044 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 12:45:56.201589 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 12:45:56.208090 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 12:45:56.211544 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 12:45:56.217796 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 12:45:56.228008 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 12:45:56.234842 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 12:45:56.244345 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 12:45:56.247524 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 12:45:56.254096 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 12:45:56.260621 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 12:45:56.271028 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 12:45:56.280616 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 12:45:56.284365 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 12:45:56.293886 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 12:45:56.301039 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 12:45:56.307125 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 12:45:56.314146 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 12:45:56.320918 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 12:45:56.327175 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 12:45:56.330699 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 12:45:56.340687 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 12:45:56.343994 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 12:45:56.347146 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 12:45:56.353955 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 12:45:56.357466 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 12:45:56.363747 LPC: Trying to open IO window from 800 size 1ff
1407 12:45:56.370711 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 12:45:56.380638 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 12:45:56.387157 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 12:45:56.394204 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 12:45:56.396871 Root Device assign_resources, bus 0 link: 0
1412 12:45:56.400341 Done setting resources.
1413 12:45:56.407073 Show resources in subtree (Root Device)...After assigning values.
1414 12:45:56.410452 Root Device child on link 0 DOMAIN: 0000
1415 12:45:56.413687 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 12:45:56.423649 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 12:45:56.433578 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 12:45:56.437427 PCI: 00:00.0
1419 12:45:56.447133 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 12:45:56.453998 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 12:45:56.463735 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 12:45:56.473518 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 12:45:56.483840 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 12:45:56.494183 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 12:45:56.500145 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 12:45:56.509888 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 12:45:56.519926 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 12:45:56.529978 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 12:45:56.540070 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 12:45:56.549825 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 12:45:56.556963 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 12:45:56.566520 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 12:45:56.576546 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 12:45:56.586595 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 12:45:56.596546 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 12:45:56.603387 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 12:45:56.613258 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 12:45:56.623383 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 12:45:56.626614 PCI: 00:02.0
1440 12:45:56.636164 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 12:45:56.646617 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 12:45:56.656324 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 12:45:56.659482 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 12:45:56.669553 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 12:45:56.672937 GENERIC: 0.0
1446 12:45:56.673268 PCI: 00:05.0
1447 12:45:56.685883 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 12:45:56.689986 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 12:45:56.690389 GENERIC: 0.0
1450 12:45:56.692949 PCI: 00:08.0
1451 12:45:56.702832 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1452 12:45:56.706237 PCI: 00:0a.0
1453 12:45:56.709318 PCI: 00:0d.0 child on link 0 USB0 port 0
1454 12:45:56.719267 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1455 12:45:56.722786 USB0 port 0 child on link 0 USB3 port 0
1456 12:45:56.726155 USB3 port 0
1457 12:45:56.726593 USB3 port 1
1458 12:45:56.729596 USB3 port 2
1459 12:45:56.732675 USB3 port 3
1460 12:45:56.735985 PCI: 00:14.0 child on link 0 USB0 port 0
1461 12:45:56.745992 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1462 12:45:56.749290 USB0 port 0 child on link 0 USB2 port 0
1463 12:45:56.752591 USB2 port 0
1464 12:45:56.753024 USB2 port 1
1465 12:45:56.755952 USB2 port 2
1466 12:45:56.756389 USB2 port 3
1467 12:45:56.759268 USB2 port 4
1468 12:45:56.759706 USB2 port 5
1469 12:45:56.762827 USB2 port 6
1470 12:45:56.766296 USB2 port 7
1471 12:45:56.766730 USB2 port 8
1472 12:45:56.769387 USB2 port 9
1473 12:45:56.769826 USB3 port 0
1474 12:45:56.772608 USB3 port 1
1475 12:45:56.773044 USB3 port 2
1476 12:45:56.776259 USB3 port 3
1477 12:45:56.776700 PCI: 00:14.2
1478 12:45:56.786002 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1479 12:45:56.796354 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1480 12:45:56.802503 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1481 12:45:56.812486 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1482 12:45:56.812942 GENERIC: 0.0
1483 12:45:56.818994 PCI: 00:15.0 child on link 0 I2C: 00:1a
1484 12:45:56.829155 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1485 12:45:56.829598 I2C: 00:1a
1486 12:45:56.832362 I2C: 00:31
1487 12:45:56.832796 I2C: 00:32
1488 12:45:56.838988 PCI: 00:15.1 child on link 0 I2C: 00:10
1489 12:45:56.849009 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1490 12:45:56.849538 I2C: 00:10
1491 12:45:56.852574 PCI: 00:15.2
1492 12:45:56.862179 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1493 12:45:56.862678 PCI: 00:15.3
1494 12:45:56.872289 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1495 12:45:56.875612 PCI: 00:16.0
1496 12:45:56.885847 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1497 12:45:56.888744 PCI: 00:19.0
1498 12:45:56.892552 PCI: 00:19.1 child on link 0 I2C: 00:15
1499 12:45:56.902168 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1500 12:45:56.902669 I2C: 00:15
1501 12:45:56.908817 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1502 12:45:56.919065 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1503 12:45:56.928899 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1504 12:45:56.938803 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1505 12:45:56.942254 GENERIC: 0.0
1506 12:45:56.942734 PCI: 01:00.0
1507 12:45:56.952269 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 12:45:56.964952 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1509 12:45:56.975145 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1510 12:45:56.975582 PCI: 00:1e.0
1511 12:45:56.988498 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1512 12:45:56.991980 PCI: 00:1e.2 child on link 0 SPI: 00
1513 12:45:57.001680 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1514 12:45:57.002209 SPI: 00
1515 12:45:57.005055 PCI: 00:1e.3 child on link 0 SPI: 00
1516 12:45:57.018454 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1517 12:45:57.018893 SPI: 00
1518 12:45:57.021962 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1519 12:45:57.031635 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1520 12:45:57.032069 PNP: 0c09.0
1521 12:45:57.041819 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1522 12:45:57.044926 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1523 12:45:57.054625 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 12:45:57.064675 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1525 12:45:57.068281 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1526 12:45:57.071389 GENERIC: 0.0
1527 12:45:57.074957 GENERIC: 1.0
1528 12:45:57.075391 PCI: 00:1f.3
1529 12:45:57.084672 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1530 12:45:57.094842 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1531 12:45:57.098142 PCI: 00:1f.5
1532 12:45:57.107907 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1533 12:45:57.111341 CPU_CLUSTER: 0 child on link 0 APIC: 00
1534 12:45:57.114754 APIC: 00
1535 12:45:57.115186 APIC: 01
1536 12:45:57.115578 APIC: 07
1537 12:45:57.117889 APIC: 02
1538 12:45:57.118322 APIC: 04
1539 12:45:57.121248 APIC: 06
1540 12:45:57.121682 APIC: 03
1541 12:45:57.122020 APIC: 05
1542 12:45:57.124665 Done allocating resources.
1543 12:45:57.131224 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1544 12:45:57.138172 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 12:45:57.141421 Configure GPIOs for I2S audio on UP4.
1546 12:45:57.147870 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 12:45:57.151164 Enabling resources...
1548 12:45:57.155134 PCI: 00:00.0 subsystem <- 8086/9a12
1549 12:45:57.157753 PCI: 00:00.0 cmd <- 06
1550 12:45:57.161346 PCI: 00:02.0 subsystem <- 8086/9a40
1551 12:45:57.164387 PCI: 00:02.0 cmd <- 03
1552 12:45:57.167509 PCI: 00:04.0 subsystem <- 8086/9a03
1553 12:45:57.167941 PCI: 00:04.0 cmd <- 02
1554 12:45:57.174449 PCI: 00:05.0 subsystem <- 8086/9a19
1555 12:45:57.174886 PCI: 00:05.0 cmd <- 02
1556 12:45:57.177424 PCI: 00:08.0 subsystem <- 8086/9a11
1557 12:45:57.180929 PCI: 00:08.0 cmd <- 06
1558 12:45:57.184120 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 12:45:57.187648 PCI: 00:0d.0 cmd <- 02
1560 12:45:57.190850 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 12:45:57.194507 PCI: 00:14.0 cmd <- 02
1562 12:45:57.198143 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 12:45:57.200979 PCI: 00:14.2 cmd <- 02
1564 12:45:57.204376 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 12:45:57.207384 PCI: 00:14.3 cmd <- 02
1566 12:45:57.210812 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 12:45:57.214029 PCI: 00:15.0 cmd <- 02
1568 12:45:57.217567 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 12:45:57.218045 PCI: 00:15.1 cmd <- 02
1570 12:45:57.224132 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 12:45:57.224567 PCI: 00:15.2 cmd <- 02
1572 12:45:57.227154 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 12:45:57.230756 PCI: 00:15.3 cmd <- 02
1574 12:45:57.234072 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 12:45:57.237682 PCI: 00:16.0 cmd <- 02
1576 12:45:57.240651 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 12:45:57.244201 PCI: 00:19.1 cmd <- 02
1578 12:45:57.247381 PCI: 00:1d.0 bridge ctrl <- 0013
1579 12:45:57.250830 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 12:45:57.254395 PCI: 00:1d.0 cmd <- 06
1581 12:45:57.257406 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 12:45:57.260483 PCI: 00:1e.0 cmd <- 06
1583 12:45:57.264082 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 12:45:57.264517 PCI: 00:1e.2 cmd <- 06
1585 12:45:57.270448 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 12:45:57.270873 PCI: 00:1e.3 cmd <- 02
1587 12:45:57.273781 PCI: 00:1f.0 subsystem <- 8086/a087
1588 12:45:57.277607 PCI: 00:1f.0 cmd <- 407
1589 12:45:57.280765 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 12:45:57.284000 PCI: 00:1f.3 cmd <- 02
1591 12:45:57.287526 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 12:45:57.290611 PCI: 00:1f.5 cmd <- 406
1593 12:45:57.294584 PCI: 01:00.0 cmd <- 02
1594 12:45:57.299317 done.
1595 12:45:57.303032 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 12:45:57.305802 Initializing devices...
1597 12:45:57.309266 Root Device init
1598 12:45:57.312694 Chrome EC: Set SMI mask to 0x0000000000000000
1599 12:45:57.319210 Chrome EC: clear events_b mask to 0x0000000000000000
1600 12:45:57.325779 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 12:45:57.328969 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 12:45:57.335583 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 12:45:57.342449 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 12:45:57.345741 fw_config match found: DB_USB=USB3_ACTIVE
1605 12:45:57.352538 Configure Right Type-C port orientation for retimer
1606 12:45:57.356018 Root Device init finished in 42 msecs
1607 12:45:57.358878 PCI: 00:00.0 init
1608 12:45:57.359312 CPU TDP = 9 Watts
1609 12:45:57.362496 CPU PL1 = 9 Watts
1610 12:45:57.365606 CPU PL2 = 40 Watts
1611 12:45:57.366053 CPU PL4 = 83 Watts
1612 12:45:57.369117 PCI: 00:00.0 init finished in 8 msecs
1613 12:45:57.372125 PCI: 00:02.0 init
1614 12:45:57.375502 GMA: Found VBT in CBFS
1615 12:45:57.378679 GMA: Found valid VBT in CBFS
1616 12:45:57.382208 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 12:45:57.392378 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 12:45:57.395249 PCI: 00:02.0 init finished in 18 msecs
1619 12:45:57.399140 PCI: 00:05.0 init
1620 12:45:57.401861 PCI: 00:05.0 init finished in 0 msecs
1621 12:45:57.402286 PCI: 00:08.0 init
1622 12:45:57.408394 PCI: 00:08.0 init finished in 0 msecs
1623 12:45:57.408819 PCI: 00:14.0 init
1624 12:45:57.414872 PCI: 00:14.0 init finished in 0 msecs
1625 12:45:57.415309 PCI: 00:14.2 init
1626 12:45:57.418597 PCI: 00:14.2 init finished in 0 msecs
1627 12:45:57.422300 PCI: 00:15.0 init
1628 12:45:57.425926 I2C bus 0 version 0x3230302a
1629 12:45:57.429152 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 12:45:57.432778 PCI: 00:15.0 init finished in 6 msecs
1631 12:45:57.436098 PCI: 00:15.1 init
1632 12:45:57.438955 I2C bus 1 version 0x3230302a
1633 12:45:57.442462 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 12:45:57.445651 PCI: 00:15.1 init finished in 6 msecs
1635 12:45:57.449048 PCI: 00:15.2 init
1636 12:45:57.452551 I2C bus 2 version 0x3230302a
1637 12:45:57.455683 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 12:45:57.458740 PCI: 00:15.2 init finished in 6 msecs
1639 12:45:57.459166 PCI: 00:15.3 init
1640 12:45:57.462065 I2C bus 3 version 0x3230302a
1641 12:45:57.465529 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 12:45:57.472040 PCI: 00:15.3 init finished in 6 msecs
1643 12:45:57.472572 PCI: 00:16.0 init
1644 12:45:57.475672 PCI: 00:16.0 init finished in 0 msecs
1645 12:45:57.479095 PCI: 00:19.1 init
1646 12:45:57.482410 I2C bus 5 version 0x3230302a
1647 12:45:57.485624 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 12:45:57.489042 PCI: 00:19.1 init finished in 6 msecs
1649 12:45:57.492317 PCI: 00:1d.0 init
1650 12:45:57.495835 Initializing PCH PCIe bridge.
1651 12:45:57.498959 PCI: 00:1d.0 init finished in 3 msecs
1652 12:45:57.502640 PCI: 00:1f.0 init
1653 12:45:57.505608 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 12:45:57.508909 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 12:45:57.512370 IOAPIC: ID = 0x02
1656 12:45:57.516159 IOAPIC: Dumping registers
1657 12:45:57.518988 reg 0x0000: 0x02000000
1658 12:45:57.519516 reg 0x0001: 0x00770020
1659 12:45:57.522722 reg 0x0002: 0x00000000
1660 12:45:57.525615 PCI: 00:1f.0 init finished in 21 msecs
1661 12:45:57.528769 PCI: 00:1f.2 init
1662 12:45:57.532668 Disabling ACPI via APMC.
1663 12:45:57.535748 APMC done.
1664 12:45:57.539345 PCI: 00:1f.2 init finished in 5 msecs
1665 12:45:57.550779 PCI: 01:00.0 init
1666 12:45:57.554070 PCI: 01:00.0 init finished in 0 msecs
1667 12:45:57.557589 PNP: 0c09.0 init
1668 12:45:57.560625 Google Chrome EC uptime: 8.348 seconds
1669 12:45:57.567455 Google Chrome AP resets since EC boot: 1
1670 12:45:57.570952 Google Chrome most recent AP reset causes:
1671 12:45:57.574541 0.347: 32775 shutdown: entering G3
1672 12:45:57.580207 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1673 12:45:57.583603 PNP: 0c09.0 init finished in 22 msecs
1674 12:45:57.589406 Devices initialized
1675 12:45:57.592693 Show all devs... After init.
1676 12:45:57.595919 Root Device: enabled 1
1677 12:45:57.596353 DOMAIN: 0000: enabled 1
1678 12:45:57.599479 CPU_CLUSTER: 0: enabled 1
1679 12:45:57.602768 PCI: 00:00.0: enabled 1
1680 12:45:57.605740 PCI: 00:02.0: enabled 1
1681 12:45:57.606187 PCI: 00:04.0: enabled 1
1682 12:45:57.609707 PCI: 00:05.0: enabled 1
1683 12:45:57.612906 PCI: 00:06.0: enabled 0
1684 12:45:57.616590 PCI: 00:07.0: enabled 0
1685 12:45:57.617212 PCI: 00:07.1: enabled 0
1686 12:45:57.619499 PCI: 00:07.2: enabled 0
1687 12:45:57.622502 PCI: 00:07.3: enabled 0
1688 12:45:57.625962 PCI: 00:08.0: enabled 1
1689 12:45:57.626397 PCI: 00:09.0: enabled 0
1690 12:45:57.629042 PCI: 00:0a.0: enabled 0
1691 12:45:57.632457 PCI: 00:0d.0: enabled 1
1692 12:45:57.636113 PCI: 00:0d.1: enabled 0
1693 12:45:57.636548 PCI: 00:0d.2: enabled 0
1694 12:45:57.639555 PCI: 00:0d.3: enabled 0
1695 12:45:57.642445 PCI: 00:0e.0: enabled 0
1696 12:45:57.642885 PCI: 00:10.2: enabled 1
1697 12:45:57.646182 PCI: 00:10.6: enabled 0
1698 12:45:57.649397 PCI: 00:10.7: enabled 0
1699 12:45:57.652498 PCI: 00:12.0: enabled 0
1700 12:45:57.652952 PCI: 00:12.6: enabled 0
1701 12:45:57.655803 PCI: 00:13.0: enabled 0
1702 12:45:57.658976 PCI: 00:14.0: enabled 1
1703 12:45:57.662551 PCI: 00:14.1: enabled 0
1704 12:45:57.663093 PCI: 00:14.2: enabled 1
1705 12:45:57.666002 PCI: 00:14.3: enabled 1
1706 12:45:57.669130 PCI: 00:15.0: enabled 1
1707 12:45:57.672441 PCI: 00:15.1: enabled 1
1708 12:45:57.672872 PCI: 00:15.2: enabled 1
1709 12:45:57.675629 PCI: 00:15.3: enabled 1
1710 12:45:57.679319 PCI: 00:16.0: enabled 1
1711 12:45:57.682569 PCI: 00:16.1: enabled 0
1712 12:45:57.683004 PCI: 00:16.2: enabled 0
1713 12:45:57.685618 PCI: 00:16.3: enabled 0
1714 12:45:57.688862 PCI: 00:16.4: enabled 0
1715 12:45:57.689316 PCI: 00:16.5: enabled 0
1716 12:45:57.692466 PCI: 00:17.0: enabled 0
1717 12:45:57.695922 PCI: 00:19.0: enabled 0
1718 12:45:57.699007 PCI: 00:19.1: enabled 1
1719 12:45:57.699448 PCI: 00:19.2: enabled 0
1720 12:45:57.702669 PCI: 00:1c.0: enabled 1
1721 12:45:57.705885 PCI: 00:1c.1: enabled 0
1722 12:45:57.709419 PCI: 00:1c.2: enabled 0
1723 12:45:57.709971 PCI: 00:1c.3: enabled 0
1724 12:45:57.712737 PCI: 00:1c.4: enabled 0
1725 12:45:57.715902 PCI: 00:1c.5: enabled 0
1726 12:45:57.719216 PCI: 00:1c.6: enabled 1
1727 12:45:57.719767 PCI: 00:1c.7: enabled 0
1728 12:45:57.722946 PCI: 00:1d.0: enabled 1
1729 12:45:57.725717 PCI: 00:1d.1: enabled 0
1730 12:45:57.726157 PCI: 00:1d.2: enabled 1
1731 12:45:57.728948 PCI: 00:1d.3: enabled 0
1732 12:45:57.732255 PCI: 00:1e.0: enabled 1
1733 12:45:57.735658 PCI: 00:1e.1: enabled 0
1734 12:45:57.736135 PCI: 00:1e.2: enabled 1
1735 12:45:57.738823 PCI: 00:1e.3: enabled 1
1736 12:45:57.742010 PCI: 00:1f.0: enabled 1
1737 12:45:57.745631 PCI: 00:1f.1: enabled 0
1738 12:45:57.746116 PCI: 00:1f.2: enabled 1
1739 12:45:57.748852 PCI: 00:1f.3: enabled 1
1740 12:45:57.752234 PCI: 00:1f.4: enabled 0
1741 12:45:57.755332 PCI: 00:1f.5: enabled 1
1742 12:45:57.755849 PCI: 00:1f.6: enabled 0
1743 12:45:57.758520 PCI: 00:1f.7: enabled 0
1744 12:45:57.761936 APIC: 00: enabled 1
1745 12:45:57.762423 GENERIC: 0.0: enabled 1
1746 12:45:57.765262 GENERIC: 0.0: enabled 1
1747 12:45:57.768486 GENERIC: 1.0: enabled 1
1748 12:45:57.772109 GENERIC: 0.0: enabled 1
1749 12:45:57.772550 GENERIC: 1.0: enabled 1
1750 12:45:57.775464 USB0 port 0: enabled 1
1751 12:45:57.778807 GENERIC: 0.0: enabled 1
1752 12:45:57.781947 USB0 port 0: enabled 1
1753 12:45:57.782390 GENERIC: 0.0: enabled 1
1754 12:45:57.785304 I2C: 00:1a: enabled 1
1755 12:45:57.788632 I2C: 00:31: enabled 1
1756 12:45:57.789090 I2C: 00:32: enabled 1
1757 12:45:57.791903 I2C: 00:10: enabled 1
1758 12:45:57.795288 I2C: 00:15: enabled 1
1759 12:45:57.795730 GENERIC: 0.0: enabled 0
1760 12:45:57.798560 GENERIC: 1.0: enabled 0
1761 12:45:57.801707 GENERIC: 0.0: enabled 1
1762 12:45:57.802151 SPI: 00: enabled 1
1763 12:45:57.805055 SPI: 00: enabled 1
1764 12:45:57.808641 PNP: 0c09.0: enabled 1
1765 12:45:57.809105 GENERIC: 0.0: enabled 1
1766 12:45:57.811859 USB3 port 0: enabled 1
1767 12:45:57.815430 USB3 port 1: enabled 1
1768 12:45:57.818590 USB3 port 2: enabled 0
1769 12:45:57.819130 USB3 port 3: enabled 0
1770 12:45:57.822177 USB2 port 0: enabled 0
1771 12:45:57.825185 USB2 port 1: enabled 1
1772 12:45:57.825627 USB2 port 2: enabled 1
1773 12:45:57.828620 USB2 port 3: enabled 0
1774 12:45:57.831760 USB2 port 4: enabled 1
1775 12:45:57.835140 USB2 port 5: enabled 0
1776 12:45:57.835577 USB2 port 6: enabled 0
1777 12:45:57.838609 USB2 port 7: enabled 0
1778 12:45:57.842129 USB2 port 8: enabled 0
1779 12:45:57.842568 USB2 port 9: enabled 0
1780 12:45:57.844911 USB3 port 0: enabled 0
1781 12:45:57.848086 USB3 port 1: enabled 1
1782 12:45:57.848527 USB3 port 2: enabled 0
1783 12:45:57.851541 USB3 port 3: enabled 0
1784 12:45:57.854761 GENERIC: 0.0: enabled 1
1785 12:45:57.858085 GENERIC: 1.0: enabled 1
1786 12:45:57.858527 APIC: 01: enabled 1
1787 12:45:57.861804 APIC: 07: enabled 1
1788 12:45:57.862248 APIC: 02: enabled 1
1789 12:45:57.864972 APIC: 04: enabled 1
1790 12:45:57.868180 APIC: 06: enabled 1
1791 12:45:57.868625 APIC: 03: enabled 1
1792 12:45:57.871376 APIC: 05: enabled 1
1793 12:45:57.875296 PCI: 01:00.0: enabled 1
1794 12:45:57.877963 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1795 12:45:57.884733 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1796 12:45:57.888126 ELOG: NV offset 0xf30000 size 0x1000
1797 12:45:57.894787 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1798 12:45:57.901499 ELOG: Event(17) added with size 13 at 2022-07-14 12:43:26 UTC
1799 12:45:57.907767 ELOG: Event(92) added with size 9 at 2022-07-14 12:43:26 UTC
1800 12:45:57.914549 ELOG: Event(93) added with size 9 at 2022-07-14 12:43:26 UTC
1801 12:45:57.921144 ELOG: Event(9E) added with size 10 at 2022-07-14 12:43:26 UTC
1802 12:45:57.928247 ELOG: Event(9F) added with size 14 at 2022-07-14 12:43:26 UTC
1803 12:45:57.934620 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1804 12:45:57.937702 ELOG: Event(A1) added with size 10 at 2022-07-14 12:43:26 UTC
1805 12:45:57.944336 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1806 12:45:57.951494 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1807 12:45:57.954190 Finalize devices...
1808 12:45:57.954637 Devices finalized
1809 12:45:57.961106 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1810 12:45:57.967607 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1811 12:45:57.970786 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1812 12:45:57.977720 ME: HFSTS1 : 0x80030055
1813 12:45:57.980843 ME: HFSTS2 : 0x30280116
1814 12:45:57.984512 ME: HFSTS3 : 0x00000050
1815 12:45:57.990922 ME: HFSTS4 : 0x00004000
1816 12:45:57.994178 ME: HFSTS5 : 0x00000000
1817 12:45:57.997408 ME: HFSTS6 : 0x00400006
1818 12:45:58.003974 ME: Manufacturing Mode : YES
1819 12:45:58.007499 ME: SPI Protection Mode Enabled : NO
1820 12:45:58.010798 ME: FW Partition Table : OK
1821 12:45:58.014217 ME: Bringup Loader Failure : NO
1822 12:45:58.017165 ME: Firmware Init Complete : NO
1823 12:45:58.020752 ME: Boot Options Present : NO
1824 12:45:58.024141 ME: Update In Progress : NO
1825 12:45:58.027141 ME: D0i3 Support : YES
1826 12:45:58.034209 ME: Low Power State Enabled : NO
1827 12:45:58.037050 ME: CPU Replaced : YES
1828 12:45:58.040366 ME: CPU Replacement Valid : YES
1829 12:45:58.044375 ME: Current Working State : 5
1830 12:45:58.047726 ME: Current Operation State : 1
1831 12:45:58.050560 ME: Current Operation Mode : 3
1832 12:45:58.054146 ME: Error Code : 0
1833 12:45:58.057051 ME: Enhanced Debug Mode : NO
1834 12:45:58.060585 ME: CPU Debug Disabled : YES
1835 12:45:58.067367 ME: TXT Support : NO
1836 12:45:58.070517 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1837 12:45:58.080422 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1838 12:45:58.083783 CBFS: 'fallback/slic' not found.
1839 12:45:58.087227 ACPI: Writing ACPI tables at 76b01000.
1840 12:45:58.087667 ACPI: * FACS
1841 12:45:58.090346 ACPI: * DSDT
1842 12:45:58.093688 Ramoops buffer: 0x100000@0x76a00000.
1843 12:45:58.097173 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1844 12:45:58.103669 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1845 12:45:58.107121 Google Chrome EC: version:
1846 12:45:58.110688 ro: voema_v2.0.7540-147f8d37d1
1847 12:45:58.113591 rw: voema_v2.0.7540-147f8d37d1
1848 12:45:58.114030 running image: 2
1849 12:45:58.120042 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1850 12:45:58.125514 ACPI: * FADT
1851 12:45:58.125971 SCI is IRQ9
1852 12:45:58.131890 ACPI: added table 1/32, length now 40
1853 12:45:58.132347 ACPI: * SSDT
1854 12:45:58.135183 Found 1 CPU(s) with 8 core(s) each.
1855 12:45:58.141863 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1856 12:45:58.145145 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1857 12:45:58.148618 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1858 12:45:58.152235 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1859 12:45:58.158578 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1860 12:45:58.165051 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1861 12:45:58.168362 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1862 12:45:58.175484 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1863 12:45:58.181766 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1864 12:45:58.185333 \_SB.PCI0.RP09: Added StorageD3Enable property
1865 12:45:58.188696 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1866 12:45:58.195149 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1867 12:45:58.202049 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1868 12:45:58.205171 PS2K: Passing 80 keymaps to kernel
1869 12:45:58.211915 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1870 12:45:58.218785 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1871 12:45:58.225194 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1872 12:45:58.231642 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1873 12:45:58.238242 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1874 12:45:58.244864 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1875 12:45:58.251489 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1876 12:45:58.258098 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1877 12:45:58.261481 ACPI: added table 2/32, length now 44
1878 12:45:58.261936 ACPI: * MCFG
1879 12:45:58.267838 ACPI: added table 3/32, length now 48
1880 12:45:58.268276 ACPI: * TPM2
1881 12:45:58.271553 TPM2 log created at 0x769f0000
1882 12:45:58.274571 ACPI: added table 4/32, length now 52
1883 12:45:58.278134 ACPI: * MADT
1884 12:45:58.278588 SCI is IRQ9
1885 12:45:58.281664 ACPI: added table 5/32, length now 56
1886 12:45:58.284504 current = 76b09850
1887 12:45:58.284937 ACPI: * DMAR
1888 12:45:58.288194 ACPI: added table 6/32, length now 60
1889 12:45:58.294613 ACPI: added table 7/32, length now 64
1890 12:45:58.295159 ACPI: * HPET
1891 12:45:58.297789 ACPI: added table 8/32, length now 68
1892 12:45:58.301384 ACPI: done.
1893 12:45:58.301818 ACPI tables: 35216 bytes.
1894 12:45:58.304692 smbios_write_tables: 769ef000
1895 12:45:58.308247 EC returned error result code 3
1896 12:45:58.311655 Couldn't obtain OEM name from CBI
1897 12:45:58.314615 Create SMBIOS type 16
1898 12:45:58.318196 Create SMBIOS type 17
1899 12:45:58.321312 GENERIC: 0.0 (WIFI Device)
1900 12:45:58.321747 SMBIOS tables: 1750 bytes.
1901 12:45:58.327834 Writing table forward entry at 0x00000500
1902 12:45:58.334819 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1903 12:45:58.338122 Writing coreboot table at 0x76b25000
1904 12:45:58.344655 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1905 12:45:58.347604 1. 0000000000001000-000000000009ffff: RAM
1906 12:45:58.351168 2. 00000000000a0000-00000000000fffff: RESERVED
1907 12:45:58.357784 3. 0000000000100000-00000000769eefff: RAM
1908 12:45:58.361265 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1909 12:45:58.367799 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1910 12:45:58.374545 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1911 12:45:58.377525 7. 0000000077000000-000000007fbfffff: RESERVED
1912 12:45:58.380965 8. 00000000c0000000-00000000cfffffff: RESERVED
1913 12:45:58.387650 9. 00000000f8000000-00000000f9ffffff: RESERVED
1914 12:45:58.391159 10. 00000000fb000000-00000000fb000fff: RESERVED
1915 12:45:58.397519 11. 00000000fe000000-00000000fe00ffff: RESERVED
1916 12:45:58.400834 12. 00000000fed80000-00000000fed87fff: RESERVED
1917 12:45:58.407503 13. 00000000fed90000-00000000fed92fff: RESERVED
1918 12:45:58.410911 14. 00000000feda0000-00000000feda1fff: RESERVED
1919 12:45:58.417315 15. 00000000fedc0000-00000000feddffff: RESERVED
1920 12:45:58.421128 16. 0000000100000000-00000002803fffff: RAM
1921 12:45:58.424167 Passing 4 GPIOs to payload:
1922 12:45:58.427808 NAME | PORT | POLARITY | VALUE
1923 12:45:58.433909 lid | undefined | high | high
1924 12:45:58.437676 power | undefined | high | low
1925 12:45:58.444566 oprom | undefined | high | low
1926 12:45:58.450695 EC in RW | 0x000000e5 | high | high
1927 12:45:58.457315 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a5ea
1928 12:45:58.457753 coreboot table: 1576 bytes.
1929 12:45:58.463935 IMD ROOT 0. 0x76fff000 0x00001000
1930 12:45:58.467399 IMD SMALL 1. 0x76ffe000 0x00001000
1931 12:45:58.470830 FSP MEMORY 2. 0x76c4e000 0x003b0000
1932 12:45:58.474158 VPD 3. 0x76c4d000 0x00000367
1933 12:45:58.477185 RO MCACHE 4. 0x76c4c000 0x00000fdc
1934 12:45:58.481243 CONSOLE 5. 0x76c2c000 0x00020000
1935 12:45:58.484035 FMAP 6. 0x76c2b000 0x00000578
1936 12:45:58.487813 TIME STAMP 7. 0x76c2a000 0x00000910
1937 12:45:58.490685 VBOOT WORK 8. 0x76c16000 0x00014000
1938 12:45:58.497310 ROMSTG STCK 9. 0x76c15000 0x00001000
1939 12:45:58.500645 AFTER CAR 10. 0x76c0a000 0x0000b000
1940 12:45:58.504272 RAMSTAGE 11. 0x76b97000 0x00073000
1941 12:45:58.507334 REFCODE 12. 0x76b42000 0x00055000
1942 12:45:58.511068 SMM BACKUP 13. 0x76b32000 0x00010000
1943 12:45:58.514210 4f444749 14. 0x76b30000 0x00002000
1944 12:45:58.517469 EXT VBT15. 0x76b2d000 0x0000219f
1945 12:45:58.520491 COREBOOT 16. 0x76b25000 0x00008000
1946 12:45:58.523800 ACPI 17. 0x76b01000 0x00024000
1947 12:45:58.530553 ACPI GNVS 18. 0x76b00000 0x00001000
1948 12:45:58.533847 RAMOOPS 19. 0x76a00000 0x00100000
1949 12:45:58.537670 TPM2 TCGLOG20. 0x769f0000 0x00010000
1950 12:45:58.540447 SMBIOS 21. 0x769ef000 0x00000800
1951 12:45:58.540885 IMD small region:
1952 12:45:58.547800 IMD ROOT 0. 0x76ffec00 0x00000400
1953 12:45:58.550732 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1954 12:45:58.554241 POWER STATE 2. 0x76ffeb80 0x00000044
1955 12:45:58.557492 ROMSTAGE 3. 0x76ffeb60 0x00000004
1956 12:45:58.560829 MEM INFO 4. 0x76ffe980 0x000001e0
1957 12:45:58.567480 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1958 12:45:58.570380 MTRR: Physical address space:
1959 12:45:58.577779 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1960 12:45:58.584111 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1961 12:45:58.590585 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1962 12:45:58.597180 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1963 12:45:58.600657 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1964 12:45:58.607651 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1965 12:45:58.614031 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1966 12:45:58.617001 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 12:45:58.624286 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 12:45:58.627085 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 12:45:58.630549 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 12:45:58.633567 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 12:45:58.640506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 12:45:58.643706 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 12:45:58.647300 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 12:45:58.650189 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 12:45:58.656891 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 12:45:58.660404 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 12:45:58.663422 call enable_fixed_mtrr()
1978 12:45:58.666893 CPU physical address size: 39 bits
1979 12:45:58.670444 MTRR: default type WB/UC MTRR counts: 6/6.
1980 12:45:58.673684 MTRR: UC selected as default type.
1981 12:45:58.680060 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1982 12:45:58.686861 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1983 12:45:58.693528 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1984 12:45:58.700394 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1985 12:45:58.706850 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1986 12:45:58.713392 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1987 12:45:58.717279 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:45:58.722957 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 12:45:58.726678 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:45:58.729948 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:45:58.733459 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:45:58.736587 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:45:58.743017 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:45:58.746469 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:45:58.749855 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:45:58.752876 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:45:58.759745 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:45:58.763231 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 12:45:58.766348 call enable_fixed_mtrr()
2000 12:45:58.769741 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 12:45:58.773030 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 12:45:58.779593 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 12:45:58.782939 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 12:45:58.786298 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 12:45:58.789599 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 12:45:58.796362 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 12:45:58.799976 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 12:45:58.802683 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 12:45:58.806315 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 12:45:58.810437 CPU physical address size: 39 bits
2011 12:45:58.816729 call enable_fixed_mtrr()
2012 12:45:58.820436 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 12:45:58.823292 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 12:45:58.826638 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 12:45:58.833576 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 12:45:58.836548 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 12:45:58.840403 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 12:45:58.843423 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 12:45:58.847046 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 12:45:58.853720 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 12:45:58.856334 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 12:45:58.859758 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 12:45:58.863281 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 12:45:58.870799 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:45:58.871265 call enable_fixed_mtrr()
2026 12:45:58.877517 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:45:58.880583 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:45:58.884046 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:45:58.887322 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:45:58.894228 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:45:58.897272 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:45:58.900667 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:45:58.903787 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:45:58.910358 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:45:58.913746 CPU physical address size: 39 bits
2036 12:45:58.917161 call enable_fixed_mtrr()
2037 12:45:58.920629 CPU physical address size: 39 bits
2038 12:45:58.923771 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 12:45:58.924227
2040 12:45:58.926917 MTRR check
2041 12:45:58.930623 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 12:45:58.933885 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 12:45:58.937836 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 12:45:58.943752 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 12:45:58.946863 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 12:45:58.950286 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 12:45:58.953626 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 12:45:58.960431 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 12:45:58.963527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 12:45:58.967255 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 12:45:58.973723 Fixed MTRRs : call enable_fixed_mtrr()
2052 12:45:58.974170 Enabled
2053 12:45:58.976723 Variable MTRRs: Enabled
2054 12:45:58.977218
2055 12:45:58.980449 CPU physical address size: 39 bits
2056 12:45:58.986656 BS: BS_WRITE_TABLES exit times (exec / console): 257 / 151 ms
2057 12:45:58.990711 CPU physical address size: 39 bits
2058 12:45:58.993472 MTRR: Fixed MSR 0x250 0x0606060606060606
2059 12:45:58.996795 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 12:45:59.003299 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 12:45:59.006664 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 12:45:59.010221 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 12:45:59.013636 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 12:45:59.019926 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 12:45:59.023407 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 12:45:59.026538 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 12:45:59.030037 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 12:45:59.036697 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 12:45:59.040095 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 12:45:59.043470 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 12:45:59.046493 call enable_fixed_mtrr()
2072 12:45:59.050103 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 12:45:59.056601 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 12:45:59.059977 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 12:45:59.063128 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 12:45:59.066562 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 12:45:59.073137 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 12:45:59.076262 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 12:45:59.079871 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 12:45:59.083100 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 12:45:59.089963 CPU physical address size: 39 bits
2082 12:45:59.093385 call enable_fixed_mtrr()
2083 12:45:59.097526 Checking cr50 for pending updates
2084 12:45:59.100889 CPU physical address size: 39 bits
2085 12:45:59.104073 Reading cr50 TPM mode
2086 12:45:59.113128 BS: BS_PAYLOAD_LOAD entry times (exec / console): 115 / 6 ms
2087 12:45:59.122784 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2088 12:45:59.126096 Checking segment from ROM address 0xffc02b38
2089 12:45:59.129473 Checking segment from ROM address 0xffc02b54
2090 12:45:59.136010 Loading segment from ROM address 0xffc02b38
2091 12:45:59.136465 code (compression=0)
2092 12:45:59.146365 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2093 12:45:59.156046 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2094 12:45:59.156541 it's not compressed!
2095 12:45:59.295751 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2096 12:45:59.302501 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2097 12:45:59.308955 Loading segment from ROM address 0xffc02b54
2098 12:45:59.309518 Entry Point 0x30000000
2099 12:45:59.312568 Loaded segments
2100 12:45:59.318624 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2101 12:45:59.361732 Finalizing chipset.
2102 12:45:59.364846 Finalizing SMM.
2103 12:45:59.365347 APMC done.
2104 12:45:59.371605 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2105 12:45:59.375029 mp_park_aps done after 0 msecs.
2106 12:45:59.378194 Jumping to boot code at 0x30000000(0x76b25000)
2107 12:45:59.388514 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2108 12:45:59.388969
2109 12:45:59.391684 Starting depthcharge on Voema...
2110 12:45:59.392771 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2111 12:45:59.393402 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2112 12:45:59.393877 Setting prompt string to ['volteer:']
2113 12:45:59.394385 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2114 12:45:59.401996 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2115 12:45:59.408412 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2116 12:45:59.411829 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2117 12:45:59.415873 Failed to find eMMC card reader
2118 12:45:59.419529 Wipe memory regions:
2119 12:45:59.422238 [0x00000000001000, 0x000000000a0000)
2120 12:45:59.425911 [0x00000000100000, 0x00000030000000)
2121 12:45:59.457376 [0x00000032662db0, 0x000000769ef000)
2122 12:45:59.496726 [0x00000100000000, 0x00000280400000)
2123 12:45:59.702106 ec_init: CrosEC protocol v3 supported (256, 256)
2124 12:45:59.709279 update_port_state: port C0 state: usb enable 1 mux conn 0
2125 12:45:59.715803 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2126 12:45:59.723451 pmc_check_ipc_sts: STS_BUSY done after 1582 us
2127 12:45:59.727396 send_conn_disc_msg: pmc_send_cmd succeeded
2128 12:46:00.159465 R8152: Initializing
2129 12:46:00.162508 Version 6 (ocp_data = 5c30)
2130 12:46:00.166016 R8152: Done initializing
2131 12:46:00.168979 Adding net device
2132 12:46:00.476543 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 12:46:00.477135
2134 12:46:00.479749 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2136 12:46:00.581257 volteer: tftpboot 192.168.201.1 6819487/tftp-deploy-6m8jmv5x/kernel/bzImage 6819487/tftp-deploy-6m8jmv5x/kernel/cmdline 6819487/tftp-deploy-6m8jmv5x/ramdisk/ramdisk.cpio.gz
2137 12:46:00.581895 Setting prompt string to ['Starting kernel']
2138 12:46:00.582386 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2139 12:46:00.582777 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:42)
2140 12:46:00.586686 tftpboot 192.168.201.1 6819487/tftp-deploy-6m8jmv5x/kernel/bzImoy-6m8jmv5x/kernel/cmdline 6819487/tftp-deploy-6m8jmv5x/ramdisk/ramdisk.cpio.gz
2141 12:46:00.587156 Waiting for link
2142 12:46:00.790140 done.
2143 12:46:00.790682 MAC: 00:24:32:30:7d:bc
2144 12:46:00.793304 Sending DHCP discover... done.
2145 12:46:00.796554 Waiting for reply... done.
2146 12:46:00.800121 Sending DHCP request... done.
2147 12:46:00.803141 Waiting for reply... done.
2148 12:46:00.806864 My ip is 192.168.201.11
2149 12:46:00.809950 The DHCP server ip is 192.168.201.1
2150 12:46:00.812998 TFTP server IP predefined by user: 192.168.201.1
2151 12:46:00.823010 Bootfile predefined by user: 6819487/tftp-deploy-6m8jmv5x/kernel/bzImage
2152 12:46:00.826558 Sending tftp read request... done.
2153 12:46:00.831429 Waiting for the transfer...
2154 12:46:01.507726 00000000 ################################################################
2155 12:46:02.193186 00080000 ################################################################
2156 12:46:02.842466 00100000 ################################################################
2157 12:46:03.421895 00180000 ################################################################
2158 12:46:04.006526 00200000 ################################################################
2159 12:46:04.590635 00280000 ################################################################
2160 12:46:05.173204 00300000 ################################################################
2161 12:46:05.758445 00380000 ################################################################
2162 12:46:06.381579 00400000 ################################################################
2163 12:46:07.079411 00480000 ################################################################
2164 12:46:07.733005 00500000 ################################################################
2165 12:46:08.398342 00580000 ################################################################
2166 12:46:09.027280 00600000 ################################################################ done.
2167 12:46:09.030242 The bootfile was 6811536 bytes long.
2168 12:46:09.033727 Sending tftp read request... done.
2169 12:46:09.036867 Waiting for the transfer...
2170 12:46:09.695570 00000000 ################################################################
2171 12:46:10.377688 00080000 ################################################################
2172 12:46:11.037557 00100000 ################################################################
2173 12:46:11.687094 00180000 ################################################################
2174 12:46:12.286084 00200000 ################################################################
2175 12:46:12.977411 00280000 ################################################################
2176 12:46:13.653732 00300000 ################################################################
2177 12:46:14.297882 00380000 ################################################################
2178 12:46:14.972219 00400000 ################################################################
2179 12:46:15.607448 00480000 ################################################################
2180 12:46:15.901205 00500000 ############################# done.
2181 12:46:15.904641 Sending tftp read request... done.
2182 12:46:15.908050 Waiting for the transfer...
2183 12:46:15.908165 00000000 # done.
2184 12:46:15.918005 Command line loaded dynamically from TFTP file: 6819487/tftp-deploy-6m8jmv5x/kernel/cmdline
2185 12:46:15.941609 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819487/extract-nfsrootfs-rjsvy8bi,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2186 12:46:15.944447 Shutting down all USB controllers.
2187 12:46:15.948435 Removing current net device
2188 12:46:15.951301 Finalizing coreboot
2189 12:46:15.957867 Exiting depthcharge with code 4 at timestamp: 25210739
2190 12:46:15.958309
2191 12:46:15.958656 Starting kernel ...
2192 12:46:15.958974
2193 12:46:15.959286
2194 12:46:15.960063 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2195 12:46:15.960543 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2196 12:46:15.960919 Setting prompt string to ['Linux version [0-9]']
2197 12:46:15.961297 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2198 12:46:15.961658 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2200 12:50:42.960793 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2202 12:50:42.961044 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2204 12:50:42.961239 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2207 12:50:42.961556 end: 2 depthcharge-action (duration 00:05:00) [common]
2209 12:50:42.961790 Cleaning after the job
2210 12:50:42.961880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/ramdisk
2211 12:50:42.962389 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/kernel
2212 12:50:42.963018 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/nfsrootfs
2213 12:50:43.014466 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819487/tftp-deploy-6m8jmv5x/modules
2214 12:50:43.014866 start: 4.1 power-off (timeout 00:00:30) [common]
2215 12:50:43.015051 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2216 12:50:43.036541 >> Command sent successfully.
2217 12:50:43.038683 Returned 0 in 0 seconds
2218 12:50:43.139560 end: 4.1 power-off (duration 00:00:00) [common]
2220 12:50:43.140118 start: 4.2 read-feedback (timeout 00:10:00) [common]
2221 12:50:43.140376 Listened to connection for namespace 'common' for up to 1s
2222 12:50:44.145189 Finalising connection for namespace 'common'
2223 12:50:44.145376 Disconnecting from shell: Finalise
2224 12:50:44.246152 end: 4.2 read-feedback (duration 00:00:01) [common]
2225 12:50:44.246345 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819487
2226 12:50:44.412680 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819487
2227 12:50:44.412883 JobError: Your job cannot terminate cleanly.