Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:50:44.469434 lava-dispatcher, installed at version: 2022.04
2 12:50:44.469611 start: 0 validate
3 12:50:44.469738 Start time: 2022-07-14 12:50:44.469731+00:00 (UTC)
4 12:50:44.469863 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:44.469988 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:50:44.757732 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:44.758486 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:45.046904 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:45.047427 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:50:45.334395 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:50:45.334550 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:50:45.625091 validate duration: 1.16
14 12:50:45.625866 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:50:45.626163 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:50:45.626425 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:50:45.626701 Not decompressing ramdisk as can be used compressed.
18 12:50:45.626968 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220708.0/amd64/initrd.cpio.gz
19 12:50:45.627191 saving as /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/ramdisk/initrd.cpio.gz
20 12:50:45.627374 total size: 5411082 (5MB)
21 12:50:45.630222 progress 0% (0MB)
22 12:50:45.634384 progress 5% (0MB)
23 12:50:45.638221 progress 10% (0MB)
24 12:50:45.642054 progress 15% (0MB)
25 12:50:45.646336 progress 20% (1MB)
26 12:50:45.650210 progress 25% (1MB)
27 12:50:45.653890 progress 30% (1MB)
28 12:50:45.656881 progress 35% (1MB)
29 12:50:45.659856 progress 40% (2MB)
30 12:50:45.662326 progress 45% (2MB)
31 12:50:45.664566 progress 50% (2MB)
32 12:50:45.666690 progress 55% (2MB)
33 12:50:45.668927 progress 60% (3MB)
34 12:50:45.670785 progress 65% (3MB)
35 12:50:45.672649 progress 70% (3MB)
36 12:50:45.674349 progress 75% (3MB)
37 12:50:45.676197 progress 80% (4MB)
38 12:50:45.677849 progress 85% (4MB)
39 12:50:45.679365 progress 90% (4MB)
40 12:50:45.680856 progress 95% (4MB)
41 12:50:45.682527 progress 100% (5MB)
42 12:50:45.682720 5MB downloaded in 0.06s (93.24MB/s)
43 12:50:45.682899 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:50:45.683187 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:50:45.683282 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:50:45.683374 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:50:45.683485 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:50:45.683556 saving as /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/kernel/bzImage
50 12:50:45.683620 total size: 6811536 (6MB)
51 12:50:45.683684 No compression specified
52 12:50:45.684807 progress 0% (0MB)
53 12:50:45.686640 progress 5% (0MB)
54 12:50:45.688395 progress 10% (0MB)
55 12:50:45.690194 progress 15% (1MB)
56 12:50:45.691877 progress 20% (1MB)
57 12:50:45.693509 progress 25% (1MB)
58 12:50:45.695362 progress 30% (1MB)
59 12:50:45.696981 progress 35% (2MB)
60 12:50:45.698728 progress 40% (2MB)
61 12:50:45.700370 progress 45% (2MB)
62 12:50:45.701969 progress 50% (3MB)
63 12:50:45.703751 progress 55% (3MB)
64 12:50:45.705344 progress 60% (3MB)
65 12:50:45.707131 progress 65% (4MB)
66 12:50:45.708719 progress 70% (4MB)
67 12:50:45.710312 progress 75% (4MB)
68 12:50:45.712115 progress 80% (5MB)
69 12:50:45.713711 progress 85% (5MB)
70 12:50:45.715456 progress 90% (5MB)
71 12:50:45.717065 progress 95% (6MB)
72 12:50:45.718671 progress 100% (6MB)
73 12:50:45.718934 6MB downloaded in 0.04s (183.97MB/s)
74 12:50:45.719090 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:50:45.719337 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:50:45.719428 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:50:45.719515 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:50:45.719622 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220708.0/amd64/full.rootfs.tar.xz
80 12:50:45.719690 saving as /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/nfsrootfs/full.rootfs.tar
81 12:50:45.719750 total size: 122473712 (116MB)
82 12:50:45.719811 Using unxz to decompress xz
83 12:50:45.723149 progress 0% (0MB)
84 12:50:46.156599 progress 5% (5MB)
85 12:50:46.602162 progress 10% (11MB)
86 12:50:47.047555 progress 15% (17MB)
87 12:50:47.499961 progress 20% (23MB)
88 12:50:47.812946 progress 25% (29MB)
89 12:50:48.145232 progress 30% (35MB)
90 12:50:48.384994 progress 35% (40MB)
91 12:50:48.582680 progress 40% (46MB)
92 12:50:48.921293 progress 45% (52MB)
93 12:50:49.271747 progress 50% (58MB)
94 12:50:49.599274 progress 55% (64MB)
95 12:50:49.942971 progress 60% (70MB)
96 12:50:50.268593 progress 65% (75MB)
97 12:50:50.639481 progress 70% (81MB)
98 12:50:51.043542 progress 75% (87MB)
99 12:50:51.445604 progress 80% (93MB)
100 12:50:51.555612 progress 85% (99MB)
101 12:50:51.716850 progress 90% (105MB)
102 12:50:52.044817 progress 95% (110MB)
103 12:50:52.414388 progress 100% (116MB)
104 12:50:52.420248 116MB downloaded in 6.70s (17.43MB/s)
105 12:50:52.420505 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:50:52.420768 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:50:52.420859 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:50:52.420948 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:50:52.421068 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:50:52.421142 saving as /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/modules/modules.tar
112 12:50:52.421203 total size: 51960 (0MB)
113 12:50:52.421266 Using unxz to decompress xz
114 12:50:52.424725 progress 63% (0MB)
115 12:50:52.425103 progress 100% (0MB)
116 12:50:52.428365 0MB downloaded in 0.01s (6.93MB/s)
117 12:50:52.428581 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:50:52.428837 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:50:52.428931 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:50:52.429028 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:50:54.082973 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819497/extract-nfsrootfs-26rt34zd
123 12:50:54.083173 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:50:54.083280 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 12:50:54.083420 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo
126 12:50:54.083522 makedir: /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin
127 12:50:54.083609 makedir: /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/tests
128 12:50:54.083692 makedir: /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/results
129 12:50:54.083790 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-add-keys
130 12:50:54.083919 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-add-sources
131 12:50:54.084034 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-background-process-start
132 12:50:54.084148 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-background-process-stop
133 12:50:54.084260 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-common-functions
134 12:50:54.084373 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-echo-ipv4
135 12:50:54.084484 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-install-packages
136 12:50:54.084594 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-installed-packages
137 12:50:54.084701 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-os-build
138 12:50:54.084811 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-probe-channel
139 12:50:54.084920 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-probe-ip
140 12:50:54.085028 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-target-ip
141 12:50:54.085135 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-target-mac
142 12:50:54.085242 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-target-storage
143 12:50:54.085352 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-case
144 12:50:54.085461 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-event
145 12:50:54.085568 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-feedback
146 12:50:54.085674 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-raise
147 12:50:54.085780 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-reference
148 12:50:54.085886 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-runner
149 12:50:54.085991 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-set
150 12:50:54.086098 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-test-shell
151 12:50:54.086207 Updating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-install-packages (oe)
152 12:50:54.086320 Updating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/bin/lava-installed-packages (oe)
153 12:50:54.086416 Creating /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/environment
154 12:50:54.086503 LAVA metadata
155 12:50:54.086569 - LAVA_JOB_ID=6819497
156 12:50:54.086635 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:50:54.086732 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 12:50:54.086797 skipped lava-vland-overlay
159 12:50:54.086873 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:50:54.086953 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 12:50:54.087035 skipped lava-multinode-overlay
162 12:50:54.087123 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:50:54.087206 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 12:50:54.087276 Loading test definitions
165 12:50:54.087365 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 12:50:54.087439 Using /lava-6819497 at stage 0
167 12:50:54.087536 Fetching tests from https://github.com/kernelci/test-definitions
168 12:50:54.087617 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/0/tests/0_ltp-mm'
169 12:50:59.019791 Running '/usr/bin/git checkout kernelci.org
170 12:50:59.059460 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 12:50:59.060193 uuid=6819497_1.5.2.3.1 testdef=None
172 12:50:59.060351 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 12:50:59.060597 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 12:50:59.061373 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:50:59.061615 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 12:50:59.062575 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:50:59.062820 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 12:50:59.063784 runner path: /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/0/tests/0_ltp-mm test_uuid 6819497_1.5.2.3.1
182 12:50:59.063875 SKIPFILE='skipfile-lkft.yaml'
183 12:50:59.063940 SKIP_INSTALL='true'
184 12:50:59.064000 TST_CMDFILES='mm'
185 12:50:59.064134 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 12:50:59.064350 Creating lava-test-runner.conf files
188 12:50:59.064416 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819497/lava-overlay-9dwpjgzo/lava-6819497/0 for stage 0
189 12:50:59.064497 - 0_ltp-mm
190 12:50:59.064598 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 12:50:59.064687 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 12:51:06.223033 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 12:51:06.223215 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 12:51:06.223310 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 12:51:06.223416 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 12:51:06.223507 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 12:51:06.325150 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 12:51:06.325492 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 12:51:06.325605 extracting modules file /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819497/extract-nfsrootfs-26rt34zd
200 12:51:06.329609 extracting modules file /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819497/extract-overlay-ramdisk-1mxurfei/ramdisk
201 12:51:06.333416 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 12:51:06.333530 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 12:51:06.333616 [common] Applying overlay to NFS
204 12:51:06.333690 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819497/compress-overlay-k9zea25j/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819497/extract-nfsrootfs-26rt34zd
205 12:51:06.770639 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 12:51:06.770811 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 12:51:06.770906 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 12:51:06.771055 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 12:51:06.771137 Building ramdisk /var/lib/lava/dispatcher/tmp/6819497/extract-overlay-ramdisk-1mxurfei/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819497/extract-overlay-ramdisk-1mxurfei/ramdisk
210 12:51:06.804297 >> 24434 blocks
211 12:51:07.266505 rename /var/lib/lava/dispatcher/tmp/6819497/extract-overlay-ramdisk-1mxurfei/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/ramdisk/ramdisk.cpio.gz
212 12:51:07.266911 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 12:51:07.267047 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 12:51:07.267153 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 12:51:07.267248 No mkimage arch provided, not using FIT.
216 12:51:07.267339 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 12:51:07.267422 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 12:51:07.267521 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
219 12:51:07.267617 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 12:51:07.267694 No LXC device requested
221 12:51:07.267777 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 12:51:07.267864 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 12:51:07.267946 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 12:51:07.268017 Checking files for TFTP limit of 4294967296 bytes.
225 12:51:07.268399 end: 1 tftp-deploy (duration 00:00:22) [common]
226 12:51:07.268511 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 12:51:07.268608 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 12:51:07.268742 substitutions:
229 12:51:07.268812 - {DTB}: None
230 12:51:07.268878 - {INITRD}: 6819497/tftp-deploy-_a8jr1de/ramdisk/ramdisk.cpio.gz
231 12:51:07.268941 - {KERNEL}: 6819497/tftp-deploy-_a8jr1de/kernel/bzImage
232 12:51:07.269000 - {LAVA_MAC}: None
233 12:51:07.269058 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819497/extract-nfsrootfs-26rt34zd
234 12:51:07.269118 - {NFS_SERVER_IP}: 192.168.201.1
235 12:51:07.269175 - {PRESEED_CONFIG}: None
236 12:51:07.269231 - {PRESEED_LOCAL}: None
237 12:51:07.269287 - {RAMDISK}: 6819497/tftp-deploy-_a8jr1de/ramdisk/ramdisk.cpio.gz
238 12:51:07.269342 - {ROOT_PART}: None
239 12:51:07.269398 - {ROOT}: None
240 12:51:07.269453 - {SERVER_IP}: 192.168.201.1
241 12:51:07.269509 - {TEE}: None
242 12:51:07.269563 Parsed boot commands:
243 12:51:07.269618 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 12:51:07.269772 Parsed boot commands: tftpboot 192.168.201.1 6819497/tftp-deploy-_a8jr1de/kernel/bzImage 6819497/tftp-deploy-_a8jr1de/kernel/cmdline 6819497/tftp-deploy-_a8jr1de/ramdisk/ramdisk.cpio.gz
245 12:51:07.269866 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 12:51:07.269953 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 12:51:07.270045 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 12:51:07.270132 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 12:51:07.270206 Not connected, no need to disconnect.
250 12:51:07.270286 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 12:51:07.270373 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 12:51:07.270442 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
253 12:51:07.273183 Setting prompt string to ['lava-test: # ']
254 12:51:07.273470 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 12:51:07.273578 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 12:51:07.273677 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 12:51:07.273770 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 12:51:07.273949 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
259 12:51:07.293106 >> Command sent successfully.
260 12:51:07.295091 Returned 0 in 0 seconds
261 12:51:07.395910 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 12:51:07.396250 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 12:51:07.396350 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 12:51:07.396437 Setting prompt string to 'Starting depthcharge on Helios...'
266 12:51:07.396501 Changing prompt to 'Starting depthcharge on Helios...'
267 12:51:07.396571 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 12:51:07.396850 [Enter `^Ec?' for help]
269 12:51:14.889470
270 12:51:14.890172
271 12:51:14.899116 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 12:51:14.902344 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 12:51:14.909110 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 12:51:14.912290 CPU: AES supported, TXT NOT supported, VT supported
275 12:51:14.918708 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 12:51:14.925298 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 12:51:14.928631 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 12:51:14.931643 VBOOT: Loading verstage.
279 12:51:14.938392 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 12:51:14.941725 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 12:51:14.947993 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 12:51:14.951453 CBFS @ c08000 size 3f8000
283 12:51:14.954546 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 12:51:14.958152 CBFS: Locating 'fallback/verstage'
285 12:51:14.964351 CBFS: Found @ offset 10fb80 size 1072c
286 12:51:14.964790
287 12:51:14.965136
288 12:51:14.974252 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 12:51:14.990587 Probing TPM: . done!
290 12:51:14.993963 TPM ready after 0 ms
291 12:51:14.997168 Connected to device vid:did:rid of 1ae0:0028:00
292 12:51:15.007733 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 12:51:15.010641 Initialized TPM device CR50 revision 0
294 12:51:15.055331 tlcl_send_startup: Startup return code is 0
295 12:51:15.055574 TPM: setup succeeded
296 12:51:15.067859 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 12:51:15.071515 Chrome EC: UHEPI supported
298 12:51:15.074923 Phase 1
299 12:51:15.078221 FMAP: area GBB found @ c05000 (12288 bytes)
300 12:51:15.084639 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 12:51:15.088148 Phase 2
302 12:51:15.088236 Phase 3
303 12:51:15.091157 FMAP: area GBB found @ c05000 (12288 bytes)
304 12:51:15.097724 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 12:51:15.104557 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 12:51:15.107641 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 12:51:15.114090 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 12:51:15.130246 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 12:51:15.133592 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 12:51:15.140028 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 12:51:15.144408 Phase 4
312 12:51:15.147797 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 12:51:15.157524 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 12:51:15.334109 VB2:vb2_rsa_verify_digest() Digest check failed!
315 12:51:15.340548 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 12:51:15.340637 Saving nvdata
317 12:51:15.343628 Reboot requested (10020007)
318 12:51:15.347100 board_reset() called!
319 12:51:15.347213 full_reset() called!
320 12:51:19.857007
321 12:51:19.857584
322 12:51:19.866668 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 12:51:19.870009 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 12:51:19.876395 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 12:51:19.879800 CPU: AES supported, TXT NOT supported, VT supported
326 12:51:19.886455 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 12:51:19.892809 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 12:51:19.896215 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 12:51:19.899249 VBOOT: Loading verstage.
330 12:51:19.905932 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 12:51:19.909153 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 12:51:19.915700 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 12:51:19.918931 CBFS @ c08000 size 3f8000
334 12:51:19.922338 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 12:51:19.925702 CBFS: Locating 'fallback/verstage'
336 12:51:19.932121 CBFS: Found @ offset 10fb80 size 1072c
337 12:51:19.932569
338 12:51:19.932938
339 12:51:19.941856 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 12:51:19.958092 Probing TPM: . done!
341 12:51:19.961502 TPM ready after 0 ms
342 12:51:19.964557 Connected to device vid:did:rid of 1ae0:0028:00
343 12:51:19.974764 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 12:51:19.978364 Initialized TPM device CR50 revision 0
345 12:51:20.022901 tlcl_send_startup: Startup return code is 0
346 12:51:20.023451 TPM: setup succeeded
347 12:51:20.036856 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 12:51:20.040586 Chrome EC: UHEPI supported
349 12:51:20.043874 Phase 1
350 12:51:20.047046 FMAP: area GBB found @ c05000 (12288 bytes)
351 12:51:20.053721 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 12:51:20.060357 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 12:51:20.063583 Recovery requested (1009000e)
354 12:51:20.069468 Saving nvdata
355 12:51:20.074813 tlcl_extend: response is 0
356 12:51:20.084441 tlcl_extend: response is 0
357 12:51:20.091423 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 12:51:20.094658 CBFS @ c08000 size 3f8000
359 12:51:20.101006 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 12:51:20.104643 CBFS: Locating 'fallback/romstage'
361 12:51:20.107774 CBFS: Found @ offset 80 size 145fc
362 12:51:20.111024 Accumulated console time in verstage 98 ms
363 12:51:20.111515
364 12:51:20.111902
365 12:51:20.124313 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 12:51:20.130938 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 12:51:20.134169 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 12:51:20.137346 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 12:51:20.143953 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 12:51:20.147174 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 12:51:20.150352 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 12:51:20.153771 TCO_STS: 0000 0000
373 12:51:20.157149 GEN_PMCON: e0015238 00000200
374 12:51:20.160352 GBLRST_CAUSE: 00000000 00000000
375 12:51:20.160837 prev_sleep_state 5
376 12:51:20.164314 Boot Count incremented to 28032
377 12:51:20.170869 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 12:51:20.174133 CBFS @ c08000 size 3f8000
379 12:51:20.180832 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 12:51:20.181319 CBFS: Locating 'fspm.bin'
381 12:51:20.187501 CBFS: Found @ offset 5ffc0 size 71000
382 12:51:20.190759 Chrome EC: UHEPI supported
383 12:51:20.197118 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 12:51:20.201182 Probing TPM: done!
385 12:51:20.207817 Connected to device vid:did:rid of 1ae0:0028:00
386 12:51:20.217678 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 12:51:20.224826 Initialized TPM device CR50 revision 0
388 12:51:20.233827 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 12:51:20.243685 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 12:51:20.244170 MRC cache found, size 1948
391 12:51:20.247029 bootmode is set to: 2
392 12:51:20.250154 PRMRR disabled by config.
393 12:51:20.253451 SPD INDEX = 1
394 12:51:20.256782 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 12:51:20.260407 CBFS @ c08000 size 3f8000
396 12:51:20.266725 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 12:51:20.267215 CBFS: Locating 'spd.bin'
398 12:51:20.269946 CBFS: Found @ offset 5fb80 size 400
399 12:51:20.273484 SPD: module type is LPDDR3
400 12:51:20.276660 SPD: module part is
401 12:51:20.283332 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 12:51:20.286474 SPD: device width 4 bits, bus width 8 bits
403 12:51:20.289778 SPD: module size is 4096 MB (per channel)
404 12:51:20.293202 memory slot: 0 configuration done.
405 12:51:20.296598 memory slot: 2 configuration done.
406 12:51:20.348194 CBMEM:
407 12:51:20.351412 IMD: root @ 99fff000 254 entries.
408 12:51:20.354662 IMD: root @ 99ffec00 62 entries.
409 12:51:20.358155 External stage cache:
410 12:51:20.361282 IMD: root @ 9abff000 254 entries.
411 12:51:20.364720 IMD: root @ 9abfec00 62 entries.
412 12:51:20.371230 Chrome EC: clear events_b mask to 0x0000000020004000
413 12:51:20.385285 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 12:51:20.396585 tlcl_write: response is 0
415 12:51:20.409624 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 12:51:20.416176 MRC: TPM MRC hash updated successfully.
417 12:51:20.416623 2 DIMMs found
418 12:51:20.419408 SMM Memory Map
419 12:51:20.422395 SMRAM : 0x9a000000 0x1000000
420 12:51:20.425844 Subregion 0: 0x9a000000 0xa00000
421 12:51:20.429231 Subregion 1: 0x9aa00000 0x200000
422 12:51:20.432520 Subregion 2: 0x9ac00000 0x400000
423 12:51:20.435820 top_of_ram = 0x9a000000
424 12:51:20.438958 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 12:51:20.445347 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 12:51:20.448667 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 12:51:20.455228 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 12:51:20.458771 CBFS @ c08000 size 3f8000
429 12:51:20.465191 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 12:51:20.468548 CBFS: Locating 'fallback/postcar'
431 12:51:20.471747 CBFS: Found @ offset 107000 size 4b44
432 12:51:20.478171 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 12:51:20.488237 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 12:51:20.491311 Processing 180 relocs. Offset value of 0x97c0c000
435 12:51:20.499737 Accumulated console time in romstage 286 ms
436 12:51:20.500304
437 12:51:20.500752
438 12:51:20.509411 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 12:51:20.516045 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 12:51:20.519519 CBFS @ c08000 size 3f8000
441 12:51:20.525759 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 12:51:20.529132 CBFS: Locating 'fallback/ramstage'
443 12:51:20.532608 CBFS: Found @ offset 43380 size 1b9e8
444 12:51:20.538919 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 12:51:20.571300 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 12:51:20.577971 Processing 3976 relocs. Offset value of 0x98db0000
447 12:51:20.581243 Accumulated console time in postcar 52 ms
448 12:51:20.581730
449 12:51:20.582086
450 12:51:20.591292 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 12:51:20.597785 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 12:51:20.600996 WARNING: RO_VPD is uninitialized or empty.
453 12:51:20.604316 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 12:51:20.610761 WARNING: RW_VPD is uninitialized or empty.
455 12:51:20.611298 Normal boot.
456 12:51:20.617372 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 12:51:20.620924 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 12:51:20.624057 CBFS @ c08000 size 3f8000
459 12:51:20.630521 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 12:51:20.633878 CBFS: Locating 'cpu_microcode_blob.bin'
461 12:51:20.637318 CBFS: Found @ offset 14700 size 2ec00
462 12:51:20.640335 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 12:51:20.643787 Skip microcode update
464 12:51:20.650354 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 12:51:20.650846 CBFS @ c08000 size 3f8000
466 12:51:20.657102 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 12:51:20.660355 CBFS: Locating 'fsps.bin'
468 12:51:20.663336 CBFS: Found @ offset d1fc0 size 35000
469 12:51:20.689487 Detected 4 core, 8 thread CPU.
470 12:51:20.692860 Setting up SMI for CPU
471 12:51:20.696014 IED base = 0x9ac00000
472 12:51:20.699303 IED size = 0x00400000
473 12:51:20.699740 Will perform SMM setup.
474 12:51:20.705815 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 12:51:20.712403 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 12:51:20.719043 Processing 16 relocs. Offset value of 0x00030000
477 12:51:20.719689 Attempting to start 7 APs
478 12:51:20.725473 Waiting for 10ms after sending INIT.
479 12:51:20.739307 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
480 12:51:20.739794 done.
481 12:51:20.742544 AP: slot 1 apic_id 2.
482 12:51:20.745598 AP: slot 3 apic_id 3.
483 12:51:20.746083 AP: slot 6 apic_id 7.
484 12:51:20.748916 AP: slot 7 apic_id 6.
485 12:51:20.752315 Waiting for 2nd SIPI to complete...done.
486 12:51:20.755462 AP: slot 2 apic_id 4.
487 12:51:20.759032 AP: slot 4 apic_id 5.
488 12:51:20.765431 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 12:51:20.772169 Processing 13 relocs. Offset value of 0x00038000
490 12:51:20.778599 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 12:51:20.782155 Installing SMM handler to 0x9a000000
492 12:51:20.788692 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 12:51:20.795270 Processing 658 relocs. Offset value of 0x9a010000
494 12:51:20.801617 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 12:51:20.804965 Processing 13 relocs. Offset value of 0x9a008000
496 12:51:20.811736 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 12:51:20.818277 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 12:51:20.824716 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 12:51:20.828218 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 12:51:20.834797 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 12:51:20.841427 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 12:51:20.847785 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 12:51:20.854864 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 12:51:20.857532 Clearing SMI status registers
505 12:51:20.858019 SMI_STS: PM1
506 12:51:20.860842 PM1_STS: PWRBTN
507 12:51:20.861325 TCO_STS: SECOND_TO
508 12:51:20.864295 New SMBASE 0x9a000000
509 12:51:20.867535 In relocation handler: CPU 0
510 12:51:20.870836 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 12:51:20.877402 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 12:51:20.877890 Relocation complete.
513 12:51:20.880617 New SMBASE 0x99ffec00
514 12:51:20.883796 In relocation handler: CPU 5
515 12:51:20.887287 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
516 12:51:20.893581 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 12:51:20.894032 Relocation complete.
518 12:51:20.897012 New SMBASE 0x99fffc00
519 12:51:20.900248 In relocation handler: CPU 1
520 12:51:20.903460 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
521 12:51:20.910104 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 12:51:20.910501 Relocation complete.
523 12:51:20.913502 New SMBASE 0x99fff400
524 12:51:20.916626 In relocation handler: CPU 3
525 12:51:20.920024 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
526 12:51:20.926539 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 12:51:20.927056 Relocation complete.
528 12:51:20.929820 New SMBASE 0x99fff800
529 12:51:20.933294 In relocation handler: CPU 2
530 12:51:20.936390 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
531 12:51:20.939870 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 12:51:20.943199 Relocation complete.
533 12:51:20.946362 New SMBASE 0x99fff000
534 12:51:20.949597 In relocation handler: CPU 4
535 12:51:20.952995 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
536 12:51:20.956219 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 12:51:20.959448 Relocation complete.
538 12:51:20.962753 New SMBASE 0x99ffe400
539 12:51:20.966032 In relocation handler: CPU 7
540 12:51:20.969228 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
541 12:51:20.972677 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 12:51:20.975802 Relocation complete.
543 12:51:20.979353 New SMBASE 0x99ffe800
544 12:51:20.982430 In relocation handler: CPU 6
545 12:51:20.985683 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
546 12:51:20.988902 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 12:51:20.992271 Relocation complete.
548 12:51:20.995547 Initializing CPU #0
549 12:51:20.998831 CPU: vendor Intel device 806ec
550 12:51:21.002190 CPU: family 06, model 8e, stepping 0c
551 12:51:21.005386 Clearing out pending MCEs
552 12:51:21.008538 Setting up local APIC...
553 12:51:21.008974 apic_id: 0x00 done.
554 12:51:21.011953 Turbo is available but hidden
555 12:51:21.015122 Turbo is available and visible
556 12:51:21.018382 VMX status: enabled
557 12:51:21.021482 IA32_FEATURE_CONTROL status: locked
558 12:51:21.021985 Skip microcode update
559 12:51:21.025052 CPU #0 initialized
560 12:51:21.028444 Initializing CPU #5
561 12:51:21.028980 Initializing CPU #2
562 12:51:21.031602 Initializing CPU #4
563 12:51:21.035059 CPU: vendor Intel device 806ec
564 12:51:21.038411 CPU: family 06, model 8e, stepping 0c
565 12:51:21.041460 CPU: vendor Intel device 806ec
566 12:51:21.044875 CPU: family 06, model 8e, stepping 0c
567 12:51:21.048264 Clearing out pending MCEs
568 12:51:21.051533 Clearing out pending MCEs
569 12:51:21.052117 Setting up local APIC...
570 12:51:21.054755 CPU: vendor Intel device 806ec
571 12:51:21.061306 CPU: family 06, model 8e, stepping 0c
572 12:51:21.061819 Clearing out pending MCEs
573 12:51:21.064684 Initializing CPU #6
574 12:51:21.067960 Initializing CPU #7
575 12:51:21.071278 CPU: vendor Intel device 806ec
576 12:51:21.074584 CPU: family 06, model 8e, stepping 0c
577 12:51:21.077736 CPU: vendor Intel device 806ec
578 12:51:21.081092 CPU: family 06, model 8e, stepping 0c
579 12:51:21.084454 Clearing out pending MCEs
580 12:51:21.084955 Clearing out pending MCEs
581 12:51:21.087755 Setting up local APIC...
582 12:51:21.091124 Initializing CPU #1
583 12:51:21.091666 Initializing CPU #3
584 12:51:21.094285 CPU: vendor Intel device 806ec
585 12:51:21.100883 CPU: family 06, model 8e, stepping 0c
586 12:51:21.101361 CPU: vendor Intel device 806ec
587 12:51:21.107542 CPU: family 06, model 8e, stepping 0c
588 12:51:21.108052 Clearing out pending MCEs
589 12:51:21.110806 Clearing out pending MCEs
590 12:51:21.114008 Setting up local APIC...
591 12:51:21.117213 Setting up local APIC...
592 12:51:21.117711 apic_id: 0x06 done.
593 12:51:21.120535 Setting up local APIC...
594 12:51:21.123787 Setting up local APIC...
595 12:51:21.127083 Setting up local APIC...
596 12:51:21.127541 apic_id: 0x07 done.
597 12:51:21.130237 VMX status: enabled
598 12:51:21.133612 VMX status: enabled
599 12:51:21.136868 IA32_FEATURE_CONTROL status: locked
600 12:51:21.140285 IA32_FEATURE_CONTROL status: locked
601 12:51:21.140719 Skip microcode update
602 12:51:21.143567 Skip microcode update
603 12:51:21.146761 CPU #7 initialized
604 12:51:21.147181 CPU #6 initialized
605 12:51:21.150211 apic_id: 0x02 done.
606 12:51:21.153521 apic_id: 0x03 done.
607 12:51:21.153998 VMX status: enabled
608 12:51:21.156881 VMX status: enabled
609 12:51:21.160064 IA32_FEATURE_CONTROL status: locked
610 12:51:21.163445 IA32_FEATURE_CONTROL status: locked
611 12:51:21.166641 Skip microcode update
612 12:51:21.167075 Skip microcode update
613 12:51:21.169947 CPU #1 initialized
614 12:51:21.173247 CPU #3 initialized
615 12:51:21.173692 apic_id: 0x01 done.
616 12:51:21.176533 apic_id: 0x04 done.
617 12:51:21.179816 apic_id: 0x05 done.
618 12:51:21.180263 VMX status: enabled
619 12:51:21.183108 VMX status: enabled
620 12:51:21.186242 IA32_FEATURE_CONTROL status: locked
621 12:51:21.189610 IA32_FEATURE_CONTROL status: locked
622 12:51:21.192910 Skip microcode update
623 12:51:21.193416 Skip microcode update
624 12:51:21.196382 CPU #2 initialized
625 12:51:21.199807 CPU #4 initialized
626 12:51:21.200318 VMX status: enabled
627 12:51:21.202865 IA32_FEATURE_CONTROL status: locked
628 12:51:21.206310 Skip microcode update
629 12:51:21.209576 CPU #5 initialized
630 12:51:21.212754 bsp_do_flight_plan done after 457 msecs.
631 12:51:21.216116 CPU: frequency set to 4200 MHz
632 12:51:21.216594 Enabling SMIs.
633 12:51:21.219267 Locking SMM.
634 12:51:21.233160 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 12:51:21.236484 CBFS @ c08000 size 3f8000
636 12:51:21.242949 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 12:51:21.243523 CBFS: Locating 'vbt.bin'
638 12:51:21.246313 CBFS: Found @ offset 5f5c0 size 499
639 12:51:21.252891 Found a VBT of 4608 bytes after decompression
640 12:51:21.437765 Display FSP Version Info HOB
641 12:51:21.440919 Reference Code - CPU = 9.0.1e.30
642 12:51:21.444471 uCode Version = 0.0.0.ca
643 12:51:21.447729 TXT ACM version = ff.ff.ff.ffff
644 12:51:21.450898 Display FSP Version Info HOB
645 12:51:21.454151 Reference Code - ME = 9.0.1e.30
646 12:51:21.457289 MEBx version = 0.0.0.0
647 12:51:21.460613 ME Firmware Version = Consumer SKU
648 12:51:21.463819 Display FSP Version Info HOB
649 12:51:21.467263 Reference Code - CML PCH = 9.0.1e.30
650 12:51:21.470544 PCH-CRID Status = Disabled
651 12:51:21.473528 PCH-CRID Original Value = ff.ff.ff.ffff
652 12:51:21.476746 PCH-CRID New Value = ff.ff.ff.ffff
653 12:51:21.480207 OPROM - RST - RAID = ff.ff.ff.ffff
654 12:51:21.483496 ChipsetInit Base Version = ff.ff.ff.ffff
655 12:51:21.489807 ChipsetInit Oem Version = ff.ff.ff.ffff
656 12:51:21.490255 Display FSP Version Info HOB
657 12:51:21.496480 Reference Code - SA - System Agent = 9.0.1e.30
658 12:51:21.499665 Reference Code - MRC = 0.7.1.6c
659 12:51:21.502820 SA - PCIe Version = 9.0.1e.30
660 12:51:21.506351 SA-CRID Status = Disabled
661 12:51:21.509324 SA-CRID Original Value = 0.0.0.c
662 12:51:21.512669 SA-CRID New Value = 0.0.0.c
663 12:51:21.513103 OPROM - VBIOS = ff.ff.ff.ffff
664 12:51:21.516431 RTC Init
665 12:51:21.519701 Set power on after power failure.
666 12:51:21.522910 Disabling Deep S3
667 12:51:21.523386 Disabling Deep S3
668 12:51:21.526179 Disabling Deep S4
669 12:51:21.526654 Disabling Deep S4
670 12:51:21.529480 Disabling Deep S5
671 12:51:21.529955 Disabling Deep S5
672 12:51:21.536120 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
673 12:51:21.539376 Enumerating buses...
674 12:51:21.542626 Show all devs... Before device enumeration.
675 12:51:21.545865 Root Device: enabled 1
676 12:51:21.549171 CPU_CLUSTER: 0: enabled 1
677 12:51:21.549645 DOMAIN: 0000: enabled 1
678 12:51:21.552583 APIC: 00: enabled 1
679 12:51:21.555838 PCI: 00:00.0: enabled 1
680 12:51:21.556445 PCI: 00:02.0: enabled 1
681 12:51:21.558908 PCI: 00:04.0: enabled 0
682 12:51:21.562196 PCI: 00:05.0: enabled 0
683 12:51:21.565564 PCI: 00:12.0: enabled 1
684 12:51:21.566037 PCI: 00:12.5: enabled 0
685 12:51:21.568535 PCI: 00:12.6: enabled 0
686 12:51:21.571851 PCI: 00:14.0: enabled 1
687 12:51:21.575243 PCI: 00:14.1: enabled 0
688 12:51:21.575636 PCI: 00:14.3: enabled 1
689 12:51:21.578578 PCI: 00:14.5: enabled 0
690 12:51:21.581734 PCI: 00:15.0: enabled 1
691 12:51:21.584860 PCI: 00:15.1: enabled 1
692 12:51:21.585258 PCI: 00:15.2: enabled 0
693 12:51:21.588309 PCI: 00:15.3: enabled 0
694 12:51:21.591315 PCI: 00:16.0: enabled 1
695 12:51:21.594462 PCI: 00:16.1: enabled 0
696 12:51:21.594891 PCI: 00:16.2: enabled 0
697 12:51:21.597950 PCI: 00:16.3: enabled 0
698 12:51:21.601395 PCI: 00:16.4: enabled 0
699 12:51:21.604615 PCI: 00:16.5: enabled 0
700 12:51:21.605097 PCI: 00:17.0: enabled 1
701 12:51:21.607878 PCI: 00:19.0: enabled 1
702 12:51:21.611092 PCI: 00:19.1: enabled 0
703 12:51:21.614373 PCI: 00:19.2: enabled 0
704 12:51:21.614837 PCI: 00:1a.0: enabled 0
705 12:51:21.617335 PCI: 00:1c.0: enabled 0
706 12:51:21.620830 PCI: 00:1c.1: enabled 0
707 12:51:21.624031 PCI: 00:1c.2: enabled 0
708 12:51:21.624551 PCI: 00:1c.3: enabled 0
709 12:51:21.627263 PCI: 00:1c.4: enabled 0
710 12:51:21.630508 PCI: 00:1c.5: enabled 0
711 12:51:21.633920 PCI: 00:1c.6: enabled 0
712 12:51:21.634398 PCI: 00:1c.7: enabled 0
713 12:51:21.637117 PCI: 00:1d.0: enabled 1
714 12:51:21.640042 PCI: 00:1d.1: enabled 0
715 12:51:21.643501 PCI: 00:1d.2: enabled 0
716 12:51:21.643973 PCI: 00:1d.3: enabled 0
717 12:51:21.646895 PCI: 00:1d.4: enabled 0
718 12:51:21.650115 PCI: 00:1d.5: enabled 1
719 12:51:21.653452 PCI: 00:1e.0: enabled 1
720 12:51:21.653923 PCI: 00:1e.1: enabled 0
721 12:51:21.656604 PCI: 00:1e.2: enabled 1
722 12:51:21.659771 PCI: 00:1e.3: enabled 1
723 12:51:21.662966 PCI: 00:1f.0: enabled 1
724 12:51:21.663543 PCI: 00:1f.1: enabled 1
725 12:51:21.666453 PCI: 00:1f.2: enabled 1
726 12:51:21.669736 PCI: 00:1f.3: enabled 1
727 12:51:21.672924 PCI: 00:1f.4: enabled 1
728 12:51:21.673402 PCI: 00:1f.5: enabled 1
729 12:51:21.676180 PCI: 00:1f.6: enabled 0
730 12:51:21.679498 USB0 port 0: enabled 1
731 12:51:21.679976 I2C: 00:15: enabled 1
732 12:51:21.682862 I2C: 00:5d: enabled 1
733 12:51:21.685904 GENERIC: 0.0: enabled 1
734 12:51:21.689339 I2C: 00:1a: enabled 1
735 12:51:21.689791 I2C: 00:38: enabled 1
736 12:51:21.692646 I2C: 00:39: enabled 1
737 12:51:21.695777 I2C: 00:3a: enabled 1
738 12:51:21.696259 I2C: 00:3b: enabled 1
739 12:51:21.698933 PCI: 00:00.0: enabled 1
740 12:51:21.702414 SPI: 00: enabled 1
741 12:51:21.702934 SPI: 01: enabled 1
742 12:51:21.705677 PNP: 0c09.0: enabled 1
743 12:51:21.708734 USB2 port 0: enabled 1
744 12:51:21.709184 USB2 port 1: enabled 1
745 12:51:21.712159 USB2 port 2: enabled 0
746 12:51:21.715577 USB2 port 3: enabled 0
747 12:51:21.718538 USB2 port 5: enabled 0
748 12:51:21.718980 USB2 port 6: enabled 1
749 12:51:21.721835 USB2 port 9: enabled 1
750 12:51:21.725232 USB3 port 0: enabled 1
751 12:51:21.725796 USB3 port 1: enabled 1
752 12:51:21.728341 USB3 port 2: enabled 1
753 12:51:21.731920 USB3 port 3: enabled 1
754 12:51:21.735101 USB3 port 4: enabled 0
755 12:51:21.735602 APIC: 02: enabled 1
756 12:51:21.738235 APIC: 04: enabled 1
757 12:51:21.738751 APIC: 03: enabled 1
758 12:51:21.741429 APIC: 05: enabled 1
759 12:51:21.744701 APIC: 01: enabled 1
760 12:51:21.745198 APIC: 07: enabled 1
761 12:51:21.748269 APIC: 06: enabled 1
762 12:51:21.751643 Compare with tree...
763 12:51:21.752116 Root Device: enabled 1
764 12:51:21.754784 CPU_CLUSTER: 0: enabled 1
765 12:51:21.757960 APIC: 00: enabled 1
766 12:51:21.758499 APIC: 02: enabled 1
767 12:51:21.761162 APIC: 04: enabled 1
768 12:51:21.764347 APIC: 03: enabled 1
769 12:51:21.767802 APIC: 05: enabled 1
770 12:51:21.768303 APIC: 01: enabled 1
771 12:51:21.770810 APIC: 07: enabled 1
772 12:51:21.774278 APIC: 06: enabled 1
773 12:51:21.774779 DOMAIN: 0000: enabled 1
774 12:51:21.777384 PCI: 00:00.0: enabled 1
775 12:51:21.780771 PCI: 00:02.0: enabled 1
776 12:51:21.783942 PCI: 00:04.0: enabled 0
777 12:51:21.787108 PCI: 00:05.0: enabled 0
778 12:51:21.787616 PCI: 00:12.0: enabled 1
779 12:51:21.790287 PCI: 00:12.5: enabled 0
780 12:51:21.793605 PCI: 00:12.6: enabled 0
781 12:51:21.796874 PCI: 00:14.0: enabled 1
782 12:51:21.800108 USB0 port 0: enabled 1
783 12:51:21.800616 USB2 port 0: enabled 1
784 12:51:21.803499 USB2 port 1: enabled 1
785 12:51:21.806785 USB2 port 2: enabled 0
786 12:51:21.810147 USB2 port 3: enabled 0
787 12:51:21.813242 USB2 port 5: enabled 0
788 12:51:21.816638 USB2 port 6: enabled 1
789 12:51:21.817139 USB2 port 9: enabled 1
790 12:51:21.819781 USB3 port 0: enabled 1
791 12:51:21.823028 USB3 port 1: enabled 1
792 12:51:21.826313 USB3 port 2: enabled 1
793 12:51:21.829605 USB3 port 3: enabled 1
794 12:51:21.833046 USB3 port 4: enabled 0
795 12:51:21.833616 PCI: 00:14.1: enabled 0
796 12:51:21.836260 PCI: 00:14.3: enabled 1
797 12:51:21.839534 PCI: 00:14.5: enabled 0
798 12:51:21.842504 PCI: 00:15.0: enabled 1
799 12:51:21.845870 I2C: 00:15: enabled 1
800 12:51:21.846374 PCI: 00:15.1: enabled 1
801 12:51:21.849284 I2C: 00:5d: enabled 1
802 12:51:21.852594 GENERIC: 0.0: enabled 1
803 12:51:21.855541 PCI: 00:15.2: enabled 0
804 12:51:21.859082 PCI: 00:15.3: enabled 0
805 12:51:21.859583 PCI: 00:16.0: enabled 1
806 12:51:21.862167 PCI: 00:16.1: enabled 0
807 12:51:21.865318 PCI: 00:16.2: enabled 0
808 12:51:21.868822 PCI: 00:16.3: enabled 0
809 12:51:21.872023 PCI: 00:16.4: enabled 0
810 12:51:21.875358 PCI: 00:16.5: enabled 0
811 12:51:21.875997 PCI: 00:17.0: enabled 1
812 12:51:21.878630 PCI: 00:19.0: enabled 1
813 12:51:21.881982 I2C: 00:1a: enabled 1
814 12:51:21.885259 I2C: 00:38: enabled 1
815 12:51:21.885752 I2C: 00:39: enabled 1
816 12:51:21.888435 I2C: 00:3a: enabled 1
817 12:51:21.891519 I2C: 00:3b: enabled 1
818 12:51:21.895136 PCI: 00:19.1: enabled 0
819 12:51:21.898348 PCI: 00:19.2: enabled 0
820 12:51:21.899165 PCI: 00:1a.0: enabled 0
821 12:51:21.901262 PCI: 00:1c.0: enabled 0
822 12:51:21.904762 PCI: 00:1c.1: enabled 0
823 12:51:21.908135 PCI: 00:1c.2: enabled 0
824 12:51:21.911134 PCI: 00:1c.3: enabled 0
825 12:51:21.911683 PCI: 00:1c.4: enabled 0
826 12:51:21.914560 PCI: 00:1c.5: enabled 0
827 12:51:21.917691 PCI: 00:1c.6: enabled 0
828 12:51:21.921148 PCI: 00:1c.7: enabled 0
829 12:51:21.924359 PCI: 00:1d.0: enabled 1
830 12:51:21.924815 PCI: 00:1d.1: enabled 0
831 12:51:21.927587 PCI: 00:1d.2: enabled 0
832 12:51:21.930740 PCI: 00:1d.3: enabled 0
833 12:51:21.934103 PCI: 00:1d.4: enabled 0
834 12:51:21.937249 PCI: 00:1d.5: enabled 1
835 12:51:21.937643 PCI: 00:00.0: enabled 1
836 12:51:21.940771 PCI: 00:1e.0: enabled 1
837 12:51:21.943940 PCI: 00:1e.1: enabled 0
838 12:51:21.947097 PCI: 00:1e.2: enabled 1
839 12:51:21.950491 SPI: 00: enabled 1
840 12:51:21.950923 PCI: 00:1e.3: enabled 1
841 12:51:21.953707 SPI: 01: enabled 1
842 12:51:21.956875 PCI: 00:1f.0: enabled 1
843 12:51:21.960219 PNP: 0c09.0: enabled 1
844 12:51:21.960625 PCI: 00:1f.1: enabled 1
845 12:51:21.963454 PCI: 00:1f.2: enabled 1
846 12:51:21.966584 PCI: 00:1f.3: enabled 1
847 12:51:21.969844 PCI: 00:1f.4: enabled 1
848 12:51:21.973325 PCI: 00:1f.5: enabled 1
849 12:51:21.973783 PCI: 00:1f.6: enabled 0
850 12:51:21.976604 Root Device scanning...
851 12:51:21.979769 scan_static_bus for Root Device
852 12:51:21.982852 CPU_CLUSTER: 0 enabled
853 12:51:21.986172 DOMAIN: 0000 enabled
854 12:51:21.986603 DOMAIN: 0000 scanning...
855 12:51:21.989947 PCI: pci_scan_bus for bus 00
856 12:51:21.992982 PCI: 00:00.0 [8086/0000] ops
857 12:51:21.996384 PCI: 00:00.0 [8086/9b61] enabled
858 12:51:21.999679 PCI: 00:02.0 [8086/0000] bus ops
859 12:51:22.002818 PCI: 00:02.0 [8086/9b41] enabled
860 12:51:22.006124 PCI: 00:04.0 [8086/1903] disabled
861 12:51:22.009427 PCI: 00:08.0 [8086/1911] enabled
862 12:51:22.012756 PCI: 00:12.0 [8086/02f9] enabled
863 12:51:22.019263 PCI: 00:14.0 [8086/0000] bus ops
864 12:51:22.022398 PCI: 00:14.0 [8086/02ed] enabled
865 12:51:22.025700 PCI: 00:14.2 [8086/02ef] enabled
866 12:51:22.028700 PCI: 00:14.3 [8086/02f0] enabled
867 12:51:22.032114 PCI: 00:15.0 [8086/0000] bus ops
868 12:51:22.035611 PCI: 00:15.0 [8086/02e8] enabled
869 12:51:22.038775 PCI: 00:15.1 [8086/0000] bus ops
870 12:51:22.042103 PCI: 00:15.1 [8086/02e9] enabled
871 12:51:22.045482 PCI: 00:16.0 [8086/0000] ops
872 12:51:22.048430 PCI: 00:16.0 [8086/02e0] enabled
873 12:51:22.048946 PCI: 00:17.0 [8086/0000] ops
874 12:51:22.051638 PCI: 00:17.0 [8086/02d3] enabled
875 12:51:22.054961 PCI: 00:19.0 [8086/0000] bus ops
876 12:51:22.061438 PCI: 00:19.0 [8086/02c5] enabled
877 12:51:22.064611 PCI: 00:1d.0 [8086/0000] bus ops
878 12:51:22.068126 PCI: 00:1d.0 [8086/02b0] enabled
879 12:51:22.071315 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 12:51:22.074506 PCI: 00:1e.0 [8086/0000] ops
881 12:51:22.077748 PCI: 00:1e.0 [8086/02a8] enabled
882 12:51:22.081079 PCI: 00:1e.2 [8086/0000] bus ops
883 12:51:22.084423 PCI: 00:1e.2 [8086/02aa] enabled
884 12:51:22.087745 PCI: 00:1e.3 [8086/0000] bus ops
885 12:51:22.090972 PCI: 00:1e.3 [8086/02ab] enabled
886 12:51:22.094138 PCI: 00:1f.0 [8086/0000] bus ops
887 12:51:22.097352 PCI: 00:1f.0 [8086/0284] enabled
888 12:51:22.103845 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 12:51:22.110662 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 12:51:22.113998 PCI: 00:1f.3 [8086/0000] bus ops
891 12:51:22.117173 PCI: 00:1f.3 [8086/02c8] enabled
892 12:51:22.120171 PCI: 00:1f.4 [8086/0000] bus ops
893 12:51:22.123730 PCI: 00:1f.4 [8086/02a3] enabled
894 12:51:22.126854 PCI: 00:1f.5 [8086/0000] bus ops
895 12:51:22.130114 PCI: 00:1f.5 [8086/02a4] enabled
896 12:51:22.133283 PCI: Leftover static devices:
897 12:51:22.133768 PCI: 00:05.0
898 12:51:22.136677 PCI: 00:12.5
899 12:51:22.137161 PCI: 00:12.6
900 12:51:22.137542 PCI: 00:14.1
901 12:51:22.139938 PCI: 00:14.5
902 12:51:22.140420 PCI: 00:15.2
903 12:51:22.143387 PCI: 00:15.3
904 12:51:22.143870 PCI: 00:16.1
905 12:51:22.144298 PCI: 00:16.2
906 12:51:22.146603 PCI: 00:16.3
907 12:51:22.147120 PCI: 00:16.4
908 12:51:22.149903 PCI: 00:16.5
909 12:51:22.150381 PCI: 00:19.1
910 12:51:22.153176 PCI: 00:19.2
911 12:51:22.153660 PCI: 00:1a.0
912 12:51:22.154039 PCI: 00:1c.0
913 12:51:22.156386 PCI: 00:1c.1
914 12:51:22.156872 PCI: 00:1c.2
915 12:51:22.159698 PCI: 00:1c.3
916 12:51:22.160184 PCI: 00:1c.4
917 12:51:22.162811 PCI: 00:1c.5
918 12:51:22.163587 PCI: 00:1c.6
919 12:51:22.164276 PCI: 00:1c.7
920 12:51:22.166167 PCI: 00:1d.1
921 12:51:22.166671 PCI: 00:1d.2
922 12:51:22.169354 PCI: 00:1d.3
923 12:51:22.169936 PCI: 00:1d.4
924 12:51:22.170398 PCI: 00:1d.5
925 12:51:22.172669 PCI: 00:1e.1
926 12:51:22.173262 PCI: 00:1f.1
927 12:51:22.175864 PCI: 00:1f.2
928 12:51:22.176459 PCI: 00:1f.6
929 12:51:22.179261 PCI: Check your devicetree.cb.
930 12:51:22.182381 PCI: 00:02.0 scanning...
931 12:51:22.185749 scan_generic_bus for PCI: 00:02.0
932 12:51:22.188976 scan_generic_bus for PCI: 00:02.0 done
933 12:51:22.195487 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
934 12:51:22.198643 PCI: 00:14.0 scanning...
935 12:51:22.202045 scan_static_bus for PCI: 00:14.0
936 12:51:22.202486 USB0 port 0 enabled
937 12:51:22.205282 USB0 port 0 scanning...
938 12:51:22.208618 scan_static_bus for USB0 port 0
939 12:51:22.211691 USB2 port 0 enabled
940 12:51:22.212133 USB2 port 1 enabled
941 12:51:22.214866 USB2 port 2 disabled
942 12:51:22.218239 USB2 port 3 disabled
943 12:51:22.218464 USB2 port 5 disabled
944 12:51:22.221359 USB2 port 6 enabled
945 12:51:22.224549 USB2 port 9 enabled
946 12:51:22.224783 USB3 port 0 enabled
947 12:51:22.228132 USB3 port 1 enabled
948 12:51:22.231275 USB3 port 2 enabled
949 12:51:22.231493 USB3 port 3 enabled
950 12:51:22.234509 USB3 port 4 disabled
951 12:51:22.237707 USB2 port 0 scanning...
952 12:51:22.241082 scan_static_bus for USB2 port 0
953 12:51:22.244267 scan_static_bus for USB2 port 0 done
954 12:51:22.247508 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
955 12:51:22.250631 USB2 port 1 scanning...
956 12:51:22.254182 scan_static_bus for USB2 port 1
957 12:51:22.257405 scan_static_bus for USB2 port 1 done
958 12:51:22.264192 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
959 12:51:22.267197 USB2 port 6 scanning...
960 12:51:22.270370 scan_static_bus for USB2 port 6
961 12:51:22.273868 scan_static_bus for USB2 port 6 done
962 12:51:22.280232 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
963 12:51:22.280735 USB2 port 9 scanning...
964 12:51:22.283295 scan_static_bus for USB2 port 9
965 12:51:22.290086 scan_static_bus for USB2 port 9 done
966 12:51:22.293140 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
967 12:51:22.296601 USB3 port 0 scanning...
968 12:51:22.299792 scan_static_bus for USB3 port 0
969 12:51:22.303116 scan_static_bus for USB3 port 0 done
970 12:51:22.309716 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
971 12:51:22.312923 USB3 port 1 scanning...
972 12:51:22.316240 scan_static_bus for USB3 port 1
973 12:51:22.319324 scan_static_bus for USB3 port 1 done
974 12:51:22.322772 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
975 12:51:22.325835 USB3 port 2 scanning...
976 12:51:22.329274 scan_static_bus for USB3 port 2
977 12:51:22.332513 scan_static_bus for USB3 port 2 done
978 12:51:22.338841 scan_bus: scanning of bus USB3 port 2 took 9693 usecs
979 12:51:22.342199 USB3 port 3 scanning...
980 12:51:22.345552 scan_static_bus for USB3 port 3
981 12:51:22.348607 scan_static_bus for USB3 port 3 done
982 12:51:22.355428 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
983 12:51:22.358459 scan_static_bus for USB0 port 0 done
984 12:51:22.361796 scan_bus: scanning of bus USB0 port 0 took 155334 usecs
985 12:51:22.368418 scan_static_bus for PCI: 00:14.0 done
986 12:51:22.371614 scan_bus: scanning of bus PCI: 00:14.0 took 172940 usecs
987 12:51:22.374728 PCI: 00:15.0 scanning...
988 12:51:22.378057 scan_generic_bus for PCI: 00:15.0
989 12:51:22.381341 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 12:51:22.387716 scan_generic_bus for PCI: 00:15.0 done
991 12:51:22.391257 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
992 12:51:22.394461 PCI: 00:15.1 scanning...
993 12:51:22.397688 scan_generic_bus for PCI: 00:15.1
994 12:51:22.404353 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 12:51:22.407388 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 12:51:22.410687 scan_generic_bus for PCI: 00:15.1 done
997 12:51:22.417231 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
998 12:51:22.420440 PCI: 00:19.0 scanning...
999 12:51:22.423645 scan_generic_bus for PCI: 00:19.0
1000 12:51:22.427226 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 12:51:22.430287 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 12:51:22.433692 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 12:51:22.440213 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 12:51:22.443187 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 12:51:22.446588 scan_generic_bus for PCI: 00:19.0 done
1006 12:51:22.453035 scan_bus: scanning of bus PCI: 00:19.0 took 30710 usecs
1007 12:51:22.456470 PCI: 00:1d.0 scanning...
1008 12:51:22.459647 do_pci_scan_bridge for PCI: 00:1d.0
1009 12:51:22.462805 PCI: pci_scan_bus for bus 01
1010 12:51:22.466157 PCI: 01:00.0 [1c5c/1327] enabled
1011 12:51:22.469377 Enabling Common Clock Configuration
1012 12:51:22.472737 L1 Sub-State supported from root port 29
1013 12:51:22.475907 L1 Sub-State Support = 0xf
1014 12:51:22.479307 CommonModeRestoreTime = 0x28
1015 12:51:22.482590 Power On Value = 0x16, Power On Scale = 0x0
1016 12:51:22.485686 ASPM: Enabled L1
1017 12:51:22.492359 scan_bus: scanning of bus PCI: 00:1d.0 took 32777 usecs
1018 12:51:22.492842 PCI: 00:1e.2 scanning...
1019 12:51:22.495527 scan_generic_bus for PCI: 00:1e.2
1020 12:51:22.502072 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 12:51:22.505313 scan_generic_bus for PCI: 00:1e.2 done
1022 12:51:22.508608 scan_bus: scanning of bus PCI: 00:1e.2 took 13997 usecs
1023 12:51:22.511895 PCI: 00:1e.3 scanning...
1024 12:51:22.514950 scan_generic_bus for PCI: 00:1e.3
1025 12:51:22.521543 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 12:51:22.525023 scan_generic_bus for PCI: 00:1e.3 done
1027 12:51:22.528236 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1028 12:51:22.531493 PCI: 00:1f.0 scanning...
1029 12:51:22.534797 scan_static_bus for PCI: 00:1f.0
1030 12:51:22.537988 PNP: 0c09.0 enabled
1031 12:51:22.541205 scan_static_bus for PCI: 00:1f.0 done
1032 12:51:22.547754 scan_bus: scanning of bus PCI: 00:1f.0 took 12041 usecs
1033 12:51:22.551082 PCI: 00:1f.3 scanning...
1034 12:51:22.554207 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1035 12:51:22.557458 PCI: 00:1f.4 scanning...
1036 12:51:22.560824 scan_generic_bus for PCI: 00:1f.4
1037 12:51:22.564020 scan_generic_bus for PCI: 00:1f.4 done
1038 12:51:22.570880 scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
1039 12:51:22.573885 PCI: 00:1f.5 scanning...
1040 12:51:22.577130 scan_generic_bus for PCI: 00:1f.5
1041 12:51:22.580380 scan_generic_bus for PCI: 00:1f.5 done
1042 12:51:22.586958 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1043 12:51:22.593444 scan_bus: scanning of bus DOMAIN: 0000 took 604823 usecs
1044 12:51:22.596637 scan_static_bus for Root Device done
1045 12:51:22.603139 scan_bus: scanning of bus Root Device took 624690 usecs
1046 12:51:22.603624 done
1047 12:51:22.606648 Chrome EC: UHEPI supported
1048 12:51:22.613064 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 12:51:22.616262 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 12:51:22.622740 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 12:51:22.630278 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 12:51:22.633625 SPI flash protection: WPSW=0 SRP0=0
1053 12:51:22.640256 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 12:51:22.643459 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 12:51:22.646589 found VGA at PCI: 00:02.0
1056 12:51:22.649908 Setting up VGA for PCI: 00:02.0
1057 12:51:22.656477 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 12:51:22.659806 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 12:51:22.662960 Allocating resources...
1060 12:51:22.666179 Reading resources...
1061 12:51:22.669573 Root Device read_resources bus 0 link: 0
1062 12:51:22.672665 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 12:51:22.679464 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 12:51:22.682661 DOMAIN: 0000 read_resources bus 0 link: 0
1065 12:51:22.690528 PCI: 00:14.0 read_resources bus 0 link: 0
1066 12:51:22.693637 USB0 port 0 read_resources bus 0 link: 0
1067 12:51:22.701740 USB0 port 0 read_resources bus 0 link: 0 done
1068 12:51:22.704896 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 12:51:22.712467 PCI: 00:15.0 read_resources bus 1 link: 0
1070 12:51:22.715478 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 12:51:22.722358 PCI: 00:15.1 read_resources bus 2 link: 0
1072 12:51:22.725524 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 12:51:22.733287 PCI: 00:19.0 read_resources bus 3 link: 0
1074 12:51:22.739653 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 12:51:22.742771 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 12:51:22.749319 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 12:51:22.752638 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 12:51:22.759359 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 12:51:22.762569 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 12:51:22.769405 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 12:51:22.772470 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 12:51:22.779118 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 12:51:22.785665 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 12:51:22.788967 Root Device read_resources bus 0 link: 0 done
1085 12:51:22.792428 Done reading resources.
1086 12:51:22.798648 Show resources in subtree (Root Device)...After reading.
1087 12:51:22.802123 Root Device child on link 0 CPU_CLUSTER: 0
1088 12:51:22.805401 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 12:51:22.808703 APIC: 00
1090 12:51:22.809139 APIC: 02
1091 12:51:22.809487 APIC: 04
1092 12:51:22.811795 APIC: 03
1093 12:51:22.812230 APIC: 05
1094 12:51:22.861689 APIC: 01
1095 12:51:22.862292 APIC: 07
1096 12:51:22.862700 APIC: 06
1097 12:51:22.863555 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 12:51:22.864053 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 12:51:22.864427 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 12:51:22.864786 PCI: 00:00.0
1101 12:51:22.865117 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 12:51:22.865447 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 12:51:22.911374 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 12:51:22.911842 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 12:51:22.912581 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 12:51:22.912943 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 12:51:22.913270 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 12:51:22.961192 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 12:51:22.961714 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 12:51:22.962492 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 12:51:22.962889 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 12:51:22.963277 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 12:51:22.979968 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 12:51:22.980505 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 12:51:22.983253 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 12:51:22.989937 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 12:51:22.993132 PCI: 00:02.0
1118 12:51:23.002865 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 12:51:23.012602 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 12:51:23.022544 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 12:51:23.023221 PCI: 00:04.0
1122 12:51:23.025554 PCI: 00:08.0
1123 12:51:23.035484 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 12:51:23.036007 PCI: 00:12.0
1125 12:51:23.045290 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 12:51:23.051793 PCI: 00:14.0 child on link 0 USB0 port 0
1127 12:51:23.061591 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 12:51:23.064991 USB0 port 0 child on link 0 USB2 port 0
1129 12:51:23.068137 USB2 port 0
1130 12:51:23.068757 USB2 port 1
1131 12:51:23.071354 USB2 port 2
1132 12:51:23.071888 USB2 port 3
1133 12:51:23.074518 USB2 port 5
1134 12:51:23.075043 USB2 port 6
1135 12:51:23.077829 USB2 port 9
1136 12:51:23.081186 USB3 port 0
1137 12:51:23.081682 USB3 port 1
1138 12:51:23.084530 USB3 port 2
1139 12:51:23.085013 USB3 port 3
1140 12:51:23.087669 USB3 port 4
1141 12:51:23.088133 PCI: 00:14.2
1142 12:51:23.097559 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 12:51:23.107146 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 12:51:23.110465 PCI: 00:14.3
1145 12:51:23.120370 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 12:51:23.123667 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 12:51:23.133286 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 12:51:23.136540 I2C: 01:15
1149 12:51:23.139856 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 12:51:23.149790 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 12:51:23.150369 I2C: 02:5d
1152 12:51:23.152919 GENERIC: 0.0
1153 12:51:23.153358 PCI: 00:16.0
1154 12:51:23.166093 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 12:51:23.166616 PCI: 00:17.0
1156 12:51:23.175906 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 12:51:23.185722 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 12:51:23.192210 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 12:51:23.201886 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 12:51:23.208477 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 12:51:23.218209 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 12:51:23.221662 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 12:51:23.231339 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:51:23.234608 I2C: 03:1a
1165 12:51:23.235105 I2C: 03:38
1166 12:51:23.237961 I2C: 03:39
1167 12:51:23.238406 I2C: 03:3a
1168 12:51:23.241179 I2C: 03:3b
1169 12:51:23.244346 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 12:51:23.254022 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 12:51:23.263901 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 12:51:23.270552 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 12:51:23.273642 PCI: 01:00.0
1174 12:51:23.283738 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 12:51:23.286932 PCI: 00:1e.0
1176 12:51:23.296908 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 12:51:23.306797 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 12:51:23.309943 PCI: 00:1e.2 child on link 0 SPI: 00
1179 12:51:23.319903 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 12:51:23.323134 SPI: 00
1181 12:51:23.326284 PCI: 00:1e.3 child on link 0 SPI: 01
1182 12:51:23.336122 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:51:23.336614 SPI: 01
1184 12:51:23.342490 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 12:51:23.349164 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 12:51:23.358901 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 12:51:23.362067 PNP: 0c09.0
1188 12:51:23.368410 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 12:51:23.371809 PCI: 00:1f.3
1190 12:51:23.381486 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 12:51:23.391388 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 12:51:23.391901 PCI: 00:1f.4
1193 12:51:23.401024 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 12:51:23.410916 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 12:51:23.414139 PCI: 00:1f.5
1196 12:51:23.420684 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 12:51:23.427527 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 12:51:23.434110 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 12:51:23.440477 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 12:51:23.443864 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 12:51:23.450437 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 12:51:23.453714 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 12:51:23.456975 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 12:51:23.463488 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 12:51:23.469835 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 12:51:23.476341 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 12:51:23.486147 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 12:51:23.492653 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 12:51:23.495907 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 12:51:23.505634 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 12:51:23.508929 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 12:51:23.515409 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 12:51:23.518575 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 12:51:23.524985 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 12:51:23.528342 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 12:51:23.535062 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 12:51:23.538145 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 12:51:23.541410 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 12:51:23.548098 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 12:51:23.551277 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 12:51:23.557875 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 12:51:23.561191 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 12:51:23.567544 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 12:51:23.570945 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 12:51:23.577481 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 12:51:23.580820 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 12:51:23.587064 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 12:51:23.590283 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 12:51:23.596886 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 12:51:23.600074 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 12:51:23.606803 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 12:51:23.610036 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 12:51:23.616539 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 12:51:23.622980 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 12:51:23.629616 avoid_fixed_resources: DOMAIN: 0000
1236 12:51:23.632736 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 12:51:23.639401 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 12:51:23.649323 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 12:51:23.655604 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 12:51:23.662233 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 12:51:23.672332 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 12:51:23.678762 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 12:51:23.685192 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 12:51:23.694920 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 12:51:23.701388 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 12:51:23.707880 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 12:51:23.714472 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 12:51:23.717785 Setting resources...
1249 12:51:23.724237 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 12:51:23.727413 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 12:51:23.730785 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 12:51:23.737199 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 12:51:23.740403 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 12:51:23.747063 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 12:51:23.753499 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 12:51:23.759921 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 12:51:23.766648 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 12:51:23.773163 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 12:51:23.776496 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 12:51:23.782770 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 12:51:23.785984 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 12:51:23.792674 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 12:51:23.796110 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 12:51:23.802520 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 12:51:23.805624 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 12:51:23.812367 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 12:51:23.815443 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 12:51:23.822116 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 12:51:23.825377 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 12:51:23.831630 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 12:51:23.835078 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 12:51:23.841631 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 12:51:23.844988 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 12:51:23.851421 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 12:51:23.854688 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 12:51:23.860915 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 12:51:23.864294 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 12:51:23.870970 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 12:51:23.874156 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 12:51:23.877209 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 12:51:23.887268 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 12:51:23.893724 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 12:51:23.900226 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 12:51:23.909946 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 12:51:23.913258 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 12:51:23.919525 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 12:51:23.926096 Root Device assign_resources, bus 0 link: 0
1288 12:51:23.929313 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 12:51:23.939329 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 12:51:23.945875 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 12:51:23.955603 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 12:51:23.961952 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 12:51:23.971830 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 12:51:23.978228 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 12:51:23.984839 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 12:51:23.987977 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 12:51:23.997665 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 12:51:24.004350 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 12:51:24.014170 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 12:51:24.020433 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 12:51:24.027207 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 12:51:24.030420 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 12:51:24.039948 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 12:51:24.042925 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 12:51:24.049776 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 12:51:24.055984 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 12:51:24.066013 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 12:51:24.072566 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 12:51:24.078935 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 12:51:24.088941 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 12:51:24.095454 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 12:51:24.102006 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 12:51:24.111961 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 12:51:24.115230 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 12:51:24.121723 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 12:51:24.128431 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 12:51:24.138252 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 12:51:24.147955 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 12:51:24.151230 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 12:51:24.160876 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 12:51:24.164262 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 12:51:24.173995 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 12:51:24.180505 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 12:51:24.186975 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 12:51:24.190396 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 12:51:24.200048 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 12:51:24.203338 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 12:51:24.206473 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 12:51:24.213305 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 12:51:24.216730 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 12:51:24.222822 LPC: Trying to open IO window from 800 size 1ff
1332 12:51:24.229404 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 12:51:24.239394 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 12:51:24.245879 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 12:51:24.255781 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 12:51:24.258957 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 12:51:24.265446 Root Device assign_resources, bus 0 link: 0
1338 12:51:24.268786 Done setting resources.
1339 12:51:24.275204 Show resources in subtree (Root Device)...After assigning values.
1340 12:51:24.278413 Root Device child on link 0 CPU_CLUSTER: 0
1341 12:51:24.281664 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 12:51:24.284914 APIC: 00
1343 12:51:24.285351 APIC: 02
1344 12:51:24.285808 APIC: 04
1345 12:51:24.288178 APIC: 03
1346 12:51:24.288634 APIC: 05
1347 12:51:24.291468 APIC: 01
1348 12:51:24.291933 APIC: 07
1349 12:51:24.292287 APIC: 06
1350 12:51:24.298111 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 12:51:24.307778 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 12:51:24.317484 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 12:51:24.318016 PCI: 00:00.0
1354 12:51:24.327241 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 12:51:24.337115 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 12:51:24.346755 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 12:51:24.356784 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 12:51:24.366439 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 12:51:24.376274 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 12:51:24.385923 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 12:51:24.395768 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 12:51:24.402288 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 12:51:24.411936 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 12:51:24.421704 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 12:51:24.431739 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 12:51:24.441315 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 12:51:24.450929 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 12:51:24.460777 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 12:51:24.470653 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 12:51:24.471316 PCI: 00:02.0
1371 12:51:24.480394 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 12:51:24.493535 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 12:51:24.500054 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 12:51:24.503257 PCI: 00:04.0
1375 12:51:24.503797 PCI: 00:08.0
1376 12:51:24.516224 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 12:51:24.516813 PCI: 00:12.0
1378 12:51:24.526121 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 12:51:24.532644 PCI: 00:14.0 child on link 0 USB0 port 0
1380 12:51:24.542431 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 12:51:24.545646 USB0 port 0 child on link 0 USB2 port 0
1382 12:51:24.548985 USB2 port 0
1383 12:51:24.549533 USB2 port 1
1384 12:51:24.552237 USB2 port 2
1385 12:51:24.552736 USB2 port 3
1386 12:51:24.555650 USB2 port 5
1387 12:51:24.556130 USB2 port 6
1388 12:51:24.558642 USB2 port 9
1389 12:51:24.559212 USB3 port 0
1390 12:51:24.562080 USB3 port 1
1391 12:51:24.562615 USB3 port 2
1392 12:51:24.565432 USB3 port 3
1393 12:51:24.568704 USB3 port 4
1394 12:51:24.569376 PCI: 00:14.2
1395 12:51:24.578264 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 12:51:24.588210 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 12:51:24.591481 PCI: 00:14.3
1398 12:51:24.601248 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 12:51:24.604743 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 12:51:24.614508 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 12:51:24.617576 I2C: 01:15
1402 12:51:24.620948 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 12:51:24.630674 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 12:51:24.633972 I2C: 02:5d
1405 12:51:24.634494 GENERIC: 0.0
1406 12:51:24.637348 PCI: 00:16.0
1407 12:51:24.647106 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 12:51:24.650301 PCI: 00:17.0
1409 12:51:24.660030 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 12:51:24.669824 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 12:51:24.679726 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 12:51:24.686002 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 12:51:24.696097 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 12:51:24.705788 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 12:51:24.712117 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 12:51:24.722050 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 12:51:24.722526 I2C: 03:1a
1418 12:51:24.725474 I2C: 03:38
1419 12:51:24.725904 I2C: 03:39
1420 12:51:24.728611 I2C: 03:3a
1421 12:51:24.729051 I2C: 03:3b
1422 12:51:24.735306 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 12:51:24.741765 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 12:51:24.751434 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 12:51:24.764483 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 12:51:24.764951 PCI: 01:00.0
1427 12:51:24.774355 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 12:51:24.777448 PCI: 00:1e.0
1429 12:51:24.787312 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 12:51:24.797194 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 12:51:24.803673 PCI: 00:1e.2 child on link 0 SPI: 00
1432 12:51:24.813549 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 12:51:24.814040 SPI: 00
1434 12:51:24.816710 PCI: 00:1e.3 child on link 0 SPI: 01
1435 12:51:24.829849 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 12:51:24.830336 SPI: 01
1437 12:51:24.833223 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 12:51:24.842921 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 12:51:24.852813 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 12:51:24.853309 PNP: 0c09.0
1441 12:51:24.862430 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 12:51:24.862923 PCI: 00:1f.3
1443 12:51:24.875651 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 12:51:24.885400 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 12:51:24.885891 PCI: 00:1f.4
1446 12:51:24.895043 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 12:51:24.904774 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 12:51:24.908019 PCI: 00:1f.5
1449 12:51:24.917955 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 12:51:24.921385 Done allocating resources.
1451 12:51:24.924473 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 12:51:24.927889 Enabling resources...
1453 12:51:24.934310 PCI: 00:00.0 subsystem <- 8086/9b61
1454 12:51:24.934795 PCI: 00:00.0 cmd <- 06
1455 12:51:24.937664 PCI: 00:02.0 subsystem <- 8086/9b41
1456 12:51:24.941078 PCI: 00:02.0 cmd <- 03
1457 12:51:24.944189 PCI: 00:08.0 cmd <- 06
1458 12:51:24.947423 PCI: 00:12.0 subsystem <- 8086/02f9
1459 12:51:24.950672 PCI: 00:12.0 cmd <- 02
1460 12:51:24.953901 PCI: 00:14.0 subsystem <- 8086/02ed
1461 12:51:24.957173 PCI: 00:14.0 cmd <- 02
1462 12:51:24.960466 PCI: 00:14.2 cmd <- 02
1463 12:51:24.963701 PCI: 00:14.3 subsystem <- 8086/02f0
1464 12:51:24.967055 PCI: 00:14.3 cmd <- 02
1465 12:51:24.970279 PCI: 00:15.0 subsystem <- 8086/02e8
1466 12:51:24.973970 PCI: 00:15.0 cmd <- 02
1467 12:51:24.976727 PCI: 00:15.1 subsystem <- 8086/02e9
1468 12:51:24.977231 PCI: 00:15.1 cmd <- 02
1469 12:51:24.983381 PCI: 00:16.0 subsystem <- 8086/02e0
1470 12:51:24.983862 PCI: 00:16.0 cmd <- 02
1471 12:51:24.989911 PCI: 00:17.0 subsystem <- 8086/02d3
1472 12:51:24.990348 PCI: 00:17.0 cmd <- 03
1473 12:51:24.993349 PCI: 00:19.0 subsystem <- 8086/02c5
1474 12:51:24.996538 PCI: 00:19.0 cmd <- 02
1475 12:51:24.999970 PCI: 00:1d.0 bridge ctrl <- 0013
1476 12:51:25.003311 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 12:51:25.006195 PCI: 00:1d.0 cmd <- 06
1478 12:51:25.009525 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 12:51:25.012834 PCI: 00:1e.0 cmd <- 06
1480 12:51:25.016026 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 12:51:25.019207 PCI: 00:1e.2 cmd <- 06
1482 12:51:25.022496 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 12:51:25.025825 PCI: 00:1e.3 cmd <- 02
1484 12:51:25.028910 PCI: 00:1f.0 subsystem <- 8086/0284
1485 12:51:25.032303 PCI: 00:1f.0 cmd <- 407
1486 12:51:25.035477 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 12:51:25.038818 PCI: 00:1f.3 cmd <- 02
1488 12:51:25.042172 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 12:51:25.045201 PCI: 00:1f.4 cmd <- 03
1490 12:51:25.048506 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 12:51:25.051984 PCI: 00:1f.5 cmd <- 406
1492 12:51:25.059574 PCI: 01:00.0 cmd <- 02
1493 12:51:25.064562 done.
1494 12:51:25.077115 ME: Version: 14.0.39.1367
1495 12:51:25.083637 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1496 12:51:25.086708 Initializing devices...
1497 12:51:25.087220 Root Device init ...
1498 12:51:25.093410 Chrome EC: Set SMI mask to 0x0000000000000000
1499 12:51:25.100020 Chrome EC: clear events_b mask to 0x0000000000000000
1500 12:51:25.103252 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 12:51:25.109682 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 12:51:25.116249 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 12:51:25.119305 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 12:51:25.126133 Root Device init finished in 35184 usecs
1505 12:51:25.129291 CPU_CLUSTER: 0 init ...
1506 12:51:25.132328 CPU_CLUSTER: 0 init finished in 2447 usecs
1507 12:51:25.137728 PCI: 00:00.0 init ...
1508 12:51:25.141206 CPU TDP: 15 Watts
1509 12:51:25.144306 CPU PL2 = 64 Watts
1510 12:51:25.147604 PCI: 00:00.0 init finished in 7074 usecs
1511 12:51:25.150912 PCI: 00:02.0 init ...
1512 12:51:25.154161 PCI: 00:02.0 init finished in 2254 usecs
1513 12:51:25.157563 PCI: 00:08.0 init ...
1514 12:51:25.160629 PCI: 00:08.0 init finished in 2253 usecs
1515 12:51:25.163963 PCI: 00:12.0 init ...
1516 12:51:25.167135 PCI: 00:12.0 init finished in 2254 usecs
1517 12:51:25.170426 PCI: 00:14.0 init ...
1518 12:51:25.173565 PCI: 00:14.0 init finished in 2251 usecs
1519 12:51:25.176845 PCI: 00:14.2 init ...
1520 12:51:25.180143 PCI: 00:14.2 init finished in 2253 usecs
1521 12:51:25.183520 PCI: 00:14.3 init ...
1522 12:51:25.186697 PCI: 00:14.3 init finished in 2269 usecs
1523 12:51:25.190189 PCI: 00:15.0 init ...
1524 12:51:25.193385 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 12:51:25.200208 PCI: 00:15.0 init finished in 5975 usecs
1526 12:51:25.200758 PCI: 00:15.1 init ...
1527 12:51:25.206603 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 12:51:25.209848 PCI: 00:15.1 init finished in 5977 usecs
1529 12:51:25.212995 PCI: 00:16.0 init ...
1530 12:51:25.216381 PCI: 00:16.0 init finished in 2243 usecs
1531 12:51:25.219621 PCI: 00:19.0 init ...
1532 12:51:25.222724 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 12:51:25.225868 PCI: 00:19.0 init finished in 5976 usecs
1534 12:51:25.229181 PCI: 00:1d.0 init ...
1535 12:51:25.232487 Initializing PCH PCIe bridge.
1536 12:51:25.235517 PCI: 00:1d.0 init finished in 5284 usecs
1537 12:51:25.239724 PCI: 00:1f.0 init ...
1538 12:51:25.242953 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 12:51:25.249450 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 12:51:25.250024 IOAPIC: ID = 0x02
1541 12:51:25.252849 IOAPIC: Dumping registers
1542 12:51:25.256128 reg 0x0000: 0x02000000
1543 12:51:25.259384 reg 0x0001: 0x00770020
1544 12:51:25.262538 reg 0x0002: 0x00000000
1545 12:51:25.265684 PCI: 00:1f.0 init finished in 23543 usecs
1546 12:51:25.269030 PCI: 00:1f.4 init ...
1547 12:51:25.272145 PCI: 00:1f.4 init finished in 2262 usecs
1548 12:51:25.283861 PCI: 01:00.0 init ...
1549 12:51:25.287239 PCI: 01:00.0 init finished in 2253 usecs
1550 12:51:25.291332 PNP: 0c09.0 init ...
1551 12:51:25.297866 Google Chrome EC uptime: 11.047 seconds
1552 12:51:25.301317 Google Chrome AP resets since EC boot: 0
1553 12:51:25.304490 Google Chrome most recent AP reset causes:
1554 12:51:25.311042 Google Chrome EC reset flags at last EC boot: reset-pin
1555 12:51:25.314306 PNP: 0c09.0 init finished in 20565 usecs
1556 12:51:25.317576 Devices initialized
1557 12:51:25.320652 Show all devs... After init.
1558 12:51:25.321086 Root Device: enabled 1
1559 12:51:25.323941 CPU_CLUSTER: 0: enabled 1
1560 12:51:25.327215 DOMAIN: 0000: enabled 1
1561 12:51:25.330501 APIC: 00: enabled 1
1562 12:51:25.330930 PCI: 00:00.0: enabled 1
1563 12:51:25.333724 PCI: 00:02.0: enabled 1
1564 12:51:25.337054 PCI: 00:04.0: enabled 0
1565 12:51:25.340236 PCI: 00:05.0: enabled 0
1566 12:51:25.340671 PCI: 00:12.0: enabled 1
1567 12:51:25.343442 PCI: 00:12.5: enabled 0
1568 12:51:25.346891 PCI: 00:12.6: enabled 0
1569 12:51:25.349948 PCI: 00:14.0: enabled 1
1570 12:51:25.350398 PCI: 00:14.1: enabled 0
1571 12:51:25.353155 PCI: 00:14.3: enabled 1
1572 12:51:25.356417 PCI: 00:14.5: enabled 0
1573 12:51:25.359768 PCI: 00:15.0: enabled 1
1574 12:51:25.360250 PCI: 00:15.1: enabled 1
1575 12:51:25.363146 PCI: 00:15.2: enabled 0
1576 12:51:25.366222 PCI: 00:15.3: enabled 0
1577 12:51:25.366656 PCI: 00:16.0: enabled 1
1578 12:51:25.369610 PCI: 00:16.1: enabled 0
1579 12:51:25.372734 PCI: 00:16.2: enabled 0
1580 12:51:25.376128 PCI: 00:16.3: enabled 0
1581 12:51:25.376593 PCI: 00:16.4: enabled 0
1582 12:51:25.379400 PCI: 00:16.5: enabled 0
1583 12:51:25.382627 PCI: 00:17.0: enabled 1
1584 12:51:25.385846 PCI: 00:19.0: enabled 1
1585 12:51:25.386284 PCI: 00:19.1: enabled 0
1586 12:51:25.389040 PCI: 00:19.2: enabled 0
1587 12:51:25.392307 PCI: 00:1a.0: enabled 0
1588 12:51:25.395675 PCI: 00:1c.0: enabled 0
1589 12:51:25.396124 PCI: 00:1c.1: enabled 0
1590 12:51:25.398931 PCI: 00:1c.2: enabled 0
1591 12:51:25.402272 PCI: 00:1c.3: enabled 0
1592 12:51:25.405483 PCI: 00:1c.4: enabled 0
1593 12:51:25.406011 PCI: 00:1c.5: enabled 0
1594 12:51:25.408613 PCI: 00:1c.6: enabled 0
1595 12:51:25.411887 PCI: 00:1c.7: enabled 0
1596 12:51:25.415160 PCI: 00:1d.0: enabled 1
1597 12:51:25.415637 PCI: 00:1d.1: enabled 0
1598 12:51:25.418542 PCI: 00:1d.2: enabled 0
1599 12:51:25.421782 PCI: 00:1d.3: enabled 0
1600 12:51:25.425002 PCI: 00:1d.4: enabled 0
1601 12:51:25.425482 PCI: 00:1d.5: enabled 0
1602 12:51:25.428250 PCI: 00:1e.0: enabled 1
1603 12:51:25.431428 PCI: 00:1e.1: enabled 0
1604 12:51:25.434727 PCI: 00:1e.2: enabled 1
1605 12:51:25.435247 PCI: 00:1e.3: enabled 1
1606 12:51:25.437972 PCI: 00:1f.0: enabled 1
1607 12:51:25.441258 PCI: 00:1f.1: enabled 0
1608 12:51:25.444487 PCI: 00:1f.2: enabled 0
1609 12:51:25.444949 PCI: 00:1f.3: enabled 1
1610 12:51:25.447710 PCI: 00:1f.4: enabled 1
1611 12:51:25.451028 PCI: 00:1f.5: enabled 1
1612 12:51:25.454180 PCI: 00:1f.6: enabled 0
1613 12:51:25.454674 USB0 port 0: enabled 1
1614 12:51:25.457732 I2C: 01:15: enabled 1
1615 12:51:25.460756 I2C: 02:5d: enabled 1
1616 12:51:25.461267 GENERIC: 0.0: enabled 1
1617 12:51:25.464062 I2C: 03:1a: enabled 1
1618 12:51:25.467377 I2C: 03:38: enabled 1
1619 12:51:25.470391 I2C: 03:39: enabled 1
1620 12:51:25.470848 I2C: 03:3a: enabled 1
1621 12:51:25.473670 I2C: 03:3b: enabled 1
1622 12:51:25.476826 PCI: 00:00.0: enabled 1
1623 12:51:25.477289 SPI: 00: enabled 1
1624 12:51:25.480245 SPI: 01: enabled 1
1625 12:51:25.483390 PNP: 0c09.0: enabled 1
1626 12:51:25.483829 USB2 port 0: enabled 1
1627 12:51:25.486924 USB2 port 1: enabled 1
1628 12:51:25.490001 USB2 port 2: enabled 0
1629 12:51:25.490433 USB2 port 3: enabled 0
1630 12:51:25.493121 USB2 port 5: enabled 0
1631 12:51:25.496541 USB2 port 6: enabled 1
1632 12:51:25.499851 USB2 port 9: enabled 1
1633 12:51:25.500290 USB3 port 0: enabled 1
1634 12:51:25.502936 USB3 port 1: enabled 1
1635 12:51:25.506329 USB3 port 2: enabled 1
1636 12:51:25.506888 USB3 port 3: enabled 1
1637 12:51:25.509626 USB3 port 4: enabled 0
1638 12:51:25.512685 APIC: 02: enabled 1
1639 12:51:25.513234 APIC: 04: enabled 1
1640 12:51:25.515917 APIC: 03: enabled 1
1641 12:51:25.519251 APIC: 05: enabled 1
1642 12:51:25.519685 APIC: 01: enabled 1
1643 12:51:25.522486 APIC: 07: enabled 1
1644 12:51:25.525894 APIC: 06: enabled 1
1645 12:51:25.526402 PCI: 00:08.0: enabled 1
1646 12:51:25.529044 PCI: 00:14.2: enabled 1
1647 12:51:25.532422 PCI: 01:00.0: enabled 1
1648 12:51:25.535674 Disabling ACPI via APMC:
1649 12:51:25.538890 done.
1650 12:51:25.542288 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 12:51:25.545256 ELOG: NV offset 0xaf0000 size 0x4000
1652 12:51:25.552872 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 12:51:25.559452 ELOG: Event(17) added with size 13 at 2022-07-14 12:03:27 UTC
1654 12:51:25.566107 ELOG: Event(92) added with size 9 at 2022-07-14 12:03:27 UTC
1655 12:51:25.572523 ELOG: Event(93) added with size 9 at 2022-07-14 12:03:27 UTC
1656 12:51:25.578842 ELOG: Event(9A) added with size 9 at 2022-07-14 12:03:27 UTC
1657 12:51:25.585636 ELOG: Event(9E) added with size 10 at 2022-07-14 12:03:27 UTC
1658 12:51:25.591933 ELOG: Event(9F) added with size 14 at 2022-07-14 12:03:27 UTC
1659 12:51:25.598425 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1660 12:51:25.604994 ELOG: Event(A1) added with size 10 at 2022-07-14 12:03:27 UTC
1661 12:51:25.611498 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 12:51:25.618030 ELOG: Event(A0) added with size 9 at 2022-07-14 12:03:27 UTC
1663 12:51:25.621128 elog_add_boot_reason: Logged dev mode boot
1664 12:51:25.624588 Finalize devices...
1665 12:51:25.627866 PCI: 00:17.0 final
1666 12:51:25.628371 Devices finalized
1667 12:51:25.634339 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 12:51:25.640698 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 12:51:25.644092 ME: HFSTS1 : 0x90000245
1670 12:51:25.647271 ME: HFSTS2 : 0x3B850126
1671 12:51:25.650609 ME: HFSTS3 : 0x00000020
1672 12:51:25.657024 ME: HFSTS4 : 0x00004800
1673 12:51:25.660431 ME: HFSTS5 : 0x00000000
1674 12:51:25.663420 ME: HFSTS6 : 0x40400006
1675 12:51:25.667167 ME: Manufacturing Mode : NO
1676 12:51:25.670030 ME: FW Partition Table : OK
1677 12:51:25.673194 ME: Bringup Loader Failure : NO
1678 12:51:25.676602 ME: Firmware Init Complete : YES
1679 12:51:25.679845 ME: Boot Options Present : NO
1680 12:51:25.683144 ME: Update In Progress : NO
1681 12:51:25.686338 ME: D0i3 Support : YES
1682 12:51:25.689504 ME: Low Power State Enabled : NO
1683 12:51:25.692794 ME: CPU Replaced : NO
1684 12:51:25.695950 ME: CPU Replacement Valid : YES
1685 12:51:25.699120 ME: Current Working State : 5
1686 12:51:25.702521 ME: Current Operation State : 1
1687 12:51:25.705845 ME: Current Operation Mode : 0
1688 12:51:25.709190 ME: Error Code : 0
1689 12:51:25.712272 ME: CPU Debug Disabled : YES
1690 12:51:25.715845 ME: TXT Support : NO
1691 12:51:25.722120 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 12:51:25.728542 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 12:51:25.729016 CBFS @ c08000 size 3f8000
1694 12:51:25.735236 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 12:51:25.738403 CBFS: Locating 'fallback/dsdt.aml'
1696 12:51:25.744814 CBFS: Found @ offset 10bb80 size 3fa5
1697 12:51:25.748215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 12:51:25.751529 CBFS @ c08000 size 3f8000
1699 12:51:25.757854 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 12:51:25.761023 CBFS: Locating 'fallback/slic'
1701 12:51:25.764388 CBFS: 'fallback/slic' not found.
1702 12:51:25.770939 ACPI: Writing ACPI tables at 99b3e000.
1703 12:51:25.771442 ACPI: * FACS
1704 12:51:25.774117 ACPI: * DSDT
1705 12:51:25.777450 Ramoops buffer: 0x100000@0x99a3d000.
1706 12:51:25.780874 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 12:51:25.784101 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 12:51:25.788101 Google Chrome EC: version:
1709 12:51:25.791352 ro: helios_v2.0.2659-56403530b
1710 12:51:25.794707 rw: helios_v2.0.2849-c41de27e7d
1711 12:51:25.797724 running image: 1
1712 12:51:25.801165 ACPI: * FADT
1713 12:51:25.801787 SCI is IRQ9
1714 12:51:25.807576 ACPI: added table 1/32, length now 40
1715 12:51:25.808094 ACPI: * SSDT
1716 12:51:25.810893 Found 1 CPU(s) with 8 core(s) each.
1717 12:51:25.817430 Error: Could not locate 'wifi_sar' in VPD.
1718 12:51:25.820574 Checking CBFS for default SAR values
1719 12:51:25.824035 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 12:51:25.827123 CBFS @ c08000 size 3f8000
1721 12:51:25.833683 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 12:51:25.836874 CBFS: Locating 'wifi_sar_defaults.hex'
1723 12:51:25.840230 CBFS: Found @ offset 5fac0 size 77
1724 12:51:25.843547 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 12:51:25.849990 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 12:51:25.853123 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 12:51:25.859789 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 12:51:25.862987 failed to find key in VPD: dsm_calib_r0_0
1729 12:51:25.872692 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 12:51:25.879214 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 12:51:25.882479 failed to find key in VPD: dsm_calib_r0_1
1732 12:51:25.892378 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 12:51:25.895733 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 12:51:25.898873 failed to find key in VPD: dsm_calib_r0_2
1735 12:51:25.908559 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 12:51:25.915098 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 12:51:25.918513 failed to find key in VPD: dsm_calib_r0_3
1738 12:51:25.928174 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 12:51:25.931466 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 12:51:25.937881 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 12:51:25.941322 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 12:51:25.944976 EC returned error result code 1
1743 12:51:25.948068 EC returned error result code 1
1744 12:51:25.954720 EC returned error result code 1
1745 12:51:25.957812 PS2K: Bad resp from EC. Vivaldi disabled!
1746 12:51:25.964428 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 12:51:25.967802 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 12:51:25.974317 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 12:51:25.977459 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 12:51:25.983953 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 12:51:25.990499 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 12:51:25.996963 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 12:51:26.003406 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 12:51:26.006807 ACPI: added table 2/32, length now 44
1755 12:51:26.007327 ACPI: * MCFG
1756 12:51:26.010188 ACPI: added table 3/32, length now 48
1757 12:51:26.013310 ACPI: * TPM2
1758 12:51:26.016469 TPM2 log created at 99a2d000
1759 12:51:26.019772 ACPI: added table 4/32, length now 52
1760 12:51:26.022924 ACPI: * MADT
1761 12:51:26.023401 SCI is IRQ9
1762 12:51:26.026255 ACPI: added table 5/32, length now 56
1763 12:51:26.029592 current = 99b43ac0
1764 12:51:26.030035 ACPI: * DMAR
1765 12:51:26.032804 ACPI: added table 6/32, length now 60
1766 12:51:26.036004 ACPI: * IGD OpRegion
1767 12:51:26.039234 GMA: Found VBT in CBFS
1768 12:51:26.042666 GMA: Found valid VBT in CBFS
1769 12:51:26.045920 ACPI: added table 7/32, length now 64
1770 12:51:26.046374 ACPI: * HPET
1771 12:51:26.052492 ACPI: added table 8/32, length now 68
1772 12:51:26.052925 ACPI: done.
1773 12:51:26.055679 ACPI tables: 31744 bytes.
1774 12:51:26.059215 smbios_write_tables: 99a2c000
1775 12:51:26.062174 EC returned error result code 3
1776 12:51:26.065500 Couldn't obtain OEM name from CBI
1777 12:51:26.068868 Create SMBIOS type 17
1778 12:51:26.072036 PCI: 00:00.0 (Intel Cannonlake)
1779 12:51:26.072474 PCI: 00:14.3 (Intel WiFi)
1780 12:51:26.075205 SMBIOS tables: 939 bytes.
1781 12:51:26.081946 Writing table forward entry at 0x00000500
1782 12:51:26.085312 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 12:51:26.091626 Writing coreboot table at 0x99b62000
1784 12:51:26.095065 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 12:51:26.101681 1. 0000000000001000-000000000009ffff: RAM
1786 12:51:26.104788 2. 00000000000a0000-00000000000fffff: RESERVED
1787 12:51:26.108099 3. 0000000000100000-0000000099a2bfff: RAM
1788 12:51:26.114555 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 12:51:26.121397 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 12:51:26.127593 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 12:51:26.130776 7. 000000009a000000-000000009f7fffff: RESERVED
1792 12:51:26.137506 8. 00000000e0000000-00000000efffffff: RESERVED
1793 12:51:26.140655 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 12:51:26.143921 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 12:51:26.150390 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 12:51:26.153705 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 12:51:26.159939 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 12:51:26.163154 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 12:51:26.169798 15. 0000000100000000-000000045e7fffff: RAM
1800 12:51:26.173179 Graphics framebuffer located at 0xc0000000
1801 12:51:26.176468 Passing 5 GPIOs to payload:
1802 12:51:26.179622 NAME | PORT | POLARITY | VALUE
1803 12:51:26.186211 write protect | undefined | high | low
1804 12:51:26.192596 lid | undefined | high | high
1805 12:51:26.195978 power | undefined | high | low
1806 12:51:26.202640 oprom | undefined | high | low
1807 12:51:26.205765 EC in RW | 0x000000cb | high | low
1808 12:51:26.209038 Board ID: 4
1809 12:51:26.212344 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 12:51:26.215648 CBFS @ c08000 size 3f8000
1811 12:51:26.222105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 12:51:26.229008 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum 9a04
1813 12:51:26.232013 coreboot table: 1452 bytes.
1814 12:51:26.235112 IMD ROOT 0. 99fff000 00001000
1815 12:51:26.238366 IMD SMALL 1. 99ffe000 00001000
1816 12:51:26.241761 FSP MEMORY 2. 99c4e000 003b0000
1817 12:51:26.244889 CONSOLE 3. 99c2e000 00020000
1818 12:51:26.248193 FMAP 4. 99c2d000 0000054e
1819 12:51:26.251456 TIME STAMP 5. 99c2c000 00000910
1820 12:51:26.254794 VBOOT WORK 6. 99c18000 00014000
1821 12:51:26.258051 MRC DATA 7. 99c16000 00001958
1822 12:51:26.261131 ROMSTG STCK 8. 99c15000 00001000
1823 12:51:26.264578 AFTER CAR 9. 99c0b000 0000a000
1824 12:51:26.267656 RAMSTAGE 10. 99baf000 0005c000
1825 12:51:26.270914 REFCODE 11. 99b7a000 00035000
1826 12:51:26.274412 SMM BACKUP 12. 99b6a000 00010000
1827 12:51:26.277528 COREBOOT 13. 99b62000 00008000
1828 12:51:26.280793 ACPI 14. 99b3e000 00024000
1829 12:51:26.284016 ACPI GNVS 15. 99b3d000 00001000
1830 12:51:26.287328 RAMOOPS 16. 99a3d000 00100000
1831 12:51:26.290640 TPM2 TCGLOG17. 99a2d000 00010000
1832 12:51:26.293867 SMBIOS 18. 99a2c000 00000800
1833 12:51:26.297262 IMD small region:
1834 12:51:26.300314 IMD ROOT 0. 99ffec00 00000400
1835 12:51:26.303823 FSP RUNTIME 1. 99ffebe0 00000004
1836 12:51:26.306945 EC HOSTEVENT 2. 99ffebc0 00000008
1837 12:51:26.310265 POWER STATE 3. 99ffeb80 00000040
1838 12:51:26.313435 ROMSTAGE 4. 99ffeb60 00000004
1839 12:51:26.317006 MEM INFO 5. 99ffe9a0 000001b9
1840 12:51:26.319962 MTRR: Physical address space:
1841 12:51:26.326768 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1842 12:51:26.333177 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1843 12:51:26.339471 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1844 12:51:26.345970 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1845 12:51:26.352635 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1846 12:51:26.359060 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1847 12:51:26.362277 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1848 12:51:26.368843 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 12:51:26.372019 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 12:51:26.375569 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 12:51:26.378871 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 12:51:26.385112 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 12:51:26.388365 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 12:51:26.391548 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 12:51:26.398302 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 12:51:26.401468 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 12:51:26.404713 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 12:51:26.407974 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 12:51:26.411395 call enable_fixed_mtrr()
1860 12:51:26.414687 CPU physical address size: 39 bits
1861 12:51:26.421282 MTRR: default type WB/UC MTRR counts: 6/8.
1862 12:51:26.424506 MTRR: WB selected as default type.
1863 12:51:26.430907 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1864 12:51:26.437343 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1865 12:51:26.440781 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1866 12:51:26.447098 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1867 12:51:26.453732 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1868 12:51:26.460256 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1869 12:51:26.466799 MTRR: Fixed MSR 0x250 0x0606060606060606
1870 12:51:26.469986 MTRR: Fixed MSR 0x258 0x0606060606060606
1871 12:51:26.473284 MTRR: Fixed MSR 0x259 0x0000000000000000
1872 12:51:26.479745 MTRR: Fixed MSR 0x268 0x0606060606060606
1873 12:51:26.483040 MTRR: Fixed MSR 0x269 0x0606060606060606
1874 12:51:26.486282 MTRR: Fixed MSR 0x26a 0x0606060606060606
1875 12:51:26.489444 MTRR: Fixed MSR 0x26b 0x0606060606060606
1876 12:51:26.495946 MTRR: Fixed MSR 0x26c 0x0606060606060606
1877 12:51:26.499279 MTRR: Fixed MSR 0x26d 0x0606060606060606
1878 12:51:26.502485 MTRR: Fixed MSR 0x26e 0x0606060606060606
1879 12:51:26.505873 MTRR: Fixed MSR 0x26f 0x0606060606060606
1880 12:51:26.506522
1881 12:51:26.509228 MTRR check
1882 12:51:26.512406 Fixed MTRRs : Enabled
1883 12:51:26.512852 Variable MTRRs: Enabled
1884 12:51:26.513210
1885 12:51:26.515979 call enable_fixed_mtrr()
1886 12:51:26.522339 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1887 12:51:26.525578 CPU physical address size: 39 bits
1888 12:51:26.528895 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1889 12:51:26.535450 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 12:51:26.538568 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 12:51:26.541948 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 12:51:26.545262 MTRR: Fixed MSR 0x259 0x0000000000000000
1893 12:51:26.551721 MTRR: Fixed MSR 0x268 0x0606060606060606
1894 12:51:26.554959 MTRR: Fixed MSR 0x269 0x0606060606060606
1895 12:51:26.558262 MTRR: Fixed MSR 0x26a 0x0606060606060606
1896 12:51:26.564813 MTRR: Fixed MSR 0x26b 0x0606060606060606
1897 12:51:26.567949 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 12:51:26.571251 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 12:51:26.574373 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 12:51:26.580787 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 12:51:26.584131 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 12:51:26.587554 call enable_fixed_mtrr()
1903 12:51:26.590705 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 12:51:26.593916 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 12:51:26.597181 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 12:51:26.603829 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 12:51:26.607086 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 12:51:26.610319 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 12:51:26.613484 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 12:51:26.619941 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 12:51:26.623107 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 12:51:26.626448 CPU physical address size: 39 bits
1913 12:51:26.629876 call enable_fixed_mtrr()
1914 12:51:26.633065 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 12:51:26.639576 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 12:51:26.642752 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 12:51:26.646221 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:51:26.649160 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:51:26.655680 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:51:26.659141 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:51:26.662313 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:51:26.665698 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:51:26.672266 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:51:26.675336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:51:26.678632 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:51:26.681919 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 12:51:26.688591 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 12:51:26.691739 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 12:51:26.694936 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 12:51:26.698268 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 12:51:26.704759 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 12:51:26.707853 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 12:51:26.711107 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 12:51:26.714604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 12:51:26.721064 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 12:51:26.724281 call enable_fixed_mtrr()
1937 12:51:26.724713 call enable_fixed_mtrr()
1938 12:51:26.727693 CPU physical address size: 39 bits
1939 12:51:26.734127 CPU physical address size: 39 bits
1940 12:51:26.737335 CPU physical address size: 39 bits
1941 12:51:26.740663 CBFS @ c08000 size 3f8000
1942 12:51:26.744034 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1943 12:51:26.747236 CBFS: Locating 'fallback/payload'
1944 12:51:26.753399 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 12:51:26.756591 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 12:51:26.760020 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 12:51:26.763175 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 12:51:26.769558 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 12:51:26.772875 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 12:51:26.776147 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 12:51:26.779419 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 12:51:26.785805 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 12:51:26.789153 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 12:51:26.792544 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 12:51:26.795807 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 12:51:26.802055 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:51:26.805487 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:51:26.808896 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:51:26.815407 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:51:26.818357 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:51:26.821811 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:51:26.825058 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:51:26.831385 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:51:26.834685 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:51:26.837947 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:51:26.841303 call enable_fixed_mtrr()
1967 12:51:26.844488 call enable_fixed_mtrr()
1968 12:51:26.847734 CBFS: Found @ offset 1c96c0 size 3f798
1969 12:51:26.850745 CPU physical address size: 39 bits
1970 12:51:26.854265 CPU physical address size: 39 bits
1971 12:51:26.860775 Checking segment from ROM address 0xffdd16f8
1972 12:51:26.864017 Checking segment from ROM address 0xffdd1714
1973 12:51:26.867496 Loading segment from ROM address 0xffdd16f8
1974 12:51:26.870581 code (compression=0)
1975 12:51:26.880222 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1976 12:51:26.886732 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1977 12:51:26.890024 it's not compressed!
1978 12:51:26.982205 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1979 12:51:26.988627 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1980 12:51:26.994860 Loading segment from ROM address 0xffdd1714
1981 12:51:26.995382 Entry Point 0x30000000
1982 12:51:26.998384 Loaded segments
1983 12:51:27.004191 Finalizing chipset.
1984 12:51:27.007516 Finalizing SMM.
1985 12:51:27.010843 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1986 12:51:27.014067 mp_park_aps done after 0 msecs.
1987 12:51:27.020576 Jumping to boot code at 30000000(99b62000)
1988 12:51:27.027169 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1989 12:51:27.027611
1990 12:51:27.030364 Starting depthcharge on Helios...
1991 12:51:27.031566 end: 2.2.3 depthcharge-start (duration 00:00:20) [common]
1992 12:51:27.032204 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1993 12:51:27.032631 Setting prompt string to ['hatch:']
1994 12:51:27.033060 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1995 12:51:27.040218 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1996 12:51:27.046649 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1997 12:51:27.053258 board_setup: Info: eMMC controller not present; skipping
1998 12:51:27.056454 New NVMe Controller 0x30053ac0 @ 00:1d:00
1999 12:51:27.062933 board_setup: Info: SDHCI controller not present; skipping
2000 12:51:27.069598 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2001 12:51:27.070220 Wipe memory regions:
2002 12:51:27.076181 [0x00000000001000, 0x000000000a0000)
2003 12:51:27.079371 [0x00000000100000, 0x00000030000000)
2004 12:51:27.145067 [0x00000030657430, 0x00000099a2c000)
2005 12:51:27.285510 [0x00000100000000, 0x0000045e800000)
2006 12:51:28.667787 R8152: Initializing
2007 12:51:28.671049 Version 9 (ocp_data = 6010)
2008 12:51:28.675303 R8152: Done initializing
2009 12:51:28.678412 Adding net device
2010 12:51:29.174772 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2011 12:51:29.175329
2012 12:51:29.176104 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2014 12:51:29.277600 hatch: tftpboot 192.168.201.1 6819497/tftp-deploy-_a8jr1de/kernel/bzImage 6819497/tftp-deploy-_a8jr1de/kernel/cmdline 6819497/tftp-deploy-_a8jr1de/ramdisk/ramdisk.cpio.gz
2015 12:51:29.278251 Setting prompt string to ['Starting kernel']
2016 12:51:29.278677 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2017 12:51:29.279125 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:38)
2018 12:51:29.282629 tftpboot 192.168.201.1 6819497/tftp-deploy-_a8jr1de/kernel/bzImy-_a8jr1de/kernel/cmdline 6819497/tftp-deploy-_a8jr1de/ramdisk/ramdisk.cpio.gz
2019 12:51:29.283163 Waiting for link
2020 12:51:29.483631 done.
2021 12:51:29.484196 MAC: 88:54:1f:0f:6e:7d
2022 12:51:29.486855 Sending DHCP discover... done.
2023 12:51:29.490231 Waiting for reply... done.
2024 12:51:29.493347 Sending DHCP request... done.
2025 12:51:29.499886 Waiting for reply... done.
2026 12:51:29.500435 My ip is 192.168.201.104
2027 12:51:29.503284 The DHCP server ip is 192.168.201.1
2028 12:51:29.509702 TFTP server IP predefined by user: 192.168.201.1
2029 12:51:29.516576 Bootfile predefined by user: 6819497/tftp-deploy-_a8jr1de/kernel/bzImage
2030 12:51:29.519379 Sending tftp read request... done.
2031 12:51:29.526358 Waiting for the transfer...
2032 12:51:29.835991 00000000 ################################################################
2033 12:51:30.081411 00080000 ################################################################
2034 12:51:30.313018 00100000 ################################################################
2035 12:51:30.548154 00180000 ################################################################
2036 12:51:30.779738 00200000 ################################################################
2037 12:51:31.019294 00280000 ################################################################
2038 12:51:31.265660 00300000 ################################################################
2039 12:51:31.506453 00380000 ################################################################
2040 12:51:31.755239 00400000 ################################################################
2041 12:51:31.987518 00480000 ################################################################
2042 12:51:32.224934 00500000 ################################################################
2043 12:51:32.465350 00580000 ################################################################
2044 12:51:32.694059 00600000 ################################################################ done.
2045 12:51:32.697506 The bootfile was 6811536 bytes long.
2046 12:51:32.700832 Sending tftp read request... done.
2047 12:51:32.703985 Waiting for the transfer...
2048 12:51:32.939144 00000000 ################################################################
2049 12:51:33.171776 00080000 ################################################################
2050 12:51:33.405440 00100000 ################################################################
2051 12:51:33.641031 00180000 ################################################################
2052 12:51:33.874773 00200000 ################################################################
2053 12:51:34.110742 00280000 ################################################################
2054 12:51:34.355705 00300000 ################################################################
2055 12:51:34.593712 00380000 ################################################################
2056 12:51:34.837979 00400000 ################################################################
2057 12:51:35.078297 00480000 ################################################################
2058 12:51:35.187158 00500000 ############################# done.
2059 12:51:35.190515 Sending tftp read request... done.
2060 12:51:35.193616 Waiting for the transfer...
2061 12:51:35.193702 00000000 # done.
2062 12:51:35.203733 Command line loaded dynamically from TFTP file: 6819497/tftp-deploy-_a8jr1de/kernel/cmdline
2063 12:51:35.229761 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819497/extract-nfsrootfs-26rt34zd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2064 12:51:35.236267 ec_init(0): CrosEC protocol v3 supported (256, 256)
2065 12:51:35.242948 Shutting down all USB controllers.
2066 12:51:35.243069 Removing current net device
2067 12:51:35.250519 Finalizing coreboot
2068 12:51:35.257074 Exiting depthcharge with code 4 at timestamp: 15502093
2069 12:51:35.257160
2070 12:51:35.257228 Starting kernel ...
2071 12:51:35.257522 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2072 12:51:35.257619 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2073 12:51:35.257692 Setting prompt string to ['Linux version [0-9]']
2074 12:51:35.257760 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2075 12:51:35.257829 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2076 12:51:35.260279
2077 12:51:35.260364
2079 12:56:07.258498 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2081 12:56:07.259613 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2083 12:56:07.260543 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2086 12:56:07.262177 end: 2 depthcharge-action (duration 00:05:00) [common]
2088 12:56:07.263433 Cleaning after the job
2089 12:56:07.263951 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/ramdisk
2090 12:56:07.266209 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/kernel
2091 12:56:07.268765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/nfsrootfs
2092 12:56:07.346207 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819497/tftp-deploy-_a8jr1de/modules
2093 12:56:07.346505 start: 4.1 power-off (timeout 00:00:30) [common]
2094 12:56:07.346677 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2095 12:56:07.365889 >> Command sent successfully.
2096 12:56:07.367738 Returned 0 in 0 seconds
2097 12:56:07.468915 end: 4.1 power-off (duration 00:00:00) [common]
2099 12:56:07.471342 start: 4.2 read-feedback (timeout 00:10:00) [common]
2100 12:56:07.472695 Listened to connection for namespace 'common' for up to 1s
2101 12:56:08.475226 Finalising connection for namespace 'common'
2102 12:56:08.475910 Disconnecting from shell: Finalise
2103 12:56:08.577419 end: 4.2 read-feedback (duration 00:00:01) [common]
2104 12:56:08.578025 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819497
2105 12:56:08.766287 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819497
2106 12:56:08.766490 JobError: Your job cannot terminate cleanly.