Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 12:51:03.849576 lava-dispatcher, installed at version: 2022.04
2 12:51:03.849801 start: 0 validate
3 12:51:03.849947 Start time: 2022-07-14 12:51:03.849939+00:00 (UTC)
4 12:51:03.850091 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:51:03.850237 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220708.0%2Famd64%2Finitrd.cpio.gz exists
6 12:51:04.142551 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:51:04.142742 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:51:04.432543 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:51:04.432712 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220708.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:51:04.713643 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:51:04.713815 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-508-gd887d54a1be6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:51:05.009396 validate duration: 1.16
14 12:51:05.009699 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:51:05.009811 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:51:05.009910 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:51:05.010023 Not decompressing ramdisk as can be used compressed.
18 12:51:05.010117 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220708.0/amd64/initrd.cpio.gz
19 12:51:05.010189 saving as /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/ramdisk/initrd.cpio.gz
20 12:51:05.010257 total size: 5411082 (5MB)
21 12:51:05.011434 progress 0% (0MB)
22 12:51:05.013038 progress 5% (0MB)
23 12:51:05.014523 progress 10% (0MB)
24 12:51:05.016015 progress 15% (0MB)
25 12:51:05.017681 progress 20% (1MB)
26 12:51:05.019134 progress 25% (1MB)
27 12:51:05.020590 progress 30% (1MB)
28 12:51:05.022042 progress 35% (1MB)
29 12:51:05.023654 progress 40% (2MB)
30 12:51:05.025104 progress 45% (2MB)
31 12:51:05.026564 progress 50% (2MB)
32 12:51:05.028049 progress 55% (2MB)
33 12:51:05.029692 progress 60% (3MB)
34 12:51:05.031133 progress 65% (3MB)
35 12:51:05.032572 progress 70% (3MB)
36 12:51:05.034024 progress 75% (3MB)
37 12:51:05.035629 progress 80% (4MB)
38 12:51:05.037073 progress 85% (4MB)
39 12:51:05.038510 progress 90% (4MB)
40 12:51:05.039958 progress 95% (4MB)
41 12:51:05.041676 progress 100% (5MB)
42 12:51:05.041878 5MB downloaded in 0.03s (163.22MB/s)
43 12:51:05.042048 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:51:05.042328 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:51:05.042430 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:51:05.042527 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:51:05.042641 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:51:05.042717 saving as /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/kernel/bzImage
50 12:51:05.042786 total size: 6811536 (6MB)
51 12:51:05.042854 No compression specified
52 12:51:05.044002 progress 0% (0MB)
53 12:51:05.045958 progress 5% (0MB)
54 12:51:05.047819 progress 10% (0MB)
55 12:51:05.049832 progress 15% (1MB)
56 12:51:05.051649 progress 20% (1MB)
57 12:51:05.053458 progress 25% (1MB)
58 12:51:05.055444 progress 30% (1MB)
59 12:51:05.057244 progress 35% (2MB)
60 12:51:05.059193 progress 40% (2MB)
61 12:51:05.060971 progress 45% (2MB)
62 12:51:05.062760 progress 50% (3MB)
63 12:51:05.064702 progress 55% (3MB)
64 12:51:05.066504 progress 60% (3MB)
65 12:51:05.068463 progress 65% (4MB)
66 12:51:05.070300 progress 70% (4MB)
67 12:51:05.072091 progress 75% (4MB)
68 12:51:05.074065 progress 80% (5MB)
69 12:51:05.075860 progress 85% (5MB)
70 12:51:05.077845 progress 90% (5MB)
71 12:51:05.079635 progress 95% (6MB)
72 12:51:05.081449 progress 100% (6MB)
73 12:51:05.081742 6MB downloaded in 0.04s (166.77MB/s)
74 12:51:05.081907 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:51:05.082172 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:51:05.082273 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:51:05.082370 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:51:05.082485 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220708.0/amd64/full.rootfs.tar.xz
80 12:51:05.082560 saving as /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/nfsrootfs/full.rootfs.tar
81 12:51:05.082628 total size: 122473712 (116MB)
82 12:51:05.082697 Using unxz to decompress xz
83 12:51:05.086212 progress 0% (0MB)
84 12:51:05.573479 progress 5% (5MB)
85 12:51:06.077261 progress 10% (11MB)
86 12:51:06.577442 progress 15% (17MB)
87 12:51:07.087132 progress 20% (23MB)
88 12:51:07.439537 progress 25% (29MB)
89 12:51:07.812896 progress 30% (35MB)
90 12:51:08.083215 progress 35% (40MB)
91 12:51:08.304828 progress 40% (46MB)
92 12:51:08.687838 progress 45% (52MB)
93 12:51:09.085019 progress 50% (58MB)
94 12:51:09.452067 progress 55% (64MB)
95 12:51:09.836614 progress 60% (70MB)
96 12:51:10.201367 progress 65% (75MB)
97 12:51:10.631237 progress 70% (81MB)
98 12:51:11.096298 progress 75% (87MB)
99 12:51:11.545624 progress 80% (93MB)
100 12:51:11.667792 progress 85% (99MB)
101 12:51:11.848679 progress 90% (105MB)
102 12:51:12.209667 progress 95% (110MB)
103 12:51:12.613711 progress 100% (116MB)
104 12:51:12.620187 116MB downloaded in 7.54s (15.50MB/s)
105 12:51:12.620479 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:51:12.620779 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:51:12.620885 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:51:12.620983 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:51:12.621115 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-508-gd887d54a1be6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:51:12.621198 saving as /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/modules/modules.tar
112 12:51:12.621267 total size: 51960 (0MB)
113 12:51:12.621337 Using unxz to decompress xz
114 12:51:12.624758 progress 63% (0MB)
115 12:51:12.625174 progress 100% (0MB)
116 12:51:12.628775 0MB downloaded in 0.01s (6.61MB/s)
117 12:51:12.629018 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:51:12.629325 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:51:12.629433 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 12:51:12.629538 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 12:51:14.450240 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6819486/extract-nfsrootfs-dcqhu23w
123 12:51:14.450462 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:51:14.450577 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:51:14.450725 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb
126 12:51:14.450836 makedir: /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin
127 12:51:14.450927 makedir: /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/tests
128 12:51:14.451015 makedir: /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/results
129 12:51:14.451119 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-add-keys
130 12:51:14.451265 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-add-sources
131 12:51:14.451399 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-background-process-start
132 12:51:14.451526 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-background-process-stop
133 12:51:14.451648 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-common-functions
134 12:51:14.451767 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-echo-ipv4
135 12:51:14.451885 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-install-packages
136 12:51:14.452003 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-installed-packages
137 12:51:14.452123 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-os-build
138 12:51:14.452239 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-probe-channel
139 12:51:14.452356 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-probe-ip
140 12:51:14.452471 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-target-ip
141 12:51:14.452587 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-target-mac
142 12:51:14.452704 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-target-storage
143 12:51:14.452822 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-case
144 12:51:14.452940 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-event
145 12:51:14.453055 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-feedback
146 12:51:14.453257 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-raise
147 12:51:14.453378 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-reference
148 12:51:14.453498 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-runner
149 12:51:14.453615 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-set
150 12:51:14.453732 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-test-shell
151 12:51:14.453851 Updating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-install-packages (oe)
152 12:51:14.453974 Updating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/bin/lava-installed-packages (oe)
153 12:51:14.454077 Creating /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/environment
154 12:51:14.454169 LAVA metadata
155 12:51:14.454239 - LAVA_JOB_ID=6819486
156 12:51:14.454308 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:51:14.454416 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:51:14.454487 skipped lava-vland-overlay
159 12:51:14.454570 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:51:14.454660 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:51:14.454727 skipped lava-multinode-overlay
162 12:51:14.454808 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:51:14.454898 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:51:14.454975 Loading test definitions
165 12:51:14.455077 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 12:51:14.455166 Using /lava-6819486 at stage 0
167 12:51:14.455275 Fetching tests from https://github.com/kernelci/test-definitions
168 12:51:14.455361 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/0/tests/0_ltp-timers'
169 12:51:19.404881 Running '/usr/bin/git checkout kernelci.org
170 12:51:19.556123 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 12:51:19.556851 uuid=6819486_1.5.2.3.1 testdef=None
172 12:51:19.557034 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 12:51:19.557329 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 12:51:19.558059 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:51:19.558322 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 12:51:19.559340 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:51:19.559631 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 12:51:19.560485 runner path: /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/0/tests/0_ltp-timers test_uuid 6819486_1.5.2.3.1
182 12:51:19.560583 GRP_TEST='TMR'
183 12:51:19.560655 SKIPFILE='skipfile-lkft.yaml'
184 12:51:19.560721 SKIP_INSTALL='true'
185 12:51:19.560784 TST_CMDFILES=''
186 12:51:19.560933 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 12:51:19.561183 Creating lava-test-runner.conf files
189 12:51:19.561255 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6819486/lava-overlay-kze5ipwb/lava-6819486/0 for stage 0
190 12:51:19.561347 - 0_ltp-timers
191 12:51:19.561458 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
192 12:51:19.561559 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
193 12:51:27.553748 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
194 12:51:27.553932 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
195 12:51:27.554041 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 12:51:27.554160 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
197 12:51:27.554277 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
198 12:51:27.668359 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 12:51:27.668743 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
200 12:51:27.668879 extracting modules file /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819486/extract-nfsrootfs-dcqhu23w
201 12:51:27.673323 extracting modules file /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6819486/extract-overlay-ramdisk-2gsbxb5u/ramdisk
202 12:51:27.677466 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 12:51:27.677595 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
204 12:51:27.677694 [common] Applying overlay to NFS
205 12:51:27.677776 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6819486/compress-overlay-zlge_75_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6819486/extract-nfsrootfs-dcqhu23w
206 12:51:28.171615 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 12:51:28.171799 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
208 12:51:28.171905 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 12:51:28.172009 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
210 12:51:28.172111 Building ramdisk /var/lib/lava/dispatcher/tmp/6819486/extract-overlay-ramdisk-2gsbxb5u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6819486/extract-overlay-ramdisk-2gsbxb5u/ramdisk
211 12:51:28.209346 >> 24434 blocks
212 12:51:28.733686 rename /var/lib/lava/dispatcher/tmp/6819486/extract-overlay-ramdisk-2gsbxb5u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/ramdisk/ramdisk.cpio.gz
213 12:51:28.734130 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 12:51:28.734277 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
215 12:51:28.734394 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
216 12:51:28.734502 No mkimage arch provided, not using FIT.
217 12:51:28.734601 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 12:51:28.734696 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 12:51:28.734814 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
220 12:51:28.734920 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
221 12:51:28.735011 No LXC device requested
222 12:51:28.735102 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 12:51:28.735204 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
224 12:51:28.735298 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 12:51:28.735384 Checking files for TFTP limit of 4294967296 bytes.
226 12:51:28.735811 end: 1 tftp-deploy (duration 00:00:24) [common]
227 12:51:28.735936 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 12:51:28.736047 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 12:51:28.736206 substitutions:
230 12:51:28.736285 - {DTB}: None
231 12:51:28.736357 - {INITRD}: 6819486/tftp-deploy-mb30fnh0/ramdisk/ramdisk.cpio.gz
232 12:51:28.736431 - {KERNEL}: 6819486/tftp-deploy-mb30fnh0/kernel/bzImage
233 12:51:28.736500 - {LAVA_MAC}: None
234 12:51:28.736565 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6819486/extract-nfsrootfs-dcqhu23w
235 12:51:28.736635 - {NFS_SERVER_IP}: 192.168.201.1
236 12:51:28.736700 - {PRESEED_CONFIG}: None
237 12:51:28.736810 - {PRESEED_LOCAL}: None
238 12:51:28.736882 - {RAMDISK}: 6819486/tftp-deploy-mb30fnh0/ramdisk/ramdisk.cpio.gz
239 12:51:28.736947 - {ROOT_PART}: None
240 12:51:28.737015 - {ROOT}: None
241 12:51:28.737088 - {SERVER_IP}: 192.168.201.1
242 12:51:28.737154 - {TEE}: None
243 12:51:28.737219 Parsed boot commands:
244 12:51:28.737285 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 12:51:28.737466 Parsed boot commands: tftpboot 192.168.201.1 6819486/tftp-deploy-mb30fnh0/kernel/bzImage 6819486/tftp-deploy-mb30fnh0/kernel/cmdline 6819486/tftp-deploy-mb30fnh0/ramdisk/ramdisk.cpio.gz
246 12:51:28.737571 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 12:51:28.737690 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 12:51:28.737800 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 12:51:28.737905 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 12:51:28.737986 Not connected, no need to disconnect.
251 12:51:28.738076 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 12:51:28.738171 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 12:51:28.738248 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
254 12:51:28.741198 Setting prompt string to ['lava-test: # ']
255 12:51:28.741522 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 12:51:28.741650 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 12:51:28.741765 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 12:51:28.741870 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 12:51:28.742068 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
260 12:51:28.763703 >> Command sent successfully.
261 12:51:28.765757 Returned 0 in 0 seconds
262 12:51:28.866559 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 12:51:28.866913 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 12:51:28.867023 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 12:51:28.867122 Setting prompt string to 'Starting depthcharge on Helios...'
267 12:51:28.867195 Changing prompt to 'Starting depthcharge on Helios...'
268 12:51:28.867273 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 12:51:28.867571 [Enter `^Ec?' for help]
270 12:51:35.519535
271 12:51:35.519846
272 12:51:35.529679 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 12:51:35.532723 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 12:51:35.539453 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 12:51:35.542815 CPU: AES supported, TXT NOT supported, VT supported
276 12:51:35.549845 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 12:51:35.553183 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 12:51:35.558929 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 12:51:35.562239 VBOOT: Loading verstage.
280 12:51:35.569295 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 12:51:35.572385 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 12:51:35.578880 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 12:51:35.579406 CBFS @ c08000 size 3f8000
284 12:51:35.585807 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 12:51:35.589104 CBFS: Locating 'fallback/verstage'
286 12:51:35.592391 CBFS: Found @ offset 10fb80 size 1072c
287 12:51:35.596508
288 12:51:35.596935
289 12:51:35.606333 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 12:51:35.620764 Probing TPM: . done!
291 12:51:35.624033 TPM ready after 0 ms
292 12:51:35.627528 Connected to device vid:did:rid of 1ae0:0028:00
293 12:51:35.637670 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 12:51:35.641357 Initialized TPM device CR50 revision 0
295 12:51:35.686789 tlcl_send_startup: Startup return code is 0
296 12:51:35.687305 TPM: setup succeeded
297 12:51:35.700615 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 12:51:35.704367 Chrome EC: UHEPI supported
299 12:51:35.707339 Phase 1
300 12:51:35.710616 FMAP: area GBB found @ c05000 (12288 bytes)
301 12:51:35.717206 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 12:51:35.720845 Phase 2
303 12:51:35.720939 Phase 3
304 12:51:35.724033 FMAP: area GBB found @ c05000 (12288 bytes)
305 12:51:35.730819 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 12:51:35.737392 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 12:51:35.740532 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 12:51:35.747499 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 12:51:35.762715 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 12:51:35.766152 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 12:51:35.772693 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 12:51:35.776913 Phase 4
313 12:51:35.780349 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 12:51:35.786790 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 12:51:35.966775 VB2:vb2_rsa_verify_digest() Digest check failed!
316 12:51:35.970050 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 12:51:35.973394 Saving nvdata
318 12:51:35.976757 Reboot requested (10020007)
319 12:51:35.980022 board_reset() called!
320 12:51:35.980250 full_reset() called!
321 12:51:40.487190
322 12:51:40.487359
323 12:51:40.497395 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 12:51:40.500792 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 12:51:40.507363 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 12:51:40.510397 CPU: AES supported, TXT NOT supported, VT supported
327 12:51:40.516929 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 12:51:40.520217 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 12:51:40.526719 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 12:51:40.530393 VBOOT: Loading verstage.
331 12:51:40.533785 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 12:51:40.540254 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 12:51:40.547227 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 12:51:40.547323 CBFS @ c08000 size 3f8000
335 12:51:40.553474 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 12:51:40.556731 CBFS: Locating 'fallback/verstage'
337 12:51:40.560428 CBFS: Found @ offset 10fb80 size 1072c
338 12:51:40.564189
339 12:51:40.564283
340 12:51:40.574098 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 12:51:40.588609 Probing TPM: . done!
342 12:51:40.591830 TPM ready after 0 ms
343 12:51:40.595176 Connected to device vid:did:rid of 1ae0:0028:00
344 12:51:40.605250 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
345 12:51:40.609020 Initialized TPM device CR50 revision 0
346 12:51:40.654785 tlcl_send_startup: Startup return code is 0
347 12:51:40.654900 TPM: setup succeeded
348 12:51:40.667418 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 12:51:40.671126 Chrome EC: UHEPI supported
350 12:51:40.674545 Phase 1
351 12:51:40.677867 FMAP: area GBB found @ c05000 (12288 bytes)
352 12:51:40.684407 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 12:51:40.691438 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 12:51:40.694600 Recovery requested (1009000e)
355 12:51:40.694752 Saving nvdata
356 12:51:40.706417 tlcl_extend: response is 0
357 12:51:40.715053 tlcl_extend: response is 0
358 12:51:40.722123 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 12:51:40.725494 CBFS @ c08000 size 3f8000
360 12:51:40.731810 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 12:51:40.735173 CBFS: Locating 'fallback/romstage'
362 12:51:40.738880 CBFS: Found @ offset 80 size 145fc
363 12:51:40.741564 Accumulated console time in verstage 99 ms
364 12:51:40.741659
365 12:51:40.741733
366 12:51:40.755277 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 12:51:40.761758 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 12:51:40.764907 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 12:51:40.768647 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 12:51:40.775244 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 12:51:40.778638 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 12:51:40.781787 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
373 12:51:40.784977 TCO_STS: 0000 0000
374 12:51:40.788372 GEN_PMCON: e0015238 00000200
375 12:51:40.791609 GBLRST_CAUSE: 00000000 00000000
376 12:51:40.791702 prev_sleep_state 5
377 12:51:40.794901 Boot Count incremented to 22537
378 12:51:40.801950 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:51:40.805307 CBFS @ c08000 size 3f8000
380 12:51:40.811623 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:51:40.811717 CBFS: Locating 'fspm.bin'
382 12:51:40.815237 CBFS: Found @ offset 5ffc0 size 71000
383 12:51:40.819272 Chrome EC: UHEPI supported
384 12:51:40.826780 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 12:51:40.831695 Probing TPM: done!
386 12:51:40.838194 Connected to device vid:did:rid of 1ae0:0028:00
387 12:51:40.848352 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
388 12:51:40.854769 Initialized TPM device CR50 revision 0
389 12:51:40.864348 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 12:51:40.870957 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 12:51:40.874601 MRC cache found, size 1948
392 12:51:40.877777 bootmode is set to: 2
393 12:51:40.880982 PRMRR disabled by config.
394 12:51:40.881082 SPD INDEX = 1
395 12:51:40.887570 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 12:51:40.890907 CBFS @ c08000 size 3f8000
397 12:51:40.897901 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 12:51:40.897996 CBFS: Locating 'spd.bin'
399 12:51:40.901219 CBFS: Found @ offset 5fb80 size 400
400 12:51:40.904503 SPD: module type is LPDDR3
401 12:51:40.907875 SPD: module part is
402 12:51:40.914153 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 12:51:40.917561 SPD: device width 4 bits, bus width 8 bits
404 12:51:40.921020 SPD: module size is 4096 MB (per channel)
405 12:51:40.924025 memory slot: 0 configuration done.
406 12:51:40.927859 memory slot: 2 configuration done.
407 12:51:40.978472 CBMEM:
408 12:51:40.981796 IMD: root @ 99fff000 254 entries.
409 12:51:40.984935 IMD: root @ 99ffec00 62 entries.
410 12:51:40.988340 External stage cache:
411 12:51:40.991564 IMD: root @ 9abff000 254 entries.
412 12:51:40.995411 IMD: root @ 9abfec00 62 entries.
413 12:51:41.001779 Chrome EC: clear events_b mask to 0x0000000020004000
414 12:51:41.015579 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 12:51:41.031112 tlcl_write: response is 0
416 12:51:41.040594 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 12:51:41.046749 MRC: TPM MRC hash updated successfully.
418 12:51:41.046845 2 DIMMs found
419 12:51:41.049986 SMM Memory Map
420 12:51:41.053652 SMRAM : 0x9a000000 0x1000000
421 12:51:41.056975 Subregion 0: 0x9a000000 0xa00000
422 12:51:41.060157 Subregion 1: 0x9aa00000 0x200000
423 12:51:41.063471 Subregion 2: 0x9ac00000 0x400000
424 12:51:41.066570 top_of_ram = 0x9a000000
425 12:51:41.069890 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 12:51:41.076987 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 12:51:41.080169 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 12:51:41.086768 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 12:51:41.090173 CBFS @ c08000 size 3f8000
430 12:51:41.093009 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 12:51:41.096352 CBFS: Locating 'fallback/postcar'
432 12:51:41.102860 CBFS: Found @ offset 107000 size 4b44
433 12:51:41.106501 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 12:51:41.119155 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 12:51:41.122264 Processing 180 relocs. Offset value of 0x97c0c000
436 12:51:41.131105 Accumulated console time in romstage 286 ms
437 12:51:41.131195
438 12:51:41.131269
439 12:51:41.140727 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 12:51:41.147508 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 12:51:41.150821 CBFS @ c08000 size 3f8000
442 12:51:41.154108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 12:51:41.160508 CBFS: Locating 'fallback/ramstage'
444 12:51:41.163643 CBFS: Found @ offset 43380 size 1b9e8
445 12:51:41.170497 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 12:51:41.202680 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 12:51:41.205987 Processing 3976 relocs. Offset value of 0x98db0000
448 12:51:41.212682 Accumulated console time in postcar 52 ms
449 12:51:41.212913
450 12:51:41.213110
451 12:51:41.222503 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 12:51:41.229450 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 12:51:41.232631 WARNING: RO_VPD is uninitialized or empty.
454 12:51:41.235988 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 12:51:41.242345 WARNING: RW_VPD is uninitialized or empty.
456 12:51:41.242841 Normal boot.
457 12:51:41.249199 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 12:51:41.252339 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 12:51:41.255531 CBFS @ c08000 size 3f8000
460 12:51:41.262570 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 12:51:41.265872 CBFS: Locating 'cpu_microcode_blob.bin'
462 12:51:41.269229 CBFS: Found @ offset 14700 size 2ec00
463 12:51:41.272143 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 12:51:41.275842 Skip microcode update
465 12:51:41.278817 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 12:51:41.282511 CBFS @ c08000 size 3f8000
467 12:51:41.289138 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 12:51:41.292351 CBFS: Locating 'fsps.bin'
469 12:51:41.295620 CBFS: Found @ offset d1fc0 size 35000
470 12:51:41.320874 Detected 4 core, 8 thread CPU.
471 12:51:41.324085 Setting up SMI for CPU
472 12:51:41.327238 IED base = 0x9ac00000
473 12:51:41.327664 IED size = 0x00400000
474 12:51:41.330818 Will perform SMM setup.
475 12:51:41.337110 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 12:51:41.344211 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 12:51:41.347214 Processing 16 relocs. Offset value of 0x00030000
478 12:51:41.350869 Attempting to start 7 APs
479 12:51:41.354199 Waiting for 10ms after sending INIT.
480 12:51:41.370840 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
481 12:51:41.371326 done.
482 12:51:41.373862 AP: slot 6 apic_id 6.
483 12:51:41.377143 AP: slot 7 apic_id 7.
484 12:51:41.380492 Waiting for 2nd SIPI to complete...done.
485 12:51:41.383612 AP: slot 3 apic_id 2.
486 12:51:41.384119 AP: slot 1 apic_id 3.
487 12:51:41.387033 AP: slot 4 apic_id 5.
488 12:51:41.390372 AP: slot 2 apic_id 4.
489 12:51:41.396904 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 12:51:41.403804 Processing 13 relocs. Offset value of 0x00038000
491 12:51:41.406990 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 12:51:41.413721 Installing SMM handler to 0x9a000000
493 12:51:41.419784 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 12:51:41.423393 Processing 658 relocs. Offset value of 0x9a010000
495 12:51:41.433173 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 12:51:41.436963 Processing 13 relocs. Offset value of 0x9a008000
497 12:51:41.443416 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 12:51:41.449953 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 12:51:41.456683 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 12:51:41.459827 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 12:51:41.466360 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 12:51:41.473170 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 12:51:41.476290 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 12:51:41.482857 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 12:51:41.486494 Clearing SMI status registers
506 12:51:41.489779 SMI_STS: PM1
507 12:51:41.489868 PM1_STS: PWRBTN
508 12:51:41.493046 TCO_STS: SECOND_TO
509 12:51:41.496471 New SMBASE 0x9a000000
510 12:51:41.499767 In relocation handler: CPU 0
511 12:51:41.503229 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 12:51:41.506426 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 12:51:41.509705 Relocation complete.
514 12:51:41.513036 New SMBASE 0x99ffec00
515 12:51:41.516260 In relocation handler: CPU 5
516 12:51:41.519737 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
517 12:51:41.522999 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 12:51:41.526292 Relocation complete.
519 12:51:41.529502 New SMBASE 0x99fffc00
520 12:51:41.529589 In relocation handler: CPU 1
521 12:51:41.536079 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
522 12:51:41.539409 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 12:51:41.542613 Relocation complete.
524 12:51:41.546016 New SMBASE 0x99fff400
525 12:51:41.546100 In relocation handler: CPU 3
526 12:51:41.552904 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
527 12:51:41.555942 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 12:51:41.559407 Relocation complete.
529 12:51:41.559513 New SMBASE 0x99ffe400
530 12:51:41.562612 In relocation handler: CPU 7
531 12:51:41.569492 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
532 12:51:41.573008 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 12:51:41.576280 Relocation complete.
534 12:51:41.576713 New SMBASE 0x99ffe800
535 12:51:41.579458 In relocation handler: CPU 6
536 12:51:41.586088 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
537 12:51:41.589763 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 12:51:41.592926 Relocation complete.
539 12:51:41.593445 New SMBASE 0x99fff800
540 12:51:41.596274 In relocation handler: CPU 2
541 12:51:41.599522 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
542 12:51:41.606105 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 12:51:41.609380 Relocation complete.
544 12:51:41.609816 New SMBASE 0x99fff000
545 12:51:41.612818 In relocation handler: CPU 4
546 12:51:41.616119 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 12:51:41.622527 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:51:41.625826 Relocation complete.
549 12:51:41.626256 Initializing CPU #0
550 12:51:41.628946 CPU: vendor Intel device 806ec
551 12:51:41.632533 CPU: family 06, model 8e, stepping 0c
552 12:51:41.635887 Clearing out pending MCEs
553 12:51:41.639084 Setting up local APIC...
554 12:51:41.642300 apic_id: 0x00 done.
555 12:51:41.642755 Turbo is available but hidden
556 12:51:41.645934 Turbo is available and visible
557 12:51:41.649213 VMX status: enabled
558 12:51:41.652339 IA32_FEATURE_CONTROL status: locked
559 12:51:41.656129 Skip microcode update
560 12:51:41.656559 CPU #0 initialized
561 12:51:41.659044 Initializing CPU #5
562 12:51:41.662534 Initializing CPU #7
563 12:51:41.662965 Initializing CPU #6
564 12:51:41.665575 CPU: vendor Intel device 806ec
565 12:51:41.668811 CPU: family 06, model 8e, stepping 0c
566 12:51:41.672378 CPU: vendor Intel device 806ec
567 12:51:41.675593 CPU: family 06, model 8e, stepping 0c
568 12:51:41.678702 Clearing out pending MCEs
569 12:51:41.682400 Initializing CPU #2
570 12:51:41.682759 Initializing CPU #4
571 12:51:41.685281 Setting up local APIC...
572 12:51:41.688864 CPU: vendor Intel device 806ec
573 12:51:41.692162 CPU: family 06, model 8e, stepping 0c
574 12:51:41.695538 CPU: vendor Intel device 806ec
575 12:51:41.698874 CPU: family 06, model 8e, stepping 0c
576 12:51:41.702193 Clearing out pending MCEs
577 12:51:41.704943 Clearing out pending MCEs
578 12:51:41.708213 Setting up local APIC...
579 12:51:41.711907 CPU: vendor Intel device 806ec
580 12:51:41.715359 CPU: family 06, model 8e, stepping 0c
581 12:51:41.718468 Clearing out pending MCEs
582 12:51:41.718777 Clearing out pending MCEs
583 12:51:41.721729 Setting up local APIC...
584 12:51:41.725018 apic_id: 0x01 done.
585 12:51:41.725361 Initializing CPU #3
586 12:51:41.728372 Initializing CPU #1
587 12:51:41.731558 CPU: vendor Intel device 806ec
588 12:51:41.734628 CPU: family 06, model 8e, stepping 0c
589 12:51:41.738283 CPU: vendor Intel device 806ec
590 12:51:41.741515 CPU: family 06, model 8e, stepping 0c
591 12:51:41.744691 Clearing out pending MCEs
592 12:51:41.747933 Clearing out pending MCEs
593 12:51:41.751649 Setting up local APIC...
594 12:51:41.752013 VMX status: enabled
595 12:51:41.754582 Setting up local APIC...
596 12:51:41.757767 Setting up local APIC...
597 12:51:41.761337 IA32_FEATURE_CONTROL status: locked
598 12:51:41.764467 Setting up local APIC...
599 12:51:41.764550 Skip microcode update
600 12:51:41.767593 apic_id: 0x05 done.
601 12:51:41.770876 apic_id: 0x04 done.
602 12:51:41.770963 VMX status: enabled
603 12:51:41.774568 VMX status: enabled
604 12:51:41.774653 apic_id: 0x07 done.
605 12:51:41.777759 apic_id: 0x06 done.
606 12:51:41.780895 VMX status: enabled
607 12:51:41.780984 apic_id: 0x02 done.
608 12:51:41.784276 apic_id: 0x03 done.
609 12:51:41.787486 VMX status: enabled
610 12:51:41.787601 VMX status: enabled
611 12:51:41.790766 IA32_FEATURE_CONTROL status: locked
612 12:51:41.794120 IA32_FEATURE_CONTROL status: locked
613 12:51:41.797395 Skip microcode update
614 12:51:41.800744 Skip microcode update
615 12:51:41.800825 CPU #3 initialized
616 12:51:41.804255 CPU #1 initialized
617 12:51:41.807470 CPU #5 initialized
618 12:51:41.810928 IA32_FEATURE_CONTROL status: locked
619 12:51:41.811021 VMX status: enabled
620 12:51:41.814045 Skip microcode update
621 12:51:41.817553 IA32_FEATURE_CONTROL status: locked
622 12:51:41.820701 IA32_FEATURE_CONTROL status: locked
623 12:51:41.823889 Skip microcode update
624 12:51:41.823984 Skip microcode update
625 12:51:41.827163 CPU #2 initialized
626 12:51:41.830849 CPU #4 initialized
627 12:51:41.830944 CPU #7 initialized
628 12:51:41.834107 IA32_FEATURE_CONTROL status: locked
629 12:51:41.837443 Skip microcode update
630 12:51:41.840564 CPU #6 initialized
631 12:51:41.843997 bsp_do_flight_plan done after 462 msecs.
632 12:51:41.847108 CPU: frequency set to 4200 MHz
633 12:51:41.847197 Enabling SMIs.
634 12:51:41.850699 Locking SMM.
635 12:51:41.864686 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 12:51:41.867847 CBFS @ c08000 size 3f8000
637 12:51:41.874416 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 12:51:41.874512 CBFS: Locating 'vbt.bin'
639 12:51:41.881046 CBFS: Found @ offset 5f5c0 size 499
640 12:51:41.884350 Found a VBT of 4608 bytes after decompression
641 12:51:42.067346 Display FSP Version Info HOB
642 12:51:42.070508 Reference Code - CPU = 9.0.1e.30
643 12:51:42.073737 uCode Version = 0.0.0.ca
644 12:51:42.077391 TXT ACM version = ff.ff.ff.ffff
645 12:51:42.080383 Display FSP Version Info HOB
646 12:51:42.083894 Reference Code - ME = 9.0.1e.30
647 12:51:42.086952 MEBx version = 0.0.0.0
648 12:51:42.090222 ME Firmware Version = Consumer SKU
649 12:51:42.093539 Display FSP Version Info HOB
650 12:51:42.096855 Reference Code - CML PCH = 9.0.1e.30
651 12:51:42.100256 PCH-CRID Status = Disabled
652 12:51:42.103407 PCH-CRID Original Value = ff.ff.ff.ffff
653 12:51:42.106804 PCH-CRID New Value = ff.ff.ff.ffff
654 12:51:42.110101 OPROM - RST - RAID = ff.ff.ff.ffff
655 12:51:42.113388 ChipsetInit Base Version = ff.ff.ff.ffff
656 12:51:42.117319 ChipsetInit Oem Version = ff.ff.ff.ffff
657 12:51:42.119976 Display FSP Version Info HOB
658 12:51:42.126637 Reference Code - SA - System Agent = 9.0.1e.30
659 12:51:42.129934 Reference Code - MRC = 0.7.1.6c
660 12:51:42.130054 SA - PCIe Version = 9.0.1e.30
661 12:51:42.133158 SA-CRID Status = Disabled
662 12:51:42.136584 SA-CRID Original Value = 0.0.0.c
663 12:51:42.139776 SA-CRID New Value = 0.0.0.c
664 12:51:42.143396 OPROM - VBIOS = ff.ff.ff.ffff
665 12:51:42.146454 RTC Init
666 12:51:42.149638 Set power on after power failure.
667 12:51:42.149727 Disabling Deep S3
668 12:51:42.153019 Disabling Deep S3
669 12:51:42.153113 Disabling Deep S4
670 12:51:42.156651 Disabling Deep S4
671 12:51:42.160017 Disabling Deep S5
672 12:51:42.160111 Disabling Deep S5
673 12:51:42.166417 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
674 12:51:42.166520 Enumerating buses...
675 12:51:42.172822 Show all devs... Before device enumeration.
676 12:51:42.176589 Root Device: enabled 1
677 12:51:42.176695 CPU_CLUSTER: 0: enabled 1
678 12:51:42.179889 DOMAIN: 0000: enabled 1
679 12:51:42.183160 APIC: 00: enabled 1
680 12:51:42.183245 PCI: 00:00.0: enabled 1
681 12:51:42.186333 PCI: 00:02.0: enabled 1
682 12:51:42.189575 PCI: 00:04.0: enabled 0
683 12:51:42.193185 PCI: 00:05.0: enabled 0
684 12:51:42.193291 PCI: 00:12.0: enabled 1
685 12:51:42.196104 PCI: 00:12.5: enabled 0
686 12:51:42.199687 PCI: 00:12.6: enabled 0
687 12:51:42.202876 PCI: 00:14.0: enabled 1
688 12:51:42.202961 PCI: 00:14.1: enabled 0
689 12:51:42.206236 PCI: 00:14.3: enabled 1
690 12:51:42.209578 PCI: 00:14.5: enabled 0
691 12:51:42.209667 PCI: 00:15.0: enabled 1
692 12:51:42.212956 PCI: 00:15.1: enabled 1
693 12:51:42.216293 PCI: 00:15.2: enabled 0
694 12:51:42.219353 PCI: 00:15.3: enabled 0
695 12:51:42.219436 PCI: 00:16.0: enabled 1
696 12:51:42.222724 PCI: 00:16.1: enabled 0
697 12:51:42.226097 PCI: 00:16.2: enabled 0
698 12:51:42.229284 PCI: 00:16.3: enabled 0
699 12:51:42.229367 PCI: 00:16.4: enabled 0
700 12:51:42.232583 PCI: 00:16.5: enabled 0
701 12:51:42.235919 PCI: 00:17.0: enabled 1
702 12:51:42.239159 PCI: 00:19.0: enabled 1
703 12:51:42.239242 PCI: 00:19.1: enabled 0
704 12:51:42.242772 PCI: 00:19.2: enabled 0
705 12:51:42.245877 PCI: 00:1a.0: enabled 0
706 12:51:42.248949 PCI: 00:1c.0: enabled 0
707 12:51:42.249038 PCI: 00:1c.1: enabled 0
708 12:51:42.252600 PCI: 00:1c.2: enabled 0
709 12:51:42.255940 PCI: 00:1c.3: enabled 0
710 12:51:42.256028 PCI: 00:1c.4: enabled 0
711 12:51:42.259301 PCI: 00:1c.5: enabled 0
712 12:51:42.262489 PCI: 00:1c.6: enabled 0
713 12:51:42.265757 PCI: 00:1c.7: enabled 0
714 12:51:42.265842 PCI: 00:1d.0: enabled 1
715 12:51:42.268948 PCI: 00:1d.1: enabled 0
716 12:51:42.272744 PCI: 00:1d.2: enabled 0
717 12:51:42.275838 PCI: 00:1d.3: enabled 0
718 12:51:42.275928 PCI: 00:1d.4: enabled 0
719 12:51:42.279070 PCI: 00:1d.5: enabled 1
720 12:51:42.282511 PCI: 00:1e.0: enabled 1
721 12:51:42.285867 PCI: 00:1e.1: enabled 0
722 12:51:42.285950 PCI: 00:1e.2: enabled 1
723 12:51:42.289047 PCI: 00:1e.3: enabled 1
724 12:51:42.292466 PCI: 00:1f.0: enabled 1
725 12:51:42.292565 PCI: 00:1f.1: enabled 1
726 12:51:42.295679 PCI: 00:1f.2: enabled 1
727 12:51:42.298856 PCI: 00:1f.3: enabled 1
728 12:51:42.302184 PCI: 00:1f.4: enabled 1
729 12:51:42.302270 PCI: 00:1f.5: enabled 1
730 12:51:42.305832 PCI: 00:1f.6: enabled 0
731 12:51:42.309181 USB0 port 0: enabled 1
732 12:51:42.309261 I2C: 00:15: enabled 1
733 12:51:42.312102 I2C: 00:5d: enabled 1
734 12:51:42.315441 GENERIC: 0.0: enabled 1
735 12:51:42.318694 I2C: 00:1a: enabled 1
736 12:51:42.318786 I2C: 00:38: enabled 1
737 12:51:42.322191 I2C: 00:39: enabled 1
738 12:51:42.325333 I2C: 00:3a: enabled 1
739 12:51:42.325434 I2C: 00:3b: enabled 1
740 12:51:42.328815 PCI: 00:00.0: enabled 1
741 12:51:42.332301 SPI: 00: enabled 1
742 12:51:42.332386 SPI: 01: enabled 1
743 12:51:42.335704 PNP: 0c09.0: enabled 1
744 12:51:42.338502 USB2 port 0: enabled 1
745 12:51:42.338594 USB2 port 1: enabled 1
746 12:51:42.342191 USB2 port 2: enabled 0
747 12:51:42.345509 USB2 port 3: enabled 0
748 12:51:42.345601 USB2 port 5: enabled 0
749 12:51:42.348622 USB2 port 6: enabled 1
750 12:51:42.351910 USB2 port 9: enabled 1
751 12:51:42.355181 USB3 port 0: enabled 1
752 12:51:42.355273 USB3 port 1: enabled 1
753 12:51:42.358581 USB3 port 2: enabled 1
754 12:51:42.361880 USB3 port 3: enabled 1
755 12:51:42.361973 USB3 port 4: enabled 0
756 12:51:42.364928 APIC: 03: enabled 1
757 12:51:42.368464 APIC: 04: enabled 1
758 12:51:42.368571 APIC: 02: enabled 1
759 12:51:42.371711 APIC: 05: enabled 1
760 12:51:42.371804 APIC: 01: enabled 1
761 12:51:42.375479 APIC: 06: enabled 1
762 12:51:42.378228 APIC: 07: enabled 1
763 12:51:42.378320 Compare with tree...
764 12:51:42.381945 Root Device: enabled 1
765 12:51:42.385297 CPU_CLUSTER: 0: enabled 1
766 12:51:42.388475 APIC: 00: enabled 1
767 12:51:42.388567 APIC: 03: enabled 1
768 12:51:42.391681 APIC: 04: enabled 1
769 12:51:42.395017 APIC: 02: enabled 1
770 12:51:42.395109 APIC: 05: enabled 1
771 12:51:42.398273 APIC: 01: enabled 1
772 12:51:42.401526 APIC: 06: enabled 1
773 12:51:42.401616 APIC: 07: enabled 1
774 12:51:42.404717 DOMAIN: 0000: enabled 1
775 12:51:42.408011 PCI: 00:00.0: enabled 1
776 12:51:42.411397 PCI: 00:02.0: enabled 1
777 12:51:42.411476 PCI: 00:04.0: enabled 0
778 12:51:42.414759 PCI: 00:05.0: enabled 0
779 12:51:42.418077 PCI: 00:12.0: enabled 1
780 12:51:42.421383 PCI: 00:12.5: enabled 0
781 12:51:42.424770 PCI: 00:12.6: enabled 0
782 12:51:42.424866 PCI: 00:14.0: enabled 1
783 12:51:42.427977 USB0 port 0: enabled 1
784 12:51:42.431436 USB2 port 0: enabled 1
785 12:51:42.434746 USB2 port 1: enabled 1
786 12:51:42.438229 USB2 port 2: enabled 0
787 12:51:42.438314 USB2 port 3: enabled 0
788 12:51:42.441067 USB2 port 5: enabled 0
789 12:51:42.444722 USB2 port 6: enabled 1
790 12:51:42.447871 USB2 port 9: enabled 1
791 12:51:42.451408 USB3 port 0: enabled 1
792 12:51:42.454631 USB3 port 1: enabled 1
793 12:51:42.454715 USB3 port 2: enabled 1
794 12:51:42.457945 USB3 port 3: enabled 1
795 12:51:42.461215 USB3 port 4: enabled 0
796 12:51:42.464444 PCI: 00:14.1: enabled 0
797 12:51:42.467850 PCI: 00:14.3: enabled 1
798 12:51:42.467943 PCI: 00:14.5: enabled 0
799 12:51:42.471635 PCI: 00:15.0: enabled 1
800 12:51:42.474873 I2C: 00:15: enabled 1
801 12:51:42.477926 PCI: 00:15.1: enabled 1
802 12:51:42.480981 I2C: 00:5d: enabled 1
803 12:51:42.481086 GENERIC: 0.0: enabled 1
804 12:51:42.484242 PCI: 00:15.2: enabled 0
805 12:51:42.487844 PCI: 00:15.3: enabled 0
806 12:51:42.491201 PCI: 00:16.0: enabled 1
807 12:51:42.494396 PCI: 00:16.1: enabled 0
808 12:51:42.494480 PCI: 00:16.2: enabled 0
809 12:51:42.497674 PCI: 00:16.3: enabled 0
810 12:51:42.500902 PCI: 00:16.4: enabled 0
811 12:51:42.504229 PCI: 00:16.5: enabled 0
812 12:51:42.504306 PCI: 00:17.0: enabled 1
813 12:51:42.507480 PCI: 00:19.0: enabled 1
814 12:51:42.510847 I2C: 00:1a: enabled 1
815 12:51:42.514099 I2C: 00:38: enabled 1
816 12:51:42.517963 I2C: 00:39: enabled 1
817 12:51:42.518047 I2C: 00:3a: enabled 1
818 12:51:42.521191 I2C: 00:3b: enabled 1
819 12:51:42.523997 PCI: 00:19.1: enabled 0
820 12:51:42.527417 PCI: 00:19.2: enabled 0
821 12:51:42.527497 PCI: 00:1a.0: enabled 0
822 12:51:42.531084 PCI: 00:1c.0: enabled 0
823 12:51:42.534343 PCI: 00:1c.1: enabled 0
824 12:51:42.537487 PCI: 00:1c.2: enabled 0
825 12:51:42.540727 PCI: 00:1c.3: enabled 0
826 12:51:42.540807 PCI: 00:1c.4: enabled 0
827 12:51:42.544004 PCI: 00:1c.5: enabled 0
828 12:51:42.547224 PCI: 00:1c.6: enabled 0
829 12:51:42.550903 PCI: 00:1c.7: enabled 0
830 12:51:42.553970 PCI: 00:1d.0: enabled 1
831 12:51:42.554056 PCI: 00:1d.1: enabled 0
832 12:51:42.557289 PCI: 00:1d.2: enabled 0
833 12:51:42.560493 PCI: 00:1d.3: enabled 0
834 12:51:42.563678 PCI: 00:1d.4: enabled 0
835 12:51:42.567407 PCI: 00:1d.5: enabled 1
836 12:51:42.567490 PCI: 00:00.0: enabled 1
837 12:51:42.570643 PCI: 00:1e.0: enabled 1
838 12:51:42.573694 PCI: 00:1e.1: enabled 0
839 12:51:42.576892 PCI: 00:1e.2: enabled 1
840 12:51:42.576978 SPI: 00: enabled 1
841 12:51:42.580639 PCI: 00:1e.3: enabled 1
842 12:51:42.583966 SPI: 01: enabled 1
843 12:51:42.587162 PCI: 00:1f.0: enabled 1
844 12:51:42.590487 PNP: 0c09.0: enabled 1
845 12:51:42.590571 PCI: 00:1f.1: enabled 1
846 12:51:42.593594 PCI: 00:1f.2: enabled 1
847 12:51:42.597225 PCI: 00:1f.3: enabled 1
848 12:51:42.600350 PCI: 00:1f.4: enabled 1
849 12:51:42.603756 PCI: 00:1f.5: enabled 1
850 12:51:42.603849 PCI: 00:1f.6: enabled 0
851 12:51:42.607087 Root Device scanning...
852 12:51:42.610354 scan_static_bus for Root Device
853 12:51:42.613613 CPU_CLUSTER: 0 enabled
854 12:51:42.613698 DOMAIN: 0000 enabled
855 12:51:42.616847 DOMAIN: 0000 scanning...
856 12:51:42.620305 PCI: pci_scan_bus for bus 00
857 12:51:42.623637 PCI: 00:00.0 [8086/0000] ops
858 12:51:42.626782 PCI: 00:00.0 [8086/9b61] enabled
859 12:51:42.630065 PCI: 00:02.0 [8086/0000] bus ops
860 12:51:42.633285 PCI: 00:02.0 [8086/9b41] enabled
861 12:51:42.636709 PCI: 00:04.0 [8086/1903] disabled
862 12:51:42.639772 PCI: 00:08.0 [8086/1911] enabled
863 12:51:42.643152 PCI: 00:12.0 [8086/02f9] enabled
864 12:51:42.646455 PCI: 00:14.0 [8086/0000] bus ops
865 12:51:42.650134 PCI: 00:14.0 [8086/02ed] enabled
866 12:51:42.653325 PCI: 00:14.2 [8086/02ef] enabled
867 12:51:42.656708 PCI: 00:14.3 [8086/02f0] enabled
868 12:51:42.659956 PCI: 00:15.0 [8086/0000] bus ops
869 12:51:42.663276 PCI: 00:15.0 [8086/02e8] enabled
870 12:51:42.666545 PCI: 00:15.1 [8086/0000] bus ops
871 12:51:42.669689 PCI: 00:15.1 [8086/02e9] enabled
872 12:51:42.673414 PCI: 00:16.0 [8086/0000] ops
873 12:51:42.676393 PCI: 00:16.0 [8086/02e0] enabled
874 12:51:42.679808 PCI: 00:17.0 [8086/0000] ops
875 12:51:42.682791 PCI: 00:17.0 [8086/02d3] enabled
876 12:51:42.686207 PCI: 00:19.0 [8086/0000] bus ops
877 12:51:42.689855 PCI: 00:19.0 [8086/02c5] enabled
878 12:51:42.692753 PCI: 00:1d.0 [8086/0000] bus ops
879 12:51:42.696319 PCI: 00:1d.0 [8086/02b0] enabled
880 12:51:42.703064 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 12:51:42.706421 PCI: 00:1e.0 [8086/0000] ops
882 12:51:42.709582 PCI: 00:1e.0 [8086/02a8] enabled
883 12:51:42.712738 PCI: 00:1e.2 [8086/0000] bus ops
884 12:51:42.716047 PCI: 00:1e.2 [8086/02aa] enabled
885 12:51:42.719357 PCI: 00:1e.3 [8086/0000] bus ops
886 12:51:42.722597 PCI: 00:1e.3 [8086/02ab] enabled
887 12:51:42.726062 PCI: 00:1f.0 [8086/0000] bus ops
888 12:51:42.729313 PCI: 00:1f.0 [8086/0284] enabled
889 12:51:42.732726 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 12:51:42.739183 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 12:51:42.742881 PCI: 00:1f.3 [8086/0000] bus ops
892 12:51:42.746338 PCI: 00:1f.3 [8086/02c8] enabled
893 12:51:42.749647 PCI: 00:1f.4 [8086/0000] bus ops
894 12:51:42.752665 PCI: 00:1f.4 [8086/02a3] enabled
895 12:51:42.755841 PCI: 00:1f.5 [8086/0000] bus ops
896 12:51:42.759266 PCI: 00:1f.5 [8086/02a4] enabled
897 12:51:42.762554 PCI: Leftover static devices:
898 12:51:42.762673 PCI: 00:05.0
899 12:51:42.766290 PCI: 00:12.5
900 12:51:42.766421 PCI: 00:12.6
901 12:51:42.769498 PCI: 00:14.1
902 12:51:42.769675 PCI: 00:14.5
903 12:51:42.769796 PCI: 00:15.2
904 12:51:42.772857 PCI: 00:15.3
905 12:51:42.773004 PCI: 00:16.1
906 12:51:42.775931 PCI: 00:16.2
907 12:51:42.776097 PCI: 00:16.3
908 12:51:42.779355 PCI: 00:16.4
909 12:51:42.779550 PCI: 00:16.5
910 12:51:42.779702 PCI: 00:19.1
911 12:51:42.783129 PCI: 00:19.2
912 12:51:42.783336 PCI: 00:1a.0
913 12:51:42.786069 PCI: 00:1c.0
914 12:51:42.786290 PCI: 00:1c.1
915 12:51:42.786466 PCI: 00:1c.2
916 12:51:42.789548 PCI: 00:1c.3
917 12:51:42.789785 PCI: 00:1c.4
918 12:51:42.792792 PCI: 00:1c.5
919 12:51:42.793036 PCI: 00:1c.6
920 12:51:42.793279 PCI: 00:1c.7
921 12:51:42.796159 PCI: 00:1d.1
922 12:51:42.796463 PCI: 00:1d.2
923 12:51:42.799487 PCI: 00:1d.3
924 12:51:42.799921 PCI: 00:1d.4
925 12:51:42.800232 PCI: 00:1d.5
926 12:51:42.802977 PCI: 00:1e.1
927 12:51:42.803430 PCI: 00:1f.1
928 12:51:42.806303 PCI: 00:1f.2
929 12:51:42.806728 PCI: 00:1f.6
930 12:51:42.809457 PCI: Check your devicetree.cb.
931 12:51:42.812765 PCI: 00:02.0 scanning...
932 12:51:42.815962 scan_generic_bus for PCI: 00:02.0
933 12:51:42.819357 scan_generic_bus for PCI: 00:02.0 done
934 12:51:42.826055 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
935 12:51:42.829368 PCI: 00:14.0 scanning...
936 12:51:42.832670 scan_static_bus for PCI: 00:14.0
937 12:51:42.833127 USB0 port 0 enabled
938 12:51:42.835902 USB0 port 0 scanning...
939 12:51:42.839307 scan_static_bus for USB0 port 0
940 12:51:42.842379 USB2 port 0 enabled
941 12:51:42.842880 USB2 port 1 enabled
942 12:51:42.845712 USB2 port 2 disabled
943 12:51:42.849047 USB2 port 3 disabled
944 12:51:42.849570 USB2 port 5 disabled
945 12:51:42.852385 USB2 port 6 enabled
946 12:51:42.855955 USB2 port 9 enabled
947 12:51:42.856422 USB3 port 0 enabled
948 12:51:42.859056 USB3 port 1 enabled
949 12:51:42.859481 USB3 port 2 enabled
950 12:51:42.862303 USB3 port 3 enabled
951 12:51:42.865543 USB3 port 4 disabled
952 12:51:42.865969 USB2 port 0 scanning...
953 12:51:42.868810 scan_static_bus for USB2 port 0
954 12:51:42.875758 scan_static_bus for USB2 port 0 done
955 12:51:42.878709 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
956 12:51:42.881970 USB2 port 1 scanning...
957 12:51:42.885669 scan_static_bus for USB2 port 1
958 12:51:42.888900 scan_static_bus for USB2 port 1 done
959 12:51:42.895307 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
960 12:51:42.895741 USB2 port 6 scanning...
961 12:51:42.898805 scan_static_bus for USB2 port 6
962 12:51:42.905592 scan_static_bus for USB2 port 6 done
963 12:51:42.908714 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
964 12:51:42.912052 USB2 port 9 scanning...
965 12:51:42.915587 scan_static_bus for USB2 port 9
966 12:51:42.918911 scan_static_bus for USB2 port 9 done
967 12:51:42.925460 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
968 12:51:42.925897 USB3 port 0 scanning...
969 12:51:42.928766 scan_static_bus for USB3 port 0
970 12:51:42.935222 scan_static_bus for USB3 port 0 done
971 12:51:42.938892 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
972 12:51:42.942157 USB3 port 1 scanning...
973 12:51:42.945423 scan_static_bus for USB3 port 1
974 12:51:42.948820 scan_static_bus for USB3 port 1 done
975 12:51:42.954985 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
976 12:51:42.955422 USB3 port 2 scanning...
977 12:51:42.958797 scan_static_bus for USB3 port 2
978 12:51:42.965643 scan_static_bus for USB3 port 2 done
979 12:51:42.969122 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
980 12:51:42.972373 USB3 port 3 scanning...
981 12:51:42.975586 scan_static_bus for USB3 port 3
982 12:51:42.978866 scan_static_bus for USB3 port 3 done
983 12:51:42.985467 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
984 12:51:42.988791 scan_static_bus for USB0 port 0 done
985 12:51:42.995248 scan_bus: scanning of bus USB0 port 0 took 155402 usecs
986 12:51:42.998773 scan_static_bus for PCI: 00:14.0 done
987 12:51:43.001842 scan_bus: scanning of bus PCI: 00:14.0 took 173029 usecs
988 12:51:43.005050 PCI: 00:15.0 scanning...
989 12:51:43.008255 scan_generic_bus for PCI: 00:15.0
990 12:51:43.015305 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 12:51:43.018584 scan_generic_bus for PCI: 00:15.0 done
992 12:51:43.021911 scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs
993 12:51:43.025059 PCI: 00:15.1 scanning...
994 12:51:43.028024 scan_generic_bus for PCI: 00:15.1
995 12:51:43.035014 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 12:51:43.038504 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 12:51:43.041723 scan_generic_bus for PCI: 00:15.1 done
998 12:51:43.048076 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
999 12:51:43.048512 PCI: 00:19.0 scanning...
1000 12:51:43.054635 scan_generic_bus for PCI: 00:19.0
1001 12:51:43.058254 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 12:51:43.061048 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 12:51:43.064754 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 12:51:43.071190 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 12:51:43.074413 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 12:51:43.078238 scan_generic_bus for PCI: 00:19.0 done
1007 12:51:43.084516 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
1008 12:51:43.084993 PCI: 00:1d.0 scanning...
1009 12:51:43.090818 do_pci_scan_bridge for PCI: 00:1d.0
1010 12:51:43.091309 PCI: pci_scan_bus for bus 01
1011 12:51:43.094126 PCI: 01:00.0 [1c5c/1327] enabled
1012 12:51:43.101219 Enabling Common Clock Configuration
1013 12:51:43.104467 L1 Sub-State supported from root port 29
1014 12:51:43.107646 L1 Sub-State Support = 0xf
1015 12:51:43.111209 CommonModeRestoreTime = 0x28
1016 12:51:43.114530 Power On Value = 0x16, Power On Scale = 0x0
1017 12:51:43.115028 ASPM: Enabled L1
1018 12:51:43.121014 scan_bus: scanning of bus PCI: 00:1d.0 took 32798 usecs
1019 12:51:43.123964 PCI: 00:1e.2 scanning...
1020 12:51:43.127369 scan_generic_bus for PCI: 00:1e.2
1021 12:51:43.130709 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 12:51:43.134331 scan_generic_bus for PCI: 00:1e.2 done
1023 12:51:43.141053 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1024 12:51:43.144336 PCI: 00:1e.3 scanning...
1025 12:51:43.147200 scan_generic_bus for PCI: 00:1e.3
1026 12:51:43.150939 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 12:51:43.154243 scan_generic_bus for PCI: 00:1e.3 done
1028 12:51:43.160581 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1029 12:51:43.163507 PCI: 00:1f.0 scanning...
1030 12:51:43.166795 scan_static_bus for PCI: 00:1f.0
1031 12:51:43.166887 PNP: 0c09.0 enabled
1032 12:51:43.170463 scan_static_bus for PCI: 00:1f.0 done
1033 12:51:43.177006 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1034 12:51:43.180248 PCI: 00:1f.3 scanning...
1035 12:51:43.186630 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1036 12:51:43.186729 PCI: 00:1f.4 scanning...
1037 12:51:43.193357 scan_generic_bus for PCI: 00:1f.4
1038 12:51:43.196739 scan_generic_bus for PCI: 00:1f.4 done
1039 12:51:43.200367 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1040 12:51:43.203311 PCI: 00:1f.5 scanning...
1041 12:51:43.206840 scan_generic_bus for PCI: 00:1f.5
1042 12:51:43.210079 scan_generic_bus for PCI: 00:1f.5 done
1043 12:51:43.216891 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1044 12:51:43.223479 scan_bus: scanning of bus DOMAIN: 0000 took 605328 usecs
1045 12:51:43.226770 scan_static_bus for Root Device done
1046 12:51:43.233531 scan_bus: scanning of bus Root Device took 625196 usecs
1047 12:51:43.233625 done
1048 12:51:43.236779 Chrome EC: UHEPI supported
1049 12:51:43.243030 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 12:51:43.246639 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 12:51:43.253078 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 12:51:43.260671 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 12:51:43.263714 SPI flash protection: WPSW=0 SRP0=0
1054 12:51:43.270389 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 12:51:43.273572 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 12:51:43.276750 found VGA at PCI: 00:02.0
1057 12:51:43.280056 Setting up VGA for PCI: 00:02.0
1058 12:51:43.286503 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 12:51:43.290267 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 12:51:43.293385 Allocating resources...
1061 12:51:43.296605 Reading resources...
1062 12:51:43.299803 Root Device read_resources bus 0 link: 0
1063 12:51:43.303243 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 12:51:43.310089 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 12:51:43.313288 DOMAIN: 0000 read_resources bus 0 link: 0
1066 12:51:43.320667 PCI: 00:14.0 read_resources bus 0 link: 0
1067 12:51:43.323936 USB0 port 0 read_resources bus 0 link: 0
1068 12:51:43.331891 USB0 port 0 read_resources bus 0 link: 0 done
1069 12:51:43.335097 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 12:51:43.342610 PCI: 00:15.0 read_resources bus 1 link: 0
1071 12:51:43.345927 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 12:51:43.352428 PCI: 00:15.1 read_resources bus 2 link: 0
1073 12:51:43.355694 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 12:51:43.363294 PCI: 00:19.0 read_resources bus 3 link: 0
1075 12:51:43.370040 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 12:51:43.373366 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 12:51:43.379910 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 12:51:43.382988 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 12:51:43.389887 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 12:51:43.393283 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 12:51:43.399898 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 12:51:43.402914 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 12:51:43.409842 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 12:51:43.416163 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 12:51:43.419821 Root Device read_resources bus 0 link: 0 done
1086 12:51:43.423080 Done reading resources.
1087 12:51:43.429612 Show resources in subtree (Root Device)...After reading.
1088 12:51:43.432968 Root Device child on link 0 CPU_CLUSTER: 0
1089 12:51:43.436219 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 12:51:43.436302 APIC: 00
1091 12:51:43.439523 APIC: 03
1092 12:51:43.439601 APIC: 04
1093 12:51:43.442810 APIC: 02
1094 12:51:43.442888 APIC: 05
1095 12:51:43.442956 APIC: 01
1096 12:51:43.446176 APIC: 06
1097 12:51:43.446251 APIC: 07
1098 12:51:43.449664 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 12:51:43.506027 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 12:51:43.506366 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 12:51:43.506455 PCI: 00:00.0
1102 12:51:43.506726 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 12:51:43.506805 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 12:51:43.507067 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 12:51:43.555695 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 12:51:43.556003 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 12:51:43.556086 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 12:51:43.556537 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 12:51:43.556809 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 12:51:43.556890 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 12:51:43.605418 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 12:51:43.605532 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 12:51:43.606077 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 12:51:43.606367 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 12:51:43.606640 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 12:51:43.653360 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 12:51:43.654015 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 12:51:43.654104 PCI: 00:02.0
1119 12:51:43.654709 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 12:51:43.655309 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 12:51:43.658066 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 12:51:43.658148 PCI: 00:04.0
1123 12:51:43.658226 PCI: 00:08.0
1124 12:51:43.664993 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 12:51:43.668610 PCI: 00:12.0
1126 12:51:43.678300 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 12:51:43.681566 PCI: 00:14.0 child on link 0 USB0 port 0
1128 12:51:43.691195 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 12:51:43.694687 USB0 port 0 child on link 0 USB2 port 0
1130 12:51:43.698153 USB2 port 0
1131 12:51:43.698248 USB2 port 1
1132 12:51:43.701319 USB2 port 2
1133 12:51:43.701414 USB2 port 3
1134 12:51:43.704667 USB2 port 5
1135 12:51:43.707814 USB2 port 6
1136 12:51:43.707908 USB2 port 9
1137 12:51:43.711583 USB3 port 0
1138 12:51:43.711678 USB3 port 1
1139 12:51:43.714880 USB3 port 2
1140 12:51:43.714974 USB3 port 3
1141 12:51:43.718101 USB3 port 4
1142 12:51:43.718196 PCI: 00:14.2
1143 12:51:43.727793 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 12:51:43.738080 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 12:51:43.741370 PCI: 00:14.3
1146 12:51:43.750971 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 12:51:43.754336 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 12:51:43.764576 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:51:43.764679 I2C: 01:15
1150 12:51:43.771072 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 12:51:43.780801 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 12:51:43.780904 I2C: 02:5d
1153 12:51:43.784415 GENERIC: 0.0
1154 12:51:43.784506 PCI: 00:16.0
1155 12:51:43.793990 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 12:51:43.797194 PCI: 00:17.0
1157 12:51:43.807152 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 12:51:43.814010 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 12:51:43.823612 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 12:51:43.830557 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 12:51:43.840402 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 12:51:43.850377 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 12:51:43.853637 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 12:51:43.863469 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:51:43.863563 I2C: 03:1a
1166 12:51:43.866786 I2C: 03:38
1167 12:51:43.866879 I2C: 03:39
1168 12:51:43.870220 I2C: 03:3a
1169 12:51:43.870326 I2C: 03:3b
1170 12:51:43.876901 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 12:51:43.883317 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 12:51:43.893417 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 12:51:43.903384 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 12:51:43.903497 PCI: 01:00.0
1175 12:51:43.912928 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:51:43.916679 PCI: 00:1e.0
1177 12:51:43.926769 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 12:51:43.936601 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 12:51:43.939722 PCI: 00:1e.2 child on link 0 SPI: 00
1180 12:51:43.949695 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:51:43.953044 SPI: 00
1182 12:51:43.956340 PCI: 00:1e.3 child on link 0 SPI: 01
1183 12:51:43.966475 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 12:51:43.966972 SPI: 01
1185 12:51:43.972977 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 12:51:43.979435 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 12:51:43.989284 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 12:51:43.992876 PNP: 0c09.0
1189 12:51:43.999415 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 12:51:44.002498 PCI: 00:1f.3
1191 12:51:44.012435 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 12:51:44.022443 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 12:51:44.022892 PCI: 00:1f.4
1194 12:51:44.032369 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 12:51:44.042212 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 12:51:44.042663 PCI: 00:1f.5
1197 12:51:44.051907 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 12:51:44.058775 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 12:51:44.064841 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 12:51:44.071758 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 12:51:44.074848 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 12:51:44.078425 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 12:51:44.081687 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 12:51:44.088046 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 12:51:44.095016 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 12:51:44.101402 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 12:51:44.108297 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 12:51:44.117887 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 12:51:44.124707 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 12:51:44.127805 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 12:51:44.134836 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 12:51:44.140961 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 12:51:44.144815 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 12:51:44.148000 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 12:51:44.154611 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 12:51:44.157762 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 12:51:44.164497 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 12:51:44.167561 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 12:51:44.174460 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 12:51:44.177890 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 12:51:44.184336 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 12:51:44.187699 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 12:51:44.194502 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 12:51:44.197581 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 12:51:44.204538 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 12:51:44.207893 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 12:51:44.214312 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 12:51:44.217823 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 12:51:44.221362 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 12:51:44.227510 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 12:51:44.231108 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 12:51:44.237513 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 12:51:44.240740 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 12:51:44.247431 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 12:51:44.253827 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 12:51:44.260564 avoid_fixed_resources: DOMAIN: 0000
1237 12:51:44.263740 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 12:51:44.270413 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 12:51:44.276892 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 12:51:44.286818 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 12:51:44.293377 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 12:51:44.300237 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 12:51:44.310087 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 12:51:44.316887 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 12:51:44.323367 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 12:51:44.333079 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 12:51:44.339852 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 12:51:44.346321 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 12:51:44.349689 Setting resources...
1250 12:51:44.356301 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 12:51:44.359656 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 12:51:44.362854 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 12:51:44.366613 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 12:51:44.370085 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 12:51:44.376469 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 12:51:44.382997 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 12:51:44.389892 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 12:51:44.396239 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 12:51:44.402810 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 12:51:44.405959 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 12:51:44.412753 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 12:51:44.416013 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 12:51:44.422765 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 12:51:44.425983 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 12:51:44.432966 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 12:51:44.436089 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 12:51:44.442627 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 12:51:44.445993 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 12:51:44.452446 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 12:51:44.456318 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 12:51:44.462446 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 12:51:44.465743 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 12:51:44.472795 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 12:51:44.475739 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 12:51:44.479037 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 12:51:44.485787 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 12:51:44.488971 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 12:51:44.495754 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 12:51:44.498943 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 12:51:44.505461 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 12:51:44.508810 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 12:51:44.519023 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 12:51:44.525294 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 12:51:44.531850 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 12:51:44.538676 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 12:51:44.545175 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 12:51:44.551805 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 12:51:44.554993 Root Device assign_resources, bus 0 link: 0
1289 12:51:44.561581 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 12:51:44.568215 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 12:51:44.578076 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 12:51:44.584563 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 12:51:44.594680 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 12:51:44.601206 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 12:51:44.611457 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 12:51:44.614508 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 12:51:44.617682 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 12:51:44.628251 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 12:51:44.634675 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 12:51:44.644876 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 12:51:44.651280 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 12:51:44.658056 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 12:51:44.661224 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 12:51:44.671206 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 12:51:44.674832 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 12:51:44.678007 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 12:51:44.687749 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 12:51:44.694752 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 12:51:44.704550 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 12:51:44.711002 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 12:51:44.717554 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 12:51:44.727558 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 12:51:44.733861 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 12:51:44.743773 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 12:51:44.747310 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 12:51:44.750556 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 12:51:44.760101 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 12:51:44.770250 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 12:51:44.776530 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 12:51:44.783023 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 12:51:44.789481 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 12:51:44.796027 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 12:51:44.803009 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 12:51:44.812867 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 12:51:44.815953 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 12:51:44.819100 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 12:51:44.829209 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 12:51:44.832691 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 12:51:44.839136 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 12:51:44.842343 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 12:51:44.848858 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 12:51:44.852563 LPC: Trying to open IO window from 800 size 1ff
1333 12:51:44.862514 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 12:51:44.869220 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 12:51:44.878971 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 12:51:44.885467 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 12:51:44.892231 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 12:51:44.895694 Root Device assign_resources, bus 0 link: 0
1339 12:51:44.898947 Done setting resources.
1340 12:51:44.905534 Show resources in subtree (Root Device)...After assigning values.
1341 12:51:44.908581 Root Device child on link 0 CPU_CLUSTER: 0
1342 12:51:44.911688 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 12:51:44.915037 APIC: 00
1344 12:51:44.915477 APIC: 03
1345 12:51:44.915811 APIC: 04
1346 12:51:44.918365 APIC: 02
1347 12:51:44.918785 APIC: 05
1348 12:51:44.921718 APIC: 01
1349 12:51:44.922136 APIC: 06
1350 12:51:44.922469 APIC: 07
1351 12:51:44.928544 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 12:51:44.938007 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 12:51:44.948467 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 12:51:44.951253 PCI: 00:00.0
1355 12:51:44.958113 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 12:51:44.968001 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 12:51:44.977958 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 12:51:44.987568 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 12:51:44.997511 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 12:51:45.007035 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 12:51:45.013973 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 12:51:45.023795 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 12:51:45.033607 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 12:51:45.043777 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 12:51:45.053708 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 12:51:45.060177 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 12:51:45.069938 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 12:51:45.079891 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 12:51:45.089960 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 12:51:45.099900 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 12:51:45.099991 PCI: 00:02.0
1372 12:51:45.112710 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 12:51:45.122979 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 12:51:45.133006 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 12:51:45.133120 PCI: 00:04.0
1376 12:51:45.135922 PCI: 00:08.0
1377 12:51:45.146145 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 12:51:45.146236 PCI: 00:12.0
1379 12:51:45.155935 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 12:51:45.163024 PCI: 00:14.0 child on link 0 USB0 port 0
1381 12:51:45.172753 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 12:51:45.175695 USB0 port 0 child on link 0 USB2 port 0
1383 12:51:45.178960 USB2 port 0
1384 12:51:45.179128 USB2 port 1
1385 12:51:45.182420 USB2 port 2
1386 12:51:45.182611 USB2 port 3
1387 12:51:45.185791 USB2 port 5
1388 12:51:45.186009 USB2 port 6
1389 12:51:45.189525 USB2 port 9
1390 12:51:45.189760 USB3 port 0
1391 12:51:45.192574 USB3 port 1
1392 12:51:45.192851 USB3 port 2
1393 12:51:45.195825 USB3 port 3
1394 12:51:45.199222 USB3 port 4
1395 12:51:45.199581 PCI: 00:14.2
1396 12:51:45.208933 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 12:51:45.219129 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 12:51:45.222472 PCI: 00:14.3
1399 12:51:45.232600 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 12:51:45.235859 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 12:51:45.245447 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 12:51:45.248380 I2C: 01:15
1403 12:51:45.251658 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 12:51:45.261884 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 12:51:45.265294 I2C: 02:5d
1406 12:51:45.265425 GENERIC: 0.0
1407 12:51:45.268195 PCI: 00:16.0
1408 12:51:45.278311 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 12:51:45.278480 PCI: 00:17.0
1410 12:51:45.288421 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 12:51:45.298649 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 12:51:45.308145 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 12:51:45.318370 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 12:51:45.327955 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 12:51:45.338192 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 12:51:45.341380 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 12:51:45.350956 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 12:51:45.354691 I2C: 03:1a
1419 12:51:45.355116 I2C: 03:38
1420 12:51:45.357896 I2C: 03:39
1421 12:51:45.358321 I2C: 03:3a
1422 12:51:45.361120 I2C: 03:3b
1423 12:51:45.364477 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 12:51:45.374204 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 12:51:45.384048 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 12:51:45.393894 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 12:51:45.393988 PCI: 01:00.0
1428 12:51:45.407191 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 12:51:45.407285 PCI: 00:1e.0
1430 12:51:45.416812 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 12:51:45.430437 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 12:51:45.433504 PCI: 00:1e.2 child on link 0 SPI: 00
1433 12:51:45.443426 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 12:51:45.443520 SPI: 00
1435 12:51:45.449995 PCI: 00:1e.3 child on link 0 SPI: 01
1436 12:51:45.460354 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 12:51:45.460466 SPI: 01
1438 12:51:45.463665 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 12:51:45.473526 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 12:51:45.483668 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 12:51:45.483979 PNP: 0c09.0
1442 12:51:45.493490 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 12:51:45.493788 PCI: 00:1f.3
1444 12:51:45.502858 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 12:51:45.516220 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 12:51:45.516316 PCI: 00:1f.4
1447 12:51:45.526304 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 12:51:45.536063 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 12:51:45.536159 PCI: 00:1f.5
1450 12:51:45.549450 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 12:51:45.549549 Done allocating resources.
1452 12:51:45.556053 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 12:51:45.559190 Enabling resources...
1454 12:51:45.562430 PCI: 00:00.0 subsystem <- 8086/9b61
1455 12:51:45.565630 PCI: 00:00.0 cmd <- 06
1456 12:51:45.568951 PCI: 00:02.0 subsystem <- 8086/9b41
1457 12:51:45.572255 PCI: 00:02.0 cmd <- 03
1458 12:51:45.575502 PCI: 00:08.0 cmd <- 06
1459 12:51:45.578739 PCI: 00:12.0 subsystem <- 8086/02f9
1460 12:51:45.581967 PCI: 00:12.0 cmd <- 02
1461 12:51:45.585280 PCI: 00:14.0 subsystem <- 8086/02ed
1462 12:51:45.585368 PCI: 00:14.0 cmd <- 02
1463 12:51:45.589114 PCI: 00:14.2 cmd <- 02
1464 12:51:45.592518 PCI: 00:14.3 subsystem <- 8086/02f0
1465 12:51:45.595774 PCI: 00:14.3 cmd <- 02
1466 12:51:45.598689 PCI: 00:15.0 subsystem <- 8086/02e8
1467 12:51:45.602275 PCI: 00:15.0 cmd <- 02
1468 12:51:45.605423 PCI: 00:15.1 subsystem <- 8086/02e9
1469 12:51:45.608577 PCI: 00:15.1 cmd <- 02
1470 12:51:45.612069 PCI: 00:16.0 subsystem <- 8086/02e0
1471 12:51:45.615632 PCI: 00:16.0 cmd <- 02
1472 12:51:45.618573 PCI: 00:17.0 subsystem <- 8086/02d3
1473 12:51:45.621773 PCI: 00:17.0 cmd <- 03
1474 12:51:45.624999 PCI: 00:19.0 subsystem <- 8086/02c5
1475 12:51:45.628744 PCI: 00:19.0 cmd <- 02
1476 12:51:45.631552 PCI: 00:1d.0 bridge ctrl <- 0013
1477 12:51:45.634883 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 12:51:45.634966 PCI: 00:1d.0 cmd <- 06
1479 12:51:45.642153 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 12:51:45.642243 PCI: 00:1e.0 cmd <- 06
1481 12:51:45.645220 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 12:51:45.648400 PCI: 00:1e.2 cmd <- 06
1483 12:51:45.652026 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 12:51:45.655337 PCI: 00:1e.3 cmd <- 02
1485 12:51:45.658232 PCI: 00:1f.0 subsystem <- 8086/0284
1486 12:51:45.661930 PCI: 00:1f.0 cmd <- 407
1487 12:51:45.665132 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 12:51:45.668309 PCI: 00:1f.3 cmd <- 02
1489 12:51:45.671740 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 12:51:45.674993 PCI: 00:1f.4 cmd <- 03
1491 12:51:45.678143 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 12:51:45.681447 PCI: 00:1f.5 cmd <- 406
1493 12:51:45.689761 PCI: 01:00.0 cmd <- 02
1494 12:51:45.694909 done.
1495 12:51:45.707580 ME: Version: 14.0.39.1367
1496 12:51:45.714069 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1497 12:51:45.717254 Initializing devices...
1498 12:51:45.717351 Root Device init ...
1499 12:51:45.724072 Chrome EC: Set SMI mask to 0x0000000000000000
1500 12:51:45.727407 Chrome EC: clear events_b mask to 0x0000000000000000
1501 12:51:45.733871 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 12:51:45.740367 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 12:51:45.747365 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 12:51:45.750535 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 12:51:45.757000 Root Device init finished in 35161 usecs
1506 12:51:45.757111 CPU_CLUSTER: 0 init ...
1507 12:51:45.763599 CPU_CLUSTER: 0 init finished in 2447 usecs
1508 12:51:45.768187 PCI: 00:00.0 init ...
1509 12:51:45.771514 CPU TDP: 15 Watts
1510 12:51:45.774920 CPU PL2 = 64 Watts
1511 12:51:45.778092 PCI: 00:00.0 init finished in 7078 usecs
1512 12:51:45.781356 PCI: 00:02.0 init ...
1513 12:51:45.784571 PCI: 00:02.0 init finished in 2253 usecs
1514 12:51:45.787815 PCI: 00:08.0 init ...
1515 12:51:45.791180 PCI: 00:08.0 init finished in 2251 usecs
1516 12:51:45.794500 PCI: 00:12.0 init ...
1517 12:51:45.797737 PCI: 00:12.0 init finished in 2251 usecs
1518 12:51:45.801560 PCI: 00:14.0 init ...
1519 12:51:45.804494 PCI: 00:14.0 init finished in 2251 usecs
1520 12:51:45.807981 PCI: 00:14.2 init ...
1521 12:51:45.811195 PCI: 00:14.2 init finished in 2251 usecs
1522 12:51:45.814462 PCI: 00:14.3 init ...
1523 12:51:45.817671 PCI: 00:14.3 init finished in 2269 usecs
1524 12:51:45.821273 PCI: 00:15.0 init ...
1525 12:51:45.824481 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 12:51:45.827783 PCI: 00:15.0 init finished in 5976 usecs
1527 12:51:45.831017 PCI: 00:15.1 init ...
1528 12:51:45.834311 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 12:51:45.840888 PCI: 00:15.1 init finished in 5968 usecs
1530 12:51:45.840981 PCI: 00:16.0 init ...
1531 12:51:45.847561 PCI: 00:16.0 init finished in 2251 usecs
1532 12:51:45.850701 PCI: 00:19.0 init ...
1533 12:51:45.853950 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 12:51:45.857522 PCI: 00:19.0 init finished in 5974 usecs
1535 12:51:45.860822 PCI: 00:1d.0 init ...
1536 12:51:45.864132 Initializing PCH PCIe bridge.
1537 12:51:45.867427 PCI: 00:1d.0 init finished in 5282 usecs
1538 12:51:45.870651 PCI: 00:1f.0 init ...
1539 12:51:45.873983 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 12:51:45.880608 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 12:51:45.880703 IOAPIC: ID = 0x02
1542 12:51:45.883946 IOAPIC: Dumping registers
1543 12:51:45.887240 reg 0x0000: 0x02000000
1544 12:51:45.890515 reg 0x0001: 0x00770020
1545 12:51:45.890607 reg 0x0002: 0x00000000
1546 12:51:45.897105 PCI: 00:1f.0 init finished in 23535 usecs
1547 12:51:45.900369 PCI: 00:1f.4 init ...
1548 12:51:45.903738 PCI: 00:1f.4 init finished in 2261 usecs
1549 12:51:45.914273 PCI: 01:00.0 init ...
1550 12:51:45.917480 PCI: 01:00.0 init finished in 2251 usecs
1551 12:51:45.921601 PNP: 0c09.0 init ...
1552 12:51:45.925204 Google Chrome EC uptime: 11.077 seconds
1553 12:51:45.931793 Google Chrome AP resets since EC boot: 0
1554 12:51:45.935013 Google Chrome most recent AP reset causes:
1555 12:51:45.941586 Google Chrome EC reset flags at last EC boot: reset-pin
1556 12:51:45.944789 PNP: 0c09.0 init finished in 20567 usecs
1557 12:51:45.948636 Devices initialized
1558 12:51:45.951666 Show all devs... After init.
1559 12:51:45.951758 Root Device: enabled 1
1560 12:51:45.954867 CPU_CLUSTER: 0: enabled 1
1561 12:51:45.957989 DOMAIN: 0000: enabled 1
1562 12:51:45.958081 APIC: 00: enabled 1
1563 12:51:45.961240 PCI: 00:00.0: enabled 1
1564 12:51:45.964979 PCI: 00:02.0: enabled 1
1565 12:51:45.968228 PCI: 00:04.0: enabled 0
1566 12:51:45.968321 PCI: 00:05.0: enabled 0
1567 12:51:45.971181 PCI: 00:12.0: enabled 1
1568 12:51:45.974792 PCI: 00:12.5: enabled 0
1569 12:51:45.978099 PCI: 00:12.6: enabled 0
1570 12:51:45.978195 PCI: 00:14.0: enabled 1
1571 12:51:45.981375 PCI: 00:14.1: enabled 0
1572 12:51:45.984549 PCI: 00:14.3: enabled 1
1573 12:51:45.984633 PCI: 00:14.5: enabled 0
1574 12:51:45.987957 PCI: 00:15.0: enabled 1
1575 12:51:45.991262 PCI: 00:15.1: enabled 1
1576 12:51:45.994579 PCI: 00:15.2: enabled 0
1577 12:51:45.994673 PCI: 00:15.3: enabled 0
1578 12:51:45.997855 PCI: 00:16.0: enabled 1
1579 12:51:46.001116 PCI: 00:16.1: enabled 0
1580 12:51:46.004355 PCI: 00:16.2: enabled 0
1581 12:51:46.004450 PCI: 00:16.3: enabled 0
1582 12:51:46.007651 PCI: 00:16.4: enabled 0
1583 12:51:46.010816 PCI: 00:16.5: enabled 0
1584 12:51:46.014427 PCI: 00:17.0: enabled 1
1585 12:51:46.014522 PCI: 00:19.0: enabled 1
1586 12:51:46.017740 PCI: 00:19.1: enabled 0
1587 12:51:46.021108 PCI: 00:19.2: enabled 0
1588 12:51:46.024244 PCI: 00:1a.0: enabled 0
1589 12:51:46.024331 PCI: 00:1c.0: enabled 0
1590 12:51:46.027492 PCI: 00:1c.1: enabled 0
1591 12:51:46.030660 PCI: 00:1c.2: enabled 0
1592 12:51:46.030746 PCI: 00:1c.3: enabled 0
1593 12:51:46.033928 PCI: 00:1c.4: enabled 0
1594 12:51:46.037581 PCI: 00:1c.5: enabled 0
1595 12:51:46.040777 PCI: 00:1c.6: enabled 0
1596 12:51:46.040867 PCI: 00:1c.7: enabled 0
1597 12:51:46.044035 PCI: 00:1d.0: enabled 1
1598 12:51:46.047268 PCI: 00:1d.1: enabled 0
1599 12:51:46.050403 PCI: 00:1d.2: enabled 0
1600 12:51:46.050485 PCI: 00:1d.3: enabled 0
1601 12:51:46.053756 PCI: 00:1d.4: enabled 0
1602 12:51:46.057188 PCI: 00:1d.5: enabled 0
1603 12:51:46.060495 PCI: 00:1e.0: enabled 1
1604 12:51:46.060578 PCI: 00:1e.1: enabled 0
1605 12:51:46.063754 PCI: 00:1e.2: enabled 1
1606 12:51:46.066970 PCI: 00:1e.3: enabled 1
1607 12:51:46.070094 PCI: 00:1f.0: enabled 1
1608 12:51:46.070176 PCI: 00:1f.1: enabled 0
1609 12:51:46.073404 PCI: 00:1f.2: enabled 0
1610 12:51:46.076722 PCI: 00:1f.3: enabled 1
1611 12:51:46.076814 PCI: 00:1f.4: enabled 1
1612 12:51:46.080441 PCI: 00:1f.5: enabled 1
1613 12:51:46.083297 PCI: 00:1f.6: enabled 0
1614 12:51:46.086534 USB0 port 0: enabled 1
1615 12:51:46.086630 I2C: 01:15: enabled 1
1616 12:51:46.089894 I2C: 02:5d: enabled 1
1617 12:51:46.093296 GENERIC: 0.0: enabled 1
1618 12:51:46.093387 I2C: 03:1a: enabled 1
1619 12:51:46.096759 I2C: 03:38: enabled 1
1620 12:51:46.100022 I2C: 03:39: enabled 1
1621 12:51:46.100104 I2C: 03:3a: enabled 1
1622 12:51:46.103278 I2C: 03:3b: enabled 1
1623 12:51:46.106596 PCI: 00:00.0: enabled 1
1624 12:51:46.106677 SPI: 00: enabled 1
1625 12:51:46.109913 SPI: 01: enabled 1
1626 12:51:46.112881 PNP: 0c09.0: enabled 1
1627 12:51:46.112964 USB2 port 0: enabled 1
1628 12:51:46.116260 USB2 port 1: enabled 1
1629 12:51:46.119907 USB2 port 2: enabled 0
1630 12:51:46.123137 USB2 port 3: enabled 0
1631 12:51:46.123218 USB2 port 5: enabled 0
1632 12:51:46.126380 USB2 port 6: enabled 1
1633 12:51:46.129748 USB2 port 9: enabled 1
1634 12:51:46.129827 USB3 port 0: enabled 1
1635 12:51:46.132838 USB3 port 1: enabled 1
1636 12:51:46.136290 USB3 port 2: enabled 1
1637 12:51:46.139581 USB3 port 3: enabled 1
1638 12:51:46.139666 USB3 port 4: enabled 0
1639 12:51:46.142811 APIC: 03: enabled 1
1640 12:51:46.146195 APIC: 04: enabled 1
1641 12:51:46.146280 APIC: 02: enabled 1
1642 12:51:46.149319 APIC: 05: enabled 1
1643 12:51:46.149404 APIC: 01: enabled 1
1644 12:51:46.152513 APIC: 06: enabled 1
1645 12:51:46.155893 APIC: 07: enabled 1
1646 12:51:46.155987 PCI: 00:08.0: enabled 1
1647 12:51:46.159374 PCI: 00:14.2: enabled 1
1648 12:51:46.162401 PCI: 01:00.0: enabled 1
1649 12:51:46.165807 Disabling ACPI via APMC:
1650 12:51:46.169072 done.
1651 12:51:46.172390 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 12:51:46.175580 ELOG: NV offset 0xaf0000 size 0x4000
1653 12:51:46.183018 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 12:51:46.189858 ELOG: Event(17) added with size 13 at 2022-07-14 12:42:41 UTC
1655 12:51:46.196464 ELOG: Event(92) added with size 9 at 2022-07-14 12:42:41 UTC
1656 12:51:46.203112 ELOG: Event(93) added with size 9 at 2022-07-14 12:42:41 UTC
1657 12:51:46.209795 ELOG: Event(9A) added with size 9 at 2022-07-14 12:42:41 UTC
1658 12:51:46.216509 ELOG: Event(9E) added with size 10 at 2022-07-14 12:42:41 UTC
1659 12:51:46.222866 ELOG: Event(9F) added with size 14 at 2022-07-14 12:42:41 UTC
1660 12:51:46.226119 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1661 12:51:46.233449 ELOG: Event(A1) added with size 10 at 2022-07-14 12:42:41 UTC
1662 12:51:46.240305 ELOG: Event(16) added with size 11 at 2022-07-14 12:42:41 UTC
1663 12:51:46.243510 Erasing flash addr af0000 + 4 KiB
1664 12:51:46.312031 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 12:51:46.318377 ELOG: Event(A0) added with size 9 at 2022-07-14 12:42:41 UTC
1666 12:51:46.321777 elog_add_boot_reason: Logged dev mode boot
1667 12:51:46.325026 Finalize devices...
1668 12:51:46.325122 PCI: 00:17.0 final
1669 12:51:46.328277 Devices finalized
1670 12:51:46.331490 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 12:51:46.337996 BS: BS_POST_DEVICE times (ms): entry 52 run 0 exit 0
1672 12:51:46.341272 ME: HFSTS1 : 0x90000245
1673 12:51:46.348144 ME: HFSTS2 : 0x3B850126
1674 12:51:46.351520 ME: HFSTS3 : 0x00000020
1675 12:51:46.354731 ME: HFSTS4 : 0x00004800
1676 12:51:46.357976 ME: HFSTS5 : 0x00000000
1677 12:51:46.361386 ME: HFSTS6 : 0x40400006
1678 12:51:46.364740 ME: Manufacturing Mode : NO
1679 12:51:46.367848 ME: FW Partition Table : OK
1680 12:51:46.371222 ME: Bringup Loader Failure : NO
1681 12:51:46.377958 ME: Firmware Init Complete : YES
1682 12:51:46.381007 ME: Boot Options Present : NO
1683 12:51:46.384404 ME: Update In Progress : NO
1684 12:51:46.387609 ME: D0i3 Support : YES
1685 12:51:46.390851 ME: Low Power State Enabled : NO
1686 12:51:46.394143 ME: CPU Replaced : NO
1687 12:51:46.397345 ME: CPU Replacement Valid : YES
1688 12:51:46.400691 ME: Current Working State : 5
1689 12:51:46.404038 ME: Current Operation State : 1
1690 12:51:46.407234 ME: Current Operation Mode : 0
1691 12:51:46.410580 ME: Error Code : 0
1692 12:51:46.413853 ME: CPU Debug Disabled : YES
1693 12:51:46.417219 ME: TXT Support : NO
1694 12:51:46.420408 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 12:51:46.426970 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 12:51:46.430131 CBFS @ c08000 size 3f8000
1697 12:51:46.433857 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 12:51:46.436962 CBFS: Locating 'fallback/dsdt.aml'
1699 12:51:46.443867 CBFS: Found @ offset 10bb80 size 3fa5
1700 12:51:46.447216 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 12:51:46.450456 CBFS @ c08000 size 3f8000
1702 12:51:46.456906 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 12:51:46.460310 CBFS: Locating 'fallback/slic'
1704 12:51:46.463420 CBFS: 'fallback/slic' not found.
1705 12:51:46.467292 ACPI: Writing ACPI tables at 99b3e000.
1706 12:51:46.470414 ACPI: * FACS
1707 12:51:46.470519 ACPI: * DSDT
1708 12:51:46.476727 Ramoops buffer: 0x100000@0x99a3d000.
1709 12:51:46.480109 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 12:51:46.483251 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 12:51:46.487078 Google Chrome EC: version:
1712 12:51:46.490461 ro: helios_v2.0.2659-56403530b
1713 12:51:46.493671 rw: helios_v2.0.2849-c41de27e7d
1714 12:51:46.496991 running image: 1
1715 12:51:46.500500 ACPI: * FADT
1716 12:51:46.500596 SCI is IRQ9
1717 12:51:46.503733 ACPI: added table 1/32, length now 40
1718 12:51:46.507138 ACPI: * SSDT
1719 12:51:46.510411 Found 1 CPU(s) with 8 core(s) each.
1720 12:51:46.513621 Error: Could not locate 'wifi_sar' in VPD.
1721 12:51:46.519996 Checking CBFS for default SAR values
1722 12:51:46.523575 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 12:51:46.526788 CBFS @ c08000 size 3f8000
1724 12:51:46.533226 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 12:51:46.536599 CBFS: Locating 'wifi_sar_defaults.hex'
1726 12:51:46.539723 CBFS: Found @ offset 5fac0 size 77
1727 12:51:46.542974 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 12:51:46.549724 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 12:51:46.553422 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 12:51:46.559847 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 12:51:46.562885 failed to find key in VPD: dsm_calib_r0_0
1732 12:51:46.573075 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 12:51:46.576422 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 12:51:46.579511 failed to find key in VPD: dsm_calib_r0_1
1735 12:51:46.589346 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 12:51:46.596320 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 12:51:46.599178 failed to find key in VPD: dsm_calib_r0_2
1738 12:51:46.609543 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 12:51:46.612415 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 12:51:46.619350 failed to find key in VPD: dsm_calib_r0_3
1741 12:51:46.625800 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 12:51:46.632206 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 12:51:46.635850 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 12:51:46.639282 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 12:51:46.642806 EC returned error result code 1
1746 12:51:46.646893 EC returned error result code 1
1747 12:51:46.650188 EC returned error result code 1
1748 12:51:46.657112 PS2K: Bad resp from EC. Vivaldi disabled!
1749 12:51:46.660687 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 12:51:46.666924 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 12:51:46.673429 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 12:51:46.676826 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 12:51:46.683696 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 12:51:46.690265 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 12:51:46.696856 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 12:51:46.700055 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 12:51:46.706632 ACPI: added table 2/32, length now 44
1758 12:51:46.706751 ACPI: * MCFG
1759 12:51:46.709932 ACPI: added table 3/32, length now 48
1760 12:51:46.713500 ACPI: * TPM2
1761 12:51:46.716732 TPM2 log created at 99a2d000
1762 12:51:46.719975 ACPI: added table 4/32, length now 52
1763 12:51:46.720400 ACPI: * MADT
1764 12:51:46.723220 SCI is IRQ9
1765 12:51:46.726594 ACPI: added table 5/32, length now 56
1766 12:51:46.727020 current = 99b43ac0
1767 12:51:46.729892 ACPI: * DMAR
1768 12:51:46.733219 ACPI: added table 6/32, length now 60
1769 12:51:46.736639 ACPI: * IGD OpRegion
1770 12:51:46.737086 GMA: Found VBT in CBFS
1771 12:51:46.739636 GMA: Found valid VBT in CBFS
1772 12:51:46.746070 ACPI: added table 7/32, length now 64
1773 12:51:46.746163 ACPI: * HPET
1774 12:51:46.749533 ACPI: added table 8/32, length now 68
1775 12:51:46.752928 ACPI: done.
1776 12:51:46.753013 ACPI tables: 31744 bytes.
1777 12:51:46.756213 smbios_write_tables: 99a2c000
1778 12:51:46.759346 EC returned error result code 3
1779 12:51:46.765679 Couldn't obtain OEM name from CBI
1780 12:51:46.765784 Create SMBIOS type 17
1781 12:51:46.768976 PCI: 00:00.0 (Intel Cannonlake)
1782 12:51:46.772211 PCI: 00:14.3 (Intel WiFi)
1783 12:51:46.775949 SMBIOS tables: 939 bytes.
1784 12:51:46.779179 Writing table forward entry at 0x00000500
1785 12:51:46.785617 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 12:51:46.788675 Writing coreboot table at 0x99b62000
1787 12:51:46.795831 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 12:51:46.799094 1. 0000000000001000-000000000009ffff: RAM
1789 12:51:46.805546 2. 00000000000a0000-00000000000fffff: RESERVED
1790 12:51:46.808828 3. 0000000000100000-0000000099a2bfff: RAM
1791 12:51:46.815480 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 12:51:46.818932 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 12:51:46.824964 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 12:51:46.828847 7. 000000009a000000-000000009f7fffff: RESERVED
1795 12:51:46.835204 8. 00000000e0000000-00000000efffffff: RESERVED
1796 12:51:46.838379 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 12:51:46.844819 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 12:51:46.848491 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 12:51:46.855021 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 12:51:46.858216 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 12:51:46.864956 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 12:51:46.867924 15. 0000000100000000-000000045e7fffff: RAM
1803 12:51:46.871178 Graphics framebuffer located at 0xc0000000
1804 12:51:46.874931 Passing 5 GPIOs to payload:
1805 12:51:46.881414 NAME | PORT | POLARITY | VALUE
1806 12:51:46.884344 write protect | undefined | high | low
1807 12:51:46.891321 lid | undefined | high | high
1808 12:51:46.894702 power | undefined | high | low
1809 12:51:46.901083 oprom | undefined | high | low
1810 12:51:46.907696 EC in RW | 0x000000cb | high | low
1811 12:51:46.907786 Board ID: 4
1812 12:51:46.911043 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 12:51:46.914347 CBFS @ c08000 size 3f8000
1814 12:51:46.920902 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 12:51:46.927758 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum 407
1816 12:51:46.930896 coreboot table: 1452 bytes.
1817 12:51:46.934409 IMD ROOT 0. 99fff000 00001000
1818 12:51:46.937521 IMD SMALL 1. 99ffe000 00001000
1819 12:51:46.940699 FSP MEMORY 2. 99c4e000 003b0000
1820 12:51:46.944012 CONSOLE 3. 99c2e000 00020000
1821 12:51:46.947054 FMAP 4. 99c2d000 0000054e
1822 12:51:46.950868 TIME STAMP 5. 99c2c000 00000910
1823 12:51:46.953941 VBOOT WORK 6. 99c18000 00014000
1824 12:51:46.957184 MRC DATA 7. 99c16000 00001958
1825 12:51:46.960377 ROMSTG STCK 8. 99c15000 00001000
1826 12:51:46.963809 AFTER CAR 9. 99c0b000 0000a000
1827 12:51:46.966901 RAMSTAGE 10. 99baf000 0005c000
1828 12:51:46.970286 REFCODE 11. 99b7a000 00035000
1829 12:51:46.973811 SMM BACKUP 12. 99b6a000 00010000
1830 12:51:46.977055 COREBOOT 13. 99b62000 00008000
1831 12:51:46.980356 ACPI 14. 99b3e000 00024000
1832 12:51:46.983695 ACPI GNVS 15. 99b3d000 00001000
1833 12:51:46.986814 RAMOOPS 16. 99a3d000 00100000
1834 12:51:46.989998 TPM2 TCGLOG17. 99a2d000 00010000
1835 12:51:46.993439 SMBIOS 18. 99a2c000 00000800
1836 12:51:46.993527 IMD small region:
1837 12:51:46.996543 IMD ROOT 0. 99ffec00 00000400
1838 12:51:47.003303 FSP RUNTIME 1. 99ffebe0 00000004
1839 12:51:47.006544 EC HOSTEVENT 2. 99ffebc0 00000008
1840 12:51:47.009753 POWER STATE 3. 99ffeb80 00000040
1841 12:51:47.013005 ROMSTAGE 4. 99ffeb60 00000004
1842 12:51:47.016297 MEM INFO 5. 99ffe9a0 000001b9
1843 12:51:47.019714 MTRR: Physical address space:
1844 12:51:47.026328 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1845 12:51:47.032983 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1846 12:51:47.036151 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1847 12:51:47.043172 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1848 12:51:47.049711 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1849 12:51:47.055992 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1850 12:51:47.062943 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1851 12:51:47.066350 MTRR: Fixed MSR 0x250 0x0606060606060606
1852 12:51:47.069821 MTRR: Fixed MSR 0x258 0x0606060606060606
1853 12:51:47.075868 MTRR: Fixed MSR 0x259 0x0000000000000000
1854 12:51:47.079401 MTRR: Fixed MSR 0x268 0x0606060606060606
1855 12:51:47.082593 MTRR: Fixed MSR 0x269 0x0606060606060606
1856 12:51:47.085898 MTRR: Fixed MSR 0x26a 0x0606060606060606
1857 12:51:47.092703 MTRR: Fixed MSR 0x26b 0x0606060606060606
1858 12:51:47.096009 MTRR: Fixed MSR 0x26c 0x0606060606060606
1859 12:51:47.099372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1860 12:51:47.102622 MTRR: Fixed MSR 0x26e 0x0606060606060606
1861 12:51:47.109220 MTRR: Fixed MSR 0x26f 0x0606060606060606
1862 12:51:47.112539 call enable_fixed_mtrr()
1863 12:51:47.115850 CPU physical address size: 39 bits
1864 12:51:47.118794 MTRR: default type WB/UC MTRR counts: 6/8.
1865 12:51:47.122493 MTRR: WB selected as default type.
1866 12:51:47.128646 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1867 12:51:47.135811 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1868 12:51:47.141881 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1869 12:51:47.148763 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1870 12:51:47.151888 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1871 12:51:47.158511 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1872 12:51:47.165571 MTRR: Fixed MSR 0x250 0x0606060606060606
1873 12:51:47.168888 MTRR: Fixed MSR 0x258 0x0606060606060606
1874 12:51:47.172455 MTRR: Fixed MSR 0x259 0x0000000000000000
1875 12:51:47.175667 MTRR: Fixed MSR 0x268 0x0606060606060606
1876 12:51:47.182076 MTRR: Fixed MSR 0x269 0x0606060606060606
1877 12:51:47.185347 MTRR: Fixed MSR 0x26a 0x0606060606060606
1878 12:51:47.189055 MTRR: Fixed MSR 0x26b 0x0606060606060606
1879 12:51:47.191953 MTRR: Fixed MSR 0x26c 0x0606060606060606
1880 12:51:47.198736 MTRR: Fixed MSR 0x26d 0x0606060606060606
1881 12:51:47.202144 MTRR: Fixed MSR 0x26e 0x0606060606060606
1882 12:51:47.205396 MTRR: Fixed MSR 0x26f 0x0606060606060606
1883 12:51:47.208704 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 12:51:47.212129 call enable_fixed_mtrr()
1885 12:51:47.215340 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:51:47.221845 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:51:47.225382 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:51:47.228053 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:51:47.231759 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:51:47.238373 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:51:47.241505 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:51:47.244716 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:51:47.248004 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:51:47.254766 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:51:47.257544 CPU physical address size: 39 bits
1896 12:51:47.261285 call enable_fixed_mtrr()
1897 12:51:47.264585 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 12:51:47.267681 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 12:51:47.270919 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 12:51:47.277721 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 12:51:47.280895 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 12:51:47.284040 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 12:51:47.287773 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 12:51:47.294298 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 12:51:47.297556 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 12:51:47.300628 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 12:51:47.303981 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 12:51:47.311121 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 12:51:47.311212 call enable_fixed_mtrr()
1910 12:51:47.317403 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 12:51:47.320699 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 12:51:47.324118 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 12:51:47.327432 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 12:51:47.333912 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 12:51:47.337122 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 12:51:47.340571 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 12:51:47.343727 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 12:51:47.346893 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 12:51:47.353783 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 12:51:47.357144 CPU physical address size: 39 bits
1921 12:51:47.360331 call enable_fixed_mtrr()
1922 12:51:47.363384 CPU physical address size: 39 bits
1923 12:51:47.366716 CPU physical address size: 39 bits
1924 12:51:47.370287 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 12:51:47.370368
1926 12:51:47.373517 MTRR check
1927 12:51:47.373616 Fixed MTRRs : Enabled
1928 12:51:47.376764 Variable MTRRs: Enabled
1929 12:51:47.376845
1930 12:51:47.380000 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:51:47.386728 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:51:47.389883 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:51:47.393334 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:51:47.397032 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:51:47.403368 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:51:47.406698 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:51:47.409768 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:51:47.413089 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:51:47.416539 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:51:47.423059 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1941 12:51:47.426408 call enable_fixed_mtrr()
1942 12:51:47.429827 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1943 12:51:47.436365 CPU physical address size: 39 bits
1944 12:51:47.436451 CBFS @ c08000 size 3f8000
1945 12:51:47.442770 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1946 12:51:47.445955 CBFS: Locating 'fallback/payload'
1947 12:51:47.449680 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 12:51:47.456056 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 12:51:47.459399 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 12:51:47.462634 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 12:51:47.465874 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 12:51:47.472547 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 12:51:47.475811 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 12:51:47.478979 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 12:51:47.482233 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 12:51:47.488885 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 12:51:47.492702 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 12:51:47.495593 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 12:51:47.499238 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 12:51:47.505668 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 12:51:47.509072 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 12:51:47.512390 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 12:51:47.515672 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 12:51:47.522165 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 12:51:47.525368 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 12:51:47.528734 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 12:51:47.531938 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 12:51:47.538721 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 12:51:47.538911 call enable_fixed_mtrr()
1970 12:51:47.542259 call enable_fixed_mtrr()
1971 12:51:47.545355 CPU physical address size: 39 bits
1972 12:51:47.548845 CPU physical address size: 39 bits
1973 12:51:47.555392 CBFS: Found @ offset 1c96c0 size 3f798
1974 12:51:47.558955 Checking segment from ROM address 0xffdd16f8
1975 12:51:47.562042 Checking segment from ROM address 0xffdd1714
1976 12:51:47.568680 Loading segment from ROM address 0xffdd16f8
1977 12:51:47.568773 code (compression=0)
1978 12:51:47.578443 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1979 12:51:47.585219 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1980 12:51:47.588173 it's not compressed!
1981 12:51:47.680920 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1982 12:51:47.687560 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1983 12:51:47.691058 Loading segment from ROM address 0xffdd1714
1984 12:51:47.694196 Entry Point 0x30000000
1985 12:51:47.697318 Loaded segments
1986 12:51:47.703322 Finalizing chipset.
1987 12:51:47.706543 Finalizing SMM.
1988 12:51:47.709790 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1989 12:51:47.713114 mp_park_aps done after 0 msecs.
1990 12:51:47.719784 Jumping to boot code at 30000000(99b62000)
1991 12:51:47.726067 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1992 12:51:47.726162
1993 12:51:47.729307 Starting depthcharge on Helios...
1994 12:51:47.729666 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1995 12:51:47.729789 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1996 12:51:47.729886 Setting prompt string to ['hatch:']
1997 12:51:47.729972 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1998 12:51:47.739267 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1999 12:51:47.745885 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2000 12:51:47.752249 board_setup: Info: eMMC controller not present; skipping
2001 12:51:47.755579 New NVMe Controller 0x30053ac0 @ 00:1d:00
2002 12:51:47.762367 board_setup: Info: SDHCI controller not present; skipping
2003 12:51:47.768792 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2004 12:51:47.768885 Wipe memory regions:
2005 12:51:47.772485 [0x00000000001000, 0x000000000a0000)
2006 12:51:47.778597 [0x00000000100000, 0x00000030000000)
2007 12:51:47.845601 [0x00000030657430, 0x00000099a2c000)
2008 12:51:47.995282 [0x00000100000000, 0x0000045e800000)
2009 12:51:49.451742 R8152: Initializing
2010 12:51:49.455015 Version 9 (ocp_data = 6010)
2011 12:51:49.459353 R8152: Done initializing
2012 12:51:49.462490 Adding net device
2013 12:51:49.837431 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2014 12:51:49.837588
2015 12:51:49.837884 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2017 12:51:49.938695 hatch: tftpboot 192.168.201.1 6819486/tftp-deploy-mb30fnh0/kernel/bzImage 6819486/tftp-deploy-mb30fnh0/kernel/cmdline 6819486/tftp-deploy-mb30fnh0/ramdisk/ramdisk.cpio.gz
2018 12:51:49.938887 Setting prompt string to ['Starting kernel']
2019 12:51:49.938987 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2020 12:51:49.939069 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
2021 12:51:49.943027 tftpboot 192.168.201.1 6819486/tftp-deploy-mb30fnh0/kernel/bzImaoy-mb30fnh0/kernel/cmdline 6819486/tftp-deploy-mb30fnh0/ramdisk/ramdisk.cpio.gz
2022 12:51:49.943124 Waiting for link
2023 12:51:50.144262 done.
2024 12:51:50.144428 MAC: f4:f5:e8:50:e3:ec
2025 12:51:50.147294 Sending DHCP discover... done.
2026 12:51:50.150503 Waiting for reply... done.
2027 12:51:50.154236 Sending DHCP request... done.
2028 12:51:50.160872 Waiting for reply... done.
2029 12:51:50.160968 My ip is 192.168.201.10
2030 12:51:50.164364 The DHCP server ip is 192.168.201.1
2031 12:51:50.170604 TFTP server IP predefined by user: 192.168.201.1
2032 12:51:50.177325 Bootfile predefined by user: 6819486/tftp-deploy-mb30fnh0/kernel/bzImage
2033 12:51:50.180546 Sending tftp read request... done.
2034 12:51:50.183787 Waiting for the transfer...
2035 12:51:50.459899 00000000 ################################################################
2036 12:51:50.757071 00080000 ################################################################
2037 12:51:51.011196 00100000 ################################################################
2038 12:51:51.245104 00180000 ################################################################
2039 12:51:51.517800 00200000 ################################################################
2040 12:51:51.803578 00280000 ################################################################
2041 12:51:52.055218 00300000 ################################################################
2042 12:51:52.290978 00380000 ################################################################
2043 12:51:52.539315 00400000 ################################################################
2044 12:51:52.787322 00480000 ################################################################
2045 12:51:53.035573 00500000 ################################################################
2046 12:51:53.285031 00580000 ################################################################
2047 12:51:53.547043 00600000 ################################################################ done.
2048 12:51:53.550364 The bootfile was 6811536 bytes long.
2049 12:51:53.557036 Sending tftp read request... done.
2050 12:51:53.557155 Waiting for the transfer...
2051 12:51:53.815292 00000000 ################################################################
2052 12:51:54.055824 00080000 ################################################################
2053 12:51:54.298165 00100000 ################################################################
2054 12:51:54.537361 00180000 ################################################################
2055 12:51:54.786881 00200000 ################################################################
2056 12:51:55.030777 00280000 ################################################################
2057 12:51:55.273321 00300000 ################################################################
2058 12:51:55.513750 00380000 ################################################################
2059 12:51:55.744117 00400000 ################################################################
2060 12:51:55.975262 00480000 ################################################################
2061 12:51:56.080582 00500000 ############################# done.
2062 12:51:56.083768 Sending tftp read request... done.
2063 12:51:56.087162 Waiting for the transfer...
2064 12:51:56.087255 00000000 # done.
2065 12:51:56.096990 Command line loaded dynamically from TFTP file: 6819486/tftp-deploy-mb30fnh0/kernel/cmdline
2066 12:51:56.123382 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6819486/extract-nfsrootfs-dcqhu23w,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2067 12:51:56.129961 ec_init(0): CrosEC protocol v3 supported (256, 256)
2068 12:51:56.133172 Shutting down all USB controllers.
2069 12:51:56.136319 Removing current net device
2070 12:51:56.140442 Finalizing coreboot
2071 12:51:56.147155 Exiting depthcharge with code 4 at timestamp: 15762427
2072 12:51:56.147250
2073 12:51:56.147326 Starting kernel ...
2074 12:51:56.147397
2075 12:51:56.147471
2076 12:51:56.147779 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2077 12:51:56.147891 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2078 12:51:56.147975 Setting prompt string to ['Linux version [0-9]']
2079 12:51:56.148055 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2080 12:51:56.148132 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2082 12:56:29.148144 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2084 12:56:29.148389 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2086 12:56:29.148569 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2089 12:56:29.148874 end: 2 depthcharge-action (duration 00:05:00) [common]
2091 12:56:29.149104 Cleaning after the job
2092 12:56:29.149202 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/ramdisk
2093 12:56:29.149701 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/kernel
2094 12:56:29.150277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/nfsrootfs
2095 12:56:29.202008 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6819486/tftp-deploy-mb30fnh0/modules
2096 12:56:29.202344 start: 4.1 power-off (timeout 00:00:30) [common]
2097 12:56:29.202540 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2098 12:56:29.224058 >> Command sent successfully.
2099 12:56:29.226090 Returned 0 in 0 seconds
2100 12:56:29.327358 end: 4.1 power-off (duration 00:00:00) [common]
2102 12:56:29.329762 start: 4.2 read-feedback (timeout 00:10:00) [common]
2103 12:56:29.330956 Listened to connection for namespace 'common' for up to 1s
2104 12:56:30.258620 Listened to connection for namespace 'common' for up to 1s
2105 12:56:30.262134 Listened to connection for namespace 'common' for up to 1s
2106 12:56:30.265329 Listened to connection for namespace 'common' for up to 1s
2107 12:56:30.268931 Listened to connection for namespace 'common' for up to 1s
2108 12:56:30.271978 Listened to connection for namespace 'common' for up to 1s
2109 12:56:30.275080 Listened to connection for namespace 'common' for up to 1s
2110 12:56:30.278580 Listened to connection for namespace 'common' for up to 1s
2111 12:56:30.282090 Listened to connection for namespace 'common' for up to 1s
2112 12:56:30.285263 Listened to connection for namespace 'common' for up to 1s
2113 12:56:30.288800 Listened to connection for namespace 'common' for up to 1s
2114 12:56:30.291911 Listened to connection for namespace 'common' for up to 1s
2115 12:56:30.294992 Listened to connection for namespace 'common' for up to 1s
2116 12:56:30.298434 Listened to connection for namespace 'common' for up to 1s
2117 12:56:30.301562 Listened to connection for namespace 'common' for up to 1s
2118 12:56:30.305149 Listened to connection for namespace 'common' for up to 1s
2119 12:56:30.308237 Listened to connection for namespace 'common' for up to 1s
2120 12:56:30.311898 Listened to connection for namespace 'common' for up to 1s
2121 12:56:30.315094 Listened to connection for namespace 'common' for up to 1s
2122 12:56:30.320318 Listened to connection for namespace 'common' for up to 1s
2123 12:56:30.324469 Listened to connection for namespace 'common' for up to 1s
2124 12:56:30.330354 Finalising connection for namespace 'common'
2125 12:56:30.330471 Disconnecting from shell: Finalise
2126 12:56:30.330559
2127 12:56:30.431418 end: 4.2 read-feedback (duration 00:00:01) [common]
2128 12:56:30.431616 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6819486
2129 12:56:30.610843 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6819486
2130 12:56:30.611044 JobError: Your job cannot terminate cleanly.