Boot log: asus-C436FA-Flip-hatch

    1 00:45:29.260059  lava-dispatcher, installed at version: 2022.06
    2 00:45:29.260267  start: 0 validate
    3 00:45:29.260404  Start time: 2022-07-26 00:45:29.260396+00:00 (UTC)
    4 00:45:29.260535  Using caching service: 'http://localhost/cache/?uri=%s'
    5 00:45:29.260662  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220718.0%2Fx86%2Frootfs.cpio.gz exists
    6 00:45:29.551500  Using caching service: 'http://localhost/cache/?uri=%s'
    7 00:45:29.551675  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-517-g92709d8ae585%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 00:45:29.831064  Using caching service: 'http://localhost/cache/?uri=%s'
    9 00:45:29.831221  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-517-g92709d8ae585%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 00:45:30.120981  validate duration: 0.86
   12 00:45:30.121261  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 00:45:30.121375  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 00:45:30.121472  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 00:45:30.121569  Not decompressing ramdisk as can be used compressed.
   16 00:45:30.121650  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220718.0/x86/rootfs.cpio.gz
   17 00:45:30.121716  saving as /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/ramdisk/rootfs.cpio.gz
   18 00:45:30.121778  total size: 8416091 (8MB)
   19 00:45:30.122899  progress   0% (0MB)
   20 00:45:30.124951  progress   5% (0MB)
   21 00:45:30.127187  progress  10% (0MB)
   22 00:45:30.129297  progress  15% (1MB)
   23 00:45:30.131418  progress  20% (1MB)
   24 00:45:30.133572  progress  25% (2MB)
   25 00:45:30.135679  progress  30% (2MB)
   26 00:45:30.137688  progress  35% (2MB)
   27 00:45:30.139791  progress  40% (3MB)
   28 00:45:30.141982  progress  45% (3MB)
   29 00:45:30.144058  progress  50% (4MB)
   30 00:45:30.146240  progress  55% (4MB)
   31 00:45:30.148365  progress  60% (4MB)
   32 00:45:30.150370  progress  65% (5MB)
   33 00:45:30.152460  progress  70% (5MB)
   34 00:45:30.154610  progress  75% (6MB)
   35 00:45:30.156688  progress  80% (6MB)
   36 00:45:30.158801  progress  85% (6MB)
   37 00:45:30.160919  progress  90% (7MB)
   38 00:45:30.162886  progress  95% (7MB)
   39 00:45:30.165065  progress 100% (8MB)
   40 00:45:30.165340  8MB downloaded in 0.04s (184.27MB/s)
   41 00:45:30.165499  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 00:45:30.165750  end: 1.1 download-retry (duration 00:00:00) [common]
   44 00:45:30.165840  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 00:45:30.165930  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 00:45:30.166034  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-517-g92709d8ae585/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 00:45:30.166101  saving as /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/kernel/bzImage
   48 00:45:30.166165  total size: 6811536 (6MB)
   49 00:45:30.166226  No compression specified
   50 00:45:30.167280  progress   0% (0MB)
   51 00:45:30.169101  progress   5% (0MB)
   52 00:45:30.170791  progress  10% (0MB)
   53 00:45:30.172610  progress  15% (1MB)
   54 00:45:30.174359  progress  20% (1MB)
   55 00:45:30.175994  progress  25% (1MB)
   56 00:45:30.177853  progress  30% (1MB)
   57 00:45:30.179504  progress  35% (2MB)
   58 00:45:30.181308  progress  40% (2MB)
   59 00:45:30.182919  progress  45% (2MB)
   60 00:45:30.184527  progress  50% (3MB)
   61 00:45:30.186285  progress  55% (3MB)
   62 00:45:30.187899  progress  60% (3MB)
   63 00:45:30.189663  progress  65% (4MB)
   64 00:45:30.191275  progress  70% (4MB)
   65 00:45:30.192874  progress  75% (4MB)
   66 00:45:30.194639  progress  80% (5MB)
   67 00:45:30.196253  progress  85% (5MB)
   68 00:45:30.198066  progress  90% (5MB)
   69 00:45:30.199678  progress  95% (6MB)
   70 00:45:30.201349  progress 100% (6MB)
   71 00:45:30.201616  6MB downloaded in 0.04s (183.26MB/s)
   72 00:45:30.201769  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 00:45:30.202009  end: 1.2 download-retry (duration 00:00:00) [common]
   75 00:45:30.202099  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 00:45:30.202185  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 00:45:30.202291  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-517-g92709d8ae585/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 00:45:30.202358  saving as /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/modules/modules.tar
   79 00:45:30.202419  total size: 51972 (0MB)
   80 00:45:30.202482  Using unxz to decompress xz
   81 00:45:30.205748  progress  63% (0MB)
   82 00:45:30.206118  progress 100% (0MB)
   83 00:45:30.209372  0MB downloaded in 0.01s (7.14MB/s)
   84 00:45:30.209599  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 00:45:30.209858  end: 1.3 download-retry (duration 00:00:00) [common]
   87 00:45:30.209958  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   88 00:45:30.210054  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   89 00:45:30.210145  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 00:45:30.210240  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   91 00:45:30.210409  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4
   92 00:45:30.210518  makedir: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin
   93 00:45:30.210608  makedir: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/tests
   94 00:45:30.210692  makedir: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/results
   95 00:45:30.210795  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-add-keys
   96 00:45:30.210924  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-add-sources
   97 00:45:30.211040  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-background-process-start
   98 00:45:30.211151  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-background-process-stop
   99 00:45:30.211264  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-common-functions
  100 00:45:30.211375  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-echo-ipv4
  101 00:45:30.211488  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-install-packages
  102 00:45:30.211598  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-installed-packages
  103 00:45:30.211708  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-os-build
  104 00:45:30.211817  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-probe-channel
  105 00:45:30.211930  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-probe-ip
  106 00:45:30.212036  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-target-ip
  107 00:45:30.212143  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-target-mac
  108 00:45:30.212253  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-target-storage
  109 00:45:30.212363  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-case
  110 00:45:30.212481  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-event
  111 00:45:30.212595  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-feedback
  112 00:45:30.212709  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-raise
  113 00:45:30.212821  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-reference
  114 00:45:30.212933  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-runner
  115 00:45:30.213054  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-set
  116 00:45:30.213176  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-test-shell
  117 00:45:30.213290  Updating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-install-packages (oe)
  118 00:45:30.213406  Updating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/bin/lava-installed-packages (oe)
  119 00:45:30.213504  Creating /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/environment
  120 00:45:30.213594  LAVA metadata
  121 00:45:30.213665  - LAVA_JOB_ID=6887882
  122 00:45:30.213731  - LAVA_DISPATCHER_IP=192.168.201.1
  123 00:45:30.213838  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  124 00:45:30.213903  skipped lava-vland-overlay
  125 00:45:30.213979  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 00:45:30.214070  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  127 00:45:30.214134  skipped lava-multinode-overlay
  128 00:45:30.214209  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 00:45:30.214295  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  130 00:45:30.214371  Loading test definitions
  131 00:45:30.214471  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  132 00:45:30.214551  Using /lava-6887882 at stage 0
  133 00:45:30.214816  uuid=6887882_1.4.2.3.1 testdef=None
  134 00:45:30.214912  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 00:45:30.215002  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  136 00:45:30.215495  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 00:45:30.215725  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  139 00:45:30.216320  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 00:45:30.216568  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  142 00:45:30.217127  runner path: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/0/tests/0_dmesg test_uuid 6887882_1.4.2.3.1
  143 00:45:30.217281  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 00:45:30.217532  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  146 00:45:30.217608  Using /lava-6887882 at stage 1
  147 00:45:30.217860  uuid=6887882_1.4.2.3.5 testdef=None
  148 00:45:30.217953  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 00:45:30.218045  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  150 00:45:30.218500  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 00:45:30.218728  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  153 00:45:30.219312  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 00:45:30.219556  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  156 00:45:30.220126  runner path: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/1/tests/1_bootrr test_uuid 6887882_1.4.2.3.5
  157 00:45:30.220272  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 00:45:30.220486  Creating lava-test-runner.conf files
  160 00:45:30.220553  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/0 for stage 0
  161 00:45:30.220637  - 0_dmesg
  162 00:45:30.220710  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6887882/lava-overlay-wx00lmy4/lava-6887882/1 for stage 1
  163 00:45:30.220795  - 1_bootrr
  164 00:45:30.220886  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 00:45:30.220982  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  166 00:45:30.227164  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 00:45:30.227278  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  168 00:45:30.227373  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 00:45:30.227459  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 00:45:30.227549  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  171 00:45:30.412733  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 00:45:30.413073  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  173 00:45:30.413182  extracting modules file /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6887882/extract-overlay-ramdisk-bkmwpep2/ramdisk
  174 00:45:30.417344  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 00:45:30.417461  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  176 00:45:30.417551  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6887882/compress-overlay-tfo091rt/overlay-1.4.2.4.tar.gz to ramdisk
  177 00:45:30.417625  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6887882/compress-overlay-tfo091rt/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6887882/extract-overlay-ramdisk-bkmwpep2/ramdisk
  178 00:45:30.421486  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 00:45:30.421595  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  180 00:45:30.421690  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 00:45:30.421781  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  182 00:45:30.421858  Building ramdisk /var/lib/lava/dispatcher/tmp/6887882/extract-overlay-ramdisk-bkmwpep2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6887882/extract-overlay-ramdisk-bkmwpep2/ramdisk
  183 00:45:30.485127  >> 48008 blocks

  184 00:45:31.249419  rename /var/lib/lava/dispatcher/tmp/6887882/extract-overlay-ramdisk-bkmwpep2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/ramdisk/ramdisk.cpio.gz
  185 00:45:31.249876  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 00:45:31.250008  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  187 00:45:31.250112  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  188 00:45:31.250208  No mkimage arch provided, not using FIT.
  189 00:45:31.250297  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 00:45:31.250382  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 00:45:31.250480  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 00:45:31.250577  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  193 00:45:31.250661  No LXC device requested
  194 00:45:31.250747  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 00:45:31.250838  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  196 00:45:31.250921  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 00:45:31.250996  Checking files for TFTP limit of 4294967296 bytes.
  198 00:45:31.251381  end: 1 tftp-deploy (duration 00:00:01) [common]
  199 00:45:31.251487  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 00:45:31.251583  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 00:45:31.251723  substitutions:
  202 00:45:31.251805  - {DTB}: None
  203 00:45:31.251870  - {INITRD}: 6887882/tftp-deploy-zratjox_/ramdisk/ramdisk.cpio.gz
  204 00:45:31.251931  - {KERNEL}: 6887882/tftp-deploy-zratjox_/kernel/bzImage
  205 00:45:31.251989  - {LAVA_MAC}: None
  206 00:45:31.252044  - {PRESEED_CONFIG}: None
  207 00:45:31.252099  - {PRESEED_LOCAL}: None
  208 00:45:31.252153  - {RAMDISK}: 6887882/tftp-deploy-zratjox_/ramdisk/ramdisk.cpio.gz
  209 00:45:31.252208  - {ROOT_PART}: None
  210 00:45:31.252263  - {ROOT}: None
  211 00:45:31.252317  - {SERVER_IP}: 192.168.201.1
  212 00:45:31.252372  - {TEE}: None
  213 00:45:31.252425  Parsed boot commands:
  214 00:45:31.252478  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 00:45:31.252623  Parsed boot commands: tftpboot 192.168.201.1 6887882/tftp-deploy-zratjox_/kernel/bzImage 6887882/tftp-deploy-zratjox_/kernel/cmdline 6887882/tftp-deploy-zratjox_/ramdisk/ramdisk.cpio.gz
  216 00:45:31.252717  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 00:45:31.252830  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 00:45:31.252929  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 00:45:31.253045  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 00:45:31.253118  Not connected, no need to disconnect.
  221 00:45:31.253196  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 00:45:31.253281  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 00:45:31.253347  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  224 00:45:31.256088  Setting prompt string to ['lava-test: # ']
  225 00:45:31.256363  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 00:45:31.256465  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 00:45:31.256566  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 00:45:31.256658  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 00:45:31.256867  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  230 00:45:31.275717  >> Command sent successfully.

  231 00:45:31.277704  Returned 0 in 0 seconds
  232 00:45:31.378861  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 00:45:31.381373  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 00:45:31.381892  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 00:45:31.382329  Setting prompt string to 'Starting depthcharge on Helios...'
  237 00:45:31.382672  Changing prompt to 'Starting depthcharge on Helios...'
  238 00:45:31.383022  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  239 00:45:31.384128  [Enter `^Ec?' for help]
  240 00:45:38.392744  
  241 00:45:38.392912  
  242 00:45:38.403102  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  243 00:45:38.406090  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  244 00:45:38.412721  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  245 00:45:38.416294  CPU: AES supported, TXT NOT supported, VT supported
  246 00:45:38.422567  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  247 00:45:38.426311  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  248 00:45:38.432852  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  249 00:45:38.436058  VBOOT: Loading verstage.
  250 00:45:38.439274  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  251 00:45:38.445691  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  252 00:45:38.452828  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  253 00:45:38.452913  CBFS @ c08000 size 3f8000
  254 00:45:38.459134  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  255 00:45:38.462291  CBFS: Locating 'fallback/verstage'
  256 00:45:38.465915  CBFS: Found @ offset 10fb80 size 1072c
  257 00:45:38.470169  
  258 00:45:38.470254  
  259 00:45:38.479605  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  260 00:45:38.493900  Probing TPM: . done!
  261 00:45:38.497609  TPM ready after 0 ms
  262 00:45:38.500702  Connected to device vid:did:rid of 1ae0:0028:00
  263 00:45:38.510886  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  264 00:45:38.514418  Initialized TPM device CR50 revision 0
  265 00:45:38.550317  tlcl_send_startup: Startup return code is 0
  266 00:45:38.550406  TPM: setup succeeded
  267 00:45:38.562649  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  268 00:45:38.566243  Chrome EC: UHEPI supported
  269 00:45:38.569955  Phase 1
  270 00:45:38.573183  FMAP: area GBB found @ c05000 (12288 bytes)
  271 00:45:38.579472  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  272 00:45:38.579561  Phase 2
  273 00:45:38.583185  Phase 3
  274 00:45:38.586388  FMAP: area GBB found @ c05000 (12288 bytes)
  275 00:45:38.593041  VB2:vb2_report_dev_firmware() This is developer signed firmware
  276 00:45:38.599365  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  277 00:45:38.603061  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  278 00:45:38.609257  VB2:vb2_verify_keyblock() Checking keyblock signature...
  279 00:45:38.625151  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  280 00:45:38.628236  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  281 00:45:38.634740  VB2:vb2_verify_fw_preamble() Verifying preamble.
  282 00:45:38.639388  Phase 4
  283 00:45:38.642489  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
  284 00:45:38.649233  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  285 00:45:38.829082  VB2:vb2_rsa_verify_digest() Digest check failed!
  286 00:45:38.836720  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  287 00:45:38.837348  Saving nvdata
  288 00:45:38.839290  Reboot requested (10020007)
  289 00:45:38.842425  board_reset() called!
  290 00:45:38.842903  full_reset() called!
  291 00:45:43.360703  
  292 00:45:43.360899  
  293 00:45:43.370136  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  294 00:45:43.373236  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  295 00:45:43.380084  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  296 00:45:43.383249  CPU: AES supported, TXT NOT supported, VT supported
  297 00:45:43.390414  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  298 00:45:43.393241  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  299 00:45:43.400103  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  300 00:45:43.403328  VBOOT: Loading verstage.
  301 00:45:43.406554  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  302 00:45:43.413090  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  303 00:45:43.420165  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  304 00:45:43.420651  CBFS @ c08000 size 3f8000
  305 00:45:43.426637  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  306 00:45:43.430520  CBFS: Locating 'fallback/verstage'
  307 00:45:43.433436  CBFS: Found @ offset 10fb80 size 1072c
  308 00:45:43.437364  
  309 00:45:43.437714  
  310 00:45:43.447204  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  311 00:45:43.461421  Probing TPM: . done!
  312 00:45:43.465129  TPM ready after 0 ms
  313 00:45:43.468455  Connected to device vid:did:rid of 1ae0:0028:00
  314 00:45:43.478313  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  315 00:45:43.481999  Initialized TPM device CR50 revision 0
  316 00:45:43.517167  tlcl_send_startup: Startup return code is 0
  317 00:45:43.517321  TPM: setup succeeded
  318 00:45:43.530062  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  319 00:45:43.533596  Chrome EC: UHEPI supported
  320 00:45:43.537197  Phase 1
  321 00:45:43.540236  FMAP: area GBB found @ c05000 (12288 bytes)
  322 00:45:43.547534  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  323 00:45:43.553571  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  324 00:45:43.557207  Recovery requested (1009000e)
  325 00:45:43.563125  Saving nvdata
  326 00:45:43.568621  tlcl_extend: response is 0
  327 00:45:43.577837  tlcl_extend: response is 0
  328 00:45:43.584689  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  329 00:45:43.587901  CBFS @ c08000 size 3f8000
  330 00:45:43.594583  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  331 00:45:43.598079  CBFS: Locating 'fallback/romstage'
  332 00:45:43.601379  CBFS: Found @ offset 80 size 145fc
  333 00:45:43.604499  Accumulated console time in verstage 98 ms
  334 00:45:43.604690  
  335 00:45:43.604868  
  336 00:45:43.617942  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  337 00:45:43.624304  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  338 00:45:43.627849  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  339 00:45:43.630835  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  340 00:45:43.638267  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  341 00:45:43.640668  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  342 00:45:43.643883  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  343 00:45:43.647546  TCO_STS:   0000 0000
  344 00:45:43.650669  GEN_PMCON: e0015238 00000200
  345 00:45:43.653925  GBLRST_CAUSE: 00000000 00000000
  346 00:45:43.654008  prev_sleep_state 5
  347 00:45:43.657552  Boot Count incremented to 33286
  348 00:45:43.664197  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  349 00:45:43.667733  CBFS @ c08000 size 3f8000
  350 00:45:43.673952  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  351 00:45:43.674061  CBFS: Locating 'fspm.bin'
  352 00:45:43.680641  CBFS: Found @ offset 5ffc0 size 71000
  353 00:45:43.683782  Chrome EC: UHEPI supported
  354 00:45:43.690651  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  355 00:45:43.694363  Probing TPM:  done!
  356 00:45:43.701104  Connected to device vid:did:rid of 1ae0:0028:00
  357 00:45:43.711174  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  358 00:45:43.717443  Initialized TPM device CR50 revision 0
  359 00:45:43.726181  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  360 00:45:43.732696  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  361 00:45:43.736141  MRC cache found, size 1948
  362 00:45:43.739470  bootmode is set to: 2
  363 00:45:43.742781  PRMRR disabled by config.
  364 00:45:43.742862  SPD INDEX = 1
  365 00:45:43.749230  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  366 00:45:43.752711  CBFS @ c08000 size 3f8000
  367 00:45:43.759038  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  368 00:45:43.759121  CBFS: Locating 'spd.bin'
  369 00:45:43.762545  CBFS: Found @ offset 5fb80 size 400
  370 00:45:43.765656  SPD: module type is LPDDR3
  371 00:45:43.769222  SPD: module part is 
  372 00:45:43.775703  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  373 00:45:43.778704  SPD: device width 4 bits, bus width 8 bits
  374 00:45:43.782390  SPD: module size is 4096 MB (per channel)
  375 00:45:43.786003  memory slot: 0 configuration done.
  376 00:45:43.789078  memory slot: 2 configuration done.
  377 00:45:43.840301  CBMEM:
  378 00:45:43.843631  IMD: root @ 99fff000 254 entries.
  379 00:45:43.847183  IMD: root @ 99ffec00 62 entries.
  380 00:45:43.850409  External stage cache:
  381 00:45:43.853593  IMD: root @ 9abff000 254 entries.
  382 00:45:43.857192  IMD: root @ 9abfec00 62 entries.
  383 00:45:43.860178  Chrome EC: clear events_b mask to 0x0000000020004000
  384 00:45:43.876585  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  385 00:45:43.890099  tlcl_write: response is 0
  386 00:45:43.899036  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  387 00:45:43.905717  MRC: TPM MRC hash updated successfully.
  388 00:45:43.905805  2 DIMMs found
  389 00:45:43.908876  SMM Memory Map
  390 00:45:43.912012  SMRAM       : 0x9a000000 0x1000000
  391 00:45:43.915210   Subregion 0: 0x9a000000 0xa00000
  392 00:45:43.919370   Subregion 1: 0x9aa00000 0x200000
  393 00:45:43.921987   Subregion 2: 0x9ac00000 0x400000
  394 00:45:43.925619  top_of_ram = 0x9a000000
  395 00:45:43.928769  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  396 00:45:43.935122  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  397 00:45:43.938601  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  398 00:45:43.945218  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 00:45:43.948464  CBFS @ c08000 size 3f8000
  400 00:45:43.952122  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 00:45:43.955141  CBFS: Locating 'fallback/postcar'
  402 00:45:43.961962  CBFS: Found @ offset 107000 size 4b44
  403 00:45:43.965073  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  404 00:45:43.977995  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  405 00:45:43.981096  Processing 180 relocs. Offset value of 0x97c0c000
  406 00:45:43.989750  Accumulated console time in romstage 286 ms
  407 00:45:43.989840  
  408 00:45:43.989927  
  409 00:45:43.999664  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  410 00:45:44.005862  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  411 00:45:44.009487  CBFS @ c08000 size 3f8000
  412 00:45:44.012574  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  413 00:45:44.019473  CBFS: Locating 'fallback/ramstage'
  414 00:45:44.022682  CBFS: Found @ offset 43380 size 1b9e8
  415 00:45:44.029314  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  416 00:45:44.061306  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  417 00:45:44.064849  Processing 3976 relocs. Offset value of 0x98db0000
  418 00:45:44.071586  Accumulated console time in postcar 52 ms
  419 00:45:44.071675  
  420 00:45:44.071774  
  421 00:45:44.081522  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  422 00:45:44.087704  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  423 00:45:44.090952  WARNING: RO_VPD is uninitialized or empty.
  424 00:45:44.094612  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  425 00:45:44.101027  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  426 00:45:44.101123  Normal boot.
  427 00:45:44.107612  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  428 00:45:44.111155  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  429 00:45:44.114356  CBFS @ c08000 size 3f8000
  430 00:45:44.120679  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  431 00:45:44.124436  CBFS: Locating 'cpu_microcode_blob.bin'
  432 00:45:44.127412  CBFS: Found @ offset 14700 size 2ec00
  433 00:45:44.130841  microcode: sig=0x806ec pf=0x4 revision=0xc9
  434 00:45:44.133991  Skip microcode update
  435 00:45:44.140588  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  436 00:45:44.140681  CBFS @ c08000 size 3f8000
  437 00:45:44.147510  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  438 00:45:44.150382  CBFS: Locating 'fsps.bin'
  439 00:45:44.153908  CBFS: Found @ offset d1fc0 size 35000
  440 00:45:44.179665  Detected 4 core, 8 thread CPU.
  441 00:45:44.182795  Setting up SMI for CPU
  442 00:45:44.186368  IED base = 0x9ac00000
  443 00:45:44.186445  IED size = 0x00400000
  444 00:45:44.189507  Will perform SMM setup.
  445 00:45:44.196253  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  446 00:45:44.202723  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  447 00:45:44.209425  Processing 16 relocs. Offset value of 0x00030000
  448 00:45:44.209511  Attempting to start 7 APs
  449 00:45:44.215754  Waiting for 10ms after sending INIT.
  450 00:45:44.229548  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
  451 00:45:44.229640  done.
  452 00:45:44.232649  AP: slot 1 apic_id 2.
  453 00:45:44.236167  AP: slot 4 apic_id 3.
  454 00:45:44.239445  Waiting for 2nd SIPI to complete...done.
  455 00:45:44.242445  AP: slot 2 apic_id 4.
  456 00:45:44.242530  AP: slot 5 apic_id 5.
  457 00:45:44.245988  AP: slot 7 apic_id 6.
  458 00:45:44.249067  AP: slot 6 apic_id 7.
  459 00:45:44.255676  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  460 00:45:44.262380  Processing 13 relocs. Offset value of 0x00038000
  461 00:45:44.268832  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  462 00:45:44.272509  Installing SMM handler to 0x9a000000
  463 00:45:44.279013  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  464 00:45:44.285652  Processing 658 relocs. Offset value of 0x9a010000
  465 00:45:44.292324  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  466 00:45:44.295451  Processing 13 relocs. Offset value of 0x9a008000
  467 00:45:44.302112  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  468 00:45:44.308826  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  469 00:45:44.315596  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  470 00:45:44.318767  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  471 00:45:44.325617  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  472 00:45:44.332300  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  473 00:45:44.335142  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  474 00:45:44.342128  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  475 00:45:44.345970  Clearing SMI status registers
  476 00:45:44.349024  SMI_STS: PM1 
  477 00:45:44.349109  PM1_STS: PWRBTN 
  478 00:45:44.352048  TCO_STS: SECOND_TO 
  479 00:45:44.355418  New SMBASE 0x9a000000
  480 00:45:44.359460  In relocation handler: CPU 0
  481 00:45:44.362143  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  482 00:45:44.365754  Writing SMRR. base = 0x9a000006, mask=0xff000800
  483 00:45:44.368798  Relocation complete.
  484 00:45:44.371989  New SMBASE 0x99fff400
  485 00:45:44.375611  In relocation handler: CPU 3
  486 00:45:44.378682  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  487 00:45:44.382402  Writing SMRR. base = 0x9a000006, mask=0xff000800
  488 00:45:44.385321  Relocation complete.
  489 00:45:44.388895  New SMBASE 0x99fff800
  490 00:45:44.389003  In relocation handler: CPU 2
  491 00:45:44.395612  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  492 00:45:44.398644  Writing SMRR. base = 0x9a000006, mask=0xff000800
  493 00:45:44.401868  Relocation complete.
  494 00:45:44.401954  New SMBASE 0x99ffec00
  495 00:45:44.405623  In relocation handler: CPU 5
  496 00:45:44.412357  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  497 00:45:44.415509  Writing SMRR. base = 0x9a000006, mask=0xff000800
  498 00:45:44.418647  Relocation complete.
  499 00:45:44.418732  New SMBASE 0x99ffe800
  500 00:45:44.422357  In relocation handler: CPU 6
  501 00:45:44.428771  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  502 00:45:44.432231  Writing SMRR. base = 0x9a000006, mask=0xff000800
  503 00:45:44.435471  Relocation complete.
  504 00:45:44.435556  New SMBASE 0x99ffe400
  505 00:45:44.439022  In relocation handler: CPU 7
  506 00:45:44.442039  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  507 00:45:44.448568  Writing SMRR. base = 0x9a000006, mask=0xff000800
  508 00:45:44.451974  Relocation complete.
  509 00:45:44.452058  New SMBASE 0x99fff000
  510 00:45:44.455649  In relocation handler: CPU 4
  511 00:45:44.459088  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  512 00:45:44.465504  Writing SMRR. base = 0x9a000006, mask=0xff000800
  513 00:45:44.465590  Relocation complete.
  514 00:45:44.468641  New SMBASE 0x99fffc00
  515 00:45:44.471773  In relocation handler: CPU 1
  516 00:45:44.475233  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  517 00:45:44.481926  Writing SMRR. base = 0x9a000006, mask=0xff000800
  518 00:45:44.482012  Relocation complete.
  519 00:45:44.485239  Initializing CPU #0
  520 00:45:44.488628  CPU: vendor Intel device 806ec
  521 00:45:44.491613  CPU: family 06, model 8e, stepping 0c
  522 00:45:44.495138  Clearing out pending MCEs
  523 00:45:44.498269  Setting up local APIC...
  524 00:45:44.498353   apic_id: 0x00 done.
  525 00:45:44.502005  Turbo is available but hidden
  526 00:45:44.505053  Turbo is available and visible
  527 00:45:44.508213  VMX status: enabled
  528 00:45:44.511802  IA32_FEATURE_CONTROL status: locked
  529 00:45:44.514936  Skip microcode update
  530 00:45:44.515020  CPU #0 initialized
  531 00:45:44.518510  Initializing CPU #3
  532 00:45:44.518595  Initializing CPU #2
  533 00:45:44.521677  Initializing CPU #5
  534 00:45:44.525145  CPU: vendor Intel device 806ec
  535 00:45:44.528325  CPU: family 06, model 8e, stepping 0c
  536 00:45:44.531841  CPU: vendor Intel device 806ec
  537 00:45:44.534971  CPU: family 06, model 8e, stepping 0c
  538 00:45:44.538465  Clearing out pending MCEs
  539 00:45:44.541479  CPU: vendor Intel device 806ec
  540 00:45:44.545133  CPU: family 06, model 8e, stepping 0c
  541 00:45:44.548056  Clearing out pending MCEs
  542 00:45:44.551489  Initializing CPU #4
  543 00:45:44.551576  Initializing CPU #1
  544 00:45:44.555039  CPU: vendor Intel device 806ec
  545 00:45:44.558126  CPU: family 06, model 8e, stepping 0c
  546 00:45:44.561290  CPU: vendor Intel device 806ec
  547 00:45:44.564996  CPU: family 06, model 8e, stepping 0c
  548 00:45:44.568076  Clearing out pending MCEs
  549 00:45:44.571120  Clearing out pending MCEs
  550 00:45:44.574785  Setting up local APIC...
  551 00:45:44.574876  Setting up local APIC...
  552 00:45:44.577939  Initializing CPU #7
  553 00:45:44.581616  Initializing CPU #6
  554 00:45:44.584653  CPU: vendor Intel device 806ec
  555 00:45:44.587775  CPU: family 06, model 8e, stepping 0c
  556 00:45:44.591460  Setting up local APIC...
  557 00:45:44.591544   apic_id: 0x01 done.
  558 00:45:44.594382   apic_id: 0x05 done.
  559 00:45:44.597720  Clearing out pending MCEs
  560 00:45:44.597804  VMX status: enabled
  561 00:45:44.600996  Setting up local APIC...
  562 00:45:44.604619  Clearing out pending MCEs
  563 00:45:44.607810  CPU: vendor Intel device 806ec
  564 00:45:44.610987  CPU: family 06, model 8e, stepping 0c
  565 00:45:44.614533  Setting up local APIC...
  566 00:45:44.614617   apic_id: 0x03 done.
  567 00:45:44.617594  Setting up local APIC...
  568 00:45:44.621119  Clearing out pending MCEs
  569 00:45:44.624429   apic_id: 0x06 done.
  570 00:45:44.624513  Setting up local APIC...
  571 00:45:44.627769   apic_id: 0x04 done.
  572 00:45:44.631202  IA32_FEATURE_CONTROL status: locked
  573 00:45:44.634331  VMX status: enabled
  574 00:45:44.634419  Skip microcode update
  575 00:45:44.637735  IA32_FEATURE_CONTROL status: locked
  576 00:45:44.640888  CPU #5 initialized
  577 00:45:44.644434  Skip microcode update
  578 00:45:44.644524   apic_id: 0x07 done.
  579 00:45:44.647635  VMX status: enabled
  580 00:45:44.650953  VMX status: enabled
  581 00:45:44.651039   apic_id: 0x02 done.
  582 00:45:44.653951  IA32_FEATURE_CONTROL status: locked
  583 00:45:44.657544  VMX status: enabled
  584 00:45:44.660907  Skip microcode update
  585 00:45:44.664067  IA32_FEATURE_CONTROL status: locked
  586 00:45:44.664153  CPU #4 initialized
  587 00:45:44.667709  Skip microcode update
  588 00:45:44.667808  CPU #2 initialized
  589 00:45:44.670866  VMX status: enabled
  590 00:45:44.673989  CPU #1 initialized
  591 00:45:44.677520  IA32_FEATURE_CONTROL status: locked
  592 00:45:44.677606  VMX status: enabled
  593 00:45:44.681122  Skip microcode update
  594 00:45:44.684171  IA32_FEATURE_CONTROL status: locked
  595 00:45:44.687287  IA32_FEATURE_CONTROL status: locked
  596 00:45:44.690676  Skip microcode update
  597 00:45:44.694093  Skip microcode update
  598 00:45:44.694177  CPU #3 initialized
  599 00:45:44.697185  CPU #6 initialized
  600 00:45:44.697268  CPU #7 initialized
  601 00:45:44.703954  bsp_do_flight_plan done after 461 msecs.
  602 00:45:44.707112  CPU: frequency set to 4200 MHz
  603 00:45:44.707197  Enabling SMIs.
  604 00:45:44.707262  Locking SMM.
  605 00:45:44.723804  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  606 00:45:44.726982  CBFS @ c08000 size 3f8000
  607 00:45:44.733733  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  608 00:45:44.733818  CBFS: Locating 'vbt.bin'
  609 00:45:44.737806  CBFS: Found @ offset 5f5c0 size 499
  610 00:45:44.743427  Found a VBT of 4608 bytes after decompression
  611 00:45:44.928554  Display FSP Version Info HOB
  612 00:45:44.932068  Reference Code - CPU = 9.0.1e.30
  613 00:45:44.935212  uCode Version = 0.0.0.ca
  614 00:45:44.938845  TXT ACM version = ff.ff.ff.ffff
  615 00:45:44.942197  Display FSP Version Info HOB
  616 00:45:44.945213  Reference Code - ME = 9.0.1e.30
  617 00:45:44.948747  MEBx version = 0.0.0.0
  618 00:45:44.951797  ME Firmware Version = Consumer SKU
  619 00:45:44.955311  Display FSP Version Info HOB
  620 00:45:44.958388  Reference Code - CML PCH = 9.0.1e.30
  621 00:45:44.961825  PCH-CRID Status = Disabled
  622 00:45:44.964846  PCH-CRID Original Value = ff.ff.ff.ffff
  623 00:45:44.968760  PCH-CRID New Value = ff.ff.ff.ffff
  624 00:45:44.971438  OPROM - RST - RAID = ff.ff.ff.ffff
  625 00:45:44.975171  ChipsetInit Base Version = ff.ff.ff.ffff
  626 00:45:44.978413  ChipsetInit Oem Version = ff.ff.ff.ffff
  627 00:45:44.981352  Display FSP Version Info HOB
  628 00:45:44.987960  Reference Code - SA - System Agent = 9.0.1e.30
  629 00:45:44.991526  Reference Code - MRC = 0.7.1.6c
  630 00:45:44.995452  SA - PCIe Version = 9.0.1e.30
  631 00:45:44.995534  SA-CRID Status = Disabled
  632 00:45:44.997896  SA-CRID Original Value = 0.0.0.c
  633 00:45:45.001647  SA-CRID New Value = 0.0.0.c
  634 00:45:45.004732  OPROM - VBIOS = ff.ff.ff.ffff
  635 00:45:45.007991  RTC Init
  636 00:45:45.011575  Set power on after power failure.
  637 00:45:45.011650  Disabling Deep S3
  638 00:45:45.014786  Disabling Deep S3
  639 00:45:45.014861  Disabling Deep S4
  640 00:45:45.017893  Disabling Deep S4
  641 00:45:45.021089  Disabling Deep S5
  642 00:45:45.021179  Disabling Deep S5
  643 00:45:45.027730  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
  644 00:45:45.030862  Enumerating buses...
  645 00:45:45.034682  Show all devs... Before device enumeration.
  646 00:45:45.037965  Root Device: enabled 1
  647 00:45:45.038042  CPU_CLUSTER: 0: enabled 1
  648 00:45:45.041020  DOMAIN: 0000: enabled 1
  649 00:45:45.044592  APIC: 00: enabled 1
  650 00:45:45.044670  PCI: 00:00.0: enabled 1
  651 00:45:45.048136  PCI: 00:02.0: enabled 1
  652 00:45:45.051172  PCI: 00:04.0: enabled 0
  653 00:45:45.054669  PCI: 00:05.0: enabled 0
  654 00:45:45.054764  PCI: 00:12.0: enabled 1
  655 00:45:45.058028  PCI: 00:12.5: enabled 0
  656 00:45:45.061062  PCI: 00:12.6: enabled 0
  657 00:45:45.064565  PCI: 00:14.0: enabled 1
  658 00:45:45.064642  PCI: 00:14.1: enabled 0
  659 00:45:45.067581  PCI: 00:14.3: enabled 1
  660 00:45:45.071558  PCI: 00:14.5: enabled 0
  661 00:45:45.074384  PCI: 00:15.0: enabled 1
  662 00:45:45.074467  PCI: 00:15.1: enabled 1
  663 00:45:45.077543  PCI: 00:15.2: enabled 0
  664 00:45:45.081111  PCI: 00:15.3: enabled 0
  665 00:45:45.081188  PCI: 00:16.0: enabled 1
  666 00:45:45.084376  PCI: 00:16.1: enabled 0
  667 00:45:45.087632  PCI: 00:16.2: enabled 0
  668 00:45:45.090763  PCI: 00:16.3: enabled 0
  669 00:45:45.090855  PCI: 00:16.4: enabled 0
  670 00:45:45.094215  PCI: 00:16.5: enabled 0
  671 00:45:45.097342  PCI: 00:17.0: enabled 1
  672 00:45:45.100431  PCI: 00:19.0: enabled 1
  673 00:45:45.100518  PCI: 00:19.1: enabled 0
  674 00:45:45.104042  PCI: 00:19.2: enabled 0
  675 00:45:45.107096  PCI: 00:1a.0: enabled 0
  676 00:45:45.110267  PCI: 00:1c.0: enabled 0
  677 00:45:45.110345  PCI: 00:1c.1: enabled 0
  678 00:45:45.114096  PCI: 00:1c.2: enabled 0
  679 00:45:45.117058  PCI: 00:1c.3: enabled 0
  680 00:45:45.120206  PCI: 00:1c.4: enabled 0
  681 00:45:45.120283  PCI: 00:1c.5: enabled 0
  682 00:45:45.123900  PCI: 00:1c.6: enabled 0
  683 00:45:45.127049  PCI: 00:1c.7: enabled 0
  684 00:45:45.130166  PCI: 00:1d.0: enabled 1
  685 00:45:45.130242  PCI: 00:1d.1: enabled 0
  686 00:45:45.133447  PCI: 00:1d.2: enabled 0
  687 00:45:45.136604  PCI: 00:1d.3: enabled 0
  688 00:45:45.136689  PCI: 00:1d.4: enabled 0
  689 00:45:45.140390  PCI: 00:1d.5: enabled 1
  690 00:45:45.143655  PCI: 00:1e.0: enabled 1
  691 00:45:45.146603  PCI: 00:1e.1: enabled 0
  692 00:45:45.146686  PCI: 00:1e.2: enabled 1
  693 00:45:45.150488  PCI: 00:1e.3: enabled 1
  694 00:45:45.153636  PCI: 00:1f.0: enabled 1
  695 00:45:45.157264  PCI: 00:1f.1: enabled 1
  696 00:45:45.157349  PCI: 00:1f.2: enabled 1
  697 00:45:45.160334  PCI: 00:1f.3: enabled 1
  698 00:45:45.163398  PCI: 00:1f.4: enabled 1
  699 00:45:45.166789  PCI: 00:1f.5: enabled 1
  700 00:45:45.166871  PCI: 00:1f.6: enabled 0
  701 00:45:45.170373  USB0 port 0: enabled 1
  702 00:45:45.173389  I2C: 00:15: enabled 1
  703 00:45:45.173466  I2C: 00:5d: enabled 1
  704 00:45:45.177038  GENERIC: 0.0: enabled 1
  705 00:45:45.180296  I2C: 00:1a: enabled 1
  706 00:45:45.180372  I2C: 00:38: enabled 1
  707 00:45:45.183218  I2C: 00:39: enabled 1
  708 00:45:45.186707  I2C: 00:3a: enabled 1
  709 00:45:45.186786  I2C: 00:3b: enabled 1
  710 00:45:45.189988  PCI: 00:00.0: enabled 1
  711 00:45:45.193535  SPI: 00: enabled 1
  712 00:45:45.193611  SPI: 01: enabled 1
  713 00:45:45.196579  PNP: 0c09.0: enabled 1
  714 00:45:45.199781  USB2 port 0: enabled 1
  715 00:45:45.199857  USB2 port 1: enabled 1
  716 00:45:45.203128  USB2 port 2: enabled 0
  717 00:45:45.206434  USB2 port 3: enabled 0
  718 00:45:45.210003  USB2 port 5: enabled 0
  719 00:45:45.210078  USB2 port 6: enabled 1
  720 00:45:45.213160  USB2 port 9: enabled 1
  721 00:45:45.216345  USB3 port 0: enabled 1
  722 00:45:45.216418  USB3 port 1: enabled 1
  723 00:45:45.219977  USB3 port 2: enabled 1
  724 00:45:45.223083  USB3 port 3: enabled 1
  725 00:45:45.226222  USB3 port 4: enabled 0
  726 00:45:45.226310  APIC: 02: enabled 1
  727 00:45:45.229701  APIC: 04: enabled 1
  728 00:45:45.229780  APIC: 01: enabled 1
  729 00:45:45.232780  APIC: 03: enabled 1
  730 00:45:45.236479  APIC: 05: enabled 1
  731 00:45:45.236557  APIC: 07: enabled 1
  732 00:45:45.239579  APIC: 06: enabled 1
  733 00:45:45.243140  Compare with tree...
  734 00:45:45.243226  Root Device: enabled 1
  735 00:45:45.246481   CPU_CLUSTER: 0: enabled 1
  736 00:45:45.249408    APIC: 00: enabled 1
  737 00:45:45.249493    APIC: 02: enabled 1
  738 00:45:45.252902    APIC: 04: enabled 1
  739 00:45:45.255951    APIC: 01: enabled 1
  740 00:45:45.256049    APIC: 03: enabled 1
  741 00:45:45.259438    APIC: 05: enabled 1
  742 00:45:45.262951    APIC: 07: enabled 1
  743 00:45:45.263027    APIC: 06: enabled 1
  744 00:45:45.265927   DOMAIN: 0000: enabled 1
  745 00:45:45.269522    PCI: 00:00.0: enabled 1
  746 00:45:45.272563    PCI: 00:02.0: enabled 1
  747 00:45:45.276124    PCI: 00:04.0: enabled 0
  748 00:45:45.276208    PCI: 00:05.0: enabled 0
  749 00:45:45.279205    PCI: 00:12.0: enabled 1
  750 00:45:45.282416    PCI: 00:12.5: enabled 0
  751 00:45:45.286084    PCI: 00:12.6: enabled 0
  752 00:45:45.289089    PCI: 00:14.0: enabled 1
  753 00:45:45.289166     USB0 port 0: enabled 1
  754 00:45:45.292688      USB2 port 0: enabled 1
  755 00:45:45.295928      USB2 port 1: enabled 1
  756 00:45:45.299084      USB2 port 2: enabled 0
  757 00:45:45.302756      USB2 port 3: enabled 0
  758 00:45:45.302836      USB2 port 5: enabled 0
  759 00:45:45.305648      USB2 port 6: enabled 1
  760 00:45:45.309136      USB2 port 9: enabled 1
  761 00:45:45.312199      USB3 port 0: enabled 1
  762 00:45:45.315978      USB3 port 1: enabled 1
  763 00:45:45.319146      USB3 port 2: enabled 1
  764 00:45:45.319241      USB3 port 3: enabled 1
  765 00:45:45.322305      USB3 port 4: enabled 0
  766 00:45:45.325488    PCI: 00:14.1: enabled 0
  767 00:45:45.329143    PCI: 00:14.3: enabled 1
  768 00:45:45.332253    PCI: 00:14.5: enabled 0
  769 00:45:45.332332    PCI: 00:15.0: enabled 1
  770 00:45:45.335357     I2C: 00:15: enabled 1
  771 00:45:45.339049    PCI: 00:15.1: enabled 1
  772 00:45:45.342231     I2C: 00:5d: enabled 1
  773 00:45:45.345329     GENERIC: 0.0: enabled 1
  774 00:45:45.345400    PCI: 00:15.2: enabled 0
  775 00:45:45.349039    PCI: 00:15.3: enabled 0
  776 00:45:45.351978    PCI: 00:16.0: enabled 1
  777 00:45:45.355433    PCI: 00:16.1: enabled 0
  778 00:45:45.355506    PCI: 00:16.2: enabled 0
  779 00:45:45.358979    PCI: 00:16.3: enabled 0
  780 00:45:45.362492    PCI: 00:16.4: enabled 0
  781 00:45:45.365496    PCI: 00:16.5: enabled 0
  782 00:45:45.369019    PCI: 00:17.0: enabled 1
  783 00:45:45.369101    PCI: 00:19.0: enabled 1
  784 00:45:45.372037     I2C: 00:1a: enabled 1
  785 00:45:45.375438     I2C: 00:38: enabled 1
  786 00:45:45.379052     I2C: 00:39: enabled 1
  787 00:45:45.382182     I2C: 00:3a: enabled 1
  788 00:45:45.382265     I2C: 00:3b: enabled 1
  789 00:45:45.385300    PCI: 00:19.1: enabled 0
  790 00:45:45.388841    PCI: 00:19.2: enabled 0
  791 00:45:45.391998    PCI: 00:1a.0: enabled 0
  792 00:45:45.392080    PCI: 00:1c.0: enabled 0
  793 00:45:45.395147    PCI: 00:1c.1: enabled 0
  794 00:45:45.398743    PCI: 00:1c.2: enabled 0
  795 00:45:45.401773    PCI: 00:1c.3: enabled 0
  796 00:45:45.405213    PCI: 00:1c.4: enabled 0
  797 00:45:45.405297    PCI: 00:1c.5: enabled 0
  798 00:45:45.408733    PCI: 00:1c.6: enabled 0
  799 00:45:45.411808    PCI: 00:1c.7: enabled 0
  800 00:45:45.415288    PCI: 00:1d.0: enabled 1
  801 00:45:45.418451    PCI: 00:1d.1: enabled 0
  802 00:45:45.418535    PCI: 00:1d.2: enabled 0
  803 00:45:45.422125    PCI: 00:1d.3: enabled 0
  804 00:45:45.425242    PCI: 00:1d.4: enabled 0
  805 00:45:45.428403    PCI: 00:1d.5: enabled 1
  806 00:45:45.431494     PCI: 00:00.0: enabled 1
  807 00:45:45.431578    PCI: 00:1e.0: enabled 1
  808 00:45:45.434984    PCI: 00:1e.1: enabled 0
  809 00:45:45.438667    PCI: 00:1e.2: enabled 1
  810 00:45:45.441879     SPI: 00: enabled 1
  811 00:45:45.441964    PCI: 00:1e.3: enabled 1
  812 00:45:45.445069     SPI: 01: enabled 1
  813 00:45:45.448257    PCI: 00:1f.0: enabled 1
  814 00:45:45.451876     PNP: 0c09.0: enabled 1
  815 00:45:45.451959    PCI: 00:1f.1: enabled 1
  816 00:45:45.454860    PCI: 00:1f.2: enabled 1
  817 00:45:45.458605    PCI: 00:1f.3: enabled 1
  818 00:45:45.461601    PCI: 00:1f.4: enabled 1
  819 00:45:45.464784    PCI: 00:1f.5: enabled 1
  820 00:45:45.468226    PCI: 00:1f.6: enabled 0
  821 00:45:45.468310  Root Device scanning...
  822 00:45:45.471661  scan_static_bus for Root Device
  823 00:45:45.474873  CPU_CLUSTER: 0 enabled
  824 00:45:45.477987  DOMAIN: 0000 enabled
  825 00:45:45.478071  DOMAIN: 0000 scanning...
  826 00:45:45.481556  PCI: pci_scan_bus for bus 00
  827 00:45:45.484680  PCI: 00:00.0 [8086/0000] ops
  828 00:45:45.488369  PCI: 00:00.0 [8086/9b61] enabled
  829 00:45:45.491402  PCI: 00:02.0 [8086/0000] bus ops
  830 00:45:45.494517  PCI: 00:02.0 [8086/9b41] enabled
  831 00:45:45.498126  PCI: 00:04.0 [8086/1903] disabled
  832 00:45:45.501210  PCI: 00:08.0 [8086/1911] enabled
  833 00:45:45.504323  PCI: 00:12.0 [8086/02f9] enabled
  834 00:45:45.507925  PCI: 00:14.0 [8086/0000] bus ops
  835 00:45:45.511196  PCI: 00:14.0 [8086/02ed] enabled
  836 00:45:45.514310  PCI: 00:14.2 [8086/02ef] enabled
  837 00:45:45.517998  PCI: 00:14.3 [8086/02f0] enabled
  838 00:45:45.521108  PCI: 00:15.0 [8086/0000] bus ops
  839 00:45:45.524203  PCI: 00:15.0 [8086/02e8] enabled
  840 00:45:45.527907  PCI: 00:15.1 [8086/0000] bus ops
  841 00:45:45.531063  PCI: 00:15.1 [8086/02e9] enabled
  842 00:45:45.534043  PCI: 00:16.0 [8086/0000] ops
  843 00:45:45.537707  PCI: 00:16.0 [8086/02e0] enabled
  844 00:45:45.540820  PCI: 00:17.0 [8086/0000] ops
  845 00:45:45.544555  PCI: 00:17.0 [8086/02d3] enabled
  846 00:45:45.547723  PCI: 00:19.0 [8086/0000] bus ops
  847 00:45:45.550834  PCI: 00:19.0 [8086/02c5] enabled
  848 00:45:45.554689  PCI: 00:1d.0 [8086/0000] bus ops
  849 00:45:45.557520  PCI: 00:1d.0 [8086/02b0] enabled
  850 00:45:45.564101  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  851 00:45:45.567053  PCI: 00:1e.0 [8086/0000] ops
  852 00:45:45.570566  PCI: 00:1e.0 [8086/02a8] enabled
  853 00:45:45.574145  PCI: 00:1e.2 [8086/0000] bus ops
  854 00:45:45.577183  PCI: 00:1e.2 [8086/02aa] enabled
  855 00:45:45.580797  PCI: 00:1e.3 [8086/0000] bus ops
  856 00:45:45.583890  PCI: 00:1e.3 [8086/02ab] enabled
  857 00:45:45.587485  PCI: 00:1f.0 [8086/0000] bus ops
  858 00:45:45.590553  PCI: 00:1f.0 [8086/0284] enabled
  859 00:45:45.597041  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  860 00:45:45.600231  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  861 00:45:45.603755  PCI: 00:1f.3 [8086/0000] bus ops
  862 00:45:45.606855  PCI: 00:1f.3 [8086/02c8] enabled
  863 00:45:45.610209  PCI: 00:1f.4 [8086/0000] bus ops
  864 00:45:45.613800  PCI: 00:1f.4 [8086/02a3] enabled
  865 00:45:45.617094  PCI: 00:1f.5 [8086/0000] bus ops
  866 00:45:45.620480  PCI: 00:1f.5 [8086/02a4] enabled
  867 00:45:45.623521  PCI: Leftover static devices:
  868 00:45:45.626675  PCI: 00:05.0
  869 00:45:45.626760  PCI: 00:12.5
  870 00:45:45.630429  PCI: 00:12.6
  871 00:45:45.630514  PCI: 00:14.1
  872 00:45:45.630581  PCI: 00:14.5
  873 00:45:45.633577  PCI: 00:15.2
  874 00:45:45.633661  PCI: 00:15.3
  875 00:45:45.636569  PCI: 00:16.1
  876 00:45:45.636653  PCI: 00:16.2
  877 00:45:45.636719  PCI: 00:16.3
  878 00:45:45.640287  PCI: 00:16.4
  879 00:45:45.640371  PCI: 00:16.5
  880 00:45:45.643511  PCI: 00:19.1
  881 00:45:45.643594  PCI: 00:19.2
  882 00:45:45.643661  PCI: 00:1a.0
  883 00:45:45.646588  PCI: 00:1c.0
  884 00:45:45.646671  PCI: 00:1c.1
  885 00:45:45.650230  PCI: 00:1c.2
  886 00:45:45.650315  PCI: 00:1c.3
  887 00:45:45.653495  PCI: 00:1c.4
  888 00:45:45.653580  PCI: 00:1c.5
  889 00:45:45.653646  PCI: 00:1c.6
  890 00:45:45.656960  PCI: 00:1c.7
  891 00:45:45.657045  PCI: 00:1d.1
  892 00:45:45.659990  PCI: 00:1d.2
  893 00:45:45.660074  PCI: 00:1d.3
  894 00:45:45.660140  PCI: 00:1d.4
  895 00:45:45.663614  PCI: 00:1d.5
  896 00:45:45.663701  PCI: 00:1e.1
  897 00:45:45.666701  PCI: 00:1f.1
  898 00:45:45.666785  PCI: 00:1f.2
  899 00:45:45.666851  PCI: 00:1f.6
  900 00:45:45.669849  PCI: Check your devicetree.cb.
  901 00:45:45.673270  PCI: 00:02.0 scanning...
  902 00:45:45.676344  scan_generic_bus for PCI: 00:02.0
  903 00:45:45.679958  scan_generic_bus for PCI: 00:02.0 done
  904 00:45:45.687090  scan_bus: scanning of bus PCI: 00:02.0 took 10205 usecs
  905 00:45:45.689759  PCI: 00:14.0 scanning...
  906 00:45:45.692927  scan_static_bus for PCI: 00:14.0
  907 00:45:45.696654  USB0 port 0 enabled
  908 00:45:45.696730  USB0 port 0 scanning...
  909 00:45:45.699500  scan_static_bus for USB0 port 0
  910 00:45:45.702979  USB2 port 0 enabled
  911 00:45:45.706111  USB2 port 1 enabled
  912 00:45:45.706194  USB2 port 2 disabled
  913 00:45:45.709551  USB2 port 3 disabled
  914 00:45:45.712676  USB2 port 5 disabled
  915 00:45:45.712749  USB2 port 6 enabled
  916 00:45:45.716389  USB2 port 9 enabled
  917 00:45:45.716464  USB3 port 0 enabled
  918 00:45:45.719447  USB3 port 1 enabled
  919 00:45:45.723010  USB3 port 2 enabled
  920 00:45:45.723085  USB3 port 3 enabled
  921 00:45:45.726191  USB3 port 4 disabled
  922 00:45:45.729370  USB2 port 0 scanning...
  923 00:45:45.733056  scan_static_bus for USB2 port 0
  924 00:45:45.736181  scan_static_bus for USB2 port 0 done
  925 00:45:45.739317  scan_bus: scanning of bus USB2 port 0 took 9712 usecs
  926 00:45:45.742947  USB2 port 1 scanning...
  927 00:45:45.746100  scan_static_bus for USB2 port 1
  928 00:45:45.749308  scan_static_bus for USB2 port 1 done
  929 00:45:45.755799  scan_bus: scanning of bus USB2 port 1 took 9713 usecs
  930 00:45:45.759448  USB2 port 6 scanning...
  931 00:45:45.762476  scan_static_bus for USB2 port 6
  932 00:45:45.766121  scan_static_bus for USB2 port 6 done
  933 00:45:45.772417  scan_bus: scanning of bus USB2 port 6 took 9708 usecs
  934 00:45:45.772507  USB2 port 9 scanning...
  935 00:45:45.775901  scan_static_bus for USB2 port 9
  936 00:45:45.779472  scan_static_bus for USB2 port 9 done
  937 00:45:45.786137  scan_bus: scanning of bus USB2 port 9 took 9705 usecs
  938 00:45:45.789223  USB3 port 0 scanning...
  939 00:45:45.792515  scan_static_bus for USB3 port 0
  940 00:45:45.795492  scan_static_bus for USB3 port 0 done
  941 00:45:45.802567  scan_bus: scanning of bus USB3 port 0 took 9714 usecs
  942 00:45:45.802647  USB3 port 1 scanning...
  943 00:45:45.805503  scan_static_bus for USB3 port 1
  944 00:45:45.812622  scan_static_bus for USB3 port 1 done
  945 00:45:45.815643  scan_bus: scanning of bus USB3 port 1 took 9711 usecs
  946 00:45:45.818828  USB3 port 2 scanning...
  947 00:45:45.822037  scan_static_bus for USB3 port 2
  948 00:45:45.825625  scan_static_bus for USB3 port 2 done
  949 00:45:45.832037  scan_bus: scanning of bus USB3 port 2 took 9711 usecs
  950 00:45:45.832115  USB3 port 3 scanning...
  951 00:45:45.835758  scan_static_bus for USB3 port 3
  952 00:45:45.842432  scan_static_bus for USB3 port 3 done
  953 00:45:45.845546  scan_bus: scanning of bus USB3 port 3 took 9707 usecs
  954 00:45:45.848636  scan_static_bus for USB0 port 0 done
  955 00:45:45.855293  scan_bus: scanning of bus USB0 port 0 took 155456 usecs
  956 00:45:45.858976  scan_static_bus for PCI: 00:14.0 done
  957 00:45:45.865156  scan_bus: scanning of bus PCI: 00:14.0 took 173071 usecs
  958 00:45:45.868679  PCI: 00:15.0 scanning...
  959 00:45:45.872194  scan_generic_bus for PCI: 00:15.0
  960 00:45:45.875340  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
  961 00:45:45.878480  scan_generic_bus for PCI: 00:15.0 done
  962 00:45:45.885245  scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
  963 00:45:45.888352  PCI: 00:15.1 scanning...
  964 00:45:45.891971  scan_generic_bus for PCI: 00:15.1
  965 00:45:45.895170  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
  966 00:45:45.898688  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
  967 00:45:45.901587  scan_generic_bus for PCI: 00:15.1 done
  968 00:45:45.908352  scan_bus: scanning of bus PCI: 00:15.1 took 18620 usecs
  969 00:45:45.911952  PCI: 00:19.0 scanning...
  970 00:45:45.914986  scan_generic_bus for PCI: 00:19.0
  971 00:45:45.918335  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
  972 00:45:45.921905  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
  973 00:45:45.928569  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
  974 00:45:45.931796  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
  975 00:45:45.934912  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
  976 00:45:45.938599  scan_generic_bus for PCI: 00:19.0 done
  977 00:45:45.944816  scan_bus: scanning of bus PCI: 00:19.0 took 30753 usecs
  978 00:45:45.948336  PCI: 00:1d.0 scanning...
  979 00:45:45.951540  do_pci_scan_bridge for PCI: 00:1d.0
  980 00:45:45.954713  PCI: pci_scan_bus for bus 01
  981 00:45:45.958244  PCI: 01:00.0 [1c5c/1327] enabled
  982 00:45:45.961514  Enabling Common Clock Configuration
  983 00:45:45.964866  L1 Sub-State supported from root port 29
  984 00:45:45.968507  L1 Sub-State Support = 0xf
  985 00:45:45.971402  CommonModeRestoreTime = 0x28
  986 00:45:45.975160  Power On Value = 0x16, Power On Scale = 0x0
  987 00:45:45.978285  ASPM: Enabled L1
  988 00:45:45.981608  scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
  989 00:45:45.984693  PCI: 00:1e.2 scanning...
  990 00:45:45.988149  scan_generic_bus for PCI: 00:1e.2
  991 00:45:45.991212  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
  992 00:45:45.997989  scan_generic_bus for PCI: 00:1e.2 done
  993 00:45:46.001608  scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
  994 00:45:46.004627  PCI: 00:1e.3 scanning...
  995 00:45:46.008263  scan_generic_bus for PCI: 00:1e.3
  996 00:45:46.011424  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
  997 00:45:46.018360  scan_generic_bus for PCI: 00:1e.3 done
  998 00:45:46.021442  scan_bus: scanning of bus PCI: 00:1e.3 took 14017 usecs
  999 00:45:46.024443  PCI: 00:1f.0 scanning...
 1000 00:45:46.028019  scan_static_bus for PCI: 00:1f.0
 1001 00:45:46.031214  PNP: 0c09.0 enabled
 1002 00:45:46.034310  scan_static_bus for PCI: 00:1f.0 done
 1003 00:45:46.038032  scan_bus: scanning of bus PCI: 00:1f.0 took 12065 usecs
 1004 00:45:46.041109  PCI: 00:1f.3 scanning...
 1005 00:45:46.047756  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
 1006 00:45:46.050921  PCI: 00:1f.4 scanning...
 1007 00:45:46.054689  scan_generic_bus for PCI: 00:1f.4
 1008 00:45:46.057910  scan_generic_bus for PCI: 00:1f.4 done
 1009 00:45:46.064450  scan_bus: scanning of bus PCI: 00:1f.4 took 10202 usecs
 1010 00:45:46.064535  PCI: 00:1f.5 scanning...
 1011 00:45:46.071163  scan_generic_bus for PCI: 00:1f.5
 1012 00:45:46.074652  scan_generic_bus for PCI: 00:1f.5 done
 1013 00:45:46.077742  scan_bus: scanning of bus PCI: 00:1f.5 took 10204 usecs
 1014 00:45:46.084682  scan_bus: scanning of bus DOMAIN: 0000 took 605456 usecs
 1015 00:45:46.087683  scan_static_bus for Root Device done
 1016 00:45:46.094240  scan_bus: scanning of bus Root Device took 625392 usecs
 1017 00:45:46.094325  done
 1018 00:45:46.097994  Chrome EC: UHEPI supported
 1019 00:45:46.104675  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1020 00:45:46.111145  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1021 00:45:46.117735  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1022 00:45:46.124177  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1023 00:45:46.127730  SPI flash protection: WPSW=0 SRP0=0
 1024 00:45:46.130808  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1025 00:45:46.137629  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1026 00:45:46.140762  found VGA at PCI: 00:02.0
 1027 00:45:46.143962  Setting up VGA for PCI: 00:02.0
 1028 00:45:46.147612  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1029 00:45:46.154335  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1030 00:45:46.154420  Allocating resources...
 1031 00:45:46.157479  Reading resources...
 1032 00:45:46.160673  Root Device read_resources bus 0 link: 0
 1033 00:45:46.167471  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1034 00:45:46.170989  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1035 00:45:46.177557  DOMAIN: 0000 read_resources bus 0 link: 0
 1036 00:45:46.180595  PCI: 00:14.0 read_resources bus 0 link: 0
 1037 00:45:46.187465  USB0 port 0 read_resources bus 0 link: 0
 1038 00:45:46.194544  USB0 port 0 read_resources bus 0 link: 0 done
 1039 00:45:46.197534  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1040 00:45:46.205408  PCI: 00:15.0 read_resources bus 1 link: 0
 1041 00:45:46.208523  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1042 00:45:46.215276  PCI: 00:15.1 read_resources bus 2 link: 0
 1043 00:45:46.218497  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1044 00:45:46.225524  PCI: 00:19.0 read_resources bus 3 link: 0
 1045 00:45:46.232714  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1046 00:45:46.235918  PCI: 00:1d.0 read_resources bus 1 link: 0
 1047 00:45:46.242631  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1048 00:45:46.245792  PCI: 00:1e.2 read_resources bus 4 link: 0
 1049 00:45:46.252567  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1050 00:45:46.255650  PCI: 00:1e.3 read_resources bus 5 link: 0
 1051 00:45:46.262340  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1052 00:45:46.265804  PCI: 00:1f.0 read_resources bus 0 link: 0
 1053 00:45:46.272199  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1054 00:45:46.278977  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1055 00:45:46.282046  Root Device read_resources bus 0 link: 0 done
 1056 00:45:46.285492  Done reading resources.
 1057 00:45:46.292035  Show resources in subtree (Root Device)...After reading.
 1058 00:45:46.295077   Root Device child on link 0 CPU_CLUSTER: 0
 1059 00:45:46.298736    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1060 00:45:46.301924     APIC: 00
 1061 00:45:46.302012     APIC: 02
 1062 00:45:46.302080     APIC: 04
 1063 00:45:46.305068     APIC: 01
 1064 00:45:46.305153     APIC: 03
 1065 00:45:46.305220     APIC: 05
 1066 00:45:46.308878     APIC: 07
 1067 00:45:46.308968     APIC: 06
 1068 00:45:46.315299    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1069 00:45:46.322160    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1070 00:45:46.374576    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1071 00:45:46.374685     PCI: 00:00.0
 1072 00:45:46.374951     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1073 00:45:46.375505     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1074 00:45:46.375881     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1075 00:45:46.376402     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1076 00:45:46.424756     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1077 00:45:46.425404     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1078 00:45:46.425699     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1079 00:45:46.426043     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1080 00:45:46.426346     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1081 00:45:46.429222     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1082 00:45:46.435768     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1083 00:45:46.446262     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1084 00:45:46.455639     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1085 00:45:46.466069     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1086 00:45:46.475513     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1087 00:45:46.485322     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1088 00:45:46.485443     PCI: 00:02.0
 1089 00:45:46.495491     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1090 00:45:46.505269     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1091 00:45:46.515535     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1092 00:45:46.515615     PCI: 00:04.0
 1093 00:45:46.518648     PCI: 00:08.0
 1094 00:45:46.528378     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1095 00:45:46.528464     PCI: 00:12.0
 1096 00:45:46.538530     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1097 00:45:46.545378     PCI: 00:14.0 child on link 0 USB0 port 0
 1098 00:45:46.555071     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1099 00:45:46.558109      USB0 port 0 child on link 0 USB2 port 0
 1100 00:45:46.561674       USB2 port 0
 1101 00:45:46.561762       USB2 port 1
 1102 00:45:46.564770       USB2 port 2
 1103 00:45:46.564854       USB2 port 3
 1104 00:45:46.568490       USB2 port 5
 1105 00:45:46.568574       USB2 port 6
 1106 00:45:46.571695       USB2 port 9
 1107 00:45:46.571802       USB3 port 0
 1108 00:45:46.574751       USB3 port 1
 1109 00:45:46.574855       USB3 port 2
 1110 00:45:46.577911       USB3 port 3
 1111 00:45:46.577995       USB3 port 4
 1112 00:45:46.580979     PCI: 00:14.2
 1113 00:45:46.590894     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1114 00:45:46.601073     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1115 00:45:46.601168     PCI: 00:14.3
 1116 00:45:46.611029     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1117 00:45:46.617627     PCI: 00:15.0 child on link 0 I2C: 01:15
 1118 00:45:46.627465     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1119 00:45:46.627550      I2C: 01:15
 1120 00:45:46.634137     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1121 00:45:46.644115     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1122 00:45:46.644209      I2C: 02:5d
 1123 00:45:46.647404      GENERIC: 0.0
 1124 00:45:46.647489     PCI: 00:16.0
 1125 00:45:46.657250     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1126 00:45:46.660458     PCI: 00:17.0
 1127 00:45:46.667183     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1128 00:45:46.677238     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1129 00:45:46.687049     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1130 00:45:46.693685     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1131 00:45:46.703812     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1132 00:45:46.710046     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1133 00:45:46.716684     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1134 00:45:46.726555     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1135 00:45:46.726645      I2C: 03:1a
 1136 00:45:46.730157      I2C: 03:38
 1137 00:45:46.730247      I2C: 03:39
 1138 00:45:46.730311      I2C: 03:3a
 1139 00:45:46.733951      I2C: 03:3b
 1140 00:45:46.737245     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1141 00:45:46.746871     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1142 00:45:46.756665     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1143 00:45:46.766480     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1144 00:45:46.766569      PCI: 01:00.0
 1145 00:45:46.776212      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1146 00:45:46.779471     PCI: 00:1e.0
 1147 00:45:46.789398     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1148 00:45:46.799487     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1149 00:45:46.802598     PCI: 00:1e.2 child on link 0 SPI: 00
 1150 00:45:46.812419     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1151 00:45:46.815912      SPI: 00
 1152 00:45:46.819387     PCI: 00:1e.3 child on link 0 SPI: 01
 1153 00:45:46.828772     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1154 00:45:46.828885      SPI: 01
 1155 00:45:46.835510     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1156 00:45:46.842151     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1157 00:45:46.852118     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1158 00:45:46.852204      PNP: 0c09.0
 1159 00:45:46.862189      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1160 00:45:46.865231     PCI: 00:1f.3
 1161 00:45:46.875708     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1162 00:45:46.885412     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1163 00:45:46.885496     PCI: 00:1f.4
 1164 00:45:46.895412     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1165 00:45:46.905265     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1166 00:45:46.905351     PCI: 00:1f.5
 1167 00:45:46.915100     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1168 00:45:46.921426  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1169 00:45:46.928015  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1170 00:45:46.934705  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1171 00:45:46.938386  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1172 00:45:46.941502  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1173 00:45:46.944740  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1174 00:45:46.948074  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1175 00:45:46.954473  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1176 00:45:46.961348  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1177 00:45:46.970924  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1178 00:45:46.977748  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1179 00:45:46.984734  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1180 00:45:46.991292  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1181 00:45:46.997440  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1182 00:45:47.001084  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1183 00:45:47.007617  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1184 00:45:47.010726  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1185 00:45:47.017476  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1186 00:45:47.021044  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1187 00:45:47.027527  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1188 00:45:47.030685  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1189 00:45:47.037460  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1190 00:45:47.041085  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1191 00:45:47.047400  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1192 00:45:47.050484  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1193 00:45:47.056901  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1194 00:45:47.060554  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1195 00:45:47.067214  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1196 00:45:47.070372  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1197 00:45:47.073589  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1198 00:45:47.080066  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1199 00:45:47.083658  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1200 00:45:47.090052  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1201 00:45:47.093227  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1202 00:45:47.099973  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1203 00:45:47.102933  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1204 00:45:47.110340  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1205 00:45:47.116687  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1206 00:45:47.122970  avoid_fixed_resources: DOMAIN: 0000
 1207 00:45:47.126464  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1208 00:45:47.132661  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1209 00:45:47.139147  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1210 00:45:47.149111  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1211 00:45:47.155815  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1212 00:45:47.162240  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1213 00:45:47.172272  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1214 00:45:47.179099  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1215 00:45:47.185437  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1216 00:45:47.195349  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1217 00:45:47.202098  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1218 00:45:47.208745  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1219 00:45:47.211890  Setting resources...
 1220 00:45:47.218537  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1221 00:45:47.221727  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1222 00:45:47.225352  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1223 00:45:47.228376  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1224 00:45:47.231955  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1225 00:45:47.238689  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1226 00:45:47.245094  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1227 00:45:47.251705  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1228 00:45:47.258533  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1229 00:45:47.264865  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1230 00:45:47.271498  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1231 00:45:47.275336  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1232 00:45:47.278270  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1233 00:45:47.284596  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1234 00:45:47.288327  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1235 00:45:47.294532  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1236 00:45:47.297979  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1237 00:45:47.304491  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1238 00:45:47.308009  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1239 00:45:47.314916  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1240 00:45:47.318160  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1241 00:45:47.324222  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1242 00:45:47.327807  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1243 00:45:47.334585  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1244 00:45:47.337682  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1245 00:45:47.344295  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1246 00:45:47.347962  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1247 00:45:47.354147  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1248 00:45:47.357607  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1249 00:45:47.361045  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1250 00:45:47.367313  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1251 00:45:47.370882  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1252 00:45:47.380542  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1253 00:45:47.387478  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1254 00:45:47.393691  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1255 00:45:47.400400  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1256 00:45:47.406987  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1257 00:45:47.413479  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1258 00:45:47.417205  Root Device assign_resources, bus 0 link: 0
 1259 00:45:47.423851  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1260 00:45:47.430622  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1261 00:45:47.440213  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1262 00:45:47.446993  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1263 00:45:47.457398  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1264 00:45:47.463480  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1265 00:45:47.473629  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1266 00:45:47.476746  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1267 00:45:47.483447  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1268 00:45:47.489686  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1269 00:45:47.499567  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1270 00:45:47.506715  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1271 00:45:47.516667  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1272 00:45:47.519815  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1273 00:45:47.523198  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1274 00:45:47.533067  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1275 00:45:47.536333  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1276 00:45:47.543213  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1277 00:45:47.549573  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1278 00:45:47.559437  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1279 00:45:47.565952  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1280 00:45:47.572817  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1281 00:45:47.582497  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1282 00:45:47.588879  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1283 00:45:47.595617  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1284 00:45:47.605408  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1285 00:45:47.608455  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1286 00:45:47.615554  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1287 00:45:47.622138  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1288 00:45:47.631645  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1289 00:45:47.641500  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1290 00:45:47.645033  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1291 00:45:47.651526  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1292 00:45:47.658261  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1293 00:45:47.664692  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1294 00:45:47.674797  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1295 00:45:47.678348  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1296 00:45:47.684479  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1297 00:45:47.691328  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1298 00:45:47.697649  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1299 00:45:47.701268  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1300 00:45:47.704278  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1301 00:45:47.711886  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1302 00:45:47.715005  LPC: Trying to open IO window from 800 size 1ff
 1303 00:45:47.724694  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1304 00:45:47.731403  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1305 00:45:47.741050  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1306 00:45:47.747872  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1307 00:45:47.754086  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1308 00:45:47.757682  Root Device assign_resources, bus 0 link: 0
 1309 00:45:47.760755  Done setting resources.
 1310 00:45:47.767200  Show resources in subtree (Root Device)...After assigning values.
 1311 00:45:47.770736   Root Device child on link 0 CPU_CLUSTER: 0
 1312 00:45:47.773958    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1313 00:45:47.777623     APIC: 00
 1314 00:45:47.777705     APIC: 02
 1315 00:45:47.780655     APIC: 04
 1316 00:45:47.780737     APIC: 01
 1317 00:45:47.780803     APIC: 03
 1318 00:45:47.783798     APIC: 05
 1319 00:45:47.783881     APIC: 07
 1320 00:45:47.787263     APIC: 06
 1321 00:45:47.790298    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1322 00:45:47.800281    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1323 00:45:47.810548    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1324 00:45:47.813546     PCI: 00:00.0
 1325 00:45:47.823470     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1326 00:45:47.830086     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1327 00:45:47.839954     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1328 00:45:47.849945     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1329 00:45:47.859883     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1330 00:45:47.869981     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1331 00:45:47.879858     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1332 00:45:47.886577     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1333 00:45:47.896215     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1334 00:45:47.906179     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1335 00:45:47.916110     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1336 00:45:47.926144     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1337 00:45:47.935950     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1338 00:45:47.945741     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1339 00:45:47.952345     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1340 00:45:47.962400     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1341 00:45:47.965626     PCI: 00:02.0
 1342 00:45:47.975651     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1343 00:45:47.985575     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1344 00:45:47.995421     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1345 00:45:47.995516     PCI: 00:04.0
 1346 00:45:47.998580     PCI: 00:08.0
 1347 00:45:48.008408     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1348 00:45:48.008501     PCI: 00:12.0
 1349 00:45:48.021888     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1350 00:45:48.025260     PCI: 00:14.0 child on link 0 USB0 port 0
 1351 00:45:48.035123     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1352 00:45:48.038278      USB0 port 0 child on link 0 USB2 port 0
 1353 00:45:48.041374       USB2 port 0
 1354 00:45:48.041460       USB2 port 1
 1355 00:45:48.045181       USB2 port 2
 1356 00:45:48.045265       USB2 port 3
 1357 00:45:48.048517       USB2 port 5
 1358 00:45:48.051575       USB2 port 6
 1359 00:45:48.051659       USB2 port 9
 1360 00:45:48.055048       USB3 port 0
 1361 00:45:48.055132       USB3 port 1
 1362 00:45:48.058274       USB3 port 2
 1363 00:45:48.058358       USB3 port 3
 1364 00:45:48.061525       USB3 port 4
 1365 00:45:48.061609     PCI: 00:14.2
 1366 00:45:48.071480     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1367 00:45:48.081162     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1368 00:45:48.084768     PCI: 00:14.3
 1369 00:45:48.094662     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1370 00:45:48.097700     PCI: 00:15.0 child on link 0 I2C: 01:15
 1371 00:45:48.111401     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1372 00:45:48.111486      I2C: 01:15
 1373 00:45:48.114470     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1374 00:45:48.124095     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1375 00:45:48.127537      I2C: 02:5d
 1376 00:45:48.127634      GENERIC: 0.0
 1377 00:45:48.131106     PCI: 00:16.0
 1378 00:45:48.140834     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1379 00:45:48.144508     PCI: 00:17.0
 1380 00:45:48.153930     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1381 00:45:48.164161     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1382 00:45:48.171343     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1383 00:45:48.180542     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1384 00:45:48.190610     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1385 00:45:48.200534     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1386 00:45:48.203625     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1387 00:45:48.213589     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1388 00:45:48.216620      I2C: 03:1a
 1389 00:45:48.216704      I2C: 03:38
 1390 00:45:48.220157      I2C: 03:39
 1391 00:45:48.220240      I2C: 03:3a
 1392 00:45:48.223233      I2C: 03:3b
 1393 00:45:48.226866     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1394 00:45:48.237155     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1395 00:45:48.246548     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1396 00:45:48.256537     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1397 00:45:48.259601      PCI: 01:00.0
 1398 00:45:48.269333      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1399 00:45:48.269420     PCI: 00:1e.0
 1400 00:45:48.282729     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1401 00:45:48.292618     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1402 00:45:48.296267     PCI: 00:1e.2 child on link 0 SPI: 00
 1403 00:45:48.305741     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1404 00:45:48.309496      SPI: 00
 1405 00:45:48.312627     PCI: 00:1e.3 child on link 0 SPI: 01
 1406 00:45:48.322431     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1407 00:45:48.322518      SPI: 01
 1408 00:45:48.328914     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1409 00:45:48.335550     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1410 00:45:48.345810     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1411 00:45:48.345896      PNP: 0c09.0
 1412 00:45:48.355506      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1413 00:45:48.358626     PCI: 00:1f.3
 1414 00:45:48.369016     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1415 00:45:48.378414     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1416 00:45:48.378507     PCI: 00:1f.4
 1417 00:45:48.388711     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1418 00:45:48.398208     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1419 00:45:48.401856     PCI: 00:1f.5
 1420 00:45:48.411899     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1421 00:45:48.415080  Done allocating resources.
 1422 00:45:48.418126  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1423 00:45:48.421606  Enabling resources...
 1424 00:45:48.428165  PCI: 00:00.0 subsystem <- 8086/9b61
 1425 00:45:48.428249  PCI: 00:00.0 cmd <- 06
 1426 00:45:48.431695  PCI: 00:02.0 subsystem <- 8086/9b41
 1427 00:45:48.434643  PCI: 00:02.0 cmd <- 03
 1428 00:45:48.438233  PCI: 00:08.0 cmd <- 06
 1429 00:45:48.441277  PCI: 00:12.0 subsystem <- 8086/02f9
 1430 00:45:48.444956  PCI: 00:12.0 cmd <- 02
 1431 00:45:48.448097  PCI: 00:14.0 subsystem <- 8086/02ed
 1432 00:45:48.451244  PCI: 00:14.0 cmd <- 02
 1433 00:45:48.454459  PCI: 00:14.2 cmd <- 02
 1434 00:45:48.458034  PCI: 00:14.3 subsystem <- 8086/02f0
 1435 00:45:48.458117  PCI: 00:14.3 cmd <- 02
 1436 00:45:48.464586  PCI: 00:15.0 subsystem <- 8086/02e8
 1437 00:45:48.464672  PCI: 00:15.0 cmd <- 02
 1438 00:45:48.467949  PCI: 00:15.1 subsystem <- 8086/02e9
 1439 00:45:48.471851  PCI: 00:15.1 cmd <- 02
 1440 00:45:48.474774  PCI: 00:16.0 subsystem <- 8086/02e0
 1441 00:45:48.478023  PCI: 00:16.0 cmd <- 02
 1442 00:45:48.481039  PCI: 00:17.0 subsystem <- 8086/02d3
 1443 00:45:48.484602  PCI: 00:17.0 cmd <- 03
 1444 00:45:48.487779  PCI: 00:19.0 subsystem <- 8086/02c5
 1445 00:45:48.490919  PCI: 00:19.0 cmd <- 02
 1446 00:45:48.494538  PCI: 00:1d.0 bridge ctrl <- 0013
 1447 00:45:48.497604  PCI: 00:1d.0 subsystem <- 8086/02b0
 1448 00:45:48.501249  PCI: 00:1d.0 cmd <- 06
 1449 00:45:48.504392  PCI: 00:1e.0 subsystem <- 8086/02a8
 1450 00:45:48.507591  PCI: 00:1e.0 cmd <- 06
 1451 00:45:48.511382  PCI: 00:1e.2 subsystem <- 8086/02aa
 1452 00:45:48.514560  PCI: 00:1e.2 cmd <- 06
 1453 00:45:48.517592  PCI: 00:1e.3 subsystem <- 8086/02ab
 1454 00:45:48.517676  PCI: 00:1e.3 cmd <- 02
 1455 00:45:48.524105  PCI: 00:1f.0 subsystem <- 8086/0284
 1456 00:45:48.524189  PCI: 00:1f.0 cmd <- 407
 1457 00:45:48.530685  PCI: 00:1f.3 subsystem <- 8086/02c8
 1458 00:45:48.530769  PCI: 00:1f.3 cmd <- 02
 1459 00:45:48.534235  PCI: 00:1f.4 subsystem <- 8086/02a3
 1460 00:45:48.537667  PCI: 00:1f.4 cmd <- 03
 1461 00:45:48.540727  PCI: 00:1f.5 subsystem <- 8086/02a4
 1462 00:45:48.543848  PCI: 00:1f.5 cmd <- 406
 1463 00:45:48.553126  PCI: 01:00.0 cmd <- 02
 1464 00:45:48.558151  done.
 1465 00:45:48.567521  ME: Version: 14.0.39.1367
 1466 00:45:48.573763  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
 1467 00:45:48.577446  Initializing devices...
 1468 00:45:48.577531  Root Device init ...
 1469 00:45:48.584523  Chrome EC: Set SMI mask to 0x0000000000000000
 1470 00:45:48.587112  Chrome EC: clear events_b mask to 0x0000000000000000
 1471 00:45:48.594106  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1472 00:45:48.600256  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1473 00:45:48.607043  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1474 00:45:48.610301  Chrome EC: Set WAKE mask to 0x0000000000000000
 1475 00:45:48.616587  Root Device init finished in 35181 usecs
 1476 00:45:48.616671  CPU_CLUSTER: 0 init ...
 1477 00:45:48.623279  CPU_CLUSTER: 0 init finished in 2449 usecs
 1478 00:45:48.628323  PCI: 00:00.0 init ...
 1479 00:45:48.631434  CPU TDP: 15 Watts
 1480 00:45:48.634544  CPU PL2 = 64 Watts
 1481 00:45:48.638152  PCI: 00:00.0 init finished in 7082 usecs
 1482 00:45:48.641222  PCI: 00:02.0 init ...
 1483 00:45:48.644622  PCI: 00:02.0 init finished in 2254 usecs
 1484 00:45:48.647705  PCI: 00:08.0 init ...
 1485 00:45:48.650937  PCI: 00:08.0 init finished in 2252 usecs
 1486 00:45:48.654569  PCI: 00:12.0 init ...
 1487 00:45:48.657599  PCI: 00:12.0 init finished in 2244 usecs
 1488 00:45:48.660940  PCI: 00:14.0 init ...
 1489 00:45:48.664051  PCI: 00:14.0 init finished in 2253 usecs
 1490 00:45:48.667640  PCI: 00:14.2 init ...
 1491 00:45:48.670744  PCI: 00:14.2 init finished in 2253 usecs
 1492 00:45:48.673875  PCI: 00:14.3 init ...
 1493 00:45:48.677356  PCI: 00:14.3 init finished in 2260 usecs
 1494 00:45:48.681051  PCI: 00:15.0 init ...
 1495 00:45:48.683951  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1496 00:45:48.687268  PCI: 00:15.0 init finished in 5971 usecs
 1497 00:45:48.690978  PCI: 00:15.1 init ...
 1498 00:45:48.694163  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1499 00:45:48.701002  PCI: 00:15.1 init finished in 5978 usecs
 1500 00:45:48.701097  PCI: 00:16.0 init ...
 1501 00:45:48.707637  PCI: 00:16.0 init finished in 2253 usecs
 1502 00:45:48.707721  PCI: 00:19.0 init ...
 1503 00:45:48.714086  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1504 00:45:48.717094  PCI: 00:19.0 init finished in 5976 usecs
 1505 00:45:48.720378  PCI: 00:1d.0 init ...
 1506 00:45:48.724017  Initializing PCH PCIe bridge.
 1507 00:45:48.727106  PCI: 00:1d.0 init finished in 5285 usecs
 1508 00:45:48.730736  PCI: 00:1f.0 init ...
 1509 00:45:48.733709  IOAPIC: Initializing IOAPIC at 0xfec00000
 1510 00:45:48.740258  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1511 00:45:48.740361  IOAPIC: ID = 0x02
 1512 00:45:48.744197  IOAPIC: Dumping registers
 1513 00:45:48.746819    reg 0x0000: 0x02000000
 1514 00:45:48.750448    reg 0x0001: 0x00770020
 1515 00:45:48.750531    reg 0x0002: 0x00000000
 1516 00:45:48.756647  PCI: 00:1f.0 init finished in 23543 usecs
 1517 00:45:48.760147  PCI: 00:1f.4 init ...
 1518 00:45:48.763236  PCI: 00:1f.4 init finished in 2262 usecs
 1519 00:45:48.774031  PCI: 01:00.0 init ...
 1520 00:45:48.777609  PCI: 01:00.0 init finished in 2253 usecs
 1521 00:45:48.781673  PNP: 0c09.0 init ...
 1522 00:45:48.785146  Google Chrome EC uptime: 11.084 seconds
 1523 00:45:48.791408  Google Chrome AP resets since EC boot: 0
 1524 00:45:48.795074  Google Chrome most recent AP reset causes:
 1525 00:45:48.801499  Google Chrome EC reset flags at last EC boot: reset-pin
 1526 00:45:48.805099  PNP: 0c09.0 init finished in 20638 usecs
 1527 00:45:48.808238  Devices initialized
 1528 00:45:48.811467  Show all devs... After init.
 1529 00:45:48.811568  Root Device: enabled 1
 1530 00:45:48.814681  CPU_CLUSTER: 0: enabled 1
 1531 00:45:48.817973  DOMAIN: 0000: enabled 1
 1532 00:45:48.818057  APIC: 00: enabled 1
 1533 00:45:48.821645  PCI: 00:00.0: enabled 1
 1534 00:45:48.824726  PCI: 00:02.0: enabled 1
 1535 00:45:48.828341  PCI: 00:04.0: enabled 0
 1536 00:45:48.828452  PCI: 00:05.0: enabled 0
 1537 00:45:48.831408  PCI: 00:12.0: enabled 1
 1538 00:45:48.834378  PCI: 00:12.5: enabled 0
 1539 00:45:48.838027  PCI: 00:12.6: enabled 0
 1540 00:45:48.838110  PCI: 00:14.0: enabled 1
 1541 00:45:48.841406  PCI: 00:14.1: enabled 0
 1542 00:45:48.844484  PCI: 00:14.3: enabled 1
 1543 00:45:48.844567  PCI: 00:14.5: enabled 0
 1544 00:45:48.848014  PCI: 00:15.0: enabled 1
 1545 00:45:48.851043  PCI: 00:15.1: enabled 1
 1546 00:45:48.854648  PCI: 00:15.2: enabled 0
 1547 00:45:48.854732  PCI: 00:15.3: enabled 0
 1548 00:45:48.857783  PCI: 00:16.0: enabled 1
 1549 00:45:48.860908  PCI: 00:16.1: enabled 0
 1550 00:45:48.864580  PCI: 00:16.2: enabled 0
 1551 00:45:48.864664  PCI: 00:16.3: enabled 0
 1552 00:45:48.867718  PCI: 00:16.4: enabled 0
 1553 00:45:48.870862  PCI: 00:16.5: enabled 0
 1554 00:45:48.874403  PCI: 00:17.0: enabled 1
 1555 00:45:48.874489  PCI: 00:19.0: enabled 1
 1556 00:45:48.877997  PCI: 00:19.1: enabled 0
 1557 00:45:48.881073  PCI: 00:19.2: enabled 0
 1558 00:45:48.881156  PCI: 00:1a.0: enabled 0
 1559 00:45:48.884115  PCI: 00:1c.0: enabled 0
 1560 00:45:48.887620  PCI: 00:1c.1: enabled 0
 1561 00:45:48.890763  PCI: 00:1c.2: enabled 0
 1562 00:45:48.890847  PCI: 00:1c.3: enabled 0
 1563 00:45:48.893907  PCI: 00:1c.4: enabled 0
 1564 00:45:48.897638  PCI: 00:1c.5: enabled 0
 1565 00:45:48.900790  PCI: 00:1c.6: enabled 0
 1566 00:45:48.900874  PCI: 00:1c.7: enabled 0
 1567 00:45:48.903909  PCI: 00:1d.0: enabled 1
 1568 00:45:48.907520  PCI: 00:1d.1: enabled 0
 1569 00:45:48.910582  PCI: 00:1d.2: enabled 0
 1570 00:45:48.910666  PCI: 00:1d.3: enabled 0
 1571 00:45:48.914248  PCI: 00:1d.4: enabled 0
 1572 00:45:48.917453  PCI: 00:1d.5: enabled 0
 1573 00:45:48.920580  PCI: 00:1e.0: enabled 1
 1574 00:45:48.920663  PCI: 00:1e.1: enabled 0
 1575 00:45:48.924217  PCI: 00:1e.2: enabled 1
 1576 00:45:48.927386  PCI: 00:1e.3: enabled 1
 1577 00:45:48.927488  PCI: 00:1f.0: enabled 1
 1578 00:45:48.930515  PCI: 00:1f.1: enabled 0
 1579 00:45:48.933893  PCI: 00:1f.2: enabled 0
 1580 00:45:48.937066  PCI: 00:1f.3: enabled 1
 1581 00:45:48.937174  PCI: 00:1f.4: enabled 1
 1582 00:45:48.940683  PCI: 00:1f.5: enabled 1
 1583 00:45:48.943671  PCI: 00:1f.6: enabled 0
 1584 00:45:48.947272  USB0 port 0: enabled 1
 1585 00:45:48.947355  I2C: 01:15: enabled 1
 1586 00:45:48.950478  I2C: 02:5d: enabled 1
 1587 00:45:48.953535  GENERIC: 0.0: enabled 1
 1588 00:45:48.953618  I2C: 03:1a: enabled 1
 1589 00:45:48.957160  I2C: 03:38: enabled 1
 1590 00:45:48.960312  I2C: 03:39: enabled 1
 1591 00:45:48.960410  I2C: 03:3a: enabled 1
 1592 00:45:48.963491  I2C: 03:3b: enabled 1
 1593 00:45:48.967123  PCI: 00:00.0: enabled 1
 1594 00:45:48.967224  SPI: 00: enabled 1
 1595 00:45:48.970327  SPI: 01: enabled 1
 1596 00:45:48.973951  PNP: 0c09.0: enabled 1
 1597 00:45:48.974052  USB2 port 0: enabled 1
 1598 00:45:48.976913  USB2 port 1: enabled 1
 1599 00:45:48.980268  USB2 port 2: enabled 0
 1600 00:45:48.980352  USB2 port 3: enabled 0
 1601 00:45:48.983496  USB2 port 5: enabled 0
 1602 00:45:48.986723  USB2 port 6: enabled 1
 1603 00:45:48.990140  USB2 port 9: enabled 1
 1604 00:45:48.990224  USB3 port 0: enabled 1
 1605 00:45:48.993576  USB3 port 1: enabled 1
 1606 00:45:48.996792  USB3 port 2: enabled 1
 1607 00:45:48.996876  USB3 port 3: enabled 1
 1608 00:45:48.999972  USB3 port 4: enabled 0
 1609 00:45:49.003621  APIC: 02: enabled 1
 1610 00:45:49.003713  APIC: 04: enabled 1
 1611 00:45:49.006778  APIC: 01: enabled 1
 1612 00:45:49.009870  APIC: 03: enabled 1
 1613 00:45:49.009954  APIC: 05: enabled 1
 1614 00:45:49.013667  APIC: 07: enabled 1
 1615 00:45:49.013752  APIC: 06: enabled 1
 1616 00:45:49.016717  PCI: 00:08.0: enabled 1
 1617 00:45:49.019965  PCI: 00:14.2: enabled 1
 1618 00:45:49.023059  PCI: 01:00.0: enabled 1
 1619 00:45:49.026689  Disabling ACPI via APMC:
 1620 00:45:49.026773  done.
 1621 00:45:49.033351  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1622 00:45:49.036721  ELOG: NV offset 0xaf0000 size 0x4000
 1623 00:45:49.043667  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1624 00:45:49.049941  ELOG: Event(17) added with size 13 at 2022-07-26 00:45:40 UTC
 1625 00:45:49.056496  ELOG: Event(92) added with size 9 at 2022-07-26 00:45:40 UTC
 1626 00:45:49.063206  ELOG: Event(93) added with size 9 at 2022-07-26 00:45:40 UTC
 1627 00:45:49.069804  ELOG: Event(9A) added with size 9 at 2022-07-26 00:45:40 UTC
 1628 00:45:49.076457  ELOG: Event(9E) added with size 10 at 2022-07-26 00:45:40 UTC
 1629 00:45:49.083036  ELOG: Event(9F) added with size 14 at 2022-07-26 00:45:40 UTC
 1630 00:45:49.086229  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1631 00:45:49.094112  ELOG: Event(A1) added with size 10 at 2022-07-26 00:45:40 UTC
 1632 00:45:49.103655  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1633 00:45:49.109936  ELOG: Event(A0) added with size 9 at 2022-07-26 00:45:40 UTC
 1634 00:45:49.113534  elog_add_boot_reason: Logged dev mode boot
 1635 00:45:49.116570  Finalize devices...
 1636 00:45:49.116686  PCI: 00:17.0 final
 1637 00:45:49.120292  Devices finalized
 1638 00:45:49.123447  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1639 00:45:49.130035  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1640 00:45:49.133544  ME: HFSTS1                  : 0x90000245
 1641 00:45:49.136467  ME: HFSTS2                  : 0x3B850126
 1642 00:45:49.143092  ME: HFSTS3                  : 0x00000020
 1643 00:45:49.146615  ME: HFSTS4                  : 0x00004800
 1644 00:45:49.149676  ME: HFSTS5                  : 0x00000000
 1645 00:45:49.153280  ME: HFSTS6                  : 0x40400006
 1646 00:45:49.156343  ME: Manufacturing Mode      : NO
 1647 00:45:49.160041  ME: FW Partition Table      : OK
 1648 00:45:49.163130  ME: Bringup Loader Failure  : NO
 1649 00:45:49.166344  ME: Firmware Init Complete  : YES
 1650 00:45:49.169908  ME: Boot Options Present    : NO
 1651 00:45:49.173162  ME: Update In Progress      : NO
 1652 00:45:49.176299  ME: D0i3 Support            : YES
 1653 00:45:49.179429  ME: Low Power State Enabled : NO
 1654 00:45:49.182997  ME: CPU Replaced            : NO
 1655 00:45:49.186040  ME: CPU Replacement Valid   : YES
 1656 00:45:49.189561  ME: Current Working State   : 5
 1657 00:45:49.192663  ME: Current Operation State : 1
 1658 00:45:49.196334  ME: Current Operation Mode  : 0
 1659 00:45:49.199708  ME: Error Code              : 0
 1660 00:45:49.202926  ME: CPU Debug Disabled      : YES
 1661 00:45:49.205975  ME: TXT Support             : NO
 1662 00:45:49.212731  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1663 00:45:49.219553  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1664 00:45:49.219637  CBFS @ c08000 size 3f8000
 1665 00:45:49.225842  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1666 00:45:49.229040  CBFS: Locating 'fallback/dsdt.aml'
 1667 00:45:49.233047  CBFS: Found @ offset 10bb80 size 3fa5
 1668 00:45:49.238975  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1669 00:45:49.242339  CBFS @ c08000 size 3f8000
 1670 00:45:49.248930  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1671 00:45:49.249049  CBFS: Locating 'fallback/slic'
 1672 00:45:49.254620  CBFS: 'fallback/slic' not found.
 1673 00:45:49.261127  ACPI: Writing ACPI tables at 99b3e000.
 1674 00:45:49.261220  ACPI:    * FACS
 1675 00:45:49.264380  ACPI:    * DSDT
 1676 00:45:49.267902  Ramoops buffer: 0x100000@0x99a3d000.
 1677 00:45:49.270812  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1678 00:45:49.277558  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1679 00:45:49.281007  Google Chrome EC: version:
 1680 00:45:49.284043  	ro: helios_v2.0.2659-56403530b
 1681 00:45:49.287599  	rw: helios_v2.0.2849-c41de27e7d
 1682 00:45:49.287677    running image: 1
 1683 00:45:49.291779  ACPI:    * FADT
 1684 00:45:49.291855  SCI is IRQ9
 1685 00:45:49.298489  ACPI: added table 1/32, length now 40
 1686 00:45:49.298569  ACPI:     * SSDT
 1687 00:45:49.301592  Found 1 CPU(s) with 8 core(s) each.
 1688 00:45:49.307716  Error: Could not locate 'wifi_sar' in VPD.
 1689 00:45:49.311455  Checking CBFS for default SAR values
 1690 00:45:49.314534  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1691 00:45:49.317597  CBFS @ c08000 size 3f8000
 1692 00:45:49.324453  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1693 00:45:49.327615  CBFS: Locating 'wifi_sar_defaults.hex'
 1694 00:45:49.330773  CBFS: Found @ offset 5fac0 size 77
 1695 00:45:49.334558  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1696 00:45:49.340567  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1697 00:45:49.344026  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1698 00:45:49.350632  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1699 00:45:49.354082  failed to find key in VPD: dsm_calib_r0_0
 1700 00:45:49.363875  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1701 00:45:49.366997  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1702 00:45:49.373714  failed to find key in VPD: dsm_calib_r0_1
 1703 00:45:49.380442  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1704 00:45:49.386600  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1705 00:45:49.390079  failed to find key in VPD: dsm_calib_r0_2
 1706 00:45:49.399658  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1707 00:45:49.406361  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1708 00:45:49.410129  failed to find key in VPD: dsm_calib_r0_3
 1709 00:45:49.419811  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1710 00:45:49.423045  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1711 00:45:49.426202  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1712 00:45:49.433052  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1713 00:45:49.436710  EC returned error result code 1
 1714 00:45:49.440224  EC returned error result code 1
 1715 00:45:49.443693  EC returned error result code 1
 1716 00:45:49.446970  PS2K: Bad resp from EC. Vivaldi disabled!
 1717 00:45:49.453521  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1718 00:45:49.460528  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1719 00:45:49.463620  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1720 00:45:49.470442  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1721 00:45:49.476621  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1722 00:45:49.479820  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1723 00:45:49.487043  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1724 00:45:49.493446  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1725 00:45:49.496612  ACPI: added table 2/32, length now 44
 1726 00:45:49.499708  ACPI:    * MCFG
 1727 00:45:49.503370  ACPI: added table 3/32, length now 48
 1728 00:45:49.503453  ACPI:    * TPM2
 1729 00:45:49.506497  TPM2 log created at 99a2d000
 1730 00:45:49.509638  ACPI: added table 4/32, length now 52
 1731 00:45:49.513323  ACPI:    * MADT
 1732 00:45:49.513406  SCI is IRQ9
 1733 00:45:49.516401  ACPI: added table 5/32, length now 56
 1734 00:45:49.520012  current = 99b43ac0
 1735 00:45:49.520095  ACPI:    * DMAR
 1736 00:45:49.523016  ACPI: added table 6/32, length now 60
 1737 00:45:49.526571  ACPI:    * IGD OpRegion
 1738 00:45:49.529688  GMA: Found VBT in CBFS
 1739 00:45:49.532931  GMA: Found valid VBT in CBFS
 1740 00:45:49.536068  ACPI: added table 7/32, length now 64
 1741 00:45:49.536149  ACPI:    * HPET
 1742 00:45:49.542904  ACPI: added table 8/32, length now 68
 1743 00:45:49.542994  ACPI: done.
 1744 00:45:49.546632  ACPI tables: 31744 bytes.
 1745 00:45:49.550398  smbios_write_tables: 99a2c000
 1746 00:45:49.552901  EC returned error result code 3
 1747 00:45:49.556849  Couldn't obtain OEM name from CBI
 1748 00:45:49.559842  Create SMBIOS type 17
 1749 00:45:49.563092  PCI: 00:00.0 (Intel Cannonlake)
 1750 00:45:49.563167  PCI: 00:14.3 (Intel WiFi)
 1751 00:45:49.565940  SMBIOS tables: 939 bytes.
 1752 00:45:49.572691  Writing table forward entry at 0x00000500
 1753 00:45:49.575927  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1754 00:45:49.582614  Writing coreboot table at 0x99b62000
 1755 00:45:49.586007   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1756 00:45:49.592339   1. 0000000000001000-000000000009ffff: RAM
 1757 00:45:49.596066   2. 00000000000a0000-00000000000fffff: RESERVED
 1758 00:45:49.599143   3. 0000000000100000-0000000099a2bfff: RAM
 1759 00:45:49.605851   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1760 00:45:49.612086   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1761 00:45:49.615805   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1762 00:45:49.622009   7. 000000009a000000-000000009f7fffff: RESERVED
 1763 00:45:49.625585   8. 00000000e0000000-00000000efffffff: RESERVED
 1764 00:45:49.632055   9. 00000000fc000000-00000000fc000fff: RESERVED
 1765 00:45:49.635152  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1766 00:45:49.641793  11. 00000000fed10000-00000000fed17fff: RESERVED
 1767 00:45:49.645232  12. 00000000fed80000-00000000fed83fff: RESERVED
 1768 00:45:49.651987  13. 00000000fed90000-00000000fed91fff: RESERVED
 1769 00:45:49.655026  14. 00000000feda0000-00000000feda1fff: RESERVED
 1770 00:45:49.658388  15. 0000000100000000-000000045e7fffff: RAM
 1771 00:45:49.665159  Graphics framebuffer located at 0xc0000000
 1772 00:45:49.665242  Passing 5 GPIOs to payload:
 1773 00:45:49.671519              NAME |       PORT | POLARITY |     VALUE
 1774 00:45:49.678288     write protect |  undefined |     high |       low
 1775 00:45:49.681537               lid |  undefined |     high |      high
 1776 00:45:49.689187             power |  undefined |     high |       low
 1777 00:45:49.691448             oprom |  undefined |     high |       low
 1778 00:45:49.698139          EC in RW | 0x000000cb |     high |       low
 1779 00:45:49.698224  Board ID: 4
 1780 00:45:49.704409  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1781 00:45:49.707848  CBFS @ c08000 size 3f8000
 1782 00:45:49.711438  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1783 00:45:49.717713  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b60
 1784 00:45:49.721233  coreboot table: 1492 bytes.
 1785 00:45:49.724466  IMD ROOT    0. 99fff000 00001000
 1786 00:45:49.727661  IMD SMALL   1. 99ffe000 00001000
 1787 00:45:49.731215  FSP MEMORY  2. 99c4e000 003b0000
 1788 00:45:49.734420  CONSOLE     3. 99c2e000 00020000
 1789 00:45:49.737760  FMAP        4. 99c2d000 0000054e
 1790 00:45:49.740713  TIME STAMP  5. 99c2c000 00000910
 1791 00:45:49.743993  VBOOT WORK  6. 99c18000 00014000
 1792 00:45:49.747550  MRC DATA    7. 99c16000 00001958
 1793 00:45:49.750654  ROMSTG STCK 8. 99c15000 00001000
 1794 00:45:49.754764  AFTER CAR   9. 99c0b000 0000a000
 1795 00:45:49.757398  RAMSTAGE   10. 99baf000 0005c000
 1796 00:45:49.760458  REFCODE    11. 99b7a000 00035000
 1797 00:45:49.764029  SMM BACKUP 12. 99b6a000 00010000
 1798 00:45:49.767183  COREBOOT   13. 99b62000 00008000
 1799 00:45:49.770601  ACPI       14. 99b3e000 00024000
 1800 00:45:49.773735  ACPI GNVS  15. 99b3d000 00001000
 1801 00:45:49.776903  RAMOOPS    16. 99a3d000 00100000
 1802 00:45:49.780550  TPM2 TCGLOG17. 99a2d000 00010000
 1803 00:45:49.783646  SMBIOS     18. 99a2c000 00000800
 1804 00:45:49.787318  IMD small region:
 1805 00:45:49.790321    IMD ROOT    0. 99ffec00 00000400
 1806 00:45:49.793883    FSP RUNTIME 1. 99ffebe0 00000004
 1807 00:45:49.797149    EC HOSTEVENT 2. 99ffebc0 00000008
 1808 00:45:49.800317    POWER STATE 3. 99ffeb80 00000040
 1809 00:45:49.803822    ROMSTAGE    4. 99ffeb60 00000004
 1810 00:45:49.807003    MEM INFO    5. 99ffe9a0 000001b9
 1811 00:45:49.810036    VPD         6. 99ffe960 00000036
 1812 00:45:49.813723  MTRR: Physical address space:
 1813 00:45:49.820089  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1814 00:45:49.826701  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1815 00:45:49.833484  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1816 00:45:49.839779  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1817 00:45:49.846615  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1818 00:45:49.853267  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1819 00:45:49.859866  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1820 00:45:49.862935  MTRR: Fixed MSR 0x250 0x0606060606060606
 1821 00:45:49.866441  MTRR: Fixed MSR 0x258 0x0606060606060606
 1822 00:45:49.869892  MTRR: Fixed MSR 0x259 0x0000000000000000
 1823 00:45:49.873052  MTRR: Fixed MSR 0x268 0x0606060606060606
 1824 00:45:49.879705  MTRR: Fixed MSR 0x269 0x0606060606060606
 1825 00:45:49.882868  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1826 00:45:49.886538  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1827 00:45:49.889730  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1828 00:45:49.896121  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1829 00:45:49.899789  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1830 00:45:49.903109  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1831 00:45:49.906133  call enable_fixed_mtrr()
 1832 00:45:49.909378  CPU physical address size: 39 bits
 1833 00:45:49.916121  MTRR: default type WB/UC MTRR counts: 6/8.
 1834 00:45:49.919271  MTRR: WB selected as default type.
 1835 00:45:49.923031  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1836 00:45:49.929369  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1837 00:45:49.936029  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1838 00:45:49.942348  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1839 00:45:49.948919  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1840 00:45:49.955565  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1841 00:45:49.959123  MTRR: Fixed MSR 0x250 0x0606060606060606
 1842 00:45:49.965716  MTRR: Fixed MSR 0x258 0x0606060606060606
 1843 00:45:49.969225  MTRR: Fixed MSR 0x259 0x0000000000000000
 1844 00:45:49.972835  MTRR: Fixed MSR 0x268 0x0606060606060606
 1845 00:45:49.975410  MTRR: Fixed MSR 0x269 0x0606060606060606
 1846 00:45:49.982075  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1847 00:45:49.985592  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1848 00:45:49.988774  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1849 00:45:49.991936  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1850 00:45:49.998688  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1851 00:45:50.001855  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1852 00:45:50.001939  
 1853 00:45:50.002006  MTRR check
 1854 00:45:50.005474  Fixed MTRRs   : Enabled
 1855 00:45:50.008554  Variable MTRRs: Enabled
 1856 00:45:50.008637  
 1857 00:45:50.012040  call enable_fixed_mtrr()
 1858 00:45:50.015583  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1859 00:45:50.018807  CPU physical address size: 39 bits
 1860 00:45:50.025279  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1861 00:45:50.028357  MTRR: Fixed MSR 0x250 0x0606060606060606
 1862 00:45:50.032050  MTRR: Fixed MSR 0x258 0x0606060606060606
 1863 00:45:50.038678  MTRR: Fixed MSR 0x259 0x0000000000000000
 1864 00:45:50.041887  MTRR: Fixed MSR 0x268 0x0606060606060606
 1865 00:45:50.045112  MTRR: Fixed MSR 0x269 0x0606060606060606
 1866 00:45:50.048264  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1867 00:45:50.054981  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1868 00:45:50.058102  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1869 00:45:50.061884  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1870 00:45:50.064833  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1871 00:45:50.067965  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1872 00:45:50.074519  MTRR: Fixed MSR 0x250 0x0606060606060606
 1873 00:45:50.078296  call enable_fixed_mtrr()
 1874 00:45:50.081528  MTRR: Fixed MSR 0x258 0x0606060606060606
 1875 00:45:50.084541  MTRR: Fixed MSR 0x259 0x0000000000000000
 1876 00:45:50.087962  MTRR: Fixed MSR 0x268 0x0606060606060606
 1877 00:45:50.094665  MTRR: Fixed MSR 0x269 0x0606060606060606
 1878 00:45:50.097912  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1879 00:45:50.100926  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1880 00:45:50.104509  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1881 00:45:50.107643  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1882 00:45:50.114548  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1883 00:45:50.117767  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1884 00:45:50.120913  CPU physical address size: 39 bits
 1885 00:45:50.124174  call enable_fixed_mtrr()
 1886 00:45:50.127740  CBFS @ c08000 size 3f8000
 1887 00:45:50.134183  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1888 00:45:50.137806  MTRR: Fixed MSR 0x250 0x0606060606060606
 1889 00:45:50.140941  MTRR: Fixed MSR 0x250 0x0606060606060606
 1890 00:45:50.144072  MTRR: Fixed MSR 0x258 0x0606060606060606
 1891 00:45:50.147290  MTRR: Fixed MSR 0x259 0x0000000000000000
 1892 00:45:50.154067  MTRR: Fixed MSR 0x268 0x0606060606060606
 1893 00:45:50.157664  MTRR: Fixed MSR 0x269 0x0606060606060606
 1894 00:45:50.161106  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1895 00:45:50.164191  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1896 00:45:50.170580  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1897 00:45:50.174073  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1898 00:45:50.177034  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1899 00:45:50.180616  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1900 00:45:50.186863  MTRR: Fixed MSR 0x258 0x0606060606060606
 1901 00:45:50.190430  call enable_fixed_mtrr()
 1902 00:45:50.193638  MTRR: Fixed MSR 0x259 0x0000000000000000
 1903 00:45:50.196684  MTRR: Fixed MSR 0x268 0x0606060606060606
 1904 00:45:50.200275  MTRR: Fixed MSR 0x269 0x0606060606060606
 1905 00:45:50.203410  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1906 00:45:50.209965  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1907 00:45:50.213556  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1908 00:45:50.216770  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1909 00:45:50.219988  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1910 00:45:50.226706  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1911 00:45:50.230371  CPU physical address size: 39 bits
 1912 00:45:50.233435  call enable_fixed_mtrr()
 1913 00:45:50.236509  CBFS: Locating 'fallback/payload'
 1914 00:45:50.239976  CPU physical address size: 39 bits
 1915 00:45:50.243112  MTRR: Fixed MSR 0x250 0x0606060606060606
 1916 00:45:50.246737  MTRR: Fixed MSR 0x250 0x0606060606060606
 1917 00:45:50.249797  MTRR: Fixed MSR 0x258 0x0606060606060606
 1918 00:45:50.256494  MTRR: Fixed MSR 0x259 0x0000000000000000
 1919 00:45:50.259570  MTRR: Fixed MSR 0x268 0x0606060606060606
 1920 00:45:50.263067  MTRR: Fixed MSR 0x269 0x0606060606060606
 1921 00:45:50.266872  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1922 00:45:50.273142  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1923 00:45:50.276465  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1924 00:45:50.279450  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1925 00:45:50.282999  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1926 00:45:50.289848  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1927 00:45:50.292835  MTRR: Fixed MSR 0x258 0x0606060606060606
 1928 00:45:50.296029  MTRR: Fixed MSR 0x259 0x0000000000000000
 1929 00:45:50.299584  MTRR: Fixed MSR 0x268 0x0606060606060606
 1930 00:45:50.306110  MTRR: Fixed MSR 0x269 0x0606060606060606
 1931 00:45:50.309187  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1932 00:45:50.312821  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1933 00:45:50.315896  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1934 00:45:50.322491  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1935 00:45:50.326099  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1936 00:45:50.329277  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1937 00:45:50.332385  call enable_fixed_mtrr()
 1938 00:45:50.336207  call enable_fixed_mtrr()
 1939 00:45:50.339130  CPU physical address size: 39 bits
 1940 00:45:50.342762  CPU physical address size: 39 bits
 1941 00:45:50.345713  CBFS: Found @ offset 1c96c0 size 3f798
 1942 00:45:50.348855  CPU physical address size: 39 bits
 1943 00:45:50.352132  Checking segment from ROM address 0xffdd16f8
 1944 00:45:50.358967  Checking segment from ROM address 0xffdd1714
 1945 00:45:50.362021  Loading segment from ROM address 0xffdd16f8
 1946 00:45:50.365575    code (compression=0)
 1947 00:45:50.372009    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1948 00:45:50.381943  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1949 00:45:50.385499  it's not compressed!
 1950 00:45:50.476843  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 1951 00:45:50.483545  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 1952 00:45:50.486416  Loading segment from ROM address 0xffdd1714
 1953 00:45:50.489579    Entry Point 0x30000000
 1954 00:45:50.493167  Loaded segments
 1955 00:45:50.498977  Finalizing chipset.
 1956 00:45:50.502017  Finalizing SMM.
 1957 00:45:50.505525  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 1958 00:45:50.509220  mp_park_aps done after 0 msecs.
 1959 00:45:50.515268  Jumping to boot code at 30000000(99b62000)
 1960 00:45:50.521654  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 1961 00:45:50.521739  
 1962 00:45:50.525040  Starting depthcharge on Helios...
 1963 00:45:50.525407  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 1964 00:45:50.525512  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 1965 00:45:50.525597  Setting prompt string to ['hatch:']
 1966 00:45:50.525676  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 1967 00:45:50.535010  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 1968 00:45:50.541812  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 1969 00:45:50.548120  board_setup: Info: eMMC controller not present; skipping
 1970 00:45:50.551928  New NVMe Controller 0x30053ac0 @ 00:1d:00
 1971 00:45:50.558403  board_setup: Info: SDHCI controller not present; skipping
 1972 00:45:50.565088  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 1973 00:45:50.565173  Wipe memory regions:
 1974 00:45:50.568420  	[0x00000000001000, 0x000000000a0000)
 1975 00:45:50.571349  	[0x00000000100000, 0x00000030000000)
 1976 00:45:50.641090  	[0x00000030657430, 0x00000099a2c000)
 1977 00:45:50.785336  	[0x00000100000000, 0x0000045e800000)
 1978 00:45:52.169967  R8152: Initializing
 1979 00:45:52.172826  Version 9 (ocp_data = 6010)
 1980 00:45:52.177663  R8152: Done initializing
 1981 00:45:52.180805  Adding net device
 1982 00:45:52.677883  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 1983 00:45:52.678027  
 1984 00:45:52.678311  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 1986 00:45:52.779097  hatch: tftpboot 192.168.201.1 6887882/tftp-deploy-zratjox_/kernel/bzImage 6887882/tftp-deploy-zratjox_/kernel/cmdline 6887882/tftp-deploy-zratjox_/ramdisk/ramdisk.cpio.gz
 1987 00:45:52.779276  Setting prompt string to 'Starting kernel'
 1988 00:45:52.779355  Setting prompt string to ['Starting kernel']
 1989 00:45:52.779422  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 1990 00:45:52.779502  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:38)
 1991 00:45:52.783646  tftpboot 192.168.201.1 6887882/tftp-deploy-zratjox_/kernel/bzImagoy-zratjox_/kernel/cmdline 6887882/tftp-deploy-zratjox_/ramdisk/ramdisk.cpio.gz
 1992 00:45:52.783735  Waiting for link
 1993 00:45:52.984487  done.
 1994 00:45:52.984628  MAC: f4:f5:e8:50:dc:f7
 1995 00:45:52.987748  Sending DHCP discover... done.
 1996 00:45:52.991725  Waiting for reply... done.
 1997 00:45:52.994409  Sending DHCP request... done.
 1998 00:45:52.997565  Waiting for reply... done.
 1999 00:45:53.001159  My ip is 192.168.201.10
 2000 00:45:53.004253  The DHCP server ip is 192.168.201.1
 2001 00:45:53.007435  TFTP server IP predefined by user: 192.168.201.1
 2002 00:45:53.013990  Bootfile predefined by user: 6887882/tftp-deploy-zratjox_/kernel/bzImage
 2003 00:45:53.017482  Sending tftp read request... done.
 2004 00:45:53.020639  Waiting for the transfer... 
 2005 00:45:53.263197  00000000 ################################################################
 2006 00:45:53.496071  00080000 ################################################################
 2007 00:45:53.726688  00100000 ################################################################
 2008 00:45:53.958954  00180000 ################################################################
 2009 00:45:54.205096  00200000 ################################################################
 2010 00:45:54.443978  00280000 ################################################################
 2011 00:45:54.685051  00300000 ################################################################
 2012 00:45:54.934859  00380000 ################################################################
 2013 00:45:55.183024  00400000 ################################################################
 2014 00:45:55.432256  00480000 ################################################################
 2015 00:45:55.667159  00500000 ################################################################
 2016 00:45:55.903112  00580000 ################################################################
 2017 00:45:56.156393  00600000 ################################################################ done.
 2018 00:45:56.158723  The bootfile was 6811536 bytes long.
 2019 00:45:56.162098  Sending tftp read request... done.
 2020 00:45:56.166056  Waiting for the transfer... 
 2021 00:45:56.401835  00000000 ################################################################
 2022 00:45:56.625169  00080000 ################################################################
 2023 00:45:56.855314  00100000 ################################################################
 2024 00:45:57.095690  00180000 ################################################################
 2025 00:45:57.330599  00200000 ################################################################
 2026 00:45:57.558781  00280000 ################################################################
 2027 00:45:57.788169  00300000 ################################################################
 2028 00:45:58.014737  00380000 ################################################################
 2029 00:45:58.261010  00400000 ################################################################
 2030 00:45:58.490010  00480000 ################################################################
 2031 00:45:58.719136  00500000 ################################################################
 2032 00:45:58.969189  00580000 ################################################################
 2033 00:45:59.203074  00600000 ################################################################
 2034 00:45:59.439092  00680000 ################################################################
 2035 00:45:59.668191  00700000 ################################################################
 2036 00:45:59.899129  00780000 ################################################################
 2037 00:45:59.971210  00800000 #################### done.
 2038 00:45:59.974503  Sending tftp read request... done.
 2039 00:45:59.977920  Waiting for the transfer... 
 2040 00:45:59.978005  00000000 # done.
 2041 00:45:59.987547  Command line loaded dynamically from TFTP file: 6887882/tftp-deploy-zratjox_/kernel/cmdline
 2042 00:46:00.004636  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2043 00:46:00.011505  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2044 00:46:00.018099  Shutting down all USB controllers.
 2045 00:46:00.018183  Removing current net device
 2046 00:46:00.021657  Finalizing coreboot
 2047 00:46:00.028199  Exiting depthcharge with code 4 at timestamp: 16776735
 2048 00:46:00.028285  
 2049 00:46:00.028353  Starting kernel ...
 2050 00:46:00.028414  
 2051 00:46:00.028475  
 2052 00:46:00.028770  end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
 2053 00:46:00.028871  start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
 2054 00:46:00.028954  Setting prompt string to ['Linux version [0-9]']
 2055 00:46:00.029057  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2056 00:46:00.029125  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2058 00:50:31.029163  end: 2.2.5 auto-login-action (duration 00:04:31) [common]
 2060 00:50:31.029375  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
 2062 00:50:31.029528  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2065 00:50:31.029789  end: 2 depthcharge-action (duration 00:05:00) [common]
 2067 00:50:31.029984  Cleaning after the job
 2068 00:50:31.030067  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/ramdisk
 2069 00:50:31.030714  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/kernel
 2070 00:50:31.031227  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887882/tftp-deploy-zratjox_/modules
 2071 00:50:31.031424  start: 5.1 power-off (timeout 00:00:30) [common]
 2072 00:50:31.031579  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2073 00:50:31.051247  >> Command sent successfully.

 2074 00:50:31.053123  Returned 0 in 0 seconds
 2075 00:50:31.154323  end: 5.1 power-off (duration 00:00:00) [common]
 2077 00:50:31.155890  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2078 00:50:31.157107  Listened to connection for namespace 'common' for up to 1s
 2079 00:50:32.161054  Finalising connection for namespace 'common'
 2080 00:50:32.161239  Disconnecting from shell: Finalise
 2081 00:50:32.261988  end: 5.2 read-feedback (duration 00:00:01) [common]
 2082 00:50:32.262145  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6887882
 2083 00:50:32.267148  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6887882
 2084 00:50:32.267321  JobError: Your job cannot terminate cleanly.