Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 00:36:12.755072 lava-dispatcher, installed at version: 2022.06
2 00:36:12.755265 start: 0 validate
3 00:36:12.755400 Start time: 2022-07-26 00:36:12.755388+00:00 (UTC)
4 00:36:12.755526 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:36:12.755653 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220718.0%2Fx86%2Frootfs.cpio.gz exists
6 00:36:13.043907 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:36:13.044659 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-517-g92709d8ae585%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:36:13.339599 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:36:13.340308 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-517-g92709d8ae585%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:36:13.645780 validate duration: 0.89
12 00:36:13.647124 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:36:13.647731 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:36:13.648245 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:36:13.648755 Not decompressing ramdisk as can be used compressed.
16 00:36:13.649206 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220718.0/x86/rootfs.cpio.gz
17 00:36:13.649592 saving as /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/ramdisk/rootfs.cpio.gz
18 00:36:13.649945 total size: 8416091 (8MB)
19 00:36:13.655509 progress 0% (0MB)
20 00:36:13.667046 progress 5% (0MB)
21 00:36:13.674143 progress 10% (0MB)
22 00:36:13.679495 progress 15% (1MB)
23 00:36:13.683803 progress 20% (1MB)
24 00:36:13.687541 progress 25% (2MB)
25 00:36:13.691005 progress 30% (2MB)
26 00:36:13.693773 progress 35% (2MB)
27 00:36:13.696754 progress 40% (3MB)
28 00:36:13.699539 progress 45% (3MB)
29 00:36:13.702127 progress 50% (4MB)
30 00:36:13.704491 progress 55% (4MB)
31 00:36:13.706834 progress 60% (4MB)
32 00:36:13.708822 progress 65% (5MB)
33 00:36:13.710970 progress 70% (5MB)
34 00:36:13.713000 progress 75% (6MB)
35 00:36:13.715077 progress 80% (6MB)
36 00:36:13.717108 progress 85% (6MB)
37 00:36:13.719185 progress 90% (7MB)
38 00:36:13.721062 progress 95% (7MB)
39 00:36:13.723161 progress 100% (8MB)
40 00:36:13.723431 8MB downloaded in 0.07s (109.21MB/s)
41 00:36:13.723585 end: 1.1.1 http-download (duration 00:00:00) [common]
43 00:36:13.723829 end: 1.1 download-retry (duration 00:00:00) [common]
44 00:36:13.723919 start: 1.2 download-retry (timeout 00:10:00) [common]
45 00:36:13.724006 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 00:36:13.724112 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-517-g92709d8ae585/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:36:13.724183 saving as /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/kernel/bzImage
48 00:36:13.724246 total size: 6811536 (6MB)
49 00:36:13.724306 No compression specified
50 00:36:15.727615 progress 0% (0MB)
51 00:36:15.738042 progress 5% (0MB)
52 00:36:15.747312 progress 10% (0MB)
53 00:36:15.757794 progress 15% (1MB)
54 00:36:15.763952 progress 20% (1MB)
55 00:36:15.768763 progress 25% (1MB)
56 00:36:15.772855 progress 30% (1MB)
57 00:36:15.775917 progress 35% (2MB)
58 00:36:15.779049 progress 40% (2MB)
59 00:36:15.781641 progress 45% (2MB)
60 00:36:15.784171 progress 50% (3MB)
61 00:36:15.786750 progress 55% (3MB)
62 00:36:15.788948 progress 60% (3MB)
63 00:36:15.791184 progress 65% (4MB)
64 00:36:15.793200 progress 70% (4MB)
65 00:36:15.795041 progress 75% (4MB)
66 00:36:15.797085 progress 80% (5MB)
67 00:36:15.798842 progress 85% (5MB)
68 00:36:15.800661 progress 90% (5MB)
69 00:36:15.802355 progress 95% (6MB)
70 00:36:15.804005 progress 100% (6MB)
71 00:36:15.804269 6MB downloaded in 2.08s (3.12MB/s)
72 00:36:15.804418 end: 1.2.1 http-download (duration 00:00:02) [common]
74 00:36:15.804668 end: 1.2 download-retry (duration 00:00:02) [common]
75 00:36:15.804757 start: 1.3 download-retry (timeout 00:09:58) [common]
76 00:36:15.804844 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 00:36:15.804950 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-517-g92709d8ae585/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:36:15.805022 saving as /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/modules/modules.tar
79 00:36:15.805086 total size: 51972 (0MB)
80 00:36:15.805147 Using unxz to decompress xz
81 00:36:15.808372 progress 63% (0MB)
82 00:36:15.808737 progress 100% (0MB)
83 00:36:15.811955 0MB downloaded in 0.01s (7.22MB/s)
84 00:36:15.812182 end: 1.3.1 http-download (duration 00:00:00) [common]
86 00:36:15.812438 end: 1.3 download-retry (duration 00:00:00) [common]
87 00:36:15.812534 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 00:36:15.812629 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 00:36:15.812713 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 00:36:15.812798 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 00:36:15.812966 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm
92 00:36:15.813072 makedir: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin
93 00:36:15.813162 makedir: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/tests
94 00:36:15.813246 makedir: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/results
95 00:36:15.813350 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-add-keys
96 00:36:15.813480 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-add-sources
97 00:36:15.813640 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-background-process-start
98 00:36:15.813755 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-background-process-stop
99 00:36:15.813866 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-common-functions
100 00:36:15.813975 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-echo-ipv4
101 00:36:15.814085 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-install-packages
102 00:36:15.814202 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-installed-packages
103 00:36:15.814315 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-os-build
104 00:36:15.814427 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-probe-channel
105 00:36:15.814545 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-probe-ip
106 00:36:15.814652 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-target-ip
107 00:36:15.814759 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-target-mac
108 00:36:15.814865 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-target-storage
109 00:36:15.814975 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-case
110 00:36:15.815087 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-event
111 00:36:15.815194 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-feedback
112 00:36:15.815302 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-raise
113 00:36:15.815413 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-reference
114 00:36:15.815519 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-runner
115 00:36:15.815629 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-set
116 00:36:15.815736 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-test-shell
117 00:36:15.815844 Updating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-install-packages (oe)
118 00:36:15.815956 Updating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/bin/lava-installed-packages (oe)
119 00:36:15.816055 Creating /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/environment
120 00:36:15.816141 LAVA metadata
121 00:36:15.816212 - LAVA_JOB_ID=6887867
122 00:36:15.816278 - LAVA_DISPATCHER_IP=192.168.201.1
123 00:36:15.816379 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 00:36:15.816444 skipped lava-vland-overlay
125 00:36:15.816522 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 00:36:15.816608 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 00:36:15.816670 skipped lava-multinode-overlay
128 00:36:15.816744 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 00:36:15.816826 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 00:36:15.816900 Loading test definitions
131 00:36:15.816997 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 00:36:15.817072 Using /lava-6887867 at stage 0
133 00:36:15.817341 uuid=6887867_1.4.2.3.1 testdef=None
134 00:36:15.817438 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 00:36:15.817527 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 00:36:15.818111 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 00:36:15.818352 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 00:36:15.818935 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 00:36:15.819176 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 00:36:15.819715 runner path: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/0/tests/0_dmesg test_uuid 6887867_1.4.2.3.1
143 00:36:15.819867 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 00:36:15.820100 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 00:36:15.820174 Using /lava-6887867 at stage 1
147 00:36:15.820420 uuid=6887867_1.4.2.3.5 testdef=None
148 00:36:15.820554 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 00:36:15.820646 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 00:36:15.821086 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 00:36:15.821324 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 00:36:15.821941 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 00:36:15.822182 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 00:36:15.822779 runner path: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/1/tests/1_bootrr test_uuid 6887867_1.4.2.3.5
157 00:36:15.822921 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 00:36:15.823131 Creating lava-test-runner.conf files
160 00:36:15.823194 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/0 for stage 0
161 00:36:15.823273 - 0_dmesg
162 00:36:15.823347 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6887867/lava-overlay-com962bm/lava-6887867/1 for stage 1
163 00:36:15.823428 - 1_bootrr
164 00:36:15.823517 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 00:36:15.823605 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 00:36:15.829640 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 00:36:15.829759 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 00:36:15.829848 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 00:36:15.829934 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 00:36:15.830018 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 00:36:16.011736 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 00:36:16.012077 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 00:36:16.012192 extracting modules file /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6887867/extract-overlay-ramdisk-28z1ceag/ramdisk
174 00:36:16.016256 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 00:36:16.016365 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 00:36:16.016450 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6887867/compress-overlay-ffv81lpx/overlay-1.4.2.4.tar.gz to ramdisk
177 00:36:16.016523 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6887867/compress-overlay-ffv81lpx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6887867/extract-overlay-ramdisk-28z1ceag/ramdisk
178 00:36:16.020216 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 00:36:16.020319 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 00:36:16.020410 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 00:36:16.020499 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 00:36:16.020578 Building ramdisk /var/lib/lava/dispatcher/tmp/6887867/extract-overlay-ramdisk-28z1ceag/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6887867/extract-overlay-ramdisk-28z1ceag/ramdisk
183 00:36:16.083275 >> 48008 blocks
184 00:36:16.852669 rename /var/lib/lava/dispatcher/tmp/6887867/extract-overlay-ramdisk-28z1ceag/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/ramdisk/ramdisk.cpio.gz
185 00:36:16.853072 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 00:36:16.853189 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 00:36:16.853287 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 00:36:16.853378 No mkimage arch provided, not using FIT.
189 00:36:16.853464 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 00:36:16.853547 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 00:36:16.853691 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 00:36:16.853781 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 00:36:16.853855 No LXC device requested
194 00:36:16.853934 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 00:36:16.854039 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 00:36:16.854120 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 00:36:16.854193 Checking files for TFTP limit of 4294967296 bytes.
198 00:36:16.854567 end: 1 tftp-deploy (duration 00:00:03) [common]
199 00:36:16.854670 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 00:36:16.854764 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 00:36:16.854884 substitutions:
202 00:36:16.854949 - {DTB}: None
203 00:36:16.855012 - {INITRD}: 6887867/tftp-deploy-gg3d0iqb/ramdisk/ramdisk.cpio.gz
204 00:36:16.855070 - {KERNEL}: 6887867/tftp-deploy-gg3d0iqb/kernel/bzImage
205 00:36:16.855128 - {LAVA_MAC}: None
206 00:36:16.855183 - {PRESEED_CONFIG}: None
207 00:36:16.855238 - {PRESEED_LOCAL}: None
208 00:36:16.855293 - {RAMDISK}: 6887867/tftp-deploy-gg3d0iqb/ramdisk/ramdisk.cpio.gz
209 00:36:16.855347 - {ROOT_PART}: None
210 00:36:16.855401 - {ROOT}: None
211 00:36:16.855454 - {SERVER_IP}: 192.168.201.1
212 00:36:16.855508 - {TEE}: None
213 00:36:16.855561 Parsed boot commands:
214 00:36:16.855616 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 00:36:16.855764 Parsed boot commands: tftpboot 192.168.201.1 6887867/tftp-deploy-gg3d0iqb/kernel/bzImage 6887867/tftp-deploy-gg3d0iqb/kernel/cmdline 6887867/tftp-deploy-gg3d0iqb/ramdisk/ramdisk.cpio.gz
216 00:36:16.855854 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 00:36:16.855939 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 00:36:16.856044 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 00:36:16.856160 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 00:36:16.856235 Not connected, no need to disconnect.
221 00:36:16.856311 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 00:36:16.856394 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 00:36:16.856461 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
224 00:36:16.859063 Setting prompt string to ['lava-test: # ']
225 00:36:16.859326 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 00:36:16.859427 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 00:36:16.859525 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 00:36:16.859612 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 00:36:16.859785 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
230 00:36:16.878311 >> Command sent successfully.
231 00:36:16.880234 Returned 0 in 0 seconds
232 00:36:16.981510 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 00:36:16.983990 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 00:36:16.984513 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 00:36:16.984943 Setting prompt string to 'Starting depthcharge on Voema...'
237 00:36:16.985279 Changing prompt to 'Starting depthcharge on Voema...'
238 00:36:16.985655 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 00:36:16.986889 [Enter `^Ec?' for help]
240 00:36:24.258956
241 00:36:24.259566
242 00:36:24.268764 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 00:36:24.272034 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 00:36:24.278742 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 00:36:24.282113 CPU: AES supported, TXT NOT supported, VT supported
246 00:36:24.288876 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 00:36:24.295458 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 00:36:24.298860 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 00:36:24.301976 VBOOT: Loading verstage.
250 00:36:24.305208 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 00:36:24.312021 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 00:36:24.314816 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 00:36:24.325504 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 00:36:24.332595 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 00:36:24.333135
256 00:36:24.333639
257 00:36:24.345813 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 00:36:24.359434 Probing TPM: . done!
259 00:36:24.362822 TPM ready after 0 ms
260 00:36:24.366490 Connected to device vid:did:rid of 1ae0:0028:00
261 00:36:24.377322 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 00:36:24.384504 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 00:36:24.387839 Initialized TPM device CR50 revision 0
264 00:36:24.437932 tlcl_send_startup: Startup return code is 0
265 00:36:24.438536 TPM: setup succeeded
266 00:36:24.453690 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 00:36:24.467788 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 00:36:24.480549 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 00:36:24.490003 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 00:36:24.493936 Chrome EC: UHEPI supported
271 00:36:24.496949 Phase 1
272 00:36:24.500133 FMAP: area GBB found @ 1805000 (458752 bytes)
273 00:36:24.510257 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 00:36:24.517085 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 00:36:24.523450 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 00:36:24.530431 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 00:36:24.533658 Recovery requested (1009000e)
278 00:36:24.536721 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 00:36:24.548298 tlcl_extend: response is 0
280 00:36:24.555316 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 00:36:24.564606 tlcl_extend: response is 0
282 00:36:24.571799 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 00:36:24.578365 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 00:36:24.584779 BS: verstage times (exec / console): total (unknown) / 142 ms
285 00:36:24.585301
286 00:36:24.585688
287 00:36:24.597896 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 00:36:24.604444 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 00:36:24.607969 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 00:36:24.611295 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 00:36:24.618162 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 00:36:24.621234 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 00:36:24.624878 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 00:36:24.628150 TCO_STS: 0000 0000
295 00:36:24.631494 GEN_PMCON: d0015038 00002200
296 00:36:24.634629 GBLRST_CAUSE: 00000000 00000000
297 00:36:24.635060 HPR_CAUSE0: 00000000
298 00:36:24.638057 prev_sleep_state 5
299 00:36:24.641072 Boot Count incremented to 10284
300 00:36:24.647943 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 00:36:24.654265 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 00:36:24.661116 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 00:36:24.667454 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 00:36:24.672273 Chrome EC: UHEPI supported
305 00:36:24.678659 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 00:36:24.691837 Probing TPM: done!
307 00:36:24.699487 Connected to device vid:did:rid of 1ae0:0028:00
308 00:36:24.710300 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 00:36:24.716703 Initialized TPM device CR50 revision 0
310 00:36:24.727078 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 00:36:24.733422 MRC: Hash idx 0x100b comparison successful.
312 00:36:24.736765 MRC cache found, size faa8
313 00:36:24.737262 bootmode is set to: 2
314 00:36:24.739954 SPD index = 0
315 00:36:24.746978 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 00:36:24.750184 SPD: module type is LPDDR4X
317 00:36:24.753508 SPD: module part number is MT53E512M64D4NW-046
318 00:36:24.760581 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 00:36:24.763318 SPD: device width 16 bits, bus width 16 bits
320 00:36:24.770384 SPD: module size is 1024 MB (per channel)
321 00:36:25.204741 CBMEM:
322 00:36:25.208266 IMD: root @ 0x76fff000 254 entries.
323 00:36:25.211601 IMD: root @ 0x76ffec00 62 entries.
324 00:36:25.214458 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 00:36:25.221138 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 00:36:25.224404 External stage cache:
327 00:36:25.227962 IMD: root @ 0x7b3ff000 254 entries.
328 00:36:25.231128 IMD: root @ 0x7b3fec00 62 entries.
329 00:36:25.246251 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 00:36:25.252937 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 00:36:25.259625 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 00:36:25.273492 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 00:36:25.277500 cse_lite: Skip switching to RW in the recovery path
334 00:36:25.281028 8 DIMMs found
335 00:36:25.281465 SMM Memory Map
336 00:36:25.284382 SMRAM : 0x7b000000 0x800000
337 00:36:25.287675 Subregion 0: 0x7b000000 0x200000
338 00:36:25.291109 Subregion 1: 0x7b200000 0x200000
339 00:36:25.294290 Subregion 2: 0x7b400000 0x400000
340 00:36:25.297890 top_of_ram = 0x77000000
341 00:36:25.304219 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 00:36:25.307701 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 00:36:25.314389 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 00:36:25.317896 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 00:36:25.327434 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 00:36:25.334080 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 00:36:25.344308 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 00:36:25.347199 Processing 211 relocs. Offset value of 0x74c0b000
349 00:36:25.356258 BS: romstage times (exec / console): total (unknown) / 277 ms
350 00:36:25.362335
351 00:36:25.362419
352 00:36:25.372135 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 00:36:25.375522 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 00:36:25.385709 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 00:36:25.391880 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 00:36:25.398581 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 00:36:25.405549 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 00:36:25.452245 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 00:36:25.458777 Processing 5008 relocs. Offset value of 0x75d98000
360 00:36:25.462019 BS: postcar times (exec / console): total (unknown) / 59 ms
361 00:36:25.465193
362 00:36:25.465278
363 00:36:25.475515 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 00:36:25.475615 Normal boot
365 00:36:25.478609 FW_CONFIG value is 0x804c02
366 00:36:25.482261 PCI: 00:07.0 disabled by fw_config
367 00:36:25.485465 PCI: 00:07.1 disabled by fw_config
368 00:36:25.488968 PCI: 00:0d.2 disabled by fw_config
369 00:36:25.492004 PCI: 00:1c.7 disabled by fw_config
370 00:36:25.498555 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 00:36:25.505416 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 00:36:25.508852 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 00:36:25.512257 GENERIC: 0.0 disabled by fw_config
374 00:36:25.515268 GENERIC: 1.0 disabled by fw_config
375 00:36:25.522343 fw_config match found: DB_USB=USB3_ACTIVE
376 00:36:25.525473 fw_config match found: DB_USB=USB3_ACTIVE
377 00:36:25.528705 fw_config match found: DB_USB=USB3_ACTIVE
378 00:36:25.535028 fw_config match found: DB_USB=USB3_ACTIVE
379 00:36:25.538368 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 00:36:25.545159 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 00:36:25.555044 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 00:36:25.561719 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 00:36:25.564912 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 00:36:25.571689 microcode: Update skipped, already up-to-date
385 00:36:25.578207 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 00:36:25.605898 Detected 4 core, 8 thread CPU.
387 00:36:25.608775 Setting up SMI for CPU
388 00:36:25.612257 IED base = 0x7b400000
389 00:36:25.612343 IED size = 0x00400000
390 00:36:25.615599 Will perform SMM setup.
391 00:36:25.622433 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 00:36:25.629155 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 00:36:25.635478 Processing 16 relocs. Offset value of 0x00030000
394 00:36:25.638899 Attempting to start 7 APs
395 00:36:25.641865 Waiting for 10ms after sending INIT.
396 00:36:25.657993 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 00:36:25.661135 AP: slot 3 apic_id 7.
398 00:36:25.664140 AP: slot 6 apic_id 6.
399 00:36:25.664223 AP: slot 5 apic_id 4.
400 00:36:25.667430 AP: slot 2 apic_id 5.
401 00:36:25.670907 AP: slot 7 apic_id 3.
402 00:36:25.670991 AP: slot 4 apic_id 2.
403 00:36:25.671056 done.
404 00:36:25.677335 Waiting for 2nd SIPI to complete...done.
405 00:36:25.684260 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 00:36:25.690827 Processing 13 relocs. Offset value of 0x00038000
407 00:36:25.694271 Unable to locate Global NVS
408 00:36:25.700779 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 00:36:25.704268 Installing permanent SMM handler to 0x7b000000
410 00:36:25.714142 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 00:36:25.717438 Processing 794 relocs. Offset value of 0x7b010000
412 00:36:25.727601 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 00:36:25.730800 Processing 13 relocs. Offset value of 0x7b008000
414 00:36:25.737794 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 00:36:25.743903 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 00:36:25.747416 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 00:36:25.753992 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 00:36:25.760622 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 00:36:25.767334 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 00:36:25.773696 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 00:36:25.773794 Unable to locate Global NVS
422 00:36:25.783820 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 00:36:25.787463 Clearing SMI status registers
424 00:36:25.787578 SMI_STS: PM1
425 00:36:25.790549 PM1_STS: PWRBTN
426 00:36:25.797162 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 00:36:25.800518 In relocation handler: CPU 0
428 00:36:25.803991 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 00:36:25.811262 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 00:36:25.811471 Relocation complete.
431 00:36:25.820570 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 00:36:25.820980 In relocation handler: CPU 1
433 00:36:25.827844 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 00:36:25.828380 Relocation complete.
435 00:36:25.837444 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 00:36:25.838041 In relocation handler: CPU 7
437 00:36:25.844006 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 00:36:25.844566 Relocation complete.
439 00:36:25.854216 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
440 00:36:25.854699 In relocation handler: CPU 4
441 00:36:25.860569 New SMBASE=0x7afff000 IEDBASE=0x7b400000
442 00:36:25.863463 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 00:36:25.867394 Relocation complete.
444 00:36:25.873728 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
445 00:36:25.876800 In relocation handler: CPU 2
446 00:36:25.880401 New SMBASE=0x7afff800 IEDBASE=0x7b400000
447 00:36:25.883798 Relocation complete.
448 00:36:25.890406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 00:36:25.893630 In relocation handler: CPU 3
450 00:36:25.897164 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 00:36:25.900569 Relocation complete.
452 00:36:25.906911 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 00:36:25.910428 In relocation handler: CPU 6
454 00:36:25.913917 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 00:36:25.917109 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 00:36:25.920636 Relocation complete.
457 00:36:25.927465 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 00:36:25.930145 In relocation handler: CPU 5
459 00:36:25.933687 New SMBASE=0x7affec00 IEDBASE=0x7b400000
460 00:36:25.941693 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 00:36:25.942203 Relocation complete.
462 00:36:25.944930 Initializing CPU #0
463 00:36:25.948477 CPU: vendor Intel device 806c1
464 00:36:25.951796 CPU: family 06, model 8c, stepping 01
465 00:36:25.954963 Clearing out pending MCEs
466 00:36:25.955394 Setting up local APIC...
467 00:36:25.958119 apic_id: 0x00 done.
468 00:36:25.962087 Turbo is available but hidden
469 00:36:25.964946 Turbo is available and visible
470 00:36:25.968493 microcode: Update skipped, already up-to-date
471 00:36:25.971501 CPU #0 initialized
472 00:36:25.974801 Initializing CPU #5
473 00:36:25.975331 Initializing CPU #2
474 00:36:25.978090 CPU: vendor Intel device 806c1
475 00:36:25.981422 CPU: family 06, model 8c, stepping 01
476 00:36:25.984521 CPU: vendor Intel device 806c1
477 00:36:25.991329 CPU: family 06, model 8c, stepping 01
478 00:36:25.991766 Initializing CPU #7
479 00:36:25.994642 Initializing CPU #4
480 00:36:25.998161 CPU: vendor Intel device 806c1
481 00:36:26.001163 CPU: family 06, model 8c, stepping 01
482 00:36:26.004479 CPU: vendor Intel device 806c1
483 00:36:26.007683 CPU: family 06, model 8c, stepping 01
484 00:36:26.011345 Clearing out pending MCEs
485 00:36:26.014884 Clearing out pending MCEs
486 00:36:26.015359 Setting up local APIC...
487 00:36:26.018059 Clearing out pending MCEs
488 00:36:26.021199 Clearing out pending MCEs
489 00:36:26.021671 Initializing CPU #3
490 00:36:26.024701 Initializing CPU #6
491 00:36:26.028076 CPU: vendor Intel device 806c1
492 00:36:26.031408 CPU: family 06, model 8c, stepping 01
493 00:36:26.034417 Setting up local APIC...
494 00:36:26.037747 apic_id: 0x03 done.
495 00:36:26.038213 Setting up local APIC...
496 00:36:26.041244 Setting up local APIC...
497 00:36:26.044626 Clearing out pending MCEs
498 00:36:26.047915 CPU: vendor Intel device 806c1
499 00:36:26.050977 CPU: family 06, model 8c, stepping 01
500 00:36:26.054612 Clearing out pending MCEs
501 00:36:26.057599 Setting up local APIC...
502 00:36:26.058059 Initializing CPU #1
503 00:36:26.060789 Setting up local APIC...
504 00:36:26.064215 apic_id: 0x04 done.
505 00:36:26.064701 apic_id: 0x05 done.
506 00:36:26.070729 microcode: Update skipped, already up-to-date
507 00:36:26.074329 microcode: Update skipped, already up-to-date
508 00:36:26.077381 CPU #5 initialized
509 00:36:26.077914 CPU #2 initialized
510 00:36:26.080794 CPU: vendor Intel device 806c1
511 00:36:26.083793 CPU: family 06, model 8c, stepping 01
512 00:36:26.087632 apic_id: 0x06 done.
513 00:36:26.090725 apic_id: 0x07 done.
514 00:36:26.094230 microcode: Update skipped, already up-to-date
515 00:36:26.097217 microcode: Update skipped, already up-to-date
516 00:36:26.100643 CPU #6 initialized
517 00:36:26.103948 CPU #3 initialized
518 00:36:26.104428 apic_id: 0x02 done.
519 00:36:26.110688 microcode: Update skipped, already up-to-date
520 00:36:26.113856 microcode: Update skipped, already up-to-date
521 00:36:26.116885 CPU #7 initialized
522 00:36:26.116968 CPU #4 initialized
523 00:36:26.120063 Clearing out pending MCEs
524 00:36:26.123558 Setting up local APIC...
525 00:36:26.123642 apic_id: 0x01 done.
526 00:36:26.130445 microcode: Update skipped, already up-to-date
527 00:36:26.130540 CPU #1 initialized
528 00:36:26.137062 bsp_do_flight_plan done after 455 msecs.
529 00:36:26.140433 CPU: frequency set to 4000 MHz
530 00:36:26.140866 Enabling SMIs.
531 00:36:26.147027 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
532 00:36:26.163052 SATAXPCIE1 indicates PCIe NVMe is present
533 00:36:26.166604 Probing TPM: done!
534 00:36:26.169687 Connected to device vid:did:rid of 1ae0:0028:00
535 00:36:26.180627 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 00:36:26.183939 Initialized TPM device CR50 revision 0
537 00:36:26.187228 Enabling S0i3.4
538 00:36:26.193597 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 00:36:26.197341 Found a VBT of 8704 bytes after decompression
540 00:36:26.203606 cse_lite: CSE RO boot. HybridStorageMode disabled
541 00:36:26.210312 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 00:36:26.286360 FSPS returned 0
543 00:36:26.289654 Executing Phase 1 of FspMultiPhaseSiInit
544 00:36:26.299392 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 00:36:26.302469 port C0 DISC req: usage 1 usb3 1 usb2 5
546 00:36:26.305997 Raw Buffer output 0 00000511
547 00:36:26.309037 Raw Buffer output 1 00000000
548 00:36:26.312939 pmc_send_ipc_cmd succeeded
549 00:36:26.319761 port C1 DISC req: usage 1 usb3 2 usb2 3
550 00:36:26.319852 Raw Buffer output 0 00000321
551 00:36:26.323265 Raw Buffer output 1 00000000
552 00:36:26.326998 pmc_send_ipc_cmd succeeded
553 00:36:26.331902 Detected 4 core, 8 thread CPU.
554 00:36:26.335622 Detected 4 core, 8 thread CPU.
555 00:36:26.569719 Display FSP Version Info HOB
556 00:36:26.572965 Reference Code - CPU = a.0.4c.31
557 00:36:26.576212 uCode Version = 0.0.0.86
558 00:36:26.579247 TXT ACM version = ff.ff.ff.ffff
559 00:36:26.582618 Reference Code - ME = a.0.4c.31
560 00:36:26.585784 MEBx version = 0.0.0.0
561 00:36:26.589506 ME Firmware Version = Consumer SKU
562 00:36:26.592715 Reference Code - PCH = a.0.4c.31
563 00:36:26.595769 PCH-CRID Status = Disabled
564 00:36:26.598988 PCH-CRID Original Value = ff.ff.ff.ffff
565 00:36:26.602700 PCH-CRID New Value = ff.ff.ff.ffff
566 00:36:26.606275 OPROM - RST - RAID = ff.ff.ff.ffff
567 00:36:26.609016 PCH Hsio Version = 4.0.0.0
568 00:36:26.612556 Reference Code - SA - System Agent = a.0.4c.31
569 00:36:26.615767 Reference Code - MRC = 2.0.0.1
570 00:36:26.619400 SA - PCIe Version = a.0.4c.31
571 00:36:26.622379 SA-CRID Status = Disabled
572 00:36:26.626038 SA-CRID Original Value = 0.0.0.1
573 00:36:26.629402 SA-CRID New Value = 0.0.0.1
574 00:36:26.632810 OPROM - VBIOS = ff.ff.ff.ffff
575 00:36:26.636216 IO Manageability Engine FW Version = 11.1.4.0
576 00:36:26.639371 PHY Build Version = 0.0.0.e0
577 00:36:26.642157 Thunderbolt(TM) FW Version = 0.0.0.0
578 00:36:26.648876 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 00:36:26.652097 ITSS IRQ Polarities Before:
580 00:36:26.652576 IPC0: 0xffffffff
581 00:36:26.655734 IPC1: 0xffffffff
582 00:36:26.656305 IPC2: 0xffffffff
583 00:36:26.659365 IPC3: 0xffffffff
584 00:36:26.662595 ITSS IRQ Polarities After:
585 00:36:26.663095 IPC0: 0xffffffff
586 00:36:26.665534 IPC1: 0xffffffff
587 00:36:26.666047 IPC2: 0xffffffff
588 00:36:26.668757 IPC3: 0xffffffff
589 00:36:26.673001 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 00:36:26.685292 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 00:36:26.695737 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 00:36:26.708582 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 00:36:26.714909 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
594 00:36:26.718281 Enumerating buses...
595 00:36:26.721649 Show all devs... Before device enumeration.
596 00:36:26.725103 Root Device: enabled 1
597 00:36:26.725534 DOMAIN: 0000: enabled 1
598 00:36:26.728455 CPU_CLUSTER: 0: enabled 1
599 00:36:26.731745 PCI: 00:00.0: enabled 1
600 00:36:26.735025 PCI: 00:02.0: enabled 1
601 00:36:26.735562 PCI: 00:04.0: enabled 1
602 00:36:26.738231 PCI: 00:05.0: enabled 1
603 00:36:26.741591 PCI: 00:06.0: enabled 0
604 00:36:26.745028 PCI: 00:07.0: enabled 0
605 00:36:26.745509 PCI: 00:07.1: enabled 0
606 00:36:26.748365 PCI: 00:07.2: enabled 0
607 00:36:26.751397 PCI: 00:07.3: enabled 0
608 00:36:26.755253 PCI: 00:08.0: enabled 1
609 00:36:26.755877 PCI: 00:09.0: enabled 0
610 00:36:26.758431 PCI: 00:0a.0: enabled 0
611 00:36:26.761342 PCI: 00:0d.0: enabled 1
612 00:36:26.765056 PCI: 00:0d.1: enabled 0
613 00:36:26.765537 PCI: 00:0d.2: enabled 0
614 00:36:26.768224 PCI: 00:0d.3: enabled 0
615 00:36:26.771406 PCI: 00:0e.0: enabled 0
616 00:36:26.771910 PCI: 00:10.2: enabled 1
617 00:36:26.774954 PCI: 00:10.6: enabled 0
618 00:36:26.778168 PCI: 00:10.7: enabled 0
619 00:36:26.781375 PCI: 00:12.0: enabled 0
620 00:36:26.781894 PCI: 00:12.6: enabled 0
621 00:36:26.785016 PCI: 00:13.0: enabled 0
622 00:36:26.787958 PCI: 00:14.0: enabled 1
623 00:36:26.791838 PCI: 00:14.1: enabled 0
624 00:36:26.792370 PCI: 00:14.2: enabled 1
625 00:36:26.794901 PCI: 00:14.3: enabled 1
626 00:36:26.798141 PCI: 00:15.0: enabled 1
627 00:36:26.801650 PCI: 00:15.1: enabled 1
628 00:36:26.802228 PCI: 00:15.2: enabled 1
629 00:36:26.805102 PCI: 00:15.3: enabled 1
630 00:36:26.808743 PCI: 00:16.0: enabled 1
631 00:36:26.809329 PCI: 00:16.1: enabled 0
632 00:36:26.811479 PCI: 00:16.2: enabled 0
633 00:36:26.814992 PCI: 00:16.3: enabled 0
634 00:36:26.817994 PCI: 00:16.4: enabled 0
635 00:36:26.818633 PCI: 00:16.5: enabled 0
636 00:36:26.821266 PCI: 00:17.0: enabled 1
637 00:36:26.824608 PCI: 00:19.0: enabled 0
638 00:36:26.828038 PCI: 00:19.1: enabled 1
639 00:36:26.828512 PCI: 00:19.2: enabled 0
640 00:36:26.831548 PCI: 00:1c.0: enabled 1
641 00:36:26.834738 PCI: 00:1c.1: enabled 0
642 00:36:26.838178 PCI: 00:1c.2: enabled 0
643 00:36:26.838653 PCI: 00:1c.3: enabled 0
644 00:36:26.841623 PCI: 00:1c.4: enabled 0
645 00:36:26.844628 PCI: 00:1c.5: enabled 0
646 00:36:26.847837 PCI: 00:1c.6: enabled 1
647 00:36:26.848350 PCI: 00:1c.7: enabled 0
648 00:36:26.851335 PCI: 00:1d.0: enabled 1
649 00:36:26.854764 PCI: 00:1d.1: enabled 0
650 00:36:26.855241 PCI: 00:1d.2: enabled 1
651 00:36:26.857991 PCI: 00:1d.3: enabled 0
652 00:36:26.861076 PCI: 00:1e.0: enabled 1
653 00:36:26.864716 PCI: 00:1e.1: enabled 0
654 00:36:26.865298 PCI: 00:1e.2: enabled 1
655 00:36:26.868253 PCI: 00:1e.3: enabled 1
656 00:36:26.871192 PCI: 00:1f.0: enabled 1
657 00:36:26.874880 PCI: 00:1f.1: enabled 0
658 00:36:26.875465 PCI: 00:1f.2: enabled 1
659 00:36:26.877769 PCI: 00:1f.3: enabled 1
660 00:36:26.880993 PCI: 00:1f.4: enabled 0
661 00:36:26.884401 PCI: 00:1f.5: enabled 1
662 00:36:26.884878 PCI: 00:1f.6: enabled 0
663 00:36:26.888343 PCI: 00:1f.7: enabled 0
664 00:36:26.891417 APIC: 00: enabled 1
665 00:36:26.891913 GENERIC: 0.0: enabled 1
666 00:36:26.894561 GENERIC: 0.0: enabled 1
667 00:36:26.897913 GENERIC: 1.0: enabled 1
668 00:36:26.900804 GENERIC: 0.0: enabled 1
669 00:36:26.900889 GENERIC: 1.0: enabled 1
670 00:36:26.904073 USB0 port 0: enabled 1
671 00:36:26.907075 GENERIC: 0.0: enabled 1
672 00:36:26.907160 USB0 port 0: enabled 1
673 00:36:26.910663 GENERIC: 0.0: enabled 1
674 00:36:26.914166 I2C: 00:1a: enabled 1
675 00:36:26.917560 I2C: 00:31: enabled 1
676 00:36:26.917649 I2C: 00:32: enabled 1
677 00:36:26.920402 I2C: 00:10: enabled 1
678 00:36:26.923666 I2C: 00:15: enabled 1
679 00:36:26.923751 GENERIC: 0.0: enabled 0
680 00:36:26.927152 GENERIC: 1.0: enabled 0
681 00:36:26.930308 GENERIC: 0.0: enabled 1
682 00:36:26.930394 SPI: 00: enabled 1
683 00:36:26.933944 SPI: 00: enabled 1
684 00:36:26.937211 PNP: 0c09.0: enabled 1
685 00:36:26.937295 GENERIC: 0.0: enabled 1
686 00:36:26.940239 USB3 port 0: enabled 1
687 00:36:26.943904 USB3 port 1: enabled 1
688 00:36:26.947359 USB3 port 2: enabled 0
689 00:36:26.947444 USB3 port 3: enabled 0
690 00:36:26.950505 USB2 port 0: enabled 0
691 00:36:26.953909 USB2 port 1: enabled 1
692 00:36:26.953994 USB2 port 2: enabled 1
693 00:36:26.956795 USB2 port 3: enabled 0
694 00:36:26.960184 USB2 port 4: enabled 1
695 00:36:26.960269 USB2 port 5: enabled 0
696 00:36:26.963611 USB2 port 6: enabled 0
697 00:36:26.966989 USB2 port 7: enabled 0
698 00:36:26.970559 USB2 port 8: enabled 0
699 00:36:26.970644 USB2 port 9: enabled 0
700 00:36:26.973823 USB3 port 0: enabled 0
701 00:36:26.976905 USB3 port 1: enabled 1
702 00:36:26.976990 USB3 port 2: enabled 0
703 00:36:26.980370 USB3 port 3: enabled 0
704 00:36:26.983664 GENERIC: 0.0: enabled 1
705 00:36:26.986824 GENERIC: 1.0: enabled 1
706 00:36:26.986910 APIC: 01: enabled 1
707 00:36:26.990206 APIC: 05: enabled 1
708 00:36:26.990320 APIC: 07: enabled 1
709 00:36:26.993597 APIC: 02: enabled 1
710 00:36:26.997043 APIC: 04: enabled 1
711 00:36:26.997128 APIC: 06: enabled 1
712 00:36:26.999925 APIC: 03: enabled 1
713 00:36:27.003689 Compare with tree...
714 00:36:27.003775 Root Device: enabled 1
715 00:36:27.007067 DOMAIN: 0000: enabled 1
716 00:36:27.010883 PCI: 00:00.0: enabled 1
717 00:36:27.013427 PCI: 00:02.0: enabled 1
718 00:36:27.013514 PCI: 00:04.0: enabled 1
719 00:36:27.016773 GENERIC: 0.0: enabled 1
720 00:36:27.020182 PCI: 00:05.0: enabled 1
721 00:36:27.023301 PCI: 00:06.0: enabled 0
722 00:36:27.026675 PCI: 00:07.0: enabled 0
723 00:36:27.026758 GENERIC: 0.0: enabled 1
724 00:36:27.030173 PCI: 00:07.1: enabled 0
725 00:36:27.033602 GENERIC: 1.0: enabled 1
726 00:36:27.036942 PCI: 00:07.2: enabled 0
727 00:36:27.040317 GENERIC: 0.0: enabled 1
728 00:36:27.040400 PCI: 00:07.3: enabled 0
729 00:36:27.043332 GENERIC: 1.0: enabled 1
730 00:36:27.046816 PCI: 00:08.0: enabled 1
731 00:36:27.050212 PCI: 00:09.0: enabled 0
732 00:36:27.053207 PCI: 00:0a.0: enabled 0
733 00:36:27.053290 PCI: 00:0d.0: enabled 1
734 00:36:27.056555 USB0 port 0: enabled 1
735 00:36:27.060453 USB3 port 0: enabled 1
736 00:36:27.063376 USB3 port 1: enabled 1
737 00:36:27.066798 USB3 port 2: enabled 0
738 00:36:27.069777 USB3 port 3: enabled 0
739 00:36:27.069859 PCI: 00:0d.1: enabled 0
740 00:36:27.073218 PCI: 00:0d.2: enabled 0
741 00:36:27.076668 GENERIC: 0.0: enabled 1
742 00:36:27.080081 PCI: 00:0d.3: enabled 0
743 00:36:27.082985 PCI: 00:0e.0: enabled 0
744 00:36:27.083068 PCI: 00:10.2: enabled 1
745 00:36:27.086409 PCI: 00:10.6: enabled 0
746 00:36:27.090269 PCI: 00:10.7: enabled 0
747 00:36:27.093048 PCI: 00:12.0: enabled 0
748 00:36:27.096462 PCI: 00:12.6: enabled 0
749 00:36:27.096545 PCI: 00:13.0: enabled 0
750 00:36:27.099913 PCI: 00:14.0: enabled 1
751 00:36:27.103164 USB0 port 0: enabled 1
752 00:36:27.106517 USB2 port 0: enabled 0
753 00:36:27.109856 USB2 port 1: enabled 1
754 00:36:27.109939 USB2 port 2: enabled 1
755 00:36:27.112970 USB2 port 3: enabled 0
756 00:36:27.116285 USB2 port 4: enabled 1
757 00:36:27.119785 USB2 port 5: enabled 0
758 00:36:27.123494 USB2 port 6: enabled 0
759 00:36:27.126802 USB2 port 7: enabled 0
760 00:36:27.126967 USB2 port 8: enabled 0
761 00:36:27.130195 USB2 port 9: enabled 0
762 00:36:27.133464 USB3 port 0: enabled 0
763 00:36:27.136676 USB3 port 1: enabled 1
764 00:36:27.139994 USB3 port 2: enabled 0
765 00:36:27.140187 USB3 port 3: enabled 0
766 00:36:27.143255 PCI: 00:14.1: enabled 0
767 00:36:27.146556 PCI: 00:14.2: enabled 1
768 00:36:27.149556 PCI: 00:14.3: enabled 1
769 00:36:27.152905 GENERIC: 0.0: enabled 1
770 00:36:27.153042 PCI: 00:15.0: enabled 1
771 00:36:27.156971 I2C: 00:1a: enabled 1
772 00:36:27.159711 I2C: 00:31: enabled 1
773 00:36:27.163267 I2C: 00:32: enabled 1
774 00:36:27.166674 PCI: 00:15.1: enabled 1
775 00:36:27.166877 I2C: 00:10: enabled 1
776 00:36:27.169924 PCI: 00:15.2: enabled 1
777 00:36:27.173555 PCI: 00:15.3: enabled 1
778 00:36:27.176749 PCI: 00:16.0: enabled 1
779 00:36:27.177068 PCI: 00:16.1: enabled 0
780 00:36:27.180295 PCI: 00:16.2: enabled 0
781 00:36:27.184409 PCI: 00:16.3: enabled 0
782 00:36:27.187603 PCI: 00:16.4: enabled 0
783 00:36:27.188112 PCI: 00:16.5: enabled 0
784 00:36:27.191361 PCI: 00:17.0: enabled 1
785 00:36:27.194480 PCI: 00:19.0: enabled 0
786 00:36:27.198085 PCI: 00:19.1: enabled 1
787 00:36:27.198715 I2C: 00:15: enabled 1
788 00:36:27.201179 PCI: 00:19.2: enabled 0
789 00:36:27.204660 PCI: 00:1d.0: enabled 1
790 00:36:27.207782 GENERIC: 0.0: enabled 1
791 00:36:27.211277 PCI: 00:1e.0: enabled 1
792 00:36:27.211778 PCI: 00:1e.1: enabled 0
793 00:36:27.214497 PCI: 00:1e.2: enabled 1
794 00:36:27.218059 SPI: 00: enabled 1
795 00:36:27.220813 PCI: 00:1e.3: enabled 1
796 00:36:27.221266 SPI: 00: enabled 1
797 00:36:27.224844 PCI: 00:1f.0: enabled 1
798 00:36:27.275685 PNP: 0c09.0: enabled 1
799 00:36:27.276259 PCI: 00:1f.1: enabled 0
800 00:36:27.276746 PCI: 00:1f.2: enabled 1
801 00:36:27.277126 GENERIC: 0.0: enabled 1
802 00:36:27.277558 GENERIC: 0.0: enabled 1
803 00:36:27.278028 GENERIC: 1.0: enabled 1
804 00:36:27.278400 PCI: 00:1f.3: enabled 1
805 00:36:27.279227 PCI: 00:1f.4: enabled 0
806 00:36:27.279711 PCI: 00:1f.5: enabled 1
807 00:36:27.280073 PCI: 00:1f.6: enabled 0
808 00:36:27.280421 PCI: 00:1f.7: enabled 0
809 00:36:27.280749 CPU_CLUSTER: 0: enabled 1
810 00:36:27.281070 APIC: 00: enabled 1
811 00:36:27.281391 APIC: 01: enabled 1
812 00:36:27.281757 APIC: 05: enabled 1
813 00:36:27.282075 APIC: 07: enabled 1
814 00:36:27.282390 APIC: 02: enabled 1
815 00:36:27.282704 APIC: 04: enabled 1
816 00:36:27.283028 APIC: 06: enabled 1
817 00:36:27.283335 APIC: 03: enabled 1
818 00:36:27.326303 Root Device scanning...
819 00:36:27.326815 scan_static_bus for Root Device
820 00:36:27.327651 DOMAIN: 0000 enabled
821 00:36:27.328085 CPU_CLUSTER: 0 enabled
822 00:36:27.328426 DOMAIN: 0000 scanning...
823 00:36:27.328798 PCI: pci_scan_bus for bus 00
824 00:36:27.329108 PCI: 00:00.0 [8086/0000] ops
825 00:36:27.329405 PCI: 00:00.0 [8086/9a12] enabled
826 00:36:27.329760 PCI: 00:02.0 [8086/0000] bus ops
827 00:36:27.330442 PCI: 00:02.0 [8086/9a40] enabled
828 00:36:27.330773 PCI: 00:04.0 [8086/0000] bus ops
829 00:36:27.331087 PCI: 00:04.0 [8086/9a03] enabled
830 00:36:27.331394 PCI: 00:05.0 [8086/9a19] enabled
831 00:36:27.331685 PCI: 00:07.0 [0000/0000] hidden
832 00:36:27.331969 PCI: 00:08.0 [8086/9a11] enabled
833 00:36:27.332253 PCI: 00:0a.0 [8086/9a0d] disabled
834 00:36:27.372683 PCI: 00:0d.0 [8086/0000] bus ops
835 00:36:27.373327 PCI: 00:0d.0 [8086/9a13] enabled
836 00:36:27.373842 PCI: 00:14.0 [8086/0000] bus ops
837 00:36:27.374220 PCI: 00:14.0 [8086/a0ed] enabled
838 00:36:27.374970 PCI: 00:14.2 [8086/a0ef] enabled
839 00:36:27.375351 PCI: 00:14.3 [8086/0000] bus ops
840 00:36:27.375691 PCI: 00:14.3 [8086/a0f0] enabled
841 00:36:27.376025 PCI: 00:15.0 [8086/0000] bus ops
842 00:36:27.376351 PCI: 00:15.0 [8086/a0e8] enabled
843 00:36:27.376669 PCI: 00:15.1 [8086/0000] bus ops
844 00:36:27.376985 PCI: 00:15.1 [8086/a0e9] enabled
845 00:36:27.377299 PCI: 00:15.2 [8086/0000] bus ops
846 00:36:27.377754 PCI: 00:15.2 [8086/a0ea] enabled
847 00:36:27.378458 PCI: 00:15.3 [8086/0000] bus ops
848 00:36:27.378830 PCI: 00:15.3 [8086/a0eb] enabled
849 00:36:27.380525 PCI: 00:16.0 [8086/0000] ops
850 00:36:27.381005 PCI: 00:16.0 [8086/a0e0] enabled
851 00:36:27.386924 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 00:36:27.389803 PCI: 00:19.0 [8086/0000] bus ops
853 00:36:27.393167 PCI: 00:19.0 [8086/a0c5] disabled
854 00:36:27.396617 PCI: 00:19.1 [8086/0000] bus ops
855 00:36:27.400026 PCI: 00:19.1 [8086/a0c6] enabled
856 00:36:27.403477 PCI: 00:1d.0 [8086/0000] bus ops
857 00:36:27.406356 PCI: 00:1d.0 [8086/a0b0] enabled
858 00:36:27.409818 PCI: 00:1e.0 [8086/0000] ops
859 00:36:27.413333 PCI: 00:1e.0 [8086/a0a8] enabled
860 00:36:27.416734 PCI: 00:1e.2 [8086/0000] bus ops
861 00:36:27.419863 PCI: 00:1e.2 [8086/a0aa] enabled
862 00:36:27.423174 PCI: 00:1e.3 [8086/0000] bus ops
863 00:36:27.426671 PCI: 00:1e.3 [8086/a0ab] enabled
864 00:36:27.430032 PCI: 00:1f.0 [8086/0000] bus ops
865 00:36:27.433502 PCI: 00:1f.0 [8086/a087] enabled
866 00:36:27.436618 RTC Init
867 00:36:27.439947 Set power on after power failure.
868 00:36:27.440189 Disabling Deep S3
869 00:36:27.443136 Disabling Deep S3
870 00:36:27.443369 Disabling Deep S4
871 00:36:27.446473 Disabling Deep S4
872 00:36:27.446771 Disabling Deep S5
873 00:36:27.449868 Disabling Deep S5
874 00:36:27.453094 PCI: 00:1f.2 [0000/0000] hidden
875 00:36:27.456516 PCI: 00:1f.3 [8086/0000] bus ops
876 00:36:27.459993 PCI: 00:1f.3 [8086/a0c8] enabled
877 00:36:27.463578 PCI: 00:1f.5 [8086/0000] bus ops
878 00:36:27.466664 PCI: 00:1f.5 [8086/a0a4] enabled
879 00:36:27.470128 PCI: Leftover static devices:
880 00:36:27.470608 PCI: 00:10.2
881 00:36:27.473341 PCI: 00:10.6
882 00:36:27.473858 PCI: 00:10.7
883 00:36:27.477046 PCI: 00:06.0
884 00:36:27.477517 PCI: 00:07.1
885 00:36:27.477964 PCI: 00:07.2
886 00:36:27.479850 PCI: 00:07.3
887 00:36:27.480274 PCI: 00:09.0
888 00:36:27.483517 PCI: 00:0d.1
889 00:36:27.484068 PCI: 00:0d.2
890 00:36:27.484587 PCI: 00:0d.3
891 00:36:27.486857 PCI: 00:0e.0
892 00:36:27.487288 PCI: 00:12.0
893 00:36:27.490160 PCI: 00:12.6
894 00:36:27.490587 PCI: 00:13.0
895 00:36:27.493536 PCI: 00:14.1
896 00:36:27.493985 PCI: 00:16.1
897 00:36:27.494325 PCI: 00:16.2
898 00:36:27.496661 PCI: 00:16.3
899 00:36:27.497164 PCI: 00:16.4
900 00:36:27.499861 PCI: 00:16.5
901 00:36:27.500292 PCI: 00:17.0
902 00:36:27.500631 PCI: 00:19.2
903 00:36:27.503088 PCI: 00:1e.1
904 00:36:27.503515 PCI: 00:1f.1
905 00:36:27.506485 PCI: 00:1f.4
906 00:36:27.506913 PCI: 00:1f.6
907 00:36:27.507251 PCI: 00:1f.7
908 00:36:27.509957 PCI: Check your devicetree.cb.
909 00:36:27.513354 PCI: 00:02.0 scanning...
910 00:36:27.516650 scan_generic_bus for PCI: 00:02.0
911 00:36:27.519632 scan_generic_bus for PCI: 00:02.0 done
912 00:36:27.526690 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 00:36:27.529896 PCI: 00:04.0 scanning...
914 00:36:27.533394 scan_generic_bus for PCI: 00:04.0
915 00:36:27.533859 GENERIC: 0.0 enabled
916 00:36:27.539689 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 00:36:27.546379 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 00:36:27.546809 PCI: 00:0d.0 scanning...
919 00:36:27.550000 scan_static_bus for PCI: 00:0d.0
920 00:36:27.553141 USB0 port 0 enabled
921 00:36:27.556098 USB0 port 0 scanning...
922 00:36:27.559643 scan_static_bus for USB0 port 0
923 00:36:27.562949 USB3 port 0 enabled
924 00:36:27.563396 USB3 port 1 enabled
925 00:36:27.566249 USB3 port 2 disabled
926 00:36:27.566677 USB3 port 3 disabled
927 00:36:27.569789 USB3 port 0 scanning...
928 00:36:27.573133 scan_static_bus for USB3 port 0
929 00:36:27.576509 scan_static_bus for USB3 port 0 done
930 00:36:27.582848 scan_bus: bus USB3 port 0 finished in 6 msecs
931 00:36:27.583289 USB3 port 1 scanning...
932 00:36:27.586089 scan_static_bus for USB3 port 1
933 00:36:27.592949 scan_static_bus for USB3 port 1 done
934 00:36:27.596089 scan_bus: bus USB3 port 1 finished in 6 msecs
935 00:36:27.599840 scan_static_bus for USB0 port 0 done
936 00:36:27.603098 scan_bus: bus USB0 port 0 finished in 43 msecs
937 00:36:27.610324 scan_static_bus for PCI: 00:0d.0 done
938 00:36:27.612977 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 00:36:27.616163 PCI: 00:14.0 scanning...
940 00:36:27.619718 scan_static_bus for PCI: 00:14.0
941 00:36:27.622951 USB0 port 0 enabled
942 00:36:27.623413 USB0 port 0 scanning...
943 00:36:27.626043 scan_static_bus for USB0 port 0
944 00:36:27.628968 USB2 port 0 disabled
945 00:36:27.632450 USB2 port 1 enabled
946 00:36:27.632534 USB2 port 2 enabled
947 00:36:27.635812 USB2 port 3 disabled
948 00:36:27.635896 USB2 port 4 enabled
949 00:36:27.638824 USB2 port 5 disabled
950 00:36:27.642433 USB2 port 6 disabled
951 00:36:27.642518 USB2 port 7 disabled
952 00:36:27.645741 USB2 port 8 disabled
953 00:36:27.649146 USB2 port 9 disabled
954 00:36:27.649230 USB3 port 0 disabled
955 00:36:27.652365 USB3 port 1 enabled
956 00:36:27.655595 USB3 port 2 disabled
957 00:36:27.655679 USB3 port 3 disabled
958 00:36:27.659151 USB2 port 1 scanning...
959 00:36:27.662587 scan_static_bus for USB2 port 1
960 00:36:27.665920 scan_static_bus for USB2 port 1 done
961 00:36:27.672384 scan_bus: bus USB2 port 1 finished in 6 msecs
962 00:36:27.672564 USB2 port 2 scanning...
963 00:36:27.676061 scan_static_bus for USB2 port 2
964 00:36:27.679080 scan_static_bus for USB2 port 2 done
965 00:36:27.685998 scan_bus: bus USB2 port 2 finished in 6 msecs
966 00:36:27.688889 USB2 port 4 scanning...
967 00:36:27.692286 scan_static_bus for USB2 port 4
968 00:36:27.695645 scan_static_bus for USB2 port 4 done
969 00:36:27.698917 scan_bus: bus USB2 port 4 finished in 6 msecs
970 00:36:27.702386 USB3 port 1 scanning...
971 00:36:27.705616 scan_static_bus for USB3 port 1
972 00:36:27.709076 scan_static_bus for USB3 port 1 done
973 00:36:27.712047 scan_bus: bus USB3 port 1 finished in 6 msecs
974 00:36:27.719190 scan_static_bus for USB0 port 0 done
975 00:36:27.722425 scan_bus: bus USB0 port 0 finished in 93 msecs
976 00:36:27.725408 scan_static_bus for PCI: 00:14.0 done
977 00:36:27.732156 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 00:36:27.732634 PCI: 00:14.3 scanning...
979 00:36:27.735483 scan_static_bus for PCI: 00:14.3
980 00:36:27.738787 GENERIC: 0.0 enabled
981 00:36:27.742114 scan_static_bus for PCI: 00:14.3 done
982 00:36:27.748495 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 00:36:27.748975 PCI: 00:15.0 scanning...
984 00:36:27.752038 scan_static_bus for PCI: 00:15.0
985 00:36:27.756019 I2C: 00:1a enabled
986 00:36:27.759482 I2C: 00:31 enabled
987 00:36:27.759961 I2C: 00:32 enabled
988 00:36:27.763053 scan_static_bus for PCI: 00:15.0 done
989 00:36:27.769291 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 00:36:27.769747 PCI: 00:15.1 scanning...
991 00:36:27.772713 scan_static_bus for PCI: 00:15.1
992 00:36:27.776116 I2C: 00:10 enabled
993 00:36:27.779316 scan_static_bus for PCI: 00:15.1 done
994 00:36:27.785932 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 00:36:27.786368 PCI: 00:15.2 scanning...
996 00:36:27.789433 scan_static_bus for PCI: 00:15.2
997 00:36:27.795721 scan_static_bus for PCI: 00:15.2 done
998 00:36:27.799391 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 00:36:27.802603 PCI: 00:15.3 scanning...
1000 00:36:27.805897 scan_static_bus for PCI: 00:15.3
1001 00:36:27.809416 scan_static_bus for PCI: 00:15.3 done
1002 00:36:27.812690 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 00:36:27.816015 PCI: 00:19.1 scanning...
1004 00:36:27.819260 scan_static_bus for PCI: 00:19.1
1005 00:36:27.822726 I2C: 00:15 enabled
1006 00:36:27.826023 scan_static_bus for PCI: 00:19.1 done
1007 00:36:27.829721 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 00:36:27.832391 PCI: 00:1d.0 scanning...
1009 00:36:27.836067 do_pci_scan_bridge for PCI: 00:1d.0
1010 00:36:27.839663 PCI: pci_scan_bus for bus 01
1011 00:36:27.842598 PCI: 01:00.0 [1c5c/174a] enabled
1012 00:36:27.846015 GENERIC: 0.0 enabled
1013 00:36:27.849469 Enabling Common Clock Configuration
1014 00:36:27.852912 L1 Sub-State supported from root port 29
1015 00:36:27.855729 L1 Sub-State Support = 0xf
1016 00:36:27.859128 CommonModeRestoreTime = 0x28
1017 00:36:27.862775 Power On Value = 0x16, Power On Scale = 0x0
1018 00:36:27.865518 ASPM: Enabled L1
1019 00:36:27.868887 PCIe: Max_Payload_Size adjusted to 128
1020 00:36:27.872410 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 00:36:27.875634 PCI: 00:1e.2 scanning...
1022 00:36:27.879028 scan_generic_bus for PCI: 00:1e.2
1023 00:36:27.882451 SPI: 00 enabled
1024 00:36:27.889008 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 00:36:27.892213 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 00:36:27.895471 PCI: 00:1e.3 scanning...
1027 00:36:27.899003 scan_generic_bus for PCI: 00:1e.3
1028 00:36:27.899411 SPI: 00 enabled
1029 00:36:27.905647 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 00:36:27.912148 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 00:36:27.912593 PCI: 00:1f.0 scanning...
1032 00:36:27.915674 scan_static_bus for PCI: 00:1f.0
1033 00:36:27.919002 PNP: 0c09.0 enabled
1034 00:36:27.922259 PNP: 0c09.0 scanning...
1035 00:36:27.925862 scan_static_bus for PNP: 0c09.0
1036 00:36:27.929276 scan_static_bus for PNP: 0c09.0 done
1037 00:36:27.932559 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 00:36:27.938809 scan_static_bus for PCI: 00:1f.0 done
1039 00:36:27.942036 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 00:36:27.945399 PCI: 00:1f.2 scanning...
1041 00:36:27.948688 scan_static_bus for PCI: 00:1f.2
1042 00:36:27.952047 GENERIC: 0.0 enabled
1043 00:36:27.952542 GENERIC: 0.0 scanning...
1044 00:36:27.955540 scan_static_bus for GENERIC: 0.0
1045 00:36:27.958750 GENERIC: 0.0 enabled
1046 00:36:27.962103 GENERIC: 1.0 enabled
1047 00:36:27.965454 scan_static_bus for GENERIC: 0.0 done
1048 00:36:27.968831 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 00:36:27.971782 scan_static_bus for PCI: 00:1f.2 done
1050 00:36:27.978804 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 00:36:27.982027 PCI: 00:1f.3 scanning...
1052 00:36:27.985458 scan_static_bus for PCI: 00:1f.3
1053 00:36:27.988072 scan_static_bus for PCI: 00:1f.3 done
1054 00:36:27.991311 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 00:36:27.994872 PCI: 00:1f.5 scanning...
1056 00:36:27.998561 scan_generic_bus for PCI: 00:1f.5
1057 00:36:28.001804 scan_generic_bus for PCI: 00:1f.5 done
1058 00:36:28.008539 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 00:36:28.011518 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 00:36:28.014882 scan_static_bus for Root Device done
1061 00:36:28.021502 scan_bus: bus Root Device finished in 737 msecs
1062 00:36:28.021743 done
1063 00:36:28.028345 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 00:36:28.031665 Chrome EC: UHEPI supported
1065 00:36:28.038361 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 00:36:28.044844 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 00:36:28.048010 SPI flash protection: WPSW=0 SRP0=0
1068 00:36:28.051616 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 00:36:28.057948 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 00:36:28.061503 found VGA at PCI: 00:02.0
1071 00:36:28.064725 Setting up VGA for PCI: 00:02.0
1072 00:36:28.068409 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 00:36:28.074814 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 00:36:28.075072 Allocating resources...
1075 00:36:28.077862 Reading resources...
1076 00:36:28.081197 Root Device read_resources bus 0 link: 0
1077 00:36:28.088316 DOMAIN: 0000 read_resources bus 0 link: 0
1078 00:36:28.091678 PCI: 00:04.0 read_resources bus 1 link: 0
1079 00:36:28.098137 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 00:36:28.101714 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 00:36:28.107847 USB0 port 0 read_resources bus 0 link: 0
1082 00:36:28.111204 USB0 port 0 read_resources bus 0 link: 0 done
1083 00:36:28.117914 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 00:36:28.120972 PCI: 00:14.0 read_resources bus 0 link: 0
1085 00:36:28.124425 USB0 port 0 read_resources bus 0 link: 0
1086 00:36:28.131412 USB0 port 0 read_resources bus 0 link: 0 done
1087 00:36:28.134609 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 00:36:28.141687 PCI: 00:14.3 read_resources bus 0 link: 0
1089 00:36:28.145202 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 00:36:28.151495 PCI: 00:15.0 read_resources bus 0 link: 0
1091 00:36:28.154849 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 00:36:28.161420 PCI: 00:15.1 read_resources bus 0 link: 0
1093 00:36:28.164686 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 00:36:28.172154 PCI: 00:19.1 read_resources bus 0 link: 0
1095 00:36:28.175413 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 00:36:28.181946 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 00:36:28.185516 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 00:36:28.191917 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 00:36:28.195272 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 00:36:28.201828 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 00:36:28.205143 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 00:36:28.212030 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 00:36:28.215398 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 00:36:28.218418 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 00:36:28.225901 GENERIC: 0.0 read_resources bus 0 link: 0
1106 00:36:28.228745 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 00:36:28.235630 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 00:36:28.241932 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 00:36:28.245606 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 00:36:28.252246 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 00:36:28.255196 Root Device read_resources bus 0 link: 0 done
1112 00:36:28.258669 Done reading resources.
1113 00:36:28.261884 Show resources in subtree (Root Device)...After reading.
1114 00:36:28.268630 Root Device child on link 0 DOMAIN: 0000
1115 00:36:28.272095 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 00:36:28.282143 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 00:36:28.292021 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 00:36:28.292512 PCI: 00:00.0
1119 00:36:28.301678 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 00:36:28.311808 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 00:36:28.321496 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 00:36:28.331384 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 00:36:28.341689 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 00:36:28.348748 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 00:36:28.358062 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 00:36:28.368832 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 00:36:28.378162 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 00:36:28.388337 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 00:36:28.398245 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 00:36:28.405144 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 00:36:28.414907 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 00:36:28.424880 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 00:36:28.434434 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 00:36:28.444387 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 00:36:28.454752 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 00:36:28.460981 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 00:36:28.470853 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 00:36:28.480800 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 00:36:28.484061 PCI: 00:02.0
1140 00:36:28.494216 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 00:36:28.504464 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 00:36:28.510984 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 00:36:28.517302 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 00:36:28.527595 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 00:36:28.528180 GENERIC: 0.0
1146 00:36:28.530626 PCI: 00:05.0
1147 00:36:28.540749 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 00:36:28.544052 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 00:36:28.547352 GENERIC: 0.0
1150 00:36:28.547838 PCI: 00:08.0
1151 00:36:28.557733 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 00:36:28.560487 PCI: 00:0a.0
1153 00:36:28.564020 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 00:36:28.573851 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 00:36:28.577158 USB0 port 0 child on link 0 USB3 port 0
1156 00:36:28.580649 USB3 port 0
1157 00:36:28.584000 USB3 port 1
1158 00:36:28.584478 USB3 port 2
1159 00:36:28.587235 USB3 port 3
1160 00:36:28.590406 PCI: 00:14.0 child on link 0 USB0 port 0
1161 00:36:28.600855 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 00:36:28.603729 USB0 port 0 child on link 0 USB2 port 0
1163 00:36:28.607060 USB2 port 0
1164 00:36:28.607519 USB2 port 1
1165 00:36:28.610358 USB2 port 2
1166 00:36:28.610800 USB2 port 3
1167 00:36:28.613929 USB2 port 4
1168 00:36:28.614416 USB2 port 5
1169 00:36:28.617160 USB2 port 6
1170 00:36:28.617612 USB2 port 7
1171 00:36:28.620922 USB2 port 8
1172 00:36:28.623854 USB2 port 9
1173 00:36:28.624292 USB3 port 0
1174 00:36:28.627192 USB3 port 1
1175 00:36:28.627627 USB3 port 2
1176 00:36:28.630629 USB3 port 3
1177 00:36:28.631077 PCI: 00:14.2
1178 00:36:28.640423 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 00:36:28.650618 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 00:36:28.656808 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 00:36:28.666820 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 00:36:28.667374 GENERIC: 0.0
1183 00:36:28.670345 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 00:36:28.680841 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 00:36:28.683765 I2C: 00:1a
1186 00:36:28.684251 I2C: 00:31
1187 00:36:28.686892 I2C: 00:32
1188 00:36:28.690461 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 00:36:28.700344 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 00:36:28.703505 I2C: 00:10
1191 00:36:28.703990 PCI: 00:15.2
1192 00:36:28.713802 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 00:36:28.716898 PCI: 00:15.3
1194 00:36:28.726747 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 00:36:28.727335 PCI: 00:16.0
1196 00:36:28.736969 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 00:36:28.740143 PCI: 00:19.0
1198 00:36:28.743385 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 00:36:28.753542 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 00:36:28.754078 I2C: 00:15
1201 00:36:28.760157 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 00:36:28.766955 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 00:36:28.776853 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 00:36:28.786569 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 00:36:28.787028 GENERIC: 0.0
1206 00:36:28.789748 PCI: 01:00.0
1207 00:36:28.799645 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 00:36:28.810050 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 00:36:28.819700 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 00:36:28.820158 PCI: 00:1e.0
1211 00:36:28.829697 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 00:36:28.836161 PCI: 00:1e.2 child on link 0 SPI: 00
1213 00:36:28.846208 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 00:36:28.846668 SPI: 00
1215 00:36:28.849483 PCI: 00:1e.3 child on link 0 SPI: 00
1216 00:36:28.859563 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 00:36:28.862934 SPI: 00
1218 00:36:28.866428 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 00:36:28.876108 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 00:36:28.876670 PNP: 0c09.0
1221 00:36:28.886498 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 00:36:28.889766 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 00:36:28.899584 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 00:36:28.909297 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 00:36:28.912674 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 00:36:28.915807 GENERIC: 0.0
1227 00:36:28.916366 GENERIC: 1.0
1228 00:36:28.919609 PCI: 00:1f.3
1229 00:36:28.929459 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 00:36:28.939124 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 00:36:28.939696 PCI: 00:1f.5
1232 00:36:28.949225 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 00:36:28.952540 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 00:36:28.955901 APIC: 00
1235 00:36:28.956388 APIC: 01
1236 00:36:28.956772 APIC: 05
1237 00:36:28.959354 APIC: 07
1238 00:36:28.959837 APIC: 02
1239 00:36:28.962407 APIC: 04
1240 00:36:28.962888 APIC: 06
1241 00:36:28.963266 APIC: 03
1242 00:36:28.972474 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 00:36:28.975799 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 00:36:28.982682 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 00:36:28.989172 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 00:36:28.992559 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 00:36:28.999244 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 00:36:29.002269 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 00:36:29.009151 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 00:36:29.015622 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 00:36:29.025747 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 00:36:29.032037 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 00:36:29.038791 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 00:36:29.045778 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 00:36:29.052270 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 00:36:29.058675 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 00:36:29.062002 DOMAIN: 0000: Resource ranges:
1258 00:36:29.065450 * Base: 1000, Size: 800, Tag: 100
1259 00:36:29.072202 * Base: 1900, Size: e700, Tag: 100
1260 00:36:29.075760 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 00:36:29.081951 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 00:36:29.088731 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 00:36:29.098755 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 00:36:29.105152 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 00:36:29.111784 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 00:36:29.121827 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 00:36:29.128973 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 00:36:29.135646 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 00:36:29.141990 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 00:36:29.151989 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 00:36:29.158198 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 00:36:29.165202 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 00:36:29.175072 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 00:36:29.181432 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 00:36:29.188312 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 00:36:29.198096 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 00:36:29.204935 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 00:36:29.211376 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 00:36:29.221359 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 00:36:29.227900 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 00:36:29.234688 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 00:36:29.244734 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 00:36:29.251043 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 00:36:29.257685 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 00:36:29.261170 DOMAIN: 0000: Resource ranges:
1286 00:36:29.267502 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 00:36:29.271090 * Base: d0000000, Size: 28000000, Tag: 200
1288 00:36:29.274452 * Base: fa000000, Size: 1000000, Tag: 200
1289 00:36:29.280853 * Base: fb001000, Size: 2fff000, Tag: 200
1290 00:36:29.284248 * Base: fe010000, Size: 2e000, Tag: 200
1291 00:36:29.287428 * Base: fe03f000, Size: d41000, Tag: 200
1292 00:36:29.290886 * Base: fed88000, Size: 8000, Tag: 200
1293 00:36:29.297750 * Base: fed93000, Size: d000, Tag: 200
1294 00:36:29.301470 * Base: feda2000, Size: 1e000, Tag: 200
1295 00:36:29.304888 * Base: fede0000, Size: 1220000, Tag: 200
1296 00:36:29.311410 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 00:36:29.317509 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 00:36:29.324238 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 00:36:29.331189 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 00:36:29.337529 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 00:36:29.344093 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 00:36:29.350935 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 00:36:29.357427 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 00:36:29.364282 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 00:36:29.370499 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 00:36:29.377303 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 00:36:29.383911 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 00:36:29.390755 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 00:36:29.397139 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 00:36:29.403870 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 00:36:29.410490 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 00:36:29.416779 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 00:36:29.423873 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 00:36:29.430253 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 00:36:29.437196 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 00:36:29.443383 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 00:36:29.450289 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 00:36:29.456558 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 00:36:29.463807 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 00:36:29.470129 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 00:36:29.473391 PCI: 00:1d.0: Resource ranges:
1322 00:36:29.480288 * Base: 7fc00000, Size: 100000, Tag: 200
1323 00:36:29.486535 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 00:36:29.493173 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 00:36:29.500177 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 00:36:29.506702 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 00:36:29.513387 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 00:36:29.519762 Root Device assign_resources, bus 0 link: 0
1329 00:36:29.523304 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 00:36:29.533346 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 00:36:29.539789 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 00:36:29.546550 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 00:36:29.556236 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 00:36:29.559568 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 00:36:29.566029 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 00:36:29.572943 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 00:36:29.583032 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 00:36:29.589292 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 00:36:29.592643 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 00:36:29.599492 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 00:36:29.606226 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 00:36:29.612995 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 00:36:29.616029 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 00:36:29.626324 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 00:36:29.632688 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 00:36:29.642456 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 00:36:29.645708 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 00:36:29.649158 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 00:36:29.659289 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 00:36:29.662374 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 00:36:29.669388 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 00:36:29.675912 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 00:36:29.679203 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 00:36:29.686214 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 00:36:29.692421 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 00:36:29.701910 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 00:36:29.708899 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 00:36:29.718720 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 00:36:29.721673 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 00:36:29.728549 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 00:36:29.735576 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 00:36:29.745506 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 00:36:29.754782 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 00:36:29.758267 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 00:36:29.768378 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 00:36:29.775002 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 00:36:29.781622 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 00:36:29.788248 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 00:36:29.794754 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 00:36:29.801488 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 00:36:29.805049 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 00:36:29.815158 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 00:36:29.818421 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 00:36:29.821324 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 00:36:29.828173 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 00:36:29.831095 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 00:36:29.838013 LPC: Trying to open IO window from 800 size 1ff
1378 00:36:29.845078 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 00:36:29.854508 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 00:36:29.861260 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 00:36:29.867867 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 00:36:29.870797 Root Device assign_resources, bus 0 link: 0
1383 00:36:29.874729 Done setting resources.
1384 00:36:29.880753 Show resources in subtree (Root Device)...After assigning values.
1385 00:36:29.884141 Root Device child on link 0 DOMAIN: 0000
1386 00:36:29.887628 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 00:36:29.897401 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 00:36:29.907517 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 00:36:29.910968 PCI: 00:00.0
1390 00:36:29.920829 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 00:36:29.927451 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 00:36:29.936882 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 00:36:29.947240 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 00:36:29.957034 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 00:36:29.966889 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 00:36:29.973463 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 00:36:29.984094 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 00:36:29.993681 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 00:36:30.003481 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 00:36:30.013742 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 00:36:30.023841 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 00:36:30.030333 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 00:36:30.040172 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 00:36:30.050103 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 00:36:30.060194 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 00:36:30.070105 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 00:36:30.079731 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 00:36:30.086352 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 00:36:30.096268 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 00:36:30.099662 PCI: 00:02.0
1411 00:36:30.109928 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 00:36:30.119967 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 00:36:30.129543 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 00:36:30.132801 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 00:36:30.146073 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 00:36:30.146562 GENERIC: 0.0
1417 00:36:30.149635 PCI: 00:05.0
1418 00:36:30.159352 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 00:36:30.163071 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 00:36:30.166381 GENERIC: 0.0
1421 00:36:30.167017 PCI: 00:08.0
1422 00:36:30.176157 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 00:36:30.179853 PCI: 00:0a.0
1424 00:36:30.183366 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 00:36:30.192850 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 00:36:30.199270 USB0 port 0 child on link 0 USB3 port 0
1427 00:36:30.199754 USB3 port 0
1428 00:36:30.202977 USB3 port 1
1429 00:36:30.203476 USB3 port 2
1430 00:36:30.206208 USB3 port 3
1431 00:36:30.209857 PCI: 00:14.0 child on link 0 USB0 port 0
1432 00:36:30.219361 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 00:36:30.225963 USB0 port 0 child on link 0 USB2 port 0
1434 00:36:30.226445 USB2 port 0
1435 00:36:30.229841 USB2 port 1
1436 00:36:30.230419 USB2 port 2
1437 00:36:30.232542 USB2 port 3
1438 00:36:30.233022 USB2 port 4
1439 00:36:30.236597 USB2 port 5
1440 00:36:30.237195 USB2 port 6
1441 00:36:30.239475 USB2 port 7
1442 00:36:30.239955 USB2 port 8
1443 00:36:30.242623 USB2 port 9
1444 00:36:30.243101 USB3 port 0
1445 00:36:30.246310 USB3 port 1
1446 00:36:30.246789 USB3 port 2
1447 00:36:30.249634 USB3 port 3
1448 00:36:30.250113 PCI: 00:14.2
1449 00:36:30.262388 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 00:36:30.272347 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 00:36:30.275680 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 00:36:30.285690 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 00:36:30.288897 GENERIC: 0.0
1454 00:36:30.292507 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 00:36:30.302696 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 00:36:30.305478 I2C: 00:1a
1457 00:36:30.305942 I2C: 00:31
1458 00:36:30.309110 I2C: 00:32
1459 00:36:30.312526 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 00:36:30.322320 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 00:36:30.322890 I2C: 00:10
1462 00:36:30.325684 PCI: 00:15.2
1463 00:36:30.335749 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 00:36:30.339364 PCI: 00:15.3
1465 00:36:30.348788 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 00:36:30.349357 PCI: 00:16.0
1467 00:36:30.358864 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 00:36:30.362237 PCI: 00:19.0
1469 00:36:30.365557 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 00:36:30.375503 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 00:36:30.378781 I2C: 00:15
1472 00:36:30.382136 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 00:36:30.392065 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 00:36:30.401799 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 00:36:30.412047 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 00:36:30.415567 GENERIC: 0.0
1477 00:36:30.419093 PCI: 01:00.0
1478 00:36:30.428627 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 00:36:30.438486 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 00:36:30.448953 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 00:36:30.449547 PCI: 00:1e.0
1482 00:36:30.461691 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 00:36:30.465493 PCI: 00:1e.2 child on link 0 SPI: 00
1484 00:36:30.475140 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 00:36:30.478503 SPI: 00
1486 00:36:30.481883 PCI: 00:1e.3 child on link 0 SPI: 00
1487 00:36:30.491669 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 00:36:30.492241 SPI: 00
1489 00:36:30.498739 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 00:36:30.504748 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 00:36:30.508400 PNP: 0c09.0
1492 00:36:30.514991 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 00:36:30.521567 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 00:36:30.531418 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 00:36:30.537960 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 00:36:30.544530 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 00:36:30.545061 GENERIC: 0.0
1498 00:36:30.548354 GENERIC: 1.0
1499 00:36:30.548932 PCI: 00:1f.3
1500 00:36:30.557730 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 00:36:30.571182 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 00:36:30.571665 PCI: 00:1f.5
1503 00:36:30.581015 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 00:36:30.587715 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 00:36:30.588192 APIC: 00
1506 00:36:30.588567 APIC: 01
1507 00:36:30.591178 APIC: 05
1508 00:36:30.591652 APIC: 07
1509 00:36:30.592026 APIC: 02
1510 00:36:30.594359 APIC: 04
1511 00:36:30.594934 APIC: 06
1512 00:36:30.597544 APIC: 03
1513 00:36:30.598065 Done allocating resources.
1514 00:36:30.604720 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 00:36:30.610679 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 00:36:30.614142 Configure GPIOs for I2S audio on UP4.
1517 00:36:30.621667 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 00:36:30.625132 Enabling resources...
1519 00:36:30.628057 PCI: 00:00.0 subsystem <- 8086/9a12
1520 00:36:30.631380 PCI: 00:00.0 cmd <- 06
1521 00:36:30.634853 PCI: 00:02.0 subsystem <- 8086/9a40
1522 00:36:30.638407 PCI: 00:02.0 cmd <- 03
1523 00:36:30.641246 PCI: 00:04.0 subsystem <- 8086/9a03
1524 00:36:30.641743 PCI: 00:04.0 cmd <- 02
1525 00:36:30.648250 PCI: 00:05.0 subsystem <- 8086/9a19
1526 00:36:30.648726 PCI: 00:05.0 cmd <- 02
1527 00:36:30.651678 PCI: 00:08.0 subsystem <- 8086/9a11
1528 00:36:30.654867 PCI: 00:08.0 cmd <- 06
1529 00:36:30.658272 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 00:36:30.661685 PCI: 00:0d.0 cmd <- 02
1531 00:36:30.665200 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 00:36:30.668158 PCI: 00:14.0 cmd <- 02
1533 00:36:30.671537 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 00:36:30.674793 PCI: 00:14.2 cmd <- 02
1535 00:36:30.678180 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 00:36:30.681627 PCI: 00:14.3 cmd <- 02
1537 00:36:30.684601 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 00:36:30.687989 PCI: 00:15.0 cmd <- 02
1539 00:36:30.691296 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 00:36:30.691778 PCI: 00:15.1 cmd <- 02
1541 00:36:30.698004 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 00:36:30.698463 PCI: 00:15.2 cmd <- 02
1543 00:36:30.701327 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 00:36:30.704759 PCI: 00:15.3 cmd <- 02
1545 00:36:30.708243 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 00:36:30.711762 PCI: 00:16.0 cmd <- 02
1547 00:36:30.714735 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 00:36:30.717974 PCI: 00:19.1 cmd <- 02
1549 00:36:30.721169 PCI: 00:1d.0 bridge ctrl <- 0013
1550 00:36:30.724405 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 00:36:30.728033 PCI: 00:1d.0 cmd <- 06
1552 00:36:30.731548 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 00:36:30.734821 PCI: 00:1e.0 cmd <- 06
1554 00:36:30.738208 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 00:36:30.741534 PCI: 00:1e.2 cmd <- 06
1556 00:36:30.744440 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 00:36:30.744876 PCI: 00:1e.3 cmd <- 02
1558 00:36:30.751014 PCI: 00:1f.0 subsystem <- 8086/a087
1559 00:36:30.751445 PCI: 00:1f.0 cmd <- 407
1560 00:36:30.754544 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 00:36:30.758068 PCI: 00:1f.3 cmd <- 02
1562 00:36:30.761235 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 00:36:30.764465 PCI: 00:1f.5 cmd <- 406
1564 00:36:30.768897 PCI: 01:00.0 cmd <- 02
1565 00:36:30.773484 done.
1566 00:36:30.776593 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 00:36:30.780223 Initializing devices...
1568 00:36:30.783592 Root Device init
1569 00:36:30.786500 Chrome EC: Set SMI mask to 0x0000000000000000
1570 00:36:30.793602 Chrome EC: clear events_b mask to 0x0000000000000000
1571 00:36:30.800675 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 00:36:30.807623 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 00:36:30.813940 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 00:36:30.817300 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 00:36:30.825133 fw_config match found: DB_USB=USB3_ACTIVE
1576 00:36:30.828615 Configure Right Type-C port orientation for retimer
1577 00:36:30.831887 Root Device init finished in 47 msecs
1578 00:36:30.836231 PCI: 00:00.0 init
1579 00:36:30.839670 CPU TDP = 9 Watts
1580 00:36:30.840247 CPU PL1 = 9 Watts
1581 00:36:30.843014 CPU PL2 = 40 Watts
1582 00:36:30.846511 CPU PL4 = 83 Watts
1583 00:36:30.849237 PCI: 00:00.0 init finished in 8 msecs
1584 00:36:30.849782 PCI: 00:02.0 init
1585 00:36:30.852669 GMA: Found VBT in CBFS
1586 00:36:30.856103 GMA: Found valid VBT in CBFS
1587 00:36:30.862895 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 00:36:30.869713 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 00:36:30.872836 PCI: 00:02.0 init finished in 18 msecs
1590 00:36:30.876281 PCI: 00:05.0 init
1591 00:36:30.879156 PCI: 00:05.0 init finished in 0 msecs
1592 00:36:30.882496 PCI: 00:08.0 init
1593 00:36:30.886015 PCI: 00:08.0 init finished in 0 msecs
1594 00:36:30.889302 PCI: 00:14.0 init
1595 00:36:30.892829 PCI: 00:14.0 init finished in 0 msecs
1596 00:36:30.895708 PCI: 00:14.2 init
1597 00:36:30.899228 PCI: 00:14.2 init finished in 0 msecs
1598 00:36:30.902564 PCI: 00:15.0 init
1599 00:36:30.903046 I2C bus 0 version 0x3230302a
1600 00:36:30.908525 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 00:36:30.911949 PCI: 00:15.0 init finished in 6 msecs
1602 00:36:30.912034 PCI: 00:15.1 init
1603 00:36:30.915225 I2C bus 1 version 0x3230302a
1604 00:36:30.918719 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 00:36:30.925123 PCI: 00:15.1 init finished in 6 msecs
1606 00:36:30.925277 PCI: 00:15.2 init
1607 00:36:30.928423 I2C bus 2 version 0x3230302a
1608 00:36:30.931905 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 00:36:30.935396 PCI: 00:15.2 init finished in 6 msecs
1610 00:36:30.938712 PCI: 00:15.3 init
1611 00:36:30.941893 I2C bus 3 version 0x3230302a
1612 00:36:30.945348 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 00:36:30.948355 PCI: 00:15.3 init finished in 6 msecs
1614 00:36:30.951821 PCI: 00:16.0 init
1615 00:36:30.955125 PCI: 00:16.0 init finished in 0 msecs
1616 00:36:30.958436 PCI: 00:19.1 init
1617 00:36:30.961840 I2C bus 5 version 0x3230302a
1618 00:36:30.965107 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 00:36:30.968387 PCI: 00:19.1 init finished in 6 msecs
1620 00:36:30.968484 PCI: 00:1d.0 init
1621 00:36:30.971714 Initializing PCH PCIe bridge.
1622 00:36:30.978695 PCI: 00:1d.0 init finished in 3 msecs
1623 00:36:30.978810 PCI: 00:1f.0 init
1624 00:36:30.985112 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 00:36:30.988505 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 00:36:30.991630 IOAPIC: ID = 0x02
1627 00:36:30.991799 IOAPIC: Dumping registers
1628 00:36:30.994927 reg 0x0000: 0x02000000
1629 00:36:30.998431 reg 0x0001: 0x00770020
1630 00:36:31.001633 reg 0x0002: 0x00000000
1631 00:36:31.005128 PCI: 00:1f.0 init finished in 21 msecs
1632 00:36:31.008645 PCI: 00:1f.2 init
1633 00:36:31.008912 Disabling ACPI via APMC.
1634 00:36:31.012700 APMC done.
1635 00:36:31.016527 PCI: 00:1f.2 init finished in 5 msecs
1636 00:36:31.028550 PCI: 01:00.0 init
1637 00:36:31.031693 PCI: 01:00.0 init finished in 0 msecs
1638 00:36:31.035227 PNP: 0c09.0 init
1639 00:36:31.038263 Google Chrome EC uptime: 8.462 seconds
1640 00:36:31.045139 Google Chrome AP resets since EC boot: 1
1641 00:36:31.048621 Google Chrome most recent AP reset causes:
1642 00:36:31.051597 0.380: 32775 shutdown: entering G3
1643 00:36:31.058247 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 00:36:31.061611 PNP: 0c09.0 init finished in 22 msecs
1645 00:36:31.067631 Devices initialized
1646 00:36:31.070641 Show all devs... After init.
1647 00:36:31.074180 Root Device: enabled 1
1648 00:36:31.074611 DOMAIN: 0000: enabled 1
1649 00:36:31.077086 CPU_CLUSTER: 0: enabled 1
1650 00:36:31.080682 PCI: 00:00.0: enabled 1
1651 00:36:31.083991 PCI: 00:02.0: enabled 1
1652 00:36:31.084423 PCI: 00:04.0: enabled 1
1653 00:36:31.087524 PCI: 00:05.0: enabled 1
1654 00:36:31.090502 PCI: 00:06.0: enabled 0
1655 00:36:31.094199 PCI: 00:07.0: enabled 0
1656 00:36:31.094629 PCI: 00:07.1: enabled 0
1657 00:36:31.097661 PCI: 00:07.2: enabled 0
1658 00:36:31.100746 PCI: 00:07.3: enabled 0
1659 00:36:31.103834 PCI: 00:08.0: enabled 1
1660 00:36:31.104267 PCI: 00:09.0: enabled 0
1661 00:36:31.107614 PCI: 00:0a.0: enabled 0
1662 00:36:31.110793 PCI: 00:0d.0: enabled 1
1663 00:36:31.111228 PCI: 00:0d.1: enabled 0
1664 00:36:31.113993 PCI: 00:0d.2: enabled 0
1665 00:36:31.117284 PCI: 00:0d.3: enabled 0
1666 00:36:31.120934 PCI: 00:0e.0: enabled 0
1667 00:36:31.121512 PCI: 00:10.2: enabled 1
1668 00:36:31.124022 PCI: 00:10.6: enabled 0
1669 00:36:31.127714 PCI: 00:10.7: enabled 0
1670 00:36:31.130606 PCI: 00:12.0: enabled 0
1671 00:36:31.131223 PCI: 00:12.6: enabled 0
1672 00:36:31.133728 PCI: 00:13.0: enabled 0
1673 00:36:31.137210 PCI: 00:14.0: enabled 1
1674 00:36:31.140820 PCI: 00:14.1: enabled 0
1675 00:36:31.141299 PCI: 00:14.2: enabled 1
1676 00:36:31.144134 PCI: 00:14.3: enabled 1
1677 00:36:31.146928 PCI: 00:15.0: enabled 1
1678 00:36:31.150284 PCI: 00:15.1: enabled 1
1679 00:36:31.150765 PCI: 00:15.2: enabled 1
1680 00:36:31.153857 PCI: 00:15.3: enabled 1
1681 00:36:31.157275 PCI: 00:16.0: enabled 1
1682 00:36:31.157780 PCI: 00:16.1: enabled 0
1683 00:36:31.160496 PCI: 00:16.2: enabled 0
1684 00:36:31.163916 PCI: 00:16.3: enabled 0
1685 00:36:31.167398 PCI: 00:16.4: enabled 0
1686 00:36:31.167884 PCI: 00:16.5: enabled 0
1687 00:36:31.170620 PCI: 00:17.0: enabled 0
1688 00:36:31.173546 PCI: 00:19.0: enabled 0
1689 00:36:31.177059 PCI: 00:19.1: enabled 1
1690 00:36:31.177560 PCI: 00:19.2: enabled 0
1691 00:36:31.180199 PCI: 00:1c.0: enabled 1
1692 00:36:31.183525 PCI: 00:1c.1: enabled 0
1693 00:36:31.186888 PCI: 00:1c.2: enabled 0
1694 00:36:31.187315 PCI: 00:1c.3: enabled 0
1695 00:36:31.190435 PCI: 00:1c.4: enabled 0
1696 00:36:31.193904 PCI: 00:1c.5: enabled 0
1697 00:36:31.194356 PCI: 00:1c.6: enabled 1
1698 00:36:31.197044 PCI: 00:1c.7: enabled 0
1699 00:36:31.200234 PCI: 00:1d.0: enabled 1
1700 00:36:31.203638 PCI: 00:1d.1: enabled 0
1701 00:36:31.204072 PCI: 00:1d.2: enabled 1
1702 00:36:31.207016 PCI: 00:1d.3: enabled 0
1703 00:36:31.210665 PCI: 00:1e.0: enabled 1
1704 00:36:31.213726 PCI: 00:1e.1: enabled 0
1705 00:36:31.214165 PCI: 00:1e.2: enabled 1
1706 00:36:31.217145 PCI: 00:1e.3: enabled 1
1707 00:36:31.220291 PCI: 00:1f.0: enabled 1
1708 00:36:31.223765 PCI: 00:1f.1: enabled 0
1709 00:36:31.224207 PCI: 00:1f.2: enabled 1
1710 00:36:31.226883 PCI: 00:1f.3: enabled 1
1711 00:36:31.230201 PCI: 00:1f.4: enabled 0
1712 00:36:31.233744 PCI: 00:1f.5: enabled 1
1713 00:36:31.234221 PCI: 00:1f.6: enabled 0
1714 00:36:31.236895 PCI: 00:1f.7: enabled 0
1715 00:36:31.240444 APIC: 00: enabled 1
1716 00:36:31.241056 GENERIC: 0.0: enabled 1
1717 00:36:31.243143 GENERIC: 0.0: enabled 1
1718 00:36:31.246643 GENERIC: 1.0: enabled 1
1719 00:36:31.250019 GENERIC: 0.0: enabled 1
1720 00:36:31.250490 GENERIC: 1.0: enabled 1
1721 00:36:31.253193 USB0 port 0: enabled 1
1722 00:36:31.256703 GENERIC: 0.0: enabled 1
1723 00:36:31.257172 USB0 port 0: enabled 1
1724 00:36:31.260077 GENERIC: 0.0: enabled 1
1725 00:36:31.263682 I2C: 00:1a: enabled 1
1726 00:36:31.266501 I2C: 00:31: enabled 1
1727 00:36:31.267015 I2C: 00:32: enabled 1
1728 00:36:31.270151 I2C: 00:10: enabled 1
1729 00:36:31.273480 I2C: 00:15: enabled 1
1730 00:36:31.274065 GENERIC: 0.0: enabled 0
1731 00:36:31.276378 GENERIC: 1.0: enabled 0
1732 00:36:31.279771 GENERIC: 0.0: enabled 1
1733 00:36:31.280362 SPI: 00: enabled 1
1734 00:36:31.283220 SPI: 00: enabled 1
1735 00:36:31.286685 PNP: 0c09.0: enabled 1
1736 00:36:31.287164 GENERIC: 0.0: enabled 1
1737 00:36:31.289978 USB3 port 0: enabled 1
1738 00:36:31.293079 USB3 port 1: enabled 1
1739 00:36:31.293529 USB3 port 2: enabled 0
1740 00:36:31.296531 USB3 port 3: enabled 0
1741 00:36:31.300131 USB2 port 0: enabled 0
1742 00:36:31.303583 USB2 port 1: enabled 1
1743 00:36:31.304258 USB2 port 2: enabled 1
1744 00:36:31.306390 USB2 port 3: enabled 0
1745 00:36:31.309740 USB2 port 4: enabled 1
1746 00:36:31.310164 USB2 port 5: enabled 0
1747 00:36:31.313337 USB2 port 6: enabled 0
1748 00:36:31.316951 USB2 port 7: enabled 0
1749 00:36:31.319970 USB2 port 8: enabled 0
1750 00:36:31.320505 USB2 port 9: enabled 0
1751 00:36:31.323349 USB3 port 0: enabled 0
1752 00:36:31.326626 USB3 port 1: enabled 1
1753 00:36:31.327132 USB3 port 2: enabled 0
1754 00:36:31.329473 USB3 port 3: enabled 0
1755 00:36:31.332944 GENERIC: 0.0: enabled 1
1756 00:36:31.336191 GENERIC: 1.0: enabled 1
1757 00:36:31.336715 APIC: 01: enabled 1
1758 00:36:31.339901 APIC: 05: enabled 1
1759 00:36:31.340384 APIC: 07: enabled 1
1760 00:36:31.343210 APIC: 02: enabled 1
1761 00:36:31.346150 APIC: 04: enabled 1
1762 00:36:31.346661 APIC: 06: enabled 1
1763 00:36:31.349691 APIC: 03: enabled 1
1764 00:36:31.353060 PCI: 01:00.0: enabled 1
1765 00:36:31.356606 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1766 00:36:31.362799 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 00:36:31.366206 ELOG: NV offset 0xf30000 size 0x1000
1768 00:36:31.372868 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 00:36:31.379454 ELOG: Event(17) added with size 13 at 2022-07-26 00:30:46 UTC
1770 00:36:31.385688 ELOG: Event(92) added with size 9 at 2022-07-26 00:30:46 UTC
1771 00:36:31.392604 ELOG: Event(93) added with size 9 at 2022-07-26 00:30:46 UTC
1772 00:36:31.399262 ELOG: Event(9E) added with size 10 at 2022-07-26 00:30:46 UTC
1773 00:36:31.406028 ELOG: Event(9F) added with size 14 at 2022-07-26 00:30:46 UTC
1774 00:36:31.412260 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 00:36:31.415688 ELOG: Event(A1) added with size 10 at 2022-07-26 00:30:46 UTC
1776 00:36:31.425635 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1777 00:36:31.432059 ELOG: Event(A0) added with size 9 at 2022-07-26 00:30:46 UTC
1778 00:36:31.435521 elog_add_boot_reason: Logged dev mode boot
1779 00:36:31.442363 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1780 00:36:31.442799 Finalize devices...
1781 00:36:31.445907 Devices finalized
1782 00:36:31.452198 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1783 00:36:31.455414 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1784 00:36:31.462336 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1785 00:36:31.465636 ME: HFSTS1 : 0x80030055
1786 00:36:31.472339 ME: HFSTS2 : 0x30280116
1787 00:36:31.475995 ME: HFSTS3 : 0x00000050
1788 00:36:31.479117 ME: HFSTS4 : 0x00004000
1789 00:36:31.486066 ME: HFSTS5 : 0x00000000
1790 00:36:31.488852 ME: HFSTS6 : 0x00400006
1791 00:36:31.492278 ME: Manufacturing Mode : YES
1792 00:36:31.495861 ME: SPI Protection Mode Enabled : NO
1793 00:36:31.498631 ME: FW Partition Table : OK
1794 00:36:31.502132 ME: Bringup Loader Failure : NO
1795 00:36:31.508842 ME: Firmware Init Complete : NO
1796 00:36:31.512066 ME: Boot Options Present : NO
1797 00:36:31.515558 ME: Update In Progress : NO
1798 00:36:31.519003 ME: D0i3 Support : YES
1799 00:36:31.522072 ME: Low Power State Enabled : NO
1800 00:36:31.525875 ME: CPU Replaced : YES
1801 00:36:31.528601 ME: CPU Replacement Valid : YES
1802 00:36:31.532135 ME: Current Working State : 5
1803 00:36:31.538735 ME: Current Operation State : 1
1804 00:36:31.542270 ME: Current Operation Mode : 3
1805 00:36:31.545298 ME: Error Code : 0
1806 00:36:31.548380 ME: Enhanced Debug Mode : NO
1807 00:36:31.551754 ME: CPU Debug Disabled : YES
1808 00:36:31.555132 ME: TXT Support : NO
1809 00:36:31.561692 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1810 00:36:31.568577 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1811 00:36:31.571601 CBFS: 'fallback/slic' not found.
1812 00:36:31.575119 ACPI: Writing ACPI tables at 76b01000.
1813 00:36:31.578429 ACPI: * FACS
1814 00:36:31.578864 ACPI: * DSDT
1815 00:36:31.585443 Ramoops buffer: 0x100000@0x76a00000.
1816 00:36:31.588363 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1817 00:36:31.591504 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1818 00:36:31.596041 Google Chrome EC: version:
1819 00:36:31.599731 ro: voema_v2.0.7540-147f8d37d1
1820 00:36:31.603118 rw: voema_v2.0.7540-147f8d37d1
1821 00:36:31.606084 running image: 2
1822 00:36:31.612818 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1823 00:36:31.616099 ACPI: * FADT
1824 00:36:31.616525 SCI is IRQ9
1825 00:36:31.619505 ACPI: added table 1/32, length now 40
1826 00:36:31.622392 ACPI: * SSDT
1827 00:36:31.626021 Found 1 CPU(s) with 8 core(s) each.
1828 00:36:31.629230 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1829 00:36:31.635492 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1830 00:36:31.638814 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1831 00:36:31.642441 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1832 00:36:31.649235 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1833 00:36:31.655669 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1834 00:36:31.658994 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1835 00:36:31.665699 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1836 00:36:31.672710 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1837 00:36:31.675947 \_SB.PCI0.RP09: Added StorageD3Enable property
1838 00:36:31.678865 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1839 00:36:31.685715 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1840 00:36:31.692639 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1841 00:36:31.696056 PS2K: Passing 80 keymaps to kernel
1842 00:36:31.702321 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1843 00:36:31.709276 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1844 00:36:31.715903 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1845 00:36:31.718843 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1846 00:36:31.725919 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1847 00:36:31.732216 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1848 00:36:31.739105 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1849 00:36:31.745341 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1850 00:36:31.752212 ACPI: added table 2/32, length now 44
1851 00:36:31.752699 ACPI: * MCFG
1852 00:36:31.755735 ACPI: added table 3/32, length now 48
1853 00:36:31.758808 ACPI: * TPM2
1854 00:36:31.761986 TPM2 log created at 0x769f0000
1855 00:36:31.765464 ACPI: added table 4/32, length now 52
1856 00:36:31.765956 ACPI: * MADT
1857 00:36:31.768902 SCI is IRQ9
1858 00:36:31.771947 ACPI: added table 5/32, length now 56
1859 00:36:31.772382 current = 76b09850
1860 00:36:31.775615 ACPI: * DMAR
1861 00:36:31.778806 ACPI: added table 6/32, length now 60
1862 00:36:31.782268 ACPI: added table 7/32, length now 64
1863 00:36:31.785708 ACPI: * HPET
1864 00:36:31.788729 ACPI: added table 8/32, length now 68
1865 00:36:31.789161 ACPI: done.
1866 00:36:31.792227 ACPI tables: 35216 bytes.
1867 00:36:31.795247 smbios_write_tables: 769ef000
1868 00:36:31.798951 EC returned error result code 3
1869 00:36:31.802086 Couldn't obtain OEM name from CBI
1870 00:36:31.805245 Create SMBIOS type 16
1871 00:36:31.808634 Create SMBIOS type 17
1872 00:36:31.809068 GENERIC: 0.0 (WIFI Device)
1873 00:36:31.812484 SMBIOS tables: 1750 bytes.
1874 00:36:31.815622 Writing table forward entry at 0x00000500
1875 00:36:31.821857 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1876 00:36:31.825638 Writing coreboot table at 0x76b25000
1877 00:36:31.832037 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1878 00:36:31.838631 1. 0000000000001000-000000000009ffff: RAM
1879 00:36:31.841696 2. 00000000000a0000-00000000000fffff: RESERVED
1880 00:36:31.845099 3. 0000000000100000-00000000769eefff: RAM
1881 00:36:31.852395 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1882 00:36:31.855087 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1883 00:36:31.862106 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1884 00:36:31.868564 7. 0000000077000000-000000007fbfffff: RESERVED
1885 00:36:31.871634 8. 00000000c0000000-00000000cfffffff: RESERVED
1886 00:36:31.878247 9. 00000000f8000000-00000000f9ffffff: RESERVED
1887 00:36:31.881649 10. 00000000fb000000-00000000fb000fff: RESERVED
1888 00:36:31.884934 11. 00000000fe000000-00000000fe00ffff: RESERVED
1889 00:36:31.891708 12. 00000000fed80000-00000000fed87fff: RESERVED
1890 00:36:31.894896 13. 00000000fed90000-00000000fed92fff: RESERVED
1891 00:36:31.901506 14. 00000000feda0000-00000000feda1fff: RESERVED
1892 00:36:31.904914 15. 00000000fedc0000-00000000feddffff: RESERVED
1893 00:36:31.911688 16. 0000000100000000-00000002803fffff: RAM
1894 00:36:31.912261 Passing 4 GPIOs to payload:
1895 00:36:31.918337 NAME | PORT | POLARITY | VALUE
1896 00:36:31.924964 lid | undefined | high | high
1897 00:36:31.928217 power | undefined | high | low
1898 00:36:31.935062 oprom | undefined | high | low
1899 00:36:31.938188 EC in RW | 0x000000e5 | high | high
1900 00:36:31.944856 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 3776
1901 00:36:31.948119 coreboot table: 1576 bytes.
1902 00:36:31.951627 IMD ROOT 0. 0x76fff000 0x00001000
1903 00:36:31.955066 IMD SMALL 1. 0x76ffe000 0x00001000
1904 00:36:31.958179 FSP MEMORY 2. 0x76c4e000 0x003b0000
1905 00:36:31.965093 VPD 3. 0x76c4d000 0x00000367
1906 00:36:31.968163 RO MCACHE 4. 0x76c4c000 0x00000fdc
1907 00:36:31.971368 CONSOLE 5. 0x76c2c000 0x00020000
1908 00:36:31.974836 FMAP 6. 0x76c2b000 0x00000578
1909 00:36:31.978211 TIME STAMP 7. 0x76c2a000 0x00000910
1910 00:36:31.981685 VBOOT WORK 8. 0x76c16000 0x00014000
1911 00:36:31.984856 ROMSTG STCK 9. 0x76c15000 0x00001000
1912 00:36:31.988085 AFTER CAR 10. 0x76c0a000 0x0000b000
1913 00:36:31.991872 RAMSTAGE 11. 0x76b97000 0x00073000
1914 00:36:31.998211 REFCODE 12. 0x76b42000 0x00055000
1915 00:36:32.001525 SMM BACKUP 13. 0x76b32000 0x00010000
1916 00:36:32.005113 4f444749 14. 0x76b30000 0x00002000
1917 00:36:32.007981 EXT VBT15. 0x76b2d000 0x0000219f
1918 00:36:32.011333 COREBOOT 16. 0x76b25000 0x00008000
1919 00:36:32.014695 ACPI 17. 0x76b01000 0x00024000
1920 00:36:32.018137 ACPI GNVS 18. 0x76b00000 0x00001000
1921 00:36:32.021355 RAMOOPS 19. 0x76a00000 0x00100000
1922 00:36:32.024695 TPM2 TCGLOG20. 0x769f0000 0x00010000
1923 00:36:32.031478 SMBIOS 21. 0x769ef000 0x00000800
1924 00:36:32.031915 IMD small region:
1925 00:36:32.034644 IMD ROOT 0. 0x76ffec00 0x00000400
1926 00:36:32.038345 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1927 00:36:32.044699 POWER STATE 2. 0x76ffeb80 0x00000044
1928 00:36:32.048013 ROMSTAGE 3. 0x76ffeb60 0x00000004
1929 00:36:32.051308 MEM INFO 4. 0x76ffe980 0x000001e0
1930 00:36:32.058290 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1931 00:36:32.061210 MTRR: Physical address space:
1932 00:36:32.068060 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1933 00:36:32.071126 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1934 00:36:32.078069 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1935 00:36:32.084634 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1936 00:36:32.091317 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1937 00:36:32.098278 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1938 00:36:32.104587 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1939 00:36:32.108072 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 00:36:32.110919 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 00:36:32.117684 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 00:36:32.121099 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 00:36:32.124498 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 00:36:32.127791 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 00:36:32.134462 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 00:36:32.137920 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 00:36:32.141321 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 00:36:32.144168 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 00:36:32.147526 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 00:36:32.152401 call enable_fixed_mtrr()
1951 00:36:32.155726 CPU physical address size: 39 bits
1952 00:36:32.161942 MTRR: default type WB/UC MTRR counts: 6/6.
1953 00:36:32.165320 MTRR: UC selected as default type.
1954 00:36:32.172391 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1955 00:36:32.175769 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 00:36:32.182013 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 00:36:32.188792 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 00:36:32.195593 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1959 00:36:32.202074 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1960 00:36:32.202531
1961 00:36:32.205215 MTRR check
1962 00:36:32.205690 Fixed MTRRs : Enabled
1963 00:36:32.208493 Variable MTRRs: Enabled
1964 00:36:32.208929
1965 00:36:32.215195 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 00:36:32.218720 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 00:36:32.221908 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 00:36:32.225285 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 00:36:32.228603 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 00:36:32.235453 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 00:36:32.238735 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 00:36:32.241764 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 00:36:32.245143 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 00:36:32.251749 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 00:36:32.255584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 00:36:32.262130 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1977 00:36:32.264853 call enable_fixed_mtrr()
1978 00:36:32.268429 Checking cr50 for pending updates
1979 00:36:32.271946 CPU physical address size: 39 bits
1980 00:36:32.275306 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 00:36:32.278615 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 00:36:32.282058 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 00:36:32.288607 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 00:36:32.291854 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 00:36:32.294832 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 00:36:32.298165 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 00:36:32.305027 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 00:36:32.308226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 00:36:32.311583 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 00:36:32.315185 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 00:36:32.321434 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 00:36:32.324796 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 00:36:32.328261 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 00:36:32.335200 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 00:36:32.338591 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 00:36:32.341893 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 00:36:32.345082 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 00:36:32.351598 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 00:36:32.354815 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 00:36:32.358281 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 00:36:32.361790 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 00:36:32.365513 call enable_fixed_mtrr()
2003 00:36:32.369012 call enable_fixed_mtrr()
2004 00:36:32.371870 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 00:36:32.375072 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 00:36:32.382070 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 00:36:32.385072 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 00:36:32.388624 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 00:36:32.391702 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 00:36:32.398265 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 00:36:32.401638 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 00:36:32.405080 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 00:36:32.408664 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 00:36:32.415242 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 00:36:32.418064 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 00:36:32.421629 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 00:36:32.425032 call enable_fixed_mtrr()
2018 00:36:32.428338 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 00:36:32.434883 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 00:36:32.438455 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 00:36:32.442037 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 00:36:32.444836 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 00:36:32.451581 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 00:36:32.454859 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 00:36:32.458508 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 00:36:32.461743 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 00:36:32.465556 CPU physical address size: 39 bits
2028 00:36:32.471668 call enable_fixed_mtrr()
2029 00:36:32.474969 CPU physical address size: 39 bits
2030 00:36:32.478278 CPU physical address size: 39 bits
2031 00:36:32.481618 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 00:36:32.485380 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 00:36:32.491561 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 00:36:32.495171 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 00:36:32.498212 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 00:36:32.501588 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 00:36:32.508812 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 00:36:32.511717 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 00:36:32.515103 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 00:36:32.518256 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 00:36:32.525184 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 00:36:32.528171 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 00:36:32.531763 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 00:36:32.534964 call enable_fixed_mtrr()
2045 00:36:32.537916 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 00:36:32.545016 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 00:36:32.548411 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 00:36:32.551662 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 00:36:32.554616 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 00:36:32.561494 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 00:36:32.564387 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 00:36:32.567757 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 00:36:32.571211 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 00:36:32.574844 CPU physical address size: 39 bits
2055 00:36:32.582105 call enable_fixed_mtrr()
2056 00:36:32.582589 Reading cr50 TPM mode
2057 00:36:32.585674 CPU physical address size: 39 bits
2058 00:36:32.589099 CPU physical address size: 39 bits
2059 00:36:32.595457 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2060 00:36:32.602031 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2061 00:36:32.608594 Checking segment from ROM address 0xffc02b38
2062 00:36:32.612110 Checking segment from ROM address 0xffc02b54
2063 00:36:32.615204 Loading segment from ROM address 0xffc02b38
2064 00:36:32.618635 code (compression=0)
2065 00:36:32.628299 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2066 00:36:32.635085 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2067 00:36:32.638954 it's not compressed!
2068 00:36:32.777175 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2069 00:36:32.784004 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2070 00:36:32.790330 Loading segment from ROM address 0xffc02b54
2071 00:36:32.793469 Entry Point 0x30000000
2072 00:36:32.793553 Loaded segments
2073 00:36:32.800432 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2074 00:36:32.844528 Finalizing chipset.
2075 00:36:32.847791 Finalizing SMM.
2076 00:36:32.847985 APMC done.
2077 00:36:32.854106 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2078 00:36:32.857421 mp_park_aps done after 0 msecs.
2079 00:36:32.860769 Jumping to boot code at 0x30000000(0x76b25000)
2080 00:36:32.870533 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2081 00:36:32.870620
2082 00:36:32.873817 Starting depthcharge on Voema...
2083 00:36:32.874182 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2084 00:36:32.874291 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2085 00:36:32.874382 Setting prompt string to ['volteer:']
2086 00:36:32.874464 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2087 00:36:32.884083 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2088 00:36:32.890284 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 00:36:32.893835 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 00:36:32.900234 Failed to find eMMC card reader
2091 00:36:32.900329 Wipe memory regions:
2092 00:36:32.907026 [0x00000000001000, 0x000000000a0000)
2093 00:36:32.910384 [0x00000000100000, 0x00000030000000)
2094 00:36:32.938533 [0x00000032662db0, 0x000000769ef000)
2095 00:36:32.977210 [0x00000100000000, 0x00000280400000)
2096 00:36:33.184318 ec_init: CrosEC protocol v3 supported (256, 256)
2097 00:36:33.190968 update_port_state: port C0 state: usb enable 1 mux conn 0
2098 00:36:33.200675 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2099 00:36:33.207460 pmc_check_ipc_sts: STS_BUSY done after 1616 us
2100 00:36:33.210829 send_conn_disc_msg: pmc_send_cmd succeeded
2101 00:36:33.643266 R8152: Initializing
2102 00:36:33.646437 Version 6 (ocp_data = 5c30)
2103 00:36:33.649855 R8152: Done initializing
2104 00:36:33.652864 Adding net device
2105 00:36:33.959585 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2106 00:36:33.959984
2107 00:36:33.962951 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2109 00:36:34.064520 volteer: tftpboot 192.168.201.1 6887867/tftp-deploy-gg3d0iqb/kernel/bzImage 6887867/tftp-deploy-gg3d0iqb/kernel/cmdline 6887867/tftp-deploy-gg3d0iqb/ramdisk/ramdisk.cpio.gz
2110 00:36:34.064952 Setting prompt string to 'Starting kernel'
2111 00:36:34.065192 Setting prompt string to ['Starting kernel']
2112 00:36:34.065408 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2113 00:36:34.065631 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:43)
2114 00:36:34.070036 tftpboot 192.168.201.1 6887867/tftp-deploy-gg3d0iqb/kernel/bzImaoy-gg3d0iqb/kernel/cmdline 6887867/tftp-deploy-gg3d0iqb/ramdisk/ramdisk.cpio.gz
2115 00:36:34.070371 Waiting for link
2116 00:36:34.273273 done.
2117 00:36:34.273899 MAC: 00:24:32:30:78:74
2118 00:36:34.276682 Sending DHCP discover... done.
2119 00:36:34.280044 Waiting for reply... done.
2120 00:36:34.283177 Sending DHCP request... done.
2121 00:36:34.286472 Waiting for reply... done.
2122 00:36:34.289756 My ip is 192.168.201.10
2123 00:36:34.293057 The DHCP server ip is 192.168.201.1
2124 00:36:34.296483 TFTP server IP predefined by user: 192.168.201.1
2125 00:36:34.306893 Bootfile predefined by user: 6887867/tftp-deploy-gg3d0iqb/kernel/bzImage
2126 00:36:34.309798 Sending tftp read request... done.
2127 00:36:34.313393 Waiting for the transfer...
2128 00:36:34.956214 00000000 ################################################################
2129 00:36:35.576318 00080000 ################################################################
2130 00:36:36.261756 00100000 ################################################################
2131 00:36:36.925793 00180000 ################################################################
2132 00:36:37.610204 00200000 ################################################################
2133 00:36:38.313353 00280000 ################################################################
2134 00:36:39.008162 00300000 ################################################################
2135 00:36:39.640080 00380000 ################################################################
2136 00:36:40.285023 00400000 ################################################################
2137 00:36:40.956474 00480000 ################################################################
2138 00:36:41.639141 00500000 ################################################################
2139 00:36:42.327008 00580000 ################################################################
2140 00:36:42.985117 00600000 ################################################################ done.
2141 00:36:42.988653 The bootfile was 6811536 bytes long.
2142 00:36:42.991613 Sending tftp read request... done.
2143 00:36:42.994905 Waiting for the transfer...
2144 00:36:43.597384 00000000 ################################################################
2145 00:36:44.231620 00080000 ################################################################
2146 00:36:44.846568 00100000 ################################################################
2147 00:36:45.467650 00180000 ################################################################
2148 00:36:46.114906 00200000 ################################################################
2149 00:36:46.718921 00280000 ################################################################
2150 00:36:47.364812 00300000 ################################################################
2151 00:36:47.994765 00380000 ################################################################
2152 00:36:48.603248 00400000 ################################################################
2153 00:36:49.194644 00480000 ################################################################
2154 00:36:49.826178 00500000 ################################################################
2155 00:36:50.420466 00580000 ################################################################
2156 00:36:51.069516 00600000 ################################################################
2157 00:36:51.687981 00680000 ################################################################
2158 00:36:52.274995 00700000 ################################################################
2159 00:36:52.926669 00780000 ################################################################
2160 00:36:53.116020 00800000 #################### done.
2161 00:36:53.119364 Sending tftp read request... done.
2162 00:36:53.122892 Waiting for the transfer...
2163 00:36:53.122997 00000000 # done.
2164 00:36:53.132835 Command line loaded dynamically from TFTP file: 6887867/tftp-deploy-gg3d0iqb/kernel/cmdline
2165 00:36:53.146643 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2166 00:36:53.153342 Shutting down all USB controllers.
2167 00:36:53.153614 Removing current net device
2168 00:36:53.156660 Finalizing coreboot
2169 00:36:53.163389 Exiting depthcharge with code 4 at timestamp: 28943742
2170 00:36:53.163794
2171 00:36:53.164044 Starting kernel ...
2172 00:36:53.164299
2173 00:36:53.164521
2174 00:36:53.165155 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2175 00:36:53.165498 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2176 00:36:53.165857 Setting prompt string to ['Linux version [0-9]']
2177 00:36:53.166180 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2178 00:36:53.166498 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2180 00:41:17.166489 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2182 00:41:17.167909 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2184 00:41:17.168975 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 00:41:17.170575 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 00:41:17.171798 Cleaning after the job
2190 00:41:17.172242 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/ramdisk
2191 00:41:17.175414 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/kernel
2192 00:41:17.178001 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887867/tftp-deploy-gg3d0iqb/modules
2193 00:41:17.178978 start: 5.1 power-off (timeout 00:00:30) [common]
2194 00:41:17.179807 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2195 00:41:17.205925 >> Command sent successfully.
2196 00:41:17.207650 Returned 0 in 0 seconds
2197 00:41:17.308949 end: 5.1 power-off (duration 00:00:00) [common]
2199 00:41:17.310531 start: 5.2 read-feedback (timeout 00:10:00) [common]
2200 00:41:17.311720 Listened to connection for namespace 'common' for up to 1s
2201 00:41:18.314031 Finalising connection for namespace 'common'
2202 00:41:18.314741 Disconnecting from shell: Finalise
2203 00:41:18.416356 end: 5.2 read-feedback (duration 00:00:01) [common]
2204 00:41:18.416964 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6887867
2205 00:41:18.442049 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6887867
2206 00:41:18.442695 JobError: Your job cannot terminate cleanly.