Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 00:51:09.611925 lava-dispatcher, installed at version: 2022.06
2 00:51:09.612116 start: 0 validate
3 00:51:09.612246 Start time: 2022-07-26 00:51:09.612239+00:00 (UTC)
4 00:51:09.612370 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:51:09.612497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 00:51:09.900442 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:51:09.901254 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-517-g92709d8ae585%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:51:10.195552 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:51:10.196246 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 00:51:10.484649 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:51:10.485527 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip69-517-g92709d8ae585%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:51:10.781853 validate duration: 1.17
14 00:51:10.783433 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:51:10.784082 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:51:10.784671 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:51:10.785321 Not decompressing ramdisk as can be used compressed.
18 00:51:10.785862 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 00:51:10.786297 saving as /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/ramdisk/initrd.cpio.gz
20 00:51:10.786763 total size: 5411064 (5MB)
21 00:51:10.792231 progress 0% (0MB)
22 00:51:10.800617 progress 5% (0MB)
23 00:51:10.807662 progress 10% (0MB)
24 00:51:10.812502 progress 15% (0MB)
25 00:51:10.817773 progress 20% (1MB)
26 00:51:10.820987 progress 25% (1MB)
27 00:51:10.823509 progress 30% (1MB)
28 00:51:10.825996 progress 35% (1MB)
29 00:51:10.828394 progress 40% (2MB)
30 00:51:10.830517 progress 45% (2MB)
31 00:51:10.832456 progress 50% (2MB)
32 00:51:10.834316 progress 55% (2MB)
33 00:51:10.836369 progress 60% (3MB)
34 00:51:10.838026 progress 65% (3MB)
35 00:51:10.839672 progress 70% (3MB)
36 00:51:10.841319 progress 75% (3MB)
37 00:51:10.842987 progress 80% (4MB)
38 00:51:10.844471 progress 85% (4MB)
39 00:51:10.845962 progress 90% (4MB)
40 00:51:10.847336 progress 95% (4MB)
41 00:51:10.848856 progress 100% (5MB)
42 00:51:10.849044 5MB downloaded in 0.06s (82.84MB/s)
43 00:51:10.849204 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:51:10.849469 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:51:10.849562 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:51:10.849653 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:51:10.849760 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-517-g92709d8ae585/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 00:51:10.849848 saving as /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/kernel/bzImage
50 00:51:10.849915 total size: 6811536 (6MB)
51 00:51:10.849980 No compression specified
52 00:51:10.851098 progress 0% (0MB)
53 00:51:10.852821 progress 5% (0MB)
54 00:51:10.854671 progress 10% (0MB)
55 00:51:10.856428 progress 15% (1MB)
56 00:51:10.858083 progress 20% (1MB)
57 00:51:10.859663 progress 25% (1MB)
58 00:51:10.861441 progress 30% (1MB)
59 00:51:10.863017 progress 35% (2MB)
60 00:51:10.864718 progress 40% (2MB)
61 00:51:10.866310 progress 45% (2MB)
62 00:51:10.867871 progress 50% (3MB)
63 00:51:10.869610 progress 55% (3MB)
64 00:51:10.871164 progress 60% (3MB)
65 00:51:10.872870 progress 65% (4MB)
66 00:51:10.874476 progress 70% (4MB)
67 00:51:10.876067 progress 75% (4MB)
68 00:51:10.877848 progress 80% (5MB)
69 00:51:10.879437 progress 85% (5MB)
70 00:51:10.881202 progress 90% (5MB)
71 00:51:10.882778 progress 95% (6MB)
72 00:51:10.884374 progress 100% (6MB)
73 00:51:10.884632 6MB downloaded in 0.03s (187.13MB/s)
74 00:51:10.884776 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:51:10.885048 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:51:10.885137 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:51:10.885224 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:51:10.885328 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 00:51:10.885395 saving as /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/nfsrootfs/full.rootfs.tar
81 00:51:10.885457 total size: 122624016 (116MB)
82 00:51:10.885519 Using unxz to decompress xz
83 00:51:10.888752 progress 0% (0MB)
84 00:51:11.318049 progress 5% (5MB)
85 00:51:11.757316 progress 10% (11MB)
86 00:51:12.198480 progress 15% (17MB)
87 00:51:12.646004 progress 20% (23MB)
88 00:51:12.953890 progress 25% (29MB)
89 00:51:13.284168 progress 30% (35MB)
90 00:51:13.520047 progress 35% (40MB)
91 00:51:13.722563 progress 40% (46MB)
92 00:51:14.059953 progress 45% (52MB)
93 00:51:14.409209 progress 50% (58MB)
94 00:51:14.743605 progress 55% (64MB)
95 00:51:15.091493 progress 60% (70MB)
96 00:51:15.413788 progress 65% (76MB)
97 00:51:15.781423 progress 70% (81MB)
98 00:51:16.181038 progress 75% (87MB)
99 00:51:16.579787 progress 80% (93MB)
100 00:51:16.690853 progress 85% (99MB)
101 00:51:16.851270 progress 90% (105MB)
102 00:51:17.172512 progress 95% (111MB)
103 00:51:17.532022 progress 100% (116MB)
104 00:51:17.537111 116MB downloaded in 6.65s (17.58MB/s)
105 00:51:17.537369 end: 1.3.1 http-download (duration 00:00:07) [common]
107 00:51:17.537638 end: 1.3 download-retry (duration 00:00:07) [common]
108 00:51:17.537734 start: 1.4 download-retry (timeout 00:09:53) [common]
109 00:51:17.537824 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 00:51:17.537941 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip69-517-g92709d8ae585/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 00:51:17.538014 saving as /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/modules/modules.tar
112 00:51:17.538076 total size: 51972 (0MB)
113 00:51:17.538140 Using unxz to decompress xz
114 00:51:17.541341 progress 63% (0MB)
115 00:51:17.541720 progress 100% (0MB)
116 00:51:17.544932 0MB downloaded in 0.01s (7.24MB/s)
117 00:51:17.545193 end: 1.4.1 http-download (duration 00:00:00) [common]
119 00:51:17.545471 end: 1.4 download-retry (duration 00:00:00) [common]
120 00:51:17.545569 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 00:51:17.545666 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 00:51:19.178003 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6887891/extract-nfsrootfs-3_a7lt8j
123 00:51:19.178195 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 00:51:19.178298 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 00:51:19.178436 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe
126 00:51:19.178536 makedir: /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin
127 00:51:19.178621 makedir: /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/tests
128 00:51:19.178702 makedir: /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/results
129 00:51:19.178799 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-add-keys
130 00:51:19.178929 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-add-sources
131 00:51:19.179043 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-background-process-start
132 00:51:19.179154 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-background-process-stop
133 00:51:19.179265 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-common-functions
134 00:51:19.179373 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-echo-ipv4
135 00:51:19.179483 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-install-packages
136 00:51:19.179591 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-installed-packages
137 00:51:19.179706 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-os-build
138 00:51:19.179816 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-probe-channel
139 00:51:19.179924 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-probe-ip
140 00:51:19.180031 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-target-ip
141 00:51:19.180139 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-target-mac
142 00:51:19.180246 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-target-storage
143 00:51:19.180360 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-case
144 00:51:19.180469 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-event
145 00:51:19.180577 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-feedback
146 00:51:19.180685 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-raise
147 00:51:19.180791 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-reference
148 00:51:19.180898 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-runner
149 00:51:19.181049 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-set
150 00:51:19.181157 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-test-shell
151 00:51:19.181266 Updating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-install-packages (oe)
152 00:51:19.181378 Updating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/bin/lava-installed-packages (oe)
153 00:51:19.181474 Creating /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/environment
154 00:51:19.181560 LAVA metadata
155 00:51:19.181627 - LAVA_JOB_ID=6887891
156 00:51:19.181690 - LAVA_DISPATCHER_IP=192.168.201.1
157 00:51:19.181785 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 00:51:19.181850 skipped lava-vland-overlay
159 00:51:19.181924 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 00:51:19.182004 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 00:51:19.182065 skipped lava-multinode-overlay
162 00:51:19.182138 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 00:51:19.182219 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 00:51:19.182291 Loading test definitions
165 00:51:19.182384 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 00:51:19.182461 Using /lava-6887891 at stage 0
167 00:51:19.182556 Fetching tests from https://github.com/kernelci/test-definitions
168 00:51:19.182635 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/0/tests/0_ltp-timers'
169 00:51:22.519237 Running '/usr/bin/git checkout kernelci.org
170 00:51:22.651707 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 00:51:22.652372 uuid=6887891_1.5.2.3.1 testdef=None
172 00:51:22.652536 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 00:51:22.652782 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 00:51:22.653451 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 00:51:22.653696 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 00:51:22.654493 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 00:51:22.654743 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 00:51:22.655502 runner path: /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/0/tests/0_ltp-timers test_uuid 6887891_1.5.2.3.1
182 00:51:22.655593 GRP_TEST='TMR'
183 00:51:22.655660 SKIPFILE='skipfile-lkft.yaml'
184 00:51:22.655723 SKIP_INSTALL='true'
185 00:51:22.655782 TST_CMDFILES=''
186 00:51:22.655915 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 00:51:22.656133 Creating lava-test-runner.conf files
189 00:51:22.656206 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6887891/lava-overlay-9foo1yoe/lava-6887891/0 for stage 0
190 00:51:22.656293 - 0_ltp-timers
191 00:51:22.656393 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
192 00:51:22.656483 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
193 00:51:29.734505 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 00:51:29.734661 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
195 00:51:29.734755 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 00:51:29.734856 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
197 00:51:29.734949 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
198 00:51:29.835332 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 00:51:29.835688 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
200 00:51:29.835800 extracting modules file /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6887891/extract-nfsrootfs-3_a7lt8j
201 00:51:29.840065 extracting modules file /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6887891/extract-overlay-ramdisk-g2wvomrd/ramdisk
202 00:51:29.843797 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 00:51:29.843901 start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
204 00:51:29.843985 [common] Applying overlay to NFS
205 00:51:29.844055 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6887891/compress-overlay-sqhqdlfd/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6887891/extract-nfsrootfs-3_a7lt8j
206 00:51:30.277857 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 00:51:30.278017 start: 1.5.6 configure-preseed-file (timeout 00:09:41) [common]
208 00:51:30.278110 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 00:51:30.278201 start: 1.5.7 compress-ramdisk (timeout 00:09:41) [common]
210 00:51:30.278284 Building ramdisk /var/lib/lava/dispatcher/tmp/6887891/extract-overlay-ramdisk-g2wvomrd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6887891/extract-overlay-ramdisk-g2wvomrd/ramdisk
211 00:51:30.311025 >> 24434 blocks
212 00:51:30.770223 rename /var/lib/lava/dispatcher/tmp/6887891/extract-overlay-ramdisk-g2wvomrd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/ramdisk/ramdisk.cpio.gz
213 00:51:30.770622 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
214 00:51:30.770740 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
215 00:51:30.770840 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
216 00:51:30.770934 No mkimage arch provided, not using FIT.
217 00:51:30.771023 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 00:51:30.771109 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 00:51:30.771208 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
220 00:51:30.771299 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
221 00:51:30.771402 No LXC device requested
222 00:51:30.771505 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 00:51:30.771600 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
224 00:51:30.771682 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 00:51:30.771754 Checking files for TFTP limit of 4294967296 bytes.
226 00:51:30.772137 end: 1 tftp-deploy (duration 00:00:20) [common]
227 00:51:30.772245 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 00:51:30.772339 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 00:51:30.772467 substitutions:
230 00:51:30.772543 - {DTB}: None
231 00:51:30.772640 - {INITRD}: 6887891/tftp-deploy-p09zbhy7/ramdisk/ramdisk.cpio.gz
232 00:51:30.772710 - {KERNEL}: 6887891/tftp-deploy-p09zbhy7/kernel/bzImage
233 00:51:30.772775 - {LAVA_MAC}: None
234 00:51:30.772886 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6887891/extract-nfsrootfs-3_a7lt8j
235 00:51:30.772985 - {NFS_SERVER_IP}: 192.168.201.1
236 00:51:30.773046 - {PRESEED_CONFIG}: None
237 00:51:30.773105 - {PRESEED_LOCAL}: None
238 00:51:30.773162 - {RAMDISK}: 6887891/tftp-deploy-p09zbhy7/ramdisk/ramdisk.cpio.gz
239 00:51:30.773218 - {ROOT_PART}: None
240 00:51:30.773275 - {ROOT}: None
241 00:51:30.773330 - {SERVER_IP}: 192.168.201.1
242 00:51:30.773386 - {TEE}: None
243 00:51:30.773441 Parsed boot commands:
244 00:51:30.773496 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 00:51:30.773652 Parsed boot commands: tftpboot 192.168.201.1 6887891/tftp-deploy-p09zbhy7/kernel/bzImage 6887891/tftp-deploy-p09zbhy7/kernel/cmdline 6887891/tftp-deploy-p09zbhy7/ramdisk/ramdisk.cpio.gz
246 00:51:30.773754 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 00:51:30.773842 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 00:51:30.773968 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 00:51:30.774064 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 00:51:30.774135 Not connected, no need to disconnect.
251 00:51:30.774214 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 00:51:30.774296 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 00:51:30.774365 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 00:51:30.777145 Setting prompt string to ['lava-test: # ']
255 00:51:30.777429 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 00:51:30.777535 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 00:51:30.777629 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 00:51:30.777719 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 00:51:30.777901 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 00:51:30.797370 >> Command sent successfully.
261 00:51:30.799212 Returned 0 in 0 seconds
262 00:51:30.900378 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 00:51:30.901861 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 00:51:30.902381 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 00:51:30.902839 Setting prompt string to 'Starting depthcharge on Helios...'
267 00:51:30.903180 Changing prompt to 'Starting depthcharge on Helios...'
268 00:51:30.903533 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 00:51:30.904812 [Enter `^Ec?' for help]
270 00:51:37.147681
271 00:51:37.148337
272 00:51:37.157496 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 00:51:37.160645 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 00:51:37.167319 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 00:51:37.170582 CPU: AES supported, TXT NOT supported, VT supported
276 00:51:37.177660 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 00:51:37.180635 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 00:51:37.187490 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 00:51:37.190831 VBOOT: Loading verstage.
280 00:51:37.193828 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 00:51:37.200710 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 00:51:37.206925 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 00:51:37.207430 CBFS @ c08000 size 3f8000
284 00:51:37.213961 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 00:51:37.216969 CBFS: Locating 'fallback/verstage'
286 00:51:37.220291 CBFS: Found @ offset 10fb80 size 1072c
287 00:51:37.224208
288 00:51:37.224792
289 00:51:37.234035 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 00:51:37.248620 Probing TPM: . done!
291 00:51:37.251972 TPM ready after 0 ms
292 00:51:37.255293 Connected to device vid:did:rid of 1ae0:0028:00
293 00:51:37.265172 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 00:51:37.269163 Initialized TPM device CR50 revision 0
295 00:51:37.304434 tlcl_send_startup: Startup return code is 0
296 00:51:37.305024 TPM: setup succeeded
297 00:51:37.316936 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 00:51:37.321014 Chrome EC: UHEPI supported
299 00:51:37.324361 Phase 1
300 00:51:37.327378 FMAP: area GBB found @ c05000 (12288 bytes)
301 00:51:37.334120 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 00:51:37.337822 Phase 2
303 00:51:37.338407 Phase 3
304 00:51:37.340770 FMAP: area GBB found @ c05000 (12288 bytes)
305 00:51:37.347420 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 00:51:37.354127 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 00:51:37.357124 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 00:51:37.364009 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 00:51:37.379811 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 00:51:37.383249 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 00:51:37.389614 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 00:51:37.393863 Phase 4
313 00:51:37.397647 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 00:51:37.403544 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 00:51:37.583966 VB2:vb2_rsa_verify_digest() Digest check failed!
316 00:51:37.586937 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 00:51:37.589922 Saving nvdata
318 00:51:37.593586 Reboot requested (10020007)
319 00:51:37.596829 board_reset() called!
320 00:51:37.597461 full_reset() called!
321 00:51:42.114958
322 00:51:42.115547
323 00:51:42.124475 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 00:51:42.127604 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 00:51:42.134678 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 00:51:42.137678 CPU: AES supported, TXT NOT supported, VT supported
327 00:51:42.144410 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 00:51:42.147892 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 00:51:42.154368 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 00:51:42.158178 VBOOT: Loading verstage.
331 00:51:42.161015 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 00:51:42.167414 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 00:51:42.174258 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 00:51:42.174753 CBFS @ c08000 size 3f8000
335 00:51:42.180924 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 00:51:42.183914 CBFS: Locating 'fallback/verstage'
337 00:51:42.187795 CBFS: Found @ offset 10fb80 size 1072c
338 00:51:42.191383
339 00:51:42.191875
340 00:51:42.201631 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 00:51:42.216248 Probing TPM: . done!
342 00:51:42.219076 TPM ready after 0 ms
343 00:51:42.222681 Connected to device vid:did:rid of 1ae0:0028:00
344 00:51:42.232546 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
345 00:51:42.236430 Initialized TPM device CR50 revision 0
346 00:51:42.271463 tlcl_send_startup: Startup return code is 0
347 00:51:42.272007 TPM: setup succeeded
348 00:51:42.284748 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 00:51:42.288428 Chrome EC: UHEPI supported
350 00:51:42.291329 Phase 1
351 00:51:42.294542 FMAP: area GBB found @ c05000 (12288 bytes)
352 00:51:42.301309 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 00:51:42.308358 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 00:51:42.311179 Recovery requested (1009000e)
355 00:51:42.316994 Saving nvdata
356 00:51:42.323139 tlcl_extend: response is 0
357 00:51:42.331813 tlcl_extend: response is 0
358 00:51:42.338886 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 00:51:42.342063 CBFS @ c08000 size 3f8000
360 00:51:42.349066 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 00:51:42.351944 CBFS: Locating 'fallback/romstage'
362 00:51:42.355078 CBFS: Found @ offset 80 size 145fc
363 00:51:42.359001 Accumulated console time in verstage 98 ms
364 00:51:42.359583
365 00:51:42.359966
366 00:51:42.371754 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 00:51:42.378238 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 00:51:42.381888 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 00:51:42.385200 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 00:51:42.392026 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 00:51:42.395046 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 00:51:42.398147 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
373 00:51:42.401897 TCO_STS: 0000 0000
374 00:51:42.405101 GEN_PMCON: e0015238 00000200
375 00:51:42.408303 GBLRST_CAUSE: 00000000 00000000
376 00:51:42.408886 prev_sleep_state 5
377 00:51:42.411615 Boot Count incremented to 33287
378 00:51:42.418797 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 00:51:42.422008 CBFS @ c08000 size 3f8000
380 00:51:42.428423 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 00:51:42.429229 CBFS: Locating 'fspm.bin'
382 00:51:42.434766 CBFS: Found @ offset 5ffc0 size 71000
383 00:51:42.438494 Chrome EC: UHEPI supported
384 00:51:42.444862 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 00:51:42.448379 Probing TPM: done!
386 00:51:42.455088 Connected to device vid:did:rid of 1ae0:0028:00
387 00:51:42.464963 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
388 00:51:42.470905 Initialized TPM device CR50 revision 0
389 00:51:42.480136 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 00:51:42.486719 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 00:51:42.490337 MRC cache found, size 1948
392 00:51:42.493205 bootmode is set to: 2
393 00:51:42.496655 PRMRR disabled by config.
394 00:51:42.499938 SPD INDEX = 1
395 00:51:42.503459 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 00:51:42.506508 CBFS @ c08000 size 3f8000
397 00:51:42.513568 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 00:51:42.514174 CBFS: Locating 'spd.bin'
399 00:51:42.516330 CBFS: Found @ offset 5fb80 size 400
400 00:51:42.520068 SPD: module type is LPDDR3
401 00:51:42.523578 SPD: module part is
402 00:51:42.529665 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 00:51:42.533309 SPD: device width 4 bits, bus width 8 bits
404 00:51:42.536541 SPD: module size is 4096 MB (per channel)
405 00:51:42.539928 memory slot: 0 configuration done.
406 00:51:42.543045 memory slot: 2 configuration done.
407 00:51:42.595148 CBMEM:
408 00:51:42.597857 IMD: root @ 99fff000 254 entries.
409 00:51:42.601612 IMD: root @ 99ffec00 62 entries.
410 00:51:42.604818 External stage cache:
411 00:51:42.608011 IMD: root @ 9abff000 254 entries.
412 00:51:42.611906 IMD: root @ 9abfec00 62 entries.
413 00:51:42.617859 Chrome EC: clear events_b mask to 0x0000000020004000
414 00:51:42.630508 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 00:51:42.644259 tlcl_write: response is 0
416 00:51:42.653164 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 00:51:42.660050 MRC: TPM MRC hash updated successfully.
418 00:51:42.660635 2 DIMMs found
419 00:51:42.663096 SMM Memory Map
420 00:51:42.666891 SMRAM : 0x9a000000 0x1000000
421 00:51:42.669806 Subregion 0: 0x9a000000 0xa00000
422 00:51:42.672763 Subregion 1: 0x9aa00000 0x200000
423 00:51:42.676110 Subregion 2: 0x9ac00000 0x400000
424 00:51:42.679749 top_of_ram = 0x9a000000
425 00:51:42.682934 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 00:51:42.689836 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 00:51:42.692698 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 00:51:42.699652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 00:51:42.702573 CBFS @ c08000 size 3f8000
430 00:51:42.705761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 00:51:42.709164 CBFS: Locating 'fallback/postcar'
432 00:51:42.715893 CBFS: Found @ offset 107000 size 4b44
433 00:51:42.722692 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 00:51:42.732663 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 00:51:42.735775 Processing 180 relocs. Offset value of 0x97c0c000
436 00:51:42.744042 Accumulated console time in romstage 286 ms
437 00:51:42.744626
438 00:51:42.745062
439 00:51:42.754430 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 00:51:42.760906 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 00:51:42.764140 CBFS @ c08000 size 3f8000
442 00:51:42.767310 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 00:51:42.770909 CBFS: Locating 'fallback/ramstage'
444 00:51:42.777579 CBFS: Found @ offset 43380 size 1b9e8
445 00:51:42.784251 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 00:51:42.815817 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 00:51:42.819284 Processing 3976 relocs. Offset value of 0x98db0000
448 00:51:42.825941 Accumulated console time in postcar 52 ms
449 00:51:42.826520
450 00:51:42.826902
451 00:51:42.835716 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 00:51:42.842566 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 00:51:42.845854 WARNING: RO_VPD is uninitialized or empty.
454 00:51:42.849003 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 00:51:42.855427 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 00:51:42.855914 Normal boot.
457 00:51:42.862322 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 00:51:42.865160 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 00:51:42.869114 CBFS @ c08000 size 3f8000
460 00:51:42.875546 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 00:51:42.878526 CBFS: Locating 'cpu_microcode_blob.bin'
462 00:51:42.882337 CBFS: Found @ offset 14700 size 2ec00
463 00:51:42.885561 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 00:51:42.888910 Skip microcode update
465 00:51:42.895366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 00:51:42.896003 CBFS @ c08000 size 3f8000
467 00:51:42.902330 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 00:51:42.905530 CBFS: Locating 'fsps.bin'
469 00:51:42.908810 CBFS: Found @ offset d1fc0 size 35000
470 00:51:42.934567 Detected 4 core, 8 thread CPU.
471 00:51:42.937102 Setting up SMI for CPU
472 00:51:42.940763 IED base = 0x9ac00000
473 00:51:42.941275 IED size = 0x00400000
474 00:51:42.944251 Will perform SMM setup.
475 00:51:42.950817 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 00:51:42.956986 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 00:51:42.963583 Processing 16 relocs. Offset value of 0x00030000
478 00:51:42.964172 Attempting to start 7 APs
479 00:51:42.969891 Waiting for 10ms after sending INIT.
480 00:51:42.983905 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
481 00:51:42.984500 done.
482 00:51:42.987231 AP: slot 5 apic_id 4.
483 00:51:42.990781 AP: slot 6 apic_id 5.
484 00:51:42.991378 AP: slot 1 apic_id 2.
485 00:51:42.997184 Waiting for 2nd SIPI to complete...done.
486 00:51:42.997678 AP: slot 4 apic_id 3.
487 00:51:43.000240 AP: slot 2 apic_id 7.
488 00:51:43.003684 AP: slot 7 apic_id 6.
489 00:51:43.010381 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 00:51:43.013768 Processing 13 relocs. Offset value of 0x00038000
491 00:51:43.020329 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 00:51:43.026928 Installing SMM handler to 0x9a000000
493 00:51:43.033627 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 00:51:43.040005 Processing 658 relocs. Offset value of 0x9a010000
495 00:51:43.046657 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 00:51:43.050048 Processing 13 relocs. Offset value of 0x9a008000
497 00:51:43.056799 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 00:51:43.063397 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 00:51:43.069676 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 00:51:43.073384 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 00:51:43.079841 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 00:51:43.087223 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 00:51:43.089656 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 00:51:43.096433 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 00:51:43.099601 Clearing SMI status registers
506 00:51:43.103284 SMI_STS: PM1
507 00:51:43.103877 PM1_STS: PWRBTN
508 00:51:43.106576 TCO_STS: SECOND_TO
509 00:51:43.109963 New SMBASE 0x9a000000
510 00:51:43.113293 In relocation handler: CPU 0
511 00:51:43.116978 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 00:51:43.119628 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 00:51:43.123440 Relocation complete.
514 00:51:43.126543 New SMBASE 0x99fff400
515 00:51:43.127136 In relocation handler: CPU 3
516 00:51:43.133082 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 00:51:43.136398 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 00:51:43.139421 Relocation complete.
519 00:51:43.143185 New SMBASE 0x99ffec00
520 00:51:43.143675 In relocation handler: CPU 5
521 00:51:43.149741 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
522 00:51:43.153035 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 00:51:43.156823 Relocation complete.
524 00:51:43.157450 New SMBASE 0x99ffe800
525 00:51:43.160084 In relocation handler: CPU 6
526 00:51:43.166488 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
527 00:51:43.169736 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 00:51:43.172856 Relocation complete.
529 00:51:43.173376 New SMBASE 0x99fff800
530 00:51:43.176217 In relocation handler: CPU 2
531 00:51:43.183028 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
532 00:51:43.186527 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 00:51:43.189590 Relocation complete.
534 00:51:43.190075 New SMBASE 0x99ffe400
535 00:51:43.192823 In relocation handler: CPU 7
536 00:51:43.196487 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
537 00:51:43.202845 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 00:51:43.206114 Relocation complete.
539 00:51:43.206704 New SMBASE 0x99fff000
540 00:51:43.209499 In relocation handler: CPU 4
541 00:51:43.212656 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
542 00:51:43.219735 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 00:51:43.222731 Relocation complete.
544 00:51:43.223220 New SMBASE 0x99fffc00
545 00:51:43.226076 In relocation handler: CPU 1
546 00:51:43.229856 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
547 00:51:43.235862 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 00:51:43.236377 Relocation complete.
549 00:51:43.239767 Initializing CPU #0
550 00:51:43.242840 CPU: vendor Intel device 806ec
551 00:51:43.246086 CPU: family 06, model 8e, stepping 0c
552 00:51:43.249162 Clearing out pending MCEs
553 00:51:43.252646 Setting up local APIC...
554 00:51:43.253275 apic_id: 0x00 done.
555 00:51:43.256221 Turbo is available but hidden
556 00:51:43.259056 Turbo is available and visible
557 00:51:43.262577 VMX status: enabled
558 00:51:43.266259 IA32_FEATURE_CONTROL status: locked
559 00:51:43.269389 Skip microcode update
560 00:51:43.269911 CPU #0 initialized
561 00:51:43.272471 Initializing CPU #3
562 00:51:43.275834 Initializing CPU #5
563 00:51:43.276426 Initializing CPU #1
564 00:51:43.279133 Initializing CPU #4
565 00:51:43.282569 CPU: vendor Intel device 806ec
566 00:51:43.286113 CPU: family 06, model 8e, stepping 0c
567 00:51:43.289314 CPU: vendor Intel device 806ec
568 00:51:43.292353 CPU: family 06, model 8e, stepping 0c
569 00:51:43.295798 Clearing out pending MCEs
570 00:51:43.299297 Clearing out pending MCEs
571 00:51:43.299912 Setting up local APIC...
572 00:51:43.302128 CPU: vendor Intel device 806ec
573 00:51:43.305937 CPU: family 06, model 8e, stepping 0c
574 00:51:43.309096 Clearing out pending MCEs
575 00:51:43.312344 Setting up local APIC...
576 00:51:43.316282 Initializing CPU #6
577 00:51:43.319170 CPU: vendor Intel device 806ec
578 00:51:43.322389 CPU: family 06, model 8e, stepping 0c
579 00:51:43.325669 CPU: vendor Intel device 806ec
580 00:51:43.329174 CPU: family 06, model 8e, stepping 0c
581 00:51:43.332465 Clearing out pending MCEs
582 00:51:43.333189 Clearing out pending MCEs
583 00:51:43.335544 Setting up local APIC...
584 00:51:43.338663 Initializing CPU #7
585 00:51:43.339142 Initializing CPU #2
586 00:51:43.342687 CPU: vendor Intel device 806ec
587 00:51:43.345430 CPU: family 06, model 8e, stepping 0c
588 00:51:43.348810 apic_id: 0x03 done.
589 00:51:43.352571 apic_id: 0x02 done.
590 00:51:43.353237 VMX status: enabled
591 00:51:43.355608 VMX status: enabled
592 00:51:43.358560 IA32_FEATURE_CONTROL status: locked
593 00:51:43.362507 IA32_FEATURE_CONTROL status: locked
594 00:51:43.365475 Skip microcode update
595 00:51:43.366086 Skip microcode update
596 00:51:43.368594 CPU #4 initialized
597 00:51:43.372228 CPU #1 initialized
598 00:51:43.372814 Setting up local APIC...
599 00:51:43.375165 CPU: vendor Intel device 806ec
600 00:51:43.382104 CPU: family 06, model 8e, stepping 0c
601 00:51:43.382694 Clearing out pending MCEs
602 00:51:43.385294 Clearing out pending MCEs
603 00:51:43.388678 Setting up local APIC...
604 00:51:43.391843 apic_id: 0x01 done.
605 00:51:43.392429 apic_id: 0x04 done.
606 00:51:43.395333 Setting up local APIC...
607 00:51:43.398527 VMX status: enabled
608 00:51:43.399012 apic_id: 0x06 done.
609 00:51:43.401787 Setting up local APIC...
610 00:51:43.405117 IA32_FEATURE_CONTROL status: locked
611 00:51:43.409129 VMX status: enabled
612 00:51:43.409743 apic_id: 0x05 done.
613 00:51:43.411854 IA32_FEATURE_CONTROL status: locked
614 00:51:43.415112 VMX status: enabled
615 00:51:43.418284 Skip microcode update
616 00:51:43.421911 IA32_FEATURE_CONTROL status: locked
617 00:51:43.422508 CPU #5 initialized
618 00:51:43.424871 Skip microcode update
619 00:51:43.428076 Skip microcode update
620 00:51:43.428566 CPU #6 initialized
621 00:51:43.431821 CPU #3 initialized
622 00:51:43.434688 apic_id: 0x07 done.
623 00:51:43.435201 VMX status: enabled
624 00:51:43.438074 VMX status: enabled
625 00:51:43.441804 IA32_FEATURE_CONTROL status: locked
626 00:51:43.444940 IA32_FEATURE_CONTROL status: locked
627 00:51:43.448371 Skip microcode update
628 00:51:43.449002 Skip microcode update
629 00:51:43.451249 CPU #7 initialized
630 00:51:43.451735 CPU #2 initialized
631 00:51:43.458030 bsp_do_flight_plan done after 459 msecs.
632 00:51:43.461456 CPU: frequency set to 4200 MHz
633 00:51:43.461946 Enabling SMIs.
634 00:51:43.464858 Locking SMM.
635 00:51:43.478287 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 00:51:43.481880 CBFS @ c08000 size 3f8000
637 00:51:43.488264 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 00:51:43.488870 CBFS: Locating 'vbt.bin'
639 00:51:43.491553 CBFS: Found @ offset 5f5c0 size 499
640 00:51:43.498312 Found a VBT of 4608 bytes after decompression
641 00:51:43.682269 Display FSP Version Info HOB
642 00:51:43.685310 Reference Code - CPU = 9.0.1e.30
643 00:51:43.689054 uCode Version = 0.0.0.ca
644 00:51:43.692419 TXT ACM version = ff.ff.ff.ffff
645 00:51:43.695630 Display FSP Version Info HOB
646 00:51:43.698493 Reference Code - ME = 9.0.1e.30
647 00:51:43.701627 MEBx version = 0.0.0.0
648 00:51:43.705466 ME Firmware Version = Consumer SKU
649 00:51:43.708678 Display FSP Version Info HOB
650 00:51:43.711981 Reference Code - CML PCH = 9.0.1e.30
651 00:51:43.714953 PCH-CRID Status = Disabled
652 00:51:43.718172 PCH-CRID Original Value = ff.ff.ff.ffff
653 00:51:43.722276 PCH-CRID New Value = ff.ff.ff.ffff
654 00:51:43.725239 OPROM - RST - RAID = ff.ff.ff.ffff
655 00:51:43.728794 ChipsetInit Base Version = ff.ff.ff.ffff
656 00:51:43.731742 ChipsetInit Oem Version = ff.ff.ff.ffff
657 00:51:43.734880 Display FSP Version Info HOB
658 00:51:43.741593 Reference Code - SA - System Agent = 9.0.1e.30
659 00:51:43.744687 Reference Code - MRC = 0.7.1.6c
660 00:51:43.745234 SA - PCIe Version = 9.0.1e.30
661 00:51:43.748480 SA-CRID Status = Disabled
662 00:51:43.751520 SA-CRID Original Value = 0.0.0.c
663 00:51:43.754916 SA-CRID New Value = 0.0.0.c
664 00:51:43.758512 OPROM - VBIOS = ff.ff.ff.ffff
665 00:51:43.761146 RTC Init
666 00:51:43.765169 Set power on after power failure.
667 00:51:43.765752 Disabling Deep S3
668 00:51:43.768197 Disabling Deep S3
669 00:51:43.768680 Disabling Deep S4
670 00:51:43.771513 Disabling Deep S4
671 00:51:43.774563 Disabling Deep S5
672 00:51:43.775051 Disabling Deep S5
673 00:51:43.781553 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
674 00:51:43.782163 Enumerating buses...
675 00:51:43.788168 Show all devs... Before device enumeration.
676 00:51:43.791414 Root Device: enabled 1
677 00:51:43.792015 CPU_CLUSTER: 0: enabled 1
678 00:51:43.794823 DOMAIN: 0000: enabled 1
679 00:51:43.797944 APIC: 00: enabled 1
680 00:51:43.798447 PCI: 00:00.0: enabled 1
681 00:51:43.801077 PCI: 00:02.0: enabled 1
682 00:51:43.804758 PCI: 00:04.0: enabled 0
683 00:51:43.807837 PCI: 00:05.0: enabled 0
684 00:51:43.808436 PCI: 00:12.0: enabled 1
685 00:51:43.811195 PCI: 00:12.5: enabled 0
686 00:51:43.814226 PCI: 00:12.6: enabled 0
687 00:51:43.817567 PCI: 00:14.0: enabled 1
688 00:51:43.818089 PCI: 00:14.1: enabled 0
689 00:51:43.821647 PCI: 00:14.3: enabled 1
690 00:51:43.824801 PCI: 00:14.5: enabled 0
691 00:51:43.825432 PCI: 00:15.0: enabled 1
692 00:51:43.828116 PCI: 00:15.1: enabled 1
693 00:51:43.831047 PCI: 00:15.2: enabled 0
694 00:51:43.834153 PCI: 00:15.3: enabled 0
695 00:51:43.834645 PCI: 00:16.0: enabled 1
696 00:51:43.837338 PCI: 00:16.1: enabled 0
697 00:51:43.840711 PCI: 00:16.2: enabled 0
698 00:51:43.843901 PCI: 00:16.3: enabled 0
699 00:51:43.844435 PCI: 00:16.4: enabled 0
700 00:51:43.847803 PCI: 00:16.5: enabled 0
701 00:51:43.850939 PCI: 00:17.0: enabled 1
702 00:51:43.854306 PCI: 00:19.0: enabled 1
703 00:51:43.854798 PCI: 00:19.1: enabled 0
704 00:51:43.857494 PCI: 00:19.2: enabled 0
705 00:51:43.860924 PCI: 00:1a.0: enabled 0
706 00:51:43.864166 PCI: 00:1c.0: enabled 0
707 00:51:43.864760 PCI: 00:1c.1: enabled 0
708 00:51:43.867766 PCI: 00:1c.2: enabled 0
709 00:51:43.870810 PCI: 00:1c.3: enabled 0
710 00:51:43.871300 PCI: 00:1c.4: enabled 0
711 00:51:43.874319 PCI: 00:1c.5: enabled 0
712 00:51:43.877538 PCI: 00:1c.6: enabled 0
713 00:51:43.880526 PCI: 00:1c.7: enabled 0
714 00:51:43.881047 PCI: 00:1d.0: enabled 1
715 00:51:43.884446 PCI: 00:1d.1: enabled 0
716 00:51:43.887688 PCI: 00:1d.2: enabled 0
717 00:51:43.890782 PCI: 00:1d.3: enabled 0
718 00:51:43.891377 PCI: 00:1d.4: enabled 0
719 00:51:43.893802 PCI: 00:1d.5: enabled 1
720 00:51:43.897806 PCI: 00:1e.0: enabled 1
721 00:51:43.900480 PCI: 00:1e.1: enabled 0
722 00:51:43.900995 PCI: 00:1e.2: enabled 1
723 00:51:43.903840 PCI: 00:1e.3: enabled 1
724 00:51:43.907579 PCI: 00:1f.0: enabled 1
725 00:51:43.908245 PCI: 00:1f.1: enabled 1
726 00:51:43.910390 PCI: 00:1f.2: enabled 1
727 00:51:43.913536 PCI: 00:1f.3: enabled 1
728 00:51:43.917243 PCI: 00:1f.4: enabled 1
729 00:51:43.917752 PCI: 00:1f.5: enabled 1
730 00:51:43.920288 PCI: 00:1f.6: enabled 0
731 00:51:43.923415 USB0 port 0: enabled 1
732 00:51:43.927103 I2C: 00:15: enabled 1
733 00:51:43.927580 I2C: 00:5d: enabled 1
734 00:51:43.930290 GENERIC: 0.0: enabled 1
735 00:51:43.933536 I2C: 00:1a: enabled 1
736 00:51:43.934020 I2C: 00:38: enabled 1
737 00:51:43.937295 I2C: 00:39: enabled 1
738 00:51:43.940365 I2C: 00:3a: enabled 1
739 00:51:43.940852 I2C: 00:3b: enabled 1
740 00:51:43.943412 PCI: 00:00.0: enabled 1
741 00:51:43.947320 SPI: 00: enabled 1
742 00:51:43.947914 SPI: 01: enabled 1
743 00:51:43.950268 PNP: 0c09.0: enabled 1
744 00:51:43.953468 USB2 port 0: enabled 1
745 00:51:43.953949 USB2 port 1: enabled 1
746 00:51:43.957055 USB2 port 2: enabled 0
747 00:51:43.960279 USB2 port 3: enabled 0
748 00:51:43.960865 USB2 port 5: enabled 0
749 00:51:43.963603 USB2 port 6: enabled 1
750 00:51:43.967475 USB2 port 9: enabled 1
751 00:51:43.970382 USB3 port 0: enabled 1
752 00:51:43.970868 USB3 port 1: enabled 1
753 00:51:43.973758 USB3 port 2: enabled 1
754 00:51:43.977232 USB3 port 3: enabled 1
755 00:51:43.977822 USB3 port 4: enabled 0
756 00:51:43.980391 APIC: 02: enabled 1
757 00:51:43.983624 APIC: 07: enabled 1
758 00:51:43.984214 APIC: 01: enabled 1
759 00:51:43.986828 APIC: 03: enabled 1
760 00:51:43.987419 APIC: 04: enabled 1
761 00:51:43.990293 APIC: 05: enabled 1
762 00:51:43.993550 APIC: 06: enabled 1
763 00:51:43.994147 Compare with tree...
764 00:51:43.996795 Root Device: enabled 1
765 00:51:44.000151 CPU_CLUSTER: 0: enabled 1
766 00:51:44.003624 APIC: 00: enabled 1
767 00:51:44.004252 APIC: 02: enabled 1
768 00:51:44.006574 APIC: 07: enabled 1
769 00:51:44.010207 APIC: 01: enabled 1
770 00:51:44.010693 APIC: 03: enabled 1
771 00:51:44.013272 APIC: 04: enabled 1
772 00:51:44.017257 APIC: 05: enabled 1
773 00:51:44.017847 APIC: 06: enabled 1
774 00:51:44.020042 DOMAIN: 0000: enabled 1
775 00:51:44.023166 PCI: 00:00.0: enabled 1
776 00:51:44.026367 PCI: 00:02.0: enabled 1
777 00:51:44.026853 PCI: 00:04.0: enabled 0
778 00:51:44.030046 PCI: 00:05.0: enabled 0
779 00:51:44.033247 PCI: 00:12.0: enabled 1
780 00:51:44.036512 PCI: 00:12.5: enabled 0
781 00:51:44.040139 PCI: 00:12.6: enabled 0
782 00:51:44.040633 PCI: 00:14.0: enabled 1
783 00:51:44.043258 USB0 port 0: enabled 1
784 00:51:44.046763 USB2 port 0: enabled 1
785 00:51:44.050231 USB2 port 1: enabled 1
786 00:51:44.053267 USB2 port 2: enabled 0
787 00:51:44.053766 USB2 port 3: enabled 0
788 00:51:44.056355 USB2 port 5: enabled 0
789 00:51:44.060499 USB2 port 6: enabled 1
790 00:51:44.063473 USB2 port 9: enabled 1
791 00:51:44.066711 USB3 port 0: enabled 1
792 00:51:44.067302 USB3 port 1: enabled 1
793 00:51:44.069685 USB3 port 2: enabled 1
794 00:51:44.073366 USB3 port 3: enabled 1
795 00:51:44.076541 USB3 port 4: enabled 0
796 00:51:44.080454 PCI: 00:14.1: enabled 0
797 00:51:44.083511 PCI: 00:14.3: enabled 1
798 00:51:44.084102 PCI: 00:14.5: enabled 0
799 00:51:44.086579 PCI: 00:15.0: enabled 1
800 00:51:44.089556 I2C: 00:15: enabled 1
801 00:51:44.093209 PCI: 00:15.1: enabled 1
802 00:51:44.093695 I2C: 00:5d: enabled 1
803 00:51:44.096569 GENERIC: 0.0: enabled 1
804 00:51:44.100012 PCI: 00:15.2: enabled 0
805 00:51:44.103161 PCI: 00:15.3: enabled 0
806 00:51:44.106382 PCI: 00:16.0: enabled 1
807 00:51:44.106871 PCI: 00:16.1: enabled 0
808 00:51:44.109429 PCI: 00:16.2: enabled 0
809 00:51:44.113334 PCI: 00:16.3: enabled 0
810 00:51:44.116568 PCI: 00:16.4: enabled 0
811 00:51:44.119752 PCI: 00:16.5: enabled 0
812 00:51:44.120345 PCI: 00:17.0: enabled 1
813 00:51:44.123044 PCI: 00:19.0: enabled 1
814 00:51:44.126145 I2C: 00:1a: enabled 1
815 00:51:44.129894 I2C: 00:38: enabled 1
816 00:51:44.130490 I2C: 00:39: enabled 1
817 00:51:44.133102 I2C: 00:3a: enabled 1
818 00:51:44.136179 I2C: 00:3b: enabled 1
819 00:51:44.139411 PCI: 00:19.1: enabled 0
820 00:51:44.142531 PCI: 00:19.2: enabled 0
821 00:51:44.143020 PCI: 00:1a.0: enabled 0
822 00:51:44.146137 PCI: 00:1c.0: enabled 0
823 00:51:44.149467 PCI: 00:1c.1: enabled 0
824 00:51:44.152775 PCI: 00:1c.2: enabled 0
825 00:51:44.156347 PCI: 00:1c.3: enabled 0
826 00:51:44.156837 PCI: 00:1c.4: enabled 0
827 00:51:44.159617 PCI: 00:1c.5: enabled 0
828 00:51:44.162761 PCI: 00:1c.6: enabled 0
829 00:51:44.165702 PCI: 00:1c.7: enabled 0
830 00:51:44.169121 PCI: 00:1d.0: enabled 1
831 00:51:44.169792 PCI: 00:1d.1: enabled 0
832 00:51:44.172347 PCI: 00:1d.2: enabled 0
833 00:51:44.176043 PCI: 00:1d.3: enabled 0
834 00:51:44.179342 PCI: 00:1d.4: enabled 0
835 00:51:44.182676 PCI: 00:1d.5: enabled 1
836 00:51:44.183272 PCI: 00:00.0: enabled 1
837 00:51:44.185769 PCI: 00:1e.0: enabled 1
838 00:51:44.189588 PCI: 00:1e.1: enabled 0
839 00:51:44.192342 PCI: 00:1e.2: enabled 1
840 00:51:44.192829 SPI: 00: enabled 1
841 00:51:44.196095 PCI: 00:1e.3: enabled 1
842 00:51:44.199211 SPI: 01: enabled 1
843 00:51:44.202150 PCI: 00:1f.0: enabled 1
844 00:51:44.202641 PNP: 0c09.0: enabled 1
845 00:51:44.205867 PCI: 00:1f.1: enabled 1
846 00:51:44.209151 PCI: 00:1f.2: enabled 1
847 00:51:44.212701 PCI: 00:1f.3: enabled 1
848 00:51:44.215790 PCI: 00:1f.4: enabled 1
849 00:51:44.216377 PCI: 00:1f.5: enabled 1
850 00:51:44.218721 PCI: 00:1f.6: enabled 0
851 00:51:44.222453 Root Device scanning...
852 00:51:44.225596 scan_static_bus for Root Device
853 00:51:44.229139 CPU_CLUSTER: 0 enabled
854 00:51:44.229837 DOMAIN: 0000 enabled
855 00:51:44.232197 DOMAIN: 0000 scanning...
856 00:51:44.235341 PCI: pci_scan_bus for bus 00
857 00:51:44.238341 PCI: 00:00.0 [8086/0000] ops
858 00:51:44.242159 PCI: 00:00.0 [8086/9b61] enabled
859 00:51:44.245412 PCI: 00:02.0 [8086/0000] bus ops
860 00:51:44.248467 PCI: 00:02.0 [8086/9b41] enabled
861 00:51:44.252011 PCI: 00:04.0 [8086/1903] disabled
862 00:51:44.255314 PCI: 00:08.0 [8086/1911] enabled
863 00:51:44.258476 PCI: 00:12.0 [8086/02f9] enabled
864 00:51:44.262200 PCI: 00:14.0 [8086/0000] bus ops
865 00:51:44.265385 PCI: 00:14.0 [8086/02ed] enabled
866 00:51:44.268993 PCI: 00:14.2 [8086/02ef] enabled
867 00:51:44.271951 PCI: 00:14.3 [8086/02f0] enabled
868 00:51:44.275144 PCI: 00:15.0 [8086/0000] bus ops
869 00:51:44.278921 PCI: 00:15.0 [8086/02e8] enabled
870 00:51:44.282261 PCI: 00:15.1 [8086/0000] bus ops
871 00:51:44.285477 PCI: 00:15.1 [8086/02e9] enabled
872 00:51:44.288623 PCI: 00:16.0 [8086/0000] ops
873 00:51:44.292367 PCI: 00:16.0 [8086/02e0] enabled
874 00:51:44.295213 PCI: 00:17.0 [8086/0000] ops
875 00:51:44.298531 PCI: 00:17.0 [8086/02d3] enabled
876 00:51:44.302371 PCI: 00:19.0 [8086/0000] bus ops
877 00:51:44.305391 PCI: 00:19.0 [8086/02c5] enabled
878 00:51:44.308475 PCI: 00:1d.0 [8086/0000] bus ops
879 00:51:44.311964 PCI: 00:1d.0 [8086/02b0] enabled
880 00:51:44.318191 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 00:51:44.321927 PCI: 00:1e.0 [8086/0000] ops
882 00:51:44.325034 PCI: 00:1e.0 [8086/02a8] enabled
883 00:51:44.328432 PCI: 00:1e.2 [8086/0000] bus ops
884 00:51:44.331327 PCI: 00:1e.2 [8086/02aa] enabled
885 00:51:44.335122 PCI: 00:1e.3 [8086/0000] bus ops
886 00:51:44.338120 PCI: 00:1e.3 [8086/02ab] enabled
887 00:51:44.341865 PCI: 00:1f.0 [8086/0000] bus ops
888 00:51:44.344832 PCI: 00:1f.0 [8086/0284] enabled
889 00:51:44.348360 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 00:51:44.354574 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 00:51:44.358474 PCI: 00:1f.3 [8086/0000] bus ops
892 00:51:44.361531 PCI: 00:1f.3 [8086/02c8] enabled
893 00:51:44.364737 PCI: 00:1f.4 [8086/0000] bus ops
894 00:51:44.368526 PCI: 00:1f.4 [8086/02a3] enabled
895 00:51:44.371540 PCI: 00:1f.5 [8086/0000] bus ops
896 00:51:44.374930 PCI: 00:1f.5 [8086/02a4] enabled
897 00:51:44.377717 PCI: Leftover static devices:
898 00:51:44.378208 PCI: 00:05.0
899 00:51:44.381636 PCI: 00:12.5
900 00:51:44.382215 PCI: 00:12.6
901 00:51:44.384903 PCI: 00:14.1
902 00:51:44.385526 PCI: 00:14.5
903 00:51:44.385914 PCI: 00:15.2
904 00:51:44.388090 PCI: 00:15.3
905 00:51:44.388671 PCI: 00:16.1
906 00:51:44.391764 PCI: 00:16.2
907 00:51:44.392361 PCI: 00:16.3
908 00:51:44.392750 PCI: 00:16.4
909 00:51:44.394643 PCI: 00:16.5
910 00:51:44.395130 PCI: 00:19.1
911 00:51:44.397707 PCI: 00:19.2
912 00:51:44.398195 PCI: 00:1a.0
913 00:51:44.398579 PCI: 00:1c.0
914 00:51:44.401324 PCI: 00:1c.1
915 00:51:44.401838 PCI: 00:1c.2
916 00:51:44.404479 PCI: 00:1c.3
917 00:51:44.405016 PCI: 00:1c.4
918 00:51:44.407957 PCI: 00:1c.5
919 00:51:44.408539 PCI: 00:1c.6
920 00:51:44.408931 PCI: 00:1c.7
921 00:51:44.411127 PCI: 00:1d.1
922 00:51:44.411718 PCI: 00:1d.2
923 00:51:44.414440 PCI: 00:1d.3
924 00:51:44.414930 PCI: 00:1d.4
925 00:51:44.415310 PCI: 00:1d.5
926 00:51:44.417655 PCI: 00:1e.1
927 00:51:44.418305 PCI: 00:1f.1
928 00:51:44.420755 PCI: 00:1f.2
929 00:51:44.421426 PCI: 00:1f.6
930 00:51:44.424414 PCI: Check your devicetree.cb.
931 00:51:44.427655 PCI: 00:02.0 scanning...
932 00:51:44.431521 scan_generic_bus for PCI: 00:02.0
933 00:51:44.434402 scan_generic_bus for PCI: 00:02.0 done
934 00:51:44.441248 scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs
935 00:51:44.441816 PCI: 00:14.0 scanning...
936 00:51:44.444401 scan_static_bus for PCI: 00:14.0
937 00:51:44.447669 USB0 port 0 enabled
938 00:51:44.451629 USB0 port 0 scanning...
939 00:51:44.454428 scan_static_bus for USB0 port 0
940 00:51:44.457535 USB2 port 0 enabled
941 00:51:44.458023 USB2 port 1 enabled
942 00:51:44.461356 USB2 port 2 disabled
943 00:51:44.461847 USB2 port 3 disabled
944 00:51:44.464650 USB2 port 5 disabled
945 00:51:44.468108 USB2 port 6 enabled
946 00:51:44.468695 USB2 port 9 enabled
947 00:51:44.470828 USB3 port 0 enabled
948 00:51:44.474488 USB3 port 1 enabled
949 00:51:44.474979 USB3 port 2 enabled
950 00:51:44.477927 USB3 port 3 enabled
951 00:51:44.478511 USB3 port 4 disabled
952 00:51:44.481271 USB2 port 0 scanning...
953 00:51:44.484566 scan_static_bus for USB2 port 0
954 00:51:44.487726 scan_static_bus for USB2 port 0 done
955 00:51:44.494129 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
956 00:51:44.497632 USB2 port 1 scanning...
957 00:51:44.500916 scan_static_bus for USB2 port 1
958 00:51:44.503956 scan_static_bus for USB2 port 1 done
959 00:51:44.507719 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
960 00:51:44.510681 USB2 port 6 scanning...
961 00:51:44.513812 scan_static_bus for USB2 port 6
962 00:51:44.517066 scan_static_bus for USB2 port 6 done
963 00:51:44.523972 scan_bus: scanning of bus USB2 port 6 took 9711 usecs
964 00:51:44.527535 USB2 port 9 scanning...
965 00:51:44.530844 scan_static_bus for USB2 port 9
966 00:51:44.533803 scan_static_bus for USB2 port 9 done
967 00:51:44.540592 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
968 00:51:44.541136 USB3 port 0 scanning...
969 00:51:44.543810 scan_static_bus for USB3 port 0
970 00:51:44.550320 scan_static_bus for USB3 port 0 done
971 00:51:44.553515 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
972 00:51:44.556977 USB3 port 1 scanning...
973 00:51:44.559692 scan_static_bus for USB3 port 1
974 00:51:44.562772 scan_static_bus for USB3 port 1 done
975 00:51:44.569486 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
976 00:51:44.569573 USB3 port 2 scanning...
977 00:51:44.573194 scan_static_bus for USB3 port 2
978 00:51:44.579584 scan_static_bus for USB3 port 2 done
979 00:51:44.582622 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
980 00:51:44.586345 USB3 port 3 scanning...
981 00:51:44.589644 scan_static_bus for USB3 port 3
982 00:51:44.592777 scan_static_bus for USB3 port 3 done
983 00:51:44.599705 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
984 00:51:44.602776 scan_static_bus for USB0 port 0 done
985 00:51:44.609584 scan_bus: scanning of bus USB0 port 0 took 155443 usecs
986 00:51:44.612721 scan_static_bus for PCI: 00:14.0 done
987 00:51:44.615927 scan_bus: scanning of bus PCI: 00:14.0 took 173082 usecs
988 00:51:44.619589 PCI: 00:15.0 scanning...
989 00:51:44.622643 scan_generic_bus for PCI: 00:15.0
990 00:51:44.625822 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 00:51:44.632705 scan_generic_bus for PCI: 00:15.0 done
992 00:51:44.635888 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
993 00:51:44.639137 PCI: 00:15.1 scanning...
994 00:51:44.642376 scan_generic_bus for PCI: 00:15.1
995 00:51:44.649304 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 00:51:44.652520 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 00:51:44.655634 scan_generic_bus for PCI: 00:15.1 done
998 00:51:44.662256 scan_bus: scanning of bus PCI: 00:15.1 took 18673 usecs
999 00:51:44.662338 PCI: 00:19.0 scanning...
1000 00:51:44.669128 scan_generic_bus for PCI: 00:19.0
1001 00:51:44.672458 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 00:51:44.675560 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 00:51:44.678690 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 00:51:44.682350 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 00:51:44.689212 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 00:51:44.692411 scan_generic_bus for PCI: 00:19.0 done
1007 00:51:44.698715 scan_bus: scanning of bus PCI: 00:19.0 took 30762 usecs
1008 00:51:44.698802 PCI: 00:1d.0 scanning...
1009 00:51:44.702266 do_pci_scan_bridge for PCI: 00:1d.0
1010 00:51:44.705388 PCI: pci_scan_bus for bus 01
1011 00:51:44.708500 PCI: 01:00.0 [1c5c/1327] enabled
1012 00:51:44.715855 Enabling Common Clock Configuration
1013 00:51:44.719194 L1 Sub-State supported from root port 29
1014 00:51:44.722330 L1 Sub-State Support = 0xf
1015 00:51:44.725817 CommonModeRestoreTime = 0x28
1016 00:51:44.729347 Power On Value = 0x16, Power On Scale = 0x0
1017 00:51:44.729929 ASPM: Enabled L1
1018 00:51:44.735505 scan_bus: scanning of bus PCI: 00:1d.0 took 32805 usecs
1019 00:51:44.739061 PCI: 00:1e.2 scanning...
1020 00:51:44.742225 scan_generic_bus for PCI: 00:1e.2
1021 00:51:44.745634 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 00:51:44.748644 scan_generic_bus for PCI: 00:1e.2 done
1023 00:51:44.755723 scan_bus: scanning of bus PCI: 00:1e.2 took 14016 usecs
1024 00:51:44.758991 PCI: 00:1e.3 scanning...
1025 00:51:44.762188 scan_generic_bus for PCI: 00:1e.3
1026 00:51:44.765819 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 00:51:44.768920 scan_generic_bus for PCI: 00:1e.3 done
1028 00:51:44.775106 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1029 00:51:44.779007 PCI: 00:1f.0 scanning...
1030 00:51:44.782033 scan_static_bus for PCI: 00:1f.0
1031 00:51:44.782545 PNP: 0c09.0 enabled
1032 00:51:44.788402 scan_static_bus for PCI: 00:1f.0 done
1033 00:51:44.791621 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1034 00:51:44.795278 PCI: 00:1f.3 scanning...
1035 00:51:44.801780 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1036 00:51:44.802270 PCI: 00:1f.4 scanning...
1037 00:51:44.808653 scan_generic_bus for PCI: 00:1f.4
1038 00:51:44.812243 scan_generic_bus for PCI: 00:1f.4 done
1039 00:51:44.815493 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1040 00:51:44.818577 PCI: 00:1f.5 scanning...
1041 00:51:44.821649 scan_generic_bus for PCI: 00:1f.5
1042 00:51:44.825316 scan_generic_bus for PCI: 00:1f.5 done
1043 00:51:44.831839 scan_bus: scanning of bus PCI: 00:1f.5 took 10201 usecs
1044 00:51:44.838293 scan_bus: scanning of bus DOMAIN: 0000 took 605406 usecs
1045 00:51:44.841957 scan_static_bus for Root Device done
1046 00:51:44.848365 scan_bus: scanning of bus Root Device took 625291 usecs
1047 00:51:44.848862 done
1048 00:51:44.851837 Chrome EC: UHEPI supported
1049 00:51:44.858920 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 00:51:44.861790 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 00:51:44.868572 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 00:51:44.875914 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 00:51:44.879005 SPI flash protection: WPSW=0 SRP0=0
1054 00:51:44.886083 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 00:51:44.889058 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 00:51:44.892431 found VGA at PCI: 00:02.0
1057 00:51:44.895386 Setting up VGA for PCI: 00:02.0
1058 00:51:44.902068 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 00:51:44.905631 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 00:51:44.908875 Allocating resources...
1061 00:51:44.912085 Reading resources...
1062 00:51:44.915860 Root Device read_resources bus 0 link: 0
1063 00:51:44.919022 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 00:51:44.925613 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 00:51:44.928607 DOMAIN: 0000 read_resources bus 0 link: 0
1066 00:51:44.935888 PCI: 00:14.0 read_resources bus 0 link: 0
1067 00:51:44.939432 USB0 port 0 read_resources bus 0 link: 0
1068 00:51:44.947730 USB0 port 0 read_resources bus 0 link: 0 done
1069 00:51:44.951046 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 00:51:44.958218 PCI: 00:15.0 read_resources bus 1 link: 0
1071 00:51:44.961679 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 00:51:44.967946 PCI: 00:15.1 read_resources bus 2 link: 0
1073 00:51:44.971142 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 00:51:44.979029 PCI: 00:19.0 read_resources bus 3 link: 0
1075 00:51:44.985756 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 00:51:44.988788 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 00:51:44.995371 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 00:51:44.998577 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 00:51:45.005422 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 00:51:45.008913 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 00:51:45.015357 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 00:51:45.018833 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 00:51:45.025248 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 00:51:45.032234 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 00:51:45.035357 Root Device read_resources bus 0 link: 0 done
1086 00:51:45.038576 Done reading resources.
1087 00:51:45.042219 Show resources in subtree (Root Device)...After reading.
1088 00:51:45.048491 Root Device child on link 0 CPU_CLUSTER: 0
1089 00:51:45.051886 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 00:51:45.052466 APIC: 00
1091 00:51:45.055654 APIC: 02
1092 00:51:45.056243 APIC: 07
1093 00:51:45.058593 APIC: 01
1094 00:51:45.059073 APIC: 03
1095 00:51:45.059449 APIC: 04
1096 00:51:45.061718 APIC: 05
1097 00:51:45.062198 APIC: 06
1098 00:51:45.065167 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 00:51:45.075171 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 00:51:45.131684 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 00:51:45.132309 PCI: 00:00.0
1102 00:51:45.132745 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 00:51:45.133576 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 00:51:45.133973 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 00:51:45.134329 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 00:51:45.181900 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 00:51:45.182985 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 00:51:45.183511 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 00:51:45.184291 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 00:51:45.184682 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 00:51:45.185078 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 00:51:45.190575 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 00:51:45.200771 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 00:51:45.210616 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 00:51:45.220361 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 00:51:45.226767 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 00:51:45.236558 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 00:51:45.240366 PCI: 00:02.0
1119 00:51:45.250132 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 00:51:45.260059 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 00:51:45.266736 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 00:51:45.270454 PCI: 00:04.0
1123 00:51:45.271048 PCI: 00:08.0
1124 00:51:45.279998 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 00:51:45.283752 PCI: 00:12.0
1126 00:51:45.293195 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 00:51:45.296695 PCI: 00:14.0 child on link 0 USB0 port 0
1128 00:51:45.306219 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 00:51:45.313074 USB0 port 0 child on link 0 USB2 port 0
1130 00:51:45.313561 USB2 port 0
1131 00:51:45.316491 USB2 port 1
1132 00:51:45.317105 USB2 port 2
1133 00:51:45.319453 USB2 port 3
1134 00:51:45.320045 USB2 port 5
1135 00:51:45.323069 USB2 port 6
1136 00:51:45.323555 USB2 port 9
1137 00:51:45.326181 USB3 port 0
1138 00:51:45.326668 USB3 port 1
1139 00:51:45.329493 USB3 port 2
1140 00:51:45.329981 USB3 port 3
1141 00:51:45.332921 USB3 port 4
1142 00:51:45.333556 PCI: 00:14.2
1143 00:51:45.342717 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 00:51:45.352937 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 00:51:45.356093 PCI: 00:14.3
1146 00:51:45.366285 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 00:51:45.369506 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 00:51:45.379196 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 00:51:45.382850 I2C: 01:15
1150 00:51:45.386100 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 00:51:45.396012 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 00:51:45.396584 I2C: 02:5d
1153 00:51:45.399300 GENERIC: 0.0
1154 00:51:45.399877 PCI: 00:16.0
1155 00:51:45.409318 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 00:51:45.412305 PCI: 00:17.0
1157 00:51:45.422345 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 00:51:45.428941 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 00:51:45.439188 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 00:51:45.445392 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 00:51:45.455626 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 00:51:45.465656 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 00:51:45.468876 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 00:51:45.478637 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 00:51:45.479213 I2C: 03:1a
1166 00:51:45.482497 I2C: 03:38
1167 00:51:45.483075 I2C: 03:39
1168 00:51:45.485566 I2C: 03:3a
1169 00:51:45.486045 I2C: 03:3b
1170 00:51:45.492048 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 00:51:45.498665 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 00:51:45.508576 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 00:51:45.518474 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 00:51:45.519113 PCI: 01:00.0
1175 00:51:45.531690 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 00:51:45.532177 PCI: 00:1e.0
1177 00:51:45.541804 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 00:51:45.551877 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 00:51:45.557841 PCI: 00:1e.2 child on link 0 SPI: 00
1180 00:51:45.567956 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 00:51:45.568590 SPI: 00
1182 00:51:45.571314 PCI: 00:1e.3 child on link 0 SPI: 01
1183 00:51:45.581122 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 00:51:45.584179 SPI: 01
1185 00:51:45.588197 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 00:51:45.594389 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 00:51:45.604426 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 00:51:45.607456 PNP: 0c09.0
1189 00:51:45.614601 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 00:51:45.617555 PCI: 00:1f.3
1191 00:51:45.627292 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 00:51:45.637790 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 00:51:45.638379 PCI: 00:1f.4
1194 00:51:45.647534 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 00:51:45.657002 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 00:51:45.660682 PCI: 00:1f.5
1197 00:51:45.667122 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 00:51:45.673849 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 00:51:45.680385 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 00:51:45.687217 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 00:51:45.690404 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 00:51:45.693535 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 00:51:45.700152 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 00:51:45.703788 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 00:51:45.710294 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 00:51:45.716799 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 00:51:45.723615 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 00:51:45.733387 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 00:51:45.740101 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 00:51:45.743191 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 00:51:45.749945 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 00:51:45.756397 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 00:51:45.759767 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 00:51:45.766601 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 00:51:45.769588 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 00:51:45.776478 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 00:51:45.779918 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 00:51:45.782889 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 00:51:45.789594 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 00:51:45.793045 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 00:51:45.799654 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 00:51:45.802884 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 00:51:45.809138 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 00:51:45.812867 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 00:51:45.819287 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 00:51:45.822385 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 00:51:45.829150 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 00:51:45.832311 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 00:51:45.839317 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 00:51:45.842343 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 00:51:45.849153 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 00:51:45.852352 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 00:51:45.859132 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 00:51:45.862258 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 00:51:45.872518 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 00:51:45.875696 avoid_fixed_resources: DOMAIN: 0000
1237 00:51:45.878740 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 00:51:45.885474 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 00:51:45.895453 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 00:51:45.902154 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 00:51:45.908602 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 00:51:45.918769 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 00:51:45.925784 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 00:51:45.931939 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 00:51:45.938616 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 00:51:45.948518 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 00:51:45.955104 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 00:51:45.961974 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 00:51:45.964853 Setting resources...
1250 00:51:45.971974 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 00:51:45.974998 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 00:51:45.978095 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 00:51:45.981545 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 00:51:45.988476 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 00:51:45.991334 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 00:51:45.998175 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 00:51:46.004409 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 00:51:46.011573 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 00:51:46.017870 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 00:51:46.024850 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 00:51:46.027735 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 00:51:46.031235 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 00:51:46.037825 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 00:51:46.041093 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 00:51:46.047669 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 00:51:46.051142 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 00:51:46.057649 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 00:51:46.060796 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 00:51:46.067848 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 00:51:46.071081 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 00:51:46.077752 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 00:51:46.080885 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 00:51:46.087580 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 00:51:46.090726 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 00:51:46.097301 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 00:51:46.101296 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 00:51:46.107193 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 00:51:46.110490 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 00:51:46.114209 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 00:51:46.120490 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 00:51:46.124053 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 00:51:46.133714 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 00:51:46.140469 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 00:51:46.146816 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 00:51:46.154021 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 00:51:46.159894 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 00:51:46.166731 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 00:51:46.169907 Root Device assign_resources, bus 0 link: 0
1289 00:51:46.176875 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 00:51:46.183036 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 00:51:46.193521 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 00:51:46.200175 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 00:51:46.209528 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 00:51:46.216489 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 00:51:46.226595 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 00:51:46.229578 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 00:51:46.236121 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 00:51:46.242728 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 00:51:46.252910 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 00:51:46.259321 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 00:51:46.269619 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 00:51:46.273064 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 00:51:46.276066 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 00:51:46.286205 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 00:51:46.289622 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 00:51:46.295866 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 00:51:46.302376 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 00:51:46.312280 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 00:51:46.318895 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 00:51:46.325266 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 00:51:46.335879 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 00:51:46.342298 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 00:51:46.348718 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 00:51:46.358387 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 00:51:46.361952 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 00:51:46.368500 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 00:51:46.374886 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 00:51:46.384917 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 00:51:46.395115 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 00:51:46.398073 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 00:51:46.404715 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 00:51:46.411496 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 00:51:46.418161 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 00:51:46.427953 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 00:51:46.431039 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 00:51:46.438071 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 00:51:46.444209 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 00:51:46.450776 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 00:51:46.454348 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 00:51:46.457498 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 00:51:46.464542 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 00:51:46.468133 LPC: Trying to open IO window from 800 size 1ff
1333 00:51:46.477592 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 00:51:46.484375 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 00:51:46.494294 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 00:51:46.500922 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 00:51:46.507673 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 00:51:46.510686 Root Device assign_resources, bus 0 link: 0
1339 00:51:46.514498 Done setting resources.
1340 00:51:46.521005 Show resources in subtree (Root Device)...After assigning values.
1341 00:51:46.524115 Root Device child on link 0 CPU_CLUSTER: 0
1342 00:51:46.527755 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 00:51:46.530674 APIC: 00
1344 00:51:46.531160 APIC: 02
1345 00:51:46.531541 APIC: 07
1346 00:51:46.534196 APIC: 01
1347 00:51:46.534789 APIC: 03
1348 00:51:46.537508 APIC: 04
1349 00:51:46.537989 APIC: 05
1350 00:51:46.538369 APIC: 06
1351 00:51:46.544239 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 00:51:46.553825 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 00:51:46.563816 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 00:51:46.567206 PCI: 00:00.0
1355 00:51:46.573501 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 00:51:46.583905 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 00:51:46.593883 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 00:51:46.603467 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 00:51:46.613401 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 00:51:46.623296 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 00:51:46.629912 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 00:51:46.639909 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 00:51:46.649876 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 00:51:46.659819 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 00:51:46.669091 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 00:51:46.679498 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 00:51:46.685763 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 00:51:46.695863 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 00:51:46.705803 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 00:51:46.715734 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 00:51:46.719422 PCI: 00:02.0
1372 00:51:46.728864 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 00:51:46.738873 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 00:51:46.748467 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 00:51:46.749140 PCI: 00:04.0
1376 00:51:46.751981 PCI: 00:08.0
1377 00:51:46.761821 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 00:51:46.762398 PCI: 00:12.0
1379 00:51:46.771683 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 00:51:46.778929 PCI: 00:14.0 child on link 0 USB0 port 0
1381 00:51:46.788641 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 00:51:46.791641 USB0 port 0 child on link 0 USB2 port 0
1383 00:51:46.794701 USB2 port 0
1384 00:51:46.795186 USB2 port 1
1385 00:51:46.798395 USB2 port 2
1386 00:51:46.798888 USB2 port 3
1387 00:51:46.801730 USB2 port 5
1388 00:51:46.802214 USB2 port 6
1389 00:51:46.805137 USB2 port 9
1390 00:51:46.805620 USB3 port 0
1391 00:51:46.808341 USB3 port 1
1392 00:51:46.811445 USB3 port 2
1393 00:51:46.811925 USB3 port 3
1394 00:51:46.815130 USB3 port 4
1395 00:51:46.815727 PCI: 00:14.2
1396 00:51:46.825024 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 00:51:46.834522 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 00:51:46.838188 PCI: 00:14.3
1399 00:51:46.848105 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 00:51:46.850981 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 00:51:46.861378 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 00:51:46.864427 I2C: 01:15
1403 00:51:46.867496 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 00:51:46.877809 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 00:51:46.880903 I2C: 02:5d
1406 00:51:46.881430 GENERIC: 0.0
1407 00:51:46.884811 PCI: 00:16.0
1408 00:51:46.894324 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 00:51:46.894907 PCI: 00:17.0
1410 00:51:46.907092 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 00:51:46.917754 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 00:51:46.924141 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 00:51:46.933819 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 00:51:46.943896 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 00:51:46.953867 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 00:51:46.957160 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 00:51:46.966777 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 00:51:46.970697 I2C: 03:1a
1419 00:51:46.971277 I2C: 03:38
1420 00:51:46.973540 I2C: 03:39
1421 00:51:46.974130 I2C: 03:3a
1422 00:51:46.976978 I2C: 03:3b
1423 00:51:46.980188 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 00:51:46.990164 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 00:51:47.000269 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 00:51:47.009763 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 00:51:47.013483 PCI: 01:00.0
1428 00:51:47.023080 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 00:51:47.023665 PCI: 00:1e.0
1430 00:51:47.036496 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 00:51:47.046627 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 00:51:47.049545 PCI: 00:1e.2 child on link 0 SPI: 00
1433 00:51:47.059402 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 00:51:47.059990 SPI: 00
1435 00:51:47.065628 PCI: 00:1e.3 child on link 0 SPI: 01
1436 00:51:47.075657 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 00:51:47.076153 SPI: 01
1438 00:51:47.079365 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 00:51:47.089020 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 00:51:47.098896 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 00:51:47.099501 PNP: 0c09.0
1442 00:51:47.108698 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 00:51:47.112226 PCI: 00:1f.3
1444 00:51:47.121908 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 00:51:47.131709 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 00:51:47.132300 PCI: 00:1f.4
1447 00:51:47.141774 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 00:51:47.151496 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 00:51:47.155113 PCI: 00:1f.5
1450 00:51:47.165086 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 00:51:47.167934 Done allocating resources.
1452 00:51:47.171746 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 00:51:47.174768 Enabling resources...
1454 00:51:47.177896 PCI: 00:00.0 subsystem <- 8086/9b61
1455 00:51:47.181513 PCI: 00:00.0 cmd <- 06
1456 00:51:47.185174 PCI: 00:02.0 subsystem <- 8086/9b41
1457 00:51:47.188265 PCI: 00:02.0 cmd <- 03
1458 00:51:47.191055 PCI: 00:08.0 cmd <- 06
1459 00:51:47.194962 PCI: 00:12.0 subsystem <- 8086/02f9
1460 00:51:47.198162 PCI: 00:12.0 cmd <- 02
1461 00:51:47.201575 PCI: 00:14.0 subsystem <- 8086/02ed
1462 00:51:47.204602 PCI: 00:14.0 cmd <- 02
1463 00:51:47.205227 PCI: 00:14.2 cmd <- 02
1464 00:51:47.211260 PCI: 00:14.3 subsystem <- 8086/02f0
1465 00:51:47.211753 PCI: 00:14.3 cmd <- 02
1466 00:51:47.214451 PCI: 00:15.0 subsystem <- 8086/02e8
1467 00:51:47.218313 PCI: 00:15.0 cmd <- 02
1468 00:51:47.221547 PCI: 00:15.1 subsystem <- 8086/02e9
1469 00:51:47.225033 PCI: 00:15.1 cmd <- 02
1470 00:51:47.228409 PCI: 00:16.0 subsystem <- 8086/02e0
1471 00:51:47.231240 PCI: 00:16.0 cmd <- 02
1472 00:51:47.234333 PCI: 00:17.0 subsystem <- 8086/02d3
1473 00:51:47.238166 PCI: 00:17.0 cmd <- 03
1474 00:51:47.241167 PCI: 00:19.0 subsystem <- 8086/02c5
1475 00:51:47.244677 PCI: 00:19.0 cmd <- 02
1476 00:51:47.248234 PCI: 00:1d.0 bridge ctrl <- 0013
1477 00:51:47.251178 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 00:51:47.254274 PCI: 00:1d.0 cmd <- 06
1479 00:51:47.257563 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 00:51:47.260882 PCI: 00:1e.0 cmd <- 06
1481 00:51:47.264098 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 00:51:47.264674 PCI: 00:1e.2 cmd <- 06
1483 00:51:47.270710 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 00:51:47.271228 PCI: 00:1e.3 cmd <- 02
1485 00:51:47.274344 PCI: 00:1f.0 subsystem <- 8086/0284
1486 00:51:47.277582 PCI: 00:1f.0 cmd <- 407
1487 00:51:47.280674 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 00:51:47.283957 PCI: 00:1f.3 cmd <- 02
1489 00:51:47.287689 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 00:51:47.291340 PCI: 00:1f.4 cmd <- 03
1491 00:51:47.294179 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 00:51:47.297598 PCI: 00:1f.5 cmd <- 406
1493 00:51:47.306523 PCI: 01:00.0 cmd <- 02
1494 00:51:47.311411 done.
1495 00:51:47.321912 ME: Version: 14.0.39.1367
1496 00:51:47.328635 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1497 00:51:47.331872 Initializing devices...
1498 00:51:47.332455 Root Device init ...
1499 00:51:47.338138 Chrome EC: Set SMI mask to 0x0000000000000000
1500 00:51:47.341364 Chrome EC: clear events_b mask to 0x0000000000000000
1501 00:51:47.348326 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 00:51:47.354922 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 00:51:47.361690 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 00:51:47.365213 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 00:51:47.368096 Root Device init finished in 35163 usecs
1506 00:51:47.371868 CPU_CLUSTER: 0 init ...
1507 00:51:47.377969 CPU_CLUSTER: 0 init finished in 2448 usecs
1508 00:51:47.382746 PCI: 00:00.0 init ...
1509 00:51:47.385588 CPU TDP: 15 Watts
1510 00:51:47.389312 CPU PL2 = 64 Watts
1511 00:51:47.392393 PCI: 00:00.0 init finished in 7083 usecs
1512 00:51:47.395878 PCI: 00:02.0 init ...
1513 00:51:47.399142 PCI: 00:02.0 init finished in 2255 usecs
1514 00:51:47.402573 PCI: 00:08.0 init ...
1515 00:51:47.405501 PCI: 00:08.0 init finished in 2253 usecs
1516 00:51:47.408650 PCI: 00:12.0 init ...
1517 00:51:47.412643 PCI: 00:12.0 init finished in 2253 usecs
1518 00:51:47.415671 PCI: 00:14.0 init ...
1519 00:51:47.418830 PCI: 00:14.0 init finished in 2243 usecs
1520 00:51:47.422030 PCI: 00:14.2 init ...
1521 00:51:47.425188 PCI: 00:14.2 init finished in 2252 usecs
1522 00:51:47.429131 PCI: 00:14.3 init ...
1523 00:51:47.432252 PCI: 00:14.3 init finished in 2270 usecs
1524 00:51:47.435286 PCI: 00:15.0 init ...
1525 00:51:47.438442 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 00:51:47.442234 PCI: 00:15.0 init finished in 5972 usecs
1527 00:51:47.445736 PCI: 00:15.1 init ...
1528 00:51:47.448882 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 00:51:47.455084 PCI: 00:15.1 init finished in 5962 usecs
1530 00:51:47.455607 PCI: 00:16.0 init ...
1531 00:51:47.462099 PCI: 00:16.0 init finished in 2253 usecs
1532 00:51:47.465065 PCI: 00:19.0 init ...
1533 00:51:47.468325 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 00:51:47.471965 PCI: 00:19.0 init finished in 5976 usecs
1535 00:51:47.475467 PCI: 00:1d.0 init ...
1536 00:51:47.478655 Initializing PCH PCIe bridge.
1537 00:51:47.481734 PCI: 00:1d.0 init finished in 5284 usecs
1538 00:51:47.484967 PCI: 00:1f.0 init ...
1539 00:51:47.488025 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 00:51:47.495240 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 00:51:47.495830 IOAPIC: ID = 0x02
1542 00:51:47.498171 IOAPIC: Dumping registers
1543 00:51:47.501395 reg 0x0000: 0x02000000
1544 00:51:47.505399 reg 0x0001: 0x00770020
1545 00:51:47.505988 reg 0x0002: 0x00000000
1546 00:51:47.511692 PCI: 00:1f.0 init finished in 23523 usecs
1547 00:51:47.514915 PCI: 00:1f.4 init ...
1548 00:51:47.517717 PCI: 00:1f.4 init finished in 2262 usecs
1549 00:51:47.528840 PCI: 01:00.0 init ...
1550 00:51:47.531962 PCI: 01:00.0 init finished in 2243 usecs
1551 00:51:47.536332 PNP: 0c09.0 init ...
1552 00:51:47.540019 Google Chrome EC uptime: 11.089 seconds
1553 00:51:47.546139 Google Chrome AP resets since EC boot: 0
1554 00:51:47.549550 Google Chrome most recent AP reset causes:
1555 00:51:47.555780 Google Chrome EC reset flags at last EC boot: reset-pin
1556 00:51:47.559746 PNP: 0c09.0 init finished in 20574 usecs
1557 00:51:47.562686 Devices initialized
1558 00:51:47.563232 Show all devs... After init.
1559 00:51:47.565849 Root Device: enabled 1
1560 00:51:47.569485 CPU_CLUSTER: 0: enabled 1
1561 00:51:47.572722 DOMAIN: 0000: enabled 1
1562 00:51:47.573336 APIC: 00: enabled 1
1563 00:51:47.576180 PCI: 00:00.0: enabled 1
1564 00:51:47.579274 PCI: 00:02.0: enabled 1
1565 00:51:47.582368 PCI: 00:04.0: enabled 0
1566 00:51:47.582856 PCI: 00:05.0: enabled 0
1567 00:51:47.586067 PCI: 00:12.0: enabled 1
1568 00:51:47.589465 PCI: 00:12.5: enabled 0
1569 00:51:47.590044 PCI: 00:12.6: enabled 0
1570 00:51:47.592513 PCI: 00:14.0: enabled 1
1571 00:51:47.596295 PCI: 00:14.1: enabled 0
1572 00:51:47.599296 PCI: 00:14.3: enabled 1
1573 00:51:47.599876 PCI: 00:14.5: enabled 0
1574 00:51:47.602269 PCI: 00:15.0: enabled 1
1575 00:51:47.605612 PCI: 00:15.1: enabled 1
1576 00:51:47.609366 PCI: 00:15.2: enabled 0
1577 00:51:47.609949 PCI: 00:15.3: enabled 0
1578 00:51:47.612582 PCI: 00:16.0: enabled 1
1579 00:51:47.615830 PCI: 00:16.1: enabled 0
1580 00:51:47.618707 PCI: 00:16.2: enabled 0
1581 00:51:47.619195 PCI: 00:16.3: enabled 0
1582 00:51:47.622201 PCI: 00:16.4: enabled 0
1583 00:51:47.625806 PCI: 00:16.5: enabled 0
1584 00:51:47.628813 PCI: 00:17.0: enabled 1
1585 00:51:47.629350 PCI: 00:19.0: enabled 1
1586 00:51:47.632050 PCI: 00:19.1: enabled 0
1587 00:51:47.635900 PCI: 00:19.2: enabled 0
1588 00:51:47.636489 PCI: 00:1a.0: enabled 0
1589 00:51:47.638955 PCI: 00:1c.0: enabled 0
1590 00:51:47.642361 PCI: 00:1c.1: enabled 0
1591 00:51:47.645188 PCI: 00:1c.2: enabled 0
1592 00:51:47.645711 PCI: 00:1c.3: enabled 0
1593 00:51:47.648599 PCI: 00:1c.4: enabled 0
1594 00:51:47.652249 PCI: 00:1c.5: enabled 0
1595 00:51:47.655522 PCI: 00:1c.6: enabled 0
1596 00:51:47.656015 PCI: 00:1c.7: enabled 0
1597 00:51:47.658806 PCI: 00:1d.0: enabled 1
1598 00:51:47.661907 PCI: 00:1d.1: enabled 0
1599 00:51:47.665129 PCI: 00:1d.2: enabled 0
1600 00:51:47.665621 PCI: 00:1d.3: enabled 0
1601 00:51:47.669002 PCI: 00:1d.4: enabled 0
1602 00:51:47.672281 PCI: 00:1d.5: enabled 0
1603 00:51:47.672893 PCI: 00:1e.0: enabled 1
1604 00:51:47.675122 PCI: 00:1e.1: enabled 0
1605 00:51:47.678640 PCI: 00:1e.2: enabled 1
1606 00:51:47.681777 PCI: 00:1e.3: enabled 1
1607 00:51:47.682271 PCI: 00:1f.0: enabled 1
1608 00:51:47.684965 PCI: 00:1f.1: enabled 0
1609 00:51:47.688372 PCI: 00:1f.2: enabled 0
1610 00:51:47.691789 PCI: 00:1f.3: enabled 1
1611 00:51:47.692279 PCI: 00:1f.4: enabled 1
1612 00:51:47.695462 PCI: 00:1f.5: enabled 1
1613 00:51:47.698550 PCI: 00:1f.6: enabled 0
1614 00:51:47.701519 USB0 port 0: enabled 1
1615 00:51:47.702012 I2C: 01:15: enabled 1
1616 00:51:47.705305 I2C: 02:5d: enabled 1
1617 00:51:47.708366 GENERIC: 0.0: enabled 1
1618 00:51:47.708993 I2C: 03:1a: enabled 1
1619 00:51:47.711349 I2C: 03:38: enabled 1
1620 00:51:47.714840 I2C: 03:39: enabled 1
1621 00:51:47.715436 I2C: 03:3a: enabled 1
1622 00:51:47.718312 I2C: 03:3b: enabled 1
1623 00:51:47.721539 PCI: 00:00.0: enabled 1
1624 00:51:47.722030 SPI: 00: enabled 1
1625 00:51:47.724754 SPI: 01: enabled 1
1626 00:51:47.727972 PNP: 0c09.0: enabled 1
1627 00:51:47.728465 USB2 port 0: enabled 1
1628 00:51:47.731068 USB2 port 1: enabled 1
1629 00:51:47.734824 USB2 port 2: enabled 0
1630 00:51:47.737683 USB2 port 3: enabled 0
1631 00:51:47.738168 USB2 port 5: enabled 0
1632 00:51:47.741667 USB2 port 6: enabled 1
1633 00:51:47.744500 USB2 port 9: enabled 1
1634 00:51:47.745167 USB3 port 0: enabled 1
1635 00:51:47.748004 USB3 port 1: enabled 1
1636 00:51:47.751177 USB3 port 2: enabled 1
1637 00:51:47.751660 USB3 port 3: enabled 1
1638 00:51:47.754164 USB3 port 4: enabled 0
1639 00:51:47.757915 APIC: 02: enabled 1
1640 00:51:47.758402 APIC: 07: enabled 1
1641 00:51:47.761333 APIC: 01: enabled 1
1642 00:51:47.764653 APIC: 03: enabled 1
1643 00:51:47.765278 APIC: 04: enabled 1
1644 00:51:47.767741 APIC: 05: enabled 1
1645 00:51:47.771152 APIC: 06: enabled 1
1646 00:51:47.771632 PCI: 00:08.0: enabled 1
1647 00:51:47.774292 PCI: 00:14.2: enabled 1
1648 00:51:47.777544 PCI: 01:00.0: enabled 1
1649 00:51:47.781346 Disabling ACPI via APMC:
1650 00:51:47.784481 done.
1651 00:51:47.787492 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 00:51:47.791810 ELOG: NV offset 0xaf0000 size 0x4000
1653 00:51:47.798085 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 00:51:47.804699 ELOG: Event(17) added with size 13 at 2022-07-26 00:51:38 UTC
1655 00:51:47.810690 ELOG: Event(92) added with size 9 at 2022-07-26 00:51:38 UTC
1656 00:51:47.817651 ELOG: Event(93) added with size 9 at 2022-07-26 00:51:38 UTC
1657 00:51:47.824356 ELOG: Event(9A) added with size 9 at 2022-07-26 00:51:38 UTC
1658 00:51:47.831053 ELOG: Event(9E) added with size 10 at 2022-07-26 00:51:38 UTC
1659 00:51:47.837390 ELOG: Event(9F) added with size 14 at 2022-07-26 00:51:38 UTC
1660 00:51:47.840744 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1661 00:51:47.848351 ELOG: Event(A1) added with size 10 at 2022-07-26 00:51:38 UTC
1662 00:51:47.858330 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 00:51:47.864864 ELOG: Event(A0) added with size 9 at 2022-07-26 00:51:38 UTC
1664 00:51:47.868282 elog_add_boot_reason: Logged dev mode boot
1665 00:51:47.870945 Finalize devices...
1666 00:51:47.871430 PCI: 00:17.0 final
1667 00:51:47.874650 Devices finalized
1668 00:51:47.877892 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1669 00:51:47.884466 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1670 00:51:47.887728 ME: HFSTS1 : 0x90000245
1671 00:51:47.891495 ME: HFSTS2 : 0x3B850126
1672 00:51:47.897788 ME: HFSTS3 : 0x00000020
1673 00:51:47.901258 ME: HFSTS4 : 0x00004800
1674 00:51:47.904612 ME: HFSTS5 : 0x00000000
1675 00:51:47.907881 ME: HFSTS6 : 0x40400006
1676 00:51:47.910875 ME: Manufacturing Mode : NO
1677 00:51:47.914329 ME: FW Partition Table : OK
1678 00:51:47.917653 ME: Bringup Loader Failure : NO
1679 00:51:47.921138 ME: Firmware Init Complete : YES
1680 00:51:47.924264 ME: Boot Options Present : NO
1681 00:51:47.927519 ME: Update In Progress : NO
1682 00:51:47.930578 ME: D0i3 Support : YES
1683 00:51:47.934065 ME: Low Power State Enabled : NO
1684 00:51:47.937546 ME: CPU Replaced : NO
1685 00:51:47.940538 ME: CPU Replacement Valid : YES
1686 00:51:47.943939 ME: Current Working State : 5
1687 00:51:47.946986 ME: Current Operation State : 1
1688 00:51:47.950590 ME: Current Operation Mode : 0
1689 00:51:47.954023 ME: Error Code : 0
1690 00:51:47.957110 ME: CPU Debug Disabled : YES
1691 00:51:47.960152 ME: TXT Support : NO
1692 00:51:47.967105 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1693 00:51:47.973914 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 00:51:47.974508 CBFS @ c08000 size 3f8000
1695 00:51:47.980188 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 00:51:47.983495 CBFS: Locating 'fallback/dsdt.aml'
1697 00:51:47.986865 CBFS: Found @ offset 10bb80 size 3fa5
1698 00:51:47.993609 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 00:51:47.996908 CBFS @ c08000 size 3f8000
1700 00:51:48.003763 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 00:51:48.004385 CBFS: Locating 'fallback/slic'
1702 00:51:48.008969 CBFS: 'fallback/slic' not found.
1703 00:51:48.015588 ACPI: Writing ACPI tables at 99b3e000.
1704 00:51:48.016169 ACPI: * FACS
1705 00:51:48.018579 ACPI: * DSDT
1706 00:51:48.021861 Ramoops buffer: 0x100000@0x99a3d000.
1707 00:51:48.025620 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 00:51:48.031737 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 00:51:48.035107 Google Chrome EC: version:
1710 00:51:48.038784 ro: helios_v2.0.2659-56403530b
1711 00:51:48.041941 rw: helios_v2.0.2849-c41de27e7d
1712 00:51:48.042530 running image: 1
1713 00:51:48.045894 ACPI: * FADT
1714 00:51:48.046436 SCI is IRQ9
1715 00:51:48.053190 ACPI: added table 1/32, length now 40
1716 00:51:48.053771 ACPI: * SSDT
1717 00:51:48.055961 Found 1 CPU(s) with 8 core(s) each.
1718 00:51:48.059151 Error: Could not locate 'wifi_sar' in VPD.
1719 00:51:48.065590 Checking CBFS for default SAR values
1720 00:51:48.069081 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 00:51:48.072633 CBFS @ c08000 size 3f8000
1722 00:51:48.079047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 00:51:48.082516 CBFS: Locating 'wifi_sar_defaults.hex'
1724 00:51:48.085681 CBFS: Found @ offset 5fac0 size 77
1725 00:51:48.088743 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1726 00:51:48.095607 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1727 00:51:48.098607 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1728 00:51:48.105393 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1729 00:51:48.109224 failed to find key in VPD: dsm_calib_r0_0
1730 00:51:48.118739 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1731 00:51:48.121947 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1732 00:51:48.128800 failed to find key in VPD: dsm_calib_r0_1
1733 00:51:48.135273 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1734 00:51:48.141377 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1735 00:51:48.145364 failed to find key in VPD: dsm_calib_r0_2
1736 00:51:48.154949 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1737 00:51:48.158437 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1738 00:51:48.164600 failed to find key in VPD: dsm_calib_r0_3
1739 00:51:48.171689 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1740 00:51:48.178233 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1741 00:51:48.181381 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1742 00:51:48.188219 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1743 00:51:48.192243 EC returned error result code 1
1744 00:51:48.195456 EC returned error result code 1
1745 00:51:48.198508 EC returned error result code 1
1746 00:51:48.201613 PS2K: Bad resp from EC. Vivaldi disabled!
1747 00:51:48.208566 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1748 00:51:48.215333 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1749 00:51:48.218267 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1750 00:51:48.225058 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1751 00:51:48.228473 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1752 00:51:48.235124 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1753 00:51:48.241648 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1754 00:51:48.248242 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1755 00:51:48.251720 ACPI: added table 2/32, length now 44
1756 00:51:48.252292 ACPI: * MCFG
1757 00:51:48.258179 ACPI: added table 3/32, length now 48
1758 00:51:48.258668 ACPI: * TPM2
1759 00:51:48.261257 TPM2 log created at 99a2d000
1760 00:51:48.265009 ACPI: added table 4/32, length now 52
1761 00:51:48.268352 ACPI: * MADT
1762 00:51:48.268930 SCI is IRQ9
1763 00:51:48.271252 ACPI: added table 5/32, length now 56
1764 00:51:48.274700 current = 99b43ac0
1765 00:51:48.275332 ACPI: * DMAR
1766 00:51:48.278260 ACPI: added table 6/32, length now 60
1767 00:51:48.281078 ACPI: * IGD OpRegion
1768 00:51:48.284892 GMA: Found VBT in CBFS
1769 00:51:48.288339 GMA: Found valid VBT in CBFS
1770 00:51:48.291090 ACPI: added table 7/32, length now 64
1771 00:51:48.291573 ACPI: * HPET
1772 00:51:48.294743 ACPI: added table 8/32, length now 68
1773 00:51:48.298063 ACPI: done.
1774 00:51:48.301087 ACPI tables: 31744 bytes.
1775 00:51:48.304699 smbios_write_tables: 99a2c000
1776 00:51:48.307901 EC returned error result code 3
1777 00:51:48.310967 Couldn't obtain OEM name from CBI
1778 00:51:48.311456 Create SMBIOS type 17
1779 00:51:48.314905 PCI: 00:00.0 (Intel Cannonlake)
1780 00:51:48.317862 PCI: 00:14.3 (Intel WiFi)
1781 00:51:48.320918 SMBIOS tables: 939 bytes.
1782 00:51:48.324644 Writing table forward entry at 0x00000500
1783 00:51:48.331040 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1784 00:51:48.334284 Writing coreboot table at 0x99b62000
1785 00:51:48.340709 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1786 00:51:48.344483 1. 0000000000001000-000000000009ffff: RAM
1787 00:51:48.350981 2. 00000000000a0000-00000000000fffff: RESERVED
1788 00:51:48.354322 3. 0000000000100000-0000000099a2bfff: RAM
1789 00:51:48.360740 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1790 00:51:48.364131 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1791 00:51:48.370895 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1792 00:51:48.377688 7. 000000009a000000-000000009f7fffff: RESERVED
1793 00:51:48.380819 8. 00000000e0000000-00000000efffffff: RESERVED
1794 00:51:48.383755 9. 00000000fc000000-00000000fc000fff: RESERVED
1795 00:51:48.390617 10. 00000000fe000000-00000000fe00ffff: RESERVED
1796 00:51:48.394024 11. 00000000fed10000-00000000fed17fff: RESERVED
1797 00:51:48.400602 12. 00000000fed80000-00000000fed83fff: RESERVED
1798 00:51:48.403988 13. 00000000fed90000-00000000fed91fff: RESERVED
1799 00:51:48.410640 14. 00000000feda0000-00000000feda1fff: RESERVED
1800 00:51:48.413872 15. 0000000100000000-000000045e7fffff: RAM
1801 00:51:48.416733 Graphics framebuffer located at 0xc0000000
1802 00:51:48.420544 Passing 5 GPIOs to payload:
1803 00:51:48.426631 NAME | PORT | POLARITY | VALUE
1804 00:51:48.430135 write protect | undefined | high | low
1805 00:51:48.436854 lid | undefined | high | high
1806 00:51:48.440448 power | undefined | high | low
1807 00:51:48.447054 oprom | undefined | high | low
1808 00:51:48.453364 EC in RW | 0x000000cb | high | low
1809 00:51:48.453989 Board ID: 4
1810 00:51:48.459814 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1811 00:51:48.460340 CBFS @ c08000 size 3f8000
1812 00:51:48.467127 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1813 00:51:48.473272 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b60
1814 00:51:48.476479 coreboot table: 1492 bytes.
1815 00:51:48.479932 IMD ROOT 0. 99fff000 00001000
1816 00:51:48.483366 IMD SMALL 1. 99ffe000 00001000
1817 00:51:48.486430 FSP MEMORY 2. 99c4e000 003b0000
1818 00:51:48.489715 CONSOLE 3. 99c2e000 00020000
1819 00:51:48.493472 FMAP 4. 99c2d000 0000054e
1820 00:51:48.496238 TIME STAMP 5. 99c2c000 00000910
1821 00:51:48.499650 VBOOT WORK 6. 99c18000 00014000
1822 00:51:48.503122 MRC DATA 7. 99c16000 00001958
1823 00:51:48.506117 ROMSTG STCK 8. 99c15000 00001000
1824 00:51:48.509559 AFTER CAR 9. 99c0b000 0000a000
1825 00:51:48.513546 RAMSTAGE 10. 99baf000 0005c000
1826 00:51:48.515839 REFCODE 11. 99b7a000 00035000
1827 00:51:48.519908 SMM BACKUP 12. 99b6a000 00010000
1828 00:51:48.522793 COREBOOT 13. 99b62000 00008000
1829 00:51:48.525822 ACPI 14. 99b3e000 00024000
1830 00:51:48.529174 ACPI GNVS 15. 99b3d000 00001000
1831 00:51:48.532930 RAMOOPS 16. 99a3d000 00100000
1832 00:51:48.536029 TPM2 TCGLOG17. 99a2d000 00010000
1833 00:51:48.539248 SMBIOS 18. 99a2c000 00000800
1834 00:51:48.542822 IMD small region:
1835 00:51:48.545909 IMD ROOT 0. 99ffec00 00000400
1836 00:51:48.549358 FSP RUNTIME 1. 99ffebe0 00000004
1837 00:51:48.552177 EC HOSTEVENT 2. 99ffebc0 00000008
1838 00:51:48.555905 POWER STATE 3. 99ffeb80 00000040
1839 00:51:48.558966 ROMSTAGE 4. 99ffeb60 00000004
1840 00:51:48.561981 MEM INFO 5. 99ffe9a0 000001b9
1841 00:51:48.565744 VPD 6. 99ffe960 00000036
1842 00:51:48.569188 MTRR: Physical address space:
1843 00:51:48.575519 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1844 00:51:48.582342 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1845 00:51:48.588553 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1846 00:51:48.592324 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1847 00:51:48.598547 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1848 00:51:48.605443 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1849 00:51:48.612298 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1850 00:51:48.615180 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 00:51:48.621755 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 00:51:48.625109 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 00:51:48.628931 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 00:51:48.631712 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 00:51:48.638624 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 00:51:48.641807 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 00:51:48.645139 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 00:51:48.648263 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 00:51:48.651333 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 00:51:48.658226 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 00:51:48.661425 call enable_fixed_mtrr()
1862 00:51:48.664709 CPU physical address size: 39 bits
1863 00:51:48.668255 MTRR: default type WB/UC MTRR counts: 6/8.
1864 00:51:48.671615 MTRR: WB selected as default type.
1865 00:51:48.678392 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1866 00:51:48.684935 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1867 00:51:48.691181 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1868 00:51:48.698098 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1869 00:51:48.704726 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1870 00:51:48.707816 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1871 00:51:48.711984
1872 00:51:48.712571 MTRR check
1873 00:51:48.715598 Fixed MTRRs : Enabled
1874 00:51:48.716180 Variable MTRRs: Enabled
1875 00:51:48.716754
1876 00:51:48.721692 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 00:51:48.725049 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 00:51:48.728534 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 00:51:48.732197 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 00:51:48.738363 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 00:51:48.741935 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 00:51:48.745142 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 00:51:48.748565 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 00:51:48.755115 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 00:51:48.758453 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 00:51:48.761604 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 00:51:48.768608 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1888 00:51:48.769237 call enable_fixed_mtrr()
1889 00:51:48.774827 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1890 00:51:48.778244 CPU physical address size: 39 bits
1891 00:51:48.781562 CBFS @ c08000 size 3f8000
1892 00:51:48.788296 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1893 00:51:48.791296 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 00:51:48.794567 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 00:51:48.798097 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 00:51:48.804212 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 00:51:48.808191 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 00:51:48.811105 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 00:51:48.814268 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 00:51:48.821434 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 00:51:48.824159 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 00:51:48.827580 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 00:51:48.831042 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 00:51:48.837683 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 00:51:48.840972 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 00:51:48.844030 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 00:51:48.847623 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 00:51:48.854658 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 00:51:48.857592 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 00:51:48.860541 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 00:51:48.864226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 00:51:48.871196 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 00:51:48.874009 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 00:51:48.877382 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 00:51:48.880989 call enable_fixed_mtrr()
1916 00:51:48.883956 call enable_fixed_mtrr()
1917 00:51:48.887041 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 00:51:48.890377 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 00:51:48.893495 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 00:51:48.900558 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 00:51:48.904082 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 00:51:48.907134 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 00:51:48.910280 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 00:51:48.917160 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 00:51:48.920148 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 00:51:48.923266 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 00:51:48.926836 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 00:51:48.933538 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 00:51:48.936968 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 00:51:48.940673 call enable_fixed_mtrr()
1931 00:51:48.943601 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 00:51:48.946939 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 00:51:48.950194 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 00:51:48.957053 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 00:51:48.960117 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 00:51:48.963182 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 00:51:48.966575 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 00:51:48.973537 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 00:51:48.976460 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 00:51:48.980091 CPU physical address size: 39 bits
1941 00:51:48.983356 call enable_fixed_mtrr()
1942 00:51:48.986317 CPU physical address size: 39 bits
1943 00:51:48.989850 CPU physical address size: 39 bits
1944 00:51:48.992762 CBFS: Locating 'fallback/payload'
1945 00:51:48.996705 CPU physical address size: 39 bits
1946 00:51:49.000113 CBFS: Found @ offset 1c96c0 size 3f798
1947 00:51:49.006314 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 00:51:49.009793 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 00:51:49.012917 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 00:51:49.016124 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 00:51:49.019502 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 00:51:49.025838 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 00:51:49.029489 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 00:51:49.032802 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 00:51:49.035821 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 00:51:49.042514 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 00:51:49.045631 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 00:51:49.048992 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 00:51:49.055567 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 00:51:49.056162 call enable_fixed_mtrr()
1961 00:51:49.062139 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 00:51:49.065698 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 00:51:49.068905 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 00:51:49.072092 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 00:51:49.075841 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 00:51:49.082026 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 00:51:49.085147 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 00:51:49.088762 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 00:51:49.091787 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 00:51:49.098868 CPU physical address size: 39 bits
1971 00:51:49.099461 call enable_fixed_mtrr()
1972 00:51:49.105414 Checking segment from ROM address 0xffdd16f8
1973 00:51:49.108508 CPU physical address size: 39 bits
1974 00:51:49.111942 Checking segment from ROM address 0xffdd1714
1975 00:51:49.118340 Loading segment from ROM address 0xffdd16f8
1976 00:51:49.118931 code (compression=0)
1977 00:51:49.128449 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1978 00:51:49.135323 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1979 00:51:49.138254 it's not compressed!
1980 00:51:49.230779 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1981 00:51:49.237114 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1982 00:51:49.240438 Loading segment from ROM address 0xffdd1714
1983 00:51:49.244183 Entry Point 0x30000000
1984 00:51:49.247332 Loaded segments
1985 00:51:49.253204 Finalizing chipset.
1986 00:51:49.256461 Finalizing SMM.
1987 00:51:49.259700 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1988 00:51:49.262578 mp_park_aps done after 0 msecs.
1989 00:51:49.269122 Jumping to boot code at 30000000(99b62000)
1990 00:51:49.276225 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1991 00:51:49.276838
1992 00:51:49.279018 Starting depthcharge on Helios...
1993 00:51:49.280272 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
1994 00:51:49.280839 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1995 00:51:49.281362 Setting prompt string to ['hatch:']
1996 00:51:49.281810 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1997 00:51:49.288775 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1998 00:51:49.295635 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1999 00:51:49.301896 board_setup: Info: eMMC controller not present; skipping
2000 00:51:49.305177 New NVMe Controller 0x30053ac0 @ 00:1d:00
2001 00:51:49.312115 board_setup: Info: SDHCI controller not present; skipping
2002 00:51:49.318477 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2003 00:51:49.318975 Wipe memory regions:
2004 00:51:49.322138 [0x00000000001000, 0x000000000a0000)
2005 00:51:49.328293 [0x00000000100000, 0x00000030000000)
2006 00:51:49.394649 [0x00000030657430, 0x00000099a2c000)
2007 00:51:49.537806 [0x00000100000000, 0x0000045e800000)
2008 00:51:50.920627 R8152: Initializing
2009 00:51:50.923967 Version 9 (ocp_data = 6010)
2010 00:51:50.928155 R8152: Done initializing
2011 00:51:50.931966 Adding net device
2012 00:51:51.428509 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2013 00:51:51.429101
2014 00:51:51.429904 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2016 00:51:51.531609 hatch: tftpboot 192.168.201.1 6887891/tftp-deploy-p09zbhy7/kernel/bzImage 6887891/tftp-deploy-p09zbhy7/kernel/cmdline 6887891/tftp-deploy-p09zbhy7/ramdisk/ramdisk.cpio.gz
2017 00:51:51.532315 Setting prompt string to 'Starting kernel'
2018 00:51:51.532830 Setting prompt string to ['Starting kernel']
2019 00:51:51.533243 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2020 00:51:51.533644 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2021 00:51:51.537403 tftpboot 192.168.201.1 6887891/tftp-deploy-p09zbhy7/kernel/bzImoy-p09zbhy7/kernel/cmdline 6887891/tftp-deploy-p09zbhy7/ramdisk/ramdisk.cpio.gz
2022 00:51:51.537883 Waiting for link
2023 00:51:51.738240 done.
2024 00:51:51.738811 MAC: f4:f5:e8:50:dc:f7
2025 00:51:51.741840 Sending DHCP discover... done.
2026 00:51:51.744927 Waiting for reply... done.
2027 00:51:51.748185 Sending DHCP request... done.
2028 00:51:51.754969 Waiting for reply... done.
2029 00:51:51.755449 My ip is 192.168.201.10
2030 00:51:51.758111 The DHCP server ip is 192.168.201.1
2031 00:51:51.764621 TFTP server IP predefined by user: 192.168.201.1
2032 00:51:51.771326 Bootfile predefined by user: 6887891/tftp-deploy-p09zbhy7/kernel/bzImage
2033 00:51:51.774440 Sending tftp read request... done.
2034 00:51:51.778260 Waiting for the transfer...
2035 00:51:52.056793 00000000 ################################################################
2036 00:51:52.284596 00080000 ################################################################
2037 00:51:52.531197 00100000 ################################################################
2038 00:51:52.816025 00180000 ################################################################
2039 00:51:53.066316 00200000 ################################################################
2040 00:51:53.328421 00280000 ################################################################
2041 00:51:53.595130 00300000 ################################################################
2042 00:51:53.835822 00380000 ################################################################
2043 00:51:54.079138 00400000 ################################################################
2044 00:51:54.342566 00480000 ################################################################
2045 00:51:54.565562 00500000 ################################################################
2046 00:51:54.797678 00580000 ################################################################
2047 00:51:55.025171 00600000 ################################################################ done.
2048 00:51:55.028352 The bootfile was 6811536 bytes long.
2049 00:51:55.031893 Sending tftp read request... done.
2050 00:51:55.035064 Waiting for the transfer...
2051 00:51:55.290479 00000000 ################################################################
2052 00:51:55.547978 00080000 ################################################################
2053 00:51:55.811098 00100000 ################################################################
2054 00:51:56.145715 00180000 ################################################################
2055 00:51:56.433946 00200000 ################################################################
2056 00:51:56.729693 00280000 ################################################################
2057 00:51:57.029926 00300000 ################################################################
2058 00:51:57.337331 00380000 ################################################################
2059 00:51:57.642853 00400000 ################################################################
2060 00:51:57.941662 00480000 ################################################################
2061 00:51:58.073064 00500000 ############################# done.
2062 00:51:58.076654 Sending tftp read request... done.
2063 00:51:58.079695 Waiting for the transfer...
2064 00:51:58.079782 00000000 # done.
2065 00:51:58.089890 Command line loaded dynamically from TFTP file: 6887891/tftp-deploy-p09zbhy7/kernel/cmdline
2066 00:51:58.116250 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6887891/extract-nfsrootfs-3_a7lt8j,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2067 00:51:58.122584 ec_init(0): CrosEC protocol v3 supported (256, 256)
2068 00:51:58.126319 Shutting down all USB controllers.
2069 00:51:58.129268 Removing current net device
2070 00:51:58.132894 Finalizing coreboot
2071 00:51:58.139543 Exiting depthcharge with code 4 at timestamp: 16130067
2072 00:51:58.140002
2073 00:51:58.140386 Starting kernel ...
2074 00:51:58.140723
2075 00:51:58.141773 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2076 00:51:58.142398 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2077 00:51:58.142978 Setting prompt string to ['Linux version [0-9]']
2078 00:51:58.143454 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2079 00:51:58.143916 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2080 00:51:58.145185
2082 00:56:31.142670 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2084 00:56:31.142907 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2086 00:56:31.143071 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2089 00:56:31.143331 end: 2 depthcharge-action (duration 00:05:00) [common]
2091 00:56:31.143537 Cleaning after the job
2092 00:56:31.143623 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/ramdisk
2093 00:56:31.144172 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/kernel
2094 00:56:31.144787 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/nfsrootfs
2095 00:56:31.194398 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6887891/tftp-deploy-p09zbhy7/modules
2096 00:56:31.194682 start: 4.1 power-off (timeout 00:00:30) [common]
2097 00:56:31.194881 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2098 00:56:31.215700 >> Command sent successfully.
2099 00:56:31.217951 Returned 0 in 0 seconds
2100 00:56:31.318797 end: 4.1 power-off (duration 00:00:00) [common]
2102 00:56:31.319478 start: 4.2 read-feedback (timeout 00:10:00) [common]
2103 00:56:31.319783 Listened to connection for namespace 'common' for up to 1s
2104 00:56:32.324736 Finalising connection for namespace 'common'
2105 00:56:32.324977 Disconnecting from shell: Finalise
2106 00:56:32.425771 end: 4.2 read-feedback (duration 00:00:01) [common]
2107 00:56:32.425968 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6887891
2108 00:56:32.589387 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6887891
2109 00:56:32.589586 JobError: Your job cannot terminate cleanly.