Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:08:48.163799 lava-dispatcher, installed at version: 2022.10
2 12:08:48.164035 start: 0 validate
3 12:08:48.164184 Start time: 2022-11-25 12:08:48.164173+00:00 (UTC)
4 12:08:48.164333 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:08:48.164483 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 12:08:48.467742 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:08:48.467929 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:08:48.969692 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:08:48.969865 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:08:48.973047 validate duration: 0.81
12 12:08:48.973323 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:08:48.973443 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:08:48.973564 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:08:48.973696 Not decompressing ramdisk as can be used compressed.
16 12:08:48.973798 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 12:08:48.973893 saving as /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/ramdisk/rootfs.cpio.gz
18 12:08:48.973982 total size: 8415749 (8MB)
19 12:08:48.976296 progress 0% (0MB)
20 12:08:48.983016 progress 5% (0MB)
21 12:08:48.990537 progress 10% (0MB)
22 12:08:48.997578 progress 15% (1MB)
23 12:08:49.008135 progress 20% (1MB)
24 12:08:49.020627 progress 25% (2MB)
25 12:08:49.030211 progress 30% (2MB)
26 12:08:49.041553 progress 35% (2MB)
27 12:08:49.051125 progress 40% (3MB)
28 12:08:49.062461 progress 45% (3MB)
29 12:08:49.074006 progress 50% (4MB)
30 12:08:49.083589 progress 55% (4MB)
31 12:08:49.095109 progress 60% (4MB)
32 12:08:49.104692 progress 65% (5MB)
33 12:08:49.115837 progress 70% (5MB)
34 12:08:49.127757 progress 75% (6MB)
35 12:08:49.137190 progress 80% (6MB)
36 12:08:49.148485 progress 85% (6MB)
37 12:08:49.159828 progress 90% (7MB)
38 12:08:49.169207 progress 95% (7MB)
39 12:08:49.180038 progress 100% (8MB)
40 12:08:49.180370 8MB downloaded in 0.21s (38.89MB/s)
41 12:08:49.180554 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:08:49.180850 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:08:49.180956 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:08:49.181058 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:08:49.181179 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:08:49.181256 saving as /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/kernel/bzImage
48 12:08:49.181326 total size: 7126928 (6MB)
49 12:08:49.181395 No compression specified
50 12:08:49.196083 progress 0% (0MB)
51 12:08:49.228129 progress 5% (0MB)
52 12:08:49.260893 progress 10% (0MB)
53 12:08:49.298755 progress 15% (1MB)
54 12:08:49.327201 progress 20% (1MB)
55 12:08:49.363837 progress 25% (1MB)
56 12:08:49.397283 progress 30% (2MB)
57 12:08:49.430754 progress 35% (2MB)
58 12:08:49.456165 progress 40% (2MB)
59 12:08:49.502532 progress 45% (3MB)
60 12:08:49.545088 progress 50% (3MB)
61 12:08:49.588890 progress 55% (3MB)
62 12:08:49.632516 progress 60% (4MB)
63 12:08:49.677345 progress 65% (4MB)
64 12:08:49.720304 progress 70% (4MB)
65 12:08:49.763108 progress 75% (5MB)
66 12:08:49.807142 progress 80% (5MB)
67 12:08:49.851475 progress 85% (5MB)
68 12:08:49.899212 progress 90% (6MB)
69 12:08:49.945057 progress 95% (6MB)
70 12:08:49.994583 progress 100% (6MB)
71 12:08:49.994889 6MB downloaded in 0.81s (8.35MB/s)
72 12:08:49.995062 end: 1.2.1 http-download (duration 00:00:01) [common]
74 12:08:49.995334 end: 1.2 download-retry (duration 00:00:01) [common]
75 12:08:49.995436 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:08:49.995535 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:08:49.995654 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:08:49.995731 saving as /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/modules/modules.tar
79 12:08:49.995801 total size: 52100 (0MB)
80 12:08:49.995874 Using unxz to decompress xz
81 12:08:50.011586 progress 62% (0MB)
82 12:08:50.017313 progress 100% (0MB)
83 12:08:50.019078 0MB downloaded in 0.02s (2.14MB/s)
84 12:08:50.019338 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:08:50.019633 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:08:50.019744 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 12:08:50.019852 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 12:08:50.019950 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:08:50.020050 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 12:08:50.020244 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c
92 12:08:50.020363 makedir: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin
93 12:08:50.020458 makedir: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/tests
94 12:08:50.020548 makedir: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/results
95 12:08:50.020666 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-add-keys
96 12:08:50.020812 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-add-sources
97 12:08:50.020943 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-background-process-start
98 12:08:50.021072 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-background-process-stop
99 12:08:50.021210 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-common-functions
100 12:08:50.021391 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-echo-ipv4
101 12:08:50.021526 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-install-packages
102 12:08:50.021699 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-installed-packages
103 12:08:50.021886 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-os-build
104 12:08:50.022039 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-probe-channel
105 12:08:50.022207 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-probe-ip
106 12:08:50.022372 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-target-ip
107 12:08:50.022517 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-target-mac
108 12:08:50.022692 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-target-storage
109 12:08:50.022832 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-case
110 12:08:50.023006 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-event
111 12:08:50.023151 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-feedback
112 12:08:50.023281 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-raise
113 12:08:50.023415 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-reference
114 12:08:50.023551 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-runner
115 12:08:50.023686 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-set
116 12:08:50.023820 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-test-shell
117 12:08:50.023957 Updating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-install-packages (oe)
118 12:08:50.024090 Updating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/bin/lava-installed-packages (oe)
119 12:08:50.024206 Creating /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/environment
120 12:08:50.024307 LAVA metadata
121 12:08:50.024388 - LAVA_JOB_ID=8123204
122 12:08:50.024466 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:08:50.024585 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 12:08:50.024660 skipped lava-vland-overlay
125 12:08:50.024748 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:08:50.024844 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 12:08:50.024920 skipped lava-multinode-overlay
128 12:08:50.025005 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:08:50.025100 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 12:08:50.025187 Loading test definitions
131 12:08:50.025298 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 12:08:50.025386 Using /lava-8123204 at stage 0
133 12:08:50.025691 uuid=8123204_1.4.2.3.1 testdef=None
134 12:08:50.025795 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:08:50.025894 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 12:08:50.026455 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:08:50.026717 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 12:08:50.027460 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:08:50.027734 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 12:08:50.028353 runner path: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/0/tests/0_dmesg test_uuid 8123204_1.4.2.3.1
143 12:08:50.028521 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:08:50.028785 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 12:08:50.028869 Using /lava-8123204 at stage 1
147 12:08:50.029148 uuid=8123204_1.4.2.3.5 testdef=None
148 12:08:50.029251 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:08:50.029352 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 12:08:50.029864 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:08:50.030132 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 12:08:50.030784 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:08:50.031052 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 12:08:50.031673 runner path: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/1/tests/1_bootrr test_uuid 8123204_1.4.2.3.5
157 12:08:50.031848 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:08:50.032180 Creating lava-test-runner.conf files
160 12:08:50.032256 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/0 for stage 0
161 12:08:50.032351 - 0_dmesg
162 12:08:50.032435 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123204/lava-overlay-l2d1oq4c/lava-8123204/1 for stage 1
163 12:08:50.032530 - 1_bootrr
164 12:08:50.032634 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:08:50.032733 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 12:08:50.039608 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:08:50.039734 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 12:08:50.039840 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:08:50.039938 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:08:50.040036 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 12:08:50.255413 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:08:50.255794 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 12:08:50.255926 extracting modules file /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123204/extract-overlay-ramdisk-w0nqxxs6/ramdisk
174 12:08:50.260996 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:08:50.261157 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 12:08:50.261272 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123204/compress-overlay-obkln2fx/overlay-1.4.2.4.tar.gz to ramdisk
177 12:08:50.261361 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123204/compress-overlay-obkln2fx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8123204/extract-overlay-ramdisk-w0nqxxs6/ramdisk
178 12:08:50.266196 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:08:50.266345 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 12:08:50.266461 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:08:50.266570 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 12:08:50.266680 Building ramdisk /var/lib/lava/dispatcher/tmp/8123204/extract-overlay-ramdisk-w0nqxxs6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8123204/extract-overlay-ramdisk-w0nqxxs6/ramdisk
183 12:08:50.336600 >> 48008 blocks
184 12:08:51.173402 rename /var/lib/lava/dispatcher/tmp/8123204/extract-overlay-ramdisk-w0nqxxs6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/ramdisk/ramdisk.cpio.gz
185 12:08:51.173859 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:08:51.174026 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 12:08:51.174158 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 12:08:51.174271 No mkimage arch provided, not using FIT.
189 12:08:51.174392 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:08:51.174510 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:08:51.174630 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:08:51.174758 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 12:08:51.174861 No LXC device requested
194 12:08:51.174965 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:08:51.175088 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 12:08:51.175190 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:08:51.175293 Checking files for TFTP limit of 4294967296 bytes.
198 12:08:51.175759 end: 1 tftp-deploy (duration 00:00:02) [common]
199 12:08:51.175903 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:08:51.176030 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:08:51.176179 substitutions:
202 12:08:51.176278 - {DTB}: None
203 12:08:51.176365 - {INITRD}: 8123204/tftp-deploy-uzj01zx3/ramdisk/ramdisk.cpio.gz
204 12:08:51.176451 - {KERNEL}: 8123204/tftp-deploy-uzj01zx3/kernel/bzImage
205 12:08:51.176521 - {LAVA_MAC}: None
206 12:08:51.176607 - {PRESEED_CONFIG}: None
207 12:08:51.176679 - {PRESEED_LOCAL}: None
208 12:08:51.176744 - {RAMDISK}: 8123204/tftp-deploy-uzj01zx3/ramdisk/ramdisk.cpio.gz
209 12:08:51.176832 - {ROOT_PART}: None
210 12:08:51.176899 - {ROOT}: None
211 12:08:51.176980 - {SERVER_IP}: 192.168.201.1
212 12:08:51.177053 - {TEE}: None
213 12:08:51.177119 Parsed boot commands:
214 12:08:51.177210 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:08:51.177413 Parsed boot commands: tftpboot 192.168.201.1 8123204/tftp-deploy-uzj01zx3/kernel/bzImage 8123204/tftp-deploy-uzj01zx3/kernel/cmdline 8123204/tftp-deploy-uzj01zx3/ramdisk/ramdisk.cpio.gz
216 12:08:51.177523 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:08:51.177644 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:08:51.177775 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:08:51.177882 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:08:51.177994 Not connected, no need to disconnect.
221 12:08:51.178100 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:08:51.178213 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:08:51.178298 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-4'
224 12:08:51.181199 Setting prompt string to ['lava-test: # ']
225 12:08:51.181530 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:08:51.181670 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:08:51.181800 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:08:51.181918 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:08:51.182151 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
230 12:08:51.203228 >> Command sent successfully.
231 12:08:51.205424 Returned 0 in 0 seconds
232 12:08:51.306039 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:08:51.306732 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:08:51.306870 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:08:51.306988 Setting prompt string to 'Starting depthcharge on Voema...'
237 12:08:51.307082 Changing prompt to 'Starting depthcharge on Voema...'
238 12:08:51.307206 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 12:08:51.307510 [Enter `^Ec?' for help]
240 12:08:59.462297
241 12:08:59.462477
242 12:08:59.472109 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 12:08:59.475468 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 12:08:59.478877
245 12:08:59.481752 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
246 12:08:59.485293 CPU: AES supported, TXT NOT supported, VT supported
247 12:08:59.492046 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
248 12:08:59.498495 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
249 12:08:59.502234 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 12:08:59.505212 VBOOT: Loading verstage.
251 12:08:59.508605 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 12:08:59.511788
253 12:08:59.515472 FMAP: base = 0x0 size = 0x2000000 #areas = 32
254 12:08:59.518864 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
255 12:08:59.529289 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
256 12:08:59.536017 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
257 12:08:59.536119
258 12:08:59.536195
259 12:08:59.549062 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
260 12:08:59.562895 Probing TPM: . done!
261 12:08:59.565960 TPM ready after 0 ms
262 12:08:59.569709 Connected to device vid:did:rid of 1ae0:0028:00
263 12:08:59.580652 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
264 12:08:59.587388 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
265 12:08:59.590654 Initialized TPM device CR50 revision 0
266 12:08:59.742467 tlcl_send_startup: Startup return code is 0
267 12:08:59.742623 TPM: setup succeeded
268 12:08:59.757774 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
269 12:08:59.772081 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 12:08:59.784701 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
271 12:08:59.794616 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
272 12:08:59.798545 Chrome EC: UHEPI supported
273 12:08:59.801857 Phase 1
274 12:08:59.804974 FMAP: area GBB found @ 1805000 (458752 bytes)
275 12:08:59.814635 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
276 12:08:59.821278 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 12:08:59.827914 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
278 12:08:59.834581 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
279 12:08:59.838163 Recovery requested (1009000e)
280 12:08:59.841388 TPM: Extending digest for VBOOT: boot mode into PCR 0
281 12:08:59.853293 tlcl_extend: response is 0
282 12:08:59.859361 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
283 12:08:59.869147 tlcl_extend: response is 0
284 12:08:59.876193 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 12:08:59.882867 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
286 12:08:59.889374 BS: verstage times (exec / console): total (unknown) / 142 ms
287 12:08:59.889496
288 12:08:59.889602
289 12:08:59.902124 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
290 12:08:59.909217 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 12:08:59.913722 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 12:08:59.916996 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
293 12:08:59.920300 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 12:08:59.926938 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
295 12:08:59.930209 gpe0_sts[3]: 00080000 gpe0_en[3]: 00092000
296 12:08:59.933601 TCO_STS: 0000 0000
297 12:08:59.936949 GEN_PMCON: d0015038 00002200
298 12:08:59.937053 GBLRST_CAUSE: 00000000 00000000
299 12:08:59.940288
300 12:08:59.940386 HPR_CAUSE0: 00000000
301 12:08:59.943622 prev_sleep_state 5
302 12:08:59.946474 Boot Count incremented to 18408
303 12:08:59.953047 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
304 12:08:59.959798 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
305 12:08:59.966385 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
306 12:08:59.973038 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
307 12:08:59.977236 Chrome EC: UHEPI supported
308 12:08:59.984375 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
309 12:08:59.997292 Probing TPM: done!
310 12:09:00.004091 Connected to device vid:did:rid of 1ae0:0028:00
311 12:09:00.014245 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 12:09:00.017439 Initialized TPM device CR50 revision 0
313 12:09:00.032314 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
314 12:09:00.039214 MRC: Hash idx 0x100b comparison successful.
315 12:09:00.042727 MRC cache found, size faa8
316 12:09:00.042828 bootmode is set to: 2
317 12:09:00.045914 SPD index = 0
318 12:09:00.052278 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
319 12:09:00.055785 SPD: module type is LPDDR4X
320 12:09:00.059126 SPD: module part number is MT53E512M64D4NW-046
321 12:09:00.065865 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
322 12:09:00.069045 SPD: device width 16 bits, bus width 16 bits
323 12:09:00.075736 SPD: module size is 1024 MB (per channel)
324 12:09:00.508177 CBMEM:
325 12:09:00.511498 IMD: root @ 0x76fff000 254 entries.
326 12:09:00.514975 IMD: root @ 0x76ffec00 62 entries.
327 12:09:00.517892 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
328 12:09:00.524678 FMAP: area RW_VPD found @ f35000 (8192 bytes)
329 12:09:00.528022 External stage cache:
330 12:09:00.531373 IMD: root @ 0x7b3ff000 254 entries.
331 12:09:00.534674 IMD: root @ 0x7b3fec00 62 entries.
332 12:09:00.549795 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
333 12:09:00.556213 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
334 12:09:00.562925 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
335 12:09:00.577216 MRC: 'RECOVERY_MRC_CACHE' does not need update.
336 12:09:00.580649 cse_lite: Skip switching to RW in the recovery path
337 12:09:00.583576
338 12:09:00.583674 8 DIMMs found
339 12:09:00.583750 SMM Memory Map
340 12:09:00.586897 SMRAM : 0x7b000000 0x800000
341 12:09:00.590090 Subregion 0: 0x7b000000 0x200000
342 12:09:00.593789
343 12:09:00.597091 Subregion 1: 0x7b200000 0x200000
344 12:09:00.600476 Subregion 2: 0x7b400000 0x400000
345 12:09:00.600574 top_of_ram = 0x77000000
346 12:09:00.607020 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
347 12:09:00.613497 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
348 12:09:00.616956 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
349 12:09:00.623807 MTRR Range: Start=ff000000 End=0 (Size 1000000)
350 12:09:00.629829 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
351 12:09:00.636809 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
352 12:09:00.646488 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
353 12:09:00.649886 Processing 211 relocs. Offset value of 0x74c0b000
354 12:09:00.653484
355 12:09:00.659970 BS: romstage times (exec / console): total (unknown) / 277 ms
356 12:09:00.666107
357 12:09:00.666223
358 12:09:00.675699 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 12:09:00.679220 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 12:09:00.689586 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 12:09:00.696518 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 12:09:00.702626 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 12:09:00.709265 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 12:09:00.756028 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 12:09:00.762631 Processing 5008 relocs. Offset value of 0x75d98000
366 12:09:00.766093 BS: postcar times (exec / console): total (unknown) / 59 ms
367 12:09:00.766215
368 12:09:00.769578
369 12:09:00.769686
370 12:09:00.779301 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
371 12:09:00.779404 Normal boot
372 12:09:00.782609 FW_CONFIG value is 0x804c02
373 12:09:00.785921 PCI: 00:07.0 disabled by fw_config
374 12:09:00.789779 PCI: 00:07.1 disabled by fw_config
375 12:09:00.792579 PCI: 00:0d.2 disabled by fw_config
376 12:09:00.795814 PCI: 00:1c.7 disabled by fw_config
377 12:09:00.799093
378 12:09:00.802388 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 12:09:00.809067 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
380 12:09:00.812287 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
381 12:09:00.815887 GENERIC: 0.0 disabled by fw_config
382 12:09:00.819088
383 12:09:00.822442 GENERIC: 1.0 disabled by fw_config
384 12:09:00.825713 fw_config match found: DB_USB=USB3_ACTIVE
385 12:09:00.828978 fw_config match found: DB_USB=USB3_ACTIVE
386 12:09:00.832210 fw_config match found: DB_USB=USB3_ACTIVE
387 12:09:00.839123 fw_config match found: DB_USB=USB3_ACTIVE
388 12:09:00.841869 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 12:09:00.848910 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 12:09:00.858888 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 12:09:00.865607 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
392 12:09:00.868735 microcode: sig=0x806c1 pf=0x80 revision=0x86
393 12:09:00.875284 microcode: Update skipped, already up-to-date
394 12:09:00.882084 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
395 12:09:00.909446 Detected 4 core, 8 thread CPU.
396 12:09:00.913181 Setting up SMI for CPU
397 12:09:00.916380 IED base = 0x7b400000
398 12:09:00.916515 IED size = 0x00400000
399 12:09:00.919645 Will perform SMM setup.
400 12:09:00.926500 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
401 12:09:00.933017 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 12:09:00.939393 Processing 16 relocs. Offset value of 0x00030000
403 12:09:00.942697 Attempting to start 7 APs
404 12:09:00.946085 Waiting for 10ms after sending INIT.
405 12:09:00.961781 Waiting for 1st SIPI to complete...done.
406 12:09:00.961879 AP: slot 1 apic_id 1.
407 12:09:00.964837 AP: slot 6 apic_id 3.
408 12:09:00.968162 AP: slot 2 apic_id 2.
409 12:09:00.968259 AP: slot 4 apic_id 5.
410 12:09:00.971637 AP: slot 5 apic_id 4.
411 12:09:00.975053 AP: slot 3 apic_id 7.
412 12:09:00.975149 AP: slot 7 apic_id 6.
413 12:09:00.981782 Waiting for 2nd SIPI to complete...done.
414 12:09:00.988103 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
415 12:09:00.994957 Processing 13 relocs. Offset value of 0x00038000
416 12:09:00.995078 Unable to locate Global NVS
417 12:09:00.998210
418 12:09:01.004810 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
419 12:09:01.008120 Installing permanent SMM handler to 0x7b000000
420 12:09:01.018136 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
421 12:09:01.021474 Processing 794 relocs. Offset value of 0x7b010000
422 12:09:01.031103 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
423 12:09:01.034609 Processing 13 relocs. Offset value of 0x7b008000
424 12:09:01.041056 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
425 12:09:01.047733 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
426 12:09:01.051033 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
427 12:09:01.058026 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
428 12:09:01.065059 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
429 12:09:01.070542 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
430 12:09:01.077168 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
431 12:09:01.080600 Unable to locate Global NVS
432 12:09:01.087338 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
433 12:09:01.090841 Clearing SMI status registers
434 12:09:01.094480 SMI_STS: GPE0 PM1
435 12:09:01.094633 PM1_STS: PWRBTN
436 12:09:01.097983 GPE0 STD STS:
437 12:09:01.103854 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
438 12:09:01.107455 In relocation handler: CPU 0
439 12:09:01.110967 New SMBASE=0x7b000000 IEDBASE=0x7b400000
440 12:09:01.113821 Writing SMRR. base = 0x7b000006, mask=0xff800c00
441 12:09:01.116941
442 12:09:01.117152 Relocation complete.
443 12:09:01.123606 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
444 12:09:01.126997 In relocation handler: CPU 1
445 12:09:01.130595 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
446 12:09:01.133518
447 12:09:01.133730 Relocation complete.
448 12:09:01.140824 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 12:09:01.143634 In relocation handler: CPU 3
450 12:09:01.146900 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 12:09:01.150095 Relocation complete.
452 12:09:01.157272 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
453 12:09:01.160662 In relocation handler: CPU 7
454 12:09:01.164394 New SMBASE=0x7affe400 IEDBASE=0x7b400000
455 12:09:01.171006 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 12:09:01.171380 Relocation complete.
457 12:09:01.181209 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
458 12:09:01.181697 In relocation handler: CPU 2
459 12:09:01.187560 New SMBASE=0x7afff800 IEDBASE=0x7b400000
460 12:09:01.191201 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 12:09:01.194373 Relocation complete.
462 12:09:01.201035 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
463 12:09:01.204063 In relocation handler: CPU 6
464 12:09:01.207539 New SMBASE=0x7affe800 IEDBASE=0x7b400000
465 12:09:01.210506 Relocation complete.
466 12:09:01.217408 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
467 12:09:01.220667 In relocation handler: CPU 5
468 12:09:01.223760 New SMBASE=0x7affec00 IEDBASE=0x7b400000
469 12:09:01.230661 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 12:09:01.231092 Relocation complete.
471 12:09:01.237051 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
472 12:09:01.240589 In relocation handler: CPU 4
473 12:09:01.247322 New SMBASE=0x7afff000 IEDBASE=0x7b400000
474 12:09:01.247797 Relocation complete.
475 12:09:01.250394 Initializing CPU #0
476 12:09:01.253890 CPU: vendor Intel device 806c1
477 12:09:01.256760 CPU: family 06, model 8c, stepping 01
478 12:09:01.259935 Clearing out pending MCEs
479 12:09:01.263506 Setting up local APIC...
480 12:09:01.263996 apic_id: 0x00 done.
481 12:09:01.266953 Turbo is available but hidden
482 12:09:01.269896 Turbo is available and visible
483 12:09:01.277148 microcode: Update skipped, already up-to-date
484 12:09:01.277634 CPU #0 initialized
485 12:09:01.279787 Initializing CPU #6
486 12:09:01.280164 Initializing CPU #2
487 12:09:01.283231
488 12:09:01.283719 CPU: vendor Intel device 806c1
489 12:09:01.289922 CPU: family 06, model 8c, stepping 01
490 12:09:01.293463 CPU: vendor Intel device 806c1
491 12:09:01.296423 CPU: family 06, model 8c, stepping 01
492 12:09:01.296905 Clearing out pending MCEs
493 12:09:01.300398 Clearing out pending MCEs
494 12:09:01.303802 Setting up local APIC...
495 12:09:01.306730 Initializing CPU #3
496 12:09:01.307109 Initializing CPU #7
497 12:09:01.310014 CPU: vendor Intel device 806c1
498 12:09:01.313085 CPU: family 06, model 8c, stepping 01
499 12:09:01.316464 CPU: vendor Intel device 806c1
500 12:09:01.319997 CPU: family 06, model 8c, stepping 01
501 12:09:01.323139 Clearing out pending MCEs
502 12:09:01.326357 Clearing out pending MCEs
503 12:09:01.329669 Setting up local APIC...
504 12:09:01.330190 Initializing CPU #5
505 12:09:01.333302 Initializing CPU #4
506 12:09:01.336235 CPU: vendor Intel device 806c1
507 12:09:01.339483 CPU: family 06, model 8c, stepping 01
508 12:09:01.342951 CPU: vendor Intel device 806c1
509 12:09:01.346456 CPU: family 06, model 8c, stepping 01
510 12:09:01.349385 Clearing out pending MCEs
511 12:09:01.353104 Clearing out pending MCEs
512 12:09:01.356248 Setting up local APIC...
513 12:09:01.356637 apic_id: 0x03 done.
514 12:09:01.359541 Setting up local APIC...
515 12:09:01.362733 apic_id: 0x04 done.
516 12:09:01.363099 Setting up local APIC...
517 12:09:01.366279 apic_id: 0x02 done.
518 12:09:01.369799 microcode: Update skipped, already up-to-date
519 12:09:01.376838 microcode: Update skipped, already up-to-date
520 12:09:01.377302 CPU #6 initialized
521 12:09:01.379450 CPU #2 initialized
522 12:09:01.383047 Initializing CPU #1
523 12:09:01.383512 apic_id: 0x07 done.
524 12:09:01.386745 apic_id: 0x06 done.
525 12:09:01.389228 microcode: Update skipped, already up-to-date
526 12:09:01.396596 microcode: Update skipped, already up-to-date
527 12:09:01.397105 CPU #3 initialized
528 12:09:01.399277 CPU #7 initialized
529 12:09:01.403547 Setting up local APIC...
530 12:09:01.406086 CPU: vendor Intel device 806c1
531 12:09:01.409333 CPU: family 06, model 8c, stepping 01
532 12:09:01.412604 microcode: Update skipped, already up-to-date
533 12:09:01.415723 apic_id: 0x05 done.
534 12:09:01.416093 CPU #5 initialized
535 12:09:01.422386 microcode: Update skipped, already up-to-date
536 12:09:01.422754 Clearing out pending MCEs
537 12:09:01.425928
538 12:09:01.426301 CPU #4 initialized
539 12:09:01.429272 Setting up local APIC...
540 12:09:01.432449 apic_id: 0x01 done.
541 12:09:01.435958 microcode: Update skipped, already up-to-date
542 12:09:01.439373 CPU #1 initialized
543 12:09:01.442268 bsp_do_flight_plan done after 457 msecs.
544 12:09:01.446042 CPU: frequency set to 4000 MHz
545 12:09:01.446512 Enabling SMIs.
546 12:09:01.452949 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 319 ms
547 12:09:01.469335 SATAXPCIE1 indicates PCIe NVMe is present
548 12:09:01.472422 Probing TPM: done!
549 12:09:01.476556 Connected to device vid:did:rid of 1ae0:0028:00
550 12:09:01.486816 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
551 12:09:01.490295 Initialized TPM device CR50 revision 0
552 12:09:01.493627 Enabling S0i3.4
553 12:09:01.499358 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
554 12:09:01.503568 Found a VBT of 8704 bytes after decompression
555 12:09:01.510024 cse_lite: CSE RO boot. HybridStorageMode disabled
556 12:09:01.516041 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
557 12:09:01.592013 FSPS returned 0
558 12:09:01.594635 Executing Phase 1 of FspMultiPhaseSiInit
559 12:09:01.604795 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
560 12:09:01.607972 port C0 DISC req: usage 1 usb3 1 usb2 5
561 12:09:01.611502 Raw Buffer output 0 00000511
562 12:09:01.614496 Raw Buffer output 1 00000000
563 12:09:01.617909 pmc_send_ipc_cmd succeeded
564 12:09:01.621986 port C1 DISC req: usage 1 usb3 2 usb2 3
565 12:09:01.625150
566 12:09:01.625272 Raw Buffer output 0 00000321
567 12:09:01.628256 Raw Buffer output 1 00000000
568 12:09:01.631921 pmc_send_ipc_cmd succeeded
569 12:09:01.637667 Detected 4 core, 8 thread CPU.
570 12:09:01.640463 Detected 4 core, 8 thread CPU.
571 12:09:01.874809 Display FSP Version Info HOB
572 12:09:01.878340 Reference Code - CPU = a.0.4c.31
573 12:09:01.881306 uCode Version = 0.0.0.86
574 12:09:01.884792 TXT ACM version = ff.ff.ff.ffff
575 12:09:01.887808 Reference Code - ME = a.0.4c.31
576 12:09:01.891259 MEBx version = 0.0.0.0
577 12:09:01.894723 ME Firmware Version = Consumer SKU
578 12:09:01.898260 Reference Code - PCH = a.0.4c.31
579 12:09:01.901544 PCH-CRID Status = Disabled
580 12:09:01.904905 PCH-CRID Original Value = ff.ff.ff.ffff
581 12:09:01.908683 PCH-CRID New Value = ff.ff.ff.ffff
582 12:09:01.911444 OPROM - RST - RAID = ff.ff.ff.ffff
583 12:09:01.914548 PCH Hsio Version = 4.0.0.0
584 12:09:01.917996 Reference Code - SA - System Agent = a.0.4c.31
585 12:09:01.921062 Reference Code - MRC = 2.0.0.1
586 12:09:01.924392 SA - PCIe Version = a.0.4c.31
587 12:09:01.927796 SA-CRID Status = Disabled
588 12:09:01.931024 SA-CRID Original Value = 0.0.0.1
589 12:09:01.934511 SA-CRID New Value = 0.0.0.1
590 12:09:01.938179 OPROM - VBIOS = ff.ff.ff.ffff
591 12:09:01.941384 IO Manageability Engine FW Version = 11.1.4.0
592 12:09:01.944548 PHY Build Version = 0.0.0.e0
593 12:09:01.947854 Thunderbolt(TM) FW Version = 0.0.0.0
594 12:09:01.954181 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
595 12:09:01.957803 ITSS IRQ Polarities Before:
596 12:09:01.958211 IPC0: 0xffffffff
597 12:09:01.960932 IPC1: 0xffffffff
598 12:09:01.961308 IPC2: 0xffffffff
599 12:09:01.964836 IPC3: 0xffffffff
600 12:09:01.967566 ITSS IRQ Polarities After:
601 12:09:01.967946 IPC0: 0xffffffff
602 12:09:01.970976 IPC1: 0xffffffff
603 12:09:01.971487 IPC2: 0xffffffff
604 12:09:01.974442 IPC3: 0xffffffff
605 12:09:01.978093 Found PCIe Root Port #9 at PCI: 00:1d.0.
606 12:09:01.991474 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
607 12:09:02.001308 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
608 12:09:02.014450 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
609 12:09:02.020856 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
610 12:09:02.021323 Enumerating buses...
611 12:09:02.027333 Show all devs... Before device enumeration.
612 12:09:02.027747 Root Device: enabled 1
613 12:09:02.030698
614 12:09:02.031016 DOMAIN: 0000: enabled 1
615 12:09:02.033868 CPU_CLUSTER: 0: enabled 1
616 12:09:02.037388 PCI: 00:00.0: enabled 1
617 12:09:02.037605 PCI: 00:02.0: enabled 1
618 12:09:02.040408
619 12:09:02.040619 PCI: 00:04.0: enabled 1
620 12:09:02.044003 PCI: 00:05.0: enabled 1
621 12:09:02.047095 PCI: 00:06.0: enabled 0
622 12:09:02.047262 PCI: 00:07.0: enabled 0
623 12:09:02.050318 PCI: 00:07.1: enabled 0
624 12:09:02.053801 PCI: 00:07.2: enabled 0
625 12:09:02.057504 PCI: 00:07.3: enabled 0
626 12:09:02.057621 PCI: 00:08.0: enabled 1
627 12:09:02.060515 PCI: 00:09.0: enabled 0
628 12:09:02.063806 PCI: 00:0a.0: enabled 0
629 12:09:02.067197 PCI: 00:0d.0: enabled 1
630 12:09:02.067298 PCI: 00:0d.1: enabled 0
631 12:09:02.070768 PCI: 00:0d.2: enabled 0
632 12:09:02.073537 PCI: 00:0d.3: enabled 0
633 12:09:02.077033 PCI: 00:0e.0: enabled 0
634 12:09:02.077215 PCI: 00:10.2: enabled 1
635 12:09:02.080672 PCI: 00:10.6: enabled 0
636 12:09:02.083875 PCI: 00:10.7: enabled 0
637 12:09:02.084038 PCI: 00:12.0: enabled 0
638 12:09:02.087088 PCI: 00:12.6: enabled 0
639 12:09:02.090387 PCI: 00:13.0: enabled 0
640 12:09:02.093643 PCI: 00:14.0: enabled 1
641 12:09:02.093743 PCI: 00:14.1: enabled 0
642 12:09:02.097108 PCI: 00:14.2: enabled 1
643 12:09:02.101124 PCI: 00:14.3: enabled 1
644 12:09:02.104009 PCI: 00:15.0: enabled 1
645 12:09:02.104186 PCI: 00:15.1: enabled 1
646 12:09:02.107535 PCI: 00:15.2: enabled 1
647 12:09:02.110258 PCI: 00:15.3: enabled 1
648 12:09:02.113484 PCI: 00:16.0: enabled 1
649 12:09:02.113630 PCI: 00:16.1: enabled 0
650 12:09:02.116938 PCI: 00:16.2: enabled 0
651 12:09:02.120037 PCI: 00:16.3: enabled 0
652 12:09:02.123478 PCI: 00:16.4: enabled 0
653 12:09:02.123671 PCI: 00:16.5: enabled 0
654 12:09:02.127114 PCI: 00:17.0: enabled 1
655 12:09:02.130058 PCI: 00:19.0: enabled 0
656 12:09:02.130283 PCI: 00:19.1: enabled 1
657 12:09:02.133393 PCI: 00:19.2: enabled 0
658 12:09:02.137058 PCI: 00:1c.0: enabled 1
659 12:09:02.140333 PCI: 00:1c.1: enabled 0
660 12:09:02.140695 PCI: 00:1c.2: enabled 0
661 12:09:02.143804 PCI: 00:1c.3: enabled 0
662 12:09:02.146970 PCI: 00:1c.4: enabled 0
663 12:09:02.150744 PCI: 00:1c.5: enabled 0
664 12:09:02.151125 PCI: 00:1c.6: enabled 1
665 12:09:02.153976 PCI: 00:1c.7: enabled 0
666 12:09:02.157206 PCI: 00:1d.0: enabled 1
667 12:09:02.160130 PCI: 00:1d.1: enabled 0
668 12:09:02.160508 PCI: 00:1d.2: enabled 1
669 12:09:02.163738 PCI: 00:1d.3: enabled 0
670 12:09:02.166754 PCI: 00:1e.0: enabled 1
671 12:09:02.167133 PCI: 00:1e.1: enabled 0
672 12:09:02.170369
673 12:09:02.170763 PCI: 00:1e.2: enabled 1
674 12:09:02.173819 PCI: 00:1e.3: enabled 1
675 12:09:02.176775 PCI: 00:1f.0: enabled 1
676 12:09:02.177153 PCI: 00:1f.1: enabled 0
677 12:09:02.180283 PCI: 00:1f.2: enabled 1
678 12:09:02.183159 PCI: 00:1f.3: enabled 1
679 12:09:02.187196 PCI: 00:1f.4: enabled 0
680 12:09:02.187695 PCI: 00:1f.5: enabled 1
681 12:09:02.190430 PCI: 00:1f.6: enabled 0
682 12:09:02.193531 PCI: 00:1f.7: enabled 0
683 12:09:02.193930 APIC: 00: enabled 1
684 12:09:02.197191
685 12:09:02.197569 GENERIC: 0.0: enabled 1
686 12:09:02.199929 GENERIC: 0.0: enabled 1
687 12:09:02.203259 GENERIC: 1.0: enabled 1
688 12:09:02.203657 GENERIC: 0.0: enabled 1
689 12:09:02.207449 GENERIC: 1.0: enabled 1
690 12:09:02.210069 USB0 port 0: enabled 1
691 12:09:02.213860 GENERIC: 0.0: enabled 1
692 12:09:02.214300 USB0 port 0: enabled 1
693 12:09:02.216785 GENERIC: 0.0: enabled 1
694 12:09:02.220132 I2C: 00:1a: enabled 1
695 12:09:02.220542 I2C: 00:31: enabled 1
696 12:09:02.223789 I2C: 00:32: enabled 1
697 12:09:02.226963 I2C: 00:10: enabled 1
698 12:09:02.227369 I2C: 00:15: enabled 1
699 12:09:02.229727 GENERIC: 0.0: enabled 0
700 12:09:02.233333 GENERIC: 1.0: enabled 0
701 12:09:02.236500 GENERIC: 0.0: enabled 1
702 12:09:02.236881 SPI: 00: enabled 1
703 12:09:02.240005 SPI: 00: enabled 1
704 12:09:02.242995 PNP: 0c09.0: enabled 1
705 12:09:02.243368 GENERIC: 0.0: enabled 1
706 12:09:02.246592 USB3 port 0: enabled 1
707 12:09:02.249844 USB3 port 1: enabled 1
708 12:09:02.250271 USB3 port 2: enabled 0
709 12:09:02.252974 USB3 port 3: enabled 0
710 12:09:02.256495 USB2 port 0: enabled 0
711 12:09:02.259701 USB2 port 1: enabled 1
712 12:09:02.260079 USB2 port 2: enabled 1
713 12:09:02.262630 USB2 port 3: enabled 0
714 12:09:02.266462 USB2 port 4: enabled 1
715 12:09:02.266836 USB2 port 5: enabled 0
716 12:09:02.270360 USB2 port 6: enabled 0
717 12:09:02.273277 USB2 port 7: enabled 0
718 12:09:02.273764 USB2 port 8: enabled 0
719 12:09:02.276317
720 12:09:02.276816 USB2 port 9: enabled 0
721 12:09:02.279674 USB3 port 0: enabled 0
722 12:09:02.283130 USB3 port 1: enabled 1
723 12:09:02.283539 USB3 port 2: enabled 0
724 12:09:02.286068 USB3 port 3: enabled 0
725 12:09:02.290016 GENERIC: 0.0: enabled 1
726 12:09:02.293266 GENERIC: 1.0: enabled 1
727 12:09:02.293649 APIC: 01: enabled 1
728 12:09:02.297412 APIC: 02: enabled 1
729 12:09:02.297886 APIC: 07: enabled 1
730 12:09:02.300029 APIC: 05: enabled 1
731 12:09:02.303143 APIC: 04: enabled 1
732 12:09:02.303703 APIC: 03: enabled 1
733 12:09:02.306140 APIC: 06: enabled 1
734 12:09:02.306515 Compare with tree...
735 12:09:02.309781
736 12:09:02.310293 Root Device: enabled 1
737 12:09:02.312564 DOMAIN: 0000: enabled 1
738 12:09:02.316248 PCI: 00:00.0: enabled 1
739 12:09:02.319407 PCI: 00:02.0: enabled 1
740 12:09:02.319850 PCI: 00:04.0: enabled 1
741 12:09:02.322822 GENERIC: 0.0: enabled 1
742 12:09:02.326363 PCI: 00:05.0: enabled 1
743 12:09:02.329622 PCI: 00:06.0: enabled 0
744 12:09:02.332768 PCI: 00:07.0: enabled 0
745 12:09:02.333144 GENERIC: 0.0: enabled 1
746 12:09:02.336459 PCI: 00:07.1: enabled 0
747 12:09:02.339222 GENERIC: 1.0: enabled 1
748 12:09:02.342270 PCI: 00:07.2: enabled 0
749 12:09:02.345998 GENERIC: 0.0: enabled 1
750 12:09:02.346378 PCI: 00:07.3: enabled 0
751 12:09:02.349071 GENERIC: 1.0: enabled 1
752 12:09:02.352664 PCI: 00:08.0: enabled 1
753 12:09:02.355939 PCI: 00:09.0: enabled 0
754 12:09:02.359385 PCI: 00:0a.0: enabled 0
755 12:09:02.359908 PCI: 00:0d.0: enabled 1
756 12:09:02.362663 USB0 port 0: enabled 1
757 12:09:02.366157 USB3 port 0: enabled 1
758 12:09:02.368782 USB3 port 1: enabled 1
759 12:09:02.372701 USB3 port 2: enabled 0
760 12:09:02.375663 USB3 port 3: enabled 0
761 12:09:02.376036 PCI: 00:0d.1: enabled 0
762 12:09:02.379442 PCI: 00:0d.2: enabled 0
763 12:09:02.382392 GENERIC: 0.0: enabled 1
764 12:09:02.385763 PCI: 00:0d.3: enabled 0
765 12:09:02.389252 PCI: 00:0e.0: enabled 0
766 12:09:02.389942 PCI: 00:10.2: enabled 1
767 12:09:02.392214 PCI: 00:10.6: enabled 0
768 12:09:02.396199 PCI: 00:10.7: enabled 0
769 12:09:02.398821 PCI: 00:12.0: enabled 0
770 12:09:02.399320 PCI: 00:12.6: enabled 0
771 12:09:02.402294
772 12:09:02.402787 PCI: 00:13.0: enabled 0
773 12:09:02.406351 PCI: 00:14.0: enabled 1
774 12:09:02.410651 USB0 port 0: enabled 1
775 12:09:02.411206 USB2 port 0: enabled 0
776 12:09:02.413792 USB2 port 1: enabled 1
777 12:09:02.417175 USB2 port 2: enabled 1
778 12:09:02.420425 USB2 port 3: enabled 0
779 12:09:02.420801 USB2 port 4: enabled 1
780 12:09:02.470790
781 12:09:02.471300 USB2 port 5: enabled 0
782 12:09:02.471605 USB2 port 6: enabled 0
783 12:09:02.471885 USB2 port 7: enabled 0
784 12:09:02.472153 USB2 port 8: enabled 0
785 12:09:02.472761 USB2 port 9: enabled 0
786 12:09:02.473052 USB3 port 0: enabled 0
787 12:09:02.473320 USB3 port 1: enabled 1
788 12:09:02.473591 USB3 port 2: enabled 0
789 12:09:02.473889 USB3 port 3: enabled 0
790 12:09:02.474374 PCI: 00:14.1: enabled 0
791 12:09:02.474803 PCI: 00:14.2: enabled 1
792 12:09:02.475243 PCI: 00:14.3: enabled 1
793 12:09:02.475679 GENERIC: 0.0: enabled 1
794 12:09:02.476069 PCI: 00:15.0: enabled 1
795 12:09:02.476459 I2C: 00:1a: enabled 1
796 12:09:02.476846 I2C: 00:31: enabled 1
797 12:09:02.477232 I2C: 00:32: enabled 1
798 12:09:02.477606 PCI: 00:15.1: enabled 1
799 12:09:02.520398 I2C: 00:10: enabled 1
800 12:09:02.521084 PCI: 00:15.2: enabled 1
801 12:09:02.521447 PCI: 00:15.3: enabled 1
802 12:09:02.522156 PCI: 00:16.0: enabled 1
803 12:09:02.522525 PCI: 00:16.1: enabled 0
804 12:09:02.522887 PCI: 00:16.2: enabled 0
805 12:09:02.523203 PCI: 00:16.3: enabled 0
806 12:09:02.523509 PCI: 00:16.4: enabled 0
807 12:09:02.523806 PCI: 00:16.5: enabled 0
808 12:09:02.524109 PCI: 00:17.0: enabled 1
809 12:09:02.524791 PCI: 00:19.0: enabled 0
810 12:09:02.525124 PCI: 00:19.1: enabled 1
811 12:09:02.525424 I2C: 00:15: enabled 1
812 12:09:02.525718 PCI: 00:19.2: enabled 0
813 12:09:02.526068 PCI: 00:1d.0: enabled 1
814 12:09:02.526363 GENERIC: 0.0: enabled 1
815 12:09:02.526651 PCI: 00:1e.0: enabled 1
816 12:09:02.526939 PCI: 00:1e.1: enabled 0
817 12:09:02.527225 PCI: 00:1e.2: enabled 1
818 12:09:02.556916 SPI: 00: enabled 1
819 12:09:02.557450 PCI: 00:1e.3: enabled 1
820 12:09:02.557800 SPI: 00: enabled 1
821 12:09:02.558566 PCI: 00:1f.0: enabled 1
822 12:09:02.559140 PNP: 0c09.0: enabled 1
823 12:09:02.559598 PCI: 00:1f.1: enabled 0
824 12:09:02.560142 PCI: 00:1f.2: enabled 1
825 12:09:02.560635 GENERIC: 0.0: enabled 1
826 12:09:02.561102 GENERIC: 0.0: enabled 1
827 12:09:02.561589 GENERIC: 1.0: enabled 1
828 12:09:02.562136 PCI: 00:1f.3: enabled 1
829 12:09:02.562641 PCI: 00:1f.4: enabled 0
830 12:09:02.563469 PCI: 00:1f.5: enabled 1
831 12:09:02.563807 PCI: 00:1f.6: enabled 0
832 12:09:02.564104 PCI: 00:1f.7: enabled 0
833 12:09:02.564700 CPU_CLUSTER: 0: enabled 1
834 12:09:02.565021 APIC: 00: enabled 1
835 12:09:02.567529 APIC: 01: enabled 1
836 12:09:02.571022 APIC: 02: enabled 1
837 12:09:02.571428 APIC: 07: enabled 1
838 12:09:02.574333 APIC: 05: enabled 1
839 12:09:02.577561 APIC: 04: enabled 1
840 12:09:02.577996 APIC: 03: enabled 1
841 12:09:02.581033 APIC: 06: enabled 1
842 12:09:02.583984 Root Device scanning...
843 12:09:02.587719 scan_static_bus for Root Device
844 12:09:02.590529 DOMAIN: 0000 enabled
845 12:09:02.594111 CPU_CLUSTER: 0 enabled
846 12:09:02.594630 DOMAIN: 0000 scanning...
847 12:09:02.597108 PCI: pci_scan_bus for bus 00
848 12:09:02.600403 PCI: 00:00.0 [8086/0000] ops
849 12:09:02.603698 PCI: 00:00.0 [8086/9a12] enabled
850 12:09:02.607168 PCI: 00:02.0 [8086/0000] bus ops
851 12:09:02.610553 PCI: 00:02.0 [8086/9a40] enabled
852 12:09:02.613944 PCI: 00:04.0 [8086/0000] bus ops
853 12:09:02.617080 PCI: 00:04.0 [8086/9a03] enabled
854 12:09:02.620678 PCI: 00:05.0 [8086/9a19] enabled
855 12:09:02.623394 PCI: 00:07.0 [0000/0000] hidden
856 12:09:02.627202 PCI: 00:08.0 [8086/9a11] enabled
857 12:09:02.630434 PCI: 00:0a.0 [8086/9a0d] disabled
858 12:09:02.633627 PCI: 00:0d.0 [8086/0000] bus ops
859 12:09:02.636697 PCI: 00:0d.0 [8086/9a13] enabled
860 12:09:02.639949 PCI: 00:14.0 [8086/0000] bus ops
861 12:09:02.643370 PCI: 00:14.0 [8086/a0ed] enabled
862 12:09:02.646916 PCI: 00:14.2 [8086/a0ef] enabled
863 12:09:02.650860 PCI: 00:14.3 [8086/0000] bus ops
864 12:09:02.653955 PCI: 00:14.3 [8086/a0f0] enabled
865 12:09:02.656813 PCI: 00:15.0 [8086/0000] bus ops
866 12:09:02.660060 PCI: 00:15.0 [8086/a0e8] enabled
867 12:09:02.663300 PCI: 00:15.1 [8086/0000] bus ops
868 12:09:02.666644 PCI: 00:15.1 [8086/a0e9] enabled
869 12:09:02.669986 PCI: 00:15.2 [8086/0000] bus ops
870 12:09:02.673338 PCI: 00:15.2 [8086/a0ea] enabled
871 12:09:02.676742 PCI: 00:15.3 [8086/0000] bus ops
872 12:09:02.680312 PCI: 00:15.3 [8086/a0eb] enabled
873 12:09:02.683074 PCI: 00:16.0 [8086/0000] ops
874 12:09:02.686418 PCI: 00:16.0 [8086/a0e0] enabled
875 12:09:02.693100 PCI: Static device PCI: 00:17.0 not found, disabling it.
876 12:09:02.697419 PCI: 00:19.0 [8086/0000] bus ops
877 12:09:02.700320 PCI: 00:19.0 [8086/a0c5] disabled
878 12:09:02.703489 PCI: 00:19.1 [8086/0000] bus ops
879 12:09:02.706663 PCI: 00:19.1 [8086/a0c6] enabled
880 12:09:02.709633 PCI: 00:1d.0 [8086/0000] bus ops
881 12:09:02.712980 PCI: 00:1d.0 [8086/a0b0] enabled
882 12:09:02.716349 PCI: 00:1e.0 [8086/0000] ops
883 12:09:02.719919 PCI: 00:1e.0 [8086/a0a8] enabled
884 12:09:02.722889 PCI: 00:1e.2 [8086/0000] bus ops
885 12:09:02.726053 PCI: 00:1e.2 [8086/a0aa] enabled
886 12:09:02.729097 PCI: 00:1e.3 [8086/0000] bus ops
887 12:09:02.732805 PCI: 00:1e.3 [8086/a0ab] enabled
888 12:09:02.735801 PCI: 00:1f.0 [8086/0000] bus ops
889 12:09:02.738957 PCI: 00:1f.0 [8086/a087] enabled
890 12:09:02.739368 RTC Init
891 12:09:02.743081 Set power on after power failure.
892 12:09:02.746155 Disabling Deep S3
893 12:09:02.749195 Disabling Deep S3
894 12:09:02.749603 Disabling Deep S4
895 12:09:02.752564 Disabling Deep S4
896 12:09:02.752976 Disabling Deep S5
897 12:09:02.756028 Disabling Deep S5
898 12:09:02.759060 PCI: 00:1f.2 [0000/0000] hidden
899 12:09:02.762681 PCI: 00:1f.3 [8086/0000] bus ops
900 12:09:02.766177 PCI: 00:1f.3 [8086/a0c8] enabled
901 12:09:02.769442 PCI: 00:1f.5 [8086/0000] bus ops
902 12:09:02.772483 PCI: 00:1f.5 [8086/a0a4] enabled
903 12:09:02.776325 PCI: Leftover static devices:
904 12:09:02.776844 PCI: 00:10.2
905 12:09:02.779560 PCI: 00:10.6
906 12:09:02.779963 PCI: 00:10.7
907 12:09:02.780279 PCI: 00:06.0
908 12:09:02.782777 PCI: 00:07.1
909 12:09:02.783181 PCI: 00:07.2
910 12:09:02.785942 PCI: 00:07.3
911 12:09:02.786381 PCI: 00:09.0
912 12:09:02.786720 PCI: 00:0d.1
913 12:09:02.788906 PCI: 00:0d.2
914 12:09:02.789338 PCI: 00:0d.3
915 12:09:02.792303 PCI: 00:0e.0
916 12:09:02.792705 PCI: 00:12.0
917 12:09:02.795433 PCI: 00:12.6
918 12:09:02.795838 PCI: 00:13.0
919 12:09:02.796155 PCI: 00:14.1
920 12:09:02.799165 PCI: 00:16.1
921 12:09:02.799598 PCI: 00:16.2
922 12:09:02.803014 PCI: 00:16.3
923 12:09:02.803416 PCI: 00:16.4
924 12:09:02.803732 PCI: 00:16.5
925 12:09:02.805658 PCI: 00:17.0
926 12:09:02.806093 PCI: 00:19.2
927 12:09:02.808970 PCI: 00:1e.1
928 12:09:02.809375 PCI: 00:1f.1
929 12:09:02.812968 PCI: 00:1f.4
930 12:09:02.813396 PCI: 00:1f.6
931 12:09:02.813737 PCI: 00:1f.7
932 12:09:02.815337 PCI: Check your devicetree.cb.
933 12:09:02.819321 PCI: 00:02.0 scanning...
934 12:09:02.822500 scan_generic_bus for PCI: 00:02.0
935 12:09:02.825468 scan_generic_bus for PCI: 00:02.0 done
936 12:09:02.832461 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
937 12:09:02.835750 PCI: 00:04.0 scanning...
938 12:09:02.839025 scan_generic_bus for PCI: 00:04.0
939 12:09:02.839448 GENERIC: 0.0 enabled
940 12:09:02.845337 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
941 12:09:02.852204 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
942 12:09:02.852615 PCI: 00:0d.0 scanning...
943 12:09:02.855458 scan_static_bus for PCI: 00:0d.0
944 12:09:02.859095 USB0 port 0 enabled
945 12:09:02.861702 USB0 port 0 scanning...
946 12:09:02.865097 scan_static_bus for USB0 port 0
947 12:09:02.865487 USB3 port 0 enabled
948 12:09:02.868664 USB3 port 1 enabled
949 12:09:02.872163 USB3 port 2 disabled
950 12:09:02.872570 USB3 port 3 disabled
951 12:09:02.874963 USB3 port 0 scanning...
952 12:09:02.878315 scan_static_bus for USB3 port 0
953 12:09:02.881618 scan_static_bus for USB3 port 0 done
954 12:09:02.888490 scan_bus: bus USB3 port 0 finished in 6 msecs
955 12:09:02.888864 USB3 port 1 scanning...
956 12:09:02.892128 scan_static_bus for USB3 port 1
957 12:09:02.898252 scan_static_bus for USB3 port 1 done
958 12:09:02.901461 scan_bus: bus USB3 port 1 finished in 6 msecs
959 12:09:02.904908 scan_static_bus for USB0 port 0 done
960 12:09:02.908230 scan_bus: bus USB0 port 0 finished in 43 msecs
961 12:09:02.914985 scan_static_bus for PCI: 00:0d.0 done
962 12:09:02.918069 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
963 12:09:02.921310 PCI: 00:14.0 scanning...
964 12:09:02.925235 scan_static_bus for PCI: 00:14.0
965 12:09:02.928184 USB0 port 0 enabled
966 12:09:02.928595 USB0 port 0 scanning...
967 12:09:02.931441 scan_static_bus for USB0 port 0
968 12:09:02.934875 USB2 port 0 disabled
969 12:09:02.938470 USB2 port 1 enabled
970 12:09:02.938903 USB2 port 2 enabled
971 12:09:02.941659 USB2 port 3 disabled
972 12:09:02.942100 USB2 port 4 enabled
973 12:09:02.944899 USB2 port 5 disabled
974 12:09:02.948161 USB2 port 6 disabled
975 12:09:02.948604 USB2 port 7 disabled
976 12:09:02.951892 USB2 port 8 disabled
977 12:09:02.954585 USB2 port 9 disabled
978 12:09:02.955018 USB3 port 0 disabled
979 12:09:02.957982 USB3 port 1 enabled
980 12:09:02.961084 USB3 port 2 disabled
981 12:09:02.961460 USB3 port 3 disabled
982 12:09:02.964788 USB2 port 1 scanning...
983 12:09:02.967933 scan_static_bus for USB2 port 1
984 12:09:02.971413 scan_static_bus for USB2 port 1 done
985 12:09:02.978256 scan_bus: bus USB2 port 1 finished in 6 msecs
986 12:09:02.978759 USB2 port 2 scanning...
987 12:09:02.981235 scan_static_bus for USB2 port 2
988 12:09:02.984432 scan_static_bus for USB2 port 2 done
989 12:09:02.992000 scan_bus: bus USB2 port 2 finished in 6 msecs
990 12:09:02.992435 USB2 port 4 scanning...
991 12:09:02.995283 scan_static_bus for USB2 port 4
992 12:09:03.001603 scan_static_bus for USB2 port 4 done
993 12:09:03.005052 scan_bus: bus USB2 port 4 finished in 6 msecs
994 12:09:03.008383 USB3 port 1 scanning...
995 12:09:03.011472 scan_static_bus for USB3 port 1
996 12:09:03.015247 scan_static_bus for USB3 port 1 done
997 12:09:03.018238 scan_bus: bus USB3 port 1 finished in 6 msecs
998 12:09:03.021386 scan_static_bus for USB0 port 0 done
999 12:09:03.028598 scan_bus: bus USB0 port 0 finished in 93 msecs
1000 12:09:03.031904 scan_static_bus for PCI: 00:14.0 done
1001 12:09:03.034803 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1002 12:09:03.038157 PCI: 00:14.3 scanning...
1003 12:09:03.041595 scan_static_bus for PCI: 00:14.3
1004 12:09:03.044703 GENERIC: 0.0 enabled
1005 12:09:03.047833 scan_static_bus for PCI: 00:14.3 done
1006 12:09:03.051526 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1007 12:09:03.054585 PCI: 00:15.0 scanning...
1008 12:09:03.057820 scan_static_bus for PCI: 00:15.0
1009 12:09:03.061703 I2C: 00:1a enabled
1010 12:09:03.062172 I2C: 00:31 enabled
1011 12:09:03.064359 I2C: 00:32 enabled
1012 12:09:03.068172 scan_static_bus for PCI: 00:15.0 done
1013 12:09:03.074647 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1014 12:09:03.075045 PCI: 00:15.1 scanning...
1015 12:09:03.078008 scan_static_bus for PCI: 00:15.1
1016 12:09:03.081526 I2C: 00:10 enabled
1017 12:09:03.084895 scan_static_bus for PCI: 00:15.1 done
1018 12:09:03.091585 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1019 12:09:03.091992 PCI: 00:15.2 scanning...
1020 12:09:03.094205 scan_static_bus for PCI: 00:15.2
1021 12:09:03.101636 scan_static_bus for PCI: 00:15.2 done
1022 12:09:03.104902 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1023 12:09:03.107794 PCI: 00:15.3 scanning...
1024 12:09:03.111022 scan_static_bus for PCI: 00:15.3
1025 12:09:03.114463 scan_static_bus for PCI: 00:15.3 done
1026 12:09:03.117954 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1027 12:09:03.121058 PCI: 00:19.1 scanning...
1028 12:09:03.124341 scan_static_bus for PCI: 00:19.1
1029 12:09:03.127940 I2C: 00:15 enabled
1030 12:09:03.131023 scan_static_bus for PCI: 00:19.1 done
1031 12:09:03.134247 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1032 12:09:03.137840 PCI: 00:1d.0 scanning...
1033 12:09:03.141002 do_pci_scan_bridge for PCI: 00:1d.0
1034 12:09:03.144508 PCI: pci_scan_bus for bus 01
1035 12:09:03.147504 PCI: 01:00.0 [1c5c/174a] enabled
1036 12:09:03.151187 GENERIC: 0.0 enabled
1037 12:09:03.154138 Enabling Common Clock Configuration
1038 12:09:03.157546 L1 Sub-State supported from root port 29
1039 12:09:03.160487 L1 Sub-State Support = 0xf
1040 12:09:03.164115 CommonModeRestoreTime = 0x28
1041 12:09:03.167884 Power On Value = 0x16, Power On Scale = 0x0
1042 12:09:03.171068 ASPM: Enabled L1
1043 12:09:03.173878 PCIe: Max_Payload_Size adjusted to 128
1044 12:09:03.181000 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1045 12:09:03.181405 PCI: 00:1e.2 scanning...
1046 12:09:03.183686 scan_generic_bus for PCI: 00:1e.2
1047 12:09:03.187157 SPI: 00 enabled
1048 12:09:03.194213 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1049 12:09:03.196892 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1050 12:09:03.200278 PCI: 00:1e.3 scanning...
1051 12:09:03.203975 scan_generic_bus for PCI: 00:1e.3
1052 12:09:03.207263 SPI: 00 enabled
1053 12:09:03.210467 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1054 12:09:03.216972 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1055 12:09:03.221008 PCI: 00:1f.0 scanning...
1056 12:09:03.224226 scan_static_bus for PCI: 00:1f.0
1057 12:09:03.224751 PNP: 0c09.0 enabled
1058 12:09:03.227017 PNP: 0c09.0 scanning...
1059 12:09:03.230371 scan_static_bus for PNP: 0c09.0
1060 12:09:03.233587 scan_static_bus for PNP: 0c09.0 done
1061 12:09:03.240019 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1062 12:09:03.243489 scan_static_bus for PCI: 00:1f.0 done
1063 12:09:03.246735 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1064 12:09:03.250034 PCI: 00:1f.2 scanning...
1065 12:09:03.253826 scan_static_bus for PCI: 00:1f.2
1066 12:09:03.256796 GENERIC: 0.0 enabled
1067 12:09:03.257202 GENERIC: 0.0 scanning...
1068 12:09:03.260004
1069 12:09:03.263498 scan_static_bus for GENERIC: 0.0
1070 12:09:03.263960 GENERIC: 0.0 enabled
1071 12:09:03.266555 GENERIC: 1.0 enabled
1072 12:09:03.269828 scan_static_bus for GENERIC: 0.0 done
1073 12:09:03.273433 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1074 12:09:03.279950 scan_static_bus for PCI: 00:1f.2 done
1075 12:09:03.283100 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1076 12:09:03.286914 PCI: 00:1f.3 scanning...
1077 12:09:03.290265 scan_static_bus for PCI: 00:1f.3
1078 12:09:03.293450 scan_static_bus for PCI: 00:1f.3 done
1079 12:09:03.296702 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1080 12:09:03.299492 PCI: 00:1f.5 scanning...
1081 12:09:03.302942 scan_generic_bus for PCI: 00:1f.5
1082 12:09:03.309463 scan_generic_bus for PCI: 00:1f.5 done
1083 12:09:03.312814 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1084 12:09:03.316191 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1085 12:09:03.323087 scan_static_bus for Root Device done
1086 12:09:03.326531 scan_bus: bus Root Device finished in 737 msecs
1087 12:09:03.326933 done
1088 12:09:03.332741 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1089 12:09:03.336219 Chrome EC: UHEPI supported
1090 12:09:03.343002 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1091 12:09:03.349430 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1092 12:09:03.352535 SPI flash protection: WPSW=0 SRP0=0
1093 12:09:03.356092 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1094 12:09:03.362373 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1095 12:09:03.365767 found VGA at PCI: 00:02.0
1096 12:09:03.369287 Setting up VGA for PCI: 00:02.0
1097 12:09:03.376123 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1098 12:09:03.379193 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1099 12:09:03.382869 Allocating resources...
1100 12:09:03.383255 Reading resources...
1101 12:09:03.388828 Root Device read_resources bus 0 link: 0
1102 12:09:03.392383 DOMAIN: 0000 read_resources bus 0 link: 0
1103 12:09:03.398792 PCI: 00:04.0 read_resources bus 1 link: 0
1104 12:09:03.402471 PCI: 00:04.0 read_resources bus 1 link: 0 done
1105 12:09:03.409084 PCI: 00:0d.0 read_resources bus 0 link: 0
1106 12:09:03.412142 USB0 port 0 read_resources bus 0 link: 0
1107 12:09:03.418724 USB0 port 0 read_resources bus 0 link: 0 done
1108 12:09:03.422335 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1109 12:09:03.425179 PCI: 00:14.0 read_resources bus 0 link: 0
1110 12:09:03.431776 USB0 port 0 read_resources bus 0 link: 0
1111 12:09:03.434830 USB0 port 0 read_resources bus 0 link: 0 done
1112 12:09:03.441889 PCI: 00:14.0 read_resources bus 0 link: 0 done
1113 12:09:03.445237 PCI: 00:14.3 read_resources bus 0 link: 0
1114 12:09:03.452010 PCI: 00:14.3 read_resources bus 0 link: 0 done
1115 12:09:03.455081 PCI: 00:15.0 read_resources bus 0 link: 0
1116 12:09:03.462209 PCI: 00:15.0 read_resources bus 0 link: 0 done
1117 12:09:03.465499 PCI: 00:15.1 read_resources bus 0 link: 0
1118 12:09:03.472116 PCI: 00:15.1 read_resources bus 0 link: 0 done
1119 12:09:03.475458 PCI: 00:19.1 read_resources bus 0 link: 0
1120 12:09:03.482779 PCI: 00:19.1 read_resources bus 0 link: 0 done
1121 12:09:03.486106 PCI: 00:1d.0 read_resources bus 1 link: 0
1122 12:09:03.492373 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1123 12:09:03.496094 PCI: 00:1e.2 read_resources bus 2 link: 0
1124 12:09:03.502626 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1125 12:09:03.505849 PCI: 00:1e.3 read_resources bus 3 link: 0
1126 12:09:03.512493 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1127 12:09:03.516136 PCI: 00:1f.0 read_resources bus 0 link: 0
1128 12:09:03.522487 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1129 12:09:03.525911 PCI: 00:1f.2 read_resources bus 0 link: 0
1130 12:09:03.528973 GENERIC: 0.0 read_resources bus 0 link: 0
1131 12:09:03.536062 GENERIC: 0.0 read_resources bus 0 link: 0 done
1132 12:09:03.539365 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1133 12:09:03.547178 DOMAIN: 0000 read_resources bus 0 link: 0 done
1134 12:09:03.549977 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1135 12:09:03.556392 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1136 12:09:03.560088 Root Device read_resources bus 0 link: 0 done
1137 12:09:03.563236 Done reading resources.
1138 12:09:03.569759 Show resources in subtree (Root Device)...After reading.
1139 12:09:03.573304 Root Device child on link 0 DOMAIN: 0000
1140 12:09:03.576639 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1141 12:09:03.586633 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1142 12:09:03.596340 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1143 12:09:03.599663 PCI: 00:00.0
1144 12:09:03.609674 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1145 12:09:03.616495 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1146 12:09:03.626034 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1147 12:09:03.636687 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1148 12:09:03.646011 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1149 12:09:03.656078 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1150 12:09:03.662995 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1151 12:09:03.666270
1152 12:09:03.672590 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1153 12:09:03.682737 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1154 12:09:03.692647 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1155 12:09:03.702532 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1156 12:09:03.712745 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1157 12:09:03.719193 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1158 12:09:03.729093 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1159 12:09:03.739044 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1160 12:09:03.749026 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1161 12:09:03.758657 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1162 12:09:03.769129 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1163 12:09:03.775436 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1164 12:09:03.785604 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1165 12:09:03.788710 PCI: 00:02.0
1166 12:09:03.798630 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1167 12:09:03.808838 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1168 12:09:03.818556 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1169 12:09:03.821886 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1170 12:09:03.831607 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1171 12:09:03.835334 GENERIC: 0.0
1172 12:09:03.835622 PCI: 00:05.0
1173 12:09:03.845213 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1174 12:09:03.848342 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1175 12:09:03.851694
1176 12:09:03.851985 GENERIC: 0.0
1177 12:09:03.855430 PCI: 00:08.0
1178 12:09:03.865091 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 12:09:03.865470 PCI: 00:0a.0
1180 12:09:03.868320 PCI: 00:0d.0 child on link 0 USB0 port 0
1181 12:09:03.878401 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 12:09:03.885007 USB0 port 0 child on link 0 USB3 port 0
1183 12:09:03.885416 USB3 port 0
1184 12:09:03.888503 USB3 port 1
1185 12:09:03.889073 USB3 port 2
1186 12:09:03.891692 USB3 port 3
1187 12:09:03.895318 PCI: 00:14.0 child on link 0 USB0 port 0
1188 12:09:03.905369 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1189 12:09:03.908371 USB0 port 0 child on link 0 USB2 port 0
1190 12:09:03.911730
1191 12:09:03.912299 USB2 port 0
1192 12:09:03.915051 USB2 port 1
1193 12:09:03.915634 USB2 port 2
1194 12:09:03.918228 USB2 port 3
1195 12:09:03.918615 USB2 port 4
1196 12:09:03.921864 USB2 port 5
1197 12:09:03.922178 USB2 port 6
1198 12:09:03.925279 USB2 port 7
1199 12:09:03.925502 USB2 port 8
1200 12:09:03.928166 USB2 port 9
1201 12:09:03.928480 USB3 port 0
1202 12:09:03.931527 USB3 port 1
1203 12:09:03.931850 USB3 port 2
1204 12:09:03.934916 USB3 port 3
1205 12:09:03.935160 PCI: 00:14.2
1206 12:09:03.944682 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1207 12:09:03.954757 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1208 12:09:03.961284 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1209 12:09:03.971511 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 12:09:03.971737 GENERIC: 0.0
1211 12:09:03.978049 PCI: 00:15.0 child on link 0 I2C: 00:1a
1212 12:09:03.988565 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:09:03.988877 I2C: 00:1a
1214 12:09:03.990985 I2C: 00:31
1215 12:09:03.991289 I2C: 00:32
1216 12:09:03.994231 PCI: 00:15.1 child on link 0 I2C: 00:10
1217 12:09:04.004358 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 12:09:04.007890 I2C: 00:10
1219 12:09:04.008115 PCI: 00:15.2
1220 12:09:04.017504 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 12:09:04.020763 PCI: 00:15.3
1222 12:09:04.030801 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 12:09:04.031030 PCI: 00:16.0
1224 12:09:04.041240 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 12:09:04.044591 PCI: 00:19.0
1226 12:09:04.047893 PCI: 00:19.1 child on link 0 I2C: 00:15
1227 12:09:04.057595 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:09:04.060947 I2C: 00:15
1229 12:09:04.064219 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1230 12:09:04.073879 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1231 12:09:04.084528 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1232 12:09:04.090643 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1233 12:09:04.093891 GENERIC: 0.0
1234 12:09:04.094369 PCI: 01:00.0
1235 12:09:04.104130 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:09:04.114354 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1237 12:09:04.124174 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1238 12:09:04.124623 PCI: 00:1e.0
1239 12:09:04.137704 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1240 12:09:04.140918 PCI: 00:1e.2 child on link 0 SPI: 00
1241 12:09:04.151062 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:09:04.151378 SPI: 00
1243 12:09:04.157087 PCI: 00:1e.3 child on link 0 SPI: 00
1244 12:09:04.167413 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:09:04.167605 SPI: 00
1246 12:09:04.170335 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1247 12:09:04.180578 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1248 12:09:04.181029 PNP: 0c09.0
1249 12:09:04.190154 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1250 12:09:04.193375 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1251 12:09:04.203975 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1252 12:09:04.213572 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1253 12:09:04.216753 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1254 12:09:04.219907 GENERIC: 0.0
1255 12:09:04.223584 GENERIC: 1.0
1256 12:09:04.223959 PCI: 00:1f.3
1257 12:09:04.233615 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 12:09:04.243394 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1259 12:09:04.247175 PCI: 00:1f.5
1260 12:09:04.253256 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1261 12:09:04.260371 CPU_CLUSTER: 0 child on link 0 APIC: 00
1262 12:09:04.260779 APIC: 00
1263 12:09:04.261096 APIC: 01
1264 12:09:04.263546
1265 12:09:04.263997 APIC: 02
1266 12:09:04.264321 APIC: 07
1267 12:09:04.266152 APIC: 05
1268 12:09:04.266550 APIC: 04
1269 12:09:04.266864 APIC: 03
1270 12:09:04.269735 APIC: 06
1271 12:09:04.276260 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 12:09:04.283139 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 12:09:04.289830 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 12:09:04.296413 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 12:09:04.299883 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 12:09:04.302883 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 12:09:04.306362 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 12:09:04.316299 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 12:09:04.322778 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 12:09:04.329096 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 12:09:04.336046 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 12:09:04.343310 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 12:09:04.349373 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 12:09:04.359075 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 12:09:04.365867 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 12:09:04.369160 DOMAIN: 0000: Resource ranges:
1287 12:09:04.372451 * Base: 1000, Size: 800, Tag: 100
1288 12:09:04.376068 * Base: 1900, Size: e700, Tag: 100
1289 12:09:04.382267 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 12:09:04.389553 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 12:09:04.395671 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 12:09:04.402763 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 12:09:04.408750 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 12:09:04.418640 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 12:09:04.425631 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 12:09:04.431996 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 12:09:04.441727 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 12:09:04.448668 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 12:09:04.455486 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 12:09:04.465568 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 12:09:04.472088 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 12:09:04.478485 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 12:09:04.489062 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 12:09:04.494904 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 12:09:04.501445 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 12:09:04.511816 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 12:09:04.518136 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 12:09:04.524829 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 12:09:04.534628 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 12:09:04.541329 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 12:09:04.548637 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 12:09:04.558212 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 12:09:04.564845 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 12:09:04.568588 DOMAIN: 0000: Resource ranges:
1315 12:09:04.571597 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 12:09:04.578041 * Base: d0000000, Size: 28000000, Tag: 200
1317 12:09:04.581456 * Base: fa000000, Size: 1000000, Tag: 200
1318 12:09:04.584377 * Base: fb001000, Size: 2fff000, Tag: 200
1319 12:09:04.588198 * Base: fe010000, Size: 2e000, Tag: 200
1320 12:09:04.594369 * Base: fe03f000, Size: d41000, Tag: 200
1321 12:09:04.598013 * Base: fed88000, Size: 8000, Tag: 200
1322 12:09:04.600925 * Base: fed93000, Size: d000, Tag: 200
1323 12:09:04.604406 * Base: feda2000, Size: 1e000, Tag: 200
1324 12:09:04.610656 * Base: fede0000, Size: 1220000, Tag: 200
1325 12:09:04.614582 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 12:09:04.620800 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 12:09:04.627700 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 12:09:04.634200 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 12:09:04.640790 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 12:09:04.647847 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 12:09:04.653976 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 12:09:04.661041 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 12:09:04.667368 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 12:09:04.673886 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 12:09:04.680594 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 12:09:04.687785 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 12:09:04.694165 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 12:09:04.700699 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 12:09:04.707705 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 12:09:04.714125 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 12:09:04.720589 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 12:09:04.726906 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 12:09:04.733669 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 12:09:04.740657 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 12:09:04.747180 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 12:09:04.754240 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 12:09:04.760032 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 12:09:04.767318 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 12:09:04.776839 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 12:09:04.780220 PCI: 00:1d.0: Resource ranges:
1351 12:09:04.783934 * Base: 7fc00000, Size: 100000, Tag: 200
1352 12:09:04.790414 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 12:09:04.796450 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 12:09:04.803362 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 12:09:04.813355 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 12:09:04.819724 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 12:09:04.823063 Root Device assign_resources, bus 0 link: 0
1358 12:09:04.830195 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 12:09:04.837095 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 12:09:04.845969 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 12:09:04.852807 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 12:09:04.862936 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 12:09:04.866099 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 12:09:04.869404 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 12:09:04.879611 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 12:09:04.885776 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 12:09:04.896242 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 12:09:04.899496 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 12:09:04.905918 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 12:09:04.912065 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 12:09:04.915867 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 12:09:04.922574 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 12:09:04.928979 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 12:09:04.939270 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 12:09:04.946220 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 12:09:04.952113 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 12:09:04.955414 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 12:09:04.965968 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 12:09:04.968824 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 12:09:04.972155 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 12:09:04.982053 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 12:09:04.985202 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 12:09:04.991574 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 12:09:04.998176 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 12:09:05.008051 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 12:09:05.014643 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 12:09:05.024696 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 12:09:05.028179 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 12:09:05.031155 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 12:09:05.041260 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 12:09:05.051180 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 12:09:05.061268 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 12:09:05.064988 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 12:09:05.071174 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 12:09:05.081534 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 12:09:05.088121 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 12:09:05.094313 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 12:09:05.101035 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 12:09:05.107536 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 12:09:05.111176 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 12:09:05.117629 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 12:09:05.121308
1403 12:09:05.123794 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 12:09:05.126880 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 12:09:05.134004 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 12:09:05.137118 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 12:09:05.143721 LPC: Trying to open IO window from 800 size 1ff
1408 12:09:05.150869 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1409 12:09:05.160444 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1410 12:09:05.167144 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1411 12:09:05.173439 DOMAIN: 0000 assign_resources, bus 0 link: 0
1412 12:09:05.176602 Root Device assign_resources, bus 0 link: 0
1413 12:09:05.179997 Done setting resources.
1414 12:09:05.186833 Show resources in subtree (Root Device)...After assigning values.
1415 12:09:05.189629 Root Device child on link 0 DOMAIN: 0000
1416 12:09:05.193511 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1417 12:09:05.202960 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1418 12:09:05.212943 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1419 12:09:05.216123 PCI: 00:00.0
1420 12:09:05.222838 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1421 12:09:05.232954 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1422 12:09:05.242527 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1423 12:09:05.252813 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1424 12:09:05.262763 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1425 12:09:05.272412 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1426 12:09:05.282286 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1427 12:09:05.288994 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1428 12:09:05.299029 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1429 12:09:05.308732 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1430 12:09:05.318703 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1431 12:09:05.328442 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1432 12:09:05.338804 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1433 12:09:05.345621 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1434 12:09:05.355216 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1435 12:09:05.365336 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1436 12:09:05.374892 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1437 12:09:05.385298 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1438 12:09:05.394691 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1439 12:09:05.404780 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1440 12:09:05.405325 PCI: 00:02.0
1441 12:09:05.414882 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1442 12:09:05.428047 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1443 12:09:05.434866 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1444 12:09:05.440870 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1445 12:09:05.451301 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1446 12:09:05.451970 GENERIC: 0.0
1447 12:09:05.454237 PCI: 00:05.0
1448 12:09:05.464007 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1449 12:09:05.467820 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1450 12:09:05.470843 GENERIC: 0.0
1451 12:09:05.471217 PCI: 00:08.0
1452 12:09:05.474115
1453 12:09:05.484120 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 12:09:05.484566 PCI: 00:0a.0
1455 12:09:05.487243 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 12:09:05.500511 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 12:09:05.504433 USB0 port 0 child on link 0 USB3 port 0
1458 12:09:05.504890 USB3 port 0
1459 12:09:05.507411 USB3 port 1
1460 12:09:05.511119 USB3 port 2
1461 12:09:05.511555 USB3 port 3
1462 12:09:05.514129 PCI: 00:14.0 child on link 0 USB0 port 0
1463 12:09:05.527429 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 12:09:05.530462 USB0 port 0 child on link 0 USB2 port 0
1465 12:09:05.531084 USB2 port 0
1466 12:09:05.533975 USB2 port 1
1467 12:09:05.534548 USB2 port 2
1468 12:09:05.537270 USB2 port 3
1469 12:09:05.537751 USB2 port 4
1470 12:09:05.540759
1471 12:09:05.541166 USB2 port 5
1472 12:09:05.543847 USB2 port 6
1473 12:09:05.544334 USB2 port 7
1474 12:09:05.547235 USB2 port 8
1475 12:09:05.547697 USB2 port 9
1476 12:09:05.550857 USB3 port 0
1477 12:09:05.551359 USB3 port 1
1478 12:09:05.553700 USB3 port 2
1479 12:09:05.554169 USB3 port 3
1480 12:09:05.557270 PCI: 00:14.2
1481 12:09:05.566960 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1482 12:09:05.576798 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1483 12:09:05.580629 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1484 12:09:05.593929 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1485 12:09:05.594419 GENERIC: 0.0
1486 12:09:05.596669 PCI: 00:15.0 child on link 0 I2C: 00:1a
1487 12:09:05.606809 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1488 12:09:05.610163 I2C: 00:1a
1489 12:09:05.610607 I2C: 00:31
1490 12:09:05.614092 I2C: 00:32
1491 12:09:05.617387 PCI: 00:15.1 child on link 0 I2C: 00:10
1492 12:09:05.626683 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1493 12:09:05.629984 I2C: 00:10
1494 12:09:05.630433 PCI: 00:15.2
1495 12:09:05.639596 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1496 12:09:05.643516 PCI: 00:15.3
1497 12:09:05.653423 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1498 12:09:05.656730 PCI: 00:16.0
1499 12:09:05.666752 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1500 12:09:05.667202 PCI: 00:19.0
1501 12:09:05.669956 PCI: 00:19.1 child on link 0 I2C: 00:15
1502 12:09:05.683153 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1503 12:09:05.683636 I2C: 00:15
1504 12:09:05.686777 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1505 12:09:05.696221 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1506 12:09:05.709214 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1507 12:09:05.719273 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1508 12:09:05.719518 GENERIC: 0.0
1509 12:09:05.722995 PCI: 01:00.0
1510 12:09:05.733099 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1511 12:09:05.742566 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1512 12:09:05.752734 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1513 12:09:05.755516 PCI: 00:1e.0
1514 12:09:05.766427 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 12:09:05.769532 PCI: 00:1e.2 child on link 0 SPI: 00
1516 12:09:05.782591 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 12:09:05.783036 SPI: 00
1518 12:09:05.786008 PCI: 00:1e.3 child on link 0 SPI: 00
1519 12:09:05.796606 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 12:09:05.799267 SPI: 00
1521 12:09:05.802637 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 12:09:05.812658 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 12:09:05.813183 PNP: 0c09.0
1524 12:09:05.822348 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 12:09:05.825822 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 12:09:05.835481 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 12:09:05.845488 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 12:09:05.849121 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 12:09:05.852144 GENERIC: 0.0
1530 12:09:05.852453 GENERIC: 1.0
1531 12:09:05.856139 PCI: 00:1f.3
1532 12:09:05.866135 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 12:09:05.876152 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 12:09:05.876589 PCI: 00:1f.5
1535 12:09:05.878629
1536 12:09:05.888564 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1537 12:09:05.892013 CPU_CLUSTER: 0 child on link 0 APIC: 00
1538 12:09:05.892447 APIC: 00
1539 12:09:05.895732 APIC: 01
1540 12:09:05.896165 APIC: 02
1541 12:09:05.896501 APIC: 07
1542 12:09:05.898650 APIC: 05
1543 12:09:05.899083 APIC: 04
1544 12:09:05.902092 APIC: 03
1545 12:09:05.902524 APIC: 06
1546 12:09:05.905614 Done allocating resources.
1547 12:09:05.911972 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1548 12:09:05.915354 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1549 12:09:05.921758 Configure GPIOs for I2S audio on UP4.
1550 12:09:05.928400 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1551 12:09:05.928852 Enabling resources...
1552 12:09:05.935340 PCI: 00:00.0 subsystem <- 8086/9a12
1553 12:09:05.935817 PCI: 00:00.0 cmd <- 06
1554 12:09:05.938813 PCI: 00:02.0 subsystem <- 8086/9a40
1555 12:09:05.942393 PCI: 00:02.0 cmd <- 03
1556 12:09:05.945556 PCI: 00:04.0 subsystem <- 8086/9a03
1557 12:09:05.948540 PCI: 00:04.0 cmd <- 02
1558 12:09:05.951713 PCI: 00:05.0 subsystem <- 8086/9a19
1559 12:09:05.954940 PCI: 00:05.0 cmd <- 02
1560 12:09:05.958149 PCI: 00:08.0 subsystem <- 8086/9a11
1561 12:09:05.962156 PCI: 00:08.0 cmd <- 06
1562 12:09:05.965220 PCI: 00:0d.0 subsystem <- 8086/9a13
1563 12:09:05.968301 PCI: 00:0d.0 cmd <- 02
1564 12:09:05.971765 PCI: 00:14.0 subsystem <- 8086/a0ed
1565 12:09:05.975712 PCI: 00:14.0 cmd <- 02
1566 12:09:05.978492 PCI: 00:14.2 subsystem <- 8086/a0ef
1567 12:09:05.978798 PCI: 00:14.2 cmd <- 02
1568 12:09:05.985167 PCI: 00:14.3 subsystem <- 8086/a0f0
1569 12:09:05.985484 PCI: 00:14.3 cmd <- 02
1570 12:09:05.987974 PCI: 00:15.0 subsystem <- 8086/a0e8
1571 12:09:05.991801 PCI: 00:15.0 cmd <- 02
1572 12:09:05.995262 PCI: 00:15.1 subsystem <- 8086/a0e9
1573 12:09:05.998074 PCI: 00:15.1 cmd <- 02
1574 12:09:06.001623 PCI: 00:15.2 subsystem <- 8086/a0ea
1575 12:09:06.004863 PCI: 00:15.2 cmd <- 02
1576 12:09:06.008070 PCI: 00:15.3 subsystem <- 8086/a0eb
1577 12:09:06.011159 PCI: 00:15.3 cmd <- 02
1578 12:09:06.014434 PCI: 00:16.0 subsystem <- 8086/a0e0
1579 12:09:06.018011 PCI: 00:16.0 cmd <- 02
1580 12:09:06.021273 PCI: 00:19.1 subsystem <- 8086/a0c6
1581 12:09:06.024723 PCI: 00:19.1 cmd <- 02
1582 12:09:06.027489 PCI: 00:1d.0 bridge ctrl <- 0013
1583 12:09:06.031345 PCI: 00:1d.0 subsystem <- 8086/a0b0
1584 12:09:06.031657 PCI: 00:1d.0 cmd <- 06
1585 12:09:06.038597 PCI: 00:1e.0 subsystem <- 8086/a0a8
1586 12:09:06.038911 PCI: 00:1e.0 cmd <- 06
1587 12:09:06.041382 PCI: 00:1e.2 subsystem <- 8086/a0aa
1588 12:09:06.044279 PCI: 00:1e.2 cmd <- 06
1589 12:09:06.047969 PCI: 00:1e.3 subsystem <- 8086/a0ab
1590 12:09:06.050923 PCI: 00:1e.3 cmd <- 02
1591 12:09:06.055000 PCI: 00:1f.0 subsystem <- 8086/a087
1592 12:09:06.057389 PCI: 00:1f.0 cmd <- 407
1593 12:09:06.061315 PCI: 00:1f.3 subsystem <- 8086/a0c8
1594 12:09:06.064181 PCI: 00:1f.3 cmd <- 02
1595 12:09:06.067421 PCI: 00:1f.5 subsystem <- 8086/a0a4
1596 12:09:06.070942 PCI: 00:1f.5 cmd <- 406
1597 12:09:06.074707 PCI: 01:00.0 cmd <- 02
1598 12:09:06.078761 done.
1599 12:09:06.082567 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1600 12:09:06.085474 Initializing devices...
1601 12:09:06.088661 Root Device init
1602 12:09:06.092139 Chrome EC: Set SMI mask to 0x0000000000000000
1603 12:09:06.098706 Chrome EC: clear events_b mask to 0x0000000000000000
1604 12:09:06.105012 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1605 12:09:06.111955 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1606 12:09:06.118553 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1607 12:09:06.121020 Chrome EC: Set WAKE mask to 0x0000000000000000
1608 12:09:06.128796 fw_config match found: DB_USB=USB3_ACTIVE
1609 12:09:06.132028 Configure Right Type-C port orientation for retimer
1610 12:09:06.135390 Root Device init finished in 45 msecs
1611 12:09:06.140068 PCI: 00:00.0 init
1612 12:09:06.143535 CPU TDP = 9 Watts
1613 12:09:06.143624 CPU PL1 = 9 Watts
1614 12:09:06.146464 CPU PL2 = 40 Watts
1615 12:09:06.149914 CPU PL4 = 83 Watts
1616 12:09:06.152737 PCI: 00:00.0 init finished in 8 msecs
1617 12:09:06.152828 PCI: 00:02.0 init
1618 12:09:06.156251 GMA: Found VBT in CBFS
1619 12:09:06.159884 GMA: Found valid VBT in CBFS
1620 12:09:06.166691 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1621 12:09:06.173010 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1622 12:09:06.176605 PCI: 00:02.0 init finished in 18 msecs
1623 12:09:06.179828 PCI: 00:05.0 init
1624 12:09:06.182758 PCI: 00:05.0 init finished in 0 msecs
1625 12:09:06.186396 PCI: 00:08.0 init
1626 12:09:06.190145 PCI: 00:08.0 init finished in 0 msecs
1627 12:09:06.193240 PCI: 00:14.0 init
1628 12:09:06.196337 PCI: 00:14.0 init finished in 0 msecs
1629 12:09:06.199908 PCI: 00:14.2 init
1630 12:09:06.202659 PCI: 00:14.2 init finished in 0 msecs
1631 12:09:06.206523 PCI: 00:15.0 init
1632 12:09:06.207139 I2C bus 0 version 0x3230302a
1633 12:09:06.209449
1634 12:09:06.212811 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1635 12:09:06.215926 PCI: 00:15.0 init finished in 6 msecs
1636 12:09:06.216509 PCI: 00:15.1 init
1637 12:09:06.219317 I2C bus 1 version 0x3230302a
1638 12:09:06.222897 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1639 12:09:06.229413 PCI: 00:15.1 init finished in 6 msecs
1640 12:09:06.230087 PCI: 00:15.2 init
1641 12:09:06.232644 I2C bus 2 version 0x3230302a
1642 12:09:06.236675 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1643 12:09:06.239565 PCI: 00:15.2 init finished in 6 msecs
1644 12:09:06.242706 PCI: 00:15.3 init
1645 12:09:06.245896 I2C bus 3 version 0x3230302a
1646 12:09:06.249367 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1647 12:09:06.252748 PCI: 00:15.3 init finished in 6 msecs
1648 12:09:06.256163 PCI: 00:16.0 init
1649 12:09:06.259295 PCI: 00:16.0 init finished in 0 msecs
1650 12:09:06.262386 PCI: 00:19.1 init
1651 12:09:06.266022 I2C bus 5 version 0x3230302a
1652 12:09:06.269187 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1653 12:09:06.272287 PCI: 00:19.1 init finished in 6 msecs
1654 12:09:06.276258 PCI: 00:1d.0 init
1655 12:09:06.276572 Initializing PCH PCIe bridge.
1656 12:09:06.282342 PCI: 00:1d.0 init finished in 3 msecs
1657 12:09:06.285485 PCI: 00:1f.0 init
1658 12:09:06.288835 IOAPIC: Initializing IOAPIC at 0xfec00000
1659 12:09:06.292474 IOAPIC: Bootstrap Processor Local APIC = 0x00
1660 12:09:06.295797 IOAPIC: ID = 0x02
1661 12:09:06.299178 IOAPIC: Dumping registers
1662 12:09:06.299274 reg 0x0000: 0x02000000
1663 12:09:06.302149 reg 0x0001: 0x00770020
1664 12:09:06.305332 reg 0x0002: 0x00000000
1665 12:09:06.308585 PCI: 00:1f.0 init finished in 21 msecs
1666 12:09:06.312057 PCI: 00:1f.2 init
1667 12:09:06.315934 Disabling ACPI via APMC.
1668 12:09:06.316030 APMC done.
1669 12:09:06.319029 PCI: 00:1f.2 init finished in 5 msecs
1670 12:09:06.332687 PCI: 01:00.0 init
1671 12:09:06.335733 PCI: 01:00.0 init finished in 0 msecs
1672 12:09:06.338862 PNP: 0c09.0 init
1673 12:09:06.342290 Google Chrome EC uptime: 8.474 seconds
1674 12:09:06.348610 Google Chrome AP resets since EC boot: 1
1675 12:09:06.352227 Google Chrome most recent AP reset causes:
1676 12:09:06.355426 0.347: 32775 shutdown: entering G3
1677 12:09:06.362093 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1678 12:09:06.365441 PNP: 0c09.0 init finished in 22 msecs
1679 12:09:06.370987 Devices initialized
1680 12:09:06.374598 Show all devs... After init.
1681 12:09:06.377751 Root Device: enabled 1
1682 12:09:06.377854 DOMAIN: 0000: enabled 1
1683 12:09:06.381027 CPU_CLUSTER: 0: enabled 1
1684 12:09:06.384045 PCI: 00:00.0: enabled 1
1685 12:09:06.387514 PCI: 00:02.0: enabled 1
1686 12:09:06.387611 PCI: 00:04.0: enabled 1
1687 12:09:06.390715 PCI: 00:05.0: enabled 1
1688 12:09:06.394389 PCI: 00:06.0: enabled 0
1689 12:09:06.397751 PCI: 00:07.0: enabled 0
1690 12:09:06.397848 PCI: 00:07.1: enabled 0
1691 12:09:06.400806 PCI: 00:07.2: enabled 0
1692 12:09:06.404668 PCI: 00:07.3: enabled 0
1693 12:09:06.407604 PCI: 00:08.0: enabled 1
1694 12:09:06.407700 PCI: 00:09.0: enabled 0
1695 12:09:06.410748 PCI: 00:0a.0: enabled 0
1696 12:09:06.413989 PCI: 00:0d.0: enabled 1
1697 12:09:06.414087 PCI: 00:0d.1: enabled 0
1698 12:09:06.417859
1699 12:09:06.417957 PCI: 00:0d.2: enabled 0
1700 12:09:06.421328 PCI: 00:0d.3: enabled 0
1701 12:09:06.424403 PCI: 00:0e.0: enabled 0
1702 12:09:06.424495 PCI: 00:10.2: enabled 1
1703 12:09:06.427268 PCI: 00:10.6: enabled 0
1704 12:09:06.430604 PCI: 00:10.7: enabled 0
1705 12:09:06.434668 PCI: 00:12.0: enabled 0
1706 12:09:06.434777 PCI: 00:12.6: enabled 0
1707 12:09:06.437635 PCI: 00:13.0: enabled 0
1708 12:09:06.440873 PCI: 00:14.0: enabled 1
1709 12:09:06.444027 PCI: 00:14.1: enabled 0
1710 12:09:06.444140 PCI: 00:14.2: enabled 1
1711 12:09:06.447475 PCI: 00:14.3: enabled 1
1712 12:09:06.450751 PCI: 00:15.0: enabled 1
1713 12:09:06.454108 PCI: 00:15.1: enabled 1
1714 12:09:06.454203 PCI: 00:15.2: enabled 1
1715 12:09:06.457432 PCI: 00:15.3: enabled 1
1716 12:09:06.460554 PCI: 00:16.0: enabled 1
1717 12:09:06.460657 PCI: 00:16.1: enabled 0
1718 12:09:06.463804 PCI: 00:16.2: enabled 0
1719 12:09:06.467091 PCI: 00:16.3: enabled 0
1720 12:09:06.470343 PCI: 00:16.4: enabled 0
1721 12:09:06.470438 PCI: 00:16.5: enabled 0
1722 12:09:06.473838 PCI: 00:17.0: enabled 0
1723 12:09:06.477805 PCI: 00:19.0: enabled 0
1724 12:09:06.480744 PCI: 00:19.1: enabled 1
1725 12:09:06.480861 PCI: 00:19.2: enabled 0
1726 12:09:06.484217 PCI: 00:1c.0: enabled 1
1727 12:09:06.487553 PCI: 00:1c.1: enabled 0
1728 12:09:06.490857 PCI: 00:1c.2: enabled 0
1729 12:09:06.490993 PCI: 00:1c.3: enabled 0
1730 12:09:06.493918 PCI: 00:1c.4: enabled 0
1731 12:09:06.497361 PCI: 00:1c.5: enabled 0
1732 12:09:06.500415 PCI: 00:1c.6: enabled 1
1733 12:09:06.500587 PCI: 00:1c.7: enabled 0
1734 12:09:06.503929 PCI: 00:1d.0: enabled 1
1735 12:09:06.507260 PCI: 00:1d.1: enabled 0
1736 12:09:06.507432 PCI: 00:1d.2: enabled 1
1737 12:09:06.510628 PCI: 00:1d.3: enabled 0
1738 12:09:06.514187 PCI: 00:1e.0: enabled 1
1739 12:09:06.517353 PCI: 00:1e.1: enabled 0
1740 12:09:06.517756 PCI: 00:1e.2: enabled 1
1741 12:09:06.520527 PCI: 00:1e.3: enabled 1
1742 12:09:06.524241 PCI: 00:1f.0: enabled 1
1743 12:09:06.528088 PCI: 00:1f.1: enabled 0
1744 12:09:06.528716 PCI: 00:1f.2: enabled 1
1745 12:09:06.530567 PCI: 00:1f.3: enabled 1
1746 12:09:06.533998 PCI: 00:1f.4: enabled 0
1747 12:09:06.537425 PCI: 00:1f.5: enabled 1
1748 12:09:06.538094 PCI: 00:1f.6: enabled 0
1749 12:09:06.540886 PCI: 00:1f.7: enabled 0
1750 12:09:06.543843 APIC: 00: enabled 1
1751 12:09:06.544286 GENERIC: 0.0: enabled 1
1752 12:09:06.547585 GENERIC: 0.0: enabled 1
1753 12:09:06.550509 GENERIC: 1.0: enabled 1
1754 12:09:06.553965 GENERIC: 0.0: enabled 1
1755 12:09:06.554201 GENERIC: 1.0: enabled 1
1756 12:09:06.557413 USB0 port 0: enabled 1
1757 12:09:06.560200 GENERIC: 0.0: enabled 1
1758 12:09:06.560389 USB0 port 0: enabled 1
1759 12:09:06.563489 GENERIC: 0.0: enabled 1
1760 12:09:06.567002 I2C: 00:1a: enabled 1
1761 12:09:06.570454 I2C: 00:31: enabled 1
1762 12:09:06.570590 I2C: 00:32: enabled 1
1763 12:09:06.573758 I2C: 00:10: enabled 1
1764 12:09:06.576821 I2C: 00:15: enabled 1
1765 12:09:06.576941 GENERIC: 0.0: enabled 0
1766 12:09:06.580490 GENERIC: 1.0: enabled 0
1767 12:09:06.583496 GENERIC: 0.0: enabled 1
1768 12:09:06.583609 SPI: 00: enabled 1
1769 12:09:06.587055 SPI: 00: enabled 1
1770 12:09:06.590152 PNP: 0c09.0: enabled 1
1771 12:09:06.590248 GENERIC: 0.0: enabled 1
1772 12:09:06.593719 USB3 port 0: enabled 1
1773 12:09:06.597024 USB3 port 1: enabled 1
1774 12:09:06.599995 USB3 port 2: enabled 0
1775 12:09:06.600090 USB3 port 3: enabled 0
1776 12:09:06.603538 USB2 port 0: enabled 0
1777 12:09:06.606999 USB2 port 1: enabled 1
1778 12:09:06.607095 USB2 port 2: enabled 1
1779 12:09:06.610492 USB2 port 3: enabled 0
1780 12:09:06.613729 USB2 port 4: enabled 1
1781 12:09:06.613824 USB2 port 5: enabled 0
1782 12:09:06.616727 USB2 port 6: enabled 0
1783 12:09:06.619768 USB2 port 7: enabled 0
1784 12:09:06.623130 USB2 port 8: enabled 0
1785 12:09:06.623227 USB2 port 9: enabled 0
1786 12:09:06.626651 USB3 port 0: enabled 0
1787 12:09:06.629973 USB3 port 1: enabled 1
1788 12:09:06.630071 USB3 port 2: enabled 0
1789 12:09:06.633597 USB3 port 3: enabled 0
1790 12:09:06.636806 GENERIC: 0.0: enabled 1
1791 12:09:06.640252 GENERIC: 1.0: enabled 1
1792 12:09:06.640349 APIC: 01: enabled 1
1793 12:09:06.643108 APIC: 02: enabled 1
1794 12:09:06.643204 APIC: 07: enabled 1
1795 12:09:06.646748 APIC: 05: enabled 1
1796 12:09:06.650013 APIC: 04: enabled 1
1797 12:09:06.650110 APIC: 03: enabled 1
1798 12:09:06.652937 APIC: 06: enabled 1
1799 12:09:06.656538 PCI: 01:00.0: enabled 1
1800 12:09:06.660110 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1801 12:09:06.666256 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1802 12:09:06.669321 ELOG: NV offset 0xf30000 size 0x1000
1803 12:09:06.676336 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1804 12:09:06.683417 ELOG: Event(17) added with size 13 at 2022-11-25 12:09:03 UTC
1805 12:09:06.689392 ELOG: Event(92) added with size 9 at 2022-11-25 12:09:03 UTC
1806 12:09:06.696187 ELOG: Event(93) added with size 9 at 2022-11-25 12:09:03 UTC
1807 12:09:06.702931 ELOG: Event(9E) added with size 10 at 2022-11-25 12:09:03 UTC
1808 12:09:06.709788 ELOG: Event(9F) added with size 14 at 2022-11-25 12:09:03 UTC
1809 12:09:06.716416 ELOG: Event(9F) added with size 14 at 2022-11-25 12:09:03 UTC
1810 12:09:06.722509 BS: BS_DEV_INIT exit times (exec / console): 3 / 51 ms
1811 12:09:06.726097 ELOG: Event(A1) added with size 10 at 2022-11-25 12:09:03 UTC
1812 12:09:06.732360 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1813 12:09:06.739410 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1814 12:09:06.742517 Finalize devices...
1815 12:09:06.742983 Devices finalized
1816 12:09:06.749326 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1817 12:09:06.752459 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1818 12:09:06.759298 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1819 12:09:06.765778 ME: HFSTS1 : 0x80030055
1820 12:09:06.768944 ME: HFSTS2 : 0x30280116
1821 12:09:06.772689 ME: HFSTS3 : 0x00000050
1822 12:09:06.778982 ME: HFSTS4 : 0x00004000
1823 12:09:06.782557 ME: HFSTS5 : 0x00000000
1824 12:09:06.786063 ME: HFSTS6 : 0x00400006
1825 12:09:06.789096 ME: Manufacturing Mode : YES
1826 12:09:06.792719
1827 12:09:06.795962 ME: SPI Protection Mode Enabled : NO
1828 12:09:06.799008 ME: FW Partition Table : OK
1829 12:09:06.802264 ME: Bringup Loader Failure : NO
1830 12:09:06.805994 ME: Firmware Init Complete : NO
1831 12:09:06.809621 ME: Boot Options Present : NO
1832 12:09:06.812714 ME: Update In Progress : NO
1833 12:09:06.815718 ME: D0i3 Support : YES
1834 12:09:06.819382 ME: Low Power State Enabled : NO
1835 12:09:06.825622 ME: CPU Replaced : YES
1836 12:09:06.828920 ME: CPU Replacement Valid : YES
1837 12:09:06.831764 ME: Current Working State : 5
1838 12:09:06.835908 ME: Current Operation State : 1
1839 12:09:06.838603 ME: Current Operation Mode : 3
1840 12:09:06.841718 ME: Error Code : 0
1841 12:09:06.845610 ME: Enhanced Debug Mode : NO
1842 12:09:06.848513 ME: CPU Debug Disabled : YES
1843 12:09:06.851585 ME: TXT Support : NO
1844 12:09:06.854926
1845 12:09:06.858226 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1846 12:09:06.868003 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1847 12:09:06.871497 CBFS: 'fallback/slic' not found.
1848 12:09:06.874976 ACPI: Writing ACPI tables at 76b01000.
1849 12:09:06.875072 ACPI: * FACS
1850 12:09:06.878036 ACPI: * DSDT
1851 12:09:06.881354 Ramoops buffer: 0x100000@0x76a00000.
1852 12:09:06.884856 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1853 12:09:06.891836 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1854 12:09:06.895177 Google Chrome EC: version:
1855 12:09:06.897807 ro: voema_v2.0.7540-147f8d37d1
1856 12:09:06.901856 rw: voema_v2.0.7540-147f8d37d1
1857 12:09:06.902322 running image: 2
1858 12:09:06.907877 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1859 12:09:06.913878 ACPI: * FADT
1860 12:09:06.914312 SCI is IRQ9
1861 12:09:06.917208 ACPI: added table 1/32, length now 40
1862 12:09:06.920538
1863 12:09:06.920938 ACPI: * SSDT
1864 12:09:06.923204 Found 1 CPU(s) with 8 core(s) each.
1865 12:09:06.930265 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 12:09:06.933149 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 12:09:06.937033 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 12:09:06.939535 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 12:09:06.946466 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 12:09:06.953071 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 12:09:06.956369 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 12:09:06.962871 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 12:09:06.969233 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 12:09:06.973489 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 12:09:06.976626 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 12:09:06.979855
1877 12:09:06.982853 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 12:09:06.989634 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 12:09:06.993306 PS2K: Passing 80 keymaps to kernel
1880 12:09:07.000170 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 12:09:07.006593 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 12:09:07.013049 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 12:09:07.019214 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 12:09:07.025930 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 12:09:07.033045 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 12:09:07.039407 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 12:09:07.045843 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 12:09:07.049227 ACPI: added table 2/32, length now 44
1889 12:09:07.049339 ACPI: * MCFG
1890 12:09:07.052363 ACPI: added table 3/32, length now 48
1891 12:09:07.055642 ACPI: * TPM2
1892 12:09:07.059251 TPM2 log created at 0x769f0000
1893 12:09:07.062726 ACPI: added table 4/32, length now 52
1894 12:09:07.062826 ACPI: * MADT
1895 12:09:07.066176 SCI is IRQ9
1896 12:09:07.068861 ACPI: added table 5/32, length now 56
1897 12:09:07.072168 current = 76b09850
1898 12:09:07.072269 ACPI: * DMAR
1899 12:09:07.075835 ACPI: added table 6/32, length now 60
1900 12:09:07.079103 ACPI: added table 7/32, length now 64
1901 12:09:07.082518 ACPI: * HPET
1902 12:09:07.085663 ACPI: added table 8/32, length now 68
1903 12:09:07.085764 ACPI: done.
1904 12:09:07.088900 ACPI tables: 35216 bytes.
1905 12:09:07.092149 smbios_write_tables: 769ef000
1906 12:09:07.095921 EC returned error result code 3
1907 12:09:07.099089 Couldn't obtain OEM name from CBI
1908 12:09:07.102858 Create SMBIOS type 16
1909 12:09:07.105797 Create SMBIOS type 17
1910 12:09:07.108788 GENERIC: 0.0 (WIFI Device)
1911 12:09:07.108888 SMBIOS tables: 1750 bytes.
1912 12:09:07.115571 Writing table forward entry at 0x00000500
1913 12:09:07.122300 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 12:09:07.125672 Writing coreboot table at 0x76b25000
1915 12:09:07.132010 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 12:09:07.135749 1. 0000000000001000-000000000009ffff: RAM
1917 12:09:07.139290 2. 00000000000a0000-00000000000fffff: RESERVED
1918 12:09:07.145336 3. 0000000000100000-00000000769eefff: RAM
1919 12:09:07.148878 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 12:09:07.155391 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 12:09:07.161822 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 12:09:07.165491 7. 0000000077000000-000000007fbfffff: RESERVED
1923 12:09:07.169021 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 12:09:07.175733 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 12:09:07.179108 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 12:09:07.185485 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 12:09:07.188700 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 12:09:07.195190 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 12:09:07.199017 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 12:09:07.205477 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 12:09:07.208839 16. 0000000100000000-00000002803fffff: RAM
1932 12:09:07.211724 Passing 4 GPIOs to payload:
1933 12:09:07.215051 NAME | PORT | POLARITY | VALUE
1934 12:09:07.222193 lid | undefined | high | high
1935 12:09:07.225413 power | undefined | high | low
1936 12:09:07.231822 oprom | undefined | high | low
1937 12:09:07.238665 EC in RW | 0x000000e5 | high | high
1938 12:09:07.245233 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e16d
1939 12:09:07.245338 coreboot table: 1576 bytes.
1940 12:09:07.251566 IMD ROOT 0. 0x76fff000 0x00001000
1941 12:09:07.255080 IMD SMALL 1. 0x76ffe000 0x00001000
1942 12:09:07.258565 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 12:09:07.261655 VPD 3. 0x76c4d000 0x00000367
1944 12:09:07.264741 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 12:09:07.268316 CONSOLE 5. 0x76c2c000 0x00020000
1946 12:09:07.271350 FMAP 6. 0x76c2b000 0x00000578
1947 12:09:07.275094 TIME STAMP 7. 0x76c2a000 0x00000910
1948 12:09:07.281652 VBOOT WORK 8. 0x76c16000 0x00014000
1949 12:09:07.284823 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 12:09:07.288039 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 12:09:07.291762 RAMSTAGE 11. 0x76b97000 0x00073000
1952 12:09:07.294347 REFCODE 12. 0x76b42000 0x00055000
1953 12:09:07.298096 SMM BACKUP 13. 0x76b32000 0x00010000
1954 12:09:07.301665 4f444749 14. 0x76b30000 0x00002000
1955 12:09:07.304555 EXT VBT15. 0x76b2d000 0x0000219f
1956 12:09:07.307682 COREBOOT 16. 0x76b25000 0x00008000
1957 12:09:07.314739 ACPI 17. 0x76b01000 0x00024000
1958 12:09:07.318248 ACPI GNVS 18. 0x76b00000 0x00001000
1959 12:09:07.321437 RAMOOPS 19. 0x76a00000 0x00100000
1960 12:09:07.324552 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 12:09:07.327906 SMBIOS 21. 0x769ef000 0x00000800
1962 12:09:07.331261 IMD small region:
1963 12:09:07.334951 IMD ROOT 0. 0x76ffec00 0x00000400
1964 12:09:07.337694 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 12:09:07.340923 POWER STATE 2. 0x76ffeb80 0x00000044
1966 12:09:07.344269 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 12:09:07.351004 MEM INFO 4. 0x76ffe980 0x000001e0
1968 12:09:07.354311 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1969 12:09:07.357355 MTRR: Physical address space:
1970 12:09:07.364055 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 12:09:07.371002 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 12:09:07.377660 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 12:09:07.383988 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 12:09:07.390857 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 12:09:07.397182 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 12:09:07.400527 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1977 12:09:07.407332 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 12:09:07.410824 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 12:09:07.413878 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 12:09:07.417615 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 12:09:07.424066 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 12:09:07.427440 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 12:09:07.430905 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 12:09:07.434279 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 12:09:07.440935 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 12:09:07.444092 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 12:09:07.446834 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 12:09:07.450107 call enable_fixed_mtrr()
1989 12:09:07.453775 CPU physical address size: 39 bits
1990 12:09:07.460326 MTRR: default type WB/UC MTRR counts: 6/6.
1991 12:09:07.463885 MTRR: UC selected as default type.
1992 12:09:07.467271 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1993 12:09:07.470272
1994 12:09:07.473354 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1995 12:09:07.480948 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1996 12:09:07.486641 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1997 12:09:07.493777 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1998 12:09:07.500189 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1999 12:09:07.507012 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 12:09:07.510137 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 12:09:07.513634 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 12:09:07.516921 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 12:09:07.519946 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 12:09:07.523638
2005 12:09:07.526823 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 12:09:07.529700 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 12:09:07.533446 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 12:09:07.536490 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 12:09:07.543780 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 12:09:07.546502 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 12:09:07.546600
2012 12:09:07.549883 MTRR check
2013 12:09:07.549985 call enable_fixed_mtrr()
2014 12:09:07.553622 Fixed MTRRs : Enabled
2015 12:09:07.556749 Variable MTRRs: Enabled
2016 12:09:07.556845
2017 12:09:07.560056 CPU physical address size: 39 bits
2018 12:09:07.566703 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2019 12:09:07.569789 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 12:09:07.576460 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 12:09:07.579687 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 12:09:07.583212 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 12:09:07.586333 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 12:09:07.593015 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 12:09:07.596308 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 12:09:07.599869 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 12:09:07.602652 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 12:09:07.606028 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 12:09:07.609298
2030 12:09:07.612979 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:09:07.616062 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:09:07.622901 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 12:09:07.626230 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 12:09:07.629698 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 12:09:07.632744 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 12:09:07.635880 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 12:09:07.642523 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 12:09:07.645785 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 12:09:07.649432 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 12:09:07.652832 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 12:09:07.659561 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 12:09:07.662773 call enable_fixed_mtrr()
2043 12:09:07.662868 call enable_fixed_mtrr()
2044 12:09:07.665853
2045 12:09:07.669455 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 12:09:07.672605 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 12:09:07.676118 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 12:09:07.679092 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 12:09:07.685591 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 12:09:07.689242 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 12:09:07.692677 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 12:09:07.696081 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 12:09:07.702065 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 12:09:07.705791 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 12:09:07.709368 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 12:09:07.712345 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 12:09:07.719812 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 12:09:07.719907 call enable_fixed_mtrr()
2059 12:09:07.726416 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 12:09:07.729782 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 12:09:07.733163 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 12:09:07.736184 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 12:09:07.742958 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 12:09:07.746107 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 12:09:07.749871 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 12:09:07.752262 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 12:09:07.759019 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 12:09:07.762942 CPU physical address size: 39 bits
2069 12:09:07.766031 call enable_fixed_mtrr()
2070 12:09:07.769173 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 12:09:07.775883 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 12:09:07.778823 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 12:09:07.781927 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 12:09:07.785493 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 12:09:07.792300 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 12:09:07.795264 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 12:09:07.799034 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 12:09:07.802154 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 12:09:07.808605 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 12:09:07.811773 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 12:09:07.814960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 12:09:07.821855 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 12:09:07.821966 call enable_fixed_mtrr()
2084 12:09:07.828172 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 12:09:07.831728 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 12:09:07.835020 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 12:09:07.838473 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 12:09:07.844728 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 12:09:07.847908 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 12:09:07.851407 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 12:09:07.854748 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 12:09:07.860918 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 12:09:07.864412 CPU physical address size: 39 bits
2094 12:09:07.867796 call enable_fixed_mtrr()
2095 12:09:07.871935 Checking cr50 for pending updates
2096 12:09:07.875518 CPU physical address size: 39 bits
2097 12:09:07.878543 CPU physical address size: 39 bits
2098 12:09:07.881852 Reading cr50 TPM mode
2099 12:09:07.885664 CPU physical address size: 39 bits
2100 12:09:07.888959 CPU physical address size: 39 bits
2101 12:09:07.895807 BS: BS_PAYLOAD_LOAD entry times (exec / console): 314 / 6 ms
2102 12:09:07.902207 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2103 12:09:07.905455 Checking segment from ROM address 0xffc02b38
2104 12:09:07.912353 Checking segment from ROM address 0xffc02b54
2105 12:09:07.915748 Loading segment from ROM address 0xffc02b38
2106 12:09:07.919034 code (compression=0)
2107 12:09:07.925594 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2108 12:09:07.935045 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2109 12:09:07.938536 it's not compressed!
2110 12:09:08.076366 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2111 12:09:08.082816 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2112 12:09:08.089859 Loading segment from ROM address 0xffc02b54
2113 12:09:08.089981 Entry Point 0x30000000
2114 12:09:08.093018
2115 12:09:08.093115 Loaded segments
2116 12:09:08.099368 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2117 12:09:08.142753 Finalizing chipset.
2118 12:09:08.145508 Finalizing SMM.
2119 12:09:08.145620 APMC done.
2120 12:09:08.152352 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 12:09:08.155587 mp_park_aps done after 0 msecs.
2122 12:09:08.159048 Jumping to boot code at 0x30000000(0x76b25000)
2123 12:09:08.168760 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 12:09:08.168859
2125 12:09:08.168954
2126 12:09:08.169044
2127 12:09:08.172233 Starting depthcharge on Voema...
2128 12:09:08.172330
2129 12:09:08.172756 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2130 12:09:08.172885 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2131 12:09:08.172991 Setting prompt string to ['volteer:']
2132 12:09:08.173093 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2133 12:09:08.182438 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 12:09:08.182537
2135 12:09:08.188776 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 12:09:08.188873
2137 12:09:08.195531 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 12:09:08.195630
2139 12:09:08.199262 Failed to find eMMC card reader
2140 12:09:08.199359
2141 12:09:08.199435 Wipe memory regions:
2142 12:09:08.199505
2143 12:09:08.205309 [0x00000000001000, 0x000000000a0000)
2144 12:09:08.205406
2145 12:09:08.208850 [0x00000000100000, 0x00000030000000)
2146 12:09:08.208947
2147 12:09:08.237670 [0x00000032662db0, 0x000000769ef000)
2148 12:09:08.237768
2149 12:09:08.276384 [0x00000100000000, 0x00000280400000)
2150 12:09:08.276491
2151 12:09:08.480398 ec_init: CrosEC protocol v3 supported (256, 256)
2152 12:09:08.480555
2153 12:09:08.487281 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 12:09:08.487375
2155 12:09:08.497501 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 12:09:08.497597
2157 12:09:08.503703 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2158 12:09:08.503797
2159 12:09:08.507045 send_conn_disc_msg: pmc_send_cmd succeeded
2160 12:09:08.507139
2161 12:09:08.938590 R8152: Initializing
2162 12:09:08.938749
2163 12:09:08.941633 Version 6 (ocp_data = 5c30)
2164 12:09:08.941729
2165 12:09:08.944727 R8152: Done initializing
2166 12:09:08.944821
2167 12:09:08.948379 Adding net device
2168 12:09:08.948472
2169 12:09:09.252958 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 12:09:09.253114
2171 12:09:09.253187
2172 12:09:09.253258
2173 12:09:09.256488 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 12:09:09.357288 volteer: tftpboot 192.168.201.1 8123204/tftp-deploy-uzj01zx3/kernel/bzImage 8123204/tftp-deploy-uzj01zx3/kernel/cmdline 8123204/tftp-deploy-uzj01zx3/ramdisk/ramdisk.cpio.gz
2176 12:09:09.357442 Setting prompt string to 'Starting kernel'
2177 12:09:09.357530 Setting prompt string to ['Starting kernel']
2178 12:09:09.357622 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 12:09:09.357707 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2180 12:09:09.361624 tftpboot 192.168.201.1 8123204/tftp-deploy-uzj01zx3/kernel/bzImoy-uzj01zx3/kernel/cmdline 8123204/tftp-deploy-uzj01zx3/ramdisk/ramdisk.cpio.gz
2181 12:09:09.361726
2182 12:09:09.361803 Waiting for link
2183 12:09:09.361873
2184 12:09:09.565957 done.
2185 12:09:09.566099
2186 12:09:09.566174 MAC: 00:24:32:30:7b:87
2187 12:09:09.566244
2188 12:09:09.568675 Sending DHCP discover... done.
2189 12:09:09.568779
2190 12:09:09.572167 Waiting for reply... done.
2191 12:09:09.572262
2192 12:09:09.575336 Sending DHCP request... done.
2193 12:09:09.575447
2194 12:09:09.581953 Waiting for reply... done.
2195 12:09:09.582047
2196 12:09:09.582122 My ip is 192.168.201.19
2197 12:09:09.582206
2198 12:09:09.585529 The DHCP server ip is 192.168.201.1
2199 12:09:09.585623
2200 12:09:09.591857 TFTP server IP predefined by user: 192.168.201.1
2201 12:09:09.591966
2202 12:09:09.598183 Bootfile predefined by user: 8123204/tftp-deploy-uzj01zx3/kernel/bzImage
2203 12:09:09.598280
2204 12:09:09.601879 Sending tftp read request... done.
2205 12:09:09.601982
2206 12:09:09.604979 Waiting for the transfer...
2207 12:09:09.605076
2208 12:09:10.190505 00000000 ################################################################
2209 12:09:10.190668
2210 12:09:10.784676 00080000 ################################################################
2211 12:09:10.784838
2212 12:09:11.380913 00100000 ################################################################
2213 12:09:11.381066
2214 12:09:11.956448 00180000 ################################################################
2215 12:09:11.956600
2216 12:09:12.522336 00200000 ################################################################
2217 12:09:12.522496
2218 12:09:13.091670 00280000 ################################################################
2219 12:09:13.091846
2220 12:09:13.648330 00300000 ################################################################
2221 12:09:13.648479
2222 12:09:14.187516 00380000 ################################################################
2223 12:09:14.187671
2224 12:09:14.719720 00400000 ################################################################
2225 12:09:14.719880
2226 12:09:15.246058 00480000 ################################################################
2227 12:09:15.246220
2228 12:09:15.764215 00500000 ################################################################
2229 12:09:15.764368
2230 12:09:16.282927 00580000 ################################################################
2231 12:09:16.283082
2232 12:09:16.813720 00600000 ################################################################
2233 12:09:16.813870
2234 12:09:17.148622 00680000 ###################################### done.
2235 12:09:17.148771
2236 12:09:17.152020 The bootfile was 7126928 bytes long.
2237 12:09:17.152148
2238 12:09:17.155270 Sending tftp read request... done.
2239 12:09:17.155368
2240 12:09:17.158526 Waiting for the transfer...
2241 12:09:17.158624
2242 12:09:17.724560 00000000 ################################################################
2243 12:09:17.724711
2244 12:09:18.274557 00080000 ################################################################
2245 12:09:18.274708
2246 12:09:18.813787 00100000 ################################################################
2247 12:09:18.813954
2248 12:09:19.444597 00180000 ################################################################
2249 12:09:19.445111
2250 12:09:20.134855 00200000 ################################################################
2251 12:09:20.135355
2252 12:09:20.782682 00280000 ################################################################
2253 12:09:20.782845
2254 12:09:21.356401 00300000 ################################################################
2255 12:09:21.356561
2256 12:09:21.942556 00380000 ################################################################
2257 12:09:21.942713
2258 12:09:22.540840 00400000 ################################################################
2259 12:09:22.541003
2260 12:09:23.128139 00480000 ################################################################
2261 12:09:23.128316
2262 12:09:23.706736 00500000 ################################################################
2263 12:09:23.706900
2264 12:09:24.278201 00580000 ################################################################
2265 12:09:24.278362
2266 12:09:24.851919 00600000 ################################################################
2267 12:09:24.852071
2268 12:09:25.436772 00680000 ################################################################
2269 12:09:25.436920
2270 12:09:26.001902 00700000 ################################################################
2271 12:09:26.002049
2272 12:09:26.568425 00780000 ################################################################
2273 12:09:26.568577
2274 12:09:26.744485 00800000 #################### done.
2275 12:09:26.744632
2276 12:09:26.748312 Sending tftp read request... done.
2277 12:09:26.748414
2278 12:09:26.751110 Waiting for the transfer...
2279 12:09:26.751208
2280 12:09:26.751285 00000000 # done.
2281 12:09:26.751359
2282 12:09:26.761132 Command line loaded dynamically from TFTP file: 8123204/tftp-deploy-uzj01zx3/kernel/cmdline
2283 12:09:26.761232
2284 12:09:26.774593 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2285 12:09:26.774699
2286 12:09:26.781295 Shutting down all USB controllers.
2287 12:09:26.781389
2288 12:09:26.781484 Removing current net device
2289 12:09:26.781574
2290 12:09:26.784989 Finalizing coreboot
2291 12:09:26.785083
2292 12:09:26.791337 Exiting depthcharge with code 4 at timestamp: 27367845
2293 12:09:26.791440
2294 12:09:26.791536
2295 12:09:26.791625 Starting kernel ...
2296 12:09:26.791711
2297 12:09:26.791796
2298 12:09:26.791880
2299 12:09:26.792290 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2300 12:09:26.792417 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2301 12:09:26.792514 Setting prompt string to ['Linux version [0-9]']
2302 12:09:26.792618 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2303 12:09:26.792716 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2305 12:13:50.793198 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2307 12:13:50.793865 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2309 12:13:50.794375 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2312 12:13:50.795203 end: 2 depthcharge-action (duration 00:05:00) [common]
2314 12:13:50.795873 Cleaning after the job
2315 12:13:50.796134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/ramdisk
2316 12:13:50.798123 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/kernel
2317 12:13:50.798704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123204/tftp-deploy-uzj01zx3/modules
2318 12:13:50.798912 start: 5.1 power-off (timeout 00:00:30) [common]
2319 12:13:50.799080 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2320 12:13:50.821006 >> Command sent successfully.
2321 12:13:50.822979 Returned 0 in 0 seconds
2322 12:13:50.924132 end: 5.1 power-off (duration 00:00:00) [common]
2324 12:13:50.925751 start: 5.2 read-feedback (timeout 00:10:00) [common]
2325 12:13:50.926856 Listened to connection for namespace 'common' for up to 1s
2326 12:13:51.931606 Finalising connection for namespace 'common'
2327 12:13:51.932344 Disconnecting from shell: Finalise
2328 12:13:52.033765 end: 5.2 read-feedback (duration 00:00:01) [common]
2329 12:13:52.034633 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8123204
2330 12:13:52.057643 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8123204
2331 12:13:52.058297 JobError: Your job cannot terminate cleanly.