Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:09:03.350158 lava-dispatcher, installed at version: 2022.10
2 12:09:03.350351 start: 0 validate
3 12:09:03.350525 Start time: 2022-11-25 12:09:03.350505+00:00 (UTC)
4 12:09:03.350684 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:09:03.350815 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 12:09:03.363043 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:09:03.363173 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:09:03.376294 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:09:03.376881 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:09:03.388252 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:09:03.388889 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:09:03.413172 validate duration: 0.06
14 12:09:03.414507 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:09:03.415061 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:09:03.415520 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:09:03.415989 Not decompressing ramdisk as can be used compressed.
18 12:09:03.416421 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/initrd.cpio.gz
19 12:09:03.416753 saving as /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/ramdisk/initrd.cpio.gz
20 12:09:03.417067 total size: 5431606 (5MB)
21 12:09:03.446245 progress 0% (0MB)
22 12:09:03.492875 progress 5% (0MB)
23 12:09:03.514212 progress 10% (0MB)
24 12:09:03.540087 progress 15% (0MB)
25 12:09:03.577958 progress 20% (1MB)
26 12:09:03.600610 progress 25% (1MB)
27 12:09:03.624924 progress 30% (1MB)
28 12:09:03.651018 progress 35% (1MB)
29 12:09:03.687169 progress 40% (2MB)
30 12:09:03.712327 progress 45% (2MB)
31 12:09:03.735581 progress 50% (2MB)
32 12:09:03.764208 progress 55% (2MB)
33 12:09:03.789306 progress 60% (3MB)
34 12:09:03.819233 progress 65% (3MB)
35 12:09:03.857418 progress 70% (3MB)
36 12:09:03.881458 progress 75% (3MB)
37 12:09:03.908693 progress 80% (4MB)
38 12:09:03.938053 progress 85% (4MB)
39 12:09:03.971730 progress 90% (4MB)
40 12:09:03.996725 progress 95% (4MB)
41 12:09:04.025622 progress 100% (5MB)
42 12:09:04.026996 5MB downloaded in 0.61s (8.49MB/s)
43 12:09:04.027703 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:09:04.028970 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:09:04.029460 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:09:04.029913 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:09:04.030402 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:09:04.030744 saving as /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/kernel/bzImage
50 12:09:04.031057 total size: 7126928 (6MB)
51 12:09:04.031365 No compression specified
52 12:09:04.066875 progress 0% (0MB)
53 12:09:04.102870 progress 5% (0MB)
54 12:09:04.141694 progress 10% (0MB)
55 12:09:04.184671 progress 15% (1MB)
56 12:09:04.225346 progress 20% (1MB)
57 12:09:04.264322 progress 25% (1MB)
58 12:09:04.310426 progress 30% (2MB)
59 12:09:04.348473 progress 35% (2MB)
60 12:09:04.385938 progress 40% (2MB)
61 12:09:04.431791 progress 45% (3MB)
62 12:09:04.477085 progress 50% (3MB)
63 12:09:04.517605 progress 55% (3MB)
64 12:09:04.563609 progress 60% (4MB)
65 12:09:04.603639 progress 65% (4MB)
66 12:09:04.630300 progress 70% (4MB)
67 12:09:04.671911 progress 75% (5MB)
68 12:09:04.715605 progress 80% (5MB)
69 12:09:04.755448 progress 85% (5MB)
70 12:09:04.797936 progress 90% (6MB)
71 12:09:04.841663 progress 95% (6MB)
72 12:09:04.879585 progress 100% (6MB)
73 12:09:04.880696 6MB downloaded in 0.85s (8.00MB/s)
74 12:09:04.881471 end: 1.2.1 http-download (duration 00:00:01) [common]
76 12:09:04.882809 end: 1.2 download-retry (duration 00:00:01) [common]
77 12:09:04.883274 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:09:04.883722 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:09:04.884229 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/full.rootfs.tar.xz
80 12:09:04.884578 saving as /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/nfsrootfs/full.rootfs.tar
81 12:09:04.884897 total size: 133303528 (127MB)
82 12:09:04.885212 Using unxz to decompress xz
83 12:09:04.920828 progress 0% (0MB)
84 12:09:05.802255 progress 5% (6MB)
85 12:09:06.602494 progress 10% (12MB)
86 12:09:07.462974 progress 15% (19MB)
87 12:09:08.328923 progress 20% (25MB)
88 12:09:08.992163 progress 25% (31MB)
89 12:09:09.549984 progress 30% (38MB)
90 12:09:09.973023 progress 35% (44MB)
91 12:09:10.370105 progress 40% (50MB)
92 12:09:10.753965 progress 45% (57MB)
93 12:09:11.118618 progress 50% (63MB)
94 12:09:11.507798 progress 55% (69MB)
95 12:09:11.872252 progress 60% (76MB)
96 12:09:12.240080 progress 65% (82MB)
97 12:09:12.609710 progress 70% (89MB)
98 12:09:12.983643 progress 75% (95MB)
99 12:09:13.427637 progress 80% (101MB)
100 12:09:13.862332 progress 85% (108MB)
101 12:09:14.137630 progress 90% (114MB)
102 12:09:14.487792 progress 95% (120MB)
103 12:09:14.916154 progress 100% (127MB)
104 12:09:14.921155 127MB downloaded in 10.04s (12.67MB/s)
105 12:09:14.921486 end: 1.3.1 http-download (duration 00:00:10) [common]
107 12:09:14.921784 end: 1.3 download-retry (duration 00:00:10) [common]
108 12:09:14.921897 start: 1.4 download-retry (timeout 00:09:48) [common]
109 12:09:14.922049 start: 1.4.1 http-download (timeout 00:09:48) [common]
110 12:09:14.922215 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:09:14.922326 saving as /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/modules/modules.tar
112 12:09:14.922424 total size: 52100 (0MB)
113 12:09:14.922500 Using unxz to decompress xz
114 12:09:14.927693 progress 62% (0MB)
115 12:09:14.928108 progress 100% (0MB)
116 12:09:14.931532 0MB downloaded in 0.01s (5.46MB/s)
117 12:09:14.931880 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:09:14.932323 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:09:14.932469 start: 1.5 prepare-tftp-overlay (timeout 00:09:48) [common]
121 12:09:14.932627 start: 1.5.1 extract-nfsrootfs (timeout 00:09:48) [common]
122 12:09:16.222000 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8123212/extract-nfsrootfs-0wbyo45m
123 12:09:16.222230 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:09:16.222350 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
125 12:09:16.222503 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d
126 12:09:16.222622 makedir: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin
127 12:09:16.222722 makedir: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/tests
128 12:09:16.222821 makedir: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/results
129 12:09:16.222940 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-add-keys
130 12:09:16.223091 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-add-sources
131 12:09:16.223226 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-background-process-start
132 12:09:16.223361 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-background-process-stop
133 12:09:16.223493 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-common-functions
134 12:09:16.223623 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-echo-ipv4
135 12:09:16.223754 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-install-packages
136 12:09:16.223885 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-installed-packages
137 12:09:16.224015 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-os-build
138 12:09:16.224149 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-probe-channel
139 12:09:16.224280 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-probe-ip
140 12:09:16.224410 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-target-ip
141 12:09:16.224540 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-target-mac
142 12:09:16.224669 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-target-storage
143 12:09:16.224801 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-case
144 12:09:16.224932 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-event
145 12:09:16.225061 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-feedback
146 12:09:16.225190 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-raise
147 12:09:16.225318 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-reference
148 12:09:16.225485 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-runner
149 12:09:16.225616 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-set
150 12:09:16.225745 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-test-shell
151 12:09:16.225876 Updating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-install-packages (oe)
152 12:09:16.226010 Updating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/bin/lava-installed-packages (oe)
153 12:09:16.226125 Creating /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/environment
154 12:09:16.226226 LAVA metadata
155 12:09:16.226306 - LAVA_JOB_ID=8123212
156 12:09:16.226387 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:09:16.226508 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
158 12:09:16.226582 skipped lava-vland-overlay
159 12:09:16.226685 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:09:16.226787 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
161 12:09:16.226860 skipped lava-multinode-overlay
162 12:09:16.226961 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:09:16.227061 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
164 12:09:16.227147 Loading test definitions
165 12:09:16.227262 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
166 12:09:16.227348 Using /lava-8123212 at stage 0
167 12:09:16.227632 uuid=8123212_1.5.2.3.1 testdef=None
168 12:09:16.227736 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:09:16.227840 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
170 12:09:16.228333 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:09:16.228595 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
173 12:09:16.229183 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:09:16.229556 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
176 12:09:16.230120 runner path: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/0/tests/0_dmesg test_uuid 8123212_1.5.2.3.1
177 12:09:16.230283 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:09:16.230548 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:47) [common]
180 12:09:16.230632 Using /lava-8123212 at stage 1
181 12:09:16.230912 uuid=8123212_1.5.2.3.5 testdef=None
182 12:09:16.231015 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:09:16.231120 start: 1.5.2.3.6 test-overlay (timeout 00:09:47) [common]
184 12:09:16.231583 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:09:16.231840 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:47) [common]
187 12:09:16.232434 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:09:16.232704 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
190 12:09:16.233321 runner path: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/1/tests/1_bootrr test_uuid 8123212_1.5.2.3.5
191 12:09:16.233518 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:09:16.233757 Creating lava-test-runner.conf files
194 12:09:16.233859 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/0 for stage 0
195 12:09:16.233983 - 0_dmesg
196 12:09:16.234073 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123212/lava-overlay-znydha1d/lava-8123212/1 for stage 1
197 12:09:16.234177 - 1_bootrr
198 12:09:16.234288 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:09:16.234393 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
200 12:09:16.240152 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:09:16.240282 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:47) [common]
202 12:09:16.240391 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:09:16.240500 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:09:16.240606 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:47) [common]
205 12:09:16.344215 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:09:16.344565 start: 1.5.4 extract-modules (timeout 00:09:47) [common]
207 12:09:16.344696 extracting modules file /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123212/extract-nfsrootfs-0wbyo45m
208 12:09:16.348813 extracting modules file /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123212/extract-overlay-ramdisk-91zdeso4/ramdisk
209 12:09:16.352684 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:09:16.352811 start: 1.5.5 apply-overlay-tftp (timeout 00:09:47) [common]
211 12:09:16.352907 [common] Applying overlay to NFS
212 12:09:16.352992 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123212/compress-overlay-8q06rmi5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8123212/extract-nfsrootfs-0wbyo45m
213 12:09:16.356880 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:09:16.357004 start: 1.5.6 configure-preseed-file (timeout 00:09:47) [common]
215 12:09:16.357110 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:09:16.357223 start: 1.5.7 compress-ramdisk (timeout 00:09:47) [common]
217 12:09:16.357316 Building ramdisk /var/lib/lava/dispatcher/tmp/8123212/extract-overlay-ramdisk-91zdeso4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8123212/extract-overlay-ramdisk-91zdeso4/ramdisk
218 12:09:16.390673 >> 24546 blocks
219 12:09:16.866302 rename /var/lib/lava/dispatcher/tmp/8123212/extract-overlay-ramdisk-91zdeso4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/ramdisk/ramdisk.cpio.gz
220 12:09:16.866749 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:09:16.866906 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
222 12:09:16.867090 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
223 12:09:16.867224 No mkimage arch provided, not using FIT.
224 12:09:16.867352 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:09:16.867472 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:09:16.867609 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:09:16.867739 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:47) [common]
228 12:09:16.867853 No LXC device requested
229 12:09:16.867969 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:09:16.868095 start: 1.7 deploy-device-env (timeout 00:09:47) [common]
231 12:09:16.868214 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:09:16.868316 Checking files for TFTP limit of 4294967296 bytes.
233 12:09:16.868790 end: 1 tftp-deploy (duration 00:00:13) [common]
234 12:09:16.868935 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:09:16.869064 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:09:16.869242 substitutions:
237 12:09:16.869340 - {DTB}: None
238 12:09:16.869464 - {INITRD}: 8123212/tftp-deploy-i5h3gqfk/ramdisk/ramdisk.cpio.gz
239 12:09:16.869571 - {KERNEL}: 8123212/tftp-deploy-i5h3gqfk/kernel/bzImage
240 12:09:16.869662 - {LAVA_MAC}: None
241 12:09:16.869750 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8123212/extract-nfsrootfs-0wbyo45m
242 12:09:16.869840 - {NFS_SERVER_IP}: 192.168.201.1
243 12:09:16.869929 - {PRESEED_CONFIG}: None
244 12:09:16.870014 - {PRESEED_LOCAL}: None
245 12:09:16.870098 - {RAMDISK}: 8123212/tftp-deploy-i5h3gqfk/ramdisk/ramdisk.cpio.gz
246 12:09:16.870184 - {ROOT_PART}: None
247 12:09:16.870268 - {ROOT}: None
248 12:09:16.870346 - {SERVER_IP}: 192.168.201.1
249 12:09:16.870407 - {TEE}: None
250 12:09:16.870480 Parsed boot commands:
251 12:09:16.870567 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:09:16.870778 Parsed boot commands: tftpboot 192.168.201.1 8123212/tftp-deploy-i5h3gqfk/kernel/bzImage 8123212/tftp-deploy-i5h3gqfk/kernel/cmdline 8123212/tftp-deploy-i5h3gqfk/ramdisk/ramdisk.cpio.gz
253 12:09:16.870915 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:09:16.871046 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:09:16.871182 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:09:16.871307 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:09:16.871412 Not connected, no need to disconnect.
258 12:09:16.871529 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:09:16.871656 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:09:16.871762 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
261 12:09:16.874875 Setting prompt string to ['lava-test: # ']
262 12:09:16.875166 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:09:16.875274 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:09:16.875375 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:09:16.875469 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:09:16.875651 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
267 12:09:16.895377 >> Command sent successfully.
268 12:09:16.897298 Returned 0 in 0 seconds
269 12:09:16.998069 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:09:16.998407 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:09:16.998512 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:09:16.998607 Setting prompt string to 'Starting depthcharge on Voema...'
274 12:09:16.998675 Changing prompt to 'Starting depthcharge on Voema...'
275 12:09:16.998749 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 12:09:16.999028 [Enter `^Ec?' for help]
277 12:09:24.801744
278 12:09:24.801916
279 12:09:24.811769 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 12:09:24.815361 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 12:09:24.822140 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 12:09:24.825248 CPU: AES supported, TXT NOT supported, VT supported
283 12:09:24.832207 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 12:09:24.835112 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 12:09:24.841810 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 12:09:24.844872 VBOOT: Loading verstage.
287 12:09:24.848491 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 12:09:24.854869 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 12:09:24.858150 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 12:09:24.868722 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 12:09:24.875647 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 12:09:24.875734
293 12:09:24.875800
294 12:09:24.888581 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 12:09:24.902414 Probing TPM: . done!
296 12:09:24.905773 TPM ready after 0 ms
297 12:09:24.909366 Connected to device vid:did:rid of 1ae0:0028:00
298 12:09:24.920193 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 12:09:24.926975 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 12:09:24.930767 Initialized TPM device CR50 revision 0
301 12:09:24.983124 tlcl_send_startup: Startup return code is 0
302 12:09:24.983333 TPM: setup succeeded
303 12:09:24.999352 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 12:09:25.012606 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 12:09:25.025855 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 12:09:25.035825 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 12:09:25.039213 Chrome EC: UHEPI supported
308 12:09:25.042659 Phase 1
309 12:09:25.045733 FMAP: area GBB found @ 1805000 (458752 bytes)
310 12:09:25.052562 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 12:09:25.056127
312 12:09:25.062622 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 12:09:25.068896 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 12:09:25.076137 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 12:09:25.078988 Recovery requested (1009000e)
316 12:09:25.082202 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 12:09:25.093960 tlcl_extend: response is 0
318 12:09:25.100384 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 12:09:25.110446 tlcl_extend: response is 0
320 12:09:25.117192 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 12:09:25.123784 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 12:09:25.130228 BS: verstage times (exec / console): total (unknown) / 142 ms
323 12:09:25.130321
324 12:09:25.130389
325 12:09:25.143331 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 12:09:25.150328 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 12:09:25.153478 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
328 12:09:25.156874 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
329 12:09:25.163267 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
330 12:09:25.166582 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
331 12:09:25.170231 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
332 12:09:25.173517 TCO_STS: 0000 0000
333 12:09:25.176686 GEN_PMCON: d0015038 00002200
334 12:09:25.179817 GBLRST_CAUSE: 00000000 00000000
335 12:09:25.179905 HPR_CAUSE0: 00000000
336 12:09:25.183158
337 12:09:25.183244 prev_sleep_state 5
338 12:09:25.187292 Boot Count incremented to 12232
339 12:09:25.193068 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 12:09:25.200040 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 12:09:25.210098 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 12:09:25.216023 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
343 12:09:25.219545 Chrome EC: UHEPI supported
344 12:09:25.226290 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
345 12:09:25.237661 Probing TPM: done!
346 12:09:25.245738 Connected to device vid:did:rid of 1ae0:0028:00
347 12:09:25.253451 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
348 12:09:25.262858 Initialized TPM device CR50 revision 0
349 12:09:25.272931 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
350 12:09:25.279366 MRC: Hash idx 0x100b comparison successful.
351 12:09:25.282769 MRC cache found, size faa8
352 12:09:25.282856 bootmode is set to: 2
353 12:09:25.286442 SPD index = 0
354 12:09:25.292846 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 12:09:25.296362 SPD: module type is LPDDR4X
356 12:09:25.302885 SPD: module part number is MT53E512M64D4NW-046
357 12:09:25.306285 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
358 12:09:25.312541 SPD: device width 16 bits, bus width 16 bits
359 12:09:25.315598 SPD: module size is 1024 MB (per channel)
360 12:09:25.749446 CBMEM:
361 12:09:25.753211 IMD: root @ 0x76fff000 254 entries.
362 12:09:25.756205 IMD: root @ 0x76ffec00 62 entries.
363 12:09:25.759434 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
364 12:09:25.766154 FMAP: area RW_VPD found @ f35000 (8192 bytes)
365 12:09:25.769661 External stage cache:
366 12:09:25.773226 IMD: root @ 0x7b3ff000 254 entries.
367 12:09:25.776479 IMD: root @ 0x7b3fec00 62 entries.
368 12:09:25.791524 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
369 12:09:25.798310 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 12:09:25.804519 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
371 12:09:25.818523 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 12:09:25.822583 cse_lite: Skip switching to RW in the recovery path
373 12:09:25.826256 8 DIMMs found
374 12:09:25.826342 SMM Memory Map
375 12:09:25.830062 SMRAM : 0x7b000000 0x800000
376 12:09:25.833296 Subregion 0: 0x7b000000 0x200000
377 12:09:25.836555 Subregion 1: 0x7b200000 0x200000
378 12:09:25.839801 Subregion 2: 0x7b400000 0x400000
379 12:09:25.843196 top_of_ram = 0x77000000
380 12:09:25.850183 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 12:09:25.853028 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 12:09:25.859858 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
383 12:09:25.863349 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 12:09:25.869669 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
385 12:09:25.876685 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
386 12:09:25.888307 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
387 12:09:25.891817 Processing 211 relocs. Offset value of 0x74c0b000
388 12:09:25.894761
389 12:09:25.901343 BS: romstage times (exec / console): total (unknown) / 277 ms
390 12:09:25.907556
391 12:09:25.907640
392 12:09:25.917593 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
393 12:09:25.920578 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
394 12:09:25.930751 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
395 12:09:25.937298 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
396 12:09:25.943781 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
397 12:09:25.950582 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
398 12:09:25.997666 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
399 12:09:26.004194 Processing 5008 relocs. Offset value of 0x75d98000
400 12:09:26.007282 BS: postcar times (exec / console): total (unknown) / 59 ms
401 12:09:26.007368
402 12:09:26.010624
403 12:09:26.010709
404 12:09:26.021093 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 12:09:26.021181 Normal boot
406 12:09:26.024690 FW_CONFIG value is 0x804c02
407 12:09:26.027545 PCI: 00:07.0 disabled by fw_config
408 12:09:26.031056 PCI: 00:07.1 disabled by fw_config
409 12:09:26.034722 PCI: 00:0d.2 disabled by fw_config
410 12:09:26.037989 PCI: 00:1c.7 disabled by fw_config
411 12:09:26.044031 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 12:09:26.050827 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:09:26.054343 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:09:26.057269 GENERIC: 0.0 disabled by fw_config
415 12:09:26.061195 GENERIC: 1.0 disabled by fw_config
416 12:09:26.067145 fw_config match found: DB_USB=USB3_ACTIVE
417 12:09:26.070983 fw_config match found: DB_USB=USB3_ACTIVE
418 12:09:26.074109 fw_config match found: DB_USB=USB3_ACTIVE
419 12:09:26.077468 fw_config match found: DB_USB=USB3_ACTIVE
420 12:09:26.080769
421 12:09:26.084691 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 12:09:26.090756 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 12:09:26.100918 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 12:09:26.107867 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 12:09:26.110718 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 12:09:26.117451 microcode: Update skipped, already up-to-date
427 12:09:26.123965 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 12:09:26.151817 Detected 4 core, 8 thread CPU.
429 12:09:26.154740 Setting up SMI for CPU
430 12:09:26.158274 IED base = 0x7b400000
431 12:09:26.158788 IED size = 0x00400000
432 12:09:26.161877 Will perform SMM setup.
433 12:09:26.167958 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 12:09:26.174579 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 12:09:26.181337 Processing 16 relocs. Offset value of 0x00030000
436 12:09:26.184614 Attempting to start 7 APs
437 12:09:26.188389 Waiting for 10ms after sending INIT.
438 12:09:26.203368 Waiting for 1st SIPI to complete...done.
439 12:09:26.203850 AP: slot 1 apic_id 1.
440 12:09:26.206781 AP: slot 3 apic_id 5.
441 12:09:26.210205 AP: slot 7 apic_id 4.
442 12:09:26.210643 AP: slot 5 apic_id 6.
443 12:09:26.213283 AP: slot 4 apic_id 7.
444 12:09:26.216499 AP: slot 6 apic_id 2.
445 12:09:26.216911 AP: slot 2 apic_id 3.
446 12:09:26.223834 Waiting for 2nd SIPI to complete...done.
447 12:09:26.230151 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 12:09:26.236881 Processing 13 relocs. Offset value of 0x00038000
449 12:09:26.237408 Unable to locate Global NVS
450 12:09:26.246629 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 12:09:26.249860 Installing permanent SMM handler to 0x7b000000
452 12:09:26.260186 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 12:09:26.263371 Processing 794 relocs. Offset value of 0x7b010000
454 12:09:26.273695 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 12:09:26.276334 Processing 13 relocs. Offset value of 0x7b008000
456 12:09:26.283242 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 12:09:26.289783 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 12:09:26.293531 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 12:09:26.299488 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 12:09:26.306334 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 12:09:26.313229 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 12:09:26.319673 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 12:09:26.320088 Unable to locate Global NVS
464 12:09:26.329570 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 12:09:26.332333 Clearing SMI status registers
466 12:09:26.332764 SMI_STS: PM1
467 12:09:26.335676 PM1_STS: PWRBTN
468 12:09:26.342659 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 12:09:26.346014 In relocation handler: CPU 0
470 12:09:26.349655 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 12:09:26.355715 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:09:26.356259 Relocation complete.
473 12:09:26.366068 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 12:09:26.366624 In relocation handler: CPU 1
475 12:09:26.369111
476 12:09:26.372543 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 12:09:26.373073 Relocation complete.
478 12:09:26.382377 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
479 12:09:26.382927 In relocation handler: CPU 4
480 12:09:26.389316 New SMBASE=0x7afff000 IEDBASE=0x7b400000
481 12:09:26.389907 Relocation complete.
482 12:09:26.399089 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 12:09:26.399635 In relocation handler: CPU 6
484 12:09:26.405709 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 12:09:26.409044 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 12:09:26.412283 Relocation complete.
487 12:09:26.419259 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 12:09:26.422244 In relocation handler: CPU 2
489 12:09:26.425211 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 12:09:26.428667 Relocation complete.
491 12:09:26.435849 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
492 12:09:26.438666 In relocation handler: CPU 5
493 12:09:26.442055 New SMBASE=0x7affec00 IEDBASE=0x7b400000
494 12:09:26.449040 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 12:09:26.449570 Relocation complete.
496 12:09:26.455483 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
497 12:09:26.459169 In relocation handler: CPU 7
498 12:09:26.462036 New SMBASE=0x7affe400 IEDBASE=0x7b400000
499 12:09:26.469027 Writing SMRR. base = 0x7b000006, mask=0xff800c00
500 12:09:26.472321 Relocation complete.
501 12:09:26.478604 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
502 12:09:26.482271 In relocation handler: CPU 3
503 12:09:26.485395 New SMBASE=0x7afff400 IEDBASE=0x7b400000
504 12:09:26.489819 Relocation complete.
505 12:09:26.490346 Initializing CPU #0
506 12:09:26.493259 CPU: vendor Intel device 806c1
507 12:09:26.496446 CPU: family 06, model 8c, stepping 01
508 12:09:26.500011 Clearing out pending MCEs
509 12:09:26.503742 Setting up local APIC...
510 12:09:26.504150 apic_id: 0x00 done.
511 12:09:26.506382 Turbo is available but hidden
512 12:09:26.510255 Turbo is available and visible
513 12:09:26.513646 microcode: Update skipped, already up-to-date
514 12:09:26.517309 CPU #0 initialized
515 12:09:26.519892 Initializing CPU #6
516 12:09:26.520355 Initializing CPU #2
517 12:09:26.523580 CPU: vendor Intel device 806c1
518 12:09:26.526597 CPU: family 06, model 8c, stepping 01
519 12:09:26.530072 CPU: vendor Intel device 806c1
520 12:09:26.533918 CPU: family 06, model 8c, stepping 01
521 12:09:26.536793 Clearing out pending MCEs
522 12:09:26.540182 Clearing out pending MCEs
523 12:09:26.543657 Setting up local APIC...
524 12:09:26.544170 Initializing CPU #3
525 12:09:26.547143 Initializing CPU #7
526 12:09:26.550701 CPU: vendor Intel device 806c1
527 12:09:26.553469 CPU: family 06, model 8c, stepping 01
528 12:09:26.556515 Setting up local APIC...
529 12:09:26.559760 Initializing CPU #4
530 12:09:26.560270 Initializing CPU #5
531 12:09:26.563385 CPU: vendor Intel device 806c1
532 12:09:26.566695 CPU: family 06, model 8c, stepping 01
533 12:09:26.570189 CPU: vendor Intel device 806c1
534 12:09:26.573595 CPU: family 06, model 8c, stepping 01
535 12:09:26.576677 Clearing out pending MCEs
536 12:09:26.579946 Clearing out pending MCEs
537 12:09:26.583284 Setting up local APIC...
538 12:09:26.583758 Initializing CPU #1
539 12:09:26.586315 CPU: vendor Intel device 806c1
540 12:09:26.590185 CPU: family 06, model 8c, stepping 01
541 12:09:26.593174 Clearing out pending MCEs
542 12:09:26.596824 Clearing out pending MCEs
543 12:09:26.600010 Setting up local APIC...
544 12:09:26.600564 apic_id: 0x02 done.
545 12:09:26.603091 apic_id: 0x03 done.
546 12:09:26.606791 microcode: Update skipped, already up-to-date
547 12:09:26.613038 microcode: Update skipped, already up-to-date
548 12:09:26.613637 CPU #6 initialized
549 12:09:26.616379 CPU #2 initialized
550 12:09:26.619717 CPU: vendor Intel device 806c1
551 12:09:26.622856 CPU: family 06, model 8c, stepping 01
552 12:09:26.626362 Setting up local APIC...
553 12:09:26.629919 Setting up local APIC...
554 12:09:26.630379 apic_id: 0x07 done.
555 12:09:26.633027 apic_id: 0x06 done.
556 12:09:26.636179 microcode: Update skipped, already up-to-date
557 12:09:26.643268 microcode: Update skipped, already up-to-date
558 12:09:26.643786 CPU #4 initialized
559 12:09:26.645945 CPU #5 initialized
560 12:09:26.650034 Clearing out pending MCEs
561 12:09:26.650575 apic_id: 0x04 done.
562 12:09:26.652700 apic_id: 0x05 done.
563 12:09:26.656992 microcode: Update skipped, already up-to-date
564 12:09:26.662943 microcode: Update skipped, already up-to-date
565 12:09:26.663477 CPU #7 initialized
566 12:09:26.665884 Setting up local APIC...
567 12:09:26.669394 CPU #3 initialized
568 12:09:26.670018 apic_id: 0x01 done.
569 12:09:26.676102 microcode: Update skipped, already up-to-date
570 12:09:26.676539 CPU #1 initialized
571 12:09:26.682585 bsp_do_flight_plan done after 455 msecs.
572 12:09:26.682984 CPU: frequency set to 4000 MHz
573 12:09:26.686173
574 12:09:26.686574 Enabling SMIs.
575 12:09:26.693051 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
576 12:09:26.708216 SATAXPCIE1 indicates PCIe NVMe is present
577 12:09:26.712007 Probing TPM: done!
578 12:09:26.715102 Connected to device vid:did:rid of 1ae0:0028:00
579 12:09:26.725704 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
580 12:09:26.729028 Initialized TPM device CR50 revision 0
581 12:09:26.732730 Enabling S0i3.4
582 12:09:26.738695 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
583 12:09:26.742922 Found a VBT of 8704 bytes after decompression
584 12:09:26.748604 cse_lite: CSE RO boot. HybridStorageMode disabled
585 12:09:26.755561 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
586 12:09:26.831030 FSPS returned 0
587 12:09:26.833749 Executing Phase 1 of FspMultiPhaseSiInit
588 12:09:26.844021 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
589 12:09:26.847011 port C0 DISC req: usage 1 usb3 1 usb2 5
590 12:09:26.850668 Raw Buffer output 0 00000511
591 12:09:26.854224 Raw Buffer output 1 00000000
592 12:09:26.858071 pmc_send_ipc_cmd succeeded
593 12:09:26.861261 port C1 DISC req: usage 1 usb3 2 usb2 3
594 12:09:26.864282
595 12:09:26.864730 Raw Buffer output 0 00000321
596 12:09:26.867697 Raw Buffer output 1 00000000
597 12:09:26.871527 pmc_send_ipc_cmd succeeded
598 12:09:26.876985 Detected 4 core, 8 thread CPU.
599 12:09:26.880727 Detected 4 core, 8 thread CPU.
600 12:09:27.113867 Display FSP Version Info HOB
601 12:09:27.117557 Reference Code - CPU = a.0.4c.31
602 12:09:27.120058 uCode Version = 0.0.0.86
603 12:09:27.123770 TXT ACM version = ff.ff.ff.ffff
604 12:09:27.126963 Reference Code - ME = a.0.4c.31
605 12:09:27.130172 MEBx version = 0.0.0.0
606 12:09:27.133298 ME Firmware Version = Consumer SKU
607 12:09:27.136953 Reference Code - PCH = a.0.4c.31
608 12:09:27.140626 PCH-CRID Status = Disabled
609 12:09:27.143767 PCH-CRID Original Value = ff.ff.ff.ffff
610 12:09:27.147165 PCH-CRID New Value = ff.ff.ff.ffff
611 12:09:27.150742 OPROM - RST - RAID = ff.ff.ff.ffff
612 12:09:27.153564 PCH Hsio Version = 4.0.0.0
613 12:09:27.156990 Reference Code - SA - System Agent = a.0.4c.31
614 12:09:27.160588 Reference Code - MRC = 2.0.0.1
615 12:09:27.163551 SA - PCIe Version = a.0.4c.31
616 12:09:27.166983 SA-CRID Status = Disabled
617 12:09:27.170229 SA-CRID Original Value = 0.0.0.1
618 12:09:27.173874 SA-CRID New Value = 0.0.0.1
619 12:09:27.177245 OPROM - VBIOS = ff.ff.ff.ffff
620 12:09:27.181083 IO Manageability Engine FW Version = 11.1.4.0
621 12:09:27.184357 PHY Build Version = 0.0.0.e0
622 12:09:27.187101 Thunderbolt(TM) FW Version = 0.0.0.0
623 12:09:27.194037 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
624 12:09:27.198034 ITSS IRQ Polarities Before:
625 12:09:27.198575 IPC0: 0xffffffff
626 12:09:27.200783 IPC1: 0xffffffff
627 12:09:27.201318 IPC2: 0xffffffff
628 12:09:27.204286 IPC3: 0xffffffff
629 12:09:27.207497 ITSS IRQ Polarities After:
630 12:09:27.208043 IPC0: 0xffffffff
631 12:09:27.210360 IPC1: 0xffffffff
632 12:09:27.210794 IPC2: 0xffffffff
633 12:09:27.213845 IPC3: 0xffffffff
634 12:09:27.217485 Found PCIe Root Port #9 at PCI: 00:1d.0.
635 12:09:27.230431 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
636 12:09:27.240166 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
637 12:09:27.253809 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
638 12:09:27.260791 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
639 12:09:27.261329 Enumerating buses...
640 12:09:27.267132 Show all devs... Before device enumeration.
641 12:09:27.267680 Root Device: enabled 1
642 12:09:27.270532 DOMAIN: 0000: enabled 1
643 12:09:27.274231 CPU_CLUSTER: 0: enabled 1
644 12:09:27.276978 PCI: 00:00.0: enabled 1
645 12:09:27.277554 PCI: 00:02.0: enabled 1
646 12:09:27.280351 PCI: 00:04.0: enabled 1
647 12:09:27.283667 PCI: 00:05.0: enabled 1
648 12:09:27.287128 PCI: 00:06.0: enabled 0
649 12:09:27.287571 PCI: 00:07.0: enabled 0
650 12:09:27.290281 PCI: 00:07.1: enabled 0
651 12:09:27.293296 PCI: 00:07.2: enabled 0
652 12:09:27.296635 PCI: 00:07.3: enabled 0
653 12:09:27.297064 PCI: 00:08.0: enabled 1
654 12:09:27.299924 PCI: 00:09.0: enabled 0
655 12:09:27.303836 PCI: 00:0a.0: enabled 0
656 12:09:27.304266 PCI: 00:0d.0: enabled 1
657 12:09:27.306511
658 12:09:27.306942 PCI: 00:0d.1: enabled 0
659 12:09:27.310532 PCI: 00:0d.2: enabled 0
660 12:09:27.313267 PCI: 00:0d.3: enabled 0
661 12:09:27.313791 PCI: 00:0e.0: enabled 0
662 12:09:27.317066 PCI: 00:10.2: enabled 1
663 12:09:27.320232 PCI: 00:10.6: enabled 0
664 12:09:27.323527 PCI: 00:10.7: enabled 0
665 12:09:27.323987 PCI: 00:12.0: enabled 0
666 12:09:27.326890 PCI: 00:12.6: enabled 0
667 12:09:27.330016 PCI: 00:13.0: enabled 0
668 12:09:27.333200 PCI: 00:14.0: enabled 1
669 12:09:27.333662 PCI: 00:14.1: enabled 0
670 12:09:27.336907 PCI: 00:14.2: enabled 1
671 12:09:27.339603 PCI: 00:14.3: enabled 1
672 12:09:27.343830 PCI: 00:15.0: enabled 1
673 12:09:27.344371 PCI: 00:15.1: enabled 1
674 12:09:27.346611 PCI: 00:15.2: enabled 1
675 12:09:27.350108 PCI: 00:15.3: enabled 1
676 12:09:27.350810 PCI: 00:16.0: enabled 1
677 12:09:27.353514
678 12:09:27.354063 PCI: 00:16.1: enabled 0
679 12:09:27.356351 PCI: 00:16.2: enabled 0
680 12:09:27.360045 PCI: 00:16.3: enabled 0
681 12:09:27.360586 PCI: 00:16.4: enabled 0
682 12:09:27.363949 PCI: 00:16.5: enabled 0
683 12:09:27.367471 PCI: 00:17.0: enabled 1
684 12:09:27.369991 PCI: 00:19.0: enabled 0
685 12:09:27.370431 PCI: 00:19.1: enabled 1
686 12:09:27.373102 PCI: 00:19.2: enabled 0
687 12:09:27.376710 PCI: 00:1c.0: enabled 1
688 12:09:27.380400 PCI: 00:1c.1: enabled 0
689 12:09:27.380939 PCI: 00:1c.2: enabled 0
690 12:09:27.383396 PCI: 00:1c.3: enabled 0
691 12:09:27.386447 PCI: 00:1c.4: enabled 0
692 12:09:27.386886 PCI: 00:1c.5: enabled 0
693 12:09:27.389739
694 12:09:27.390184 PCI: 00:1c.6: enabled 1
695 12:09:27.392892 PCI: 00:1c.7: enabled 0
696 12:09:27.396699 PCI: 00:1d.0: enabled 1
697 12:09:27.397251 PCI: 00:1d.1: enabled 0
698 12:09:27.400004 PCI: 00:1d.2: enabled 1
699 12:09:27.403376 PCI: 00:1d.3: enabled 0
700 12:09:27.407044 PCI: 00:1e.0: enabled 1
701 12:09:27.407591 PCI: 00:1e.1: enabled 0
702 12:09:27.410024 PCI: 00:1e.2: enabled 1
703 12:09:27.413254 PCI: 00:1e.3: enabled 1
704 12:09:27.416372 PCI: 00:1f.0: enabled 1
705 12:09:27.416912 PCI: 00:1f.1: enabled 0
706 12:09:27.420594 PCI: 00:1f.2: enabled 1
707 12:09:27.423216 PCI: 00:1f.3: enabled 1
708 12:09:27.423660 PCI: 00:1f.4: enabled 0
709 12:09:27.426964
710 12:09:27.427406 PCI: 00:1f.5: enabled 1
711 12:09:27.430080 PCI: 00:1f.6: enabled 0
712 12:09:27.433371 PCI: 00:1f.7: enabled 0
713 12:09:27.433829 APIC: 00: enabled 1
714 12:09:27.436743 GENERIC: 0.0: enabled 1
715 12:09:27.440076 GENERIC: 0.0: enabled 1
716 12:09:27.443703 GENERIC: 1.0: enabled 1
717 12:09:27.444246 GENERIC: 0.0: enabled 1
718 12:09:27.446792 GENERIC: 1.0: enabled 1
719 12:09:27.450305 USB0 port 0: enabled 1
720 12:09:27.450870 GENERIC: 0.0: enabled 1
721 12:09:27.453495 USB0 port 0: enabled 1
722 12:09:27.456650 GENERIC: 0.0: enabled 1
723 12:09:27.460271 I2C: 00:1a: enabled 1
724 12:09:27.460827 I2C: 00:31: enabled 1
725 12:09:27.463256 I2C: 00:32: enabled 1
726 12:09:27.466903 I2C: 00:10: enabled 1
727 12:09:27.467465 I2C: 00:15: enabled 1
728 12:09:27.470040 GENERIC: 0.0: enabled 0
729 12:09:27.473304 GENERIC: 1.0: enabled 0
730 12:09:27.473898 GENERIC: 0.0: enabled 1
731 12:09:27.476726 SPI: 00: enabled 1
732 12:09:27.479825 SPI: 00: enabled 1
733 12:09:27.480392 PNP: 0c09.0: enabled 1
734 12:09:27.482868 GENERIC: 0.0: enabled 1
735 12:09:27.486377 USB3 port 0: enabled 1
736 12:09:27.486830 USB3 port 1: enabled 1
737 12:09:27.489773
738 12:09:27.490225 USB3 port 2: enabled 0
739 12:09:27.493465 USB3 port 3: enabled 0
740 12:09:27.496152 USB2 port 0: enabled 0
741 12:09:27.496604 USB2 port 1: enabled 1
742 12:09:27.500045 USB2 port 2: enabled 1
743 12:09:27.503318 USB2 port 3: enabled 0
744 12:09:27.503778 USB2 port 4: enabled 1
745 12:09:27.506461 USB2 port 5: enabled 0
746 12:09:27.509547 USB2 port 6: enabled 0
747 12:09:27.512897 USB2 port 7: enabled 0
748 12:09:27.513348 USB2 port 8: enabled 0
749 12:09:27.516116 USB2 port 9: enabled 0
750 12:09:27.519482 USB3 port 0: enabled 0
751 12:09:27.519935 USB3 port 1: enabled 1
752 12:09:27.522748 USB3 port 2: enabled 0
753 12:09:27.526044 USB3 port 3: enabled 0
754 12:09:27.529520 GENERIC: 0.0: enabled 1
755 12:09:27.529974 GENERIC: 1.0: enabled 1
756 12:09:27.533036 APIC: 01: enabled 1
757 12:09:27.533517 APIC: 03: enabled 1
758 12:09:27.536125
759 12:09:27.536577 APIC: 05: enabled 1
760 12:09:27.539211 APIC: 07: enabled 1
761 12:09:27.539662 APIC: 06: enabled 1
762 12:09:27.542561 APIC: 02: enabled 1
763 12:09:27.546337 APIC: 04: enabled 1
764 12:09:27.546799 Compare with tree...
765 12:09:27.549789 Root Device: enabled 1
766 12:09:27.553146 DOMAIN: 0000: enabled 1
767 12:09:27.553751 PCI: 00:00.0: enabled 1
768 12:09:27.555993
769 12:09:27.556452 PCI: 00:02.0: enabled 1
770 12:09:27.559922 PCI: 00:04.0: enabled 1
771 12:09:27.563291 GENERIC: 0.0: enabled 1
772 12:09:27.566448 PCI: 00:05.0: enabled 1
773 12:09:27.567000 PCI: 00:06.0: enabled 0
774 12:09:27.569579
775 12:09:27.570141 PCI: 00:07.0: enabled 0
776 12:09:27.572936 GENERIC: 0.0: enabled 1
777 12:09:27.576293 PCI: 00:07.1: enabled 0
778 12:09:27.579705 GENERIC: 1.0: enabled 1
779 12:09:27.582845 PCI: 00:07.2: enabled 0
780 12:09:27.583403 GENERIC: 0.0: enabled 1
781 12:09:27.586124 PCI: 00:07.3: enabled 0
782 12:09:27.589437 GENERIC: 1.0: enabled 1
783 12:09:27.592450 PCI: 00:08.0: enabled 1
784 12:09:27.596106 PCI: 00:09.0: enabled 0
785 12:09:27.596658 PCI: 00:0a.0: enabled 0
786 12:09:27.599358 PCI: 00:0d.0: enabled 1
787 12:09:27.602955 USB0 port 0: enabled 1
788 12:09:27.606219 USB3 port 0: enabled 1
789 12:09:27.609509 USB3 port 1: enabled 1
790 12:09:27.610067 USB3 port 2: enabled 0
791 12:09:27.612695 USB3 port 3: enabled 0
792 12:09:27.616441 PCI: 00:0d.1: enabled 0
793 12:09:27.619188 PCI: 00:0d.2: enabled 0
794 12:09:27.622923 GENERIC: 0.0: enabled 1
795 12:09:27.623494 PCI: 00:0d.3: enabled 0
796 12:09:27.625684 PCI: 00:0e.0: enabled 0
797 12:09:27.629147 PCI: 00:10.2: enabled 1
798 12:09:27.632671 PCI: 00:10.6: enabled 0
799 12:09:27.636466 PCI: 00:10.7: enabled 0
800 12:09:27.637023 PCI: 00:12.0: enabled 0
801 12:09:27.639473 PCI: 00:12.6: enabled 0
802 12:09:27.642384 PCI: 00:13.0: enabled 0
803 12:09:27.646116 PCI: 00:14.0: enabled 1
804 12:09:27.649208 USB0 port 0: enabled 1
805 12:09:27.649812 USB2 port 0: enabled 0
806 12:09:27.652995 USB2 port 1: enabled 1
807 12:09:27.655946 USB2 port 2: enabled 1
808 12:09:27.658992 USB2 port 3: enabled 0
809 12:09:27.662512 USB2 port 4: enabled 1
810 12:09:27.666240 USB2 port 5: enabled 0
811 12:09:27.666814 USB2 port 6: enabled 0
812 12:09:27.668943 USB2 port 7: enabled 0
813 12:09:27.672996 USB2 port 8: enabled 0
814 12:09:27.675876 USB2 port 9: enabled 0
815 12:09:27.679019 USB3 port 0: enabled 0
816 12:09:27.679482 USB3 port 1: enabled 1
817 12:09:27.682407 USB3 port 2: enabled 0
818 12:09:27.685677 USB3 port 3: enabled 0
819 12:09:27.688991 PCI: 00:14.1: enabled 0
820 12:09:27.692573 PCI: 00:14.2: enabled 1
821 12:09:27.693028 PCI: 00:14.3: enabled 1
822 12:09:27.695435
823 12:09:27.695889 GENERIC: 0.0: enabled 1
824 12:09:27.698974 PCI: 00:15.0: enabled 1
825 12:09:27.702573 I2C: 00:1a: enabled 1
826 12:09:27.705752 I2C: 00:31: enabled 1
827 12:09:27.706308 I2C: 00:32: enabled 1
828 12:09:27.709006 PCI: 00:15.1: enabled 1
829 12:09:27.712296 I2C: 00:10: enabled 1
830 12:09:27.715597 PCI: 00:15.2: enabled 1
831 12:09:27.719068 PCI: 00:15.3: enabled 1
832 12:09:27.719521 PCI: 00:16.0: enabled 1
833 12:09:27.721941 PCI: 00:16.1: enabled 0
834 12:09:27.725916 PCI: 00:16.2: enabled 0
835 12:09:27.729108 PCI: 00:16.3: enabled 0
836 12:09:27.729607 PCI: 00:16.4: enabled 0
837 12:09:27.732828
838 12:09:27.733301 PCI: 00:16.5: enabled 0
839 12:09:27.736816 PCI: 00:17.0: enabled 1
840 12:09:27.740562 PCI: 00:19.0: enabled 0
841 12:09:27.741019 PCI: 00:19.1: enabled 1
842 12:09:27.743554 I2C: 00:15: enabled 1
843 12:09:27.747384 PCI: 00:19.2: enabled 0
844 12:09:27.750213 PCI: 00:1d.0: enabled 1
845 12:09:27.750668 GENERIC: 0.0: enabled 1
846 12:09:27.753511 PCI: 00:1e.0: enabled 1
847 12:09:27.757090 PCI: 00:1e.1: enabled 0
848 12:09:27.760468 PCI: 00:1e.2: enabled 1
849 12:09:27.761040 SPI: 00: enabled 1
850 12:09:27.764011 PCI: 00:1e.3: enabled 1
851 12:09:27.767180 SPI: 00: enabled 1
852 12:09:27.770557 PCI: 00:1f.0: enabled 1
853 12:09:27.771122 PNP: 0c09.0: enabled 1
854 12:09:27.822098
855 12:09:27.822678 PCI: 00:1f.1: enabled 0
856 12:09:27.823142 PCI: 00:1f.2: enabled 1
857 12:09:27.823954 GENERIC: 0.0: enabled 1
858 12:09:27.824333 GENERIC: 0.0: enabled 1
859 12:09:27.824756 GENERIC: 1.0: enabled 1
860 12:09:27.825166 PCI: 00:1f.3: enabled 1
861 12:09:27.825606 PCI: 00:1f.4: enabled 0
862 12:09:27.826050 PCI: 00:1f.5: enabled 1
863 12:09:27.826536 PCI: 00:1f.6: enabled 0
864 12:09:27.826870 PCI: 00:1f.7: enabled 0
865 12:09:27.827178 CPU_CLUSTER: 0: enabled 1
866 12:09:27.827484 APIC: 00: enabled 1
867 12:09:27.827810 APIC: 01: enabled 1
868 12:09:27.828104 APIC: 03: enabled 1
869 12:09:27.828394 APIC: 05: enabled 1
870 12:09:27.828681 APIC: 07: enabled 1
871 12:09:27.828964 APIC: 06: enabled 1
872 12:09:27.829253 APIC: 02: enabled 1
873 12:09:27.829584 APIC: 04: enabled 1
874 12:09:27.829900 Root Device scanning...
875 12:09:27.872503
876 12:09:27.873043 scan_static_bus for Root Device
877 12:09:27.873438 DOMAIN: 0000 enabled
878 12:09:27.874144 CPU_CLUSTER: 0 enabled
879 12:09:27.874497 DOMAIN: 0000 scanning...
880 12:09:27.874818 PCI: pci_scan_bus for bus 00
881 12:09:27.875129 PCI: 00:00.0 [8086/0000] ops
882 12:09:27.875428 PCI: 00:00.0 [8086/9a12] enabled
883 12:09:27.875732 PCI: 00:02.0 [8086/0000] bus ops
884 12:09:27.876022 PCI: 00:02.0 [8086/9a40] enabled
885 12:09:27.876308 PCI: 00:04.0 [8086/0000] bus ops
886 12:09:27.876593 PCI: 00:04.0 [8086/9a03] enabled
887 12:09:27.876881 PCI: 00:05.0 [8086/9a19] enabled
888 12:09:27.877529 PCI: 00:07.0 [0000/0000] hidden
889 12:09:27.877859 PCI: 00:08.0 [8086/9a11] enabled
890 12:09:27.878160 PCI: 00:0a.0 [8086/9a0d] disabled
891 12:09:27.878454 PCI: 00:0d.0 [8086/0000] bus ops
892 12:09:27.917577 PCI: 00:0d.0 [8086/9a13] enabled
893 12:09:27.918124 PCI: 00:14.0 [8086/0000] bus ops
894 12:09:27.918841 PCI: 00:14.0 [8086/a0ed] enabled
895 12:09:27.919215 PCI: 00:14.2 [8086/a0ef] enabled
896 12:09:27.919536 PCI: 00:14.3 [8086/0000] bus ops
897 12:09:27.919849 PCI: 00:14.3 [8086/a0f0] enabled
898 12:09:27.920149 PCI: 00:15.0 [8086/0000] bus ops
899 12:09:27.920442 PCI: 00:15.0 [8086/a0e8] enabled
900 12:09:27.920733 PCI: 00:15.1 [8086/0000] bus ops
901 12:09:27.921022 PCI: 00:15.1 [8086/a0e9] enabled
902 12:09:27.921308 PCI: 00:15.2 [8086/0000] bus ops
903 12:09:27.922008 PCI: 00:15.2 [8086/a0ea] enabled
904 12:09:27.922350 PCI: 00:15.3 [8086/0000] bus ops
905 12:09:27.922649 PCI: 00:15.3 [8086/a0eb] enabled
906 12:09:27.922942 PCI: 00:16.0 [8086/0000] ops
907 12:09:27.925576 PCI: 00:16.0 [8086/a0e0] enabled
908 12:09:27.932521 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 12:09:27.935780 PCI: 00:19.0 [8086/0000] bus ops
910 12:09:27.938803 PCI: 00:19.0 [8086/a0c5] disabled
911 12:09:27.942455 PCI: 00:19.1 [8086/0000] bus ops
912 12:09:27.945867 PCI: 00:19.1 [8086/a0c6] enabled
913 12:09:27.949573 PCI: 00:1d.0 [8086/0000] bus ops
914 12:09:27.952565 PCI: 00:1d.0 [8086/a0b0] enabled
915 12:09:27.955323 PCI: 00:1e.0 [8086/0000] ops
916 12:09:27.958832 PCI: 00:1e.0 [8086/a0a8] enabled
917 12:09:27.962212 PCI: 00:1e.2 [8086/0000] bus ops
918 12:09:27.965509 PCI: 00:1e.2 [8086/a0aa] enabled
919 12:09:27.969468 PCI: 00:1e.3 [8086/0000] bus ops
920 12:09:27.972525 PCI: 00:1e.3 [8086/a0ab] enabled
921 12:09:27.975572 PCI: 00:1f.0 [8086/0000] bus ops
922 12:09:27.978679 PCI: 00:1f.0 [8086/a087] enabled
923 12:09:27.979129 RTC Init
924 12:09:27.982308 Set power on after power failure.
925 12:09:27.985935 Disabling Deep S3
926 12:09:27.986500 Disabling Deep S3
927 12:09:27.988487
928 12:09:27.988935 Disabling Deep S4
929 12:09:27.992090 Disabling Deep S4
930 12:09:27.992554 Disabling Deep S5
931 12:09:27.995295 Disabling Deep S5
932 12:09:27.998725 PCI: 00:1f.2 [0000/0000] hidden
933 12:09:28.001745 PCI: 00:1f.3 [8086/0000] bus ops
934 12:09:28.005223 PCI: 00:1f.3 [8086/a0c8] enabled
935 12:09:28.008542 PCI: 00:1f.5 [8086/0000] bus ops
936 12:09:28.012224 PCI: 00:1f.5 [8086/a0a4] enabled
937 12:09:28.015423 PCI: Leftover static devices:
938 12:09:28.015872 PCI: 00:10.2
939 12:09:28.016220 PCI: 00:10.6
940 12:09:28.018757 PCI: 00:10.7
941 12:09:28.019204 PCI: 00:06.0
942 12:09:28.021951 PCI: 00:07.1
943 12:09:28.022394 PCI: 00:07.2
944 12:09:28.025735 PCI: 00:07.3
945 12:09:28.026169 PCI: 00:09.0
946 12:09:28.026577 PCI: 00:0d.1
947 12:09:28.028634 PCI: 00:0d.2
948 12:09:28.028945 PCI: 00:0d.3
949 12:09:28.032046 PCI: 00:0e.0
950 12:09:28.032358 PCI: 00:12.0
951 12:09:28.032599 PCI: 00:12.6
952 12:09:28.034913 PCI: 00:13.0
953 12:09:28.035146 PCI: 00:14.1
954 12:09:28.038531 PCI: 00:16.1
955 12:09:28.038721 PCI: 00:16.2
956 12:09:28.038868 PCI: 00:16.3
957 12:09:28.041933 PCI: 00:16.4
958 12:09:28.042120 PCI: 00:16.5
959 12:09:28.045090 PCI: 00:17.0
960 12:09:28.045247 PCI: 00:19.2
961 12:09:28.048670 PCI: 00:1e.1
962 12:09:28.048804 PCI: 00:1f.1
963 12:09:28.048911 PCI: 00:1f.4
964 12:09:28.051493 PCI: 00:1f.6
965 12:09:28.051628 PCI: 00:1f.7
966 12:09:28.054943 PCI: Check your devicetree.cb.
967 12:09:28.058297 PCI: 00:02.0 scanning...
968 12:09:28.061785 scan_generic_bus for PCI: 00:02.0
969 12:09:28.064955 scan_generic_bus for PCI: 00:02.0 done
970 12:09:28.071502 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
971 12:09:28.071605 PCI: 00:04.0 scanning...
972 12:09:28.075026 scan_generic_bus for PCI: 00:04.0
973 12:09:28.078046 GENERIC: 0.0 enabled
974 12:09:28.084833 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
975 12:09:28.088206 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
976 12:09:28.091619 PCI: 00:0d.0 scanning...
977 12:09:28.094630 scan_static_bus for PCI: 00:0d.0
978 12:09:28.097929 USB0 port 0 enabled
979 12:09:28.101418 USB0 port 0 scanning...
980 12:09:28.104974 scan_static_bus for USB0 port 0
981 12:09:28.105093 USB3 port 0 enabled
982 12:09:28.108081 USB3 port 1 enabled
983 12:09:28.108170 USB3 port 2 disabled
984 12:09:28.111306
985 12:09:28.111398 USB3 port 3 disabled
986 12:09:28.114891 USB3 port 0 scanning...
987 12:09:28.117896 scan_static_bus for USB3 port 0
988 12:09:28.121273 scan_static_bus for USB3 port 0 done
989 12:09:28.124414 scan_bus: bus USB3 port 0 finished in 6 msecs
990 12:09:28.127751 USB3 port 1 scanning...
991 12:09:28.131188 scan_static_bus for USB3 port 1
992 12:09:28.134617 scan_static_bus for USB3 port 1 done
993 12:09:28.141047 scan_bus: bus USB3 port 1 finished in 6 msecs
994 12:09:28.144394 scan_static_bus for USB0 port 0 done
995 12:09:28.147900 scan_bus: bus USB0 port 0 finished in 43 msecs
996 12:09:28.151194 scan_static_bus for PCI: 00:0d.0 done
997 12:09:28.158105 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
998 12:09:28.161389 PCI: 00:14.0 scanning...
999 12:09:28.164640 scan_static_bus for PCI: 00:14.0
1000 12:09:28.164819 USB0 port 0 enabled
1001 12:09:28.168026 USB0 port 0 scanning...
1002 12:09:28.170942 scan_static_bus for USB0 port 0
1003 12:09:28.174528 USB2 port 0 disabled
1004 12:09:28.174642 USB2 port 1 enabled
1005 12:09:28.177800 USB2 port 2 enabled
1006 12:09:28.181059 USB2 port 3 disabled
1007 12:09:28.181195 USB2 port 4 enabled
1008 12:09:28.184510 USB2 port 5 disabled
1009 12:09:28.187682 USB2 port 6 disabled
1010 12:09:28.187845 USB2 port 7 disabled
1011 12:09:28.191165 USB2 port 8 disabled
1012 12:09:28.191317 USB2 port 9 disabled
1013 12:09:28.194107 USB3 port 0 disabled
1014 12:09:28.197754 USB3 port 1 enabled
1015 12:09:28.197978 USB3 port 2 disabled
1016 12:09:28.200861 USB3 port 3 disabled
1017 12:09:28.204549 USB2 port 1 scanning...
1018 12:09:28.207930 scan_static_bus for USB2 port 1
1019 12:09:28.211221 scan_static_bus for USB2 port 1 done
1020 12:09:28.214506 scan_bus: bus USB2 port 1 finished in 6 msecs
1021 12:09:28.217515 USB2 port 2 scanning...
1022 12:09:28.221063 scan_static_bus for USB2 port 2
1023 12:09:28.224620 scan_static_bus for USB2 port 2 done
1024 12:09:28.231038 scan_bus: bus USB2 port 2 finished in 6 msecs
1025 12:09:28.231477 USB2 port 4 scanning...
1026 12:09:28.234483 scan_static_bus for USB2 port 4
1027 12:09:28.238013 scan_static_bus for USB2 port 4 done
1028 12:09:28.244884 scan_bus: bus USB2 port 4 finished in 6 msecs
1029 12:09:28.247911 USB3 port 1 scanning...
1030 12:09:28.251418 scan_static_bus for USB3 port 1
1031 12:09:28.254396 scan_static_bus for USB3 port 1 done
1032 12:09:28.257901 scan_bus: bus USB3 port 1 finished in 6 msecs
1033 12:09:28.261143 scan_static_bus for USB0 port 0 done
1034 12:09:28.267851 scan_bus: bus USB0 port 0 finished in 93 msecs
1035 12:09:28.271126 scan_static_bus for PCI: 00:14.0 done
1036 12:09:28.274498 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1037 12:09:28.277917 PCI: 00:14.3 scanning...
1038 12:09:28.280669 scan_static_bus for PCI: 00:14.3
1039 12:09:28.284258 GENERIC: 0.0 enabled
1040 12:09:28.287831 scan_static_bus for PCI: 00:14.3 done
1041 12:09:28.290743 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1042 12:09:28.294406 PCI: 00:15.0 scanning...
1043 12:09:28.297587 scan_static_bus for PCI: 00:15.0
1044 12:09:28.301019 I2C: 00:1a enabled
1045 12:09:28.301487 I2C: 00:31 enabled
1046 12:09:28.304271 I2C: 00:32 enabled
1047 12:09:28.307780 scan_static_bus for PCI: 00:15.0 done
1048 12:09:28.311458 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1049 12:09:28.314395 PCI: 00:15.1 scanning...
1050 12:09:28.317919 scan_static_bus for PCI: 00:15.1
1051 12:09:28.321590 I2C: 00:10 enabled
1052 12:09:28.324521 scan_static_bus for PCI: 00:15.1 done
1053 12:09:28.327924 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1054 12:09:28.331464 PCI: 00:15.2 scanning...
1055 12:09:28.334605 scan_static_bus for PCI: 00:15.2
1056 12:09:28.338507 scan_static_bus for PCI: 00:15.2 done
1057 12:09:28.344623 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1058 12:09:28.345059 PCI: 00:15.3 scanning...
1059 12:09:28.348249
1060 12:09:28.351033 scan_static_bus for PCI: 00:15.3
1061 12:09:28.354899 scan_static_bus for PCI: 00:15.3 done
1062 12:09:28.357708 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1063 12:09:28.361019 PCI: 00:19.1 scanning...
1064 12:09:28.364509 scan_static_bus for PCI: 00:19.1
1065 12:09:28.368418 I2C: 00:15 enabled
1066 12:09:28.371502 scan_static_bus for PCI: 00:19.1 done
1067 12:09:28.374346 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1068 12:09:28.378007 PCI: 00:1d.0 scanning...
1069 12:09:28.381544 do_pci_scan_bridge for PCI: 00:1d.0
1070 12:09:28.384510 PCI: pci_scan_bus for bus 01
1071 12:09:28.388097 PCI: 01:00.0 [1c5c/174a] enabled
1072 12:09:28.391319 GENERIC: 0.0 enabled
1073 12:09:28.394626 Enabling Common Clock Configuration
1074 12:09:28.397521 L1 Sub-State supported from root port 29
1075 12:09:28.401318 L1 Sub-State Support = 0xf
1076 12:09:28.404566 CommonModeRestoreTime = 0x28
1077 12:09:28.407600 Power On Value = 0x16, Power On Scale = 0x0
1078 12:09:28.411056 ASPM: Enabled L1
1079 12:09:28.414274 PCIe: Max_Payload_Size adjusted to 128
1080 12:09:28.417924 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1081 12:09:28.420996 PCI: 00:1e.2 scanning...
1082 12:09:28.424427 scan_generic_bus for PCI: 00:1e.2
1083 12:09:28.427369 SPI: 00 enabled
1084 12:09:28.431055 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1085 12:09:28.437514 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1086 12:09:28.441050 PCI: 00:1e.3 scanning...
1087 12:09:28.444307 scan_generic_bus for PCI: 00:1e.3
1088 12:09:28.444879 SPI: 00 enabled
1089 12:09:28.451316 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1090 12:09:28.454380 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1091 12:09:28.457857 PCI: 00:1f.0 scanning...
1092 12:09:28.460613 scan_static_bus for PCI: 00:1f.0
1093 12:09:28.464274 PNP: 0c09.0 enabled
1094 12:09:28.467773 PNP: 0c09.0 scanning...
1095 12:09:28.471004 scan_static_bus for PNP: 0c09.0
1096 12:09:28.474059 scan_static_bus for PNP: 0c09.0 done
1097 12:09:28.477840 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1098 12:09:28.480736 scan_static_bus for PCI: 00:1f.0 done
1099 12:09:28.487358 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1100 12:09:28.490581 PCI: 00:1f.2 scanning...
1101 12:09:28.493996 scan_static_bus for PCI: 00:1f.2
1102 12:09:28.494436 GENERIC: 0.0 enabled
1103 12:09:28.497356 GENERIC: 0.0 scanning...
1104 12:09:28.501033 scan_static_bus for GENERIC: 0.0
1105 12:09:28.504208 GENERIC: 0.0 enabled
1106 12:09:28.504784 GENERIC: 1.0 enabled
1107 12:09:28.510558 scan_static_bus for GENERIC: 0.0 done
1108 12:09:28.514047 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1109 12:09:28.517000 scan_static_bus for PCI: 00:1f.2 done
1110 12:09:28.523773 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1111 12:09:28.524298 PCI: 00:1f.3 scanning...
1112 12:09:28.527288 scan_static_bus for PCI: 00:1f.3
1113 12:09:28.534083 scan_static_bus for PCI: 00:1f.3 done
1114 12:09:28.537392 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1115 12:09:28.540435 PCI: 00:1f.5 scanning...
1116 12:09:28.544003 scan_generic_bus for PCI: 00:1f.5
1117 12:09:28.547423 scan_generic_bus for PCI: 00:1f.5 done
1118 12:09:28.550772 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1119 12:09:28.557572 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1120 12:09:28.560319 scan_static_bus for Root Device done
1121 12:09:28.564178 scan_bus: bus Root Device finished in 737 msecs
1122 12:09:28.567142
1123 12:09:28.567730 done
1124 12:09:28.573928 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1125 12:09:28.576743 Chrome EC: UHEPI supported
1126 12:09:28.580134 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1127 12:09:28.586954 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1128 12:09:28.589852 SPI flash protection: WPSW=0 SRP0=0
1129 12:09:28.596777 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1130 12:09:28.603893 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1131 12:09:28.604454 found VGA at PCI: 00:02.0
1132 12:09:28.607142 Setting up VGA for PCI: 00:02.0
1133 12:09:28.613389 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1134 12:09:28.616499 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1135 12:09:28.619918 Allocating resources...
1136 12:09:28.623148 Reading resources...
1137 12:09:28.626578 Root Device read_resources bus 0 link: 0
1138 12:09:28.629983 DOMAIN: 0000 read_resources bus 0 link: 0
1139 12:09:28.637202 PCI: 00:04.0 read_resources bus 1 link: 0
1140 12:09:28.640605 PCI: 00:04.0 read_resources bus 1 link: 0 done
1141 12:09:28.647694 PCI: 00:0d.0 read_resources bus 0 link: 0
1142 12:09:28.650687 USB0 port 0 read_resources bus 0 link: 0
1143 12:09:28.657275 USB0 port 0 read_resources bus 0 link: 0 done
1144 12:09:28.661283 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1145 12:09:28.663977 PCI: 00:14.0 read_resources bus 0 link: 0
1146 12:09:28.667423
1147 12:09:28.670496 USB0 port 0 read_resources bus 0 link: 0
1148 12:09:28.677127 USB0 port 0 read_resources bus 0 link: 0 done
1149 12:09:28.680645 PCI: 00:14.0 read_resources bus 0 link: 0 done
1150 12:09:28.686845 PCI: 00:14.3 read_resources bus 0 link: 0
1151 12:09:28.690623 PCI: 00:14.3 read_resources bus 0 link: 0 done
1152 12:09:28.693408 PCI: 00:15.0 read_resources bus 0 link: 0
1153 12:09:28.701199 PCI: 00:15.0 read_resources bus 0 link: 0 done
1154 12:09:28.705256 PCI: 00:15.1 read_resources bus 0 link: 0
1155 12:09:28.711175 PCI: 00:15.1 read_resources bus 0 link: 0 done
1156 12:09:28.714328 PCI: 00:19.1 read_resources bus 0 link: 0
1157 12:09:28.717788
1158 12:09:28.721497 PCI: 00:19.1 read_resources bus 0 link: 0 done
1159 12:09:28.724277 PCI: 00:1d.0 read_resources bus 1 link: 0
1160 12:09:28.731430 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1161 12:09:28.734506 PCI: 00:1e.2 read_resources bus 2 link: 0
1162 12:09:28.741629 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1163 12:09:28.745015 PCI: 00:1e.3 read_resources bus 3 link: 0
1164 12:09:28.751892 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1165 12:09:28.754637 PCI: 00:1f.0 read_resources bus 0 link: 0
1166 12:09:28.761130 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1167 12:09:28.765178 PCI: 00:1f.2 read_resources bus 0 link: 0
1168 12:09:28.768125 GENERIC: 0.0 read_resources bus 0 link: 0
1169 12:09:28.775122 GENERIC: 0.0 read_resources bus 0 link: 0 done
1170 12:09:28.778483 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1171 12:09:28.785892 DOMAIN: 0000 read_resources bus 0 link: 0 done
1172 12:09:28.789031 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1173 12:09:28.795554 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1174 12:09:28.798852 Root Device read_resources bus 0 link: 0 done
1175 12:09:28.801940 Done reading resources.
1176 12:09:28.809079 Show resources in subtree (Root Device)...After reading.
1177 12:09:28.812340 Root Device child on link 0 DOMAIN: 0000
1178 12:09:28.815573 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1179 12:09:28.825539 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1180 12:09:28.835600 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1181 12:09:28.838612 PCI: 00:00.0
1182 12:09:28.845173 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1183 12:09:28.849086
1184 12:09:28.855346 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1185 12:09:28.865583 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1186 12:09:28.875192 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1187 12:09:28.885586 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1188 12:09:28.895232 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1189 12:09:28.902148 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 12:09:28.911833 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 12:09:28.922025 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 12:09:28.931690 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 12:09:28.941627 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 12:09:28.951298 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 12:09:28.958617 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 12:09:28.968193 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 12:09:28.977868 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 12:09:28.988014 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 12:09:28.997900 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 12:09:29.008308 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 12:09:29.014520 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1202 12:09:29.024713 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1203 12:09:29.027681 PCI: 00:02.0
1204 12:09:29.038099 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 12:09:29.047715 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1206 12:09:29.057711 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1207 12:09:29.061507 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1208 12:09:29.071334 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1209 12:09:29.074385 GENERIC: 0.0
1210 12:09:29.074969 PCI: 00:05.0
1211 12:09:29.084371 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1212 12:09:29.087687 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1213 12:09:29.090935
1214 12:09:29.091517 GENERIC: 0.0
1215 12:09:29.094273 PCI: 00:08.0
1216 12:09:29.103963 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 12:09:29.104538 PCI: 00:0a.0
1218 12:09:29.107521 PCI: 00:0d.0 child on link 0 USB0 port 0
1219 12:09:29.117565 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1220 12:09:29.124245 USB0 port 0 child on link 0 USB3 port 0
1221 12:09:29.124825 USB3 port 0
1222 12:09:29.127384 USB3 port 1
1223 12:09:29.127863 USB3 port 2
1224 12:09:29.130680 USB3 port 3
1225 12:09:29.134092 PCI: 00:14.0 child on link 0 USB0 port 0
1226 12:09:29.144041 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1227 12:09:29.147066 USB0 port 0 child on link 0 USB2 port 0
1228 12:09:29.150771
1229 12:09:29.151356 USB2 port 0
1230 12:09:29.154252 USB2 port 1
1231 12:09:29.154835 USB2 port 2
1232 12:09:29.157794 USB2 port 3
1233 12:09:29.158380 USB2 port 4
1234 12:09:29.160673 USB2 port 5
1235 12:09:29.161257 USB2 port 6
1236 12:09:29.164094 USB2 port 7
1237 12:09:29.164676 USB2 port 8
1238 12:09:29.167452 USB2 port 9
1239 12:09:29.168035 USB3 port 0
1240 12:09:29.171237 USB3 port 1
1241 12:09:29.171825 USB3 port 2
1242 12:09:29.174062 USB3 port 3
1243 12:09:29.174644 PCI: 00:14.2
1244 12:09:29.184068 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 12:09:29.193891 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1246 12:09:29.200676 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1247 12:09:29.210563 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1248 12:09:29.211147 GENERIC: 0.0
1249 12:09:29.217199 PCI: 00:15.0 child on link 0 I2C: 00:1a
1250 12:09:29.227041 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 12:09:29.227488 I2C: 00:1a
1252 12:09:29.227842 I2C: 00:31
1253 12:09:29.230738
1254 12:09:29.231178 I2C: 00:32
1255 12:09:29.233612 PCI: 00:15.1 child on link 0 I2C: 00:10
1256 12:09:29.243936 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:09:29.246974 I2C: 00:10
1258 12:09:29.247277 PCI: 00:15.2
1259 12:09:29.256747 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:09:29.260106 PCI: 00:15.3
1261 12:09:29.270378 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 12:09:29.270868 PCI: 00:16.0
1263 12:09:29.280506 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:09:29.284054 PCI: 00:19.0
1265 12:09:29.286945 PCI: 00:19.1 child on link 0 I2C: 00:15
1266 12:09:29.297155 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 12:09:29.297882 I2C: 00:15
1268 12:09:29.300334
1269 12:09:29.303641 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1270 12:09:29.310983 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1271 12:09:29.320538 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1272 12:09:29.330162 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1273 12:09:29.333498 GENERIC: 0.0
1274 12:09:29.333982 PCI: 01:00.0
1275 12:09:29.343325 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1276 12:09:29.353946 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1277 12:09:29.363311 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1278 12:09:29.363895 PCI: 00:1e.0
1279 12:09:29.376830 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1280 12:09:29.379853 PCI: 00:1e.2 child on link 0 SPI: 00
1281 12:09:29.389744 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1282 12:09:29.390339 SPI: 00
1283 12:09:29.392904 PCI: 00:1e.3 child on link 0 SPI: 00
1284 12:09:29.403134 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1285 12:09:29.406764 SPI: 00
1286 12:09:29.409730 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1287 12:09:29.419442 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1288 12:09:29.420014 PNP: 0c09.0
1289 12:09:29.429534 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1290 12:09:29.433092 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1291 12:09:29.442788 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1292 12:09:29.452888 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1293 12:09:29.456367 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1294 12:09:29.459524 GENERIC: 0.0
1295 12:09:29.460114 GENERIC: 1.0
1296 12:09:29.462591 PCI: 00:1f.3
1297 12:09:29.473104 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1298 12:09:29.482947 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1299 12:09:29.486226 PCI: 00:1f.5
1300 12:09:29.492851 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1301 12:09:29.499525 CPU_CLUSTER: 0 child on link 0 APIC: 00
1302 12:09:29.500114 APIC: 00
1303 12:09:29.500497 APIC: 01
1304 12:09:29.502583 APIC: 03
1305 12:09:29.503248 APIC: 05
1306 12:09:29.503641 APIC: 07
1307 12:09:29.505592 APIC: 06
1308 12:09:29.506112 APIC: 02
1309 12:09:29.509240 APIC: 04
1310 12:09:29.515748 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1311 12:09:29.522505 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1312 12:09:29.529310 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1313 12:09:29.532483 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1314 12:09:29.538886 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1315 12:09:29.542437 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1316 12:09:29.545547 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1317 12:09:29.552032 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1318 12:09:29.562228 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1319 12:09:29.568803 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1320 12:09:29.575610 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1321 12:09:29.582295 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1322 12:09:29.589088 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1323 12:09:29.595392 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1324 12:09:29.605374 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1325 12:09:29.609219 DOMAIN: 0000: Resource ranges:
1326 12:09:29.611934 * Base: 1000, Size: 800, Tag: 100
1327 12:09:29.615720 * Base: 1900, Size: e700, Tag: 100
1328 12:09:29.619248 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1329 12:09:29.622014
1330 12:09:29.625112 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1331 12:09:29.635435 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1332 12:09:29.641938 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1333 12:09:29.648496 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1334 12:09:29.655478 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1335 12:09:29.658397
1336 12:09:29.665172 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1337 12:09:29.671976 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1338 12:09:29.678194 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1339 12:09:29.688878 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1340 12:09:29.695087 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1341 12:09:29.701864 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1342 12:09:29.711497 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1343 12:09:29.717952 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1344 12:09:29.724547 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1345 12:09:29.734770 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1346 12:09:29.741097 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1347 12:09:29.748177 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1348 12:09:29.757914 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1349 12:09:29.764845 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1350 12:09:29.771355 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1351 12:09:29.781513 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1352 12:09:29.787602 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1353 12:09:29.794528 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1354 12:09:29.804361 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1355 12:09:29.808055 DOMAIN: 0000: Resource ranges:
1356 12:09:29.811258 * Base: 7fc00000, Size: 40400000, Tag: 200
1357 12:09:29.814252 * Base: d0000000, Size: 28000000, Tag: 200
1358 12:09:29.820995 * Base: fa000000, Size: 1000000, Tag: 200
1359 12:09:29.824517 * Base: fb001000, Size: 2fff000, Tag: 200
1360 12:09:29.827627 * Base: fe010000, Size: 2e000, Tag: 200
1361 12:09:29.831174 * Base: fe03f000, Size: d41000, Tag: 200
1362 12:09:29.837466 * Base: fed88000, Size: 8000, Tag: 200
1363 12:09:29.841081 * Base: fed93000, Size: d000, Tag: 200
1364 12:09:29.844460 * Base: feda2000, Size: 1e000, Tag: 200
1365 12:09:29.847694 * Base: fede0000, Size: 1220000, Tag: 200
1366 12:09:29.854330 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1367 12:09:29.861063 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1368 12:09:29.867497 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1369 12:09:29.874209 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1370 12:09:29.880817 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1371 12:09:29.887713 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1372 12:09:29.894239 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1373 12:09:29.900852 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1374 12:09:29.907646 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1375 12:09:29.914004 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1376 12:09:29.920837 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1377 12:09:29.927387 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1378 12:09:29.934070 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1379 12:09:29.940570 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1380 12:09:29.947143 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1381 12:09:29.954000 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1382 12:09:29.960374 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1383 12:09:29.967377 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1384 12:09:29.974201 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1385 12:09:29.980722 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1386 12:09:29.987443 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1387 12:09:29.994071 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1388 12:09:30.000318 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1389 12:09:30.006627 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1390 12:09:30.016671 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1391 12:09:30.020259 PCI: 00:1d.0: Resource ranges:
1392 12:09:30.023180 * Base: 7fc00000, Size: 100000, Tag: 200
1393 12:09:30.030065 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1394 12:09:30.036836 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1395 12:09:30.043271 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1396 12:09:30.049925 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1397 12:09:30.056895 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1398 12:09:30.060111
1399 12:09:30.063405 Root Device assign_resources, bus 0 link: 0
1400 12:09:30.066887 DOMAIN: 0000 assign_resources, bus 0 link: 0
1401 12:09:30.076690 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1402 12:09:30.083722 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1403 12:09:30.093366 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1404 12:09:30.099761 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1405 12:09:30.103441 PCI: 00:04.0 assign_resources, bus 1 link: 0
1406 12:09:30.110214 PCI: 00:04.0 assign_resources, bus 1 link: 0
1407 12:09:30.116596 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1408 12:09:30.126752 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1409 12:09:30.133349 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1410 12:09:30.139745 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1411 12:09:30.142877 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1412 12:09:30.152917 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1413 12:09:30.156341 PCI: 00:14.0 assign_resources, bus 0 link: 0
1414 12:09:30.159756 PCI: 00:14.0 assign_resources, bus 0 link: 0
1415 12:09:30.169449 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1416 12:09:30.176134 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1417 12:09:30.186377 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1418 12:09:30.189365 PCI: 00:14.3 assign_resources, bus 0 link: 0
1419 12:09:30.196041 PCI: 00:14.3 assign_resources, bus 0 link: 0
1420 12:09:30.202370 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1421 12:09:30.206030 PCI: 00:15.0 assign_resources, bus 0 link: 0
1422 12:09:30.212793 PCI: 00:15.0 assign_resources, bus 0 link: 0
1423 12:09:30.219167 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1424 12:09:30.225919 PCI: 00:15.1 assign_resources, bus 0 link: 0
1425 12:09:30.229315 PCI: 00:15.1 assign_resources, bus 0 link: 0
1426 12:09:30.239078 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1427 12:09:30.245800 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1428 12:09:30.255641 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1429 12:09:30.262554 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1430 12:09:30.265588 PCI: 00:19.1 assign_resources, bus 0 link: 0
1431 12:09:30.272009 PCI: 00:19.1 assign_resources, bus 0 link: 0
1432 12:09:30.278719 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1433 12:09:30.289622 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1434 12:09:30.298821 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1435 12:09:30.302085 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1436 12:09:30.312457 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1437 12:09:30.318828 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1438 12:09:30.328953 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1439 12:09:30.332270 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1440 12:09:30.341759 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1441 12:09:30.345138 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1442 12:09:30.348176 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1443 12:09:30.358908 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1444 12:09:30.362051 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1445 12:09:30.368096 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1446 12:09:30.371678 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1447 12:09:30.378507 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1448 12:09:30.381641 LPC: Trying to open IO window from 800 size 1ff
1449 12:09:30.391860 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1450 12:09:30.398078 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1451 12:09:30.404468 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1452 12:09:30.411463 DOMAIN: 0000 assign_resources, bus 0 link: 0
1453 12:09:30.414524 Root Device assign_resources, bus 0 link: 0
1454 12:09:30.417900 Done setting resources.
1455 12:09:30.424525 Show resources in subtree (Root Device)...After assigning values.
1456 12:09:30.427779 Root Device child on link 0 DOMAIN: 0000
1457 12:09:30.431487 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1458 12:09:30.435072
1459 12:09:30.441455 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1460 12:09:30.451024 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1461 12:09:30.454475 PCI: 00:00.0
1462 12:09:30.464724 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1463 12:09:30.474471 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1464 12:09:30.481266 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1465 12:09:30.491457 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1466 12:09:30.501154 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1467 12:09:30.511116 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1468 12:09:30.521236 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1469 12:09:30.527975 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1470 12:09:30.530752
1471 12:09:30.537593 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1472 12:09:30.547318 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1473 12:09:30.557202 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1474 12:09:30.567354 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1475 12:09:30.577546 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1476 12:09:30.583870 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1477 12:09:30.594108 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1478 12:09:30.603750 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1479 12:09:30.614052 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1480 12:09:30.624241 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1481 12:09:30.633998 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1482 12:09:30.643607 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1483 12:09:30.644115 PCI: 00:02.0
1484 12:09:30.654014 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1485 12:09:30.664118 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1486 12:09:30.666704
1487 12:09:30.673967 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1488 12:09:30.680200 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1489 12:09:30.689871 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1490 12:09:30.690438 GENERIC: 0.0
1491 12:09:30.693526 PCI: 00:05.0
1492 12:09:30.703144 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1493 12:09:30.706777 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1494 12:09:30.710106 GENERIC: 0.0
1495 12:09:30.710544 PCI: 00:08.0
1496 12:09:30.720045 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1497 12:09:30.723735
1498 12:09:30.724178 PCI: 00:0a.0
1499 12:09:30.726713 PCI: 00:0d.0 child on link 0 USB0 port 0
1500 12:09:30.736276 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1501 12:09:30.742968 USB0 port 0 child on link 0 USB3 port 0
1502 12:09:30.743430 USB3 port 0
1503 12:09:30.746829 USB3 port 1
1504 12:09:30.747273 USB3 port 2
1505 12:09:30.749707 USB3 port 3
1506 12:09:30.753755 PCI: 00:14.0 child on link 0 USB0 port 0
1507 12:09:30.763597 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1508 12:09:30.770012 USB0 port 0 child on link 0 USB2 port 0
1509 12:09:30.770560 USB2 port 0
1510 12:09:30.773078 USB2 port 1
1511 12:09:30.773621 USB2 port 2
1512 12:09:30.776977 USB2 port 3
1513 12:09:30.777599 USB2 port 4
1514 12:09:30.780027 USB2 port 5
1515 12:09:30.780513 USB2 port 6
1516 12:09:30.782929 USB2 port 7
1517 12:09:30.783409 USB2 port 8
1518 12:09:30.786724 USB2 port 9
1519 12:09:30.789774 USB3 port 0
1520 12:09:30.790215 USB3 port 1
1521 12:09:30.793261 USB3 port 2
1522 12:09:30.793838 USB3 port 3
1523 12:09:30.796496 PCI: 00:14.2
1524 12:09:30.806419 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1525 12:09:30.816361 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1526 12:09:30.820179 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1527 12:09:30.829762 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1528 12:09:30.833059 GENERIC: 0.0
1529 12:09:30.836685 PCI: 00:15.0 child on link 0 I2C: 00:1a
1530 12:09:30.846135 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1531 12:09:30.849589 I2C: 00:1a
1532 12:09:30.850076 I2C: 00:31
1533 12:09:30.852910 I2C: 00:32
1534 12:09:30.856466 PCI: 00:15.1 child on link 0 I2C: 00:10
1535 12:09:30.866535 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1536 12:09:30.869596 I2C: 00:10
1537 12:09:30.870190 PCI: 00:15.2
1538 12:09:30.879902 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1539 12:09:30.883060 PCI: 00:15.3
1540 12:09:30.893182 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1541 12:09:30.893822 PCI: 00:16.0
1542 12:09:30.902406 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1543 12:09:30.905963 PCI: 00:19.0
1544 12:09:30.909086 PCI: 00:19.1 child on link 0 I2C: 00:15
1545 12:09:30.919114 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1546 12:09:30.922308 I2C: 00:15
1547 12:09:30.925850 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1548 12:09:30.935727 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1549 12:09:30.945997 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1550 12:09:30.959409 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1551 12:09:30.959968 GENERIC: 0.0
1552 12:09:30.962273 PCI: 01:00.0
1553 12:09:30.972277 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1554 12:09:30.982438 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1555 12:09:30.992412 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1556 12:09:30.995810 PCI: 00:1e.0
1557 12:09:31.005462 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1558 12:09:31.009609 PCI: 00:1e.2 child on link 0 SPI: 00
1559 12:09:31.019414 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1560 12:09:31.022145 SPI: 00
1561 12:09:31.025660 PCI: 00:1e.3 child on link 0 SPI: 00
1562 12:09:31.035269 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1563 12:09:31.035855 SPI: 00
1564 12:09:31.042174 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1565 12:09:31.048678 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1566 12:09:31.052172 PNP: 0c09.0
1567 12:09:31.058543 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1568 12:09:31.065554 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1569 12:09:31.075219 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1570 12:09:31.082118 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1571 12:09:31.088611 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1572 12:09:31.089109 GENERIC: 0.0
1573 12:09:31.091758 GENERIC: 1.0
1574 12:09:31.092242 PCI: 00:1f.3
1575 12:09:31.105250 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1576 12:09:31.115803 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1577 12:09:31.116369 PCI: 00:1f.5
1578 12:09:31.125373 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1579 12:09:31.131411 CPU_CLUSTER: 0 child on link 0 APIC: 00
1580 12:09:31.131948 APIC: 00
1581 12:09:31.132301 APIC: 01
1582 12:09:31.135248 APIC: 03
1583 12:09:31.135737 APIC: 05
1584 12:09:31.138312 APIC: 07
1585 12:09:31.138804 APIC: 06
1586 12:09:31.139186 APIC: 02
1587 12:09:31.141647 APIC: 04
1588 12:09:31.142189 Done allocating resources.
1589 12:09:31.145218
1590 12:09:31.148134 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1591 12:09:31.155246 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1592 12:09:31.158923 Configure GPIOs for I2S audio on UP4.
1593 12:09:31.165879 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1594 12:09:31.169317 Enabling resources...
1595 12:09:31.172482 PCI: 00:00.0 subsystem <- 8086/9a12
1596 12:09:31.176199 PCI: 00:00.0 cmd <- 06
1597 12:09:31.179299 PCI: 00:02.0 subsystem <- 8086/9a40
1598 12:09:31.182672 PCI: 00:02.0 cmd <- 03
1599 12:09:31.185873 PCI: 00:04.0 subsystem <- 8086/9a03
1600 12:09:31.186481 PCI: 00:04.0 cmd <- 02
1601 12:09:31.192722 PCI: 00:05.0 subsystem <- 8086/9a19
1602 12:09:31.193200 PCI: 00:05.0 cmd <- 02
1603 12:09:31.195946 PCI: 00:08.0 subsystem <- 8086/9a11
1604 12:09:31.199368 PCI: 00:08.0 cmd <- 06
1605 12:09:31.202826 PCI: 00:0d.0 subsystem <- 8086/9a13
1606 12:09:31.205623 PCI: 00:0d.0 cmd <- 02
1607 12:09:31.209142 PCI: 00:14.0 subsystem <- 8086/a0ed
1608 12:09:31.212526 PCI: 00:14.0 cmd <- 02
1609 12:09:31.215593 PCI: 00:14.2 subsystem <- 8086/a0ef
1610 12:09:31.219482 PCI: 00:14.2 cmd <- 02
1611 12:09:31.222439 PCI: 00:14.3 subsystem <- 8086/a0f0
1612 12:09:31.225817 PCI: 00:14.3 cmd <- 02
1613 12:09:31.228940 PCI: 00:15.0 subsystem <- 8086/a0e8
1614 12:09:31.229261 PCI: 00:15.0 cmd <- 02
1615 12:09:31.232349
1616 12:09:31.235653 PCI: 00:15.1 subsystem <- 8086/a0e9
1617 12:09:31.236084 PCI: 00:15.1 cmd <- 02
1618 12:09:31.242384 PCI: 00:15.2 subsystem <- 8086/a0ea
1619 12:09:31.242817 PCI: 00:15.2 cmd <- 02
1620 12:09:31.245803 PCI: 00:15.3 subsystem <- 8086/a0eb
1621 12:09:31.248856 PCI: 00:15.3 cmd <- 02
1622 12:09:31.252037 PCI: 00:16.0 subsystem <- 8086/a0e0
1623 12:09:31.255685 PCI: 00:16.0 cmd <- 02
1624 12:09:31.259082 PCI: 00:19.1 subsystem <- 8086/a0c6
1625 12:09:31.262289 PCI: 00:19.1 cmd <- 02
1626 12:09:31.265788 PCI: 00:1d.0 bridge ctrl <- 0013
1627 12:09:31.269235 PCI: 00:1d.0 subsystem <- 8086/a0b0
1628 12:09:31.272280 PCI: 00:1d.0 cmd <- 06
1629 12:09:31.276059 PCI: 00:1e.0 subsystem <- 8086/a0a8
1630 12:09:31.279365 PCI: 00:1e.0 cmd <- 06
1631 12:09:31.282427 PCI: 00:1e.2 subsystem <- 8086/a0aa
1632 12:09:31.282960 PCI: 00:1e.2 cmd <- 06
1633 12:09:31.289395 PCI: 00:1e.3 subsystem <- 8086/a0ab
1634 12:09:31.289991 PCI: 00:1e.3 cmd <- 02
1635 12:09:31.292561 PCI: 00:1f.0 subsystem <- 8086/a087
1636 12:09:31.296207 PCI: 00:1f.0 cmd <- 407
1637 12:09:31.299366 PCI: 00:1f.3 subsystem <- 8086/a0c8
1638 12:09:31.302712 PCI: 00:1f.3 cmd <- 02
1639 12:09:31.306098 PCI: 00:1f.5 subsystem <- 8086/a0a4
1640 12:09:31.309375 PCI: 00:1f.5 cmd <- 406
1641 12:09:31.313357 PCI: 01:00.0 cmd <- 02
1642 12:09:31.317603 done.
1643 12:09:31.321303 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1644 12:09:31.324785 Initializing devices...
1645 12:09:31.327969 Root Device init
1646 12:09:31.330982 Chrome EC: Set SMI mask to 0x0000000000000000
1647 12:09:31.338333 Chrome EC: clear events_b mask to 0x0000000000000000
1648 12:09:31.345026 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1649 12:09:31.352078 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1650 12:09:31.358107 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1651 12:09:31.362066 Chrome EC: Set WAKE mask to 0x0000000000000000
1652 12:09:31.369783 fw_config match found: DB_USB=USB3_ACTIVE
1653 12:09:31.373072 Configure Right Type-C port orientation for retimer
1654 12:09:31.376349 Root Device init finished in 47 msecs
1655 12:09:31.380376 PCI: 00:00.0 init
1656 12:09:31.383814 CPU TDP = 9 Watts
1657 12:09:31.384292 CPU PL1 = 9 Watts
1658 12:09:31.387217 CPU PL2 = 40 Watts
1659 12:09:31.390635 CPU PL4 = 83 Watts
1660 12:09:31.393749 PCI: 00:00.0 init finished in 8 msecs
1661 12:09:31.394184 PCI: 00:02.0 init
1662 12:09:31.396911 GMA: Found VBT in CBFS
1663 12:09:31.400301 GMA: Found valid VBT in CBFS
1664 12:09:31.407018 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1665 12:09:31.413725 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1666 12:09:31.416662 PCI: 00:02.0 init finished in 18 msecs
1667 12:09:31.420170 PCI: 00:05.0 init
1668 12:09:31.423232 PCI: 00:05.0 init finished in 0 msecs
1669 12:09:31.426605 PCI: 00:08.0 init
1670 12:09:31.430545 PCI: 00:08.0 init finished in 0 msecs
1671 12:09:31.433466 PCI: 00:14.0 init
1672 12:09:31.436926 PCI: 00:14.0 init finished in 0 msecs
1673 12:09:31.439795 PCI: 00:14.2 init
1674 12:09:31.443037 PCI: 00:14.2 init finished in 0 msecs
1675 12:09:31.446555 PCI: 00:15.0 init
1676 12:09:31.447013 I2C bus 0 version 0x3230302a
1677 12:09:31.449563
1678 12:09:31.453536 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1679 12:09:31.456565 PCI: 00:15.0 init finished in 6 msecs
1680 12:09:31.457087 PCI: 00:15.1 init
1681 12:09:31.459709 I2C bus 1 version 0x3230302a
1682 12:09:31.463207 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1683 12:09:31.469758 PCI: 00:15.1 init finished in 6 msecs
1684 12:09:31.470298 PCI: 00:15.2 init
1685 12:09:31.473278 I2C bus 2 version 0x3230302a
1686 12:09:31.476543 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1687 12:09:31.480255 PCI: 00:15.2 init finished in 6 msecs
1688 12:09:31.483330 PCI: 00:15.3 init
1689 12:09:31.486546 I2C bus 3 version 0x3230302a
1690 12:09:31.489880 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1691 12:09:31.492911 PCI: 00:15.3 init finished in 6 msecs
1692 12:09:31.496270 PCI: 00:16.0 init
1693 12:09:31.499735 PCI: 00:16.0 init finished in 0 msecs
1694 12:09:31.503284 PCI: 00:19.1 init
1695 12:09:31.506723 I2C bus 5 version 0x3230302a
1696 12:09:31.509644 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1697 12:09:31.513005 PCI: 00:19.1 init finished in 6 msecs
1698 12:09:31.513665 PCI: 00:1d.0 init
1699 12:09:31.516670
1700 12:09:31.517257 Initializing PCH PCIe bridge.
1701 12:09:31.522939 PCI: 00:1d.0 init finished in 3 msecs
1702 12:09:31.523422 PCI: 00:1f.0 init
1703 12:09:31.530377 IOAPIC: Initializing IOAPIC at 0xfec00000
1704 12:09:31.533510 IOAPIC: Bootstrap Processor Local APIC = 0x00
1705 12:09:31.536500 IOAPIC: ID = 0x02
1706 12:09:31.536984 IOAPIC: Dumping registers
1707 12:09:31.539638
1708 12:09:31.540124 reg 0x0000: 0x02000000
1709 12:09:31.542949 reg 0x0001: 0x00770020
1710 12:09:31.546235 reg 0x0002: 0x00000000
1711 12:09:31.549516 PCI: 00:1f.0 init finished in 21 msecs
1712 12:09:31.553460 PCI: 00:1f.2 init
1713 12:09:31.554004 Disabling ACPI via APMC.
1714 12:09:31.557927 APMC done.
1715 12:09:31.560997 PCI: 00:1f.2 init finished in 5 msecs
1716 12:09:31.572927 PCI: 01:00.0 init
1717 12:09:31.576211 PCI: 01:00.0 init finished in 0 msecs
1718 12:09:31.579572 PNP: 0c09.0 init
1719 12:09:31.583275 Google Chrome EC uptime: 8.403 seconds
1720 12:09:31.589301 Google Chrome AP resets since EC boot: 1
1721 12:09:31.592775 Google Chrome most recent AP reset causes:
1722 12:09:31.596420 0.348: 32775 shutdown: entering G3
1723 12:09:31.602761 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1724 12:09:31.606150 PNP: 0c09.0 init finished in 22 msecs
1725 12:09:31.611702 Devices initialized
1726 12:09:31.614942 Show all devs... After init.
1727 12:09:31.618492 Root Device: enabled 1
1728 12:09:31.618923 DOMAIN: 0000: enabled 1
1729 12:09:31.622091 CPU_CLUSTER: 0: enabled 1
1730 12:09:31.625410 PCI: 00:00.0: enabled 1
1731 12:09:31.629040 PCI: 00:02.0: enabled 1
1732 12:09:31.629611 PCI: 00:04.0: enabled 1
1733 12:09:31.631912 PCI: 00:05.0: enabled 1
1734 12:09:31.635801 PCI: 00:06.0: enabled 0
1735 12:09:31.638685 PCI: 00:07.0: enabled 0
1736 12:09:31.639180 PCI: 00:07.1: enabled 0
1737 12:09:31.641781 PCI: 00:07.2: enabled 0
1738 12:09:31.645498 PCI: 00:07.3: enabled 0
1739 12:09:31.649035 PCI: 00:08.0: enabled 1
1740 12:09:31.649501 PCI: 00:09.0: enabled 0
1741 12:09:31.651495 PCI: 00:0a.0: enabled 0
1742 12:09:31.655735 PCI: 00:0d.0: enabled 1
1743 12:09:31.656295 PCI: 00:0d.1: enabled 0
1744 12:09:31.658233
1745 12:09:31.658688 PCI: 00:0d.2: enabled 0
1746 12:09:31.662227 PCI: 00:0d.3: enabled 0
1747 12:09:31.665237 PCI: 00:0e.0: enabled 0
1748 12:09:31.665822 PCI: 00:10.2: enabled 1
1749 12:09:31.668432 PCI: 00:10.6: enabled 0
1750 12:09:31.671991 PCI: 00:10.7: enabled 0
1751 12:09:31.675096 PCI: 00:12.0: enabled 0
1752 12:09:31.675582 PCI: 00:12.6: enabled 0
1753 12:09:31.678323 PCI: 00:13.0: enabled 0
1754 12:09:31.681513 PCI: 00:14.0: enabled 1
1755 12:09:31.684932 PCI: 00:14.1: enabled 0
1756 12:09:31.685546 PCI: 00:14.2: enabled 1
1757 12:09:31.688439 PCI: 00:14.3: enabled 1
1758 12:09:31.691792 PCI: 00:15.0: enabled 1
1759 12:09:31.695014 PCI: 00:15.1: enabled 1
1760 12:09:31.695594 PCI: 00:15.2: enabled 1
1761 12:09:31.698456 PCI: 00:15.3: enabled 1
1762 12:09:31.701776 PCI: 00:16.0: enabled 1
1763 12:09:31.702367 PCI: 00:16.1: enabled 0
1764 12:09:31.705028 PCI: 00:16.2: enabled 0
1765 12:09:31.708022 PCI: 00:16.3: enabled 0
1766 12:09:31.711837 PCI: 00:16.4: enabled 0
1767 12:09:31.712319 PCI: 00:16.5: enabled 0
1768 12:09:31.714822 PCI: 00:17.0: enabled 0
1769 12:09:31.718338 PCI: 00:19.0: enabled 0
1770 12:09:31.721885 PCI: 00:19.1: enabled 1
1771 12:09:31.722466 PCI: 00:19.2: enabled 0
1772 12:09:31.725286 PCI: 00:1c.0: enabled 1
1773 12:09:31.728524 PCI: 00:1c.1: enabled 0
1774 12:09:31.731960 PCI: 00:1c.2: enabled 0
1775 12:09:31.732540 PCI: 00:1c.3: enabled 0
1776 12:09:31.734876 PCI: 00:1c.4: enabled 0
1777 12:09:31.738256 PCI: 00:1c.5: enabled 0
1778 12:09:31.738857 PCI: 00:1c.6: enabled 1
1779 12:09:31.741279
1780 12:09:31.741804 PCI: 00:1c.7: enabled 0
1781 12:09:31.745140 PCI: 00:1d.0: enabled 1
1782 12:09:31.748080 PCI: 00:1d.1: enabled 0
1783 12:09:31.748557 PCI: 00:1d.2: enabled 1
1784 12:09:31.751281 PCI: 00:1d.3: enabled 0
1785 12:09:31.755000 PCI: 00:1e.0: enabled 1
1786 12:09:31.758213 PCI: 00:1e.1: enabled 0
1787 12:09:31.758758 PCI: 00:1e.2: enabled 1
1788 12:09:31.761517 PCI: 00:1e.3: enabled 1
1789 12:09:31.764461 PCI: 00:1f.0: enabled 1
1790 12:09:31.767976 PCI: 00:1f.1: enabled 0
1791 12:09:31.768683 PCI: 00:1f.2: enabled 1
1792 12:09:31.771331 PCI: 00:1f.3: enabled 1
1793 12:09:31.774866 PCI: 00:1f.4: enabled 0
1794 12:09:31.778125 PCI: 00:1f.5: enabled 1
1795 12:09:31.778727 PCI: 00:1f.6: enabled 0
1796 12:09:31.781146 PCI: 00:1f.7: enabled 0
1797 12:09:31.784455 APIC: 00: enabled 1
1798 12:09:31.785059 GENERIC: 0.0: enabled 1
1799 12:09:31.788123 GENERIC: 0.0: enabled 1
1800 12:09:31.791288 GENERIC: 1.0: enabled 1
1801 12:09:31.794644 GENERIC: 0.0: enabled 1
1802 12:09:31.795090 GENERIC: 1.0: enabled 1
1803 12:09:31.797872 USB0 port 0: enabled 1
1804 12:09:31.801060 GENERIC: 0.0: enabled 1
1805 12:09:31.801526 USB0 port 0: enabled 1
1806 12:09:31.804488 GENERIC: 0.0: enabled 1
1807 12:09:31.807742 I2C: 00:1a: enabled 1
1808 12:09:31.811311 I2C: 00:31: enabled 1
1809 12:09:31.811746 I2C: 00:32: enabled 1
1810 12:09:31.814589 I2C: 00:10: enabled 1
1811 12:09:31.817808 I2C: 00:15: enabled 1
1812 12:09:31.818236 GENERIC: 0.0: enabled 0
1813 12:09:31.820839 GENERIC: 1.0: enabled 0
1814 12:09:31.824423 GENERIC: 0.0: enabled 1
1815 12:09:31.824858 SPI: 00: enabled 1
1816 12:09:31.827607 SPI: 00: enabled 1
1817 12:09:31.831057 PNP: 0c09.0: enabled 1
1818 12:09:31.831594 GENERIC: 0.0: enabled 1
1819 12:09:31.834380 USB3 port 0: enabled 1
1820 12:09:31.838094 USB3 port 1: enabled 1
1821 12:09:31.838530 USB3 port 2: enabled 0
1822 12:09:31.840939
1823 12:09:31.841408 USB3 port 3: enabled 0
1824 12:09:31.844073 USB2 port 0: enabled 0
1825 12:09:31.847527 USB2 port 1: enabled 1
1826 12:09:31.847996 USB2 port 2: enabled 1
1827 12:09:31.851173 USB2 port 3: enabled 0
1828 12:09:31.854326 USB2 port 4: enabled 1
1829 12:09:31.854759 USB2 port 5: enabled 0
1830 12:09:31.857504 USB2 port 6: enabled 0
1831 12:09:31.860961 USB2 port 7: enabled 0
1832 12:09:31.864598 USB2 port 8: enabled 0
1833 12:09:31.865162 USB2 port 9: enabled 0
1834 12:09:31.868038 USB3 port 0: enabled 0
1835 12:09:31.870878 USB3 port 1: enabled 1
1836 12:09:31.871442 USB3 port 2: enabled 0
1837 12:09:31.874008 USB3 port 3: enabled 0
1838 12:09:31.877765 GENERIC: 0.0: enabled 1
1839 12:09:31.880866 GENERIC: 1.0: enabled 1
1840 12:09:31.881406 APIC: 01: enabled 1
1841 12:09:31.884491 APIC: 03: enabled 1
1842 12:09:31.885031 APIC: 05: enabled 1
1843 12:09:31.887416 APIC: 07: enabled 1
1844 12:09:31.890686 APIC: 06: enabled 1
1845 12:09:31.891122 APIC: 02: enabled 1
1846 12:09:31.893895 APIC: 04: enabled 1
1847 12:09:31.897521 PCI: 01:00.0: enabled 1
1848 12:09:31.900878 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1849 12:09:31.907805 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1850 12:09:31.910683 ELOG: NV offset 0xf30000 size 0x1000
1851 12:09:31.917622 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1852 12:09:31.924413 ELOG: Event(17) added with size 13 at 2022-11-25 12:09:31 UTC
1853 12:09:31.930838 ELOG: Event(92) added with size 9 at 2022-11-25 12:09:31 UTC
1854 12:09:31.937320 ELOG: Event(93) added with size 9 at 2022-11-25 12:09:31 UTC
1855 12:09:31.943561 ELOG: Event(9E) added with size 10 at 2022-11-25 12:09:31 UTC
1856 12:09:31.950365 ELOG: Event(9F) added with size 14 at 2022-11-25 12:09:31 UTC
1857 12:09:31.956843 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1858 12:09:31.960370 ELOG: Event(A1) added with size 10 at 2022-11-25 12:09:32 UTC
1859 12:09:31.966938 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1860 12:09:31.973896 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1861 12:09:31.976917 Finalize devices...
1862 12:09:31.977404 Devices finalized
1863 12:09:31.983797 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1864 12:09:31.986680 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1865 12:09:31.993384 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1866 12:09:32.000187 ME: HFSTS1 : 0x80030055
1867 12:09:32.003297 ME: HFSTS2 : 0x30280116
1868 12:09:32.006919 ME: HFSTS3 : 0x00000050
1869 12:09:32.013077 ME: HFSTS4 : 0x00004000
1870 12:09:32.016607 ME: HFSTS5 : 0x00000000
1871 12:09:32.019697 ME: HFSTS6 : 0x00400006
1872 12:09:32.023626 ME: Manufacturing Mode : YES
1873 12:09:32.029949 ME: SPI Protection Mode Enabled : NO
1874 12:09:32.033231 ME: FW Partition Table : OK
1875 12:09:32.037026 ME: Bringup Loader Failure : NO
1876 12:09:32.039901 ME: Firmware Init Complete : NO
1877 12:09:32.043148 ME: Boot Options Present : NO
1878 12:09:32.046336 ME: Update In Progress : NO
1879 12:09:32.049902 ME: D0i3 Support : YES
1880 12:09:32.052826 ME: Low Power State Enabled : NO
1881 12:09:32.059735 ME: CPU Replaced : YES
1882 12:09:32.062999 ME: CPU Replacement Valid : YES
1883 12:09:32.066065 ME: Current Working State : 5
1884 12:09:32.070022 ME: Current Operation State : 1
1885 12:09:32.073050 ME: Current Operation Mode : 3
1886 12:09:32.076132 ME: Error Code : 0
1887 12:09:32.079207 ME: Enhanced Debug Mode : NO
1888 12:09:32.082805 ME: CPU Debug Disabled : YES
1889 12:09:32.086190 ME: TXT Support : NO
1890 12:09:32.092694 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1891 12:09:32.102747 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1892 12:09:32.105913 CBFS: 'fallback/slic' not found.
1893 12:09:32.109817 ACPI: Writing ACPI tables at 76b01000.
1894 12:09:32.109921 ACPI: * FACS
1895 12:09:32.112907 ACPI: * DSDT
1896 12:09:32.115724 Ramoops buffer: 0x100000@0x76a00000.
1897 12:09:32.119352 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1898 12:09:32.126067 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1899 12:09:32.129172 Google Chrome EC: version:
1900 12:09:32.132587 ro: voema_v2.0.7540-147f8d37d1
1901 12:09:32.136083 rw: voema_v2.0.7540-147f8d37d1
1902 12:09:32.136175 running image: 2
1903 12:09:32.142406 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1904 12:09:32.147393 ACPI: * FADT
1905 12:09:32.147480 SCI is IRQ9
1906 12:09:32.150999 ACPI: added table 1/32, length now 40
1907 12:09:32.153906
1908 12:09:32.153993 ACPI: * SSDT
1909 12:09:32.157187 Found 1 CPU(s) with 8 core(s) each.
1910 12:09:32.164013 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1911 12:09:32.167601 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1912 12:09:32.170753 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1913 12:09:32.174319 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1914 12:09:32.180762 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1915 12:09:32.187313 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1916 12:09:32.190762 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1917 12:09:32.197464 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1918 12:09:32.203997 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1919 12:09:32.207707 \_SB.PCI0.RP09: Added StorageD3Enable property
1920 12:09:32.210813 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1921 12:09:32.217148 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1922 12:09:32.223904 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1923 12:09:32.227691 PS2K: Passing 80 keymaps to kernel
1924 12:09:32.234020 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1925 12:09:32.240647 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1926 12:09:32.247644 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1927 12:09:32.253916 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1928 12:09:32.260792 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1929 12:09:32.267339 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1930 12:09:32.273950 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1931 12:09:32.277316 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1932 12:09:32.280437
1933 12:09:32.284114 ACPI: added table 2/32, length now 44
1934 12:09:32.284689 ACPI: * MCFG
1935 12:09:32.287031 ACPI: added table 3/32, length now 48
1936 12:09:32.290432 ACPI: * TPM2
1937 12:09:32.293791 TPM2 log created at 0x769f0000
1938 12:09:32.297363 ACPI: added table 4/32, length now 52
1939 12:09:32.297852 ACPI: * MADT
1940 12:09:32.300758 SCI is IRQ9
1941 12:09:32.303641 ACPI: added table 5/32, length now 56
1942 12:09:32.304089 current = 76b09850
1943 12:09:32.307026
1944 12:09:32.307463 ACPI: * DMAR
1945 12:09:32.310868 ACPI: added table 6/32, length now 60
1946 12:09:32.313850 ACPI: added table 7/32, length now 64
1947 12:09:32.317127 ACPI: * HPET
1948 12:09:32.320497 ACPI: added table 8/32, length now 68
1949 12:09:32.320941 ACPI: done.
1950 12:09:32.324005 ACPI tables: 35216 bytes.
1951 12:09:32.327387 smbios_write_tables: 769ef000
1952 12:09:32.330458 EC returned error result code 3
1953 12:09:32.333787 Couldn't obtain OEM name from CBI
1954 12:09:32.337163 Create SMBIOS type 16
1955 12:09:32.340666 Create SMBIOS type 17
1956 12:09:32.341208 GENERIC: 0.0 (WIFI Device)
1957 12:09:32.343669 SMBIOS tables: 1750 bytes.
1958 12:09:32.350246 Writing table forward entry at 0x00000500
1959 12:09:32.354319 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1960 12:09:32.360223 Writing coreboot table at 0x76b25000
1961 12:09:32.363546 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1962 12:09:32.370206 1. 0000000000001000-000000000009ffff: RAM
1963 12:09:32.373571 2. 00000000000a0000-00000000000fffff: RESERVED
1964 12:09:32.376676 3. 0000000000100000-00000000769eefff: RAM
1965 12:09:32.383416 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1966 12:09:32.390022 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1967 12:09:32.393530 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1968 12:09:32.400304 7. 0000000077000000-000000007fbfffff: RESERVED
1969 12:09:32.403370 8. 00000000c0000000-00000000cfffffff: RESERVED
1970 12:09:32.409930 9. 00000000f8000000-00000000f9ffffff: RESERVED
1971 12:09:32.414117 10. 00000000fb000000-00000000fb000fff: RESERVED
1972 12:09:32.420045 11. 00000000fe000000-00000000fe00ffff: RESERVED
1973 12:09:32.424086 12. 00000000fed80000-00000000fed87fff: RESERVED
1974 12:09:32.426815 13. 00000000fed90000-00000000fed92fff: RESERVED
1975 12:09:32.433658 14. 00000000feda0000-00000000feda1fff: RESERVED
1976 12:09:32.436727 15. 00000000fedc0000-00000000feddffff: RESERVED
1977 12:09:32.443110 16. 0000000100000000-00000002803fffff: RAM
1978 12:09:32.443639 Passing 4 GPIOs to payload:
1979 12:09:32.446660
1980 12:09:32.449885 NAME | PORT | POLARITY | VALUE
1981 12:09:32.456712 lid | undefined | high | high
1982 12:09:32.459956 power | undefined | high | low
1983 12:09:32.466337 oprom | undefined | high | low
1984 12:09:32.469595 EC in RW | 0x000000e5 | high | high
1985 12:09:32.476584 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1bda
1986 12:09:32.480095 coreboot table: 1576 bytes.
1987 12:09:32.483046 IMD ROOT 0. 0x76fff000 0x00001000
1988 12:09:32.486655 IMD SMALL 1. 0x76ffe000 0x00001000
1989 12:09:32.493242 FSP MEMORY 2. 0x76c4e000 0x003b0000
1990 12:09:32.497111 VPD 3. 0x76c4d000 0x00000367
1991 12:09:32.499961 RO MCACHE 4. 0x76c4c000 0x00000fdc
1992 12:09:32.503026 CONSOLE 5. 0x76c2c000 0x00020000
1993 12:09:32.507262 FMAP 6. 0x76c2b000 0x00000578
1994 12:09:32.510149 TIME STAMP 7. 0x76c2a000 0x00000910
1995 12:09:32.513350 VBOOT WORK 8. 0x76c16000 0x00014000
1996 12:09:32.516693 ROMSTG STCK 9. 0x76c15000 0x00001000
1997 12:09:32.519725 AFTER CAR 10. 0x76c0a000 0x0000b000
1998 12:09:32.526484 RAMSTAGE 11. 0x76b97000 0x00073000
1999 12:09:32.530043 REFCODE 12. 0x76b42000 0x00055000
2000 12:09:32.533471 SMM BACKUP 13. 0x76b32000 0x00010000
2001 12:09:32.536706 4f444749 14. 0x76b30000 0x00002000
2002 12:09:32.540409 EXT VBT15. 0x76b2d000 0x0000219f
2003 12:09:32.543243 COREBOOT 16. 0x76b25000 0x00008000
2004 12:09:32.546537 ACPI 17. 0x76b01000 0x00024000
2005 12:09:32.550407 ACPI GNVS 18. 0x76b00000 0x00001000
2006 12:09:32.553536 RAMOOPS 19. 0x76a00000 0x00100000
2007 12:09:32.560050 TPM2 TCGLOG20. 0x769f0000 0x00010000
2008 12:09:32.563186 SMBIOS 21. 0x769ef000 0x00000800
2009 12:09:32.563623 IMD small region:
2010 12:09:32.566596 IMD ROOT 0. 0x76ffec00 0x00000400
2011 12:09:32.573129 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2012 12:09:32.576700 POWER STATE 2. 0x76ffeb80 0x00000044
2013 12:09:32.579917 ROMSTAGE 3. 0x76ffeb60 0x00000004
2014 12:09:32.583584 MEM INFO 4. 0x76ffe980 0x000001e0
2015 12:09:32.590484 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
2016 12:09:32.593327 MTRR: Physical address space:
2017 12:09:32.599751 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2018 12:09:32.603533 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2019 12:09:32.606767
2020 12:09:32.610191 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2021 12:09:32.616588 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2022 12:09:32.623801 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2023 12:09:32.629877 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2024 12:09:32.636548 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2025 12:09:32.640162 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:09:32.643390 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 12:09:32.649526 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 12:09:32.653523 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 12:09:32.656780 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 12:09:32.659811 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 12:09:32.666270 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 12:09:32.669558 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 12:09:32.673504 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 12:09:32.676233 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 12:09:32.679801 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 12:09:32.684424 call enable_fixed_mtrr()
2037 12:09:32.687578 CPU physical address size: 39 bits
2038 12:09:32.694701 MTRR: default type WB/UC MTRR counts: 6/6.
2039 12:09:32.697571 MTRR: UC selected as default type.
2040 12:09:32.705008 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2041 12:09:32.707525 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2042 12:09:32.714348 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2043 12:09:32.721122 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2044 12:09:32.727623 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2045 12:09:32.733994 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2046 12:09:32.734435
2047 12:09:32.737364 MTRR check
2048 12:09:32.737830 Fixed MTRRs : Enabled
2049 12:09:32.740583 Variable MTRRs: Enabled
2050 12:09:32.741019
2051 12:09:32.743883 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 12:09:32.747544
2053 12:09:32.750619 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 12:09:32.754121 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 12:09:32.757640 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 12:09:32.761080 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 12:09:32.767476 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 12:09:32.770782 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 12:09:32.773891 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 12:09:32.777471 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 12:09:32.783847 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 12:09:32.787594 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 12:09:32.793714 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2064 12:09:32.797256 call enable_fixed_mtrr()
2065 12:09:32.800845 Checking cr50 for pending updates
2066 12:09:32.804281 CPU physical address size: 39 bits
2067 12:09:32.807554 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 12:09:32.810986 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 12:09:32.814150 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 12:09:32.820661 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 12:09:32.824348 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 12:09:32.827347 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 12:09:32.830750 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 12:09:32.837238 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 12:09:32.840380 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 12:09:32.843723 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 12:09:32.847189 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 12:09:32.853934 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 12:09:32.857455 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 12:09:32.860643 call enable_fixed_mtrr()
2081 12:09:32.863846 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 12:09:32.866972 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 12:09:32.873626 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 12:09:32.877074 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 12:09:32.880439 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 12:09:32.883928 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 12:09:32.890302 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 12:09:32.893578 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 12:09:32.897182 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 12:09:32.900136 CPU physical address size: 39 bits
2091 12:09:32.904843 call enable_fixed_mtrr()
2092 12:09:32.908014 MTRR: Fixed MSR 0x250 0x0606060606060606
2093 12:09:32.914616 MTRR: Fixed MSR 0x250 0x0606060606060606
2094 12:09:32.918206 MTRR: Fixed MSR 0x258 0x0606060606060606
2095 12:09:32.921536 MTRR: Fixed MSR 0x259 0x0000000000000000
2096 12:09:32.924464 MTRR: Fixed MSR 0x268 0x0606060606060606
2097 12:09:32.931204 MTRR: Fixed MSR 0x269 0x0606060606060606
2098 12:09:32.934652 MTRR: Fixed MSR 0x26a 0x0606060606060606
2099 12:09:32.938061 MTRR: Fixed MSR 0x26b 0x0606060606060606
2100 12:09:32.940889 MTRR: Fixed MSR 0x26c 0x0606060606060606
2101 12:09:32.947679 MTRR: Fixed MSR 0x26d 0x0606060606060606
2102 12:09:32.950669 MTRR: Fixed MSR 0x26e 0x0606060606060606
2103 12:09:32.954390 MTRR: Fixed MSR 0x26f 0x0606060606060606
2104 12:09:32.960811 MTRR: Fixed MSR 0x258 0x0606060606060606
2105 12:09:32.961304 call enable_fixed_mtrr()
2106 12:09:32.967974 MTRR: Fixed MSR 0x259 0x0000000000000000
2107 12:09:32.970793 MTRR: Fixed MSR 0x268 0x0606060606060606
2108 12:09:32.974121 MTRR: Fixed MSR 0x269 0x0606060606060606
2109 12:09:32.977599 MTRR: Fixed MSR 0x26a 0x0606060606060606
2110 12:09:32.980901 MTRR: Fixed MSR 0x26b 0x0606060606060606
2111 12:09:32.984344
2112 12:09:32.987320 MTRR: Fixed MSR 0x26c 0x0606060606060606
2113 12:09:32.991294 MTRR: Fixed MSR 0x26d 0x0606060606060606
2114 12:09:32.993710 MTRR: Fixed MSR 0x26e 0x0606060606060606
2115 12:09:32.997280 MTRR: Fixed MSR 0x26f 0x0606060606060606
2116 12:09:33.003673 CPU physical address size: 39 bits
2117 12:09:33.007842 call enable_fixed_mtrr()
2118 12:09:33.012408 Reading cr50 TPM mode
2119 12:09:33.012895 CPU physical address size: 39 bits
2120 12:09:33.015751 MTRR: Fixed MSR 0x250 0x0606060606060606
2121 12:09:33.022753 MTRR: Fixed MSR 0x250 0x0606060606060606
2122 12:09:33.025157 MTRR: Fixed MSR 0x258 0x0606060606060606
2123 12:09:33.028937 MTRR: Fixed MSR 0x259 0x0000000000000000
2124 12:09:33.032583 MTRR: Fixed MSR 0x268 0x0606060606060606
2125 12:09:33.038463 MTRR: Fixed MSR 0x269 0x0606060606060606
2126 12:09:33.042096 MTRR: Fixed MSR 0x26a 0x0606060606060606
2127 12:09:33.045587 MTRR: Fixed MSR 0x26b 0x0606060606060606
2128 12:09:33.048743 MTRR: Fixed MSR 0x26c 0x0606060606060606
2129 12:09:33.055449 MTRR: Fixed MSR 0x26d 0x0606060606060606
2130 12:09:33.058215 MTRR: Fixed MSR 0x26e 0x0606060606060606
2131 12:09:33.062263 MTRR: Fixed MSR 0x26f 0x0606060606060606
2132 12:09:33.068578 MTRR: Fixed MSR 0x258 0x0606060606060606
2133 12:09:33.071781 MTRR: Fixed MSR 0x259 0x0000000000000000
2134 12:09:33.075048 MTRR: Fixed MSR 0x268 0x0606060606060606
2135 12:09:33.079013 MTRR: Fixed MSR 0x269 0x0606060606060606
2136 12:09:33.085633 MTRR: Fixed MSR 0x26a 0x0606060606060606
2137 12:09:33.088514 MTRR: Fixed MSR 0x26b 0x0606060606060606
2138 12:09:33.091557 MTRR: Fixed MSR 0x26c 0x0606060606060606
2139 12:09:33.095009 MTRR: Fixed MSR 0x26d 0x0606060606060606
2140 12:09:33.101579 MTRR: Fixed MSR 0x26e 0x0606060606060606
2141 12:09:33.104831 MTRR: Fixed MSR 0x26f 0x0606060606060606
2142 12:09:33.108929 call enable_fixed_mtrr()
2143 12:09:33.111308 call enable_fixed_mtrr()
2144 12:09:33.115167 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2145 12:09:33.118226 CPU physical address size: 39 bits
2146 12:09:33.121139
2147 12:09:33.124700 CPU physical address size: 39 bits
2148 12:09:33.131211 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2149 12:09:33.134708 CPU physical address size: 39 bits
2150 12:09:33.141057 Checking segment from ROM address 0xffc02b38
2151 12:09:33.144322 Checking segment from ROM address 0xffc02b54
2152 12:09:33.147830 Loading segment from ROM address 0xffc02b38
2153 12:09:33.150903 code (compression=0)
2154 12:09:33.161513 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2155 12:09:33.168045 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2156 12:09:33.171241 it's not compressed!
2157 12:09:33.309836 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2158 12:09:33.316238 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2159 12:09:33.323012 Loading segment from ROM address 0xffc02b54
2160 12:09:33.323604 Entry Point 0x30000000
2161 12:09:33.326260 Loaded segments
2162 12:09:33.333303 BS: BS_PAYLOAD_LOAD run times (exec / console): 147 / 63 ms
2163 12:09:33.375981 Finalizing chipset.
2164 12:09:33.379268 Finalizing SMM.
2165 12:09:33.379867 APMC done.
2166 12:09:33.385507 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2167 12:09:33.388952 mp_park_aps done after 0 msecs.
2168 12:09:33.392172 Jumping to boot code at 0x30000000(0x76b25000)
2169 12:09:33.401950 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2170 12:09:33.402531
2171 12:09:33.402966
2172 12:09:33.403335
2173 12:09:33.405556 Starting depthcharge on Voema...
2174 12:09:33.406043
2175 12:09:33.407599 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2176 12:09:33.408443 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2177 12:09:33.409105 Setting prompt string to ['volteer:']
2178 12:09:33.409770 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2179 12:09:33.415447 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2180 12:09:33.416083
2181 12:09:33.422131 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2182 12:09:33.422744
2183 12:09:33.425017 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2184 12:09:33.428319
2185 12:09:33.431560 Failed to find eMMC card reader
2186 12:09:33.431984
2187 12:09:33.432358 Wipe memory regions:
2188 12:09:33.432718
2189 12:09:33.438560 [0x00000000001000, 0x000000000a0000)
2190 12:09:33.438815
2191 12:09:33.441569 [0x00000000100000, 0x00000030000000)
2192 12:09:33.441772
2193 12:09:33.470126 [0x00000032662db0, 0x000000769ef000)
2194 12:09:33.470518
2195 12:09:33.509114 [0x00000100000000, 0x00000280400000)
2196 12:09:33.509745
2197 12:09:33.714048 ec_init: CrosEC protocol v3 supported (256, 256)
2198 12:09:33.714647
2199 12:09:33.720663 update_port_state: port C0 state: usb enable 1 mux conn 0
2200 12:09:33.721262
2201 12:09:33.730700 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2202 12:09:33.731202
2203 12:09:33.737372 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2204 12:09:33.737893
2205 12:09:33.740998 send_conn_disc_msg: pmc_send_cmd succeeded
2206 12:09:33.741540
2207 12:09:34.171453 R8152: Initializing
2208 12:09:34.172119
2209 12:09:34.175039 Version 6 (ocp_data = 5c30)
2210 12:09:34.175807
2211 12:09:34.178737 R8152: Done initializing
2212 12:09:34.179227
2213 12:09:34.181891 Adding net device
2214 12:09:34.182376
2215 12:09:34.486864 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2216 12:09:34.487479
2217 12:09:34.487903
2218 12:09:34.488284
2219 12:09:34.490430 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2221 12:09:34.592227 volteer: tftpboot 192.168.201.1 8123212/tftp-deploy-i5h3gqfk/kernel/bzImage 8123212/tftp-deploy-i5h3gqfk/kernel/cmdline 8123212/tftp-deploy-i5h3gqfk/ramdisk/ramdisk.cpio.gz
2222 12:09:34.592905 Setting prompt string to 'Starting kernel'
2223 12:09:34.593347 Setting prompt string to ['Starting kernel']
2224 12:09:34.593814 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2225 12:09:34.594240 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2226 12:09:34.597909 tftpboot 192.168.201.1 8123212/tftp-deploy-i5h3gqfk/kernel/bzImaoy-i5h3gqfk/kernel/cmdline 8123212/tftp-deploy-i5h3gqfk/ramdisk/ramdisk.cpio.gz
2227 12:09:34.598384
2228 12:09:34.598767 Waiting for link
2229 12:09:34.599125
2230 12:09:34.802338 done.
2231 12:09:34.802917
2232 12:09:34.803399 MAC: 00:24:32:30:7e:47
2233 12:09:34.804044
2234 12:09:34.805840 Sending DHCP discover... done.
2235 12:09:34.806343
2236 12:09:34.809196 Waiting for reply... done.
2237 12:09:34.810104
2238 12:09:34.811974 Sending DHCP request... done.
2239 12:09:34.812461
2240 12:09:34.819163 Waiting for reply... done.
2241 12:09:34.819731
2242 12:09:34.820120 My ip is 192.168.201.19
2243 12:09:34.820481
2244 12:09:34.822376 The DHCP server ip is 192.168.201.1
2245 12:09:34.825537
2246 12:09:34.829102 TFTP server IP predefined by user: 192.168.201.1
2247 12:09:34.829733
2248 12:09:34.835971 Bootfile predefined by user: 8123212/tftp-deploy-i5h3gqfk/kernel/bzImage
2249 12:09:34.836622
2250 12:09:34.839522 Sending tftp read request... done.
2251 12:09:34.840154
2252 12:09:34.846122 Waiting for the transfer...
2253 12:09:34.846616
2254 12:09:35.530918 00000000 ################################################################
2255 12:09:35.531441
2256 12:09:36.214275 00080000 ################################################################
2257 12:09:36.214828
2258 12:09:36.899182 00100000 ################################################################
2259 12:09:36.899704
2260 12:09:37.580765 00180000 ################################################################
2261 12:09:37.581281
2262 12:09:38.267283 00200000 ################################################################
2263 12:09:38.267865
2264 12:09:38.952347 00280000 ################################################################
2265 12:09:38.952889
2266 12:09:39.630652 00300000 ################################################################
2267 12:09:39.631166
2268 12:09:40.325285 00380000 ################################################################
2269 12:09:40.325839
2270 12:09:41.005071 00400000 ################################################################
2271 12:09:41.005492
2272 12:09:41.693754 00480000 ################################################################
2273 12:09:41.694297
2274 12:09:42.384093 00500000 ################################################################
2275 12:09:42.384717
2276 12:09:43.090210 00580000 ################################################################
2277 12:09:43.090854
2278 12:09:43.803856 00600000 ################################################################
2279 12:09:43.804437
2280 12:09:44.222176 00680000 ###################################### done.
2281 12:09:44.222744
2282 12:09:44.225340 The bootfile was 7126928 bytes long.
2283 12:09:44.225799
2284 12:09:44.229352 Sending tftp read request... done.
2285 12:09:44.229855
2286 12:09:44.232290 Waiting for the transfer...
2287 12:09:44.232749
2288 12:09:44.905990 00000000 ################################################################
2289 12:09:44.906532
2290 12:09:45.595164 00080000 ################################################################
2291 12:09:45.595557
2292 12:09:46.276383 00100000 ################################################################
2293 12:09:46.276956
2294 12:09:46.949307 00180000 ################################################################
2295 12:09:46.949719
2296 12:09:47.625907 00200000 ################################################################
2297 12:09:47.626525
2298 12:09:48.307466 00280000 ################################################################
2299 12:09:48.308009
2300 12:09:48.980200 00300000 ################################################################
2301 12:09:48.980752
2302 12:09:49.669197 00380000 ################################################################
2303 12:09:49.669776
2304 12:09:50.349434 00400000 ################################################################
2305 12:09:50.349991
2306 12:09:51.035207 00480000 ################################################################
2307 12:09:51.035761
2308 12:09:51.365540 00500000 ################################ done.
2309 12:09:51.366083
2310 12:09:51.369337 Sending tftp read request... done.
2311 12:09:51.369912
2312 12:09:51.372347 Waiting for the transfer...
2313 12:09:51.372807
2314 12:09:51.373270 00000000 # done.
2315 12:09:51.373747
2316 12:09:51.381999 Command line loaded dynamically from TFTP file: 8123212/tftp-deploy-i5h3gqfk/kernel/cmdline
2317 12:09:51.382338
2318 12:09:51.405283 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8123212/extract-nfsrootfs-0wbyo45m,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2319 12:09:51.405729
2320 12:09:51.412688 Shutting down all USB controllers.
2321 12:09:51.413012
2322 12:09:51.413343 Removing current net device
2323 12:09:51.413684
2324 12:09:51.415646 Finalizing coreboot
2325 12:09:51.415973
2326 12:09:51.422566 Exiting depthcharge with code 4 at timestamp: 26658576
2327 12:09:51.422904
2328 12:09:51.423226
2329 12:09:51.423540 Starting kernel ...
2330 12:09:51.423842
2331 12:09:51.424176
2332 12:09:51.424510
2333 12:09:51.425366 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2334 12:09:51.425781 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2335 12:09:51.426066 Setting prompt string to ['Linux version [0-9]']
2336 12:09:51.426326 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2337 12:09:51.426584 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2339 12:14:16.426554 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2341 12:14:16.427780 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2343 12:14:16.428596 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2346 12:14:16.430038 end: 2 depthcharge-action (duration 00:05:00) [common]
2348 12:14:16.431192 Cleaning after the job
2349 12:14:16.431599 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/ramdisk
2350 12:14:16.433696 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/kernel
2351 12:14:16.436224 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/nfsrootfs
2352 12:14:16.489861 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123212/tftp-deploy-i5h3gqfk/modules
2353 12:14:16.490177 start: 5.1 power-off (timeout 00:00:30) [common]
2354 12:14:16.490354 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2355 12:14:16.509824 >> Command sent successfully.
2356 12:14:16.511746 Returned 0 in 0 seconds
2357 12:14:16.612873 end: 5.1 power-off (duration 00:00:00) [common]
2359 12:14:16.614714 start: 5.2 read-feedback (timeout 00:10:00) [common]
2360 12:14:16.615992 Listened to connection for namespace 'common' for up to 1s
2361 12:14:17.619844 Finalising connection for namespace 'common'
2362 12:14:17.620554 Disconnecting from shell: Finalise
2363 12:14:17.721531 end: 5.2 read-feedback (duration 00:00:01) [common]
2364 12:14:17.721699 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8123212
2365 12:14:17.819437 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8123212
2366 12:14:17.819645 JobError: Your job cannot terminate cleanly.