Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:08:56.172677 lava-dispatcher, installed at version: 2022.10
2 12:08:56.172866 start: 0 validate
3 12:08:56.173009 Start time: 2022-11-25 12:08:56.173002+00:00 (UTC)
4 12:08:56.173141 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:08:56.173284 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20221107.1%2Famd64%2Frootfs.cpio.gz exists
6 12:08:56.182344 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:08:56.182491 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:08:56.184267 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:08:56.184396 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:08:56.193404 validate duration: 0.02
12 12:08:56.193704 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:08:56.193809 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:08:56.193913 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:08:56.194026 Not decompressing ramdisk as can be used compressed.
16 12:08:56.194118 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20221107.1/amd64/rootfs.cpio.gz
17 12:08:56.194189 saving as /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/ramdisk/rootfs.cpio.gz
18 12:08:56.194260 total size: 35753913 (34MB)
19 12:08:56.197055 progress 0% (0MB)
20 12:08:56.258682 progress 5% (1MB)
21 12:08:56.321641 progress 10% (3MB)
22 12:08:56.380543 progress 15% (5MB)
23 12:08:56.441190 progress 20% (6MB)
24 12:08:56.503067 progress 25% (8MB)
25 12:08:56.563734 progress 30% (10MB)
26 12:08:56.623121 progress 35% (11MB)
27 12:08:56.684894 progress 40% (13MB)
28 12:08:56.744734 progress 45% (15MB)
29 12:08:56.805014 progress 50% (17MB)
30 12:08:56.867882 progress 55% (18MB)
31 12:08:56.927772 progress 60% (20MB)
32 12:08:56.988458 progress 65% (22MB)
33 12:08:57.049340 progress 70% (23MB)
34 12:08:57.110587 progress 75% (25MB)
35 12:08:57.169154 progress 80% (27MB)
36 12:08:57.230222 progress 85% (29MB)
37 12:08:57.292196 progress 90% (30MB)
38 12:08:57.352491 progress 95% (32MB)
39 12:08:57.411200 progress 100% (34MB)
40 12:08:57.411434 34MB downloaded in 1.22s (28.01MB/s)
41 12:08:57.411598 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:08:57.411860 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:08:57.411954 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:08:57.412046 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:08:57.412157 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:08:57.412229 saving as /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/kernel/bzImage
48 12:08:57.412294 total size: 7126928 (6MB)
49 12:08:57.412359 No compression specified
50 12:08:57.702322 progress 0% (0MB)
51 12:08:57.711133 progress 5% (0MB)
52 12:08:57.720077 progress 10% (0MB)
53 12:08:57.729837 progress 15% (1MB)
54 12:08:57.739086 progress 20% (1MB)
55 12:08:57.747522 progress 25% (1MB)
56 12:08:57.756704 progress 30% (2MB)
57 12:08:57.767451 progress 35% (2MB)
58 12:08:57.774609 progress 40% (2MB)
59 12:08:57.783771 progress 45% (3MB)
60 12:08:57.792988 progress 50% (3MB)
61 12:08:57.802182 progress 55% (3MB)
62 12:08:57.811410 progress 60% (4MB)
63 12:08:57.820641 progress 65% (4MB)
64 12:08:57.829849 progress 70% (4MB)
65 12:08:57.838898 progress 75% (5MB)
66 12:08:57.847742 progress 80% (5MB)
67 12:08:57.856944 progress 85% (5MB)
68 12:08:57.866121 progress 90% (6MB)
69 12:08:57.876060 progress 95% (6MB)
70 12:08:57.885536 progress 100% (6MB)
71 12:08:57.885774 6MB downloaded in 0.47s (14.36MB/s)
72 12:08:57.885934 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:08:57.886192 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:08:57.886286 start: 1.3 download-retry (timeout 00:09:58) [common]
76 12:08:57.886378 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 12:08:57.886489 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:08:57.886569 saving as /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/modules/modules.tar
79 12:08:57.886635 total size: 52100 (0MB)
80 12:08:57.886702 Using unxz to decompress xz
81 12:08:57.891245 progress 62% (0MB)
82 12:08:57.891637 progress 100% (0MB)
83 12:08:57.895003 0MB downloaded in 0.01s (5.94MB/s)
84 12:08:57.895244 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:08:57.895526 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:08:57.895637 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 12:08:57.895739 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 12:08:57.895832 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:08:57.895924 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 12:08:57.896094 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37
92 12:08:57.896211 makedir: /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin
93 12:08:57.896303 makedir: /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/tests
94 12:08:57.896396 makedir: /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/results
95 12:08:57.896509 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-add-keys
96 12:08:57.896649 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-add-sources
97 12:08:57.896773 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-background-process-start
98 12:08:57.896896 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-background-process-stop
99 12:08:57.897019 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-common-functions
100 12:08:57.897134 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-echo-ipv4
101 12:08:57.897252 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-install-packages
102 12:08:57.897370 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-installed-packages
103 12:08:57.897498 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-os-build
104 12:08:57.897619 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-probe-channel
105 12:08:57.897741 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-probe-ip
106 12:08:57.897857 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-target-ip
107 12:08:57.897980 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-target-mac
108 12:08:57.898096 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-target-storage
109 12:08:57.898216 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-case
110 12:08:57.898332 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-event
111 12:08:57.898448 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-feedback
112 12:08:57.898571 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-raise
113 12:08:57.898699 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-reference
114 12:08:57.898819 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-runner
115 12:08:57.898936 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-set
116 12:08:57.899059 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-test-shell
117 12:08:57.899177 Updating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-install-packages (oe)
118 12:08:57.899303 Updating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/bin/lava-installed-packages (oe)
119 12:08:57.899414 Creating /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/environment
120 12:08:57.899510 LAVA metadata
121 12:08:57.899587 - LAVA_JOB_ID=8123207
122 12:08:57.899658 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:08:57.899766 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 12:08:57.899837 skipped lava-vland-overlay
125 12:08:57.899925 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:08:57.900015 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 12:08:57.900084 skipped lava-multinode-overlay
128 12:08:57.900165 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:08:57.900254 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 12:08:57.900334 Loading test definitions
131 12:08:57.900440 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 12:08:57.900521 Using /lava-8123207 at stage 0
133 12:08:57.900788 uuid=8123207_1.4.2.3.1 testdef=None
134 12:08:57.900886 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:08:57.900991 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 12:08:57.901489 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:08:57.901742 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 12:08:57.902322 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:08:57.902583 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 12:08:57.903127 runner path: /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/0/tests/0_cros-ec test_uuid 8123207_1.4.2.3.1
143 12:08:57.903286 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:08:57.903517 Creating lava-test-runner.conf files
146 12:08:57.903588 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123207/lava-overlay-m4_pnf37/lava-8123207/0 for stage 0
147 12:08:57.903676 - 0_cros-ec
148 12:08:57.903774 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 12:08:57.903875 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
150 12:08:57.909105 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 12:08:57.909304 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
152 12:08:57.909400 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 12:08:57.909498 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 12:08:57.909594 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
155 12:08:58.663731 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 12:08:58.664068 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
157 12:08:58.664183 extracting modules file /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123207/extract-overlay-ramdisk-vxiyt6nr/ramdisk
158 12:08:58.668479 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 12:08:58.668597 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
160 12:08:58.668683 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123207/compress-overlay-o3e61cgv/overlay-1.4.2.4.tar.gz to ramdisk
161 12:08:58.668774 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123207/compress-overlay-o3e61cgv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8123207/extract-overlay-ramdisk-vxiyt6nr/ramdisk
162 12:08:58.671950 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 12:08:58.672067 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
164 12:08:58.672163 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 12:08:58.672258 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
166 12:08:58.672340 Building ramdisk /var/lib/lava/dispatcher/tmp/8123207/extract-overlay-ramdisk-vxiyt6nr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8123207/extract-overlay-ramdisk-vxiyt6nr/ramdisk
167 12:08:58.918044 >> 182463 blocks
168 12:09:02.042111 rename /var/lib/lava/dispatcher/tmp/8123207/extract-overlay-ramdisk-vxiyt6nr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/ramdisk/ramdisk.cpio.gz
169 12:09:02.042506 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 12:09:02.042626 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
171 12:09:02.042733 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
172 12:09:02.042828 No mkimage arch provided, not using FIT.
173 12:09:02.042918 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 12:09:02.043003 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 12:09:02.043099 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 12:09:02.043194 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
177 12:09:02.043269 No LXC device requested
178 12:09:02.043354 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 12:09:02.043445 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
180 12:09:02.043532 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 12:09:02.043605 Checking files for TFTP limit of 4294967296 bytes.
182 12:09:02.043986 end: 1 tftp-deploy (duration 00:00:06) [common]
183 12:09:02.044092 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 12:09:02.044187 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 12:09:02.044313 substitutions:
186 12:09:02.044382 - {DTB}: None
187 12:09:02.044449 - {INITRD}: 8123207/tftp-deploy-uadu3zi_/ramdisk/ramdisk.cpio.gz
188 12:09:02.044511 - {KERNEL}: 8123207/tftp-deploy-uadu3zi_/kernel/bzImage
189 12:09:02.044573 - {LAVA_MAC}: None
190 12:09:02.044630 - {PRESEED_CONFIG}: None
191 12:09:02.044687 - {PRESEED_LOCAL}: None
192 12:09:02.044746 - {RAMDISK}: 8123207/tftp-deploy-uadu3zi_/ramdisk/ramdisk.cpio.gz
193 12:09:02.044802 - {ROOT_PART}: None
194 12:09:02.044858 - {ROOT}: None
195 12:09:02.044914 - {SERVER_IP}: 192.168.201.1
196 12:09:02.044970 - {TEE}: None
197 12:09:02.045062 Parsed boot commands:
198 12:09:02.045116 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 12:09:02.045271 Parsed boot commands: tftpboot 192.168.201.1 8123207/tftp-deploy-uadu3zi_/kernel/bzImage 8123207/tftp-deploy-uadu3zi_/kernel/cmdline 8123207/tftp-deploy-uadu3zi_/ramdisk/ramdisk.cpio.gz
200 12:09:02.045364 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 12:09:02.045450 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 12:09:02.045581 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 12:09:02.045667 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 12:09:02.045760 Not connected, no need to disconnect.
205 12:09:02.045842 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 12:09:02.045925 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 12:09:02.045994 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
208 12:09:02.048491 Setting prompt string to ['lava-test: # ']
209 12:09:02.048778 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 12:09:02.048885 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 12:09:02.048990 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 12:09:02.049085 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 12:09:02.049263 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
214 12:09:02.068602 >> Command sent successfully.
215 12:09:02.070594 Returned 0 in 0 seconds
216 12:09:02.171374 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 12:09:02.171702 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 12:09:02.171801 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 12:09:02.171892 Setting prompt string to 'Starting depthcharge on Voema...'
221 12:09:02.171959 Changing prompt to 'Starting depthcharge on Voema...'
222 12:09:02.172027 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 12:09:02.172296 [Enter `^Ec?' for help]
224 12:09:10.424021
225 12:09:10.424711
226 12:09:10.433932 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 12:09:10.436996 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 12:09:10.443427 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 12:09:10.447149 CPU: AES supported, TXT NOT supported, VT supported
230 12:09:10.453888 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 12:09:10.457183 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 12:09:10.460107
233 12:09:10.463890 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
234 12:09:10.466741 VBOOT: Loading verstage.
235 12:09:10.470414 FMAP: Found "FLASH" version 1.1 at 0x1804000.
236 12:09:10.476745 FMAP: base = 0x0 size = 0x2000000 #areas = 32
237 12:09:10.480662 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
238 12:09:10.491165 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
239 12:09:10.497280 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
240 12:09:10.497871
241 12:09:10.498268
242 12:09:10.510617 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
243 12:09:10.524200 Probing TPM: . done!
244 12:09:10.527606 TPM ready after 0 ms
245 12:09:10.531042 Connected to device vid:did:rid of 1ae0:0028:00
246 12:09:10.542580 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
247 12:09:10.548762 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
248 12:09:10.552566 Initialized TPM device CR50 revision 0
249 12:09:10.603010 tlcl_send_startup: Startup return code is 0
250 12:09:10.603650 TPM: setup succeeded
251 12:09:10.618306 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
252 12:09:10.633573 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
253 12:09:10.647211 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
254 12:09:10.657700 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
255 12:09:10.661304 Chrome EC: UHEPI supported
256 12:09:10.664578 Phase 1
257 12:09:10.667838 FMAP: area GBB found @ 1805000 (458752 bytes)
258 12:09:10.674656 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
259 12:09:10.677586
260 12:09:10.684166 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
261 12:09:10.691104 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
262 12:09:10.697782 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
263 12:09:10.700796 Recovery requested (1009000e)
264 12:09:10.704341 TPM: Extending digest for VBOOT: boot mode into PCR 0
265 12:09:10.715657 tlcl_extend: response is 0
266 12:09:10.722245 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
267 12:09:10.732240 tlcl_extend: response is 0
268 12:09:10.739194 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 12:09:10.745505 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
270 12:09:10.752460 BS: verstage times (exec / console): total (unknown) / 142 ms
271 12:09:10.753021
272 12:09:10.753414
273 12:09:10.765510 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
274 12:09:10.772156 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
275 12:09:10.775646 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
276 12:09:10.778729 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
277 12:09:10.785389 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
278 12:09:10.788567 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
279 12:09:10.792072 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
280 12:09:10.795524 TCO_STS: 0000 0000
281 12:09:10.798449 GEN_PMCON: d0015038 00002200
282 12:09:10.802012 GBLRST_CAUSE: 00000000 00000000
283 12:09:10.802504 HPR_CAUSE0: 00000000
284 12:09:10.805054
285 12:09:10.805578 prev_sleep_state 5
286 12:09:10.808801 Boot Count incremented to 12943
287 12:09:10.815330 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 12:09:10.821944 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
289 12:09:10.828616 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
290 12:09:10.831884
291 12:09:10.838346 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
292 12:09:10.841926 Chrome EC: UHEPI supported
293 12:09:10.848516 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
294 12:09:10.859657 Probing TPM: done!
295 12:09:10.866967 Connected to device vid:did:rid of 1ae0:0028:00
296 12:09:10.877078 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
297 12:09:10.884474 Initialized TPM device CR50 revision 0
298 12:09:10.894674 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
299 12:09:10.901135 MRC: Hash idx 0x100b comparison successful.
300 12:09:10.904790 MRC cache found, size faa8
301 12:09:10.905386 bootmode is set to: 2
302 12:09:10.907818 SPD index = 0
303 12:09:10.914368 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
304 12:09:10.917441 SPD: module type is LPDDR4X
305 12:09:10.921131 SPD: module part number is MT53E512M64D4NW-046
306 12:09:10.927502 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
307 12:09:10.930638 SPD: device width 16 bits, bus width 16 bits
308 12:09:10.937203 SPD: module size is 1024 MB (per channel)
309 12:09:11.369777 CBMEM:
310 12:09:11.372942 IMD: root @ 0x76fff000 254 entries.
311 12:09:11.375955 IMD: root @ 0x76ffec00 62 entries.
312 12:09:11.379677 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
313 12:09:11.386035 FMAP: area RW_VPD found @ f35000 (8192 bytes)
314 12:09:11.389674 External stage cache:
315 12:09:11.392858 IMD: root @ 0x7b3ff000 254 entries.
316 12:09:11.395886 IMD: root @ 0x7b3fec00 62 entries.
317 12:09:11.411503 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
318 12:09:11.417915 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
319 12:09:11.424619 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
320 12:09:11.438408 MRC: 'RECOVERY_MRC_CACHE' does not need update.
321 12:09:11.442409 cse_lite: Skip switching to RW in the recovery path
322 12:09:11.445849 8 DIMMs found
323 12:09:11.446480 SMM Memory Map
324 12:09:11.449781 SMRAM : 0x7b000000 0x800000
325 12:09:11.452798 Subregion 0: 0x7b000000 0x200000
326 12:09:11.456526 Subregion 1: 0x7b200000 0x200000
327 12:09:11.459712 Subregion 2: 0x7b400000 0x400000
328 12:09:11.462927 top_of_ram = 0x77000000
329 12:09:11.469432 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
330 12:09:11.472550 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
331 12:09:11.479430 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
332 12:09:11.482699 MTRR Range: Start=ff000000 End=0 (Size 1000000)
333 12:09:11.492579 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
334 12:09:11.499293 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
335 12:09:11.509223 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
336 12:09:11.512383 Processing 211 relocs. Offset value of 0x74c0b000
337 12:09:11.521570 BS: romstage times (exec / console): total (unknown) / 277 ms
338 12:09:11.527732
339 12:09:11.528337
340 12:09:11.537300 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
341 12:09:11.540430 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 12:09:11.550870 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 12:09:11.557376 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 12:09:11.563776 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
345 12:09:11.570233 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
346 12:09:11.617267 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
347 12:09:11.624387 Processing 5008 relocs. Offset value of 0x75d98000
348 12:09:11.627349 BS: postcar times (exec / console): total (unknown) / 59 ms
349 12:09:11.627963
350 12:09:11.630826
351 12:09:11.631325
352 12:09:11.640775 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
353 12:09:11.641284 Normal boot
354 12:09:11.644260 FW_CONFIG value is 0x804c02
355 12:09:11.647666 PCI: 00:07.0 disabled by fw_config
356 12:09:11.650809 PCI: 00:07.1 disabled by fw_config
357 12:09:11.654139 PCI: 00:0d.2 disabled by fw_config
358 12:09:11.657883 PCI: 00:1c.7 disabled by fw_config
359 12:09:11.664332 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
360 12:09:11.671104 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 12:09:11.674267 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 12:09:11.677367 GENERIC: 0.0 disabled by fw_config
363 12:09:11.680924 GENERIC: 1.0 disabled by fw_config
364 12:09:11.687563 fw_config match found: DB_USB=USB3_ACTIVE
365 12:09:11.691028 fw_config match found: DB_USB=USB3_ACTIVE
366 12:09:11.694413 fw_config match found: DB_USB=USB3_ACTIVE
367 12:09:11.697613 fw_config match found: DB_USB=USB3_ACTIVE
368 12:09:11.700766
369 12:09:11.704222 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 12:09:11.710841 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 12:09:11.720454 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 12:09:11.727529 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 12:09:11.730244 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 12:09:11.737409 microcode: Update skipped, already up-to-date
375 12:09:11.743801 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 12:09:11.770740 Detected 4 core, 8 thread CPU.
377 12:09:11.774403 Setting up SMI for CPU
378 12:09:11.777348 IED base = 0x7b400000
379 12:09:11.777989 IED size = 0x00400000
380 12:09:11.781144 Will perform SMM setup.
381 12:09:11.787819 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 12:09:11.794168 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 12:09:11.800874 Processing 16 relocs. Offset value of 0x00030000
384 12:09:11.804742 Attempting to start 7 APs
385 12:09:11.807466 Waiting for 10ms after sending INIT.
386 12:09:11.823046 Waiting for 1st SIPI to complete...done.
387 12:09:11.823603 AP: slot 1 apic_id 1.
388 12:09:11.826520 AP: slot 5 apic_id 4.
389 12:09:11.829619 AP: slot 4 apic_id 2.
390 12:09:11.830120 AP: slot 3 apic_id 7.
391 12:09:11.833438 AP: slot 6 apic_id 6.
392 12:09:11.836177 AP: slot 7 apic_id 3.
393 12:09:11.836680 AP: slot 2 apic_id 5.
394 12:09:11.842877 Waiting for 2nd SIPI to complete...done.
395 12:09:11.849943 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 12:09:11.856376 Processing 13 relocs. Offset value of 0x00038000
397 12:09:11.859362 Unable to locate Global NVS
398 12:09:11.866010 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 12:09:11.869473 Installing permanent SMM handler to 0x7b000000
400 12:09:11.879208 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 12:09:11.882294 Processing 794 relocs. Offset value of 0x7b010000
402 12:09:11.892559 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 12:09:11.896056 Processing 13 relocs. Offset value of 0x7b008000
404 12:09:11.902557 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 12:09:11.908712 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 12:09:11.915365 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 12:09:11.918979 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 12:09:11.925320 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 12:09:11.932130 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 12:09:11.938834 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 12:09:11.941791 Unable to locate Global NVS
412 12:09:11.948529 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 12:09:11.951552 Clearing SMI status registers
414 12:09:11.955187 SMI_STS: PM1
415 12:09:11.955678 PM1_STS: PWRBTN
416 12:09:11.961517 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 12:09:11.964998 In relocation handler: CPU 0
418 12:09:11.968460 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 12:09:11.975114 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 12:09:11.978000 Relocation complete.
421 12:09:11.985034 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 12:09:11.988186 In relocation handler: CPU 1
423 12:09:11.991409 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 12:09:11.994605 Relocation complete.
425 12:09:12.001414 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
426 12:09:12.004613 In relocation handler: CPU 6
427 12:09:12.008140 New SMBASE=0x7affe800 IEDBASE=0x7b400000
428 12:09:12.011314 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 12:09:12.014634 Relocation complete.
430 12:09:12.021032 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
431 12:09:12.024676 In relocation handler: CPU 3
432 12:09:12.027756 New SMBASE=0x7afff400 IEDBASE=0x7b400000
433 12:09:12.030894 Relocation complete.
434 12:09:12.037540 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
435 12:09:12.041078 In relocation handler: CPU 4
436 12:09:12.044062 New SMBASE=0x7afff000 IEDBASE=0x7b400000
437 12:09:12.051084 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 12:09:12.051607 Relocation complete.
439 12:09:12.054415
440 12:09:12.060898 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
441 12:09:12.064403 In relocation handler: CPU 7
442 12:09:12.067287 New SMBASE=0x7affe400 IEDBASE=0x7b400000
443 12:09:12.067781 Relocation complete.
444 12:09:12.077299 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
445 12:09:12.080629 In relocation handler: CPU 5
446 12:09:12.084067 New SMBASE=0x7affec00 IEDBASE=0x7b400000
447 12:09:12.087293 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 12:09:12.090986 Relocation complete.
449 12:09:12.097309 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
450 12:09:12.100979 In relocation handler: CPU 2
451 12:09:12.104051 New SMBASE=0x7afff800 IEDBASE=0x7b400000
452 12:09:12.107724 Relocation complete.
453 12:09:12.108252 Initializing CPU #0
454 12:09:12.110855 CPU: vendor Intel device 806c1
455 12:09:12.115122 CPU: family 06, model 8c, stepping 01
456 12:09:12.118468 Clearing out pending MCEs
457 12:09:12.121639 Setting up local APIC...
458 12:09:12.124747 apic_id: 0x00 done.
459 12:09:12.128413 Turbo is available but hidden
460 12:09:12.128920 Turbo is available and visible
461 12:09:12.131755
462 12:09:12.135072 microcode: Update skipped, already up-to-date
463 12:09:12.138107 CPU #0 initialized
464 12:09:12.138600 Initializing CPU #5
465 12:09:12.141196 Initializing CPU #2
466 12:09:12.144695 CPU: vendor Intel device 806c1
467 12:09:12.148159 CPU: family 06, model 8c, stepping 01
468 12:09:12.151295 CPU: vendor Intel device 806c1
469 12:09:12.154802 CPU: family 06, model 8c, stepping 01
470 12:09:12.158021 Clearing out pending MCEs
471 12:09:12.161400 Clearing out pending MCEs
472 12:09:12.161934 Setting up local APIC...
473 12:09:12.164907 Initializing CPU #7
474 12:09:12.168168 Initializing CPU #4
475 12:09:12.168775 CPU: vendor Intel device 806c1
476 12:09:12.171818
477 12:09:12.174826 CPU: family 06, model 8c, stepping 01
478 12:09:12.177687 CPU: vendor Intel device 806c1
479 12:09:12.181222 CPU: family 06, model 8c, stepping 01
480 12:09:12.184297 Clearing out pending MCEs
481 12:09:12.184785 Initializing CPU #3
482 12:09:12.187947 Initializing CPU #6
483 12:09:12.191130 CPU: vendor Intel device 806c1
484 12:09:12.194318 CPU: family 06, model 8c, stepping 01
485 12:09:12.198041 CPU: vendor Intel device 806c1
486 12:09:12.201178 CPU: family 06, model 8c, stepping 01
487 12:09:12.204279 Clearing out pending MCEs
488 12:09:12.207788 Clearing out pending MCEs
489 12:09:12.208275 Setting up local APIC...
490 12:09:12.211066 Setting up local APIC...
491 12:09:12.214244 Setting up local APIC...
492 12:09:12.217852 Setting up local APIC...
493 12:09:12.218344 apic_id: 0x04 done.
494 12:09:12.220765 apic_id: 0x05 done.
495 12:09:12.224520 apic_id: 0x03 done.
496 12:09:12.225008 Clearing out pending MCEs
497 12:09:12.230867 microcode: Update skipped, already up-to-date
498 12:09:12.231396 Setting up local APIC...
499 12:09:12.234016 apic_id: 0x06 done.
500 12:09:12.237720 apic_id: 0x07 done.
501 12:09:12.240924 microcode: Update skipped, already up-to-date
502 12:09:12.247653 microcode: Update skipped, already up-to-date
503 12:09:12.248190 apic_id: 0x02 done.
504 12:09:12.250999 CPU #7 initialized
505 12:09:12.254450 microcode: Update skipped, already up-to-date
506 12:09:12.257602 Initializing CPU #1
507 12:09:12.260541 microcode: Update skipped, already up-to-date
508 12:09:12.267259 microcode: Update skipped, already up-to-date
509 12:09:12.267713 CPU #2 initialized
510 12:09:12.270618 CPU #5 initialized
511 12:09:12.271104 CPU #4 initialized
512 12:09:12.274329 CPU: vendor Intel device 806c1
513 12:09:12.277346 CPU: family 06, model 8c, stepping 01
514 12:09:12.280276 Clearing out pending MCEs
515 12:09:12.283929 CPU #3 initialized
516 12:09:12.284372 CPU #6 initialized
517 12:09:12.287370 Setting up local APIC...
518 12:09:12.290454 apic_id: 0x01 done.
519 12:09:12.293679 microcode: Update skipped, already up-to-date
520 12:09:12.296931 CPU #1 initialized
521 12:09:12.300722 bsp_do_flight_plan done after 455 msecs.
522 12:09:12.303927 CPU: frequency set to 4000 MHz
523 12:09:12.307086 Enabling SMIs.
524 12:09:12.310813 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
525 12:09:12.313884
526 12:09:12.328032 SATAXPCIE1 indicates PCIe NVMe is present
527 12:09:12.331414 Probing TPM: done!
528 12:09:12.334992 Connected to device vid:did:rid of 1ae0:0028:00
529 12:09:12.345596 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
530 12:09:12.348709 Initialized TPM device CR50 revision 0
531 12:09:12.352121 Enabling S0i3.4
532 12:09:12.358312 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
533 12:09:12.361879 Found a VBT of 8704 bytes after decompression
534 12:09:12.368360 cse_lite: CSE RO boot. HybridStorageMode disabled
535 12:09:12.374757 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
536 12:09:12.450943 FSPS returned 0
537 12:09:12.454304 Executing Phase 1 of FspMultiPhaseSiInit
538 12:09:12.464736 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
539 12:09:12.467723 port C0 DISC req: usage 1 usb3 1 usb2 5
540 12:09:12.470867 Raw Buffer output 0 00000511
541 12:09:12.473849 Raw Buffer output 1 00000000
542 12:09:12.478091 pmc_send_ipc_cmd succeeded
543 12:09:12.481029 port C1 DISC req: usage 1 usb3 2 usb2 3
544 12:09:12.484445
545 12:09:12.484761 Raw Buffer output 0 00000321
546 12:09:12.488249 Raw Buffer output 1 00000000
547 12:09:12.492395 pmc_send_ipc_cmd succeeded
548 12:09:12.497564 Detected 4 core, 8 thread CPU.
549 12:09:12.500510 Detected 4 core, 8 thread CPU.
550 12:09:12.734220 Display FSP Version Info HOB
551 12:09:12.737753 Reference Code - CPU = a.0.4c.31
552 12:09:12.740926 uCode Version = 0.0.0.86
553 12:09:12.744422 TXT ACM version = ff.ff.ff.ffff
554 12:09:12.747775 Reference Code - ME = a.0.4c.31
555 12:09:12.751165 MEBx version = 0.0.0.0
556 12:09:12.754220 ME Firmware Version = Consumer SKU
557 12:09:12.757811 Reference Code - PCH = a.0.4c.31
558 12:09:12.761215 PCH-CRID Status = Disabled
559 12:09:12.764430 PCH-CRID Original Value = ff.ff.ff.ffff
560 12:09:12.767569 PCH-CRID New Value = ff.ff.ff.ffff
561 12:09:12.771273 OPROM - RST - RAID = ff.ff.ff.ffff
562 12:09:12.774019 PCH Hsio Version = 4.0.0.0
563 12:09:12.777651 Reference Code - SA - System Agent = a.0.4c.31
564 12:09:12.781188 Reference Code - MRC = 2.0.0.1
565 12:09:12.784267 SA - PCIe Version = a.0.4c.31
566 12:09:12.787710 SA-CRID Status = Disabled
567 12:09:12.790781 SA-CRID Original Value = 0.0.0.1
568 12:09:12.794169 SA-CRID New Value = 0.0.0.1
569 12:09:12.797721 OPROM - VBIOS = ff.ff.ff.ffff
570 12:09:12.801005 IO Manageability Engine FW Version = 11.1.4.0
571 12:09:12.803998 PHY Build Version = 0.0.0.e0
572 12:09:12.807236 Thunderbolt(TM) FW Version = 0.0.0.0
573 12:09:12.814099 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
574 12:09:12.818007 ITSS IRQ Polarities Before:
575 12:09:12.818592 IPC0: 0xffffffff
576 12:09:12.821010 IPC1: 0xffffffff
577 12:09:12.821515 IPC2: 0xffffffff
578 12:09:12.824004 IPC3: 0xffffffff
579 12:09:12.827478 ITSS IRQ Polarities After:
580 12:09:12.827958 IPC0: 0xffffffff
581 12:09:12.830640 IPC1: 0xffffffff
582 12:09:12.831292 IPC2: 0xffffffff
583 12:09:12.833958 IPC3: 0xffffffff
584 12:09:12.837548 Found PCIe Root Port #9 at PCI: 00:1d.0.
585 12:09:12.851137 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
586 12:09:12.860749 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
587 12:09:12.873798 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
588 12:09:12.880665 BS: BS_DEV_INIT_CHIPS run times (exec / console): 324 / 237 ms
589 12:09:12.883593 Enumerating buses...
590 12:09:12.887096 Show all devs... Before device enumeration.
591 12:09:12.890674 Root Device: enabled 1
592 12:09:12.891264 DOMAIN: 0000: enabled 1
593 12:09:12.893604 CPU_CLUSTER: 0: enabled 1
594 12:09:12.896905 PCI: 00:00.0: enabled 1
595 12:09:12.900290 PCI: 00:02.0: enabled 1
596 12:09:12.900873 PCI: 00:04.0: enabled 1
597 12:09:12.903663 PCI: 00:05.0: enabled 1
598 12:09:12.907288 PCI: 00:06.0: enabled 0
599 12:09:12.907886 PCI: 00:07.0: enabled 0
600 12:09:12.910375
601 12:09:12.910878 PCI: 00:07.1: enabled 0
602 12:09:12.913437 PCI: 00:07.2: enabled 0
603 12:09:12.917466 PCI: 00:07.3: enabled 0
604 12:09:12.918087 PCI: 00:08.0: enabled 1
605 12:09:12.920308 PCI: 00:09.0: enabled 0
606 12:09:12.923674 PCI: 00:0a.0: enabled 0
607 12:09:12.927145 PCI: 00:0d.0: enabled 1
608 12:09:12.927644 PCI: 00:0d.1: enabled 0
609 12:09:12.930406 PCI: 00:0d.2: enabled 0
610 12:09:12.933558 PCI: 00:0d.3: enabled 0
611 12:09:12.937111 PCI: 00:0e.0: enabled 0
612 12:09:12.937740 PCI: 00:10.2: enabled 1
613 12:09:12.940506 PCI: 00:10.6: enabled 0
614 12:09:12.943787 PCI: 00:10.7: enabled 0
615 12:09:12.946881 PCI: 00:12.0: enabled 0
616 12:09:12.947465 PCI: 00:12.6: enabled 0
617 12:09:12.950509 PCI: 00:13.0: enabled 0
618 12:09:12.953782 PCI: 00:14.0: enabled 1
619 12:09:12.954371 PCI: 00:14.1: enabled 0
620 12:09:12.957001 PCI: 00:14.2: enabled 1
621 12:09:12.960350 PCI: 00:14.3: enabled 1
622 12:09:12.964016 PCI: 00:15.0: enabled 1
623 12:09:12.964605 PCI: 00:15.1: enabled 1
624 12:09:12.966770 PCI: 00:15.2: enabled 1
625 12:09:12.970244 PCI: 00:15.3: enabled 1
626 12:09:12.973440 PCI: 00:16.0: enabled 1
627 12:09:12.974090 PCI: 00:16.1: enabled 0
628 12:09:12.976843 PCI: 00:16.2: enabled 0
629 12:09:12.980240 PCI: 00:16.3: enabled 0
630 12:09:12.983175 PCI: 00:16.4: enabled 0
631 12:09:12.983652 PCI: 00:16.5: enabled 0
632 12:09:12.986911 PCI: 00:17.0: enabled 1
633 12:09:12.989859 PCI: 00:19.0: enabled 0
634 12:09:12.990344 PCI: 00:19.1: enabled 1
635 12:09:12.993508
636 12:09:12.994005 PCI: 00:19.2: enabled 0
637 12:09:12.996447 PCI: 00:1c.0: enabled 1
638 12:09:12.999827 PCI: 00:1c.1: enabled 0
639 12:09:13.000442 PCI: 00:1c.2: enabled 0
640 12:09:13.003435 PCI: 00:1c.3: enabled 0
641 12:09:13.006574 PCI: 00:1c.4: enabled 0
642 12:09:13.009549 PCI: 00:1c.5: enabled 0
643 12:09:13.010039 PCI: 00:1c.6: enabled 1
644 12:09:13.013551 PCI: 00:1c.7: enabled 0
645 12:09:13.016763 PCI: 00:1d.0: enabled 1
646 12:09:13.019903 PCI: 00:1d.1: enabled 0
647 12:09:13.020498 PCI: 00:1d.2: enabled 1
648 12:09:13.023244 PCI: 00:1d.3: enabled 0
649 12:09:13.026506 PCI: 00:1e.0: enabled 1
650 12:09:13.029952 PCI: 00:1e.1: enabled 0
651 12:09:13.030440 PCI: 00:1e.2: enabled 1
652 12:09:13.033133 PCI: 00:1e.3: enabled 1
653 12:09:13.036536 PCI: 00:1f.0: enabled 1
654 12:09:13.039624 PCI: 00:1f.1: enabled 0
655 12:09:13.040156 PCI: 00:1f.2: enabled 1
656 12:09:13.042801 PCI: 00:1f.3: enabled 1
657 12:09:13.046424 PCI: 00:1f.4: enabled 0
658 12:09:13.046912 PCI: 00:1f.5: enabled 1
659 12:09:13.049830 PCI: 00:1f.6: enabled 0
660 12:09:13.053017 PCI: 00:1f.7: enabled 0
661 12:09:13.056640 APIC: 00: enabled 1
662 12:09:13.057239 GENERIC: 0.0: enabled 1
663 12:09:13.059428 GENERIC: 0.0: enabled 1
664 12:09:13.063139 GENERIC: 1.0: enabled 1
665 12:09:13.063761 GENERIC: 0.0: enabled 1
666 12:09:13.066056
667 12:09:13.066678 GENERIC: 1.0: enabled 1
668 12:09:13.069553 USB0 port 0: enabled 1
669 12:09:13.073036 GENERIC: 0.0: enabled 1
670 12:09:13.073667 USB0 port 0: enabled 1
671 12:09:13.076001 GENERIC: 0.0: enabled 1
672 12:09:13.079619 I2C: 00:1a: enabled 1
673 12:09:13.080236 I2C: 00:31: enabled 1
674 12:09:13.082453
675 12:09:13.083048 I2C: 00:32: enabled 1
676 12:09:13.086080 I2C: 00:10: enabled 1
677 12:09:13.089589 I2C: 00:15: enabled 1
678 12:09:13.090082 GENERIC: 0.0: enabled 0
679 12:09:13.092635 GENERIC: 1.0: enabled 0
680 12:09:13.096230 GENERIC: 0.0: enabled 1
681 12:09:13.096720 SPI: 00: enabled 1
682 12:09:13.099154 SPI: 00: enabled 1
683 12:09:13.102633 PNP: 0c09.0: enabled 1
684 12:09:13.103122 GENERIC: 0.0: enabled 1
685 12:09:13.106101 USB3 port 0: enabled 1
686 12:09:13.109345 USB3 port 1: enabled 1
687 12:09:13.109972 USB3 port 2: enabled 0
688 12:09:13.112661
689 12:09:13.113256 USB3 port 3: enabled 0
690 12:09:13.115956 USB2 port 0: enabled 0
691 12:09:13.119362 USB2 port 1: enabled 1
692 12:09:13.119956 USB2 port 2: enabled 1
693 12:09:13.122877 USB2 port 3: enabled 0
694 12:09:13.125820 USB2 port 4: enabled 1
695 12:09:13.126346 USB2 port 5: enabled 0
696 12:09:13.128957 USB2 port 6: enabled 0
697 12:09:13.132494 USB2 port 7: enabled 0
698 12:09:13.135716 USB2 port 8: enabled 0
699 12:09:13.136310 USB2 port 9: enabled 0
700 12:09:13.138960 USB3 port 0: enabled 0
701 12:09:13.142487 USB3 port 1: enabled 1
702 12:09:13.142998 USB3 port 2: enabled 0
703 12:09:13.145850 USB3 port 3: enabled 0
704 12:09:13.149116 GENERIC: 0.0: enabled 1
705 12:09:13.152793 GENERIC: 1.0: enabled 1
706 12:09:13.153402 APIC: 01: enabled 1
707 12:09:13.155906 APIC: 05: enabled 1
708 12:09:13.156509 APIC: 07: enabled 1
709 12:09:13.158715 APIC: 02: enabled 1
710 12:09:13.162413 APIC: 04: enabled 1
711 12:09:13.163011 APIC: 06: enabled 1
712 12:09:13.165421 APIC: 03: enabled 1
713 12:09:13.168802 Compare with tree...
714 12:09:13.169517 Root Device: enabled 1
715 12:09:13.172179 DOMAIN: 0000: enabled 1
716 12:09:13.175734 PCI: 00:00.0: enabled 1
717 12:09:13.178763 PCI: 00:02.0: enabled 1
718 12:09:13.179249 PCI: 00:04.0: enabled 1
719 12:09:13.182104 GENERIC: 0.0: enabled 1
720 12:09:13.185709 PCI: 00:05.0: enabled 1
721 12:09:13.188807 PCI: 00:06.0: enabled 0
722 12:09:13.192466 PCI: 00:07.0: enabled 0
723 12:09:13.193062 GENERIC: 0.0: enabled 1
724 12:09:13.195283 PCI: 00:07.1: enabled 0
725 12:09:13.198282 GENERIC: 1.0: enabled 1
726 12:09:13.201801 PCI: 00:07.2: enabled 0
727 12:09:13.205226 GENERIC: 0.0: enabled 1
728 12:09:13.208261 PCI: 00:07.3: enabled 0
729 12:09:13.208746 GENERIC: 1.0: enabled 1
730 12:09:13.211488 PCI: 00:08.0: enabled 1
731 12:09:13.215477 PCI: 00:09.0: enabled 0
732 12:09:13.218568 PCI: 00:0a.0: enabled 0
733 12:09:13.221695 PCI: 00:0d.0: enabled 1
734 12:09:13.222309 USB0 port 0: enabled 1
735 12:09:13.225408 USB3 port 0: enabled 1
736 12:09:13.228481 USB3 port 1: enabled 1
737 12:09:13.231849 USB3 port 2: enabled 0
738 12:09:13.234669 USB3 port 3: enabled 0
739 12:09:13.235306 PCI: 00:0d.1: enabled 0
740 12:09:13.238288 PCI: 00:0d.2: enabled 0
741 12:09:13.241426 GENERIC: 0.0: enabled 1
742 12:09:13.245070 PCI: 00:0d.3: enabled 0
743 12:09:13.248173 PCI: 00:0e.0: enabled 0
744 12:09:13.248661 PCI: 00:10.2: enabled 1
745 12:09:13.251384 PCI: 00:10.6: enabled 0
746 12:09:13.255309 PCI: 00:10.7: enabled 0
747 12:09:13.258106 PCI: 00:12.0: enabled 0
748 12:09:13.261349 PCI: 00:12.6: enabled 0
749 12:09:13.261881 PCI: 00:13.0: enabled 0
750 12:09:13.264740 PCI: 00:14.0: enabled 1
751 12:09:13.268214 USB0 port 0: enabled 1
752 12:09:13.271217 USB2 port 0: enabled 0
753 12:09:13.274918 USB2 port 1: enabled 1
754 12:09:13.278140 USB2 port 2: enabled 1
755 12:09:13.278745 USB2 port 3: enabled 0
756 12:09:13.281346 USB2 port 4: enabled 1
757 12:09:13.284734 USB2 port 5: enabled 0
758 12:09:13.288204 USB2 port 6: enabled 0
759 12:09:13.291550 USB2 port 7: enabled 0
760 12:09:13.292156 USB2 port 8: enabled 0
761 12:09:13.294995 USB2 port 9: enabled 0
762 12:09:13.297739 USB3 port 0: enabled 0
763 12:09:13.301530 USB3 port 1: enabled 1
764 12:09:13.304936 USB3 port 2: enabled 0
765 12:09:13.307638 USB3 port 3: enabled 0
766 12:09:13.308157 PCI: 00:14.1: enabled 0
767 12:09:13.310807 PCI: 00:14.2: enabled 1
768 12:09:13.314384 PCI: 00:14.3: enabled 1
769 12:09:13.318169 GENERIC: 0.0: enabled 1
770 12:09:13.321297 PCI: 00:15.0: enabled 1
771 12:09:13.321933 I2C: 00:1a: enabled 1
772 12:09:13.324749 I2C: 00:31: enabled 1
773 12:09:13.327451 I2C: 00:32: enabled 1
774 12:09:13.331392 PCI: 00:15.1: enabled 1
775 12:09:13.331990 I2C: 00:10: enabled 1
776 12:09:13.334223
777 12:09:13.334714 PCI: 00:15.2: enabled 1
778 12:09:13.338050 PCI: 00:15.3: enabled 1
779 12:09:13.340683 PCI: 00:16.0: enabled 1
780 12:09:13.344093 PCI: 00:16.1: enabled 0
781 12:09:13.344582 PCI: 00:16.2: enabled 0
782 12:09:13.347738 PCI: 00:16.3: enabled 0
783 12:09:13.351583 PCI: 00:16.4: enabled 0
784 12:09:13.355260 PCI: 00:16.5: enabled 0
785 12:09:13.355848 PCI: 00:17.0: enabled 1
786 12:09:13.358565 PCI: 00:19.0: enabled 0
787 12:09:13.362227 PCI: 00:19.1: enabled 1
788 12:09:13.365824 I2C: 00:15: enabled 1
789 12:09:13.365910 PCI: 00:19.2: enabled 0
790 12:09:13.368314 PCI: 00:1d.0: enabled 1
791 12:09:13.371898 GENERIC: 0.0: enabled 1
792 12:09:13.375222 PCI: 00:1e.0: enabled 1
793 12:09:13.425037 PCI: 00:1e.1: enabled 0
794 12:09:13.425199 PCI: 00:1e.2: enabled 1
795 12:09:13.425270 SPI: 00: enabled 1
796 12:09:13.425540 PCI: 00:1e.3: enabled 1
797 12:09:13.425629 SPI: 00: enabled 1
798 12:09:13.425898 PCI: 00:1f.0: enabled 1
799 12:09:13.425969 PNP: 0c09.0: enabled 1
800 12:09:13.426032 PCI: 00:1f.1: enabled 0
801 12:09:13.426093 PCI: 00:1f.2: enabled 1
802 12:09:13.426152 GENERIC: 0.0: enabled 1
803 12:09:13.426439 GENERIC: 0.0: enabled 1
804 12:09:13.426529 GENERIC: 1.0: enabled 1
805 12:09:13.426599 PCI: 00:1f.3: enabled 1
806 12:09:13.426665 PCI: 00:1f.4: enabled 0
807 12:09:13.426727 PCI: 00:1f.5: enabled 1
808 12:09:13.426977 PCI: 00:1f.6: enabled 0
809 12:09:13.427049 PCI: 00:1f.7: enabled 0
810 12:09:13.427112 CPU_CLUSTER: 0: enabled 1
811 12:09:13.427172 APIC: 00: enabled 1
812 12:09:13.427231 APIC: 01: enabled 1
813 12:09:13.451650 APIC: 05: enabled 1
814 12:09:13.451792 APIC: 07: enabled 1
815 12:09:13.451863 APIC: 02: enabled 1
816 12:09:13.452202 APIC: 04: enabled 1
817 12:09:13.452289 APIC: 06: enabled 1
818 12:09:13.452661 APIC: 03: enabled 1
819 12:09:13.452747 Root Device scanning...
820 12:09:13.452816 scan_static_bus for Root Device
821 12:09:13.453259 DOMAIN: 0000 enabled
822 12:09:13.453346 CPU_CLUSTER: 0 enabled
823 12:09:13.455840 DOMAIN: 0000 scanning...
824 12:09:13.455934 PCI: pci_scan_bus for bus 00
825 12:09:13.458784 PCI: 00:00.0 [8086/0000] ops
826 12:09:13.462394 PCI: 00:00.0 [8086/9a12] enabled
827 12:09:13.465825 PCI: 00:02.0 [8086/0000] bus ops
828 12:09:13.468854 PCI: 00:02.0 [8086/9a40] enabled
829 12:09:13.472568 PCI: 00:04.0 [8086/0000] bus ops
830 12:09:13.476209 PCI: 00:04.0 [8086/9a03] enabled
831 12:09:13.478880 PCI: 00:05.0 [8086/9a19] enabled
832 12:09:13.482071 PCI: 00:07.0 [0000/0000] hidden
833 12:09:13.485665 PCI: 00:08.0 [8086/9a11] enabled
834 12:09:13.488629 PCI: 00:0a.0 [8086/9a0d] disabled
835 12:09:13.491842 PCI: 00:0d.0 [8086/0000] bus ops
836 12:09:13.495360 PCI: 00:0d.0 [8086/9a13] enabled
837 12:09:13.498535 PCI: 00:14.0 [8086/0000] bus ops
838 12:09:13.502329 PCI: 00:14.0 [8086/a0ed] enabled
839 12:09:13.505626 PCI: 00:14.2 [8086/a0ef] enabled
840 12:09:13.509075 PCI: 00:14.3 [8086/0000] bus ops
841 12:09:13.512346 PCI: 00:14.3 [8086/a0f0] enabled
842 12:09:13.515535 PCI: 00:15.0 [8086/0000] bus ops
843 12:09:13.518529 PCI: 00:15.0 [8086/a0e8] enabled
844 12:09:13.522062
845 12:09:13.522255 PCI: 00:15.1 [8086/0000] bus ops
846 12:09:13.525697
847 12:09:13.525901 PCI: 00:15.1 [8086/a0e9] enabled
848 12:09:13.528600
849 12:09:13.528784 PCI: 00:15.2 [8086/0000] bus ops
850 12:09:13.532213
851 12:09:13.532426 PCI: 00:15.2 [8086/a0ea] enabled
852 12:09:13.535842
853 12:09:13.536074 PCI: 00:15.3 [8086/0000] bus ops
854 12:09:13.538754
855 12:09:13.538984 PCI: 00:15.3 [8086/a0eb] enabled
856 12:09:13.542075
857 12:09:13.542326 PCI: 00:16.0 [8086/0000] ops
858 12:09:13.545497 PCI: 00:16.0 [8086/a0e0] enabled
859 12:09:13.551924 PCI: Static device PCI: 00:17.0 not found, disabling it.
860 12:09:13.555286 PCI: 00:19.0 [8086/0000] bus ops
861 12:09:13.558396 PCI: 00:19.0 [8086/a0c5] disabled
862 12:09:13.561789 PCI: 00:19.1 [8086/0000] bus ops
863 12:09:13.564853 PCI: 00:19.1 [8086/a0c6] enabled
864 12:09:13.568385 PCI: 00:1d.0 [8086/0000] bus ops
865 12:09:13.571522 PCI: 00:1d.0 [8086/a0b0] enabled
866 12:09:13.575370 PCI: 00:1e.0 [8086/0000] ops
867 12:09:13.578436 PCI: 00:1e.0 [8086/a0a8] enabled
868 12:09:13.581800 PCI: 00:1e.2 [8086/0000] bus ops
869 12:09:13.584805 PCI: 00:1e.2 [8086/a0aa] enabled
870 12:09:13.588101 PCI: 00:1e.3 [8086/0000] bus ops
871 12:09:13.591530 PCI: 00:1e.3 [8086/a0ab] enabled
872 12:09:13.595182 PCI: 00:1f.0 [8086/0000] bus ops
873 12:09:13.598015 PCI: 00:1f.0 [8086/a087] enabled
874 12:09:13.598189 RTC Init
875 12:09:13.601298
876 12:09:13.604768 Set power on after power failure.
877 12:09:13.604959 Disabling Deep S3
878 12:09:13.608362 Disabling Deep S3
879 12:09:13.608558 Disabling Deep S4
880 12:09:13.611634 Disabling Deep S4
881 12:09:13.611833 Disabling Deep S5
882 12:09:13.614939 Disabling Deep S5
883 12:09:13.617975 PCI: 00:1f.2 [0000/0000] hidden
884 12:09:13.621087 PCI: 00:1f.3 [8086/0000] bus ops
885 12:09:13.624804 PCI: 00:1f.3 [8086/a0c8] enabled
886 12:09:13.627988 PCI: 00:1f.5 [8086/0000] bus ops
887 12:09:13.631758 PCI: 00:1f.5 [8086/a0a4] enabled
888 12:09:13.634520 PCI: Leftover static devices:
889 12:09:13.634781 PCI: 00:10.2
890 12:09:13.637873 PCI: 00:10.6
891 12:09:13.638181 PCI: 00:10.7
892 12:09:13.641453 PCI: 00:06.0
893 12:09:13.641840 PCI: 00:07.1
894 12:09:13.642068 PCI: 00:07.2
895 12:09:13.645101 PCI: 00:07.3
896 12:09:13.645551 PCI: 00:09.0
897 12:09:13.648181 PCI: 00:0d.1
898 12:09:13.648633 PCI: 00:0d.2
899 12:09:13.648900 PCI: 00:0d.3
900 12:09:13.651565
901 12:09:13.652083 PCI: 00:0e.0
902 12:09:13.652411 PCI: 00:12.0
903 12:09:13.654918 PCI: 00:12.6
904 12:09:13.655424 PCI: 00:13.0
905 12:09:13.658192 PCI: 00:14.1
906 12:09:13.658798 PCI: 00:16.1
907 12:09:13.659231 PCI: 00:16.2
908 12:09:13.661899 PCI: 00:16.3
909 12:09:13.662501 PCI: 00:16.4
910 12:09:13.664568 PCI: 00:16.5
911 12:09:13.665060 PCI: 00:17.0
912 12:09:13.665448 PCI: 00:19.2
913 12:09:13.668219 PCI: 00:1e.1
914 12:09:13.668818 PCI: 00:1f.1
915 12:09:13.671438 PCI: 00:1f.4
916 12:09:13.671927 PCI: 00:1f.6
917 12:09:13.672319 PCI: 00:1f.7
918 12:09:13.675259
919 12:09:13.675873 PCI: Check your devicetree.cb.
920 12:09:13.677986 PCI: 00:02.0 scanning...
921 12:09:13.681327 scan_generic_bus for PCI: 00:02.0
922 12:09:13.685061 scan_generic_bus for PCI: 00:02.0 done
923 12:09:13.688012
924 12:09:13.691464 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
925 12:09:13.694704 PCI: 00:04.0 scanning...
926 12:09:13.697737 scan_generic_bus for PCI: 00:04.0
927 12:09:13.698336 GENERIC: 0.0 enabled
928 12:09:13.704773 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
929 12:09:13.711092 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
930 12:09:13.711682 PCI: 00:0d.0 scanning...
931 12:09:13.714568 scan_static_bus for PCI: 00:0d.0
932 12:09:13.718059 USB0 port 0 enabled
933 12:09:13.721544 USB0 port 0 scanning...
934 12:09:13.724820 scan_static_bus for USB0 port 0
935 12:09:13.725418 USB3 port 0 enabled
936 12:09:13.728205
937 12:09:13.728756 USB3 port 1 enabled
938 12:09:13.731256 USB3 port 2 disabled
939 12:09:13.731752 USB3 port 3 disabled
940 12:09:13.734824 USB3 port 0 scanning...
941 12:09:13.738060 scan_static_bus for USB3 port 0
942 12:09:13.741550 scan_static_bus for USB3 port 0 done
943 12:09:13.747797 scan_bus: bus USB3 port 0 finished in 6 msecs
944 12:09:13.748407 USB3 port 1 scanning...
945 12:09:13.751450 scan_static_bus for USB3 port 1
946 12:09:13.758626 scan_static_bus for USB3 port 1 done
947 12:09:13.761040 scan_bus: bus USB3 port 1 finished in 6 msecs
948 12:09:13.764800 scan_static_bus for USB0 port 0 done
949 12:09:13.767893 scan_bus: bus USB0 port 0 finished in 43 msecs
950 12:09:13.774809 scan_static_bus for PCI: 00:0d.0 done
951 12:09:13.778338 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 12:09:13.781163 PCI: 00:14.0 scanning...
953 12:09:13.784520 scan_static_bus for PCI: 00:14.0
954 12:09:13.785017 USB0 port 0 enabled
955 12:09:13.787961
956 12:09:13.788562 USB0 port 0 scanning...
957 12:09:13.791019 scan_static_bus for USB0 port 0
958 12:09:13.794582 USB2 port 0 disabled
959 12:09:13.797843 USB2 port 1 enabled
960 12:09:13.798343 USB2 port 2 enabled
961 12:09:13.801346 USB2 port 3 disabled
962 12:09:13.802025 USB2 port 4 enabled
963 12:09:13.804465 USB2 port 5 disabled
964 12:09:13.808090 USB2 port 6 disabled
965 12:09:13.808696 USB2 port 7 disabled
966 12:09:13.810868 USB2 port 8 disabled
967 12:09:13.814178 USB2 port 9 disabled
968 12:09:13.814675 USB3 port 0 disabled
969 12:09:13.817837 USB3 port 1 enabled
970 12:09:13.821237 USB3 port 2 disabled
971 12:09:13.821879 USB3 port 3 disabled
972 12:09:13.824422 USB2 port 1 scanning...
973 12:09:13.827324 scan_static_bus for USB2 port 1
974 12:09:13.830735 scan_static_bus for USB2 port 1 done
975 12:09:13.838053 scan_bus: bus USB2 port 1 finished in 6 msecs
976 12:09:13.838655 USB2 port 2 scanning...
977 12:09:13.841015 scan_static_bus for USB2 port 2
978 12:09:13.844063 scan_static_bus for USB2 port 2 done
979 12:09:13.850926 scan_bus: bus USB2 port 2 finished in 6 msecs
980 12:09:13.854049 USB2 port 4 scanning...
981 12:09:13.857450 scan_static_bus for USB2 port 4
982 12:09:13.860870 scan_static_bus for USB2 port 4 done
983 12:09:13.864117 scan_bus: bus USB2 port 4 finished in 6 msecs
984 12:09:13.867630 USB3 port 1 scanning...
985 12:09:13.870471 scan_static_bus for USB3 port 1
986 12:09:13.873966 scan_static_bus for USB3 port 1 done
987 12:09:13.877725 scan_bus: bus USB3 port 1 finished in 6 msecs
988 12:09:13.884178 scan_static_bus for USB0 port 0 done
989 12:09:13.887210 scan_bus: bus USB0 port 0 finished in 93 msecs
990 12:09:13.890491 scan_static_bus for PCI: 00:14.0 done
991 12:09:13.897170 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
992 12:09:13.897824 PCI: 00:14.3 scanning...
993 12:09:13.900210 scan_static_bus for PCI: 00:14.3
994 12:09:13.903896 GENERIC: 0.0 enabled
995 12:09:13.907003 scan_static_bus for PCI: 00:14.3 done
996 12:09:13.913901 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
997 12:09:13.914490 PCI: 00:15.0 scanning...
998 12:09:13.917516 scan_static_bus for PCI: 00:15.0
999 12:09:13.920642 I2C: 00:1a enabled
1000 12:09:13.923568 I2C: 00:31 enabled
1001 12:09:13.924063 I2C: 00:32 enabled
1002 12:09:13.927009 scan_static_bus for PCI: 00:15.0 done
1003 12:09:13.934194 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1004 12:09:13.934694 PCI: 00:15.1 scanning...
1005 12:09:13.937342 scan_static_bus for PCI: 00:15.1
1006 12:09:13.941250 I2C: 00:10 enabled
1007 12:09:13.944034 scan_static_bus for PCI: 00:15.1 done
1008 12:09:13.950983 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1009 12:09:13.951584 PCI: 00:15.2 scanning...
1010 12:09:13.954118 scan_static_bus for PCI: 00:15.2
1011 12:09:13.960732 scan_static_bus for PCI: 00:15.2 done
1012 12:09:13.964162 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1013 12:09:13.967621 PCI: 00:15.3 scanning...
1014 12:09:13.970636 scan_static_bus for PCI: 00:15.3
1015 12:09:13.974188 scan_static_bus for PCI: 00:15.3 done
1016 12:09:13.977276 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1017 12:09:13.980285 PCI: 00:19.1 scanning...
1018 12:09:13.983755 scan_static_bus for PCI: 00:19.1
1019 12:09:13.987274 I2C: 00:15 enabled
1020 12:09:13.990116 scan_static_bus for PCI: 00:19.1 done
1021 12:09:13.993544 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1022 12:09:13.997060 PCI: 00:1d.0 scanning...
1023 12:09:14.000397 do_pci_scan_bridge for PCI: 00:1d.0
1024 12:09:14.003907 PCI: pci_scan_bus for bus 01
1025 12:09:14.007081 PCI: 01:00.0 [1c5c/174a] enabled
1026 12:09:14.010041 GENERIC: 0.0 enabled
1027 12:09:14.013584 Enabling Common Clock Configuration
1028 12:09:14.016833 L1 Sub-State supported from root port 29
1029 12:09:14.020239 L1 Sub-State Support = 0xf
1030 12:09:14.023150 CommonModeRestoreTime = 0x28
1031 12:09:14.026626 Power On Value = 0x16, Power On Scale = 0x0
1032 12:09:14.029782 ASPM: Enabled L1
1033 12:09:14.033181 PCIe: Max_Payload_Size adjusted to 128
1034 12:09:14.040467 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1035 12:09:14.041077 PCI: 00:1e.2 scanning...
1036 12:09:14.043438 scan_generic_bus for PCI: 00:1e.2
1037 12:09:14.046721
1038 12:09:14.047248 SPI: 00 enabled
1039 12:09:14.053359 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1040 12:09:14.056868 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1041 12:09:14.060057 PCI: 00:1e.3 scanning...
1042 12:09:14.063682 scan_generic_bus for PCI: 00:1e.3
1043 12:09:14.066630 SPI: 00 enabled
1044 12:09:14.069954 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1045 12:09:14.076894 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1046 12:09:14.079918 PCI: 00:1f.0 scanning...
1047 12:09:14.083208 scan_static_bus for PCI: 00:1f.0
1048 12:09:14.083705 PNP: 0c09.0 enabled
1049 12:09:14.086294 PNP: 0c09.0 scanning...
1050 12:09:14.089864 scan_static_bus for PNP: 0c09.0
1051 12:09:14.092706 scan_static_bus for PNP: 0c09.0 done
1052 12:09:14.099926 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1053 12:09:14.102638 scan_static_bus for PCI: 00:1f.0 done
1054 12:09:14.106428 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1055 12:09:14.109667 PCI: 00:1f.2 scanning...
1056 12:09:14.113089 scan_static_bus for PCI: 00:1f.2
1057 12:09:14.116290 GENERIC: 0.0 enabled
1058 12:09:14.119142 GENERIC: 0.0 scanning...
1059 12:09:14.122789 scan_static_bus for GENERIC: 0.0
1060 12:09:14.123405 GENERIC: 0.0 enabled
1061 12:09:14.126165 GENERIC: 1.0 enabled
1062 12:09:14.129321 scan_static_bus for GENERIC: 0.0 done
1063 12:09:14.132783 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1064 12:09:14.136408
1065 12:09:14.139584 scan_static_bus for PCI: 00:1f.2 done
1066 12:09:14.142803 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1067 12:09:14.145824 PCI: 00:1f.3 scanning...
1068 12:09:14.149226 scan_static_bus for PCI: 00:1f.3
1069 12:09:14.152643 scan_static_bus for PCI: 00:1f.3 done
1070 12:09:14.156134 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1071 12:09:14.159383
1072 12:09:14.160070 PCI: 00:1f.5 scanning...
1073 12:09:14.162345 scan_generic_bus for PCI: 00:1f.5
1074 12:09:14.169204 scan_generic_bus for PCI: 00:1f.5 done
1075 12:09:14.172694 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1076 12:09:14.175829 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1077 12:09:14.182464 scan_static_bus for Root Device done
1078 12:09:14.185936 scan_bus: bus Root Device finished in 736 msecs
1079 12:09:14.186548 done
1080 12:09:14.192201 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1081 12:09:14.195699 Chrome EC: UHEPI supported
1082 12:09:14.202368 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1083 12:09:14.208924 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1084 12:09:14.211947 SPI flash protection: WPSW=0 SRP0=0
1085 12:09:14.215255 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1086 12:09:14.222297 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1087 12:09:14.225409 found VGA at PCI: 00:02.0
1088 12:09:14.228998 Setting up VGA for PCI: 00:02.0
1089 12:09:14.232260 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1090 12:09:14.238591 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1091 12:09:14.242370 Allocating resources...
1092 12:09:14.242866 Reading resources...
1093 12:09:14.248292 Root Device read_resources bus 0 link: 0
1094 12:09:14.252114 DOMAIN: 0000 read_resources bus 0 link: 0
1095 12:09:14.255530 PCI: 00:04.0 read_resources bus 1 link: 0
1096 12:09:14.262246 PCI: 00:04.0 read_resources bus 1 link: 0 done
1097 12:09:14.265206 PCI: 00:0d.0 read_resources bus 0 link: 0
1098 12:09:14.271968 USB0 port 0 read_resources bus 0 link: 0
1099 12:09:14.275500 USB0 port 0 read_resources bus 0 link: 0 done
1100 12:09:14.281870 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1101 12:09:14.285263 PCI: 00:14.0 read_resources bus 0 link: 0
1102 12:09:14.291713 USB0 port 0 read_resources bus 0 link: 0
1103 12:09:14.294886 USB0 port 0 read_resources bus 0 link: 0 done
1104 12:09:14.301828 PCI: 00:14.0 read_resources bus 0 link: 0 done
1105 12:09:14.305031 PCI: 00:14.3 read_resources bus 0 link: 0
1106 12:09:14.311547 PCI: 00:14.3 read_resources bus 0 link: 0 done
1107 12:09:14.314748 PCI: 00:15.0 read_resources bus 0 link: 0
1108 12:09:14.321730 PCI: 00:15.0 read_resources bus 0 link: 0 done
1109 12:09:14.324554 PCI: 00:15.1 read_resources bus 0 link: 0
1110 12:09:14.331293 PCI: 00:15.1 read_resources bus 0 link: 0 done
1111 12:09:14.334517 PCI: 00:19.1 read_resources bus 0 link: 0
1112 12:09:14.341416 PCI: 00:19.1 read_resources bus 0 link: 0 done
1113 12:09:14.345280 PCI: 00:1d.0 read_resources bus 1 link: 0
1114 12:09:14.351350 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1115 12:09:14.354838 PCI: 00:1e.2 read_resources bus 2 link: 0
1116 12:09:14.361718 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1117 12:09:14.364830 PCI: 00:1e.3 read_resources bus 3 link: 0
1118 12:09:14.371754 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1119 12:09:14.374729 PCI: 00:1f.0 read_resources bus 0 link: 0
1120 12:09:14.381874 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1121 12:09:14.384621 PCI: 00:1f.2 read_resources bus 0 link: 0
1122 12:09:14.387770 GENERIC: 0.0 read_resources bus 0 link: 0
1123 12:09:14.395088 GENERIC: 0.0 read_resources bus 0 link: 0 done
1124 12:09:14.398511 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1125 12:09:14.405873 DOMAIN: 0000 read_resources bus 0 link: 0 done
1126 12:09:14.409439 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1127 12:09:14.416081 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1128 12:09:14.418779 Root Device read_resources bus 0 link: 0 done
1129 12:09:14.422636 Done reading resources.
1130 12:09:14.428966 Show resources in subtree (Root Device)...After reading.
1131 12:09:14.432265 Root Device child on link 0 DOMAIN: 0000
1132 12:09:14.435445 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 12:09:14.445708 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 12:09:14.455951 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1135 12:09:14.459092 PCI: 00:00.0
1136 12:09:14.468773 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 12:09:14.475478 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 12:09:14.485388 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 12:09:14.495522 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 12:09:14.505295 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 12:09:14.515066 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 12:09:14.525443 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 12:09:14.531890 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 12:09:14.541676 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 12:09:14.551783 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1146 12:09:14.561705 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1147 12:09:14.571359 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1148 12:09:14.578266 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1149 12:09:14.588154 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1150 12:09:14.598259 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1151 12:09:14.607993 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1152 12:09:14.617780 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1153 12:09:14.627886 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1154 12:09:14.634620 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1155 12:09:14.637989
1156 12:09:14.644283 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1157 12:09:14.647891 PCI: 00:02.0
1158 12:09:14.657785 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1159 12:09:14.667395 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1160 12:09:14.677675 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1161 12:09:14.681359 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1162 12:09:14.690984 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1163 12:09:14.694042 GENERIC: 0.0
1164 12:09:14.694528 PCI: 00:05.0
1165 12:09:14.704024 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1166 12:09:14.710378 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1167 12:09:14.710894 GENERIC: 0.0
1168 12:09:14.713924 PCI: 00:08.0
1169 12:09:14.723928 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 12:09:14.724440 PCI: 00:0a.0
1171 12:09:14.727252 PCI: 00:0d.0 child on link 0 USB0 port 0
1172 12:09:14.737469 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1173 12:09:14.740971
1174 12:09:14.744195 USB0 port 0 child on link 0 USB3 port 0
1175 12:09:14.744653 USB3 port 0
1176 12:09:14.746720 USB3 port 1
1177 12:09:14.747205 USB3 port 2
1178 12:09:14.750453 USB3 port 3
1179 12:09:14.753962 PCI: 00:14.0 child on link 0 USB0 port 0
1180 12:09:14.763975 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1181 12:09:14.770399 USB0 port 0 child on link 0 USB2 port 0
1182 12:09:14.770852 USB2 port 0
1183 12:09:14.773444 USB2 port 1
1184 12:09:14.773958 USB2 port 2
1185 12:09:14.776935 USB2 port 3
1186 12:09:14.777385 USB2 port 4
1187 12:09:14.780256 USB2 port 5
1188 12:09:14.780705 USB2 port 6
1189 12:09:14.783743 USB2 port 7
1190 12:09:14.784244 USB2 port 8
1191 12:09:14.786760 USB2 port 9
1192 12:09:14.790179 USB3 port 0
1193 12:09:14.790632 USB3 port 1
1194 12:09:14.793891 USB3 port 2
1195 12:09:14.794344 USB3 port 3
1196 12:09:14.796759 PCI: 00:14.2
1197 12:09:14.806658 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 12:09:14.816751 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 12:09:14.820206 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1200 12:09:14.829993 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1201 12:09:14.832892 GENERIC: 0.0
1202 12:09:14.836631 PCI: 00:15.0 child on link 0 I2C: 00:1a
1203 12:09:14.846197 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 12:09:14.846658 I2C: 00:1a
1205 12:09:14.849498 I2C: 00:31
1206 12:09:14.849959 I2C: 00:32
1207 12:09:14.856500 PCI: 00:15.1 child on link 0 I2C: 00:10
1208 12:09:14.866322 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 12:09:14.866835 I2C: 00:10
1210 12:09:14.869418 PCI: 00:15.2
1211 12:09:14.879657 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 12:09:14.880119 PCI: 00:15.3
1213 12:09:14.889400 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:09:14.892929 PCI: 00:16.0
1215 12:09:14.902400 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 12:09:14.902866 PCI: 00:19.0
1217 12:09:14.905877 PCI: 00:19.1 child on link 0 I2C: 00:15
1218 12:09:14.915706 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 12:09:14.919050 I2C: 00:15
1220 12:09:14.922396 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1221 12:09:14.932187 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1222 12:09:14.942333 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1223 12:09:14.952354 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1224 12:09:14.952862 GENERIC: 0.0
1225 12:09:14.955631 PCI: 01:00.0
1226 12:09:14.965509 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 12:09:14.972033 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1228 12:09:14.975576
1229 12:09:14.981928 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1230 12:09:14.985421 PCI: 00:1e.0
1231 12:09:14.995565 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1232 12:09:14.998613 PCI: 00:1e.2 child on link 0 SPI: 00
1233 12:09:15.008573 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:09:15.011597 SPI: 00
1235 12:09:15.014936 PCI: 00:1e.3 child on link 0 SPI: 00
1236 12:09:15.025180 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:09:15.025667 SPI: 00
1238 12:09:15.031472 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1239 12:09:15.038133 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1240 12:09:15.041693 PNP: 0c09.0
1241 12:09:15.047957 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1242 12:09:15.054850 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1243 12:09:15.065047 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1244 12:09:15.071651 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1245 12:09:15.078122 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1246 12:09:15.078572 GENERIC: 0.0
1247 12:09:15.081209 GENERIC: 1.0
1248 12:09:15.081683 PCI: 00:1f.3
1249 12:09:15.091470 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 12:09:15.104729 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1251 12:09:15.105189 PCI: 00:1f.5
1252 12:09:15.114538 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1253 12:09:15.117791 CPU_CLUSTER: 0 child on link 0 APIC: 00
1254 12:09:15.118344 APIC: 00
1255 12:09:15.121346 APIC: 01
1256 12:09:15.121862 APIC: 05
1257 12:09:15.124505 APIC: 07
1258 12:09:15.125020 APIC: 02
1259 12:09:15.125506 APIC: 04
1260 12:09:15.127765 APIC: 06
1261 12:09:15.128279 APIC: 03
1262 12:09:15.134510 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1263 12:09:15.137383
1264 12:09:15.140774 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1265 12:09:15.147550 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1266 12:09:15.154055 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1267 12:09:15.157462 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1268 12:09:15.160755 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1269 12:09:15.167536 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1270 12:09:15.174113 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1271 12:09:15.180811 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1272 12:09:15.187290 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1273 12:09:15.197325 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1274 12:09:15.200326 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1275 12:09:15.203724
1276 12:09:15.210330 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1277 12:09:15.217109 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1278 12:09:15.223554 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1279 12:09:15.226983 DOMAIN: 0000: Resource ranges:
1280 12:09:15.230423 * Base: 1000, Size: 800, Tag: 100
1281 12:09:15.233716 * Base: 1900, Size: e700, Tag: 100
1282 12:09:15.240199 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1283 12:09:15.246906 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1284 12:09:15.253525 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1285 12:09:15.260357 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1286 12:09:15.263209
1287 12:09:15.269947 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1288 12:09:15.276686 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1289 12:09:15.283179 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1290 12:09:15.286780
1291 12:09:15.293376 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1292 12:09:15.299932 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1293 12:09:15.306567 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1294 12:09:15.316628 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1295 12:09:15.322860 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1296 12:09:15.329651 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1297 12:09:15.339544 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1298 12:09:15.345877 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1299 12:09:15.352709 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1300 12:09:15.362694 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1301 12:09:15.369634 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1302 12:09:15.375833 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1303 12:09:15.385929 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1304 12:09:15.392542 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1305 12:09:15.399261 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1306 12:09:15.402311
1307 12:09:15.409159 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1308 12:09:15.415746 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1309 12:09:15.422006 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1310 12:09:15.425554
1311 12:09:15.426116 DOMAIN: 0000: Resource ranges:
1312 12:09:15.431922 * Base: 7fc00000, Size: 40400000, Tag: 200
1313 12:09:15.435223 * Base: d0000000, Size: 28000000, Tag: 200
1314 12:09:15.438568 * Base: fa000000, Size: 1000000, Tag: 200
1315 12:09:15.445389 * Base: fb001000, Size: 2fff000, Tag: 200
1316 12:09:15.448777 * Base: fe010000, Size: 2e000, Tag: 200
1317 12:09:15.452312 * Base: fe03f000, Size: d41000, Tag: 200
1318 12:09:15.455224 * Base: fed88000, Size: 8000, Tag: 200
1319 12:09:15.462099 * Base: fed93000, Size: d000, Tag: 200
1320 12:09:15.465460 * Base: feda2000, Size: 1e000, Tag: 200
1321 12:09:15.468469 * Base: fede0000, Size: 1220000, Tag: 200
1322 12:09:15.475007 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1323 12:09:15.481857 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1324 12:09:15.488446 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1325 12:09:15.494926 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1326 12:09:15.501374 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1327 12:09:15.507970 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1328 12:09:15.514671 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1329 12:09:15.521555 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1330 12:09:15.528192 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1331 12:09:15.534340 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1332 12:09:15.541015 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1333 12:09:15.547900 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1334 12:09:15.554284 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1335 12:09:15.560819 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1336 12:09:15.567284 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1337 12:09:15.574002 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1338 12:09:15.580752 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1339 12:09:15.587485 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1340 12:09:15.593980 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1341 12:09:15.600484 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1342 12:09:15.607198 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1343 12:09:15.614032 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1344 12:09:15.620488 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1345 12:09:15.627349 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1346 12:09:15.633640 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1347 12:09:15.637017 PCI: 00:1d.0: Resource ranges:
1348 12:09:15.643802 * Base: 7fc00000, Size: 100000, Tag: 200
1349 12:09:15.650049 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1350 12:09:15.656938 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1351 12:09:15.663348 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1352 12:09:15.669990 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1353 12:09:15.676547 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1354 12:09:15.683599 Root Device assign_resources, bus 0 link: 0
1355 12:09:15.686459 DOMAIN: 0000 assign_resources, bus 0 link: 0
1356 12:09:15.696345 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1357 12:09:15.703501 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1358 12:09:15.713100 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1359 12:09:15.719610 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1360 12:09:15.722838 PCI: 00:04.0 assign_resources, bus 1 link: 0
1361 12:09:15.730091 PCI: 00:04.0 assign_resources, bus 1 link: 0
1362 12:09:15.736777 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1363 12:09:15.746426 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1364 12:09:15.752800 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1365 12:09:15.759639 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1366 12:09:15.762993 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1367 12:09:15.772934 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1368 12:09:15.776057 PCI: 00:14.0 assign_resources, bus 0 link: 0
1369 12:09:15.779698 PCI: 00:14.0 assign_resources, bus 0 link: 0
1370 12:09:15.789535 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1371 12:09:15.795999 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1372 12:09:15.805686 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1373 12:09:15.809199 PCI: 00:14.3 assign_resources, bus 0 link: 0
1374 12:09:15.815729 PCI: 00:14.3 assign_resources, bus 0 link: 0
1375 12:09:15.822279 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1376 12:09:15.825788 PCI: 00:15.0 assign_resources, bus 0 link: 0
1377 12:09:15.832564 PCI: 00:15.0 assign_resources, bus 0 link: 0
1378 12:09:15.839096 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1379 12:09:15.845843 PCI: 00:15.1 assign_resources, bus 0 link: 0
1380 12:09:15.849197 PCI: 00:15.1 assign_resources, bus 0 link: 0
1381 12:09:15.859232 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1382 12:09:15.865435 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1383 12:09:15.875376 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1384 12:09:15.882399 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1385 12:09:15.885347 PCI: 00:19.1 assign_resources, bus 0 link: 0
1386 12:09:15.892374 PCI: 00:19.1 assign_resources, bus 0 link: 0
1387 12:09:15.898903 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1388 12:09:15.908931 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1389 12:09:15.918466 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1390 12:09:15.922089 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1391 12:09:15.931998 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1392 12:09:15.938665 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1393 12:09:15.948336 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1394 12:09:15.951845 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1395 12:09:15.961531 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1396 12:09:15.964994 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1397 12:09:15.968441 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1398 12:09:15.978131 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1399 12:09:15.981578 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1400 12:09:15.988004 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1401 12:09:15.991594 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1402 12:09:15.998180 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1403 12:09:16.001190 LPC: Trying to open IO window from 800 size 1ff
1404 12:09:16.011572 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1405 12:09:16.018227 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1406 12:09:16.025382 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1407 12:09:16.031710 DOMAIN: 0000 assign_resources, bus 0 link: 0
1408 12:09:16.035177 Root Device assign_resources, bus 0 link: 0
1409 12:09:16.038627 Done setting resources.
1410 12:09:16.045214 Show resources in subtree (Root Device)...After assigning values.
1411 12:09:16.048403 Root Device child on link 0 DOMAIN: 0000
1412 12:09:16.054834 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1413 12:09:16.061533 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1414 12:09:16.071634 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1415 12:09:16.074714 PCI: 00:00.0
1416 12:09:16.084718 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1417 12:09:16.094719 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1418 12:09:16.101149 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1419 12:09:16.111372 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1420 12:09:16.121037 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1421 12:09:16.131086 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1422 12:09:16.141259 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1423 12:09:16.151108 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1424 12:09:16.157850 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1425 12:09:16.167684 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1426 12:09:16.177781 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1427 12:09:16.187791 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1428 12:09:16.197800 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1429 12:09:16.204346 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1430 12:09:16.213945 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1431 12:09:16.224220 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1432 12:09:16.234185 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1433 12:09:16.243848 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1434 12:09:16.254121 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1435 12:09:16.263877 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1436 12:09:16.264327 PCI: 00:02.0
1437 12:09:16.273792 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1438 12:09:16.287231 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1439 12:09:16.293901 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1440 12:09:16.300463 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1441 12:09:16.310543 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1442 12:09:16.310997 GENERIC: 0.0
1443 12:09:16.313464 PCI: 00:05.0
1444 12:09:16.323687 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1445 12:09:16.327245 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1446 12:09:16.330448 GENERIC: 0.0
1447 12:09:16.330918 PCI: 00:08.0
1448 12:09:16.343327 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1449 12:09:16.343774 PCI: 00:0a.0
1450 12:09:16.346725 PCI: 00:0d.0 child on link 0 USB0 port 0
1451 12:09:16.356703 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1452 12:09:16.360076
1453 12:09:16.363054 USB0 port 0 child on link 0 USB3 port 0
1454 12:09:16.363581 USB3 port 0
1455 12:09:16.366661 USB3 port 1
1456 12:09:16.367103 USB3 port 2
1457 12:09:16.369710
1458 12:09:16.370154 USB3 port 3
1459 12:09:16.373111 PCI: 00:14.0 child on link 0 USB0 port 0
1460 12:09:16.383297 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1461 12:09:16.386418
1462 12:09:16.389933 USB0 port 0 child on link 0 USB2 port 0
1463 12:09:16.390424 USB2 port 0
1464 12:09:16.393013 USB2 port 1
1465 12:09:16.393527 USB2 port 2
1466 12:09:16.396547 USB2 port 3
1467 12:09:16.397033 USB2 port 4
1468 12:09:16.399551
1469 12:09:16.400042 USB2 port 5
1470 12:09:16.403183 USB2 port 6
1471 12:09:16.403625 USB2 port 7
1472 12:09:16.406167 USB2 port 8
1473 12:09:16.406608 USB2 port 9
1474 12:09:16.409702 USB3 port 0
1475 12:09:16.410142 USB3 port 1
1476 12:09:16.412836 USB3 port 2
1477 12:09:16.413278 USB3 port 3
1478 12:09:16.416152 PCI: 00:14.2
1479 12:09:16.426395 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1480 12:09:16.436279 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1481 12:09:16.439243 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1482 12:09:16.449227 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1483 12:09:16.452563
1484 12:09:16.453033 GENERIC: 0.0
1485 12:09:16.456049 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 12:09:16.465684 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 12:09:16.469185 I2C: 00:1a
1488 12:09:16.469790 I2C: 00:31
1489 12:09:16.472640 I2C: 00:32
1490 12:09:16.476044 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 12:09:16.485591 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 12:09:16.489156 I2C: 00:10
1493 12:09:16.489822 PCI: 00:15.2
1494 12:09:16.498682 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 12:09:16.502204 PCI: 00:15.3
1496 12:09:16.512289 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 12:09:16.515565 PCI: 00:16.0
1498 12:09:16.525663 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 12:09:16.526115 PCI: 00:19.0
1500 12:09:16.528691 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 12:09:16.541825 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 12:09:16.542272 I2C: 00:15
1503 12:09:16.545271 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 12:09:16.555176 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 12:09:16.568534 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 12:09:16.578592 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 12:09:16.579090 GENERIC: 0.0
1508 12:09:16.581454 PCI: 01:00.0
1509 12:09:16.591755 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 12:09:16.601782 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1511 12:09:16.611406 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1512 12:09:16.614950 PCI: 00:1e.0
1513 12:09:16.624851 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1514 12:09:16.628270 PCI: 00:1e.2 child on link 0 SPI: 00
1515 12:09:16.631311
1516 12:09:16.641333 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 12:09:16.641903 SPI: 00
1518 12:09:16.644862 PCI: 00:1e.3 child on link 0 SPI: 00
1519 12:09:16.654458 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 12:09:16.657889 SPI: 00
1521 12:09:16.661209 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 12:09:16.670767 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 12:09:16.671284 PNP: 0c09.0
1524 12:09:16.680840 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 12:09:16.684182 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 12:09:16.694162 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 12:09:16.704287 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 12:09:16.707837 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 12:09:16.710887 GENERIC: 0.0
1530 12:09:16.711327 GENERIC: 1.0
1531 12:09:16.714316 PCI: 00:1f.3
1532 12:09:16.724044 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 12:09:16.733952 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 12:09:16.737586 PCI: 00:1f.5
1535 12:09:16.747175 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1536 12:09:16.750781 CPU_CLUSTER: 0 child on link 0 APIC: 00
1537 12:09:16.751274 APIC: 00
1538 12:09:16.754131 APIC: 01
1539 12:09:16.754648 APIC: 05
1540 12:09:16.757331 APIC: 07
1541 12:09:16.757878 APIC: 02
1542 12:09:16.758233 APIC: 04
1543 12:09:16.760779 APIC: 06
1544 12:09:16.761221 APIC: 03
1545 12:09:16.763707 Done allocating resources.
1546 12:09:16.770406 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1547 12:09:16.777295 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1548 12:09:16.780641 Configure GPIOs for I2S audio on UP4.
1549 12:09:16.787346 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1550 12:09:16.790045 Enabling resources...
1551 12:09:16.793470 PCI: 00:00.0 subsystem <- 8086/9a12
1552 12:09:16.794005 PCI: 00:00.0 cmd <- 06
1553 12:09:16.800419 PCI: 00:02.0 subsystem <- 8086/9a40
1554 12:09:16.800896 PCI: 00:02.0 cmd <- 03
1555 12:09:16.803894 PCI: 00:04.0 subsystem <- 8086/9a03
1556 12:09:16.806921 PCI: 00:04.0 cmd <- 02
1557 12:09:16.810489 PCI: 00:05.0 subsystem <- 8086/9a19
1558 12:09:16.813584 PCI: 00:05.0 cmd <- 02
1559 12:09:16.817107 PCI: 00:08.0 subsystem <- 8086/9a11
1560 12:09:16.820188 PCI: 00:08.0 cmd <- 06
1561 12:09:16.823672 PCI: 00:0d.0 subsystem <- 8086/9a13
1562 12:09:16.827101 PCI: 00:0d.0 cmd <- 02
1563 12:09:16.830118 PCI: 00:14.0 subsystem <- 8086/a0ed
1564 12:09:16.833543 PCI: 00:14.0 cmd <- 02
1565 12:09:16.836994 PCI: 00:14.2 subsystem <- 8086/a0ef
1566 12:09:16.839992 PCI: 00:14.2 cmd <- 02
1567 12:09:16.843417 PCI: 00:14.3 subsystem <- 8086/a0f0
1568 12:09:16.843853 PCI: 00:14.3 cmd <- 02
1569 12:09:16.849867 PCI: 00:15.0 subsystem <- 8086/a0e8
1570 12:09:16.850305 PCI: 00:15.0 cmd <- 02
1571 12:09:16.853546 PCI: 00:15.1 subsystem <- 8086/a0e9
1572 12:09:16.856508 PCI: 00:15.1 cmd <- 02
1573 12:09:16.859814 PCI: 00:15.2 subsystem <- 8086/a0ea
1574 12:09:16.863303 PCI: 00:15.2 cmd <- 02
1575 12:09:16.866292 PCI: 00:15.3 subsystem <- 8086/a0eb
1576 12:09:16.869619 PCI: 00:15.3 cmd <- 02
1577 12:09:16.872883 PCI: 00:16.0 subsystem <- 8086/a0e0
1578 12:09:16.876590 PCI: 00:16.0 cmd <- 02
1579 12:09:16.879862 PCI: 00:19.1 subsystem <- 8086/a0c6
1580 12:09:16.882751 PCI: 00:19.1 cmd <- 02
1581 12:09:16.886342 PCI: 00:1d.0 bridge ctrl <- 0013
1582 12:09:16.889335 PCI: 00:1d.0 subsystem <- 8086/a0b0
1583 12:09:16.893064 PCI: 00:1d.0 cmd <- 06
1584 12:09:16.895922 PCI: 00:1e.0 subsystem <- 8086/a0a8
1585 12:09:16.896407 PCI: 00:1e.0 cmd <- 06
1586 12:09:16.903137 PCI: 00:1e.2 subsystem <- 8086/a0aa
1587 12:09:16.903619 PCI: 00:1e.2 cmd <- 06
1588 12:09:16.906166 PCI: 00:1e.3 subsystem <- 8086/a0ab
1589 12:09:16.909800 PCI: 00:1e.3 cmd <- 02
1590 12:09:16.913332 PCI: 00:1f.0 subsystem <- 8086/a087
1591 12:09:16.916230 PCI: 00:1f.0 cmd <- 407
1592 12:09:16.919650 PCI: 00:1f.3 subsystem <- 8086/a0c8
1593 12:09:16.922799 PCI: 00:1f.3 cmd <- 02
1594 12:09:16.926317 PCI: 00:1f.5 subsystem <- 8086/a0a4
1595 12:09:16.929181 PCI: 00:1f.5 cmd <- 406
1596 12:09:16.933156 PCI: 01:00.0 cmd <- 02
1597 12:09:16.937608 done.
1598 12:09:16.941093 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1599 12:09:16.944704 Initializing devices...
1600 12:09:16.947741 Root Device init
1601 12:09:16.951250 Chrome EC: Set SMI mask to 0x0000000000000000
1602 12:09:16.957616 Chrome EC: clear events_b mask to 0x0000000000000000
1603 12:09:16.964086 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1604 12:09:16.967533 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1605 12:09:16.974620 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1606 12:09:16.981194 Chrome EC: Set WAKE mask to 0x0000000000000000
1607 12:09:16.984555 fw_config match found: DB_USB=USB3_ACTIVE
1608 12:09:16.991394 Configure Right Type-C port orientation for retimer
1609 12:09:16.994271 Root Device init finished in 44 msecs
1610 12:09:16.997641 PCI: 00:00.0 init
1611 12:09:17.000974 CPU TDP = 9 Watts
1612 12:09:17.001450 CPU PL1 = 9 Watts
1613 12:09:17.004439 CPU PL2 = 40 Watts
1614 12:09:17.007983 CPU PL4 = 83 Watts
1615 12:09:17.010876 PCI: 00:00.0 init finished in 8 msecs
1616 12:09:17.011308 PCI: 00:02.0 init
1617 12:09:17.014468 GMA: Found VBT in CBFS
1618 12:09:17.018001 GMA: Found valid VBT in CBFS
1619 12:09:17.024475 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1620 12:09:17.030928 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1621 12:09:17.034261 PCI: 00:02.0 init finished in 18 msecs
1622 12:09:17.037672 PCI: 00:05.0 init
1623 12:09:17.041205 PCI: 00:05.0 init finished in 0 msecs
1624 12:09:17.044154 PCI: 00:08.0 init
1625 12:09:17.047603 PCI: 00:08.0 init finished in 0 msecs
1626 12:09:17.050699 PCI: 00:14.0 init
1627 12:09:17.054174 PCI: 00:14.0 init finished in 0 msecs
1628 12:09:17.057637 PCI: 00:14.2 init
1629 12:09:17.060574 PCI: 00:14.2 init finished in 0 msecs
1630 12:09:17.064009 PCI: 00:15.0 init
1631 12:09:17.064439 I2C bus 0 version 0x3230302a
1632 12:09:17.070796 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1633 12:09:17.073782 PCI: 00:15.0 init finished in 6 msecs
1634 12:09:17.074216 PCI: 00:15.1 init
1635 12:09:17.077177 I2C bus 1 version 0x3230302a
1636 12:09:17.080456 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 12:09:17.083739 PCI: 00:15.1 init finished in 6 msecs
1638 12:09:17.087414
1639 12:09:17.087848 PCI: 00:15.2 init
1640 12:09:17.090724 I2C bus 2 version 0x3230302a
1641 12:09:17.094060 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1642 12:09:17.097427 PCI: 00:15.2 init finished in 6 msecs
1643 12:09:17.100300 PCI: 00:15.3 init
1644 12:09:17.103895 I2C bus 3 version 0x3230302a
1645 12:09:17.107354 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1646 12:09:17.110406 PCI: 00:15.3 init finished in 6 msecs
1647 12:09:17.113951 PCI: 00:16.0 init
1648 12:09:17.117377 PCI: 00:16.0 init finished in 0 msecs
1649 12:09:17.120295 PCI: 00:19.1 init
1650 12:09:17.123390 I2C bus 5 version 0x3230302a
1651 12:09:17.127028 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1652 12:09:17.130046 PCI: 00:19.1 init finished in 6 msecs
1653 12:09:17.133674 PCI: 00:1d.0 init
1654 12:09:17.134107 Initializing PCH PCIe bridge.
1655 12:09:17.140213 PCI: 00:1d.0 init finished in 3 msecs
1656 12:09:17.143267 PCI: 00:1f.0 init
1657 12:09:17.146511 IOAPIC: Initializing IOAPIC at 0xfec00000
1658 12:09:17.150102 IOAPIC: Bootstrap Processor Local APIC = 0x00
1659 12:09:17.153165 IOAPIC: ID = 0x02
1660 12:09:17.156707 IOAPIC: Dumping registers
1661 12:09:17.157175 reg 0x0000: 0x02000000
1662 12:09:17.159790 reg 0x0001: 0x00770020
1663 12:09:17.163408 reg 0x0002: 0x00000000
1664 12:09:17.166390 PCI: 00:1f.0 init finished in 21 msecs
1665 12:09:17.169788 PCI: 00:1f.2 init
1666 12:09:17.173312 Disabling ACPI via APMC.
1667 12:09:17.176442 APMC done.
1668 12:09:17.179564 PCI: 00:1f.2 init finished in 6 msecs
1669 12:09:17.191517 PCI: 01:00.0 init
1670 12:09:17.195045 PCI: 01:00.0 init finished in 0 msecs
1671 12:09:17.198046 PNP: 0c09.0 init
1672 12:09:17.205206 Google Chrome EC uptime: 8.411 seconds
1673 12:09:17.208128 Google Chrome AP resets since EC boot: 0
1674 12:09:17.211912 Google Chrome most recent AP reset causes:
1675 12:09:17.218205 Google Chrome EC reset flags at last EC boot: reset-pin
1676 12:09:17.221626 PNP: 0c09.0 init finished in 19 msecs
1677 12:09:17.226709 Devices initialized
1678 12:09:17.230154 Show all devs... After init.
1679 12:09:17.233179 Root Device: enabled 1
1680 12:09:17.233707 DOMAIN: 0000: enabled 1
1681 12:09:17.237003 CPU_CLUSTER: 0: enabled 1
1682 12:09:17.239964 PCI: 00:00.0: enabled 1
1683 12:09:17.243481 PCI: 00:02.0: enabled 1
1684 12:09:17.243999 PCI: 00:04.0: enabled 1
1685 12:09:17.246571 PCI: 00:05.0: enabled 1
1686 12:09:17.250076 PCI: 00:06.0: enabled 0
1687 12:09:17.253173 PCI: 00:07.0: enabled 0
1688 12:09:17.253704 PCI: 00:07.1: enabled 0
1689 12:09:17.256685 PCI: 00:07.2: enabled 0
1690 12:09:17.260150 PCI: 00:07.3: enabled 0
1691 12:09:17.263208 PCI: 00:08.0: enabled 1
1692 12:09:17.263699 PCI: 00:09.0: enabled 0
1693 12:09:17.266756 PCI: 00:0a.0: enabled 0
1694 12:09:17.269996 PCI: 00:0d.0: enabled 1
1695 12:09:17.270511 PCI: 00:0d.1: enabled 0
1696 12:09:17.272997
1697 12:09:17.273506 PCI: 00:0d.2: enabled 0
1698 12:09:17.276442 PCI: 00:0d.3: enabled 0
1699 12:09:17.279841 PCI: 00:0e.0: enabled 0
1700 12:09:17.280350 PCI: 00:10.2: enabled 1
1701 12:09:17.283646 PCI: 00:10.6: enabled 0
1702 12:09:17.286746 PCI: 00:10.7: enabled 0
1703 12:09:17.289609 PCI: 00:12.0: enabled 0
1704 12:09:17.290097 PCI: 00:12.6: enabled 0
1705 12:09:17.293227 PCI: 00:13.0: enabled 0
1706 12:09:17.296708 PCI: 00:14.0: enabled 1
1707 12:09:17.299960 PCI: 00:14.1: enabled 0
1708 12:09:17.300457 PCI: 00:14.2: enabled 1
1709 12:09:17.303309 PCI: 00:14.3: enabled 1
1710 12:09:17.306668 PCI: 00:15.0: enabled 1
1711 12:09:17.309767 PCI: 00:15.1: enabled 1
1712 12:09:17.310293 PCI: 00:15.2: enabled 1
1713 12:09:17.313270 PCI: 00:15.3: enabled 1
1714 12:09:17.316220 PCI: 00:16.0: enabled 1
1715 12:09:17.316801 PCI: 00:16.1: enabled 0
1716 12:09:17.319757 PCI: 00:16.2: enabled 0
1717 12:09:17.323469 PCI: 00:16.3: enabled 0
1718 12:09:17.326249 PCI: 00:16.4: enabled 0
1719 12:09:17.326764 PCI: 00:16.5: enabled 0
1720 12:09:17.329751 PCI: 00:17.0: enabled 0
1721 12:09:17.333184 PCI: 00:19.0: enabled 0
1722 12:09:17.336225 PCI: 00:19.1: enabled 1
1723 12:09:17.336729 PCI: 00:19.2: enabled 0
1724 12:09:17.339401 PCI: 00:1c.0: enabled 1
1725 12:09:17.342955 PCI: 00:1c.1: enabled 0
1726 12:09:17.346490 PCI: 00:1c.2: enabled 0
1727 12:09:17.346982 PCI: 00:1c.3: enabled 0
1728 12:09:17.349443 PCI: 00:1c.4: enabled 0
1729 12:09:17.352804 PCI: 00:1c.5: enabled 0
1730 12:09:17.353442 PCI: 00:1c.6: enabled 1
1731 12:09:17.356062
1732 12:09:17.356576 PCI: 00:1c.7: enabled 0
1733 12:09:17.359694 PCI: 00:1d.0: enabled 1
1734 12:09:17.363118 PCI: 00:1d.1: enabled 0
1735 12:09:17.363631 PCI: 00:1d.2: enabled 1
1736 12:09:17.366117 PCI: 00:1d.3: enabled 0
1737 12:09:17.369351 PCI: 00:1e.0: enabled 1
1738 12:09:17.372931 PCI: 00:1e.1: enabled 0
1739 12:09:17.373396 PCI: 00:1e.2: enabled 1
1740 12:09:17.376347 PCI: 00:1e.3: enabled 1
1741 12:09:17.379231 PCI: 00:1f.0: enabled 1
1742 12:09:17.383032 PCI: 00:1f.1: enabled 0
1743 12:09:17.383483 PCI: 00:1f.2: enabled 1
1744 12:09:17.385877 PCI: 00:1f.3: enabled 1
1745 12:09:17.389208 PCI: 00:1f.4: enabled 0
1746 12:09:17.392751 PCI: 00:1f.5: enabled 1
1747 12:09:17.393386 PCI: 00:1f.6: enabled 0
1748 12:09:17.395674 PCI: 00:1f.7: enabled 0
1749 12:09:17.399817 APIC: 00: enabled 1
1750 12:09:17.400257 GENERIC: 0.0: enabled 1
1751 12:09:17.402568 GENERIC: 0.0: enabled 1
1752 12:09:17.405963 GENERIC: 1.0: enabled 1
1753 12:09:17.409192 GENERIC: 0.0: enabled 1
1754 12:09:17.409667 GENERIC: 1.0: enabled 1
1755 12:09:17.412630 USB0 port 0: enabled 1
1756 12:09:17.416068 GENERIC: 0.0: enabled 1
1757 12:09:17.416540 USB0 port 0: enabled 1
1758 12:09:17.419027 GENERIC: 0.0: enabled 1
1759 12:09:17.422682 I2C: 00:1a: enabled 1
1760 12:09:17.425642 I2C: 00:31: enabled 1
1761 12:09:17.426095 I2C: 00:32: enabled 1
1762 12:09:17.429064 I2C: 00:10: enabled 1
1763 12:09:17.432545 I2C: 00:15: enabled 1
1764 12:09:17.433003 GENERIC: 0.0: enabled 0
1765 12:09:17.435687 GENERIC: 1.0: enabled 0
1766 12:09:17.438910 GENERIC: 0.0: enabled 1
1767 12:09:17.439000 SPI: 00: enabled 1
1768 12:09:17.442161 SPI: 00: enabled 1
1769 12:09:17.445710 PNP: 0c09.0: enabled 1
1770 12:09:17.445799 GENERIC: 0.0: enabled 1
1771 12:09:17.448780 USB3 port 0: enabled 1
1772 12:09:17.451909 USB3 port 1: enabled 1
1773 12:09:17.451997 USB3 port 2: enabled 0
1774 12:09:17.455586
1775 12:09:17.455674 USB3 port 3: enabled 0
1776 12:09:17.459171 USB2 port 0: enabled 0
1777 12:09:17.462043 USB2 port 1: enabled 1
1778 12:09:17.462131 USB2 port 2: enabled 1
1779 12:09:17.465634 USB2 port 3: enabled 0
1780 12:09:17.468716 USB2 port 4: enabled 1
1781 12:09:17.468802 USB2 port 5: enabled 0
1782 12:09:17.472148 USB2 port 6: enabled 0
1783 12:09:17.475103 USB2 port 7: enabled 0
1784 12:09:17.478717 USB2 port 8: enabled 0
1785 12:09:17.478796 USB2 port 9: enabled 0
1786 12:09:17.481721 USB3 port 0: enabled 0
1787 12:09:17.485145 USB3 port 1: enabled 1
1788 12:09:17.485229 USB3 port 2: enabled 0
1789 12:09:17.488577 USB3 port 3: enabled 0
1790 12:09:17.491940 GENERIC: 0.0: enabled 1
1791 12:09:17.495363 GENERIC: 1.0: enabled 1
1792 12:09:17.495452 APIC: 01: enabled 1
1793 12:09:17.498752 APIC: 05: enabled 1
1794 12:09:17.498841 APIC: 07: enabled 1
1795 12:09:17.502081 APIC: 02: enabled 1
1796 12:09:17.505670 APIC: 04: enabled 1
1797 12:09:17.505758 APIC: 06: enabled 1
1798 12:09:17.509005 APIC: 03: enabled 1
1799 12:09:17.511784 PCI: 01:00.0: enabled 1
1800 12:09:17.515449 BS: BS_DEV_INIT run times (exec / console): 33 / 536 ms
1801 12:09:17.521773 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1802 12:09:17.525357 ELOG: NV offset 0xf30000 size 0x1000
1803 12:09:17.531811 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1804 12:09:17.538530 ELOG: Event(17) added with size 13 at 2022-11-25 12:09:17 UTC
1805 12:09:17.544861 ELOG: Event(92) added with size 9 at 2022-11-25 12:09:17 UTC
1806 12:09:17.551481 ELOG: Event(93) added with size 9 at 2022-11-25 12:09:17 UTC
1807 12:09:17.558041 ELOG: Event(9E) added with size 10 at 2022-11-25 12:09:17 UTC
1808 12:09:17.564688 ELOG: Event(9F) added with size 14 at 2022-11-25 12:09:17 UTC
1809 12:09:17.571480 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1810 12:09:17.574567 ELOG: Event(A1) added with size 10 at 2022-11-25 12:09:17 UTC
1811 12:09:17.584677 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1812 12:09:17.591447 ELOG: Event(A0) added with size 9 at 2022-11-25 12:09:17 UTC
1813 12:09:17.594359 elog_add_boot_reason: Logged dev mode boot
1814 12:09:17.601381 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1815 12:09:17.601484 Finalize devices...
1816 12:09:17.604225 Devices finalized
1817 12:09:17.610995 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 12:09:17.614502 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 12:09:17.621197 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 12:09:17.624179 ME: HFSTS1 : 0x80030055
1821 12:09:17.630899 ME: HFSTS2 : 0x30280116
1822 12:09:17.634074 ME: HFSTS3 : 0x00000050
1823 12:09:17.637645 ME: HFSTS4 : 0x00004000
1824 12:09:17.644575 ME: HFSTS5 : 0x00000000
1825 12:09:17.647739 ME: HFSTS6 : 0x00400006
1826 12:09:17.650735 ME: Manufacturing Mode : YES
1827 12:09:17.654353 ME: SPI Protection Mode Enabled : NO
1828 12:09:17.657466 ME: FW Partition Table : OK
1829 12:09:17.664206 ME: Bringup Loader Failure : NO
1830 12:09:17.667363 ME: Firmware Init Complete : NO
1831 12:09:17.670488 ME: Boot Options Present : NO
1832 12:09:17.674348 ME: Update In Progress : NO
1833 12:09:17.677262 ME: D0i3 Support : YES
1834 12:09:17.681164 ME: Low Power State Enabled : NO
1835 12:09:17.683801 ME: CPU Replaced : YES
1836 12:09:17.687233 ME: CPU Replacement Valid : YES
1837 12:09:17.690776
1838 12:09:17.693607 ME: Current Working State : 5
1839 12:09:17.697191 ME: Current Operation State : 1
1840 12:09:17.700285 ME: Current Operation Mode : 3
1841 12:09:17.703631 ME: Error Code : 0
1842 12:09:17.707189 ME: Enhanced Debug Mode : NO
1843 12:09:17.710605 ME: CPU Debug Disabled : YES
1844 12:09:17.713853 ME: TXT Support : NO
1845 12:09:17.720062 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1846 12:09:17.726946 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1847 12:09:17.729930 CBFS: 'fallback/slic' not found.
1848 12:09:17.736815 ACPI: Writing ACPI tables at 76b01000.
1849 12:09:17.736896 ACPI: * FACS
1850 12:09:17.739967 ACPI: * DSDT
1851 12:09:17.743683 Ramoops buffer: 0x100000@0x76a00000.
1852 12:09:17.746570 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1853 12:09:17.753190 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1854 12:09:17.756345 Google Chrome EC: version:
1855 12:09:17.760009 ro: voema_v2.0.10114-a447f03e46
1856 12:09:17.763531 rw: voema_v2.0.10114-a447f03e46
1857 12:09:17.763627 running image: 1
1858 12:09:17.769879 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1859 12:09:17.774452 ACPI: * FADT
1860 12:09:17.774536 SCI is IRQ9
1861 12:09:17.777830 ACPI: added table 1/32, length now 40
1862 12:09:17.781263
1863 12:09:17.781343 ACPI: * SSDT
1864 12:09:17.784502 Found 1 CPU(s) with 8 core(s) each.
1865 12:09:17.790719 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 12:09:17.794560 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 12:09:17.797809 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 12:09:17.800818 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 12:09:17.807687 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 12:09:17.814192 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 12:09:17.817556 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 12:09:17.824049 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 12:09:17.830811 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 12:09:17.834513 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 12:09:17.837754 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 12:09:17.843963 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 12:09:17.850757 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 12:09:17.853792 PS2K: Passing 80 keymaps to kernel
1879 12:09:17.860599 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 12:09:17.867311 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 12:09:17.874012 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 12:09:17.880307 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 12:09:17.887019 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 12:09:17.893927 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 12:09:17.900745 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 12:09:17.907293 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 12:09:17.910194 ACPI: added table 2/32, length now 44
1888 12:09:17.910281 ACPI: * MCFG
1889 12:09:17.914005 ACPI: added table 3/32, length now 48
1890 12:09:17.916850 ACPI: * TPM2
1891 12:09:17.920312 TPM2 log created at 0x769f0000
1892 12:09:17.923647 ACPI: added table 4/32, length now 52
1893 12:09:17.927264 ACPI: * MADT
1894 12:09:17.927350 SCI is IRQ9
1895 12:09:17.930497 ACPI: added table 5/32, length now 56
1896 12:09:17.933608 current = 76b09850
1897 12:09:17.933686 ACPI: * DMAR
1898 12:09:17.936706 ACPI: added table 6/32, length now 60
1899 12:09:17.940358 ACPI: added table 7/32, length now 64
1900 12:09:17.943576
1901 12:09:17.943686 ACPI: * HPET
1902 12:09:17.946631 ACPI: added table 8/32, length now 68
1903 12:09:17.950303 ACPI: done.
1904 12:09:17.950414 ACPI tables: 35216 bytes.
1905 12:09:17.953401 smbios_write_tables: 769ef000
1906 12:09:17.956865 EC returned error result code 3
1907 12:09:17.959982 Couldn't obtain OEM name from CBI
1908 12:09:17.964537 Create SMBIOS type 16
1909 12:09:17.967698 Create SMBIOS type 17
1910 12:09:17.970880 GENERIC: 0.0 (WIFI Device)
1911 12:09:17.970964 SMBIOS tables: 1750 bytes.
1912 12:09:17.974372
1913 12:09:17.977367 Writing table forward entry at 0x00000500
1914 12:09:17.984351 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1915 12:09:17.987695 Writing coreboot table at 0x76b25000
1916 12:09:17.994380 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1917 12:09:17.997713 1. 0000000000001000-000000000009ffff: RAM
1918 12:09:18.000889 2. 00000000000a0000-00000000000fffff: RESERVED
1919 12:09:18.007376 3. 0000000000100000-00000000769eefff: RAM
1920 12:09:18.010867 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1921 12:09:18.017694 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1922 12:09:18.024132 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1923 12:09:18.027076 7. 0000000077000000-000000007fbfffff: RESERVED
1924 12:09:18.030715 8. 00000000c0000000-00000000cfffffff: RESERVED
1925 12:09:18.033856
1926 12:09:18.037023 9. 00000000f8000000-00000000f9ffffff: RESERVED
1927 12:09:18.040842 10. 00000000fb000000-00000000fb000fff: RESERVED
1928 12:09:18.047216 11. 00000000fe000000-00000000fe00ffff: RESERVED
1929 12:09:18.050323 12. 00000000fed80000-00000000fed87fff: RESERVED
1930 12:09:18.057126 13. 00000000fed90000-00000000fed92fff: RESERVED
1931 12:09:18.060269 14. 00000000feda0000-00000000feda1fff: RESERVED
1932 12:09:18.067164 15. 00000000fedc0000-00000000feddffff: RESERVED
1933 12:09:18.070363 16. 0000000100000000-00000002803fffff: RAM
1934 12:09:18.073409 Passing 4 GPIOs to payload:
1935 12:09:18.076937 NAME | PORT | POLARITY | VALUE
1936 12:09:18.083676 lid | undefined | high | high
1937 12:09:18.090163 power | undefined | high | low
1938 12:09:18.093899 oprom | undefined | high | low
1939 12:09:18.100271 EC in RW | 0x000000e5 | high | low
1940 12:09:18.106791 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 438
1941 12:09:18.106879 coreboot table: 1576 bytes.
1942 12:09:18.113713 IMD ROOT 0. 0x76fff000 0x00001000
1943 12:09:18.117030 IMD SMALL 1. 0x76ffe000 0x00001000
1944 12:09:18.119834 FSP MEMORY 2. 0x76c4e000 0x003b0000
1945 12:09:18.123233 VPD 3. 0x76c4d000 0x00000367
1946 12:09:18.126374 RO MCACHE 4. 0x76c4c000 0x00000fdc
1947 12:09:18.129968 CONSOLE 5. 0x76c2c000 0x00020000
1948 12:09:18.133088 FMAP 6. 0x76c2b000 0x00000578
1949 12:09:18.136274 TIME STAMP 7. 0x76c2a000 0x00000910
1950 12:09:18.139873
1951 12:09:18.143382 VBOOT WORK 8. 0x76c16000 0x00014000
1952 12:09:18.146458 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 12:09:18.149650 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 12:09:18.153230 RAMSTAGE 11. 0x76b97000 0x00073000
1955 12:09:18.156215 REFCODE 12. 0x76b42000 0x00055000
1956 12:09:18.159755 SMM BACKUP 13. 0x76b32000 0x00010000
1957 12:09:18.162832 4f444749 14. 0x76b30000 0x00002000
1958 12:09:18.166531 EXT VBT15. 0x76b2d000 0x0000219f
1959 12:09:18.169469 COREBOOT 16. 0x76b25000 0x00008000
1960 12:09:18.173083
1961 12:09:18.176246 ACPI 17. 0x76b01000 0x00024000
1962 12:09:18.179755 ACPI GNVS 18. 0x76b00000 0x00001000
1963 12:09:18.182773 RAMOOPS 19. 0x76a00000 0x00100000
1964 12:09:18.186196 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 12:09:18.189986 SMBIOS 21. 0x769ef000 0x00000800
1966 12:09:18.192887 IMD small region:
1967 12:09:18.196477 IMD ROOT 0. 0x76ffec00 0x00000400
1968 12:09:18.199622 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 12:09:18.202550 POWER STATE 2. 0x76ffeb80 0x00000044
1970 12:09:18.206177 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 12:09:18.212752 MEM INFO 4. 0x76ffe980 0x000001e0
1972 12:09:18.216205 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1973 12:09:18.219210 MTRR: Physical address space:
1974 12:09:18.226046 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 12:09:18.232437 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 12:09:18.239330 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 12:09:18.246065 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 12:09:18.252731 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 12:09:18.258813 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 12:09:18.265816 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 12:09:18.268947 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:09:18.272103 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 12:09:18.275600 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 12:09:18.278764 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 12:09:18.282413
1986 12:09:18.285535 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 12:09:18.288813 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 12:09:18.291857 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 12:09:18.295492 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 12:09:18.301881 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 12:09:18.305293 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 12:09:18.308785 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 12:09:18.312246 call enable_fixed_mtrr()
1994 12:09:18.315926 CPU physical address size: 39 bits
1995 12:09:18.322682 MTRR: default type WB/UC MTRR counts: 6/6.
1996 12:09:18.325740 MTRR: UC selected as default type.
1997 12:09:18.332088 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 12:09:18.335793 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 12:09:18.342357 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 12:09:18.348485 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 12:09:18.355380 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 12:09:18.362153 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 12:09:18.362252
2004 12:09:18.365124 MTRR check
2005 12:09:18.365203 Fixed MTRRs : Enabled
2006 12:09:18.368778
2007 12:09:18.368858 Variable MTRRs: Enabled
2008 12:09:18.368926
2009 12:09:18.375313 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 12:09:18.378473 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 12:09:18.381611 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 12:09:18.384787 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 12:09:18.391788 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 12:09:18.394953 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 12:09:18.398534 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 12:09:18.401409 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 12:09:18.405109 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 12:09:18.411813 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 12:09:18.414844 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 12:09:18.418205 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 12:09:18.421681 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 12:09:18.428269 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 12:09:18.431576 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 12:09:18.434840 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 12:09:18.437955 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 12:09:18.444585 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 12:09:18.448080 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 12:09:18.451282 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 12:09:18.454357 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 12:09:18.461323 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:09:18.464367 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:09:18.467516 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 12:09:18.471105 call enable_fixed_mtrr()
2034 12:09:18.474238 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 12:09:18.481017 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 12:09:18.484056 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 12:09:18.487797 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 12:09:18.490724 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 12:09:18.497274 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 12:09:18.500769 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 12:09:18.504213 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 12:09:18.507350 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 12:09:18.511419 CPU physical address size: 39 bits
2044 12:09:18.517954 call enable_fixed_mtrr()
2045 12:09:18.518111 call enable_fixed_mtrr()
2046 12:09:18.524649 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2047 12:09:18.527746 CPU physical address size: 39 bits
2048 12:09:18.531695 Checking cr50 for pending updates
2049 12:09:18.535447 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 12:09:18.539099
2051 12:09:18.542268 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 12:09:18.545758 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 12:09:18.548823 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 12:09:18.551979 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 12:09:18.558898 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 12:09:18.562045 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 12:09:18.565578 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 12:09:18.568535 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 12:09:18.575428 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 12:09:18.579004 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 12:09:18.582196 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 12:09:18.588776 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 12:09:18.588859 call enable_fixed_mtrr()
2064 12:09:18.595471 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 12:09:18.598406 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 12:09:18.602204 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 12:09:18.605120 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 12:09:18.611725 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 12:09:18.615218 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 12:09:18.618757 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 12:09:18.621826 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 12:09:18.625192 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 12:09:18.628519
2074 12:09:18.631920 CPU physical address size: 39 bits
2075 12:09:18.634981 call enable_fixed_mtrr()
2076 12:09:18.639414 Reading cr50 TPM mode
2077 12:09:18.642611 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 12:09:18.645736 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 12:09:18.649238 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 12:09:18.652391 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 12:09:18.659234 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 12:09:18.662372 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 12:09:18.665716 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 12:09:18.668831 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 12:09:18.675381 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 12:09:18.679086 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 12:09:18.682097 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 12:09:18.685239 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 12:09:18.692744 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 12:09:18.692832 call enable_fixed_mtrr()
2091 12:09:18.699229 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 12:09:18.702735 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 12:09:18.705909 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 12:09:18.709377 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 12:09:18.715699 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 12:09:18.719283 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 12:09:18.722324 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 12:09:18.725814 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 12:09:18.732255 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 12:09:18.735780 CPU physical address size: 39 bits
2101 12:09:18.739018 call enable_fixed_mtrr()
2102 12:09:18.742335 CPU physical address size: 39 bits
2103 12:09:18.745539 CPU physical address size: 39 bits
2104 12:09:18.749087 CPU physical address size: 39 bits
2105 12:09:18.755232 BS: BS_PAYLOAD_LOAD entry times (exec / console): 110 / 7 ms
2106 12:09:18.762131 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2107 12:09:18.768659 Checking segment from ROM address 0xffc02b38
2108 12:09:18.771785 Checking segment from ROM address 0xffc02b54
2109 12:09:18.775442 Loading segment from ROM address 0xffc02b38
2110 12:09:18.778547 code (compression=0)
2111 12:09:18.788409 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2112 12:09:18.795076 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2113 12:09:18.798005 it's not compressed!
2114 12:09:18.937259 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2115 12:09:18.943814 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2116 12:09:18.951111 Loading segment from ROM address 0xffc02b54
2117 12:09:18.951203 Entry Point 0x30000000
2118 12:09:18.953988 Loaded segments
2119 12:09:18.960628 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2120 12:09:19.003239 Finalizing chipset.
2121 12:09:19.006695 Finalizing SMM.
2122 12:09:19.006784 APMC done.
2123 12:09:19.013451 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2124 12:09:19.016407 mp_park_aps done after 0 msecs.
2125 12:09:19.019824 Jumping to boot code at 0x30000000(0x76b25000)
2126 12:09:19.029767 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2127 12:09:19.029857
2128 12:09:19.029929
2129 12:09:19.029994
2130 12:09:19.033605 Starting depthcharge on Voema...
2131 12:09:19.033690
2132 12:09:19.034067 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2133 12:09:19.034174 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2134 12:09:19.034262 Setting prompt string to ['volteer:']
2135 12:09:19.034345 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2136 12:09:19.043013 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2137 12:09:19.043122
2138 12:09:19.049952 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2139 12:09:19.050041
2140 12:09:19.056615 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2141 12:09:19.056703
2142 12:09:19.059691 Failed to find eMMC card reader
2143 12:09:19.059779
2144 12:09:19.059848 Wipe memory regions:
2145 12:09:19.059913
2146 12:09:19.066447 [0x00000000001000, 0x000000000a0000)
2147 12:09:19.066534
2148 12:09:19.069499 [0x00000000100000, 0x00000030000000)
2149 12:09:19.069598
2150 12:09:19.098529 [0x00000032662db0, 0x000000769ef000)
2151 12:09:19.098613
2152 12:09:19.137705 [0x00000100000000, 0x00000280400000)
2153 12:09:19.137800
2154 12:09:19.341597 ec_init: CrosEC protocol v3 supported (256, 256)
2155 12:09:19.341740
2156 12:09:19.772243 R8152: Initializing
2157 12:09:19.772394
2158 12:09:19.775519 Version 6 (ocp_data = 5c30)
2159 12:09:19.775599
2160 12:09:19.779044 R8152: Done initializing
2161 12:09:19.779122
2162 12:09:19.782132 Adding net device
2163 12:09:19.782211
2164 12:09:20.086767 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2165 12:09:20.086901
2166 12:09:20.086972
2167 12:09:20.087038
2168 12:09:20.090137 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 12:09:20.190851 volteer: tftpboot 192.168.201.1 8123207/tftp-deploy-uadu3zi_/kernel/bzImage 8123207/tftp-deploy-uadu3zi_/kernel/cmdline 8123207/tftp-deploy-uadu3zi_/ramdisk/ramdisk.cpio.gz
2171 12:09:20.190991 Setting prompt string to 'Starting kernel'
2172 12:09:20.191101 Setting prompt string to ['Starting kernel']
2173 12:09:20.191178 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 12:09:20.191256 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2175 12:09:20.194982 tftpboot 192.168.201.1 8123207/tftp-deploy-uadu3zi_/kernel/bzImoy-uadu3zi_/kernel/cmdline 8123207/tftp-deploy-uadu3zi_/ramdisk/ramdisk.cpio.gz
2176 12:09:20.195068
2177 12:09:20.195138 Waiting for link
2178 12:09:20.195201
2179 12:09:20.398011 done.
2180 12:09:20.398137
2181 12:09:20.398211 MAC: 00:24:32:30:77:76
2182 12:09:20.398280
2183 12:09:20.401291 Sending DHCP discover... done.
2184 12:09:20.401386
2185 12:09:20.404882 Waiting for reply... done.
2186 12:09:20.404968
2187 12:09:20.408057 Sending DHCP request... done.
2188 12:09:20.408140
2189 12:09:20.411084 Waiting for reply... done.
2190 12:09:20.411165
2191 12:09:20.414657 My ip is 192.168.201.16
2192 12:09:20.414733
2193 12:09:20.417845 The DHCP server ip is 192.168.201.1
2194 12:09:20.417924
2195 12:09:20.424588 TFTP server IP predefined by user: 192.168.201.1
2196 12:09:20.424674
2197 12:09:20.431348 Bootfile predefined by user: 8123207/tftp-deploy-uadu3zi_/kernel/bzImage
2198 12:09:20.431438
2199 12:09:20.434269 Sending tftp read request... done.
2200 12:09:20.434350
2201 12:09:20.437735 Waiting for the transfer...
2202 12:09:20.437813
2203 12:09:20.962984 00000000 ################################################################
2204 12:09:20.963147
2205 12:09:21.479161 00080000 ################################################################
2206 12:09:21.479309
2207 12:09:21.993692 00100000 ################################################################
2208 12:09:21.993829
2209 12:09:22.516095 00180000 ################################################################
2210 12:09:22.516236
2211 12:09:23.033291 00200000 ################################################################
2212 12:09:23.033458
2213 12:09:23.558343 00280000 ################################################################
2214 12:09:23.558487
2215 12:09:24.076304 00300000 ################################################################
2216 12:09:24.076441
2217 12:09:24.618761 00380000 ################################################################
2218 12:09:24.618902
2219 12:09:25.166756 00400000 ################################################################
2220 12:09:25.166900
2221 12:09:25.696883 00480000 ################################################################
2222 12:09:25.697027
2223 12:09:26.238708 00500000 ################################################################
2224 12:09:26.238845
2225 12:09:26.770235 00580000 ################################################################
2226 12:09:26.770406
2227 12:09:27.306008 00600000 ################################################################
2228 12:09:27.306147
2229 12:09:27.626061 00680000 ###################################### done.
2230 12:09:27.626200
2231 12:09:27.629050 The bootfile was 7126928 bytes long.
2232 12:09:27.629125
2233 12:09:27.632701 Sending tftp read request... done.
2234 12:09:27.632778
2235 12:09:27.635768 Waiting for the transfer...
2236 12:09:27.635841
2237 12:09:28.158340 00000000 ################################################################
2238 12:09:28.158484
2239 12:09:28.676138 00080000 ################################################################
2240 12:09:28.676282
2241 12:09:29.194638 00100000 ################################################################
2242 12:09:29.194812
2243 12:09:29.722831 00180000 ################################################################
2244 12:09:29.722978
2245 12:09:30.295299 00200000 ################################################################
2246 12:09:30.295442
2247 12:09:30.841206 00280000 ################################################################
2248 12:09:30.841351
2249 12:09:31.392757 00300000 ################################################################
2250 12:09:31.392914
2251 12:09:32.007081 00380000 ################################################################
2252 12:09:32.007262
2253 12:09:32.614157 00400000 ################################################################
2254 12:09:32.614312
2255 12:09:33.281756 00480000 ################################################################
2256 12:09:33.282297
2257 12:09:33.962867 00500000 ################################################################
2258 12:09:33.963515
2259 12:09:34.629029 00580000 ################################################################
2260 12:09:34.629644
2261 12:09:35.306603 00600000 ################################################################
2262 12:09:35.307164
2263 12:09:35.978875 00680000 ################################################################
2264 12:09:35.979517
2265 12:09:36.661241 00700000 ################################################################
2266 12:09:36.661870
2267 12:09:37.342095 00780000 ################################################################
2268 12:09:37.342681
2269 12:09:38.022732 00800000 ################################################################
2270 12:09:38.023320
2271 12:09:38.708275 00880000 ################################################################
2272 12:09:38.708865
2273 12:09:39.399994 00900000 ################################################################
2274 12:09:39.400570
2275 12:09:40.058685 00980000 ################################################################
2276 12:09:40.058837
2277 12:09:40.670298 00a00000 ################################################################
2278 12:09:40.670960
2279 12:09:41.359156 00a80000 ################################################################
2280 12:09:41.359752
2281 12:09:42.043690 00b00000 ################################################################
2282 12:09:42.044294
2283 12:09:42.729289 00b80000 ################################################################
2284 12:09:42.729849
2285 12:09:43.398809 00c00000 ################################################################
2286 12:09:43.399391
2287 12:09:44.075378 00c80000 ################################################################
2288 12:09:44.075966
2289 12:09:44.744761 00d00000 ################################################################
2290 12:09:44.745344
2291 12:09:45.392561 00d80000 ################################################################
2292 12:09:45.392711
2293 12:09:46.021319 00e00000 ################################################################
2294 12:09:46.021474
2295 12:09:46.641913 00e80000 ################################################################
2296 12:09:46.642064
2297 12:09:47.255192 00f00000 ################################################################
2298 12:09:47.255342
2299 12:09:47.873347 00f80000 ################################################################
2300 12:09:47.873564
2301 12:09:48.504979 01000000 ################################################################
2302 12:09:48.505125
2303 12:09:49.160437 01080000 ################################################################
2304 12:09:49.161023
2305 12:09:49.839557 01100000 ################################################################
2306 12:09:49.840141
2307 12:09:50.513248 01180000 ################################################################
2308 12:09:50.513881
2309 12:09:51.190345 01200000 ################################################################
2310 12:09:51.190934
2311 12:09:51.867864 01280000 ################################################################
2312 12:09:51.868448
2313 12:09:52.547892 01300000 ################################################################
2314 12:09:52.548490
2315 12:09:53.214054 01380000 ################################################################
2316 12:09:53.214595
2317 12:09:53.877169 01400000 ################################################################
2318 12:09:53.877739
2319 12:09:54.557575 01480000 ################################################################
2320 12:09:54.558162
2321 12:09:55.235355 01500000 ################################################################
2322 12:09:55.235949
2323 12:09:55.904701 01580000 ################################################################
2324 12:09:55.905251
2325 12:09:56.446230 01600000 ################################################################
2326 12:09:56.446386
2327 12:09:57.009257 01680000 ################################################################
2328 12:09:57.009400
2329 12:09:57.567622 01700000 ################################################################
2330 12:09:57.567765
2331 12:09:58.173961 01780000 ################################################################
2332 12:09:58.174530
2333 12:09:58.797464 01800000 ################################################################
2334 12:09:58.797658
2335 12:09:59.372001 01880000 ################################################################
2336 12:09:59.372160
2337 12:09:59.978706 01900000 ################################################################
2338 12:09:59.978850
2339 12:10:00.557321 01980000 ################################################################
2340 12:10:00.557488
2341 12:10:01.124351 01a00000 ################################################################
2342 12:10:01.124508
2343 12:10:01.736358 01a80000 ################################################################
2344 12:10:01.736906
2345 12:10:02.388036 01b00000 ################################################################
2346 12:10:02.388649
2347 12:10:03.057847 01b80000 ################################################################
2348 12:10:03.058386
2349 12:10:03.679067 01c00000 ################################################################
2350 12:10:03.679220
2351 12:10:04.313874 01c80000 ################################################################
2352 12:10:04.314405
2353 12:10:04.881691 01d00000 ################################################################
2354 12:10:04.881850
2355 12:10:05.412992 01d80000 ################################################################
2356 12:10:05.413146
2357 12:10:05.964528 01e00000 ################################################################
2358 12:10:05.964693
2359 12:10:06.515315 01e80000 ################################################################
2360 12:10:06.515472
2361 12:10:07.130789 01f00000 ################################################################
2362 12:10:07.131273
2363 12:10:07.751424 01f80000 ################################################################
2364 12:10:07.751639
2365 12:10:08.400497 02000000 ################################################################
2366 12:10:08.401045
2367 12:10:09.056933 02080000 ################################################################
2368 12:10:09.057090
2369 12:10:09.693006 02100000 ################################################################
2370 12:10:09.693574
2371 12:10:10.349180 02180000 ################################################################
2372 12:10:10.349357
2373 12:10:10.549620 02200000 ##################### done.
2374 12:10:10.549877
2375 12:10:10.553087 Sending tftp read request... done.
2376 12:10:10.553274
2377 12:10:10.553422 Waiting for the transfer...
2378 12:10:10.553581
2379 12:10:10.556487 00000000 # done.
2380 12:10:10.556707
2381 12:10:10.566374 Command line loaded dynamically from TFTP file: 8123207/tftp-deploy-uadu3zi_/kernel/cmdline
2382 12:10:10.566884
2383 12:10:10.579416 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2384 12:10:10.579875
2385 12:10:10.588057 Shutting down all USB controllers.
2386 12:10:10.588508
2387 12:10:10.588871 Removing current net device
2388 12:10:10.589208
2389 12:10:10.591245 Finalizing coreboot
2390 12:10:10.591709
2391 12:10:10.598457 Exiting depthcharge with code 4 at timestamp: 60227358
2392 12:10:10.599011
2393 12:10:10.599370
2394 12:10:10.599707 Starting kernel ...
2395 12:10:10.600029
2396 12:10:10.600344
2397 12:10:10.600653
2398 12:10:10.602437 end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
2399 12:10:10.602943 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2400 12:10:10.603329 Setting prompt string to ['Linux version [0-9]']
2401 12:10:10.603694 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2402 12:10:10.604062 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2404 12:14:01.603173 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2406 12:14:01.603584 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2408 12:14:01.603752 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2411 12:14:01.604023 end: 2 depthcharge-action (duration 00:05:00) [common]
2413 12:14:01.604252 Cleaning after the job
2414 12:14:01.604340 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/ramdisk
2415 12:14:01.606608 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/kernel
2416 12:14:01.607136 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123207/tftp-deploy-uadu3zi_/modules
2417 12:14:01.607324 start: 4.1 power-off (timeout 00:00:30) [common]
2418 12:14:01.607489 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2419 12:14:01.626559 >> Command sent successfully.
2420 12:14:01.628487 Returned 0 in 0 seconds
2421 12:14:01.729615 end: 4.1 power-off (duration 00:00:00) [common]
2423 12:14:01.731056 start: 4.2 read-feedback (timeout 00:10:00) [common]
2424 12:14:01.732193 Listened to connection for namespace 'common' for up to 1s
2425 12:14:02.736974 Finalising connection for namespace 'common'
2426 12:14:02.737899 Disconnecting from shell: Finalise
2427 12:14:02.839477 end: 4.2 read-feedback (duration 00:00:01) [common]
2428 12:14:02.840142 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8123207
2429 12:14:02.867804 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8123207
2430 12:14:02.868005 JobError: Your job cannot terminate cleanly.