Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:14:54.250095 lava-dispatcher, installed at version: 2022.10
2 12:14:54.250310 start: 0 validate
3 12:14:54.250462 Start time: 2022-11-25 12:14:54.250453+00:00 (UTC)
4 12:14:54.250606 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:14:54.250762 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 12:14:54.538106 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:14:54.538326 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:14:54.828498 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:14:54.828671 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:14:55.118497 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:14:55.118778 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:14:55.413738 validate duration: 1.16
14 12:14:55.414050 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:14:55.414161 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:14:55.414260 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:14:55.414383 Not decompressing ramdisk as can be used compressed.
18 12:14:55.414507 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 12:14:55.414622 saving as /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/ramdisk/initrd.cpio.gz
20 12:14:55.414707 total size: 5431719 (5MB)
21 12:14:55.416053 progress 0% (0MB)
22 12:14:55.417801 progress 5% (0MB)
23 12:14:55.419376 progress 10% (0MB)
24 12:14:55.420982 progress 15% (0MB)
25 12:14:55.422689 progress 20% (1MB)
26 12:14:55.424215 progress 25% (1MB)
27 12:14:55.425738 progress 30% (1MB)
28 12:14:55.427443 progress 35% (1MB)
29 12:14:55.428989 progress 40% (2MB)
30 12:14:55.430533 progress 45% (2MB)
31 12:14:55.432062 progress 50% (2MB)
32 12:14:55.433807 progress 55% (2MB)
33 12:14:55.435334 progress 60% (3MB)
34 12:14:55.436849 progress 65% (3MB)
35 12:14:55.438537 progress 70% (3MB)
36 12:14:55.440063 progress 75% (3MB)
37 12:14:55.441510 progress 80% (4MB)
38 12:14:55.442975 progress 85% (4MB)
39 12:14:55.444544 progress 90% (4MB)
40 12:14:55.445950 progress 95% (4MB)
41 12:14:55.447413 progress 100% (5MB)
42 12:14:55.447687 5MB downloaded in 0.03s (157.09MB/s)
43 12:14:55.447842 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:14:55.448108 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:14:55.448207 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:14:55.448304 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:14:55.448416 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:14:55.448491 saving as /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/kernel/bzImage
50 12:14:55.448558 total size: 7126928 (6MB)
51 12:14:55.448625 No compression specified
52 12:14:55.449802 progress 0% (0MB)
53 12:14:55.451842 progress 5% (0MB)
54 12:14:55.453901 progress 10% (0MB)
55 12:14:55.455924 progress 15% (1MB)
56 12:14:55.457902 progress 20% (1MB)
57 12:14:55.459974 progress 25% (1MB)
58 12:14:55.461974 progress 30% (2MB)
59 12:14:55.463970 progress 35% (2MB)
60 12:14:55.465836 progress 40% (2MB)
61 12:14:55.467833 progress 45% (3MB)
62 12:14:55.469798 progress 50% (3MB)
63 12:14:55.471761 progress 55% (3MB)
64 12:14:55.473722 progress 60% (4MB)
65 12:14:55.475690 progress 65% (4MB)
66 12:14:55.477640 progress 70% (4MB)
67 12:14:55.479593 progress 75% (5MB)
68 12:14:55.481387 progress 80% (5MB)
69 12:14:55.483342 progress 85% (5MB)
70 12:14:55.485288 progress 90% (6MB)
71 12:14:55.487247 progress 95% (6MB)
72 12:14:55.489215 progress 100% (6MB)
73 12:14:55.489457 6MB downloaded in 0.04s (166.21MB/s)
74 12:14:55.489621 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:14:55.489898 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:14:55.489999 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:14:55.490098 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:14:55.490215 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 12:14:55.490292 saving as /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/nfsrootfs/full.rootfs.tar
81 12:14:55.490363 total size: 207113456 (197MB)
82 12:14:55.490433 Using unxz to decompress xz
83 12:14:55.494068 progress 0% (0MB)
84 12:14:56.118665 progress 5% (9MB)
85 12:14:56.713981 progress 10% (19MB)
86 12:14:57.372947 progress 15% (29MB)
87 12:14:57.779276 progress 20% (39MB)
88 12:14:58.184657 progress 25% (49MB)
89 12:14:58.842742 progress 30% (59MB)
90 12:14:59.451168 progress 35% (69MB)
91 12:15:00.116573 progress 40% (79MB)
92 12:15:00.736875 progress 45% (88MB)
93 12:15:01.382026 progress 50% (98MB)
94 12:15:02.085416 progress 55% (108MB)
95 12:15:02.889796 progress 60% (118MB)
96 12:15:03.048118 progress 65% (128MB)
97 12:15:03.208451 progress 70% (138MB)
98 12:15:03.315136 progress 75% (148MB)
99 12:15:03.390875 progress 80% (158MB)
100 12:15:03.471189 progress 85% (167MB)
101 12:15:03.590090 progress 90% (177MB)
102 12:15:03.886803 progress 95% (187MB)
103 12:15:04.547577 progress 100% (197MB)
104 12:15:04.554255 197MB downloaded in 9.06s (21.79MB/s)
105 12:15:04.554562 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:15:04.554872 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:15:04.554980 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:15:04.555081 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:15:04.555207 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:15:04.555289 saving as /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/modules/modules.tar
112 12:15:04.555358 total size: 52100 (0MB)
113 12:15:04.555428 Using unxz to decompress xz
114 12:15:04.558854 progress 62% (0MB)
115 12:15:04.559271 progress 100% (0MB)
116 12:15:04.562866 0MB downloaded in 0.01s (6.62MB/s)
117 12:15:04.563116 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:15:04.563405 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:15:04.563514 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 12:15:04.563622 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 12:15:06.849108 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8123270/extract-nfsrootfs-zmfi6c3j
123 12:15:06.849323 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:15:06.849437 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 12:15:06.849592 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr
126 12:15:06.849704 makedir: /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin
127 12:15:06.849801 makedir: /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/tests
128 12:15:06.849892 makedir: /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/results
129 12:15:06.850003 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-add-keys
130 12:15:06.850147 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-add-sources
131 12:15:06.850277 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-background-process-start
132 12:15:06.850404 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-background-process-stop
133 12:15:06.850528 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-common-functions
134 12:15:06.850649 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-echo-ipv4
135 12:15:06.850781 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-install-packages
136 12:15:06.850903 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-installed-packages
137 12:15:06.851022 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-os-build
138 12:15:06.851143 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-probe-channel
139 12:15:06.851262 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-probe-ip
140 12:15:06.851382 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-target-ip
141 12:15:06.851501 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-target-mac
142 12:15:06.851621 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-target-storage
143 12:15:06.851743 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-case
144 12:15:06.851866 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-event
145 12:15:06.851985 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-feedback
146 12:15:06.852109 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-raise
147 12:15:06.852228 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-reference
148 12:15:06.852347 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-runner
149 12:15:06.852466 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-set
150 12:15:06.852586 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-test-shell
151 12:15:06.852708 Updating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-add-keys (debian)
152 12:15:06.852831 Updating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-add-sources (debian)
153 12:15:06.852955 Updating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-install-packages (debian)
154 12:15:06.853078 Updating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-installed-packages (debian)
155 12:15:06.853199 Updating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/bin/lava-os-build (debian)
156 12:15:06.853306 Creating /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/environment
157 12:15:06.853400 LAVA metadata
158 12:15:06.853473 - LAVA_JOB_ID=8123270
159 12:15:06.853541 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:15:06.853649 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
161 12:15:06.853721 skipped lava-vland-overlay
162 12:15:06.853806 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:15:06.853896 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
164 12:15:06.853966 skipped lava-multinode-overlay
165 12:15:06.854049 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:15:06.854140 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 12:15:06.854222 Loading test definitions
168 12:15:06.854324 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 12:15:06.854403 Using /lava-8123270 at stage 0
170 12:15:06.854651 uuid=8123270_1.5.2.3.1 testdef=None
171 12:15:06.854753 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:15:06.854851 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 12:15:06.855308 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:15:06.855568 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 12:15:06.856099 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:15:06.856362 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 12:15:06.856868 runner path: /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/0/tests/0_timesync-off test_uuid 8123270_1.5.2.3.1
180 12:15:06.857031 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:15:06.857291 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 12:15:06.857375 Using /lava-8123270 at stage 0
184 12:15:06.857496 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:15:06.857587 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/0/tests/1_kselftest-filesystems'
186 12:15:10.630555 Running '/usr/bin/git checkout kernelci.org
187 12:15:10.788638 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
188 12:15:10.789440 uuid=8123270_1.5.2.3.5 testdef=None
189 12:15:10.789648 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
191 12:15:10.789977 start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
192 12:15:10.790794 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:15:10.791097 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
195 12:15:10.792106 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:15:10.792374 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
198 12:15:10.793420 runner path: /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/0/tests/1_kselftest-filesystems test_uuid 8123270_1.5.2.3.5
199 12:15:10.793523 BOARD='asus-C436FA-Flip-hatch'
200 12:15:10.793596 BRANCH='cip'
201 12:15:10.793662 SKIPFILE='skipfile-lkft.yaml'
202 12:15:10.793726 TESTPROG_URL='None'
203 12:15:10.793790 TST_CASENAME=''
204 12:15:10.793852 TST_CMDFILES='filesystems'
205 12:15:10.793994 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 12:15:10.794227 Creating lava-test-runner.conf files
208 12:15:10.794297 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123270/lava-overlay-xr5w6ikr/lava-8123270/0 for stage 0
209 12:15:10.794388 - 0_timesync-off
210 12:15:10.794462 - 1_kselftest-filesystems
211 12:15:10.794562 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
212 12:15:10.794662 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
213 12:15:19.082021 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
214 12:15:19.082219 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
215 12:15:19.082342 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:15:19.082453 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
217 12:15:19.082558 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
218 12:15:19.199516 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:15:19.199915 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
220 12:15:19.200056 extracting modules file /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123270/extract-nfsrootfs-zmfi6c3j
221 12:15:19.204758 extracting modules file /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123270/extract-overlay-ramdisk-mqbwp34u/ramdisk
222 12:15:19.209159 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:15:19.209309 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
224 12:15:19.209419 [common] Applying overlay to NFS
225 12:15:19.209525 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123270/compress-overlay-7lep4b4k/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8123270/extract-nfsrootfs-zmfi6c3j
226 12:15:19.733405 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
227 12:15:19.733655 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
228 12:15:19.733784 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:15:19.733907 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
230 12:15:19.734009 Building ramdisk /var/lib/lava/dispatcher/tmp/8123270/extract-overlay-ramdisk-mqbwp34u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8123270/extract-overlay-ramdisk-mqbwp34u/ramdisk
231 12:15:19.772105 >> 24546 blocks
232 12:15:20.313469 rename /var/lib/lava/dispatcher/tmp/8123270/extract-overlay-ramdisk-mqbwp34u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/ramdisk/ramdisk.cpio.gz
233 12:15:20.313935 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:15:20.314098 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
235 12:15:20.314228 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
236 12:15:20.314365 No mkimage arch provided, not using FIT.
237 12:15:20.314481 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:15:20.314596 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:15:20.314751 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
240 12:15:20.314876 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
241 12:15:20.314984 No LXC device requested
242 12:15:20.315108 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:15:20.315241 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
244 12:15:20.315350 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:15:20.315442 Checking files for TFTP limit of 4294967296 bytes.
246 12:15:20.315885 end: 1 tftp-deploy (duration 00:00:25) [common]
247 12:15:20.316013 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:15:20.316134 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:15:20.316296 substitutions:
250 12:15:20.316400 - {DTB}: None
251 12:15:20.316490 - {INITRD}: 8123270/tftp-deploy-_94_lupg/ramdisk/ramdisk.cpio.gz
252 12:15:20.316576 - {KERNEL}: 8123270/tftp-deploy-_94_lupg/kernel/bzImage
253 12:15:20.316660 - {LAVA_MAC}: None
254 12:15:20.316742 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8123270/extract-nfsrootfs-zmfi6c3j
255 12:15:20.316825 - {NFS_SERVER_IP}: 192.168.201.1
256 12:15:20.316906 - {PRESEED_CONFIG}: None
257 12:15:20.316997 - {PRESEED_LOCAL}: None
258 12:15:20.317080 - {RAMDISK}: 8123270/tftp-deploy-_94_lupg/ramdisk/ramdisk.cpio.gz
259 12:15:20.317161 - {ROOT_PART}: None
260 12:15:20.317242 - {ROOT}: None
261 12:15:20.317322 - {SERVER_IP}: 192.168.201.1
262 12:15:20.317402 - {TEE}: None
263 12:15:20.317481 Parsed boot commands:
264 12:15:20.317569 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:15:20.317767 Parsed boot commands: tftpboot 192.168.201.1 8123270/tftp-deploy-_94_lupg/kernel/bzImage 8123270/tftp-deploy-_94_lupg/kernel/cmdline 8123270/tftp-deploy-_94_lupg/ramdisk/ramdisk.cpio.gz
266 12:15:20.317882 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:15:20.318001 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:15:20.318121 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:15:20.318252 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:15:20.318368 Not connected, no need to disconnect.
271 12:15:20.318486 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:15:20.318605 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:15:20.318708 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
274 12:15:20.321786 Setting prompt string to ['lava-test: # ']
275 12:15:20.322142 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:15:20.322276 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:15:20.322421 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:15:20.322539 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:15:20.322782 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
280 12:15:20.344581 >> Command sent successfully.
281 12:15:20.346702 Returned 0 in 0 seconds
282 12:15:20.447455 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 12:15:20.447802 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 12:15:20.447920 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 12:15:20.448027 Setting prompt string to 'Starting depthcharge on Helios...'
287 12:15:20.448109 Changing prompt to 'Starting depthcharge on Helios...'
288 12:15:20.448189 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 12:15:20.448505 [Enter `^Ec?' for help]
290 12:15:27.563210
291 12:15:27.563424
292 12:15:27.573071 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 12:15:27.576617 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 12:15:27.582980 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 12:15:27.586432 CPU: AES supported, TXT NOT supported, VT supported
296 12:15:27.593566 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 12:15:27.596465 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 12:15:27.603519 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 12:15:27.606449 VBOOT: Loading verstage.
300 12:15:27.610037 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 12:15:27.616490 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 12:15:27.620095 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 12:15:27.623096 CBFS @ c08000 size 3f8000
304 12:15:27.629589 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 12:15:27.633122 CBFS: Locating 'fallback/verstage'
306 12:15:27.636581 CBFS: Found @ offset 10fb80 size 1072c
307 12:15:27.636677
308 12:15:27.636753
309 12:15:27.649755 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 12:15:27.663682 Probing TPM: . done!
311 12:15:27.667216 TPM ready after 0 ms
312 12:15:27.669993 Connected to device vid:did:rid of 1ae0:0028:00
313 12:15:27.680576 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
314 12:15:27.684203 Initialized TPM device CR50 revision 0
315 12:15:27.726292 tlcl_send_startup: Startup return code is 0
316 12:15:27.726417 TPM: setup succeeded
317 12:15:27.739194 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 12:15:27.742652 Chrome EC: UHEPI supported
319 12:15:27.746418 Phase 1
320 12:15:27.749237 FMAP: area GBB found @ c05000 (12288 bytes)
321 12:15:27.756350 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 12:15:27.756446 Phase 2
323 12:15:27.759238
324 12:15:27.759319 Phase 3
325 12:15:27.762857 FMAP: area GBB found @ c05000 (12288 bytes)
326 12:15:27.769425 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 12:15:27.775927 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 12:15:27.779363 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
329 12:15:27.785960 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 12:15:27.801806 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 12:15:27.804671 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
332 12:15:27.811673 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 12:15:27.815833 Phase 4
334 12:15:27.819450 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
335 12:15:27.825781 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 12:15:28.005460 VB2:vb2_rsa_verify_digest() Digest check failed!
337 12:15:28.008535 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 12:15:28.012013
339 12:15:28.012112 Saving nvdata
340 12:15:28.015110 Reboot requested (10020007)
341 12:15:28.018202 board_reset() called!
342 12:15:28.018287 full_reset() called!
343 12:15:32.530510
344 12:15:32.530679
345 12:15:32.539935 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
346 12:15:32.543566 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
347 12:15:32.550022 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
348 12:15:32.552978 CPU: AES supported, TXT NOT supported, VT supported
349 12:15:32.559810 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
350 12:15:32.563360 PCH: device id 0284 (rev 00) is Cometlake-U Premium
351 12:15:32.569729 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
352 12:15:32.573232 VBOOT: Loading verstage.
353 12:15:32.576710 FMAP: Found "FLASH" version 1.1 at 0xc04000.
354 12:15:32.583038 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
355 12:15:32.586646 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 12:15:32.589999 CBFS @ c08000 size 3f8000
357 12:15:32.596605 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 12:15:32.599543 CBFS: Locating 'fallback/verstage'
359 12:15:32.602970 CBFS: Found @ offset 10fb80 size 1072c
360 12:15:32.607049
361 12:15:32.607152
362 12:15:32.616529 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
363 12:15:32.631303 Probing TPM: . done!
364 12:15:32.634309 TPM ready after 0 ms
365 12:15:32.637654 Connected to device vid:did:rid of 1ae0:0028:00
366 12:15:32.648338 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
367 12:15:32.651217 Initialized TPM device CR50 revision 0
368 12:15:32.693813 tlcl_send_startup: Startup return code is 0
369 12:15:32.693982 TPM: setup succeeded
370 12:15:32.706530 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
371 12:15:32.710072 Chrome EC: UHEPI supported
372 12:15:32.713578 Phase 1
373 12:15:32.717181 FMAP: area GBB found @ c05000 (12288 bytes)
374 12:15:32.723406 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
375 12:15:32.729943 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
376 12:15:32.733370 Recovery requested (1009000e)
377 12:15:32.733472 Saving nvdata
378 12:15:32.739096
379 12:15:32.745390 tlcl_extend: response is 0
380 12:15:32.754055 tlcl_extend: response is 0
381 12:15:32.761097 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 12:15:32.764023 CBFS @ c08000 size 3f8000
383 12:15:32.771008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 12:15:32.773808 CBFS: Locating 'fallback/romstage'
385 12:15:32.777267 CBFS: Found @ offset 80 size 145fc
386 12:15:32.780814 Accumulated console time in verstage 98 ms
387 12:15:32.780914
388 12:15:32.780990
389 12:15:32.794337 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
390 12:15:32.800795 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
391 12:15:32.804159 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
392 12:15:32.807489 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
393 12:15:32.813980 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
394 12:15:32.817295 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
395 12:15:32.820869 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
396 12:15:32.823884 TCO_STS: 0000 0000
397 12:15:32.827434 GEN_PMCON: e0015238 00000200
398 12:15:32.830358 GBLRST_CAUSE: 00000000 00000000
399 12:15:32.830459 prev_sleep_state 5
400 12:15:32.833852 Boot Count incremented to 36561
401 12:15:32.840628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 12:15:32.843959 CBFS @ c08000 size 3f8000
403 12:15:32.850761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 12:15:32.850880 CBFS: Locating 'fspm.bin'
405 12:15:32.853691 CBFS: Found @ offset 5ffc0 size 71000
406 12:15:32.857237
407 12:15:32.860583 Chrome EC: UHEPI supported
408 12:15:32.867096 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
409 12:15:32.870672 Probing TPM: done!
410 12:15:32.877199 Connected to device vid:did:rid of 1ae0:0028:00
411 12:15:32.887186 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
412 12:15:32.893033 Initialized TPM device CR50 revision 0
413 12:15:32.901965 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 12:15:32.908632 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
415 12:15:32.912040 MRC cache found, size 1948
416 12:15:32.915561 bootmode is set to: 2
417 12:15:32.918310 PRMRR disabled by config.
418 12:15:32.918406 SPD INDEX = 1
419 12:15:32.921757
420 12:15:32.925215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 12:15:32.928632 CBFS @ c08000 size 3f8000
422 12:15:32.935209 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
423 12:15:32.935324 CBFS: Locating 'spd.bin'
424 12:15:32.938670 CBFS: Found @ offset 5fb80 size 400
425 12:15:32.941601 SPD: module type is LPDDR3
426 12:15:32.944951 SPD: module part is
427 12:15:32.951734 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
428 12:15:32.954699 SPD: device width 4 bits, bus width 8 bits
429 12:15:32.958299 SPD: module size is 4096 MB (per channel)
430 12:15:32.961831 memory slot: 0 configuration done.
431 12:15:32.964708 memory slot: 2 configuration done.
432 12:15:33.016188 CBMEM:
433 12:15:33.018988 IMD: root @ 99fff000 254 entries.
434 12:15:33.022537 IMD: root @ 99ffec00 62 entries.
435 12:15:33.025978 External stage cache:
436 12:15:33.028956 IMD: root @ 9abff000 254 entries.
437 12:15:33.032469 IMD: root @ 9abfec00 62 entries.
438 12:15:33.038841 Chrome EC: clear events_b mask to 0x0000000020004000
439 12:15:33.052017 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 12:15:33.065069 tlcl_write: response is 0
441 12:15:33.074355 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 12:15:33.080703 MRC: TPM MRC hash updated successfully.
443 12:15:33.080826 2 DIMMs found
444 12:15:33.084037 SMM Memory Map
445 12:15:33.087482 SMRAM : 0x9a000000 0x1000000
446 12:15:33.090949 Subregion 0: 0x9a000000 0xa00000
447 12:15:33.093961 Subregion 1: 0x9aa00000 0x200000
448 12:15:33.097492 Subregion 2: 0x9ac00000 0x400000
449 12:15:33.100850 top_of_ram = 0x9a000000
450 12:15:33.103827 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
451 12:15:33.110393 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
452 12:15:33.113702 MTRR Range: Start=ff000000 End=0 (Size 1000000)
453 12:15:33.120753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:15:33.123635 CBFS @ c08000 size 3f8000
455 12:15:33.126956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 12:15:33.130450 CBFS: Locating 'fallback/postcar'
457 12:15:33.136989 CBFS: Found @ offset 107000 size 4b44
458 12:15:33.140531 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
459 12:15:33.152493 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
460 12:15:33.155982 Processing 180 relocs. Offset value of 0x97c0c000
461 12:15:33.164671 Accumulated console time in romstage 286 ms
462 12:15:33.164791
463 12:15:33.164869
464 12:15:33.174461 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
465 12:15:33.181035 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 12:15:33.184359 CBFS @ c08000 size 3f8000
467 12:15:33.187909 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 12:15:33.190755 CBFS: Locating 'fallback/ramstage'
469 12:15:33.194334
470 12:15:33.197836 CBFS: Found @ offset 43380 size 1b9e8
471 12:15:33.204127 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
472 12:15:33.236023 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
473 12:15:33.239595 Processing 3976 relocs. Offset value of 0x98db0000
474 12:15:33.245924 Accumulated console time in postcar 52 ms
475 12:15:33.246040
476 12:15:33.246120
477 12:15:33.256425 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
478 12:15:33.262803 FMAP: area RO_VPD found @ c00000 (16384 bytes)
479 12:15:33.266265 WARNING: RO_VPD is uninitialized or empty.
480 12:15:33.269137 FMAP: area RW_VPD found @ af8000 (8192 bytes)
481 12:15:33.276100 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 12:15:33.276215 Normal boot.
483 12:15:33.282539 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
484 12:15:33.286022 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
485 12:15:33.289642 CBFS @ c08000 size 3f8000
486 12:15:33.296001 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
487 12:15:33.298827 CBFS: Locating 'cpu_microcode_blob.bin'
488 12:15:33.302473 CBFS: Found @ offset 14700 size 2ec00
489 12:15:33.305790 microcode: sig=0x806ec pf=0x4 revision=0xc9
490 12:15:33.308769 Skip microcode update
491 12:15:33.315830 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
492 12:15:33.315939 CBFS @ c08000 size 3f8000
493 12:15:33.322100 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
494 12:15:33.325597 CBFS: Locating 'fsps.bin'
495 12:15:33.329070 CBFS: Found @ offset d1fc0 size 35000
496 12:15:33.354449 Detected 4 core, 8 thread CPU.
497 12:15:33.357710 Setting up SMI for CPU
498 12:15:33.361310 IED base = 0x9ac00000
499 12:15:33.361402 IED size = 0x00400000
500 12:15:33.364325 Will perform SMM setup.
501 12:15:33.370759 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
502 12:15:33.377684 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
503 12:15:33.380719 Processing 16 relocs. Offset value of 0x00030000
504 12:15:33.384684 Attempting to start 7 APs
505 12:15:33.387600 Waiting for 10ms after sending INIT.
506 12:15:33.403952 Waiting for 1st SIPI to complete...done.
507 12:15:33.404106 AP: slot 1 apic_id 1.
508 12:15:33.410688 Waiting for 2nd SIPI to complete...done.
509 12:15:33.410807 AP: slot 4 apic_id 7.
510 12:15:33.414147 AP: slot 5 apic_id 6.
511 12:15:33.417551 AP: slot 7 apic_id 2.
512 12:15:33.417639 AP: slot 6 apic_id 3.
513 12:15:33.420633 AP: slot 3 apic_id 4.
514 12:15:33.423954 AP: slot 2 apic_id 5.
515 12:15:33.430321 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
516 12:15:33.437339 Processing 13 relocs. Offset value of 0x00038000
517 12:15:33.440388 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
518 12:15:33.443939
519 12:15:33.446922 Installing SMM handler to 0x9a000000
520 12:15:33.453701 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 12:15:33.460553 Processing 658 relocs. Offset value of 0x9a010000
522 12:15:33.467126 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 12:15:33.469999 Processing 13 relocs. Offset value of 0x9a008000
524 12:15:33.476955 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 12:15:33.483389 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 12:15:33.490007 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 12:15:33.493387 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 12:15:33.499916 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 12:15:33.506659 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 12:15:33.510232 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 12:15:33.516609 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 12:15:33.520116 Clearing SMI status registers
533 12:15:33.523425 SMI_STS: PM1
534 12:15:33.523542 PM1_STS: PWRBTN
535 12:15:33.526973 TCO_STS: SECOND_TO
536 12:15:33.530372 New SMBASE 0x9a000000
537 12:15:33.533340 In relocation handler: CPU 0
538 12:15:33.536746 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 12:15:33.540268 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:15:33.543724 Relocation complete.
541 12:15:33.546695 New SMBASE 0x99fffc00
542 12:15:33.546798 In relocation handler: CPU 1
543 12:15:33.553671 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 12:15:33.556601 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:15:33.560135 Relocation complete.
546 12:15:33.560233 New SMBASE 0x99ffe800
547 12:15:33.563448
548 12:15:33.563538 In relocation handler: CPU 6
549 12:15:33.569953 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
550 12:15:33.573686 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:15:33.576549 Relocation complete.
552 12:15:33.576637 New SMBASE 0x99ffe400
553 12:15:33.579870 In relocation handler: CPU 7
554 12:15:33.586909 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
555 12:15:33.589779 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:15:33.593304 Relocation complete.
557 12:15:33.593405 New SMBASE 0x99fff000
558 12:15:33.596861 In relocation handler: CPU 4
559 12:15:33.599858 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
560 12:15:33.606726 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:15:33.610261 Relocation complete.
562 12:15:33.610368 New SMBASE 0x99ffec00
563 12:15:33.613100 In relocation handler: CPU 5
564 12:15:33.616571 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
565 12:15:33.622955 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 12:15:33.626404 Relocation complete.
567 12:15:33.626506 New SMBASE 0x99fff400
568 12:15:33.629926 In relocation handler: CPU 3
569 12:15:33.633215 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
570 12:15:33.639685 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 12:15:33.639792 Relocation complete.
572 12:15:33.643227 New SMBASE 0x99fff800
573 12:15:33.646267 In relocation handler: CPU 2
574 12:15:33.649703 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
575 12:15:33.656704 Writing SMRR. base = 0x9a000006, mask=0xff000800
576 12:15:33.656816 Relocation complete.
577 12:15:33.659525 Initializing CPU #0
578 12:15:33.662874 CPU: vendor Intel device 806ec
579 12:15:33.666446 CPU: family 06, model 8e, stepping 0c
580 12:15:33.669361 Clearing out pending MCEs
581 12:15:33.673001 Setting up local APIC...
582 12:15:33.673096 apic_id: 0x00 done.
583 12:15:33.675957 Turbo is available but hidden
584 12:15:33.679522 Turbo is available and visible
585 12:15:33.683052 VMX status: enabled
586 12:15:33.686387 IA32_FEATURE_CONTROL status: locked
587 12:15:33.689257 Skip microcode update
588 12:15:33.689361 CPU #0 initialized
589 12:15:33.692856 Initializing CPU #1
590 12:15:33.696590 Initializing CPU #6
591 12:15:33.696691 Initializing CPU #7
592 12:15:33.699444 CPU: vendor Intel device 806ec
593 12:15:33.703048 CPU: family 06, model 8e, stepping 0c
594 12:15:33.706582 CPU: vendor Intel device 806ec
595 12:15:33.709367 CPU: family 06, model 8e, stepping 0c
596 12:15:33.712761 Clearing out pending MCEs
597 12:15:33.716221 Clearing out pending MCEs
598 12:15:33.719145 Setting up local APIC...
599 12:15:33.722615 CPU: vendor Intel device 806ec
600 12:15:33.725944 CPU: family 06, model 8e, stepping 0c
601 12:15:33.729507 Clearing out pending MCEs
602 12:15:33.729615 apic_id: 0x03 done.
603 12:15:33.732438 Setting up local APIC...
604 12:15:33.735917 Setting up local APIC...
605 12:15:33.736017 VMX status: enabled
606 12:15:33.739288 apic_id: 0x02 done.
607 12:15:33.742190 IA32_FEATURE_CONTROL status: locked
608 12:15:33.745638 VMX status: enabled
609 12:15:33.745738 Skip microcode update
610 12:15:33.749127 IA32_FEATURE_CONTROL status: locked
611 12:15:33.752625 CPU #6 initialized
612 12:15:33.756105 Skip microcode update
613 12:15:33.756209 Initializing CPU #4
614 12:15:33.758861 Initializing CPU #5
615 12:15:33.762349 CPU: vendor Intel device 806ec
616 12:15:33.765684 CPU: family 06, model 8e, stepping 0c
617 12:15:33.769248 CPU: vendor Intel device 806ec
618 12:15:33.772123 CPU: family 06, model 8e, stepping 0c
619 12:15:33.775716 Clearing out pending MCEs
620 12:15:33.779219 Clearing out pending MCEs
621 12:15:33.779320 Setting up local APIC...
622 12:15:33.782061 CPU #7 initialized
623 12:15:33.785554 Setting up local APIC...
624 12:15:33.785654 apic_id: 0x01 done.
625 12:15:33.789060 apic_id: 0x07 done.
626 12:15:33.792494 Initializing CPU #2
627 12:15:33.792594 Initializing CPU #3
628 12:15:33.795376 CPU: vendor Intel device 806ec
629 12:15:33.798798 CPU: family 06, model 8e, stepping 0c
630 12:15:33.802384 CPU: vendor Intel device 806ec
631 12:15:33.805823 CPU: family 06, model 8e, stepping 0c
632 12:15:33.808741
633 12:15:33.808842 Clearing out pending MCEs
634 12:15:33.812262 Clearing out pending MCEs
635 12:15:33.815569 Setting up local APIC...
636 12:15:33.815669 apic_id: 0x06 done.
637 12:15:33.819095
638 12:15:33.819198 VMX status: enabled
639 12:15:33.822023 VMX status: enabled
640 12:15:33.825514 IA32_FEATURE_CONTROL status: locked
641 12:15:33.828942 IA32_FEATURE_CONTROL status: locked
642 12:15:33.832337 Skip microcode update
643 12:15:33.832441 Skip microcode update
644 12:15:33.835250 CPU #4 initialized
645 12:15:33.835348 CPU #5 initialized
646 12:15:33.838647 apic_id: 0x05 done.
647 12:15:33.842024 Setting up local APIC...
648 12:15:33.842129 VMX status: enabled
649 12:15:33.845131 VMX status: enabled
650 12:15:33.848638 apic_id: 0x04 done.
651 12:15:33.851668 IA32_FEATURE_CONTROL status: locked
652 12:15:33.851760 VMX status: enabled
653 12:15:33.855143 Skip microcode update
654 12:15:33.858639 IA32_FEATURE_CONTROL status: locked
655 12:15:33.861612 CPU #2 initialized
656 12:15:33.861714 Skip microcode update
657 12:15:33.868381 IA32_FEATURE_CONTROL status: locked
658 12:15:33.868491 CPU #3 initialized
659 12:15:33.871871 Skip microcode update
660 12:15:33.871968 CPU #1 initialized
661 12:15:33.878350 bsp_do_flight_plan done after 466 msecs.
662 12:15:33.881426 CPU: frequency set to 4200 MHz
663 12:15:33.881518 Enabling SMIs.
664 12:15:33.884883 Locking SMM.
665 12:15:33.898332 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
666 12:15:33.901926 CBFS @ c08000 size 3f8000
667 12:15:33.908177 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
668 12:15:33.908317 CBFS: Locating 'vbt.bin'
669 12:15:33.911682 CBFS: Found @ offset 5f5c0 size 499
670 12:15:33.918398 Found a VBT of 4608 bytes after decompression
671 12:15:34.101157 Display FSP Version Info HOB
672 12:15:34.103934 Reference Code - CPU = 9.0.1e.30
673 12:15:34.107377 uCode Version = 0.0.0.ca
674 12:15:34.111023 TXT ACM version = ff.ff.ff.ffff
675 12:15:34.113808 Display FSP Version Info HOB
676 12:15:34.117303 Reference Code - ME = 9.0.1e.30
677 12:15:34.120798 MEBx version = 0.0.0.0
678 12:15:34.123607 ME Firmware Version = Consumer SKU
679 12:15:34.127171 Display FSP Version Info HOB
680 12:15:34.130769 Reference Code - CML PCH = 9.0.1e.30
681 12:15:34.133577 PCH-CRID Status = Disabled
682 12:15:34.136989 PCH-CRID Original Value = ff.ff.ff.ffff
683 12:15:34.140594 PCH-CRID New Value = ff.ff.ff.ffff
684 12:15:34.143934 OPROM - RST - RAID = ff.ff.ff.ffff
685 12:15:34.146946 ChipsetInit Base Version = ff.ff.ff.ffff
686 12:15:34.150351 ChipsetInit Oem Version = ff.ff.ff.ffff
687 12:15:34.153821 Display FSP Version Info HOB
688 12:15:34.160414 Reference Code - SA - System Agent = 9.0.1e.30
689 12:15:34.163338 Reference Code - MRC = 0.7.1.6c
690 12:15:34.166972 SA - PCIe Version = 9.0.1e.30
691 12:15:34.167069 SA-CRID Status = Disabled
692 12:15:34.170275 SA-CRID Original Value = 0.0.0.c
693 12:15:34.173632 SA-CRID New Value = 0.0.0.c
694 12:15:34.176521 OPROM - VBIOS = ff.ff.ff.ffff
695 12:15:34.180106 RTC Init
696 12:15:34.183625 Set power on after power failure.
697 12:15:34.183716 Disabling Deep S3
698 12:15:34.186558 Disabling Deep S3
699 12:15:34.186642 Disabling Deep S4
700 12:15:34.190137 Disabling Deep S4
701 12:15:34.193408 Disabling Deep S5
702 12:15:34.193498 Disabling Deep S5
703 12:15:34.200016 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
704 12:15:34.203374 Enumerating buses...
705 12:15:34.206254 Show all devs... Before device enumeration.
706 12:15:34.209775 Root Device: enabled 1
707 12:15:34.209878 CPU_CLUSTER: 0: enabled 1
708 12:15:34.212720 DOMAIN: 0000: enabled 1
709 12:15:34.216085 APIC: 00: enabled 1
710 12:15:34.216176 PCI: 00:00.0: enabled 1
711 12:15:34.219523 PCI: 00:02.0: enabled 1
712 12:15:34.223104 PCI: 00:04.0: enabled 0
713 12:15:34.225994 PCI: 00:05.0: enabled 0
714 12:15:34.226102 PCI: 00:12.0: enabled 1
715 12:15:34.229555 PCI: 00:12.5: enabled 0
716 12:15:34.232718 PCI: 00:12.6: enabled 0
717 12:15:34.236243 PCI: 00:14.0: enabled 1
718 12:15:34.236356 PCI: 00:14.1: enabled 0
719 12:15:34.239602 PCI: 00:14.3: enabled 1
720 12:15:34.242599 PCI: 00:14.5: enabled 0
721 12:15:34.246014 PCI: 00:15.0: enabled 1
722 12:15:34.246115 PCI: 00:15.1: enabled 1
723 12:15:34.249533 PCI: 00:15.2: enabled 0
724 12:15:34.253039 PCI: 00:15.3: enabled 0
725 12:15:34.253136 PCI: 00:16.0: enabled 1
726 12:15:34.256347 PCI: 00:16.1: enabled 0
727 12:15:34.259335 PCI: 00:16.2: enabled 0
728 12:15:34.262887 PCI: 00:16.3: enabled 0
729 12:15:34.262980 PCI: 00:16.4: enabled 0
730 12:15:34.265752 PCI: 00:16.5: enabled 0
731 12:15:34.269285 PCI: 00:17.0: enabled 1
732 12:15:34.272577 PCI: 00:19.0: enabled 1
733 12:15:34.272676 PCI: 00:19.1: enabled 0
734 12:15:34.276079 PCI: 00:19.2: enabled 0
735 12:15:34.279017 PCI: 00:1a.0: enabled 0
736 12:15:34.282508 PCI: 00:1c.0: enabled 0
737 12:15:34.282610 PCI: 00:1c.1: enabled 0
738 12:15:34.286143 PCI: 00:1c.2: enabled 0
739 12:15:34.288966 PCI: 00:1c.3: enabled 0
740 12:15:34.289060 PCI: 00:1c.4: enabled 0
741 12:15:34.292364
742 12:15:34.292460 PCI: 00:1c.5: enabled 0
743 12:15:34.295793 PCI: 00:1c.6: enabled 0
744 12:15:34.299344 PCI: 00:1c.7: enabled 0
745 12:15:34.299475 PCI: 00:1d.0: enabled 1
746 12:15:34.302202 PCI: 00:1d.1: enabled 0
747 12:15:34.305659 PCI: 00:1d.2: enabled 0
748 12:15:34.309221 PCI: 00:1d.3: enabled 0
749 12:15:34.309316 PCI: 00:1d.4: enabled 0
750 12:15:34.312616 PCI: 00:1d.5: enabled 1
751 12:15:34.316063 PCI: 00:1e.0: enabled 1
752 12:15:34.318970 PCI: 00:1e.1: enabled 0
753 12:15:34.319091 PCI: 00:1e.2: enabled 1
754 12:15:34.322421 PCI: 00:1e.3: enabled 1
755 12:15:34.325317 PCI: 00:1f.0: enabled 1
756 12:15:34.328727 PCI: 00:1f.1: enabled 1
757 12:15:34.328824 PCI: 00:1f.2: enabled 1
758 12:15:34.332295 PCI: 00:1f.3: enabled 1
759 12:15:34.335277 PCI: 00:1f.4: enabled 1
760 12:15:34.335375 PCI: 00:1f.5: enabled 1
761 12:15:34.338589 PCI: 00:1f.6: enabled 0
762 12:15:34.342002 USB0 port 0: enabled 1
763 12:15:34.345546 I2C: 00:15: enabled 1
764 12:15:34.345640 I2C: 00:5d: enabled 1
765 12:15:34.349028 GENERIC: 0.0: enabled 1
766 12:15:34.351821 I2C: 00:1a: enabled 1
767 12:15:34.351918 I2C: 00:38: enabled 1
768 12:15:34.355405 I2C: 00:39: enabled 1
769 12:15:34.358786 I2C: 00:3a: enabled 1
770 12:15:34.358880 I2C: 00:3b: enabled 1
771 12:15:34.361796 PCI: 00:00.0: enabled 1
772 12:15:34.365279 SPI: 00: enabled 1
773 12:15:34.365371 SPI: 01: enabled 1
774 12:15:34.368851 PNP: 0c09.0: enabled 1
775 12:15:34.371803 USB2 port 0: enabled 1
776 12:15:34.371932 USB2 port 1: enabled 1
777 12:15:34.375082 USB2 port 2: enabled 0
778 12:15:34.378497 USB2 port 3: enabled 0
779 12:15:34.378594 USB2 port 5: enabled 0
780 12:15:34.381984
781 12:15:34.382082 USB2 port 6: enabled 1
782 12:15:34.385614 USB2 port 9: enabled 1
783 12:15:34.388434 USB3 port 0: enabled 1
784 12:15:34.388532 USB3 port 1: enabled 1
785 12:15:34.391941 USB3 port 2: enabled 1
786 12:15:34.394886 USB3 port 3: enabled 1
787 12:15:34.394977 USB3 port 4: enabled 0
788 12:15:34.398223 APIC: 01: enabled 1
789 12:15:34.401776 APIC: 05: enabled 1
790 12:15:34.401869 APIC: 04: enabled 1
791 12:15:34.404737 APIC: 07: enabled 1
792 12:15:34.408326 APIC: 06: enabled 1
793 12:15:34.408419 APIC: 03: enabled 1
794 12:15:34.411906 APIC: 02: enabled 1
795 12:15:34.411997 Compare with tree...
796 12:15:34.414916 Root Device: enabled 1
797 12:15:34.418422 CPU_CLUSTER: 0: enabled 1
798 12:15:34.421883 APIC: 00: enabled 1
799 12:15:34.421982 APIC: 01: enabled 1
800 12:15:34.424803 APIC: 05: enabled 1
801 12:15:34.428338 APIC: 04: enabled 1
802 12:15:34.428439 APIC: 07: enabled 1
803 12:15:34.431674 APIC: 06: enabled 1
804 12:15:34.434656 APIC: 03: enabled 1
805 12:15:34.434762 APIC: 02: enabled 1
806 12:15:34.438250 DOMAIN: 0000: enabled 1
807 12:15:34.441639 PCI: 00:00.0: enabled 1
808 12:15:34.445110 PCI: 00:02.0: enabled 1
809 12:15:34.445214 PCI: 00:04.0: enabled 0
810 12:15:34.447975
811 12:15:34.448074 PCI: 00:05.0: enabled 0
812 12:15:34.451455 PCI: 00:12.0: enabled 1
813 12:15:34.454777 PCI: 00:12.5: enabled 0
814 12:15:34.458201 PCI: 00:12.6: enabled 0
815 12:15:34.458308 PCI: 00:14.0: enabled 1
816 12:15:34.461254 USB0 port 0: enabled 1
817 12:15:34.464835 USB2 port 0: enabled 1
818 12:15:34.467757 USB2 port 1: enabled 1
819 12:15:34.471283 USB2 port 2: enabled 0
820 12:15:34.474846 USB2 port 3: enabled 0
821 12:15:34.474946 USB2 port 5: enabled 0
822 12:15:34.478168 USB2 port 6: enabled 1
823 12:15:34.481006 USB2 port 9: enabled 1
824 12:15:34.484580 USB3 port 0: enabled 1
825 12:15:34.488060 USB3 port 1: enabled 1
826 12:15:34.488163 USB3 port 2: enabled 1
827 12:15:34.491076
828 12:15:34.491166 USB3 port 3: enabled 1
829 12:15:34.494495 USB3 port 4: enabled 0
830 12:15:34.497937 PCI: 00:14.1: enabled 0
831 12:15:34.501377 PCI: 00:14.3: enabled 1
832 12:15:34.504384 PCI: 00:14.5: enabled 0
833 12:15:34.504476 PCI: 00:15.0: enabled 1
834 12:15:34.507848 I2C: 00:15: enabled 1
835 12:15:34.511356 PCI: 00:15.1: enabled 1
836 12:15:34.514099 I2C: 00:5d: enabled 1
837 12:15:34.514191 GENERIC: 0.0: enabled 1
838 12:15:34.517648 PCI: 00:15.2: enabled 0
839 12:15:34.521020 PCI: 00:15.3: enabled 0
840 12:15:34.524442 PCI: 00:16.0: enabled 1
841 12:15:34.527390 PCI: 00:16.1: enabled 0
842 12:15:34.527487 PCI: 00:16.2: enabled 0
843 12:15:34.530791 PCI: 00:16.3: enabled 0
844 12:15:34.534278 PCI: 00:16.4: enabled 0
845 12:15:34.537197 PCI: 00:16.5: enabled 0
846 12:15:34.540588 PCI: 00:17.0: enabled 1
847 12:15:34.540680 PCI: 00:19.0: enabled 1
848 12:15:34.543885 I2C: 00:1a: enabled 1
849 12:15:34.547388 I2C: 00:38: enabled 1
850 12:15:34.550785 I2C: 00:39: enabled 1
851 12:15:34.550874 I2C: 00:3a: enabled 1
852 12:15:34.554193 I2C: 00:3b: enabled 1
853 12:15:34.557576 PCI: 00:19.1: enabled 0
854 12:15:34.560634 PCI: 00:19.2: enabled 0
855 12:15:34.564112 PCI: 00:1a.0: enabled 0
856 12:15:34.564205 PCI: 00:1c.0: enabled 0
857 12:15:34.567062 PCI: 00:1c.1: enabled 0
858 12:15:34.570549 PCI: 00:1c.2: enabled 0
859 12:15:34.573963 PCI: 00:1c.3: enabled 0
860 12:15:34.577341 PCI: 00:1c.4: enabled 0
861 12:15:34.577429 PCI: 00:1c.5: enabled 0
862 12:15:34.580647 PCI: 00:1c.6: enabled 0
863 12:15:34.583666 PCI: 00:1c.7: enabled 0
864 12:15:34.587123 PCI: 00:1d.0: enabled 1
865 12:15:34.590103 PCI: 00:1d.1: enabled 0
866 12:15:34.590190 PCI: 00:1d.2: enabled 0
867 12:15:34.593616 PCI: 00:1d.3: enabled 0
868 12:15:34.597137 PCI: 00:1d.4: enabled 0
869 12:15:34.600016 PCI: 00:1d.5: enabled 1
870 12:15:34.603657 PCI: 00:00.0: enabled 1
871 12:15:34.603743 PCI: 00:1e.0: enabled 1
872 12:15:34.607096 PCI: 00:1e.1: enabled 0
873 12:15:34.610038 PCI: 00:1e.2: enabled 1
874 12:15:34.613518 SPI: 00: enabled 1
875 12:15:34.613604 PCI: 00:1e.3: enabled 1
876 12:15:34.617061 SPI: 01: enabled 1
877 12:15:34.619998 PCI: 00:1f.0: enabled 1
878 12:15:34.623441 PNP: 0c09.0: enabled 1
879 12:15:34.623532 PCI: 00:1f.1: enabled 1
880 12:15:34.626662 PCI: 00:1f.2: enabled 1
881 12:15:34.630292 PCI: 00:1f.3: enabled 1
882 12:15:34.633226 PCI: 00:1f.4: enabled 1
883 12:15:34.636755 PCI: 00:1f.5: enabled 1
884 12:15:34.636847 PCI: 00:1f.6: enabled 0
885 12:15:34.640394 Root Device scanning...
886 12:15:34.643131 scan_static_bus for Root Device
887 12:15:34.646382 CPU_CLUSTER: 0 enabled
888 12:15:34.650049 DOMAIN: 0000 enabled
889 12:15:34.650137 DOMAIN: 0000 scanning...
890 12:15:34.653396 PCI: pci_scan_bus for bus 00
891 12:15:34.656730 PCI: 00:00.0 [8086/0000] ops
892 12:15:34.660192 PCI: 00:00.0 [8086/9b61] enabled
893 12:15:34.663562 PCI: 00:02.0 [8086/0000] bus ops
894 12:15:34.666597 PCI: 00:02.0 [8086/9b41] enabled
895 12:15:34.670121 PCI: 00:04.0 [8086/1903] disabled
896 12:15:34.672927 PCI: 00:08.0 [8086/1911] enabled
897 12:15:34.676524 PCI: 00:12.0 [8086/02f9] enabled
898 12:15:34.679797 PCI: 00:14.0 [8086/0000] bus ops
899 12:15:34.682838 PCI: 00:14.0 [8086/02ed] enabled
900 12:15:34.686274 PCI: 00:14.2 [8086/02ef] enabled
901 12:15:34.690009 PCI: 00:14.3 [8086/02f0] enabled
902 12:15:34.693076 PCI: 00:15.0 [8086/0000] bus ops
903 12:15:34.696588 PCI: 00:15.0 [8086/02e8] enabled
904 12:15:34.699563 PCI: 00:15.1 [8086/0000] bus ops
905 12:15:34.703135 PCI: 00:15.1 [8086/02e9] enabled
906 12:15:34.706200 PCI: 00:16.0 [8086/0000] ops
907 12:15:34.709723 PCI: 00:16.0 [8086/02e0] enabled
908 12:15:34.712650 PCI: 00:17.0 [8086/0000] ops
909 12:15:34.716108 PCI: 00:17.0 [8086/02d3] enabled
910 12:15:34.719399 PCI: 00:19.0 [8086/0000] bus ops
911 12:15:34.723085 PCI: 00:19.0 [8086/02c5] enabled
912 12:15:34.726477 PCI: 00:1d.0 [8086/0000] bus ops
913 12:15:34.729480 PCI: 00:1d.0 [8086/02b0] enabled
914 12:15:34.736289 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 12:15:34.739237 PCI: 00:1e.0 [8086/0000] ops
916 12:15:34.742649 PCI: 00:1e.0 [8086/02a8] enabled
917 12:15:34.746132 PCI: 00:1e.2 [8086/0000] bus ops
918 12:15:34.749543 PCI: 00:1e.2 [8086/02aa] enabled
919 12:15:34.752465 PCI: 00:1e.3 [8086/0000] bus ops
920 12:15:34.756045 PCI: 00:1e.3 [8086/02ab] enabled
921 12:15:34.759607 PCI: 00:1f.0 [8086/0000] bus ops
922 12:15:34.762615 PCI: 00:1f.0 [8086/0284] enabled
923 12:15:34.765969 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 12:15:34.772398 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 12:15:34.775874 PCI: 00:1f.3 [8086/0000] bus ops
926 12:15:34.779460 PCI: 00:1f.3 [8086/02c8] enabled
927 12:15:34.782291 PCI: 00:1f.4 [8086/0000] bus ops
928 12:15:34.785761 PCI: 00:1f.4 [8086/02a3] enabled
929 12:15:34.789183 PCI: 00:1f.5 [8086/0000] bus ops
930 12:15:34.792133 PCI: 00:1f.5 [8086/02a4] enabled
931 12:15:34.795778 PCI: Leftover static devices:
932 12:15:34.795870 PCI: 00:05.0
933 12:15:34.799212 PCI: 00:12.5
934 12:15:34.799295 PCI: 00:12.6
935 12:15:34.802135 PCI: 00:14.1
936 12:15:34.802221 PCI: 00:14.5
937 12:15:34.805503 PCI: 00:15.2
938 12:15:34.805589 PCI: 00:15.3
939 12:15:34.805662 PCI: 00:16.1
940 12:15:34.809113 PCI: 00:16.2
941 12:15:34.809198 PCI: 00:16.3
942 12:15:34.811991 PCI: 00:16.4
943 12:15:34.812071 PCI: 00:16.5
944 12:15:34.812141 PCI: 00:19.1
945 12:15:34.815460 PCI: 00:19.2
946 12:15:34.815542 PCI: 00:1a.0
947 12:15:34.818936 PCI: 00:1c.0
948 12:15:34.819020 PCI: 00:1c.1
949 12:15:34.819095 PCI: 00:1c.2
950 12:15:34.822450 PCI: 00:1c.3
951 12:15:34.822539 PCI: 00:1c.4
952 12:15:34.825424 PCI: 00:1c.5
953 12:15:34.825520 PCI: 00:1c.6
954 12:15:34.828846 PCI: 00:1c.7
955 12:15:34.828939 PCI: 00:1d.1
956 12:15:34.829012 PCI: 00:1d.2
957 12:15:34.832350 PCI: 00:1d.3
958 12:15:34.832441 PCI: 00:1d.4
959 12:15:34.835368 PCI: 00:1d.5
960 12:15:34.835463 PCI: 00:1e.1
961 12:15:34.835537 PCI: 00:1f.1
962 12:15:34.838702 PCI: 00:1f.2
963 12:15:34.838792 PCI: 00:1f.6
964 12:15:34.842536 PCI: Check your devicetree.cb.
965 12:15:34.845308 PCI: 00:02.0 scanning...
966 12:15:34.848706 scan_generic_bus for PCI: 00:02.0
967 12:15:34.852131 scan_generic_bus for PCI: 00:02.0 done
968 12:15:34.858457 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
969 12:15:34.862038 PCI: 00:14.0 scanning...
970 12:15:34.865424 scan_static_bus for PCI: 00:14.0
971 12:15:34.865516 USB0 port 0 enabled
972 12:15:34.868333 USB0 port 0 scanning...
973 12:15:34.871815 scan_static_bus for USB0 port 0
974 12:15:34.875317 USB2 port 0 enabled
975 12:15:34.875406 USB2 port 1 enabled
976 12:15:34.878715 USB2 port 2 disabled
977 12:15:34.882143 USB2 port 3 disabled
978 12:15:34.882241 USB2 port 5 disabled
979 12:15:34.885020 USB2 port 6 enabled
980 12:15:34.888444 USB2 port 9 enabled
981 12:15:34.888532 USB3 port 0 enabled
982 12:15:34.891895 USB3 port 1 enabled
983 12:15:34.891986 USB3 port 2 enabled
984 12:15:34.894878 USB3 port 3 enabled
985 12:15:34.898433 USB3 port 4 disabled
986 12:15:34.898518 USB2 port 0 scanning...
987 12:15:34.901954 scan_static_bus for USB2 port 0
988 12:15:34.908412 scan_static_bus for USB2 port 0 done
989 12:15:34.911894 scan_bus: scanning of bus USB2 port 0 took 9692 usecs
990 12:15:34.914900 USB2 port 1 scanning...
991 12:15:34.918366 scan_static_bus for USB2 port 1
992 12:15:34.921752 scan_static_bus for USB2 port 1 done
993 12:15:34.928131 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
994 12:15:34.928293 USB2 port 6 scanning...
995 12:15:34.932089 scan_static_bus for USB2 port 6
996 12:15:34.938650 scan_static_bus for USB2 port 6 done
997 12:15:34.942198 scan_bus: scanning of bus USB2 port 6 took 9718 usecs
998 12:15:34.945231 USB2 port 9 scanning...
999 12:15:34.948741 scan_static_bus for USB2 port 9
1000 12:15:34.952052 scan_static_bus for USB2 port 9 done
1001 12:15:34.958458 scan_bus: scanning of bus USB2 port 9 took 9693 usecs
1002 12:15:34.958605 USB3 port 0 scanning...
1003 12:15:34.962102 scan_static_bus for USB3 port 0
1004 12:15:34.968344 scan_static_bus for USB3 port 0 done
1005 12:15:34.971812 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
1006 12:15:34.974829 USB3 port 1 scanning...
1007 12:15:34.978137 scan_static_bus for USB3 port 1
1008 12:15:34.981668 scan_static_bus for USB3 port 1 done
1009 12:15:34.988555 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
1010 12:15:34.988706 USB3 port 2 scanning...
1011 12:15:34.991393
1012 12:15:34.994829 scan_static_bus for USB3 port 2
1013 12:15:34.998336 scan_static_bus for USB3 port 2 done
1014 12:15:35.001244 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
1015 12:15:35.004728 USB3 port 3 scanning...
1016 12:15:35.008170 scan_static_bus for USB3 port 3
1017 12:15:35.011622 scan_static_bus for USB3 port 3 done
1018 12:15:35.018071 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
1019 12:15:35.021535 scan_static_bus for USB0 port 0 done
1020 12:15:35.028056 scan_bus: scanning of bus USB0 port 0 took 155389 usecs
1021 12:15:35.031453 scan_static_bus for PCI: 00:14.0 done
1022 12:15:35.037689 scan_bus: scanning of bus PCI: 00:14.0 took 173013 usecs
1023 12:15:35.037839 PCI: 00:15.0 scanning...
1024 12:15:35.041212 scan_generic_bus for PCI: 00:15.0
1025 12:15:35.047664 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1026 12:15:35.051170 scan_generic_bus for PCI: 00:15.0 done
1027 12:15:35.054040 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1028 12:15:35.057460
1029 12:15:35.057592 PCI: 00:15.1 scanning...
1030 12:15:35.061063 scan_generic_bus for PCI: 00:15.1
1031 12:15:35.067350 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1032 12:15:35.070920 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1033 12:15:35.074341 scan_generic_bus for PCI: 00:15.1 done
1034 12:15:35.080940 scan_bus: scanning of bus PCI: 00:15.1 took 18623 usecs
1035 12:15:35.084290 PCI: 00:19.0 scanning...
1036 12:15:35.087072 scan_generic_bus for PCI: 00:19.0
1037 12:15:35.090504 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1038 12:15:35.094021 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1039 12:15:35.097453 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1040 12:15:35.104156 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1041 12:15:35.107027 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1042 12:15:35.110447 scan_generic_bus for PCI: 00:19.0 done
1043 12:15:35.116931 scan_bus: scanning of bus PCI: 00:19.0 took 30738 usecs
1044 12:15:35.117078 PCI: 00:1d.0 scanning...
1045 12:15:35.124236 do_pci_scan_bridge for PCI: 00:1d.0
1046 12:15:35.124383 PCI: pci_scan_bus for bus 01
1047 12:15:35.127156 PCI: 01:00.0 [1c5c/1327] enabled
1048 12:15:35.134059 Enabling Common Clock Configuration
1049 12:15:35.137386 L1 Sub-State supported from root port 29
1050 12:15:35.141011 L1 Sub-State Support = 0xf
1051 12:15:35.143791 CommonModeRestoreTime = 0x28
1052 12:15:35.147381 Power On Value = 0x16, Power On Scale = 0x0
1053 12:15:35.147514 ASPM: Enabled L1
1054 12:15:35.153877 scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
1055 12:15:35.157237 PCI: 00:1e.2 scanning...
1056 12:15:35.160732 scan_generic_bus for PCI: 00:1e.2
1057 12:15:35.163692 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1058 12:15:35.167077 scan_generic_bus for PCI: 00:1e.2 done
1059 12:15:35.174001 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1060 12:15:35.176983 PCI: 00:1e.3 scanning...
1061 12:15:35.180482 scan_generic_bus for PCI: 00:1e.3
1062 12:15:35.183841 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1063 12:15:35.186862 scan_generic_bus for PCI: 00:1e.3 done
1064 12:15:35.193670 scan_bus: scanning of bus PCI: 00:1e.3 took 14013 usecs
1065 12:15:35.197175 PCI: 00:1f.0 scanning...
1066 12:15:35.200095 scan_static_bus for PCI: 00:1f.0
1067 12:15:35.200226 PNP: 0c09.0 enabled
1068 12:15:35.206632 scan_static_bus for PCI: 00:1f.0 done
1069 12:15:35.210096 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1070 12:15:35.213479 PCI: 00:1f.3 scanning...
1071 12:15:35.220018 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1072 12:15:35.220161 PCI: 00:1f.4 scanning...
1073 12:15:35.223407 scan_generic_bus for PCI: 00:1f.4
1074 12:15:35.226800
1075 12:15:35.230262 scan_generic_bus for PCI: 00:1f.4 done
1076 12:15:35.233612 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1077 12:15:35.236582 PCI: 00:1f.5 scanning...
1078 12:15:35.240015 scan_generic_bus for PCI: 00:1f.5
1079 12:15:35.243609 scan_generic_bus for PCI: 00:1f.5 done
1080 12:15:35.249951 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1081 12:15:35.256906 scan_bus: scanning of bus DOMAIN: 0000 took 605165 usecs
1082 12:15:35.260277 scan_static_bus for Root Device done
1083 12:15:35.266736 scan_bus: scanning of bus Root Device took 625050 usecs
1084 12:15:35.266860 done
1085 12:15:35.269554 Chrome EC: UHEPI supported
1086 12:15:35.276625 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1087 12:15:35.279595 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1088 12:15:35.283120
1089 12:15:35.286070 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1090 12:15:35.294195 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1091 12:15:35.297846 SPI flash protection: WPSW=0 SRP0=0
1092 12:15:35.304107 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1093 12:15:35.307160 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1094 12:15:35.310241 found VGA at PCI: 00:02.0
1095 12:15:35.314038 Setting up VGA for PCI: 00:02.0
1096 12:15:35.320476 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1097 12:15:35.323562 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1098 12:15:35.327226 Allocating resources...
1099 12:15:35.330124 Reading resources...
1100 12:15:35.333646 Root Device read_resources bus 0 link: 0
1101 12:15:35.337260 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1102 12:15:35.343795 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1103 12:15:35.346756 DOMAIN: 0000 read_resources bus 0 link: 0
1104 12:15:35.353959 PCI: 00:14.0 read_resources bus 0 link: 0
1105 12:15:35.357475 USB0 port 0 read_resources bus 0 link: 0
1106 12:15:35.365187 USB0 port 0 read_resources bus 0 link: 0 done
1107 12:15:35.368770 PCI: 00:14.0 read_resources bus 0 link: 0 done
1108 12:15:35.376113 PCI: 00:15.0 read_resources bus 1 link: 0
1109 12:15:35.379543 PCI: 00:15.0 read_resources bus 1 link: 0 done
1110 12:15:35.386067 PCI: 00:15.1 read_resources bus 2 link: 0
1111 12:15:35.389646 PCI: 00:15.1 read_resources bus 2 link: 0 done
1112 12:15:35.396811 PCI: 00:19.0 read_resources bus 3 link: 0
1113 12:15:35.403565 PCI: 00:19.0 read_resources bus 3 link: 0 done
1114 12:15:35.407122 PCI: 00:1d.0 read_resources bus 1 link: 0
1115 12:15:35.413674 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1116 12:15:35.416592 PCI: 00:1e.2 read_resources bus 4 link: 0
1117 12:15:35.423293 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1118 12:15:35.426860 PCI: 00:1e.3 read_resources bus 5 link: 0
1119 12:15:35.433517 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1120 12:15:35.437030 PCI: 00:1f.0 read_resources bus 0 link: 0
1121 12:15:35.443262 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1122 12:15:35.450255 DOMAIN: 0000 read_resources bus 0 link: 0 done
1123 12:15:35.453161 Root Device read_resources bus 0 link: 0 done
1124 12:15:35.456725 Done reading resources.
1125 12:15:35.459805 Show resources in subtree (Root Device)...After reading.
1126 12:15:35.466495 Root Device child on link 0 CPU_CLUSTER: 0
1127 12:15:35.470025 CPU_CLUSTER: 0 child on link 0 APIC: 00
1128 12:15:35.470135 APIC: 00
1129 12:15:35.473399 APIC: 01
1130 12:15:35.473499 APIC: 05
1131 12:15:35.476777 APIC: 04
1132 12:15:35.476878 APIC: 07
1133 12:15:35.476954 APIC: 06
1134 12:15:35.479735 APIC: 03
1135 12:15:35.479836 APIC: 02
1136 12:15:35.482886 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 12:15:35.493134 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 12:15:35.549499 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1139 12:15:35.549665 PCI: 00:00.0
1140 12:15:35.549968 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 12:15:35.550051 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 12:15:35.550507 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 12:15:35.550589 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 12:15:35.592487 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 12:15:35.592856 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1146 12:15:35.592943 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1147 12:15:35.593016 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1148 12:15:35.593703 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1149 12:15:35.600015 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1150 12:15:35.606234 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1151 12:15:35.616255 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1152 12:15:35.626053 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1153 12:15:35.635984 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1154 12:15:35.646012 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1155 12:15:35.656091 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1156 12:15:35.656235 PCI: 00:02.0
1157 12:15:35.666066 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1158 12:15:35.678949 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1159 12:15:35.685821 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1160 12:15:35.688786 PCI: 00:04.0
1161 12:15:35.688893 PCI: 00:08.0
1162 12:15:35.699304 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 12:15:35.702165 PCI: 00:12.0
1164 12:15:35.712179 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:15:35.715573 PCI: 00:14.0 child on link 0 USB0 port 0
1166 12:15:35.725462 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1167 12:15:35.728486 USB0 port 0 child on link 0 USB2 port 0
1168 12:15:35.731984 USB2 port 0
1169 12:15:35.732087 USB2 port 1
1170 12:15:35.734992 USB2 port 2
1171 12:15:35.735078 USB2 port 3
1172 12:15:35.738319 USB2 port 5
1173 12:15:35.738412 USB2 port 6
1174 12:15:35.741746 USB2 port 9
1175 12:15:35.745380 USB3 port 0
1176 12:15:35.745477 USB3 port 1
1177 12:15:35.748542 USB3 port 2
1178 12:15:35.748632 USB3 port 3
1179 12:15:35.751518 USB3 port 4
1180 12:15:35.751603 PCI: 00:14.2
1181 12:15:35.761552 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1182 12:15:35.771440 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1183 12:15:35.774887 PCI: 00:14.3
1184 12:15:35.784619 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 12:15:35.787972 PCI: 00:15.0 child on link 0 I2C: 01:15
1186 12:15:35.797878 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:15:35.798017 I2C: 01:15
1188 12:15:35.804749 PCI: 00:15.1 child on link 0 I2C: 02:5d
1189 12:15:35.814479 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:15:35.814614 I2C: 02:5d
1191 12:15:35.817990 GENERIC: 0.0
1192 12:15:35.818088 PCI: 00:16.0
1193 12:15:35.827445 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:15:35.830996 PCI: 00:17.0
1195 12:15:35.837466 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1196 12:15:35.840988
1197 12:15:35.847431 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1198 12:15:35.857502 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1199 12:15:35.863848 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1200 12:15:35.874176 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1201 12:15:35.880437 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1202 12:15:35.883954
1203 12:15:35.886983 PCI: 00:19.0 child on link 0 I2C: 03:1a
1204 12:15:35.896739 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 12:15:35.896867 I2C: 03:1a
1206 12:15:35.900298 I2C: 03:38
1207 12:15:35.900390 I2C: 03:39
1208 12:15:35.903815 I2C: 03:3a
1209 12:15:35.903904 I2C: 03:3b
1210 12:15:35.910104 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1211 12:15:35.917053 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1212 12:15:35.926529 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1213 12:15:35.936439 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1214 12:15:35.936587 PCI: 01:00.0
1215 12:15:35.946432 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 12:15:35.950035 PCI: 00:1e.0
1217 12:15:35.959890 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 12:15:35.969660 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1219 12:15:35.973201 PCI: 00:1e.2 child on link 0 SPI: 00
1220 12:15:35.976156
1221 12:15:35.982884 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:15:35.986420
1223 12:15:35.986528 SPI: 00
1224 12:15:35.989233 PCI: 00:1e.3 child on link 0 SPI: 01
1225 12:15:35.999454 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 12:15:35.999605 SPI: 01
1227 12:15:36.005910 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1228 12:15:36.012788 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1229 12:15:36.022679 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1230 12:15:36.025698 PNP: 0c09.0
1231 12:15:36.032742 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1232 12:15:36.035672 PCI: 00:1f.3
1233 12:15:36.045665 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1234 12:15:36.055883 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1235 12:15:36.056029 PCI: 00:1f.4
1236 12:15:36.065816 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1237 12:15:36.075602 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1238 12:15:36.075739 PCI: 00:1f.5
1239 12:15:36.078547
1240 12:15:36.085573 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1241 12:15:36.092004 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 12:15:36.098426 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1243 12:15:36.105336 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1244 12:15:36.108889 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1245 12:15:36.111687 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1246 12:15:36.115149 PCI: 00:17.0 18 * [0x60 - 0x67] io
1247 12:15:36.118851 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1248 12:15:36.128729 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1249 12:15:36.135144 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1250 12:15:36.141469 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 12:15:36.148436 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 12:15:36.151795
1253 12:15:36.158133 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1254 12:15:36.161598 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1255 12:15:36.167969 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 12:15:36.171404 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1257 12:15:36.174714
1258 12:15:36.178411 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1259 12:15:36.181338 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1260 12:15:36.188311 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1261 12:15:36.191386 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1262 12:15:36.197736 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1263 12:15:36.201305 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1264 12:15:36.207842 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1265 12:15:36.211353 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1266 12:15:36.217560 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1267 12:15:36.220914 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1268 12:15:36.227525 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1269 12:15:36.230616 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1270 12:15:36.237809 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1271 12:15:36.241335 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1272 12:15:36.247781 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1273 12:15:36.250879 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1274 12:15:36.253850 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1275 12:15:36.257446
1276 12:15:36.261013 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1277 12:15:36.263993 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1278 12:15:36.270570 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1279 12:15:36.274021 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1280 12:15:36.280312 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1281 12:15:36.287330 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1282 12:15:36.293593 avoid_fixed_resources: DOMAIN: 0000
1283 12:15:36.297079 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1284 12:15:36.303443 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1285 12:15:36.310345 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1286 12:15:36.320216 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1287 12:15:36.326621 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1288 12:15:36.333707 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1289 12:15:36.343627 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1290 12:15:36.349890 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1291 12:15:36.356301 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1292 12:15:36.366643 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1293 12:15:36.373036 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1294 12:15:36.379458 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1295 12:15:36.382900 Setting resources...
1296 12:15:36.389419 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1297 12:15:36.392950 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1298 12:15:36.396446 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1299 12:15:36.399872 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1300 12:15:36.402849 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1301 12:15:36.409660 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1302 12:15:36.416168 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1303 12:15:36.422633 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1304 12:15:36.429256 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1305 12:15:36.435752 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1306 12:15:36.439246 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1307 12:15:36.445637 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1308 12:15:36.449276 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1309 12:15:36.455624 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1310 12:15:36.459214 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1311 12:15:36.465563 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1312 12:15:36.469170 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1313 12:15:36.475527 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1314 12:15:36.478937 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1315 12:15:36.485327 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1316 12:15:36.488847 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1317 12:15:36.495252 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1318 12:15:36.498705 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1319 12:15:36.505124 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1320 12:15:36.508768 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1321 12:15:36.515070 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1322 12:15:36.518589 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1323 12:15:36.521974 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1324 12:15:36.528173 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1325 12:15:36.531804 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1326 12:15:36.538258 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1327 12:15:36.541621 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1328 12:15:36.551751 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1329 12:15:36.558159 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1330 12:15:36.564922 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1331 12:15:36.571341 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1332 12:15:36.577819 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1333 12:15:36.584726 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1334 12:15:36.588136 Root Device assign_resources, bus 0 link: 0
1335 12:15:36.594647 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 12:15:36.601070 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1337 12:15:36.610976 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1338 12:15:36.617864 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1339 12:15:36.627460 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1340 12:15:36.634611 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1341 12:15:36.644078 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1342 12:15:36.647614 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 12:15:36.653987 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 12:15:36.660937 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1345 12:15:36.667262 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1346 12:15:36.677869 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1347 12:15:36.684220 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1348 12:15:36.691191 PCI: 00:15.0 assign_resources, bus 1 link: 0
1349 12:15:36.694167 PCI: 00:15.0 assign_resources, bus 1 link: 0
1350 12:15:36.704257 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1351 12:15:36.707082 PCI: 00:15.1 assign_resources, bus 2 link: 0
1352 12:15:36.710701 PCI: 00:15.1 assign_resources, bus 2 link: 0
1353 12:15:36.713883
1354 12:15:36.720313 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1355 12:15:36.727015 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1356 12:15:36.736893 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1357 12:15:36.744052 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1358 12:15:36.750592 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1359 12:15:36.760465 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1360 12:15:36.766850 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1361 12:15:36.776862 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1362 12:15:36.780248 PCI: 00:19.0 assign_resources, bus 3 link: 0
1363 12:15:36.783207 PCI: 00:19.0 assign_resources, bus 3 link: 0
1364 12:15:36.793758 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1365 12:15:36.803491 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 12:15:36.809905 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1367 12:15:36.816890 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 12:15:36.823797 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1369 12:15:36.830036 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1370 12:15:36.836399 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1371 12:15:36.846559 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1372 12:15:36.850130 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1373 12:15:36.853020 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1374 12:15:36.862864 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1375 12:15:36.866409 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1376 12:15:36.872824 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1377 12:15:36.876192 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 12:15:36.882509 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 12:15:36.886001 LPC: Trying to open IO window from 800 size 1ff
1380 12:15:36.895662 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1381 12:15:36.902142 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1382 12:15:36.912048 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1383 12:15:36.919063 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1384 12:15:36.925346 DOMAIN: 0000 assign_resources, bus 0 link: 0
1385 12:15:36.928505 Root Device assign_resources, bus 0 link: 0
1386 12:15:36.931939 Done setting resources.
1387 12:15:36.938826 Show resources in subtree (Root Device)...After assigning values.
1388 12:15:36.941785 Root Device child on link 0 CPU_CLUSTER: 0
1389 12:15:36.945313 CPU_CLUSTER: 0 child on link 0 APIC: 00
1390 12:15:36.948789 APIC: 00
1391 12:15:36.948887 APIC: 01
1392 12:15:36.948962 APIC: 05
1393 12:15:36.951591 APIC: 04
1394 12:15:36.951676 APIC: 07
1395 12:15:36.955206 APIC: 06
1396 12:15:36.955299 APIC: 03
1397 12:15:36.955374 APIC: 02
1398 12:15:36.961515 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1399 12:15:36.971810 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1400 12:15:36.981707 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1401 12:15:36.981860 PCI: 00:00.0
1402 12:15:36.991530 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1403 12:15:37.001175 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1404 12:15:37.010972 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1405 12:15:37.021031 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1406 12:15:37.031146 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1407 12:15:37.041072 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1408 12:15:37.047411 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1409 12:15:37.057264 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1410 12:15:37.067180 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1411 12:15:37.077392 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1412 12:15:37.087235 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1413 12:15:37.093539 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1414 12:15:37.103948 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1415 12:15:37.113632 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1416 12:15:37.123534 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1417 12:15:37.133697 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1418 12:15:37.133854 PCI: 00:02.0
1419 12:15:37.146894 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1420 12:15:37.156704 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1421 12:15:37.166303 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1422 12:15:37.166442 PCI: 00:04.0
1423 12:15:37.169769 PCI: 00:08.0
1424 12:15:37.179781 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1425 12:15:37.179928 PCI: 00:12.0
1426 12:15:37.189499 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1427 12:15:37.196534 PCI: 00:14.0 child on link 0 USB0 port 0
1428 12:15:37.206306 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1429 12:15:37.209708 USB0 port 0 child on link 0 USB2 port 0
1430 12:15:37.212715 USB2 port 0
1431 12:15:37.212818 USB2 port 1
1432 12:15:37.216198 USB2 port 2
1433 12:15:37.216305 USB2 port 3
1434 12:15:37.219597 USB2 port 5
1435 12:15:37.219696 USB2 port 6
1436 12:15:37.222459 USB2 port 9
1437 12:15:37.222555 USB3 port 0
1438 12:15:37.225941 USB3 port 1
1439 12:15:37.226039 USB3 port 2
1440 12:15:37.229257 USB3 port 3
1441 12:15:37.229365 USB3 port 4
1442 12:15:37.232742
1443 12:15:37.232841 PCI: 00:14.2
1444 12:15:37.242176 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1445 12:15:37.252257 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1446 12:15:37.255627 PCI: 00:14.3
1447 12:15:37.265406 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1448 12:15:37.268874 PCI: 00:15.0 child on link 0 I2C: 01:15
1449 12:15:37.278689 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1450 12:15:37.282230 I2C: 01:15
1451 12:15:37.285843 PCI: 00:15.1 child on link 0 I2C: 02:5d
1452 12:15:37.295531 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1453 12:15:37.298469 I2C: 02:5d
1454 12:15:37.298575 GENERIC: 0.0
1455 12:15:37.301982 PCI: 00:16.0
1456 12:15:37.311671 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1457 12:15:37.311796 PCI: 00:17.0
1458 12:15:37.321586 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1459 12:15:37.331998 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1460 12:15:37.341655 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1461 12:15:37.351785 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1462 12:15:37.361183 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1463 12:15:37.371681 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1464 12:15:37.374627 PCI: 00:19.0 child on link 0 I2C: 03:1a
1465 12:15:37.384354 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1466 12:15:37.387966 I2C: 03:1a
1467 12:15:37.388072 I2C: 03:38
1468 12:15:37.391530 I2C: 03:39
1469 12:15:37.391620 I2C: 03:3a
1470 12:15:37.394567 I2C: 03:3b
1471 12:15:37.397874 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1472 12:15:37.407652 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1473 12:15:37.417445 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1474 12:15:37.427410 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1475 12:15:37.427553 PCI: 01:00.0
1476 12:15:37.440713 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1477 12:15:37.440863 PCI: 00:1e.0
1478 12:15:37.450558 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 12:15:37.464150 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1480 12:15:37.467011 PCI: 00:1e.2 child on link 0 SPI: 00
1481 12:15:37.477242 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1482 12:15:37.477393 SPI: 00
1483 12:15:37.480638 PCI: 00:1e.3 child on link 0 SPI: 01
1484 12:15:37.483583
1485 12:15:37.493565 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1486 12:15:37.493704 SPI: 01
1487 12:15:37.496985 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1488 12:15:37.506868 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1489 12:15:37.516855 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1490 12:15:37.517004 PNP: 0c09.0
1491 12:15:37.526689 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1492 12:15:37.526827 PCI: 00:1f.3
1493 12:15:37.536627 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1494 12:15:37.550022 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1495 12:15:37.550183 PCI: 00:1f.4
1496 12:15:37.559700 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1497 12:15:37.569575 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1498 12:15:37.569729 PCI: 00:1f.5
1499 12:15:37.582528 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1500 12:15:37.582677 Done allocating resources.
1501 12:15:37.589504 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1502 12:15:37.592361 Enabling resources...
1503 12:15:37.595987 PCI: 00:00.0 subsystem <- 8086/9b61
1504 12:15:37.599053 PCI: 00:00.0 cmd <- 06
1505 12:15:37.602393 PCI: 00:02.0 subsystem <- 8086/9b41
1506 12:15:37.605882 PCI: 00:02.0 cmd <- 03
1507 12:15:37.609132 PCI: 00:08.0 cmd <- 06
1508 12:15:37.612771 PCI: 00:12.0 subsystem <- 8086/02f9
1509 12:15:37.615580 PCI: 00:12.0 cmd <- 02
1510 12:15:37.619055 PCI: 00:14.0 subsystem <- 8086/02ed
1511 12:15:37.619156 PCI: 00:14.0 cmd <- 02
1512 12:15:37.622514 PCI: 00:14.2 cmd <- 02
1513 12:15:37.625995 PCI: 00:14.3 subsystem <- 8086/02f0
1514 12:15:37.628980 PCI: 00:14.3 cmd <- 02
1515 12:15:37.632418 PCI: 00:15.0 subsystem <- 8086/02e8
1516 12:15:37.635853 PCI: 00:15.0 cmd <- 02
1517 12:15:37.639301 PCI: 00:15.1 subsystem <- 8086/02e9
1518 12:15:37.642178 PCI: 00:15.1 cmd <- 02
1519 12:15:37.645416 PCI: 00:16.0 subsystem <- 8086/02e0
1520 12:15:37.648799 PCI: 00:16.0 cmd <- 02
1521 12:15:37.652345 PCI: 00:17.0 subsystem <- 8086/02d3
1522 12:15:37.655260 PCI: 00:17.0 cmd <- 03
1523 12:15:37.658775 PCI: 00:19.0 subsystem <- 8086/02c5
1524 12:15:37.662351 PCI: 00:19.0 cmd <- 02
1525 12:15:37.665713 PCI: 00:1d.0 bridge ctrl <- 0013
1526 12:15:37.668683 PCI: 00:1d.0 subsystem <- 8086/02b0
1527 12:15:37.668776 PCI: 00:1d.0 cmd <- 06
1528 12:15:37.675732 PCI: 00:1e.0 subsystem <- 8086/02a8
1529 12:15:37.675821 PCI: 00:1e.0 cmd <- 06
1530 12:15:37.679279 PCI: 00:1e.2 subsystem <- 8086/02aa
1531 12:15:37.682095 PCI: 00:1e.2 cmd <- 06
1532 12:15:37.685591 PCI: 00:1e.3 subsystem <- 8086/02ab
1533 12:15:37.688516 PCI: 00:1e.3 cmd <- 02
1534 12:15:37.691783 PCI: 00:1f.0 subsystem <- 8086/0284
1535 12:15:37.695392 PCI: 00:1f.0 cmd <- 407
1536 12:15:37.698963 PCI: 00:1f.3 subsystem <- 8086/02c8
1537 12:15:37.701874 PCI: 00:1f.3 cmd <- 02
1538 12:15:37.705303 PCI: 00:1f.4 subsystem <- 8086/02a3
1539 12:15:37.708727 PCI: 00:1f.4 cmd <- 03
1540 12:15:37.711729 PCI: 00:1f.5 subsystem <- 8086/02a4
1541 12:15:37.714650 PCI: 00:1f.5 cmd <- 406
1542 12:15:37.723008 PCI: 01:00.0 cmd <- 02
1543 12:15:37.728220 done.
1544 12:15:37.739645 ME: Version: 14.0.39.1367
1545 12:15:37.746502 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1546 12:15:37.749816 Initializing devices...
1547 12:15:37.749915 Root Device init ...
1548 12:15:37.756262 Chrome EC: Set SMI mask to 0x0000000000000000
1549 12:15:37.759893 Chrome EC: clear events_b mask to 0x0000000000000000
1550 12:15:37.766683 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1551 12:15:37.773153 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1552 12:15:37.779674 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1553 12:15:37.782742 Chrome EC: Set WAKE mask to 0x0000000000000000
1554 12:15:37.786480 Root Device init finished in 35201 usecs
1555 12:15:37.790026 CPU_CLUSTER: 0 init ...
1556 12:15:37.792951 CPU_CLUSTER: 0 init finished in 2447 usecs
1557 12:15:37.796483
1558 12:15:37.800777 PCI: 00:00.0 init ...
1559 12:15:37.804135 CPU TDP: 15 Watts
1560 12:15:37.807366 CPU PL2 = 64 Watts
1561 12:15:37.810381 PCI: 00:00.0 init finished in 7063 usecs
1562 12:15:37.813501 PCI: 00:02.0 init ...
1563 12:15:37.817048 PCI: 00:02.0 init finished in 2252 usecs
1564 12:15:37.820622 PCI: 00:08.0 init ...
1565 12:15:37.823782 PCI: 00:08.0 init finished in 2252 usecs
1566 12:15:37.827372 PCI: 00:12.0 init ...
1567 12:15:37.830294 PCI: 00:12.0 init finished in 2251 usecs
1568 12:15:37.833439 PCI: 00:14.0 init ...
1569 12:15:37.836974 PCI: 00:14.0 init finished in 2252 usecs
1570 12:15:37.840330 PCI: 00:14.2 init ...
1571 12:15:37.843771 PCI: 00:14.2 init finished in 2250 usecs
1572 12:15:37.846638 PCI: 00:14.3 init ...
1573 12:15:37.850000 PCI: 00:14.3 init finished in 2271 usecs
1574 12:15:37.853603 PCI: 00:15.0 init ...
1575 12:15:37.856706 DW I2C bus 0 at 0xd121f000 (400 KHz)
1576 12:15:37.859813 PCI: 00:15.0 init finished in 5976 usecs
1577 12:15:37.863562 PCI: 00:15.1 init ...
1578 12:15:37.866625 DW I2C bus 1 at 0xd1220000 (400 KHz)
1579 12:15:37.873170 PCI: 00:15.1 init finished in 5975 usecs
1580 12:15:37.873270 PCI: 00:16.0 init ...
1581 12:15:37.879804 PCI: 00:16.0 init finished in 2252 usecs
1582 12:15:37.883287 PCI: 00:19.0 init ...
1583 12:15:37.886152 DW I2C bus 4 at 0xd1222000 (400 KHz)
1584 12:15:37.889656 PCI: 00:19.0 init finished in 5974 usecs
1585 12:15:37.893208 PCI: 00:1d.0 init ...
1586 12:15:37.896101 Initializing PCH PCIe bridge.
1587 12:15:37.899242 PCI: 00:1d.0 init finished in 5283 usecs
1588 12:15:37.902957 PCI: 00:1f.0 init ...
1589 12:15:37.906068 IOAPIC: Initializing IOAPIC at 0xfec00000
1590 12:15:37.912533 IOAPIC: Bootstrap Processor Local APIC = 0x00
1591 12:15:37.912633 IOAPIC: ID = 0x02
1592 12:15:37.916114 IOAPIC: Dumping registers
1593 12:15:37.919688 reg 0x0000: 0x02000000
1594 12:15:37.922652 reg 0x0001: 0x00770020
1595 12:15:37.922765 reg 0x0002: 0x00000000
1596 12:15:37.929301 PCI: 00:1f.0 init finished in 23514 usecs
1597 12:15:37.932818 PCI: 00:1f.4 init ...
1598 12:15:37.935828 PCI: 00:1f.4 init finished in 2262 usecs
1599 12:15:37.946455 PCI: 01:00.0 init ...
1600 12:15:37.949832 PCI: 01:00.0 init finished in 2252 usecs
1601 12:15:37.953849 PNP: 0c09.0 init ...
1602 12:15:37.957703 Google Chrome EC uptime: 11.049 seconds
1603 12:15:37.964268 Google Chrome AP resets since EC boot: 0
1604 12:15:37.967187 Google Chrome most recent AP reset causes:
1605 12:15:37.974053 Google Chrome EC reset flags at last EC boot: reset-pin
1606 12:15:37.977092 PNP: 0c09.0 init finished in 20565 usecs
1607 12:15:37.980660 Devices initialized
1608 12:15:37.980753 Show all devs... After init.
1609 12:15:37.983577
1610 12:15:37.983679 Root Device: enabled 1
1611 12:15:37.987071 CPU_CLUSTER: 0: enabled 1
1612 12:15:37.990585 DOMAIN: 0000: enabled 1
1613 12:15:37.990669 APIC: 00: enabled 1
1614 12:15:37.994176 PCI: 00:00.0: enabled 1
1615 12:15:37.996939 PCI: 00:02.0: enabled 1
1616 12:15:38.000608 PCI: 00:04.0: enabled 0
1617 12:15:38.000691 PCI: 00:05.0: enabled 0
1618 12:15:38.003549 PCI: 00:12.0: enabled 1
1619 12:15:38.007207 PCI: 00:12.5: enabled 0
1620 12:15:38.010012 PCI: 00:12.6: enabled 0
1621 12:15:38.010102 PCI: 00:14.0: enabled 1
1622 12:15:38.013559 PCI: 00:14.1: enabled 0
1623 12:15:38.017139 PCI: 00:14.3: enabled 1
1624 12:15:38.017244 PCI: 00:14.5: enabled 0
1625 12:15:38.020235 PCI: 00:15.0: enabled 1
1626 12:15:38.023414 PCI: 00:15.1: enabled 1
1627 12:15:38.026961 PCI: 00:15.2: enabled 0
1628 12:15:38.027051 PCI: 00:15.3: enabled 0
1629 12:15:38.029813 PCI: 00:16.0: enabled 1
1630 12:15:38.033514 PCI: 00:16.1: enabled 0
1631 12:15:38.036403 PCI: 00:16.2: enabled 0
1632 12:15:38.036497 PCI: 00:16.3: enabled 0
1633 12:15:38.039970 PCI: 00:16.4: enabled 0
1634 12:15:38.043519 PCI: 00:16.5: enabled 0
1635 12:15:38.046520 PCI: 00:17.0: enabled 1
1636 12:15:38.046609 PCI: 00:19.0: enabled 1
1637 12:15:38.049980 PCI: 00:19.1: enabled 0
1638 12:15:38.052938 PCI: 00:19.2: enabled 0
1639 12:15:38.053041 PCI: 00:1a.0: enabled 0
1640 12:15:38.056451
1641 12:15:38.056546 PCI: 00:1c.0: enabled 0
1642 12:15:38.060099 PCI: 00:1c.1: enabled 0
1643 12:15:38.063202 PCI: 00:1c.2: enabled 0
1644 12:15:38.063295 PCI: 00:1c.3: enabled 0
1645 12:15:38.066195 PCI: 00:1c.4: enabled 0
1646 12:15:38.070047 PCI: 00:1c.5: enabled 0
1647 12:15:38.072897 PCI: 00:1c.6: enabled 0
1648 12:15:38.072989 PCI: 00:1c.7: enabled 0
1649 12:15:38.076045 PCI: 00:1d.0: enabled 1
1650 12:15:38.079613 PCI: 00:1d.1: enabled 0
1651 12:15:38.083276 PCI: 00:1d.2: enabled 0
1652 12:15:38.083362 PCI: 00:1d.3: enabled 0
1653 12:15:38.086305 PCI: 00:1d.4: enabled 0
1654 12:15:38.089854 PCI: 00:1d.5: enabled 0
1655 12:15:38.092930 PCI: 00:1e.0: enabled 1
1656 12:15:38.093016 PCI: 00:1e.1: enabled 0
1657 12:15:38.096438 PCI: 00:1e.2: enabled 1
1658 12:15:38.099275 PCI: 00:1e.3: enabled 1
1659 12:15:38.099364 PCI: 00:1f.0: enabled 1
1660 12:15:38.102972 PCI: 00:1f.1: enabled 0
1661 12:15:38.105932 PCI: 00:1f.2: enabled 0
1662 12:15:38.109513 PCI: 00:1f.3: enabled 1
1663 12:15:38.109600 PCI: 00:1f.4: enabled 1
1664 12:15:38.112551 PCI: 00:1f.5: enabled 1
1665 12:15:38.116042 PCI: 00:1f.6: enabled 0
1666 12:15:38.119448 USB0 port 0: enabled 1
1667 12:15:38.119539 I2C: 01:15: enabled 1
1668 12:15:38.122552 I2C: 02:5d: enabled 1
1669 12:15:38.126218 GENERIC: 0.0: enabled 1
1670 12:15:38.126304 I2C: 03:1a: enabled 1
1671 12:15:38.129358 I2C: 03:38: enabled 1
1672 12:15:38.132327 I2C: 03:39: enabled 1
1673 12:15:38.132425 I2C: 03:3a: enabled 1
1674 12:15:38.135843 I2C: 03:3b: enabled 1
1675 12:15:38.139083 PCI: 00:00.0: enabled 1
1676 12:15:38.139169 SPI: 00: enabled 1
1677 12:15:38.142205 SPI: 01: enabled 1
1678 12:15:38.145576 PNP: 0c09.0: enabled 1
1679 12:15:38.145669 USB2 port 0: enabled 1
1680 12:15:38.148649 USB2 port 1: enabled 1
1681 12:15:38.152196 USB2 port 2: enabled 0
1682 12:15:38.155586 USB2 port 3: enabled 0
1683 12:15:38.155678 USB2 port 5: enabled 0
1684 12:15:38.159104 USB2 port 6: enabled 1
1685 12:15:38.162120 USB2 port 9: enabled 1
1686 12:15:38.162211 USB3 port 0: enabled 1
1687 12:15:38.165263 USB3 port 1: enabled 1
1688 12:15:38.168893 USB3 port 2: enabled 1
1689 12:15:38.171900 USB3 port 3: enabled 1
1690 12:15:38.171994 USB3 port 4: enabled 0
1691 12:15:38.175429 APIC: 01: enabled 1
1692 12:15:38.175517 APIC: 05: enabled 1
1693 12:15:38.178479
1694 12:15:38.178569 APIC: 04: enabled 1
1695 12:15:38.182032 APIC: 07: enabled 1
1696 12:15:38.182115 APIC: 06: enabled 1
1697 12:15:38.185023 APIC: 03: enabled 1
1698 12:15:38.188712 APIC: 02: enabled 1
1699 12:15:38.188803 PCI: 00:08.0: enabled 1
1700 12:15:38.191691 PCI: 00:14.2: enabled 1
1701 12:15:38.195270 PCI: 01:00.0: enabled 1
1702 12:15:38.198361 Disabling ACPI via APMC:
1703 12:15:38.201768 done.
1704 12:15:38.204742 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1705 12:15:38.208337 ELOG: NV offset 0xaf0000 size 0x4000
1706 12:15:38.215421 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1707 12:15:38.222346 ELOG: Event(17) added with size 13 at 2022-11-25 12:15:38 UTC
1708 12:15:38.228916 ELOG: Event(92) added with size 9 at 2022-11-25 12:15:38 UTC
1709 12:15:38.235650 ELOG: Event(93) added with size 9 at 2022-11-25 12:15:38 UTC
1710 12:15:38.242302 ELOG: Event(9A) added with size 9 at 2022-11-25 12:15:38 UTC
1711 12:15:38.249152 ELOG: Event(9E) added with size 10 at 2022-11-25 12:15:38 UTC
1712 12:15:38.255599 ELOG: Event(9F) added with size 14 at 2022-11-25 12:15:38 UTC
1713 12:15:38.258463 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1714 12:15:38.265893 ELOG: Event(A1) added with size 10 at 2022-11-25 12:15:38 UTC
1715 12:15:38.275975 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1716 12:15:38.282481 ELOG: Event(A0) added with size 9 at 2022-11-25 12:15:38 UTC
1717 12:15:38.286025 elog_add_boot_reason: Logged dev mode boot
1718 12:15:38.286131 Finalize devices...
1719 12:15:38.288949
1720 12:15:38.289048 PCI: 00:17.0 final
1721 12:15:38.292529 Devices finalized
1722 12:15:38.295471 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1723 12:15:38.302537 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1724 12:15:38.305317 ME: HFSTS1 : 0x90000245
1725 12:15:38.308933 ME: HFSTS2 : 0x3B850126
1726 12:15:38.315460 ME: HFSTS3 : 0x00000020
1727 12:15:38.319078 ME: HFSTS4 : 0x00004800
1728 12:15:38.321957 ME: HFSTS5 : 0x00000000
1729 12:15:38.325583 ME: HFSTS6 : 0x40400006
1730 12:15:38.328539 ME: Manufacturing Mode : NO
1731 12:15:38.332229 ME: FW Partition Table : OK
1732 12:15:38.335686 ME: Bringup Loader Failure : NO
1733 12:15:38.338738 ME: Firmware Init Complete : YES
1734 12:15:38.342233 ME: Boot Options Present : NO
1735 12:15:38.345129 ME: Update In Progress : NO
1736 12:15:38.348747 ME: D0i3 Support : YES
1737 12:15:38.352193 ME: Low Power State Enabled : NO
1738 12:15:38.355212 ME: CPU Replaced : NO
1739 12:15:38.358786 ME: CPU Replacement Valid : YES
1740 12:15:38.362175 ME: Current Working State : 5
1741 12:15:38.365229 ME: Current Operation State : 1
1742 12:15:38.368293 ME: Current Operation Mode : 0
1743 12:15:38.371503 ME: Error Code : 0
1744 12:15:38.375064 ME: CPU Debug Disabled : YES
1745 12:15:38.378602 ME: TXT Support : NO
1746 12:15:38.385349 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1747 12:15:38.391851 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 12:15:38.391961 CBFS @ c08000 size 3f8000
1749 12:15:38.398485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 12:15:38.401254 CBFS: Locating 'fallback/dsdt.aml'
1751 12:15:38.404837 CBFS: Found @ offset 10bb80 size 3fa5
1752 12:15:38.411390 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1753 12:15:38.415039 CBFS @ c08000 size 3f8000
1754 12:15:38.417996 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1755 12:15:38.421134 CBFS: Locating 'fallback/slic'
1756 12:15:38.426324 CBFS: 'fallback/slic' not found.
1757 12:15:38.432938 ACPI: Writing ACPI tables at 99b3e000.
1758 12:15:38.433045 ACPI: * FACS
1759 12:15:38.436519 ACPI: * DSDT
1760 12:15:38.439572 Ramoops buffer: 0x100000@0x99a3d000.
1761 12:15:38.443212 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1762 12:15:38.449255 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1763 12:15:38.452957 Google Chrome EC: version:
1764 12:15:38.456387 ro: helios_v2.0.2659-56403530b
1765 12:15:38.459421 rw: helios_v2.0.2849-c41de27e7d
1766 12:15:38.459516 running image: 1
1767 12:15:38.463908 ACPI: * FADT
1768 12:15:38.464009 SCI is IRQ9
1769 12:15:38.467425 ACPI: added table 1/32, length now 40
1770 12:15:38.470505
1771 12:15:38.470601 ACPI: * SSDT
1772 12:15:38.474019 Found 1 CPU(s) with 8 core(s) each.
1773 12:15:38.477073 Error: Could not locate 'wifi_sar' in VPD.
1774 12:15:38.483616 Checking CBFS for default SAR values
1775 12:15:38.486766 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1776 12:15:38.490430 CBFS @ c08000 size 3f8000
1777 12:15:38.497115 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1778 12:15:38.500110 CBFS: Locating 'wifi_sar_defaults.hex'
1779 12:15:38.503608 CBFS: Found @ offset 5fac0 size 77
1780 12:15:38.506725 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1781 12:15:38.513232 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1782 12:15:38.516777 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1783 12:15:38.523361 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1784 12:15:38.526633 failed to find key in VPD: dsm_calib_r0_0
1785 12:15:38.536187 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1786 12:15:38.539773 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1787 12:15:38.542723 failed to find key in VPD: dsm_calib_r0_1
1788 12:15:38.546481
1789 12:15:38.553141 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1790 12:15:38.559480 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1791 12:15:38.563057 failed to find key in VPD: dsm_calib_r0_2
1792 12:15:38.572708 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1793 12:15:38.576332 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1794 12:15:38.583098 failed to find key in VPD: dsm_calib_r0_3
1795 12:15:38.589557 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1796 12:15:38.596080 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1797 12:15:38.598984 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1798 12:15:38.602641 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1799 12:15:38.605570
1800 12:15:38.609186 EC returned error result code 1
1801 12:15:38.612812 EC returned error result code 1
1802 12:15:38.616450 EC returned error result code 1
1803 12:15:38.619378 PS2K: Bad resp from EC. Vivaldi disabled!
1804 12:15:38.625958 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1805 12:15:38.632527 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1806 12:15:38.636097 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1807 12:15:38.642787 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1808 12:15:38.645876 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1809 12:15:38.652453 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1810 12:15:38.659034 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1811 12:15:38.665399 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1812 12:15:38.668925 ACPI: added table 2/32, length now 44
1813 12:15:38.669020 ACPI: * MCFG
1814 12:15:38.675670 ACPI: added table 3/32, length now 48
1815 12:15:38.675762 ACPI: * TPM2
1816 12:15:38.678775 TPM2 log created at 99a2d000
1817 12:15:38.682422 ACPI: added table 4/32, length now 52
1818 12:15:38.685919 ACPI: * MADT
1819 12:15:38.686010 SCI is IRQ9
1820 12:15:38.688785 ACPI: added table 5/32, length now 56
1821 12:15:38.691911 current = 99b43ac0
1822 12:15:38.691993 ACPI: * DMAR
1823 12:15:38.695345 ACPI: added table 6/32, length now 60
1824 12:15:38.698798 ACPI: * IGD OpRegion
1825 12:15:38.701723 GMA: Found VBT in CBFS
1826 12:15:38.705303 GMA: Found valid VBT in CBFS
1827 12:15:38.708889 ACPI: added table 7/32, length now 64
1828 12:15:38.708974 ACPI: * HPET
1829 12:15:38.715173 ACPI: added table 8/32, length now 68
1830 12:15:38.715272 ACPI: done.
1831 12:15:38.718363 ACPI tables: 31744 bytes.
1832 12:15:38.722151 smbios_write_tables: 99a2c000
1833 12:15:38.725098 EC returned error result code 3
1834 12:15:38.728664 Couldn't obtain OEM name from CBI
1835 12:15:38.732064 Create SMBIOS type 17
1836 12:15:38.735173 PCI: 00:00.0 (Intel Cannonlake)
1837 12:15:38.735268 PCI: 00:14.3 (Intel WiFi)
1838 12:15:38.738712 SMBIOS tables: 939 bytes.
1839 12:15:38.741751 Writing table forward entry at 0x00000500
1840 12:15:38.748372 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1841 12:15:38.751990 Writing coreboot table at 0x99b62000
1842 12:15:38.758551 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1843 12:15:38.762079 1. 0000000000001000-000000000009ffff: RAM
1844 12:15:38.768146 2. 00000000000a0000-00000000000fffff: RESERVED
1845 12:15:38.771646 3. 0000000000100000-0000000099a2bfff: RAM
1846 12:15:38.778093 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1847 12:15:38.781617 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1848 12:15:38.788257 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1849 12:15:38.795009 7. 000000009a000000-000000009f7fffff: RESERVED
1850 12:15:38.797930 8. 00000000e0000000-00000000efffffff: RESERVED
1851 12:15:38.804584 9. 00000000fc000000-00000000fc000fff: RESERVED
1852 12:15:38.808073 10. 00000000fe000000-00000000fe00ffff: RESERVED
1853 12:15:38.810999 11. 00000000fed10000-00000000fed17fff: RESERVED
1854 12:15:38.817613 12. 00000000fed80000-00000000fed83fff: RESERVED
1855 12:15:38.821284 13. 00000000fed90000-00000000fed91fff: RESERVED
1856 12:15:38.827973 14. 00000000feda0000-00000000feda1fff: RESERVED
1857 12:15:38.831075 15. 0000000100000000-000000045e7fffff: RAM
1858 12:15:38.834532 Graphics framebuffer located at 0xc0000000
1859 12:15:38.837711 Passing 5 GPIOs to payload:
1860 12:15:38.844240 NAME | PORT | POLARITY | VALUE
1861 12:15:38.847347 write protect | undefined | high | low
1862 12:15:38.854428 lid | undefined | high | high
1863 12:15:38.861207 power | undefined | high | low
1864 12:15:38.864293 oprom | undefined | high | low
1865 12:15:38.870798 EC in RW | 0x000000cb | high | low
1866 12:15:38.870900 Board ID: 4
1867 12:15:38.877201 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1868 12:15:38.877303 CBFS @ c08000 size 3f8000
1869 12:15:38.884017 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1870 12:15:38.890414 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1871 12:15:38.894158 coreboot table: 1492 bytes.
1872 12:15:38.897067 IMD ROOT 0. 99fff000 00001000
1873 12:15:38.900949 IMD SMALL 1. 99ffe000 00001000
1874 12:15:38.903792 FSP MEMORY 2. 99c4e000 003b0000
1875 12:15:38.907367 CONSOLE 3. 99c2e000 00020000
1876 12:15:38.910198 FMAP 4. 99c2d000 0000054e
1877 12:15:38.913757 TIME STAMP 5. 99c2c000 00000910
1878 12:15:38.917173 VBOOT WORK 6. 99c18000 00014000
1879 12:15:38.920236 MRC DATA 7. 99c16000 00001958
1880 12:15:38.923672 ROMSTG STCK 8. 99c15000 00001000
1881 12:15:38.926941 AFTER CAR 9. 99c0b000 0000a000
1882 12:15:38.930478 RAMSTAGE 10. 99baf000 0005c000
1883 12:15:38.933456 REFCODE 11. 99b7a000 00035000
1884 12:15:38.937250 SMM BACKUP 12. 99b6a000 00010000
1885 12:15:38.940148 COREBOOT 13. 99b62000 00008000
1886 12:15:38.943791 ACPI 14. 99b3e000 00024000
1887 12:15:38.946731 ACPI GNVS 15. 99b3d000 00001000
1888 12:15:38.950307 RAMOOPS 16. 99a3d000 00100000
1889 12:15:38.953321 TPM2 TCGLOG17. 99a2d000 00010000
1890 12:15:38.956985 SMBIOS 18. 99a2c000 00000800
1891 12:15:38.960060 IMD small region:
1892 12:15:38.963473 IMD ROOT 0. 99ffec00 00000400
1893 12:15:38.966628 FSP RUNTIME 1. 99ffebe0 00000004
1894 12:15:38.970276 EC HOSTEVENT 2. 99ffebc0 00000008
1895 12:15:38.973115 POWER STATE 3. 99ffeb80 00000040
1896 12:15:38.976536 ROMSTAGE 4. 99ffeb60 00000004
1897 12:15:38.980019 MEM INFO 5. 99ffe9a0 000001b9
1898 12:15:38.983136 VPD 6. 99ffe920 0000006c
1899 12:15:38.986155 MTRR: Physical address space:
1900 12:15:38.992996 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1901 12:15:38.999566 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1902 12:15:39.006289 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1903 12:15:39.013072 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1904 12:15:39.016078 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1905 12:15:39.022969 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1906 12:15:39.029650 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1907 12:15:39.032763 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 12:15:39.039548 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 12:15:39.042443 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 12:15:39.046102 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 12:15:39.049064 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 12:15:39.055576 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 12:15:39.059153 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 12:15:39.062548 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 12:15:39.065680 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 12:15:39.072318 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 12:15:39.075898 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 12:15:39.078918 call enable_fixed_mtrr()
1919 12:15:39.082509 CPU physical address size: 39 bits
1920 12:15:39.085530 MTRR: default type WB/UC MTRR counts: 6/8.
1921 12:15:39.088593 MTRR: WB selected as default type.
1922 12:15:39.095702 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1923 12:15:39.101812 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1924 12:15:39.108539 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1925 12:15:39.115014 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1926 12:15:39.121566 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1927 12:15:39.128135 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1928 12:15:39.128241
1929 12:15:39.128320 MTRR check
1930 12:15:39.131697 Fixed MTRRs : Enabled
1931 12:15:39.134797 Variable MTRRs: Enabled
1932 12:15:39.134900
1933 12:15:39.138320 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:15:39.141907 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:15:39.148502 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:15:39.151629 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:15:39.154625 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:15:39.158224 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:15:39.161338 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:15:39.167957 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:15:39.171637 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:15:39.174544 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:15:39.178171 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:15:39.184500 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1945 12:15:39.188090 call enable_fixed_mtrr()
1946 12:15:39.191191 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1947 12:15:39.194251 CPU physical address size: 39 bits
1948 12:15:39.198023
1949 12:15:39.198132 CBFS @ c08000 size 3f8000
1950 12:15:39.204594 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1951 12:15:39.207621 CBFS: Locating 'fallback/payload'
1952 12:15:39.211191 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 12:15:39.217616 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 12:15:39.221222 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 12:15:39.224269 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 12:15:39.227485 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 12:15:39.234373 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 12:15:39.237416 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 12:15:39.240920 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 12:15:39.243968 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 12:15:39.250667 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 12:15:39.254199 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 12:15:39.257163 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 12:15:39.260713 call enable_fixed_mtrr()
1965 12:15:39.263758 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 12:15:39.267447 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 12:15:39.273994 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 12:15:39.276928 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 12:15:39.280442 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 12:15:39.284042 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 12:15:39.290573 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 12:15:39.293602 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 12:15:39.297370 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 12:15:39.300241 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 12:15:39.303940 CPU physical address size: 39 bits
1976 12:15:39.306945 call enable_fixed_mtrr()
1977 12:15:39.310470 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 12:15:39.317109 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 12:15:39.320115 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 12:15:39.323761 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 12:15:39.326776 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 12:15:39.333511 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 12:15:39.336972 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 12:15:39.339933 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 12:15:39.343431 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 12:15:39.350045 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 12:15:39.353125 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 12:15:39.356772 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 12:15:39.359718 call enable_fixed_mtrr()
1990 12:15:39.363375 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 12:15:39.366499 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 12:15:39.373120 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 12:15:39.376654 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 12:15:39.379599 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 12:15:39.383249 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 12:15:39.389894 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 12:15:39.392845 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 12:15:39.396445 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 12:15:39.399505 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 12:15:39.403058 CPU physical address size: 39 bits
2001 12:15:39.406502 call enable_fixed_mtrr()
2002 12:15:39.409497 CPU physical address size: 39 bits
2003 12:15:39.416542 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 12:15:39.419516 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 12:15:39.423075 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 12:15:39.426076 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 12:15:39.429905 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 12:15:39.436047 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 12:15:39.439118 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 12:15:39.442711 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 12:15:39.445752 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 12:15:39.452842 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 12:15:39.455688 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 12:15:39.459189 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 12:15:39.462982 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 12:15:39.465782 call enable_fixed_mtrr()
2017 12:15:39.469365 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 12:15:39.475885 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 12:15:39.478972 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 12:15:39.482519 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 12:15:39.485932 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 12:15:39.492256 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 12:15:39.495364 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 12:15:39.499026 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 12:15:39.501983 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 12:15:39.505557 CPU physical address size: 39 bits
2027 12:15:39.508646
2028 12:15:39.508744 call enable_fixed_mtrr()
2029 12:15:39.512207 CPU physical address size: 39 bits
2030 12:15:39.518823 CBFS: Found @ offset 1c96c0 size 3f798
2031 12:15:39.521846 CPU physical address size: 39 bits
2032 12:15:39.525385 Checking segment from ROM address 0xffdd16f8
2033 12:15:39.528501 Checking segment from ROM address 0xffdd1714
2034 12:15:39.535161 Loading segment from ROM address 0xffdd16f8
2035 12:15:39.535300 code (compression=0)
2036 12:15:39.545272 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2037 12:15:39.554943 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2038 12:15:39.555066 it's not compressed!
2039 12:15:39.648021 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2040 12:15:39.654713 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2041 12:15:39.658168 Loading segment from ROM address 0xffdd1714
2042 12:15:39.661168 Entry Point 0x30000000
2043 12:15:39.664743 Loaded segments
2044 12:15:39.670198 Finalizing chipset.
2045 12:15:39.673228 Finalizing SMM.
2046 12:15:39.676916 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2047 12:15:39.680054 mp_park_aps done after 0 msecs.
2048 12:15:39.686509 Jumping to boot code at 30000000(99b62000)
2049 12:15:39.693546 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2050 12:15:39.693668
2051 12:15:39.693747
2052 12:15:39.693818
2053 12:15:39.696569 Starting depthcharge on Helios...
2054 12:15:39.696669
2055 12:15:39.697023 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2056 12:15:39.697140 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2057 12:15:39.697235 Setting prompt string to ['hatch:']
2058 12:15:39.697327 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2059 12:15:39.706199 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2060 12:15:39.706317
2061 12:15:39.713024 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2062 12:15:39.713136
2063 12:15:39.719450 board_setup: Info: eMMC controller not present; skipping
2064 12:15:39.719567
2065 12:15:39.723095 New NVMe Controller 0x30053ac0 @ 00:1d:00
2066 12:15:39.723196
2067 12:15:39.729455 board_setup: Info: SDHCI controller not present; skipping
2068 12:15:39.729565
2069 12:15:39.736157 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2070 12:15:39.736284
2071 12:15:39.736366 Wipe memory regions:
2072 12:15:39.736443
2073 12:15:39.739127 [0x00000000001000, 0x000000000a0000)
2074 12:15:39.739232
2075 12:15:39.745708 [0x00000000100000, 0x00000030000000)
2076 12:15:39.745812
2077 12:15:39.812598 [0x00000030657430, 0x00000099a2c000)
2078 12:15:39.812759
2079 12:15:39.962511 [0x00000100000000, 0x0000045e800000)
2080 12:15:39.962673
2081 12:15:41.418884 R8152: Initializing
2082 12:15:41.419054
2083 12:15:41.422159 Version 9 (ocp_data = 6010)
2084 12:15:41.422256
2085 12:15:41.426092 R8152: Done initializing
2086 12:15:41.426188
2087 12:15:41.429533 Adding net device
2088 12:15:41.429629
2089 12:15:41.912281 R8152: Initializing
2090 12:15:41.912435
2091 12:15:41.915651 Version 6 (ocp_data = 5c30)
2092 12:15:41.915749
2093 12:15:41.919152 R8152: Done initializing
2094 12:15:41.919248
2095 12:15:41.922119 net_add_device: Attemp to include the same device
2096 12:15:41.926143
2097 12:15:41.933012 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2098 12:15:41.933113
2099 12:15:41.933188
2100 12:15:41.933257
2101 12:15:41.933540 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2103 12:15:42.034314 hatch: tftpboot 192.168.201.1 8123270/tftp-deploy-_94_lupg/kernel/bzImage 8123270/tftp-deploy-_94_lupg/kernel/cmdline 8123270/tftp-deploy-_94_lupg/ramdisk/ramdisk.cpio.gz
2104 12:15:42.034510 Setting prompt string to 'Starting kernel'
2105 12:15:42.034598 Setting prompt string to ['Starting kernel']
2106 12:15:42.034675 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2107 12:15:42.034778 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2108 12:15:42.038704 tftpboot 192.168.201.1 8123270/tftp-deploy-_94_lupg/kernel/bzImoy-_94_lupg/kernel/cmdline 8123270/tftp-deploy-_94_lupg/ramdisk/ramdisk.cpio.gz
2109 12:15:42.038815
2110 12:15:42.038891 Waiting for link
2111 12:15:42.038960
2112 12:15:42.239636 done.
2113 12:15:42.239800
2114 12:15:42.239879 MAC: 00:24:32:50:1a:59
2115 12:15:42.239949
2116 12:15:42.243327 Sending DHCP discover... done.
2117 12:15:42.243427
2118 12:15:42.246137 Waiting for reply... done.
2119 12:15:42.246233
2120 12:15:42.249610 Sending DHCP request... done.
2121 12:15:42.249707
2122 12:15:42.253082 Waiting for reply... done.
2123 12:15:42.253178
2124 12:15:42.256478 My ip is 192.168.201.14
2125 12:15:42.256575
2126 12:15:42.259392 The DHCP server ip is 192.168.201.1
2127 12:15:42.259489
2128 12:15:42.262646 TFTP server IP predefined by user: 192.168.201.1
2129 12:15:42.262741
2130 12:15:42.272610 Bootfile predefined by user: 8123270/tftp-deploy-_94_lupg/kernel/bzImage
2131 12:15:42.272716
2132 12:15:42.275898 Sending tftp read request... done.
2133 12:15:42.275995
2134 12:15:42.279901 Waiting for the transfer...
2135 12:15:42.280006
2136 12:15:42.838311 00000000 ################################################################
2137 12:15:42.838477
2138 12:15:43.362966 00080000 ################################################################
2139 12:15:43.363135
2140 12:15:43.899844 00100000 ################################################################
2141 12:15:43.900014
2142 12:15:44.442697 00180000 ################################################################
2143 12:15:44.442869
2144 12:15:44.985568 00200000 ################################################################
2145 12:15:44.985718
2146 12:15:45.539689 00280000 ################################################################
2147 12:15:45.539844
2148 12:15:46.093364 00300000 ################################################################
2149 12:15:46.093517
2150 12:15:46.622263 00380000 ################################################################
2151 12:15:46.622426
2152 12:15:47.165289 00400000 ################################################################
2153 12:15:47.165445
2154 12:15:47.717740 00480000 ################################################################
2155 12:15:47.717900
2156 12:15:48.260006 00500000 ################################################################
2157 12:15:48.260168
2158 12:15:48.815365 00580000 ################################################################
2159 12:15:48.815517
2160 12:15:49.361973 00600000 ################################################################
2161 12:15:49.362136
2162 12:15:49.682921 00680000 ###################################### done.
2163 12:15:49.683107
2164 12:15:49.686203 The bootfile was 7126928 bytes long.
2165 12:15:49.686299
2166 12:15:49.689574 Sending tftp read request... done.
2167 12:15:49.689669
2168 12:15:49.693025 Waiting for the transfer...
2169 12:15:49.693120
2170 12:15:50.214296 00000000 ################################################################
2171 12:15:50.214457
2172 12:15:50.746869 00080000 ################################################################
2173 12:15:50.747032
2174 12:15:51.269021 00100000 ################################################################
2175 12:15:51.269183
2176 12:15:51.798472 00180000 ################################################################
2177 12:15:51.798641
2178 12:15:52.326627 00200000 ################################################################
2179 12:15:52.326806
2180 12:15:52.847423 00280000 ################################################################
2181 12:15:52.847578
2182 12:15:53.378492 00300000 ################################################################
2183 12:15:53.378644
2184 12:15:53.908424 00380000 ################################################################
2185 12:15:53.908572
2186 12:15:54.441703 00400000 ################################################################
2187 12:15:54.441862
2188 12:15:54.979313 00480000 ################################################################
2189 12:15:54.979469
2190 12:15:55.235171 00500000 ################################ done.
2191 12:15:55.235325
2192 12:15:55.238106 Sending tftp read request... done.
2193 12:15:55.238203
2194 12:15:55.241632 Waiting for the transfer...
2195 12:15:55.241729
2196 12:15:55.241824 00000000 # done.
2197 12:15:55.241915
2198 12:15:55.251296 Command line loaded dynamically from TFTP file: 8123270/tftp-deploy-_94_lupg/kernel/cmdline
2199 12:15:55.251421
2200 12:15:55.277982 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8123270/extract-nfsrootfs-zmfi6c3j,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2201 12:15:55.278117
2202 12:15:55.284864 ec_init(0): CrosEC protocol v3 supported (256, 256)
2203 12:15:55.285003
2204 12:15:55.291253 Shutting down all USB controllers.
2205 12:15:55.291449
2206 12:15:55.291601 Removing current net device
2207 12:15:55.291745
2208 12:15:55.295182 Finalizing coreboot
2209 12:15:55.295344
2210 12:15:55.301769 Exiting depthcharge with code 4 at timestamp: 22915434
2211 12:15:55.301968
2212 12:15:55.302164
2213 12:15:55.302349 Starting kernel ...
2214 12:15:55.302528
2215 12:15:55.302705
2216 12:15:55.303370 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2217 12:15:55.303629 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2218 12:15:55.303869 Setting prompt string to ['Linux version [0-9]']
2219 12:15:55.304112 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2220 12:15:55.304344 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2221 12:15:55.305420
2222 12:15:55.305658
2224 12:20:20.303926 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2226 12:20:20.304274 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2228 12:20:20.304541 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2231 12:20:20.304979 end: 2 depthcharge-action (duration 00:05:00) [common]
2233 12:20:20.305239 Cleaning after the job
2234 12:20:20.305334 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/ramdisk
2235 12:20:20.305820 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/kernel
2236 12:20:20.306389 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/nfsrootfs
2237 12:20:20.351819 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123270/tftp-deploy-_94_lupg/modules
2238 12:20:20.352141 start: 4.1 power-off (timeout 00:00:30) [common]
2239 12:20:20.352321 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2240 12:20:20.373483 >> Command sent successfully.
2241 12:20:20.375672 Returned 0 in 0 seconds
2242 12:20:20.476476 end: 4.1 power-off (duration 00:00:00) [common]
2244 12:20:20.476844 start: 4.2 read-feedback (timeout 00:10:00) [common]
2245 12:20:20.477119 Listened to connection for namespace 'common' for up to 1s
2246 12:20:21.380392 Listened to connection for namespace 'common' for up to 1s
2247 12:20:21.383776 Listened to connection for namespace 'common' for up to 1s
2248 12:20:21.387241 Listened to connection for namespace 'common' for up to 1s
2249 12:20:21.390584 Listened to connection for namespace 'common' for up to 1s
2250 12:20:21.393409 Listened to connection for namespace 'common' for up to 1s
2251 12:20:21.396829 Listened to connection for namespace 'common' for up to 1s
2252 12:20:21.400241 Listened to connection for namespace 'common' for up to 1s
2253 12:20:21.403627 Listened to connection for namespace 'common' for up to 1s
2254 12:20:21.407197 Listened to connection for namespace 'common' for up to 1s
2255 12:20:21.410126 Listened to connection for namespace 'common' for up to 1s
2256 12:20:21.413647 Listened to connection for namespace 'common' for up to 1s
2257 12:20:21.418207 Listened to connection for namespace 'common' for up to 1s
2258 12:20:21.422472 Listened to connection for namespace 'common' for up to 1s
2259 12:20:21.477327 Finalising connection for namespace 'common'
2260 12:20:21.477494 Disconnecting from shell: Finalise
2261 12:20:21.477586
2262 12:20:21.578339 end: 4.2 read-feedback (duration 00:00:01) [common]
2263 12:20:21.578510 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8123270
2264 12:20:21.756836 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8123270
2265 12:20:21.757042 JobError: Your job cannot terminate cleanly.