Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:08:54.322240 lava-dispatcher, installed at version: 2022.10
2 12:08:54.322465 start: 0 validate
3 12:08:54.322616 Start time: 2022-11-25 12:08:54.322608+00:00 (UTC)
4 12:08:54.322767 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:08:54.322914 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 12:08:54.613005 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:08:54.613198 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:08:54.901844 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:08:54.902029 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:08:55.188116 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:08:55.188753 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d420%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:08:55.480784 validate duration: 1.16
14 12:08:55.481089 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:08:55.481208 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:08:55.481314 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:08:55.481480 Not decompressing ramdisk as can be used compressed.
18 12:08:55.481585 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/initrd.cpio.gz
19 12:08:55.481664 saving as /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/ramdisk/initrd.cpio.gz
20 12:08:55.481737 total size: 5431622 (5MB)
21 12:08:55.482971 progress 0% (0MB)
22 12:08:55.484672 progress 5% (0MB)
23 12:08:55.486211 progress 10% (0MB)
24 12:08:55.487839 progress 15% (0MB)
25 12:08:55.489494 progress 20% (1MB)
26 12:08:55.490956 progress 25% (1MB)
27 12:08:55.492400 progress 30% (1MB)
28 12:08:55.494009 progress 35% (1MB)
29 12:08:55.495487 progress 40% (2MB)
30 12:08:55.496936 progress 45% (2MB)
31 12:08:55.498425 progress 50% (2MB)
32 12:08:55.500065 progress 55% (2MB)
33 12:08:55.501521 progress 60% (3MB)
34 12:08:55.502986 progress 65% (3MB)
35 12:08:55.504597 progress 70% (3MB)
36 12:08:55.506043 progress 75% (3MB)
37 12:08:55.507551 progress 80% (4MB)
38 12:08:55.508958 progress 85% (4MB)
39 12:08:55.510531 progress 90% (4MB)
40 12:08:55.511980 progress 95% (4MB)
41 12:08:55.513410 progress 100% (5MB)
42 12:08:55.513716 5MB downloaded in 0.03s (162.00MB/s)
43 12:08:55.513875 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:08:55.514152 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:08:55.514310 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:08:55.514408 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:08:55.514521 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:08:55.514596 saving as /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/kernel/bzImage
50 12:08:55.514665 total size: 7126928 (6MB)
51 12:08:55.514766 No compression specified
52 12:09:02.023926 progress 0% (0MB)
53 12:09:02.033115 progress 5% (0MB)
54 12:09:02.042332 progress 10% (0MB)
55 12:09:02.051429 progress 15% (1MB)
56 12:09:02.057805 progress 20% (1MB)
57 12:09:02.062545 progress 25% (1MB)
58 12:09:02.066424 progress 30% (2MB)
59 12:09:02.069707 progress 35% (2MB)
60 12:09:02.072469 progress 40% (2MB)
61 12:09:02.075233 progress 45% (3MB)
62 12:09:02.077781 progress 50% (3MB)
63 12:09:02.080201 progress 55% (3MB)
64 12:09:02.082472 progress 60% (4MB)
65 12:09:02.084633 progress 65% (4MB)
66 12:09:02.086750 progress 70% (4MB)
67 12:09:02.088714 progress 75% (5MB)
68 12:09:02.090500 progress 80% (5MB)
69 12:09:02.092450 progress 85% (5MB)
70 12:09:02.094410 progress 90% (6MB)
71 12:09:02.096363 progress 95% (6MB)
72 12:09:02.098330 progress 100% (6MB)
73 12:09:02.098575 6MB downloaded in 6.58s (1.03MB/s)
74 12:09:02.098741 end: 1.2.1 http-download (duration 00:00:07) [common]
76 12:09:02.099031 end: 1.2 download-retry (duration 00:00:07) [common]
77 12:09:02.099134 start: 1.3 download-retry (timeout 00:09:53) [common]
78 12:09:02.099234 start: 1.3.1 http-download (timeout 00:09:53) [common]
79 12:09:02.099355 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/full.rootfs.tar.xz
80 12:09:02.099433 saving as /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/nfsrootfs/full.rootfs.tar
81 12:09:02.099503 total size: 123211568 (117MB)
82 12:09:02.099573 Using unxz to decompress xz
83 12:09:02.103222 progress 0% (0MB)
84 12:09:02.600715 progress 5% (5MB)
85 12:09:03.113093 progress 10% (11MB)
86 12:09:03.627454 progress 15% (17MB)
87 12:09:04.138386 progress 20% (23MB)
88 12:09:04.499966 progress 25% (29MB)
89 12:09:04.874586 progress 30% (35MB)
90 12:09:05.164918 progress 35% (41MB)
91 12:09:05.379059 progress 40% (47MB)
92 12:09:05.771741 progress 45% (52MB)
93 12:09:06.167655 progress 50% (58MB)
94 12:09:06.536179 progress 55% (64MB)
95 12:09:06.921850 progress 60% (70MB)
96 12:09:07.287170 progress 65% (76MB)
97 12:09:07.703354 progress 70% (82MB)
98 12:09:08.153042 progress 75% (88MB)
99 12:09:08.610487 progress 80% (94MB)
100 12:09:08.736623 progress 85% (99MB)
101 12:09:08.922758 progress 90% (105MB)
102 12:09:09.296848 progress 95% (111MB)
103 12:09:09.704359 progress 100% (117MB)
104 12:09:09.709915 117MB downloaded in 7.61s (15.44MB/s)
105 12:09:09.710222 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:09:09.710524 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:09:09.710632 start: 1.4 download-retry (timeout 00:09:46) [common]
109 12:09:09.710731 start: 1.4.1 http-download (timeout 00:09:46) [common]
110 12:09:09.710874 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d420/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:09:09.710958 saving as /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/modules/modules.tar
112 12:09:09.711030 total size: 52100 (0MB)
113 12:09:09.711107 Using unxz to decompress xz
114 12:09:09.997410 progress 62% (0MB)
115 12:09:09.997896 progress 100% (0MB)
116 12:09:10.001569 0MB downloaded in 0.29s (0.17MB/s)
117 12:09:10.001852 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:09:10.002188 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:09:10.002297 start: 1.5 prepare-tftp-overlay (timeout 00:09:45) [common]
121 12:09:10.002410 start: 1.5.1 extract-nfsrootfs (timeout 00:09:45) [common]
122 12:09:11.883934 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8123203/extract-nfsrootfs-ue8jl_r3
123 12:09:11.884179 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:09:11.884352 start: 1.5.2 lava-overlay (timeout 00:09:44) [common]
125 12:09:11.884566 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr
126 12:09:11.884734 makedir: /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin
127 12:09:11.884876 makedir: /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/tests
128 12:09:11.885026 makedir: /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/results
129 12:09:11.885191 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-add-keys
130 12:09:11.885389 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-add-sources
131 12:09:11.885532 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-background-process-start
132 12:09:11.885663 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-background-process-stop
133 12:09:11.885789 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-common-functions
134 12:09:11.885914 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-echo-ipv4
135 12:09:11.886040 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-install-packages
136 12:09:11.886164 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-installed-packages
137 12:09:11.886286 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-os-build
138 12:09:11.886414 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-probe-channel
139 12:09:11.886536 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-probe-ip
140 12:09:11.886664 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-target-ip
141 12:09:11.887038 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-target-mac
142 12:09:11.887165 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-target-storage
143 12:09:11.887292 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-case
144 12:09:11.887418 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-event
145 12:09:11.887557 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-feedback
146 12:09:11.887683 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-raise
147 12:09:11.887806 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-reference
148 12:09:11.887950 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-runner
149 12:09:11.888078 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-set
150 12:09:11.888202 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-test-shell
151 12:09:11.888326 Updating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-install-packages (oe)
152 12:09:11.888459 Updating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/bin/lava-installed-packages (oe)
153 12:09:11.888568 Creating /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/environment
154 12:09:11.888664 LAVA metadata
155 12:09:11.888738 - LAVA_JOB_ID=8123203
156 12:09:11.888810 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:09:11.888924 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:44) [common]
158 12:09:11.888997 skipped lava-vland-overlay
159 12:09:11.889083 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:09:11.889177 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:44) [common]
161 12:09:11.889248 skipped lava-multinode-overlay
162 12:09:11.889331 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:09:11.889423 start: 1.5.2.3 test-definition (timeout 00:09:44) [common]
164 12:09:11.889503 Loading test definitions
165 12:09:11.889603 start: 1.5.2.3.1 git-repo-action (timeout 00:09:44) [common]
166 12:09:11.889682 Using /lava-8123203 at stage 0
167 12:09:11.889786 Fetching tests from https://github.com/kernelci/test-definitions
168 12:09:11.889874 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/0/tests/0_ltp-timers'
169 12:09:18.358792 Running '/usr/bin/git checkout kernelci.org
170 12:09:18.516529 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 12:09:18.517271 uuid=8123203_1.5.2.3.1 testdef=None
172 12:09:18.517452 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 12:09:18.517734 start: 1.5.2.3.2 test-overlay (timeout 00:09:37) [common]
175 12:09:18.518475 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:09:18.518762 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:37) [common]
178 12:09:18.519658 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:09:18.519940 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:37) [common]
181 12:09:18.520804 runner path: /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/0/tests/0_ltp-timers test_uuid 8123203_1.5.2.3.1
182 12:09:18.520910 GRP_TEST='TMR'
183 12:09:18.520987 SKIPFILE='skipfile-lkft.yaml'
184 12:09:18.521059 SKIP_INSTALL='true'
185 12:09:18.521128 TST_CMDFILES=''
186 12:09:18.521276 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 12:09:18.521523 Creating lava-test-runner.conf files
189 12:09:18.521598 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8123203/lava-overlay-x2b0_1hr/lava-8123203/0 for stage 0
190 12:09:18.521692 - 0_ltp-timers
191 12:09:18.521806 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
192 12:09:18.521909 start: 1.5.2.4 compress-overlay (timeout 00:09:37) [common]
193 12:09:26.979814 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
194 12:09:26.979987 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:29) [common]
195 12:09:26.980103 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 12:09:26.980222 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
197 12:09:26.980337 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
198 12:09:27.096008 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 12:09:27.096400 start: 1.5.4 extract-modules (timeout 00:09:28) [common]
200 12:09:27.096538 extracting modules file /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123203/extract-nfsrootfs-ue8jl_r3
201 12:09:27.101328 extracting modules file /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8123203/extract-overlay-ramdisk-l6gqrsuf/ramdisk
202 12:09:27.105699 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 12:09:27.105834 start: 1.5.5 apply-overlay-tftp (timeout 00:09:28) [common]
204 12:09:27.105939 [common] Applying overlay to NFS
205 12:09:27.106024 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8123203/compress-overlay-95b3ys8c/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8123203/extract-nfsrootfs-ue8jl_r3
206 12:09:27.640753 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
207 12:09:27.640931 start: 1.5.6 configure-preseed-file (timeout 00:09:28) [common]
208 12:09:27.641042 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 12:09:27.641153 start: 1.5.7 compress-ramdisk (timeout 00:09:28) [common]
210 12:09:27.641251 Building ramdisk /var/lib/lava/dispatcher/tmp/8123203/extract-overlay-ramdisk-l6gqrsuf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8123203/extract-overlay-ramdisk-l6gqrsuf/ramdisk
211 12:09:27.678557 >> 24546 blocks
212 12:09:28.226074 rename /var/lib/lava/dispatcher/tmp/8123203/extract-overlay-ramdisk-l6gqrsuf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/ramdisk/ramdisk.cpio.gz
213 12:09:28.226546 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 12:09:28.226686 start: 1.5.8 prepare-kernel (timeout 00:09:27) [common]
215 12:09:28.226848 start: 1.5.8.1 prepare-fit (timeout 00:09:27) [common]
216 12:09:28.226964 No mkimage arch provided, not using FIT.
217 12:09:28.227083 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 12:09:28.227185 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 12:09:28.227316 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
220 12:09:28.227424 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:27) [common]
221 12:09:28.227530 No LXC device requested
222 12:09:28.227627 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 12:09:28.227732 start: 1.7 deploy-device-env (timeout 00:09:27) [common]
224 12:09:28.227825 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 12:09:28.227924 Checking files for TFTP limit of 4294967296 bytes.
226 12:09:28.228358 end: 1 tftp-deploy (duration 00:00:33) [common]
227 12:09:28.228478 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 12:09:28.228604 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 12:09:28.228750 substitutions:
230 12:09:28.228829 - {DTB}: None
231 12:09:28.228905 - {INITRD}: 8123203/tftp-deploy-t0wj258y/ramdisk/ramdisk.cpio.gz
232 12:09:28.228976 - {KERNEL}: 8123203/tftp-deploy-t0wj258y/kernel/bzImage
233 12:09:28.229051 - {LAVA_MAC}: None
234 12:09:28.229136 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8123203/extract-nfsrootfs-ue8jl_r3
235 12:09:28.229208 - {NFS_SERVER_IP}: 192.168.201.1
236 12:09:28.229295 - {PRESEED_CONFIG}: None
237 12:09:28.229370 - {PRESEED_LOCAL}: None
238 12:09:28.229436 - {RAMDISK}: 8123203/tftp-deploy-t0wj258y/ramdisk/ramdisk.cpio.gz
239 12:09:28.229501 - {ROOT_PART}: None
240 12:09:28.229572 - {ROOT}: None
241 12:09:28.229652 - {SERVER_IP}: 192.168.201.1
242 12:09:28.229717 - {TEE}: None
243 12:09:28.229781 Parsed boot commands:
244 12:09:28.229844 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 12:09:28.230021 Parsed boot commands: tftpboot 192.168.201.1 8123203/tftp-deploy-t0wj258y/kernel/bzImage 8123203/tftp-deploy-t0wj258y/kernel/cmdline 8123203/tftp-deploy-t0wj258y/ramdisk/ramdisk.cpio.gz
246 12:09:28.230131 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 12:09:28.230243 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 12:09:28.230365 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 12:09:28.230469 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 12:09:28.230552 Not connected, no need to disconnect.
251 12:09:28.230650 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 12:09:28.230750 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 12:09:28.230841 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
254 12:09:28.233864 Setting prompt string to ['lava-test: # ']
255 12:09:28.234236 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 12:09:28.234379 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 12:09:28.234500 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 12:09:28.234603 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 12:09:28.234818 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
260 12:09:28.255873 >> Command sent successfully.
261 12:09:28.257996 Returned 0 in 0 seconds
262 12:09:28.358808 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 12:09:28.359187 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 12:09:28.359318 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 12:09:28.359428 Setting prompt string to 'Starting depthcharge on Helios...'
267 12:09:28.359517 Changing prompt to 'Starting depthcharge on Helios...'
268 12:09:28.359617 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 12:09:28.359935 [Enter `^Ec?' for help]
270 12:09:35.773433
271 12:09:35.773614
272 12:09:35.783324 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 12:09:35.786450 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 12:09:35.793203 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 12:09:35.796186 CPU: AES supported, TXT NOT supported, VT supported
276 12:09:35.802964 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 12:09:35.806554 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 12:09:35.813297 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 12:09:35.816782 VBOOT: Loading verstage.
280 12:09:35.819777 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 12:09:35.826958 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 12:09:35.829849 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 12:09:35.833319 CBFS @ c08000 size 3f8000
284 12:09:35.840110 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 12:09:35.843123 CBFS: Locating 'fallback/verstage'
286 12:09:35.846683 CBFS: Found @ offset 10fb80 size 1072c
287 12:09:35.850293
288 12:09:35.850389
289 12:09:35.859796 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 12:09:35.874349 Probing TPM: . done!
291 12:09:35.877368 TPM ready after 0 ms
292 12:09:35.881001 Connected to device vid:did:rid of 1ae0:0028:00
293 12:09:35.891528 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 12:09:35.894567 Initialized TPM device CR50 revision 0
295 12:09:35.937304 tlcl_send_startup: Startup return code is 0
296 12:09:35.937482 TPM: setup succeeded
297 12:09:35.950118 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 12:09:35.953682 Chrome EC: UHEPI supported
299 12:09:35.957331 Phase 1
300 12:09:35.960351 FMAP: area GBB found @ c05000 (12288 bytes)
301 12:09:35.967047 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 12:09:35.967145 Phase 2
303 12:09:35.969986
304 12:09:35.970082 Phase 3
305 12:09:35.973726 FMAP: area GBB found @ c05000 (12288 bytes)
306 12:09:35.979883 VB2:vb2_report_dev_firmware() This is developer signed firmware
307 12:09:35.986742 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 12:09:35.989829 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 12:09:35.996578 VB2:vb2_verify_keyblock() Checking keyblock signature...
310 12:09:36.012213 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 12:09:36.015886 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 12:09:36.022324 VB2:vb2_verify_fw_preamble() Verifying preamble.
313 12:09:36.026488 Phase 4
314 12:09:36.030156 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
315 12:09:36.036158 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
316 12:09:36.216032 VB2:vb2_rsa_verify_digest() Digest check failed!
317 12:09:36.219178 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
318 12:09:36.222767
319 12:09:36.222865 Saving nvdata
320 12:09:36.225864 Reboot requested (10020007)
321 12:09:36.229218 board_reset() called!
322 12:09:36.229315 full_reset() called!
323 12:09:40.740919
324 12:09:40.741079
325 12:09:40.750519 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
326 12:09:40.754151 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
327 12:09:40.760256 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
328 12:09:40.763914 CPU: AES supported, TXT NOT supported, VT supported
329 12:09:40.770718 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
330 12:09:40.773913 PCH: device id 0284 (rev 00) is Cometlake-U Premium
331 12:09:40.780573 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
332 12:09:40.783822 VBOOT: Loading verstage.
333 12:09:40.786898 FMAP: Found "FLASH" version 1.1 at 0xc04000.
334 12:09:40.793611 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
335 12:09:40.797358 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
336 12:09:40.800321 CBFS @ c08000 size 3f8000
337 12:09:40.806855 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
338 12:09:40.810557 CBFS: Locating 'fallback/verstage'
339 12:09:40.813572 CBFS: Found @ offset 10fb80 size 1072c
340 12:09:40.817084
341 12:09:40.817181
342 12:09:40.827469 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
343 12:09:40.841756 Probing TPM: . done!
344 12:09:40.844656 TPM ready after 0 ms
345 12:09:40.848175 Connected to device vid:did:rid of 1ae0:0028:00
346 12:09:40.858324 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
347 12:09:40.861896 Initialized TPM device CR50 revision 0
348 12:09:40.904362 tlcl_send_startup: Startup return code is 0
349 12:09:40.904514 TPM: setup succeeded
350 12:09:40.916843 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 12:09:40.921037 Chrome EC: UHEPI supported
352 12:09:40.924065 Phase 1
353 12:09:40.927805 FMAP: area GBB found @ c05000 (12288 bytes)
354 12:09:40.934368 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
355 12:09:40.940662 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
356 12:09:40.944411 Recovery requested (1009000e)
357 12:09:40.949727 Saving nvdata
358 12:09:40.956235 tlcl_extend: response is 0
359 12:09:40.964885 tlcl_extend: response is 0
360 12:09:40.971507 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 12:09:40.975264 CBFS @ c08000 size 3f8000
362 12:09:40.981390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 12:09:40.985157 CBFS: Locating 'fallback/romstage'
364 12:09:40.988212 CBFS: Found @ offset 80 size 145fc
365 12:09:40.991946 Accumulated console time in verstage 98 ms
366 12:09:40.992046
367 12:09:40.992123
368 12:09:41.004823 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
369 12:09:41.011324 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
370 12:09:41.014939 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
371 12:09:41.017997 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
372 12:09:41.024616 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
373 12:09:41.027580 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
374 12:09:41.031243 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
375 12:09:41.034227 TCO_STS: 0000 0000
376 12:09:41.037973 GEN_PMCON: e0015238 00000200
377 12:09:41.041046 GBLRST_CAUSE: 00000000 00000000
378 12:09:41.041149 prev_sleep_state 5
379 12:09:41.044662 Boot Count incremented to 36560
380 12:09:41.051325 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 12:09:41.054983 CBFS @ c08000 size 3f8000
382 12:09:41.061354 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 12:09:41.061447 CBFS: Locating 'fspm.bin'
384 12:09:41.064426 CBFS: Found @ offset 5ffc0 size 71000
385 12:09:41.068112
386 12:09:41.070993 Chrome EC: UHEPI supported
387 12:09:41.077625 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
388 12:09:41.081345 Probing TPM: done!
389 12:09:41.088123 Connected to device vid:did:rid of 1ae0:0028:00
390 12:09:41.097769 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
391 12:09:41.103855 Initialized TPM device CR50 revision 0
392 12:09:41.112821 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 12:09:41.119436 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
394 12:09:41.123054 MRC cache found, size 1948
395 12:09:41.126049 bootmode is set to: 2
396 12:09:41.129610 PRMRR disabled by config.
397 12:09:41.129715 SPD INDEX = 1
398 12:09:41.136168 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 12:09:41.139231 CBFS @ c08000 size 3f8000
400 12:09:41.146041 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 12:09:41.146142 CBFS: Locating 'spd.bin'
402 12:09:41.149144 CBFS: Found @ offset 5fb80 size 400
403 12:09:41.152736 SPD: module type is LPDDR3
404 12:09:41.155704 SPD: module part is
405 12:09:41.162222 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
406 12:09:41.165883 SPD: device width 4 bits, bus width 8 bits
407 12:09:41.168917 SPD: module size is 4096 MB (per channel)
408 12:09:41.172690 memory slot: 0 configuration done.
409 12:09:41.175621 memory slot: 2 configuration done.
410 12:09:41.227133 CBMEM:
411 12:09:41.230575 IMD: root @ 99fff000 254 entries.
412 12:09:41.234103 IMD: root @ 99ffec00 62 entries.
413 12:09:41.237157 External stage cache:
414 12:09:41.240246 IMD: root @ 9abff000 254 entries.
415 12:09:41.243819 IMD: root @ 9abfec00 62 entries.
416 12:09:41.247307 Chrome EC: clear events_b mask to 0x0000000020004000
417 12:09:41.250361
418 12:09:41.262941 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 12:09:41.276817 tlcl_write: response is 0
420 12:09:41.285493 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 12:09:41.292032 MRC: TPM MRC hash updated successfully.
422 12:09:41.292172 2 DIMMs found
423 12:09:41.295718 SMM Memory Map
424 12:09:41.298798 SMRAM : 0x9a000000 0x1000000
425 12:09:41.301922 Subregion 0: 0x9a000000 0xa00000
426 12:09:41.305483 Subregion 1: 0x9aa00000 0x200000
427 12:09:41.308482 Subregion 2: 0x9ac00000 0x400000
428 12:09:41.312061 top_of_ram = 0x9a000000
429 12:09:41.315116 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 12:09:41.321926 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 12:09:41.324932 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 12:09:41.331957 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 12:09:41.335418 CBFS @ c08000 size 3f8000
434 12:09:41.338485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 12:09:41.341612 CBFS: Locating 'fallback/postcar'
436 12:09:41.348246 CBFS: Found @ offset 107000 size 4b44
437 12:09:41.351440 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
438 12:09:41.363906 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
439 12:09:41.367577 Processing 180 relocs. Offset value of 0x97c0c000
440 12:09:41.376026 Accumulated console time in romstage 286 ms
441 12:09:41.376124
442 12:09:41.376199
443 12:09:41.385656 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
444 12:09:41.392482 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
445 12:09:41.395626 CBFS @ c08000 size 3f8000
446 12:09:41.398656 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
447 12:09:41.402338
448 12:09:41.405430 CBFS: Locating 'fallback/ramstage'
449 12:09:41.408611 CBFS: Found @ offset 43380 size 1b9e8
450 12:09:41.415041 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 12:09:41.447668 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 12:09:41.450616 Processing 3976 relocs. Offset value of 0x98db0000
453 12:09:41.457475 Accumulated console time in postcar 52 ms
454 12:09:41.457583
455 12:09:41.457663
456 12:09:41.467370 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 12:09:41.474191 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 12:09:41.477618 WARNING: RO_VPD is uninitialized or empty.
459 12:09:41.480735 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 12:09:41.487511 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 12:09:41.487627 Normal boot.
462 12:09:41.493635 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 12:09:41.497448 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 12:09:41.500402 CBFS @ c08000 size 3f8000
465 12:09:41.507321 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 12:09:41.510438 CBFS: Locating 'cpu_microcode_blob.bin'
467 12:09:41.514031 CBFS: Found @ offset 14700 size 2ec00
468 12:09:41.517039 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 12:09:41.520578 Skip microcode update
470 12:09:41.527195 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 12:09:41.527293 CBFS @ c08000 size 3f8000
472 12:09:41.533929 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 12:09:41.537301 CBFS: Locating 'fsps.bin'
474 12:09:41.540287 CBFS: Found @ offset d1fc0 size 35000
475 12:09:41.565977 Detected 4 core, 8 thread CPU.
476 12:09:41.568907 Setting up SMI for CPU
477 12:09:41.572149 IED base = 0x9ac00000
478 12:09:41.572238 IED size = 0x00400000
479 12:09:41.575678 Will perform SMM setup.
480 12:09:41.582526 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 12:09:41.588666 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 12:09:41.592462 Processing 16 relocs. Offset value of 0x00030000
483 12:09:41.595633 Attempting to start 7 APs
484 12:09:41.599364 Waiting for 10ms after sending INIT.
485 12:09:41.615753 Waiting for 1st SIPI to complete...done.
486 12:09:41.615881 AP: slot 3 apic_id 1.
487 12:09:41.622385 Waiting for 2nd SIPI to complete...done.
488 12:09:41.622491 AP: slot 4 apic_id 2.
489 12:09:41.625466 AP: slot 1 apic_id 3.
490 12:09:41.628446 AP: slot 2 apic_id 5.
491 12:09:41.628540 AP: slot 5 apic_id 4.
492 12:09:41.632094 AP: slot 7 apic_id 6.
493 12:09:41.635124 AP: slot 6 apic_id 7.
494 12:09:41.641689 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 12:09:41.645543 Processing 13 relocs. Offset value of 0x00038000
496 12:09:41.648465
497 12:09:41.651609 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 12:09:41.658203 Installing SMM handler to 0x9a000000
499 12:09:41.664817 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 12:09:41.668445 Processing 658 relocs. Offset value of 0x9a010000
501 12:09:41.671595
502 12:09:41.678260 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 12:09:41.681814 Processing 13 relocs. Offset value of 0x9a008000
504 12:09:41.687975 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 12:09:41.694568 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 12:09:41.701223 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 12:09:41.705028 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 12:09:41.711099 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 12:09:41.717776 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 12:09:41.721354 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 12:09:41.727900 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 12:09:41.731583 Clearing SMI status registers
513 12:09:41.734647 SMI_STS: PM1
514 12:09:41.734765 PM1_STS: PWRBTN
515 12:09:41.738274 TCO_STS: SECOND_TO
516 12:09:41.741250 New SMBASE 0x9a000000
517 12:09:41.744895 In relocation handler: CPU 0
518 12:09:41.747986 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 12:09:41.751532 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 12:09:41.754443 Relocation complete.
521 12:09:41.758111 New SMBASE 0x99fff400
522 12:09:41.758220 In relocation handler: CPU 3
523 12:09:41.764715 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
524 12:09:41.767745 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 12:09:41.771294 Relocation complete.
526 12:09:41.771394 New SMBASE 0x99fff000
527 12:09:41.774826
528 12:09:41.774926 In relocation handler: CPU 4
529 12:09:41.781166 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
530 12:09:41.784817 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:09:41.787882 Relocation complete.
532 12:09:41.787983 New SMBASE 0x99fffc00
533 12:09:41.791054 In relocation handler: CPU 1
534 12:09:41.797873 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
535 12:09:41.800947 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 12:09:41.804580 Relocation complete.
537 12:09:41.804678 New SMBASE 0x99ffec00
538 12:09:41.807660 In relocation handler: CPU 5
539 12:09:41.811282 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
540 12:09:41.818141 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 12:09:41.820957 Relocation complete.
542 12:09:41.821056 New SMBASE 0x99fff800
543 12:09:41.824550 In relocation handler: CPU 2
544 12:09:41.827567 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
545 12:09:41.834291 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 12:09:41.837952 Relocation complete.
547 12:09:41.838053 New SMBASE 0x99ffe400
548 12:09:41.840847 In relocation handler: CPU 7
549 12:09:41.844387 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
550 12:09:41.850934 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:09:41.851036 Relocation complete.
552 12:09:41.854358 New SMBASE 0x99ffe800
553 12:09:41.857405 In relocation handler: CPU 6
554 12:09:41.861046 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 12:09:41.867936 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:09:41.868041 Relocation complete.
557 12:09:41.870963 Initializing CPU #0
558 12:09:41.873946 CPU: vendor Intel device 806ec
559 12:09:41.877718 CPU: family 06, model 8e, stepping 0c
560 12:09:41.880822 Clearing out pending MCEs
561 12:09:41.884064 Setting up local APIC...
562 12:09:41.884165 apic_id: 0x00 done.
563 12:09:41.887632 Turbo is available but hidden
564 12:09:41.890655 Turbo is available and visible
565 12:09:41.894387 VMX status: enabled
566 12:09:41.897509 IA32_FEATURE_CONTROL status: locked
567 12:09:41.900581 Skip microcode update
568 12:09:41.900679 CPU #0 initialized
569 12:09:41.904135 Initializing CPU #3
570 12:09:41.904244 Initializing CPU #4
571 12:09:41.907137 Initializing CPU #1
572 12:09:41.910740 CPU: vendor Intel device 806ec
573 12:09:41.913743 CPU: family 06, model 8e, stepping 0c
574 12:09:41.917404 CPU: vendor Intel device 806ec
575 12:09:41.920477 CPU: family 06, model 8e, stepping 0c
576 12:09:41.924161 Clearing out pending MCEs
577 12:09:41.927301 Clearing out pending MCEs
578 12:09:41.930692 Setting up local APIC...
579 12:09:41.933700 CPU: vendor Intel device 806ec
580 12:09:41.937439 CPU: family 06, model 8e, stepping 0c
581 12:09:41.937538 Clearing out pending MCEs
582 12:09:41.940469
583 12:09:41.940567 Initializing CPU #7
584 12:09:41.944043 Initializing CPU #6
585 12:09:41.946972 CPU: vendor Intel device 806ec
586 12:09:41.950511 CPU: family 06, model 8e, stepping 0c
587 12:09:41.953611 CPU: vendor Intel device 806ec
588 12:09:41.957195 CPU: family 06, model 8e, stepping 0c
589 12:09:41.960068 Clearing out pending MCEs
590 12:09:41.960165 Clearing out pending MCEs
591 12:09:41.963707 Setting up local APIC...
592 12:09:41.967255 apic_id: 0x03 done.
593 12:09:41.970088 Setting up local APIC...
594 12:09:41.970183 Setting up local APIC...
595 12:09:41.973568 Initializing CPU #2
596 12:09:41.976672 Initializing CPU #5
597 12:09:41.980343 CPU: vendor Intel device 806ec
598 12:09:41.983370 CPU: family 06, model 8e, stepping 0c
599 12:09:41.987098 CPU: vendor Intel device 806ec
600 12:09:41.990132 CPU: family 06, model 8e, stepping 0c
601 12:09:41.993170 Clearing out pending MCEs
602 12:09:41.993266 Clearing out pending MCEs
603 12:09:41.996837 Setting up local APIC...
604 12:09:41.999912 Setting up local APIC...
605 12:09:42.003473 Setting up local APIC...
606 12:09:42.003569 apic_id: 0x07 done.
607 12:09:42.006484 apic_id: 0x06 done.
608 12:09:42.010199 VMX status: enabled
609 12:09:42.010320 VMX status: enabled
610 12:09:42.013271 IA32_FEATURE_CONTROL status: locked
611 12:09:42.016369 IA32_FEATURE_CONTROL status: locked
612 12:09:42.020099 Skip microcode update
613 12:09:42.023188 Skip microcode update
614 12:09:42.023285 CPU #6 initialized
615 12:09:42.026268 CPU #7 initialized
616 12:09:42.029823 apic_id: 0x04 done.
617 12:09:42.029918 apic_id: 0x05 done.
618 12:09:42.032860 VMX status: enabled
619 12:09:42.032956 VMX status: enabled
620 12:09:42.039534 IA32_FEATURE_CONTROL status: locked
621 12:09:42.043123 IA32_FEATURE_CONTROL status: locked
622 12:09:42.043218 Skip microcode update
623 12:09:42.046621 Skip microcode update
624 12:09:42.049614 CPU #5 initialized
625 12:09:42.049712 apic_id: 0x01 done.
626 12:09:42.053178 CPU #2 initialized
627 12:09:42.053275 VMX status: enabled
628 12:09:42.056098 apic_id: 0x02 done.
629 12:09:42.059813 IA32_FEATURE_CONTROL status: locked
630 12:09:42.062730 VMX status: enabled
631 12:09:42.062836 Skip microcode update
632 12:09:42.069471 IA32_FEATURE_CONTROL status: locked
633 12:09:42.069572 CPU #1 initialized
634 12:09:42.073015 Skip microcode update
635 12:09:42.073112 VMX status: enabled
636 12:09:42.075992 CPU #4 initialized
637 12:09:42.079586 IA32_FEATURE_CONTROL status: locked
638 12:09:42.082626 Skip microcode update
639 12:09:42.082723 CPU #3 initialized
640 12:09:42.089479 bsp_do_flight_plan done after 465 msecs.
641 12:09:42.092625 CPU: frequency set to 4200 MHz
642 12:09:42.092722 Enabling SMIs.
643 12:09:42.095686 Locking SMM.
644 12:09:42.109109 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
645 12:09:42.112808 CBFS @ c08000 size 3f8000
646 12:09:42.119433 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
647 12:09:42.119531 CBFS: Locating 'vbt.bin'
648 12:09:42.122556 CBFS: Found @ offset 5f5c0 size 499
649 12:09:42.129139 Found a VBT of 4608 bytes after decompression
650 12:09:42.311997 Display FSP Version Info HOB
651 12:09:42.315065 Reference Code - CPU = 9.0.1e.30
652 12:09:42.318674 uCode Version = 0.0.0.ca
653 12:09:42.321711 TXT ACM version = ff.ff.ff.ffff
654 12:09:42.324863 Display FSP Version Info HOB
655 12:09:42.328560 Reference Code - ME = 9.0.1e.30
656 12:09:42.331971 MEBx version = 0.0.0.0
657 12:09:42.335127 ME Firmware Version = Consumer SKU
658 12:09:42.338081 Display FSP Version Info HOB
659 12:09:42.341772 Reference Code - CML PCH = 9.0.1e.30
660 12:09:42.344659 PCH-CRID Status = Disabled
661 12:09:42.348308 PCH-CRID Original Value = ff.ff.ff.ffff
662 12:09:42.351951 PCH-CRID New Value = ff.ff.ff.ffff
663 12:09:42.354714 OPROM - RST - RAID = ff.ff.ff.ffff
664 12:09:42.358634 ChipsetInit Base Version = ff.ff.ff.ffff
665 12:09:42.361434 ChipsetInit Oem Version = ff.ff.ff.ffff
666 12:09:42.365114 Display FSP Version Info HOB
667 12:09:42.371758 Reference Code - SA - System Agent = 9.0.1e.30
668 12:09:42.374748 Reference Code - MRC = 0.7.1.6c
669 12:09:42.374847 SA - PCIe Version = 9.0.1e.30
670 12:09:42.378343 SA-CRID Status = Disabled
671 12:09:42.381350 SA-CRID Original Value = 0.0.0.c
672 12:09:42.384947 SA-CRID New Value = 0.0.0.c
673 12:09:42.387887 OPROM - VBIOS = ff.ff.ff.ffff
674 12:09:42.391402 RTC Init
675 12:09:42.394469 Set power on after power failure.
676 12:09:42.394564 Disabling Deep S3
677 12:09:42.398242 Disabling Deep S3
678 12:09:42.398328 Disabling Deep S4
679 12:09:42.401082 Disabling Deep S4
680 12:09:42.401166 Disabling Deep S5
681 12:09:42.404140
682 12:09:42.404225 Disabling Deep S5
683 12:09:42.410933 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
684 12:09:42.411022 Enumerating buses...
685 12:09:42.417747 Show all devs... Before device enumeration.
686 12:09:42.417838 Root Device: enabled 1
687 12:09:42.420918 CPU_CLUSTER: 0: enabled 1
688 12:09:42.424151 DOMAIN: 0000: enabled 1
689 12:09:42.427648 APIC: 00: enabled 1
690 12:09:42.427745 PCI: 00:00.0: enabled 1
691 12:09:42.430729 PCI: 00:02.0: enabled 1
692 12:09:42.434352 PCI: 00:04.0: enabled 0
693 12:09:42.437893 PCI: 00:05.0: enabled 0
694 12:09:42.437989 PCI: 00:12.0: enabled 1
695 12:09:42.440936 PCI: 00:12.5: enabled 0
696 12:09:42.444555 PCI: 00:12.6: enabled 0
697 12:09:42.444646 PCI: 00:14.0: enabled 1
698 12:09:42.447482 PCI: 00:14.1: enabled 0
699 12:09:42.451090 PCI: 00:14.3: enabled 1
700 12:09:42.453992 PCI: 00:14.5: enabled 0
701 12:09:42.454110 PCI: 00:15.0: enabled 1
702 12:09:42.457681 PCI: 00:15.1: enabled 1
703 12:09:42.460984 PCI: 00:15.2: enabled 0
704 12:09:42.464369 PCI: 00:15.3: enabled 0
705 12:09:42.464458 PCI: 00:16.0: enabled 1
706 12:09:42.467451 PCI: 00:16.1: enabled 0
707 12:09:42.470990 PCI: 00:16.2: enabled 0
708 12:09:42.473913 PCI: 00:16.3: enabled 0
709 12:09:42.474000 PCI: 00:16.4: enabled 0
710 12:09:42.477635 PCI: 00:16.5: enabled 0
711 12:09:42.480481 PCI: 00:17.0: enabled 1
712 12:09:42.480570 PCI: 00:19.0: enabled 1
713 12:09:42.484178
714 12:09:42.484270 PCI: 00:19.1: enabled 0
715 12:09:42.487317 PCI: 00:19.2: enabled 0
716 12:09:42.490748 PCI: 00:1a.0: enabled 0
717 12:09:42.490844 PCI: 00:1c.0: enabled 0
718 12:09:42.493996 PCI: 00:1c.1: enabled 0
719 12:09:42.497401 PCI: 00:1c.2: enabled 0
720 12:09:42.500554 PCI: 00:1c.3: enabled 0
721 12:09:42.500642 PCI: 00:1c.4: enabled 0
722 12:09:42.504089 PCI: 00:1c.5: enabled 0
723 12:09:42.507151 PCI: 00:1c.6: enabled 0
724 12:09:42.510308 PCI: 00:1c.7: enabled 0
725 12:09:42.510392 PCI: 00:1d.0: enabled 1
726 12:09:42.513901 PCI: 00:1d.1: enabled 0
727 12:09:42.517056 PCI: 00:1d.2: enabled 0
728 12:09:42.520177 PCI: 00:1d.3: enabled 0
729 12:09:42.520265 PCI: 00:1d.4: enabled 0
730 12:09:42.523797 PCI: 00:1d.5: enabled 1
731 12:09:42.526864 PCI: 00:1e.0: enabled 1
732 12:09:42.526952 PCI: 00:1e.1: enabled 0
733 12:09:42.530082 PCI: 00:1e.2: enabled 1
734 12:09:42.533648 PCI: 00:1e.3: enabled 1
735 12:09:42.537237 PCI: 00:1f.0: enabled 1
736 12:09:42.537319 PCI: 00:1f.1: enabled 1
737 12:09:42.540107 PCI: 00:1f.2: enabled 1
738 12:09:42.543744 PCI: 00:1f.3: enabled 1
739 12:09:42.547369 PCI: 00:1f.4: enabled 1
740 12:09:42.547465 PCI: 00:1f.5: enabled 1
741 12:09:42.550333 PCI: 00:1f.6: enabled 0
742 12:09:42.554063 USB0 port 0: enabled 1
743 12:09:42.554160 I2C: 00:15: enabled 1
744 12:09:42.557001 I2C: 00:5d: enabled 1
745 12:09:42.560572 GENERIC: 0.0: enabled 1
746 12:09:42.560670 I2C: 00:1a: enabled 1
747 12:09:42.563626
748 12:09:42.563721 I2C: 00:38: enabled 1
749 12:09:42.567333 I2C: 00:39: enabled 1
750 12:09:42.570324 I2C: 00:3a: enabled 1
751 12:09:42.570420 I2C: 00:3b: enabled 1
752 12:09:42.573936 PCI: 00:00.0: enabled 1
753 12:09:42.574032 SPI: 00: enabled 1
754 12:09:42.577345
755 12:09:42.577440 SPI: 01: enabled 1
756 12:09:42.580365 PNP: 0c09.0: enabled 1
757 12:09:42.580461 USB2 port 0: enabled 1
758 12:09:42.583803
759 12:09:42.583936 USB2 port 1: enabled 1
760 12:09:42.586756 USB2 port 2: enabled 0
761 12:09:42.590441 USB2 port 3: enabled 0
762 12:09:42.590536 USB2 port 5: enabled 0
763 12:09:42.593452 USB2 port 6: enabled 1
764 12:09:42.597105 USB2 port 9: enabled 1
765 12:09:42.597201 USB3 port 0: enabled 1
766 12:09:42.600187 USB3 port 1: enabled 1
767 12:09:42.603801 USB3 port 2: enabled 1
768 12:09:42.606862 USB3 port 3: enabled 1
769 12:09:42.606958 USB3 port 4: enabled 0
770 12:09:42.609884 APIC: 03: enabled 1
771 12:09:42.609980 APIC: 05: enabled 1
772 12:09:42.613548
773 12:09:42.613648 APIC: 01: enabled 1
774 12:09:42.616632 APIC: 02: enabled 1
775 12:09:42.616728 APIC: 04: enabled 1
776 12:09:42.620281 APIC: 07: enabled 1
777 12:09:42.623380 APIC: 06: enabled 1
778 12:09:42.623476 Compare with tree...
779 12:09:42.626451 Root Device: enabled 1
780 12:09:42.630165 CPU_CLUSTER: 0: enabled 1
781 12:09:42.630261 APIC: 00: enabled 1
782 12:09:42.633230 APIC: 03: enabled 1
783 12:09:42.636908 APIC: 05: enabled 1
784 12:09:42.637004 APIC: 01: enabled 1
785 12:09:42.639835 APIC: 02: enabled 1
786 12:09:42.643392 APIC: 04: enabled 1
787 12:09:42.643487 APIC: 07: enabled 1
788 12:09:42.646400
789 12:09:42.646496 APIC: 06: enabled 1
790 12:09:42.650092 DOMAIN: 0000: enabled 1
791 12:09:42.653290 PCI: 00:00.0: enabled 1
792 12:09:42.656260 PCI: 00:02.0: enabled 1
793 12:09:42.656356 PCI: 00:04.0: enabled 0
794 12:09:42.659902 PCI: 00:05.0: enabled 0
795 12:09:42.663052 PCI: 00:12.0: enabled 1
796 12:09:42.666596 PCI: 00:12.5: enabled 0
797 12:09:42.666702 PCI: 00:12.6: enabled 0
798 12:09:42.669655 PCI: 00:14.0: enabled 1
799 12:09:42.673373 USB0 port 0: enabled 1
800 12:09:42.676300 USB2 port 0: enabled 1
801 12:09:42.679973 USB2 port 1: enabled 1
802 12:09:42.682775 USB2 port 2: enabled 0
803 12:09:42.682872 USB2 port 3: enabled 0
804 12:09:42.686379 USB2 port 5: enabled 0
805 12:09:42.690028 USB2 port 6: enabled 1
806 12:09:42.693157 USB2 port 9: enabled 1
807 12:09:42.696150 USB3 port 0: enabled 1
808 12:09:42.696245 USB3 port 1: enabled 1
809 12:09:42.699741 USB3 port 2: enabled 1
810 12:09:42.702728 USB3 port 3: enabled 1
811 12:09:42.706490 USB3 port 4: enabled 0
812 12:09:42.709473 PCI: 00:14.1: enabled 0
813 12:09:42.709569 PCI: 00:14.3: enabled 1
814 12:09:42.713284
815 12:09:42.713380 PCI: 00:14.5: enabled 0
816 12:09:42.716393 PCI: 00:15.0: enabled 1
817 12:09:42.719415 I2C: 00:15: enabled 1
818 12:09:42.723098 PCI: 00:15.1: enabled 1
819 12:09:42.723202 I2C: 00:5d: enabled 1
820 12:09:42.726160 GENERIC: 0.0: enabled 1
821 12:09:42.729845 PCI: 00:15.2: enabled 0
822 12:09:42.732817 PCI: 00:15.3: enabled 0
823 12:09:42.736459 PCI: 00:16.0: enabled 1
824 12:09:42.736557 PCI: 00:16.1: enabled 0
825 12:09:42.739471 PCI: 00:16.2: enabled 0
826 12:09:42.742506 PCI: 00:16.3: enabled 0
827 12:09:42.746074 PCI: 00:16.4: enabled 0
828 12:09:42.749359 PCI: 00:16.5: enabled 0
829 12:09:42.749455 PCI: 00:17.0: enabled 1
830 12:09:42.752892 PCI: 00:19.0: enabled 1
831 12:09:42.755944 I2C: 00:1a: enabled 1
832 12:09:42.759630 I2C: 00:38: enabled 1
833 12:09:42.759725 I2C: 00:39: enabled 1
834 12:09:42.762707 I2C: 00:3a: enabled 1
835 12:09:42.766275 I2C: 00:3b: enabled 1
836 12:09:42.769216 PCI: 00:19.1: enabled 0
837 12:09:42.772748 PCI: 00:19.2: enabled 0
838 12:09:42.772845 PCI: 00:1a.0: enabled 0
839 12:09:42.775802 PCI: 00:1c.0: enabled 0
840 12:09:42.779350 PCI: 00:1c.1: enabled 0
841 12:09:42.782373 PCI: 00:1c.2: enabled 0
842 12:09:42.782468 PCI: 00:1c.3: enabled 0
843 12:09:42.785906
844 12:09:42.786016 PCI: 00:1c.4: enabled 0
845 12:09:42.788966 PCI: 00:1c.5: enabled 0
846 12:09:42.792557 PCI: 00:1c.6: enabled 0
847 12:09:42.795658 PCI: 00:1c.7: enabled 0
848 12:09:42.795754 PCI: 00:1d.0: enabled 1
849 12:09:42.799334 PCI: 00:1d.1: enabled 0
850 12:09:42.802423 PCI: 00:1d.2: enabled 0
851 12:09:42.805990 PCI: 00:1d.3: enabled 0
852 12:09:42.809076 PCI: 00:1d.4: enabled 0
853 12:09:42.809173 PCI: 00:1d.5: enabled 1
854 12:09:42.812877 PCI: 00:00.0: enabled 1
855 12:09:42.815821 PCI: 00:1e.0: enabled 1
856 12:09:42.818972 PCI: 00:1e.1: enabled 0
857 12:09:42.822035 PCI: 00:1e.2: enabled 1
858 12:09:42.822134 SPI: 00: enabled 1
859 12:09:42.825654 PCI: 00:1e.3: enabled 1
860 12:09:42.829389 SPI: 01: enabled 1
861 12:09:42.832430 PCI: 00:1f.0: enabled 1
862 12:09:42.832528 PNP: 0c09.0: enabled 1
863 12:09:42.835478 PCI: 00:1f.1: enabled 1
864 12:09:42.839043 PCI: 00:1f.2: enabled 1
865 12:09:42.842082 PCI: 00:1f.3: enabled 1
866 12:09:42.842186 PCI: 00:1f.4: enabled 1
867 12:09:42.845834
868 12:09:42.845932 PCI: 00:1f.5: enabled 1
869 12:09:42.848777 PCI: 00:1f.6: enabled 0
870 12:09:42.852031 Root Device scanning...
871 12:09:42.855683 scan_static_bus for Root Device
872 12:09:42.858754 CPU_CLUSTER: 0 enabled
873 12:09:42.858854 DOMAIN: 0000 enabled
874 12:09:42.862416 DOMAIN: 0000 scanning...
875 12:09:42.865303 PCI: pci_scan_bus for bus 00
876 12:09:42.868833 PCI: 00:00.0 [8086/0000] ops
877 12:09:42.871951 PCI: 00:00.0 [8086/9b61] enabled
878 12:09:42.875612 PCI: 00:02.0 [8086/0000] bus ops
879 12:09:42.878640 PCI: 00:02.0 [8086/9b41] enabled
880 12:09:42.882247 PCI: 00:04.0 [8086/1903] disabled
881 12:09:42.885374 PCI: 00:08.0 [8086/1911] enabled
882 12:09:42.888962 PCI: 00:12.0 [8086/02f9] enabled
883 12:09:42.891883 PCI: 00:14.0 [8086/0000] bus ops
884 12:09:42.895595 PCI: 00:14.0 [8086/02ed] enabled
885 12:09:42.898497 PCI: 00:14.2 [8086/02ef] enabled
886 12:09:42.902049 PCI: 00:14.3 [8086/02f0] enabled
887 12:09:42.905660 PCI: 00:15.0 [8086/0000] bus ops
888 12:09:42.908778 PCI: 00:15.0 [8086/02e8] enabled
889 12:09:42.911801 PCI: 00:15.1 [8086/0000] bus ops
890 12:09:42.915616 PCI: 00:15.1 [8086/02e9] enabled
891 12:09:42.918648 PCI: 00:16.0 [8086/0000] ops
892 12:09:42.922308 PCI: 00:16.0 [8086/02e0] enabled
893 12:09:42.925398 PCI: 00:17.0 [8086/0000] ops
894 12:09:42.929065 PCI: 00:17.0 [8086/02d3] enabled
895 12:09:42.932093 PCI: 00:19.0 [8086/0000] bus ops
896 12:09:42.935218 PCI: 00:19.0 [8086/02c5] enabled
897 12:09:42.938893 PCI: 00:1d.0 [8086/0000] bus ops
898 12:09:42.941937 PCI: 00:1d.0 [8086/02b0] enabled
899 12:09:42.945450 PCI: Static device PCI: 00:1d.5 not found, disabling it.
900 12:09:42.948440 PCI: 00:1e.0 [8086/0000] ops
901 12:09:42.951986 PCI: 00:1e.0 [8086/02a8] enabled
902 12:09:42.955114 PCI: 00:1e.2 [8086/0000] bus ops
903 12:09:42.958801 PCI: 00:1e.2 [8086/02aa] enabled
904 12:09:42.961749 PCI: 00:1e.3 [8086/0000] bus ops
905 12:09:42.965284 PCI: 00:1e.3 [8086/02ab] enabled
906 12:09:42.968450 PCI: 00:1f.0 [8086/0000] bus ops
907 12:09:42.972108 PCI: 00:1f.0 [8086/0284] enabled
908 12:09:42.978307 PCI: Static device PCI: 00:1f.1 not found, disabling it.
909 12:09:42.984863 PCI: Static device PCI: 00:1f.2 not found, disabling it.
910 12:09:42.988450 PCI: 00:1f.3 [8086/0000] bus ops
911 12:09:42.991535 PCI: 00:1f.3 [8086/02c8] enabled
912 12:09:42.995164 PCI: 00:1f.4 [8086/0000] bus ops
913 12:09:42.998329 PCI: 00:1f.4 [8086/02a3] enabled
914 12:09:43.001873 PCI: 00:1f.5 [8086/0000] bus ops
915 12:09:43.004917 PCI: 00:1f.5 [8086/02a4] enabled
916 12:09:43.008529 PCI: Leftover static devices:
917 12:09:43.008624 PCI: 00:05.0
918 12:09:43.008699 PCI: 00:12.5
919 12:09:43.011623 PCI: 00:12.6
920 12:09:43.011710 PCI: 00:14.1
921 12:09:43.014767 PCI: 00:14.5
922 12:09:43.014863 PCI: 00:15.2
923 12:09:43.014939 PCI: 00:15.3
924 12:09:43.018429 PCI: 00:16.1
925 12:09:43.018525 PCI: 00:16.2
926 12:09:43.021666 PCI: 00:16.3
927 12:09:43.021760 PCI: 00:16.4
928 12:09:43.024646 PCI: 00:16.5
929 12:09:43.024742 PCI: 00:19.1
930 12:09:43.024817 PCI: 00:19.2
931 12:09:43.028403 PCI: 00:1a.0
932 12:09:43.028509 PCI: 00:1c.0
933 12:09:43.031509 PCI: 00:1c.1
934 12:09:43.031605 PCI: 00:1c.2
935 12:09:43.031680 PCI: 00:1c.3
936 12:09:43.035115 PCI: 00:1c.4
937 12:09:43.035216 PCI: 00:1c.5
938 12:09:43.038170 PCI: 00:1c.6
939 12:09:43.038275 PCI: 00:1c.7
940 12:09:43.038351 PCI: 00:1d.1
941 12:09:43.041318 PCI: 00:1d.2
942 12:09:43.041413 PCI: 00:1d.3
943 12:09:43.044866 PCI: 00:1d.4
944 12:09:43.044960 PCI: 00:1d.5
945 12:09:43.047942 PCI: 00:1e.1
946 12:09:43.048059 PCI: 00:1f.1
947 12:09:43.048138 PCI: 00:1f.2
948 12:09:43.051491 PCI: 00:1f.6
949 12:09:43.054670 PCI: Check your devicetree.cb.
950 12:09:43.054772 PCI: 00:02.0 scanning...
951 12:09:43.058294 scan_generic_bus for PCI: 00:02.0
952 12:09:43.061984
953 12:09:43.064880 scan_generic_bus for PCI: 00:02.0 done
954 12:09:43.068626 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
955 12:09:43.071481 PCI: 00:14.0 scanning...
956 12:09:43.075101 scan_static_bus for PCI: 00:14.0
957 12:09:43.078032 USB0 port 0 enabled
958 12:09:43.081786 USB0 port 0 scanning...
959 12:09:43.084679 scan_static_bus for USB0 port 0
960 12:09:43.084800 USB2 port 0 enabled
961 12:09:43.088407 USB2 port 1 enabled
962 12:09:43.091499 USB2 port 2 disabled
963 12:09:43.091597 USB2 port 3 disabled
964 12:09:43.094914 USB2 port 5 disabled
965 12:09:43.095010 USB2 port 6 enabled
966 12:09:43.097892 USB2 port 9 enabled
967 12:09:43.101515 USB3 port 0 enabled
968 12:09:43.101612 USB3 port 1 enabled
969 12:09:43.104544 USB3 port 2 enabled
970 12:09:43.107927 USB3 port 3 enabled
971 12:09:43.108024 USB3 port 4 disabled
972 12:09:43.111520 USB2 port 0 scanning...
973 12:09:43.114672 scan_static_bus for USB2 port 0
974 12:09:43.117734 scan_static_bus for USB2 port 0 done
975 12:09:43.124501 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
976 12:09:43.124603 USB2 port 1 scanning...
977 12:09:43.127679
978 12:09:43.130701 scan_static_bus for USB2 port 1
979 12:09:43.134433 scan_static_bus for USB2 port 1 done
980 12:09:43.137427 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
981 12:09:43.140560 USB2 port 6 scanning...
982 12:09:43.144260 scan_static_bus for USB2 port 6
983 12:09:43.147665 scan_static_bus for USB2 port 6 done
984 12:09:43.154402 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
985 12:09:43.157350 USB2 port 9 scanning...
986 12:09:43.161064 scan_static_bus for USB2 port 9
987 12:09:43.164123 scan_static_bus for USB2 port 9 done
988 12:09:43.167138 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
989 12:09:43.170993 USB3 port 0 scanning...
990 12:09:43.173823 scan_static_bus for USB3 port 0
991 12:09:43.177500 scan_static_bus for USB3 port 0 done
992 12:09:43.184250 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
993 12:09:43.187446 USB3 port 1 scanning...
994 12:09:43.190429 scan_static_bus for USB3 port 1
995 12:09:43.193853 scan_static_bus for USB3 port 1 done
996 12:09:43.197049 scan_bus: scanning of bus USB3 port 1 took 9692 usecs
997 12:09:43.200629 USB3 port 2 scanning...
998 12:09:43.203640 scan_static_bus for USB3 port 2
999 12:09:43.207256 scan_static_bus for USB3 port 2 done
1000 12:09:43.214012 scan_bus: scanning of bus USB3 port 2 took 9692 usecs
1001 12:09:43.217239 USB3 port 3 scanning...
1002 12:09:43.220217 scan_static_bus for USB3 port 3
1003 12:09:43.223937 scan_static_bus for USB3 port 3 done
1004 12:09:43.227072 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
1005 12:09:43.233779 scan_static_bus for USB0 port 0 done
1006 12:09:43.236690 scan_bus: scanning of bus USB0 port 0 took 155383 usecs
1007 12:09:43.240523 scan_static_bus for PCI: 00:14.0 done
1008 12:09:43.246640 scan_bus: scanning of bus PCI: 00:14.0 took 173008 usecs
1009 12:09:43.250458 PCI: 00:15.0 scanning...
1010 12:09:43.253355 scan_generic_bus for PCI: 00:15.0
1011 12:09:43.257008 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1012 12:09:43.259983 scan_generic_bus for PCI: 00:15.0 done
1013 12:09:43.266735 scan_bus: scanning of bus PCI: 00:15.0 took 14311 usecs
1014 12:09:43.269846 PCI: 00:15.1 scanning...
1015 12:09:43.273565 scan_generic_bus for PCI: 00:15.1
1016 12:09:43.276511 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1017 12:09:43.280073 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1018 12:09:43.283699
1019 12:09:43.286721 scan_generic_bus for PCI: 00:15.1 done
1020 12:09:43.290312 scan_bus: scanning of bus PCI: 00:15.1 took 18653 usecs
1021 12:09:43.293239 PCI: 00:19.0 scanning...
1022 12:09:43.296274 scan_generic_bus for PCI: 00:19.0
1023 12:09:43.300020 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1024 12:09:43.306614 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1025 12:09:43.309765 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1026 12:09:43.312956 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1027 12:09:43.316495 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1028 12:09:43.322831 scan_generic_bus for PCI: 00:19.0 done
1029 12:09:43.326562 scan_bus: scanning of bus PCI: 00:19.0 took 30746 usecs
1030 12:09:43.329485 PCI: 00:1d.0 scanning...
1031 12:09:43.333110 do_pci_scan_bridge for PCI: 00:1d.0
1032 12:09:43.336293 PCI: pci_scan_bus for bus 01
1033 12:09:43.339524 PCI: 01:00.0 [1c5c/1327] enabled
1034 12:09:43.342680 Enabling Common Clock Configuration
1035 12:09:43.349404 L1 Sub-State supported from root port 29
1036 12:09:43.349510 L1 Sub-State Support = 0xf
1037 12:09:43.352921 CommonModeRestoreTime = 0x28
1038 12:09:43.359767 Power On Value = 0x16, Power On Scale = 0x0
1039 12:09:43.359866 ASPM: Enabled L1
1040 12:09:43.366443 scan_bus: scanning of bus PCI: 00:1d.0 took 32803 usecs
1041 12:09:43.369486 PCI: 00:1e.2 scanning...
1042 12:09:43.372513 scan_generic_bus for PCI: 00:1e.2
1043 12:09:43.376197 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1044 12:09:43.379681 scan_generic_bus for PCI: 00:1e.2 done
1045 12:09:43.386205 scan_bus: scanning of bus PCI: 00:1e.2 took 14020 usecs
1046 12:09:43.386308 PCI: 00:1e.3 scanning...
1047 12:09:43.389226 scan_generic_bus for PCI: 00:1e.3
1048 12:09:43.392722
1049 12:09:43.396323 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1050 12:09:43.399269 scan_generic_bus for PCI: 00:1e.3 done
1051 12:09:43.402901 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1052 12:09:43.406011 PCI: 00:1f.0 scanning...
1053 12:09:43.409652 scan_static_bus for PCI: 00:1f.0
1054 12:09:43.412634 PNP: 0c09.0 enabled
1055 12:09:43.415751 scan_static_bus for PCI: 00:1f.0 done
1056 12:09:43.422481 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1057 12:09:43.426102 PCI: 00:1f.3 scanning...
1058 12:09:43.429148 scan_bus: scanning of bus PCI: 00:1f.3 took 2863 usecs
1059 12:09:43.432219 PCI: 00:1f.4 scanning...
1060 12:09:43.435950 scan_generic_bus for PCI: 00:1f.4
1061 12:09:43.438927 scan_generic_bus for PCI: 00:1f.4 done
1062 12:09:43.445657 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1063 12:09:43.449311 PCI: 00:1f.5 scanning...
1064 12:09:43.452377 scan_generic_bus for PCI: 00:1f.5
1065 12:09:43.455408 scan_generic_bus for PCI: 00:1f.5 done
1066 12:09:43.462544 scan_bus: scanning of bus PCI: 00:1f.5 took 10200 usecs
1067 12:09:43.468929 scan_bus: scanning of bus DOMAIN: 0000 took 605186 usecs
1068 12:09:43.472008 scan_static_bus for Root Device done
1069 12:09:43.475678 scan_bus: scanning of bus Root Device took 625061 usecs
1070 12:09:43.478684 done
1071 12:09:43.478790 Chrome EC: UHEPI supported
1072 12:09:43.482255
1073 12:09:43.485662 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1074 12:09:43.492273 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1075 12:09:43.498853 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1076 12:09:43.505272 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1077 12:09:43.508950 SPI flash protection: WPSW=0 SRP0=0
1078 12:09:43.515132 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1079 12:09:43.518703 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1080 12:09:43.521748 found VGA at PCI: 00:02.0
1081 12:09:43.524975 Setting up VGA for PCI: 00:02.0
1082 12:09:43.531748 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1083 12:09:43.535408 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1084 12:09:43.538392 Allocating resources...
1085 12:09:43.538488 Reading resources...
1086 12:09:43.545094 Root Device read_resources bus 0 link: 0
1087 12:09:43.548196 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1088 12:09:43.554864 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1089 12:09:43.558624 DOMAIN: 0000 read_resources bus 0 link: 0
1090 12:09:43.565339 PCI: 00:14.0 read_resources bus 0 link: 0
1091 12:09:43.568435 USB0 port 0 read_resources bus 0 link: 0
1092 12:09:43.576279 USB0 port 0 read_resources bus 0 link: 0 done
1093 12:09:43.579822 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 12:09:43.587014 PCI: 00:15.0 read_resources bus 1 link: 0
1095 12:09:43.590686 PCI: 00:15.0 read_resources bus 1 link: 0 done
1096 12:09:43.596782 PCI: 00:15.1 read_resources bus 2 link: 0
1097 12:09:43.600260 PCI: 00:15.1 read_resources bus 2 link: 0 done
1098 12:09:43.607906 PCI: 00:19.0 read_resources bus 3 link: 0
1099 12:09:43.614622 PCI: 00:19.0 read_resources bus 3 link: 0 done
1100 12:09:43.617489 PCI: 00:1d.0 read_resources bus 1 link: 0
1101 12:09:43.624182 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1102 12:09:43.627853 PCI: 00:1e.2 read_resources bus 4 link: 0
1103 12:09:43.634620 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1104 12:09:43.637799 PCI: 00:1e.3 read_resources bus 5 link: 0
1105 12:09:43.644489 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1106 12:09:43.647535 PCI: 00:1f.0 read_resources bus 0 link: 0
1107 12:09:43.654308 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1108 12:09:43.660905 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 12:09:43.663957 Root Device read_resources bus 0 link: 0 done
1110 12:09:43.667570 Done reading resources.
1111 12:09:43.670553 Show resources in subtree (Root Device)...After reading.
1112 12:09:43.674107
1113 12:09:43.677192 Root Device child on link 0 CPU_CLUSTER: 0
1114 12:09:43.680856 CPU_CLUSTER: 0 child on link 0 APIC: 00
1115 12:09:43.680953 APIC: 00
1116 12:09:43.684289 APIC: 03
1117 12:09:43.684386 APIC: 05
1118 12:09:43.687165 APIC: 01
1119 12:09:43.687263 APIC: 02
1120 12:09:43.687340 APIC: 04
1121 12:09:43.690742 APIC: 07
1122 12:09:43.690846 APIC: 06
1123 12:09:43.693851 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1124 12:09:43.704104 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1125 12:09:43.759973 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1126 12:09:43.760089 PCI: 00:00.0
1127 12:09:43.760799 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1128 12:09:43.760896 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1129 12:09:43.761170 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1130 12:09:43.761253 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1131 12:09:43.803863 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1132 12:09:43.804179 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1133 12:09:43.804456 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1134 12:09:43.804535 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1135 12:09:43.804804 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1136 12:09:43.807902 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1137 12:09:43.818294 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1138 12:09:43.827977 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1139 12:09:43.837767 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1140 12:09:43.848236 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1141 12:09:43.857954 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1142 12:09:43.867784 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1143 12:09:43.867888 PCI: 00:02.0
1144 12:09:43.877376 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:09:43.887570 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1146 12:09:43.897100 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1147 12:09:43.897209 PCI: 00:04.0
1148 12:09:43.900837 PCI: 00:08.0
1149 12:09:43.911015 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 12:09:43.911118 PCI: 00:12.0
1151 12:09:43.920281 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 12:09:43.926978 PCI: 00:14.0 child on link 0 USB0 port 0
1153 12:09:43.936919 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1154 12:09:43.940167 USB0 port 0 child on link 0 USB2 port 0
1155 12:09:43.943792 USB2 port 0
1156 12:09:43.943915 USB2 port 1
1157 12:09:43.946857 USB2 port 2
1158 12:09:43.946958 USB2 port 3
1159 12:09:43.950570 USB2 port 5
1160 12:09:43.950670 USB2 port 6
1161 12:09:43.953620 USB2 port 9
1162 12:09:43.953717 USB3 port 0
1163 12:09:43.956697 USB3 port 1
1164 12:09:43.956794 USB3 port 2
1165 12:09:43.960332 USB3 port 3
1166 12:09:43.960430 USB3 port 4
1167 12:09:43.963421 PCI: 00:14.2
1168 12:09:43.973635 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1169 12:09:43.983369 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 12:09:43.983477 PCI: 00:14.3
1171 12:09:43.993029 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 12:09:43.999852 PCI: 00:15.0 child on link 0 I2C: 01:15
1173 12:09:44.010051 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 12:09:44.010184 I2C: 01:15
1175 12:09:44.012820 PCI: 00:15.1 child on link 0 I2C: 02:5d
1176 12:09:44.022797 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 12:09:44.026493 I2C: 02:5d
1178 12:09:44.026598 GENERIC: 0.0
1179 12:09:44.029624 PCI: 00:16.0
1180 12:09:44.039373 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:09:44.039484 PCI: 00:17.0
1182 12:09:44.042928
1183 12:09:44.049096 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1184 12:09:44.059471 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1185 12:09:44.066171 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1186 12:09:44.075888 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1187 12:09:44.082591 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1188 12:09:44.085575
1189 12:09:44.092126 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 12:09:44.098710 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 12:09:44.108942 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:09:44.109070 I2C: 03:1a
1193 12:09:44.109151 I2C: 03:38
1194 12:09:44.111993 I2C: 03:39
1195 12:09:44.112092 I2C: 03:3a
1196 12:09:44.115664 I2C: 03:3b
1197 12:09:44.118625 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 12:09:44.128408 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 12:09:44.138975 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 12:09:44.148846 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 12:09:44.148986 PCI: 01:00.0
1202 12:09:44.158617 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:09:44.161712 PCI: 00:1e.0
1204 12:09:44.172240 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 12:09:44.181883 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 12:09:44.184996 PCI: 00:1e.2 child on link 0 SPI: 00
1207 12:09:44.195183 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:09:44.195319 SPI: 00
1209 12:09:44.201786 PCI: 00:1e.3 child on link 0 SPI: 01
1210 12:09:44.211741 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:09:44.211877 SPI: 01
1212 12:09:44.214724 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 12:09:44.224890 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 12:09:44.234475 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 12:09:44.234603 PNP: 0c09.0
1216 12:09:44.244915 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:09:44.245039 PCI: 00:1f.3
1218 12:09:44.254736 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:09:44.264586 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 12:09:44.268143 PCI: 00:1f.4
1221 12:09:44.277978 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 12:09:44.287578 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 12:09:44.287719 PCI: 00:1f.5
1224 12:09:44.298001 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 12:09:44.304024 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 12:09:44.310714 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 12:09:44.317410 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 12:09:44.320873 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 12:09:44.323998 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 12:09:44.327399 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 12:09:44.330896 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 12:09:44.337489 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 12:09:44.344282 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 12:09:44.354084 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 12:09:44.360876 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 12:09:44.366957 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 12:09:44.370633 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 12:09:44.380467 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 12:09:44.383994 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 12:09:44.390162 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 12:09:44.393996 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 12:09:44.400450 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 12:09:44.403495 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 12:09:44.406565 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 12:09:44.413246 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 12:09:44.416837 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 12:09:44.423222 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 12:09:44.426617 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 12:09:44.433400 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 12:09:44.436579 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 12:09:44.443092 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 12:09:44.446700 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 12:09:44.453504 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 12:09:44.456490 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 12:09:44.462898 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 12:09:44.466671 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 12:09:44.472860 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 12:09:44.476552 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 12:09:44.479557 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 12:09:44.483142
1261 12:09:44.486104 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1262 12:09:44.489833 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1263 12:09:44.499763 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1264 12:09:44.502757 avoid_fixed_resources: DOMAIN: 0000
1265 12:09:44.509439 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1266 12:09:44.516188 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1267 12:09:44.522769 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1268 12:09:44.529344 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1269 12:09:44.539455 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1270 12:09:44.546002 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1271 12:09:44.552123 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1272 12:09:44.562429 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1273 12:09:44.568587 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1274 12:09:44.575484 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1275 12:09:44.582030 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1276 12:09:44.592157 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1277 12:09:44.592296 Setting resources...
1278 12:09:44.598952 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1279 12:09:44.601846 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1280 12:09:44.608465 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1281 12:09:44.612042 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1282 12:09:44.615034 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1283 12:09:44.621621 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1284 12:09:44.628134 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1285 12:09:44.634907 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1286 12:09:44.641648 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1287 12:09:44.648224 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1288 12:09:44.651368 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1289 12:09:44.658207 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1290 12:09:44.661257 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1291 12:09:44.664941 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1292 12:09:44.671723 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1293 12:09:44.674826 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1294 12:09:44.681701 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1295 12:09:44.684682 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1296 12:09:44.691566 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1297 12:09:44.694608 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1298 12:09:44.701464 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1299 12:09:44.704460 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1300 12:09:44.711165 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1301 12:09:44.714883 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1302 12:09:44.720985 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1303 12:09:44.724476 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1304 12:09:44.730769 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1305 12:09:44.734512 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1306 12:09:44.737636 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1307 12:09:44.744288 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1308 12:09:44.747392 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1309 12:09:44.754304 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1310 12:09:44.761045 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1311 12:09:44.767803 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1312 12:09:44.777733 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1313 12:09:44.783802 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1314 12:09:44.787453 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1315 12:09:44.797166 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1316 12:09:44.800811 Root Device assign_resources, bus 0 link: 0
1317 12:09:44.803931 DOMAIN: 0000 assign_resources, bus 0 link: 0
1318 12:09:44.814116 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1319 12:09:44.820227 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1320 12:09:44.830571 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1321 12:09:44.837178 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1322 12:09:44.846764 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1323 12:09:44.853583 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1324 12:09:44.860147 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 12:09:44.863329 PCI: 00:14.0 assign_resources, bus 0 link: 0
1326 12:09:44.873438 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1327 12:09:44.880272 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1328 12:09:44.886792 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1329 12:09:44.896756 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1330 12:09:44.900370 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 12:09:44.906565 PCI: 00:15.0 assign_resources, bus 1 link: 0
1332 12:09:44.913164 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1333 12:09:44.919839 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 12:09:44.923731 PCI: 00:15.1 assign_resources, bus 2 link: 0
1335 12:09:44.933217 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1336 12:09:44.939950 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1337 12:09:44.946712 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1338 12:09:44.956495 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1339 12:09:44.963064 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1340 12:09:44.969706 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1341 12:09:44.979576 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1342 12:09:44.986123 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1343 12:09:44.989742 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 12:09:44.996269 PCI: 00:19.0 assign_resources, bus 3 link: 0
1345 12:09:45.003133 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1346 12:09:45.006122
1347 12:09:45.012810 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1348 12:09:45.023165 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1349 12:09:45.026240 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 12:09:45.035823 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1351 12:09:45.039500 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 12:09:45.049001 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1353 12:09:45.055609 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1354 12:09:45.058603 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1355 12:09:45.065601 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1356 12:09:45.072113 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1357 12:09:45.078964 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1358 12:09:45.082108 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1359 12:09:45.088743 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 12:09:45.092222 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 12:09:45.098778 LPC: Trying to open IO window from 800 size 1ff
1362 12:09:45.105404 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1363 12:09:45.115315 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1364 12:09:45.122020 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1365 12:09:45.131585 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1366 12:09:45.135041 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 12:09:45.138581 Root Device assign_resources, bus 0 link: 0
1368 12:09:45.141522 Done setting resources.
1369 12:09:45.148189 Show resources in subtree (Root Device)...After assigning values.
1370 12:09:45.151715 Root Device child on link 0 CPU_CLUSTER: 0
1371 12:09:45.158219 CPU_CLUSTER: 0 child on link 0 APIC: 00
1372 12:09:45.158347 APIC: 00
1373 12:09:45.158430 APIC: 03
1374 12:09:45.161851 APIC: 05
1375 12:09:45.161956 APIC: 01
1376 12:09:45.164983 APIC: 02
1377 12:09:45.165084 APIC: 04
1378 12:09:45.165160 APIC: 07
1379 12:09:45.167980 APIC: 06
1380 12:09:45.171198 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1381 12:09:45.181094 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1382 12:09:45.190998 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1383 12:09:45.194525 PCI: 00:00.0
1384 12:09:45.204147 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1385 12:09:45.214475 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1386 12:09:45.220583 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1387 12:09:45.224330
1388 12:09:45.230881 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1389 12:09:45.240407 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1390 12:09:45.250593 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1391 12:09:45.260351 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1392 12:09:45.270619 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1393 12:09:45.276774 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1394 12:09:45.286757 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1395 12:09:45.296559 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1396 12:09:45.306884 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1397 12:09:45.316617 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1398 12:09:45.326279 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1399 12:09:45.336433 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1400 12:09:45.342997 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1401 12:09:45.346525 PCI: 00:02.0
1402 12:09:45.356136 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1403 12:09:45.366013 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1404 12:09:45.375926 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1405 12:09:45.379482 PCI: 00:04.0
1406 12:09:45.379600 PCI: 00:08.0
1407 12:09:45.389532 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1408 12:09:45.392518 PCI: 00:12.0
1409 12:09:45.402874 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1410 12:09:45.405870 PCI: 00:14.0 child on link 0 USB0 port 0
1411 12:09:45.415776 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1412 12:09:45.422363 USB0 port 0 child on link 0 USB2 port 0
1413 12:09:45.422496 USB2 port 0
1414 12:09:45.425894 USB2 port 1
1415 12:09:45.425998 USB2 port 2
1416 12:09:45.428957 USB2 port 3
1417 12:09:45.429058 USB2 port 5
1418 12:09:45.432613 USB2 port 6
1419 12:09:45.432714 USB2 port 9
1420 12:09:45.435663 USB3 port 0
1421 12:09:45.435765 USB3 port 1
1422 12:09:45.438671 USB3 port 2
1423 12:09:45.438782 USB3 port 3
1424 12:09:45.442233 USB3 port 4
1425 12:09:45.442335 PCI: 00:14.2
1426 12:09:45.455786 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1427 12:09:45.465600 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1428 12:09:45.465738 PCI: 00:14.3
1429 12:09:45.475625 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1430 12:09:45.481747 PCI: 00:15.0 child on link 0 I2C: 01:15
1431 12:09:45.491823 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1432 12:09:45.491971 I2C: 01:15
1433 12:09:45.495539 PCI: 00:15.1 child on link 0 I2C: 02:5d
1434 12:09:45.508698 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1435 12:09:45.508840 I2C: 02:5d
1436 12:09:45.511781 GENERIC: 0.0
1437 12:09:45.511881 PCI: 00:16.0
1438 12:09:45.521531 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1439 12:09:45.525145 PCI: 00:17.0
1440 12:09:45.534737 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1441 12:09:45.544548 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1442 12:09:45.554715 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1443 12:09:45.561244 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1444 12:09:45.571051 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1445 12:09:45.580972 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1446 12:09:45.584682 PCI: 00:19.0 child on link 0 I2C: 03:1a
1447 12:09:45.587777
1448 12:09:45.597583 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1449 12:09:45.597724 I2C: 03:1a
1450 12:09:45.601088 I2C: 03:38
1451 12:09:45.601193 I2C: 03:39
1452 12:09:45.604020 I2C: 03:3a
1453 12:09:45.604121 I2C: 03:3b
1454 12:09:45.607673 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1455 12:09:45.617318 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1456 12:09:45.627518 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1457 12:09:45.637244 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1458 12:09:45.640767 PCI: 01:00.0
1459 12:09:45.650476 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1460 12:09:45.654123 PCI: 00:1e.0
1461 12:09:45.663840 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1462 12:09:45.673591 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1463 12:09:45.677264 PCI: 00:1e.2 child on link 0 SPI: 00
1464 12:09:45.686622 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1465 12:09:45.690274 SPI: 00
1466 12:09:45.693370 PCI: 00:1e.3 child on link 0 SPI: 01
1467 12:09:45.703815 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1468 12:09:45.703957 SPI: 01
1469 12:09:45.710342 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1470 12:09:45.716506 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1471 12:09:45.726590 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1472 12:09:45.730088 PNP: 0c09.0
1473 12:09:45.736677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1474 12:09:45.739650 PCI: 00:1f.3
1475 12:09:45.749875 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1476 12:09:45.759474 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1477 12:09:45.762959 PCI: 00:1f.4
1478 12:09:45.769668 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1479 12:09:45.779411 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1480 12:09:45.783077 PCI: 00:1f.5
1481 12:09:45.792980 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1482 12:09:45.795993 Done allocating resources.
1483 12:09:45.798969 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1484 12:09:45.803305 Enabling resources...
1485 12:09:45.809899 PCI: 00:00.0 subsystem <- 8086/9b61
1486 12:09:45.810022 PCI: 00:00.0 cmd <- 06
1487 12:09:45.812970 PCI: 00:02.0 subsystem <- 8086/9b41
1488 12:09:45.816438 PCI: 00:02.0 cmd <- 03
1489 12:09:45.819440 PCI: 00:08.0 cmd <- 06
1490 12:09:45.822504 PCI: 00:12.0 subsystem <- 8086/02f9
1491 12:09:45.826219 PCI: 00:12.0 cmd <- 02
1492 12:09:45.829143 PCI: 00:14.0 subsystem <- 8086/02ed
1493 12:09:45.832774 PCI: 00:14.0 cmd <- 02
1494 12:09:45.835694 PCI: 00:14.2 cmd <- 02
1495 12:09:45.839383 PCI: 00:14.3 subsystem <- 8086/02f0
1496 12:09:45.839489 PCI: 00:14.3 cmd <- 02
1497 12:09:45.845952 PCI: 00:15.0 subsystem <- 8086/02e8
1498 12:09:45.846067 PCI: 00:15.0 cmd <- 02
1499 12:09:45.849583 PCI: 00:15.1 subsystem <- 8086/02e9
1500 12:09:45.852999 PCI: 00:15.1 cmd <- 02
1501 12:09:45.855932 PCI: 00:16.0 subsystem <- 8086/02e0
1502 12:09:45.859522 PCI: 00:16.0 cmd <- 02
1503 12:09:45.862493 PCI: 00:17.0 subsystem <- 8086/02d3
1504 12:09:45.866083 PCI: 00:17.0 cmd <- 03
1505 12:09:45.869822 PCI: 00:19.0 subsystem <- 8086/02c5
1506 12:09:45.872908 PCI: 00:19.0 cmd <- 02
1507 12:09:45.875929 PCI: 00:1d.0 bridge ctrl <- 0013
1508 12:09:45.879660 PCI: 00:1d.0 subsystem <- 8086/02b0
1509 12:09:45.882788 PCI: 00:1d.0 cmd <- 06
1510 12:09:45.885872 PCI: 00:1e.0 subsystem <- 8086/02a8
1511 12:09:45.888983 PCI: 00:1e.0 cmd <- 06
1512 12:09:45.892569 PCI: 00:1e.2 subsystem <- 8086/02aa
1513 12:09:45.892684 PCI: 00:1e.2 cmd <- 06
1514 12:09:45.899302 PCI: 00:1e.3 subsystem <- 8086/02ab
1515 12:09:45.899416 PCI: 00:1e.3 cmd <- 02
1516 12:09:45.902949 PCI: 00:1f.0 subsystem <- 8086/0284
1517 12:09:45.906133 PCI: 00:1f.0 cmd <- 407
1518 12:09:45.909742 PCI: 00:1f.3 subsystem <- 8086/02c8
1519 12:09:45.912864 PCI: 00:1f.3 cmd <- 02
1520 12:09:45.915802 PCI: 00:1f.4 subsystem <- 8086/02a3
1521 12:09:45.919540 PCI: 00:1f.4 cmd <- 03
1522 12:09:45.922542 PCI: 00:1f.5 subsystem <- 8086/02a4
1523 12:09:45.925604 PCI: 00:1f.5 cmd <- 406
1524 12:09:45.934485 PCI: 01:00.0 cmd <- 02
1525 12:09:45.939841 done.
1526 12:09:45.951048 ME: Version: 14.0.39.1367
1527 12:09:45.957597 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1528 12:09:45.961188 Initializing devices...
1529 12:09:45.961295 Root Device init ...
1530 12:09:45.967757 Chrome EC: Set SMI mask to 0x0000000000000000
1531 12:09:45.970700 Chrome EC: clear events_b mask to 0x0000000000000000
1532 12:09:45.977451 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1533 12:09:45.984248 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1534 12:09:45.991092 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1535 12:09:45.994107 Chrome EC: Set WAKE mask to 0x0000000000000000
1536 12:09:45.997255 Root Device init finished in 35218 usecs
1537 12:09:46.001046 CPU_CLUSTER: 0 init ...
1538 12:09:46.004613 CPU_CLUSTER: 0 init finished in 2447 usecs
1539 12:09:46.007518
1540 12:09:46.011860 PCI: 00:00.0 init ...
1541 12:09:46.015493 CPU TDP: 15 Watts
1542 12:09:46.018500 CPU PL2 = 64 Watts
1543 12:09:46.021564 PCI: 00:00.0 init finished in 7082 usecs
1544 12:09:46.025235 PCI: 00:02.0 init ...
1545 12:09:46.028345 PCI: 00:02.0 init finished in 2253 usecs
1546 12:09:46.031979 PCI: 00:08.0 init ...
1547 12:09:46.035031 PCI: 00:08.0 init finished in 2253 usecs
1548 12:09:46.038522 PCI: 00:12.0 init ...
1549 12:09:46.041630 PCI: 00:12.0 init finished in 2252 usecs
1550 12:09:46.045338 PCI: 00:14.0 init ...
1551 12:09:46.048352 PCI: 00:14.0 init finished in 2251 usecs
1552 12:09:46.051856 PCI: 00:14.2 init ...
1553 12:09:46.055204 PCI: 00:14.2 init finished in 2254 usecs
1554 12:09:46.058090 PCI: 00:14.3 init ...
1555 12:09:46.061511 PCI: 00:14.3 init finished in 2263 usecs
1556 12:09:46.065096 PCI: 00:15.0 init ...
1557 12:09:46.068112 DW I2C bus 0 at 0xd121f000 (400 KHz)
1558 12:09:46.071725 PCI: 00:15.0 init finished in 5970 usecs
1559 12:09:46.074780 PCI: 00:15.1 init ...
1560 12:09:46.077867 DW I2C bus 1 at 0xd1220000 (400 KHz)
1561 12:09:46.081474 PCI: 00:15.1 init finished in 5980 usecs
1562 12:09:46.084618
1563 12:09:46.084725 PCI: 00:16.0 init ...
1564 12:09:46.091534 PCI: 00:16.0 init finished in 2252 usecs
1565 12:09:46.094546 PCI: 00:19.0 init ...
1566 12:09:46.097639 DW I2C bus 4 at 0xd1222000 (400 KHz)
1567 12:09:46.101214 PCI: 00:19.0 init finished in 5978 usecs
1568 12:09:46.104247 PCI: 00:1d.0 init ...
1569 12:09:46.107943 Initializing PCH PCIe bridge.
1570 12:09:46.110915 PCI: 00:1d.0 init finished in 5285 usecs
1571 12:09:46.113927 PCI: 00:1f.0 init ...
1572 12:09:46.117545 IOAPIC: Initializing IOAPIC at 0xfec00000
1573 12:09:46.124117 IOAPIC: Bootstrap Processor Local APIC = 0x00
1574 12:09:46.124235 IOAPIC: ID = 0x02
1575 12:09:46.127316 IOAPIC: Dumping registers
1576 12:09:46.130846 reg 0x0000: 0x02000000
1577 12:09:46.133807 reg 0x0001: 0x00770020
1578 12:09:46.133907 reg 0x0002: 0x00000000
1579 12:09:46.140356 PCI: 00:1f.0 init finished in 23556 usecs
1580 12:09:46.144077 PCI: 00:1f.4 init ...
1581 12:09:46.147075 PCI: 00:1f.4 init finished in 2262 usecs
1582 12:09:46.157855 PCI: 01:00.0 init ...
1583 12:09:46.161502 PCI: 01:00.0 init finished in 2253 usecs
1584 12:09:46.165821 PNP: 0c09.0 init ...
1585 12:09:46.168912 Google Chrome EC uptime: 11.070 seconds
1586 12:09:46.175793 Google Chrome AP resets since EC boot: 0
1587 12:09:46.178856 Google Chrome most recent AP reset causes:
1588 12:09:46.185666 Google Chrome EC reset flags at last EC boot: reset-pin
1589 12:09:46.188694 PNP: 0c09.0 init finished in 20567 usecs
1590 12:09:46.191779 Devices initialized
1591 12:09:46.191883 Show all devs... After init.
1592 12:09:46.195566
1593 12:09:46.195664 Root Device: enabled 1
1594 12:09:46.198654 CPU_CLUSTER: 0: enabled 1
1595 12:09:46.201792 DOMAIN: 0000: enabled 1
1596 12:09:46.201882 APIC: 00: enabled 1
1597 12:09:46.205354 PCI: 00:00.0: enabled 1
1598 12:09:46.208461 PCI: 00:02.0: enabled 1
1599 12:09:46.211997 PCI: 00:04.0: enabled 0
1600 12:09:46.212089 PCI: 00:05.0: enabled 0
1601 12:09:46.214931 PCI: 00:12.0: enabled 1
1602 12:09:46.218699 PCI: 00:12.5: enabled 0
1603 12:09:46.218799 PCI: 00:12.6: enabled 0
1604 12:09:46.221717
1605 12:09:46.221805 PCI: 00:14.0: enabled 1
1606 12:09:46.225351 PCI: 00:14.1: enabled 0
1607 12:09:46.228484 PCI: 00:14.3: enabled 1
1608 12:09:46.228574 PCI: 00:14.5: enabled 0
1609 12:09:46.231578 PCI: 00:15.0: enabled 1
1610 12:09:46.235206 PCI: 00:15.1: enabled 1
1611 12:09:46.238301 PCI: 00:15.2: enabled 0
1612 12:09:46.238404 PCI: 00:15.3: enabled 0
1613 12:09:46.241798 PCI: 00:16.0: enabled 1
1614 12:09:46.244870 PCI: 00:16.1: enabled 0
1615 12:09:46.247930 PCI: 00:16.2: enabled 0
1616 12:09:46.248025 PCI: 00:16.3: enabled 0
1617 12:09:46.251514 PCI: 00:16.4: enabled 0
1618 12:09:46.255096 PCI: 00:16.5: enabled 0
1619 12:09:46.258153 PCI: 00:17.0: enabled 1
1620 12:09:46.258248 PCI: 00:19.0: enabled 1
1621 12:09:46.261687 PCI: 00:19.1: enabled 0
1622 12:09:46.264784 PCI: 00:19.2: enabled 0
1623 12:09:46.264875 PCI: 00:1a.0: enabled 0
1624 12:09:46.268396 PCI: 00:1c.0: enabled 0
1625 12:09:46.271357 PCI: 00:1c.1: enabled 0
1626 12:09:46.274422 PCI: 00:1c.2: enabled 0
1627 12:09:46.274521 PCI: 00:1c.3: enabled 0
1628 12:09:46.278100 PCI: 00:1c.4: enabled 0
1629 12:09:46.281177 PCI: 00:1c.5: enabled 0
1630 12:09:46.284903 PCI: 00:1c.6: enabled 0
1631 12:09:46.284993 PCI: 00:1c.7: enabled 0
1632 12:09:46.288198 PCI: 00:1d.0: enabled 1
1633 12:09:46.291379 PCI: 00:1d.1: enabled 0
1634 12:09:46.294425 PCI: 00:1d.2: enabled 0
1635 12:09:46.294527 PCI: 00:1d.3: enabled 0
1636 12:09:46.298193 PCI: 00:1d.4: enabled 0
1637 12:09:46.301365 PCI: 00:1d.5: enabled 0
1638 12:09:46.301468 PCI: 00:1e.0: enabled 1
1639 12:09:46.304642
1640 12:09:46.304741 PCI: 00:1e.1: enabled 0
1641 12:09:46.307680 PCI: 00:1e.2: enabled 1
1642 12:09:46.311444 PCI: 00:1e.3: enabled 1
1643 12:09:46.311552 PCI: 00:1f.0: enabled 1
1644 12:09:46.314646 PCI: 00:1f.1: enabled 0
1645 12:09:46.317620 PCI: 00:1f.2: enabled 0
1646 12:09:46.321765 PCI: 00:1f.3: enabled 1
1647 12:09:46.321876 PCI: 00:1f.4: enabled 1
1648 12:09:46.324151 PCI: 00:1f.5: enabled 1
1649 12:09:46.327963 PCI: 00:1f.6: enabled 0
1650 12:09:46.331303 USB0 port 0: enabled 1
1651 12:09:46.331406 I2C: 01:15: enabled 1
1652 12:09:46.334412 I2C: 02:5d: enabled 1
1653 12:09:46.337473 GENERIC: 0.0: enabled 1
1654 12:09:46.337570 I2C: 03:1a: enabled 1
1655 12:09:46.340498 I2C: 03:38: enabled 1
1656 12:09:46.344282 I2C: 03:39: enabled 1
1657 12:09:46.344412 I2C: 03:3a: enabled 1
1658 12:09:46.347332 I2C: 03:3b: enabled 1
1659 12:09:46.350852 PCI: 00:00.0: enabled 1
1660 12:09:46.350955 SPI: 00: enabled 1
1661 12:09:46.353951 SPI: 01: enabled 1
1662 12:09:46.357482 PNP: 0c09.0: enabled 1
1663 12:09:46.357587 USB2 port 0: enabled 1
1664 12:09:46.360499 USB2 port 1: enabled 1
1665 12:09:46.364046 USB2 port 2: enabled 0
1666 12:09:46.364151 USB2 port 3: enabled 0
1667 12:09:46.367543
1668 12:09:46.367642 USB2 port 5: enabled 0
1669 12:09:46.370655 USB2 port 6: enabled 1
1670 12:09:46.374287 USB2 port 9: enabled 1
1671 12:09:46.374380 USB3 port 0: enabled 1
1672 12:09:46.377289 USB3 port 1: enabled 1
1673 12:09:46.380370 USB3 port 2: enabled 1
1674 12:09:46.380459 USB3 port 3: enabled 1
1675 12:09:46.384008 USB3 port 4: enabled 0
1676 12:09:46.387085 APIC: 03: enabled 1
1677 12:09:46.387174 APIC: 05: enabled 1
1678 12:09:46.390177 APIC: 01: enabled 1
1679 12:09:46.393818 APIC: 02: enabled 1
1680 12:09:46.393920 APIC: 04: enabled 1
1681 12:09:46.396851 APIC: 07: enabled 1
1682 12:09:46.396949 APIC: 06: enabled 1
1683 12:09:46.400689 PCI: 00:08.0: enabled 1
1684 12:09:46.403795 PCI: 00:14.2: enabled 1
1685 12:09:46.407370 PCI: 01:00.0: enabled 1
1686 12:09:46.410555 Disabling ACPI via APMC:
1687 12:09:46.410656 done.
1688 12:09:46.417123 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1689 12:09:46.420769 ELOG: NV offset 0xaf0000 size 0x4000
1690 12:09:46.427308 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1691 12:09:46.434140 ELOG: Event(17) added with size 13 at 2022-11-25 12:09:46 UTC
1692 12:09:46.440305 ELOG: Event(92) added with size 9 at 2022-11-25 12:09:46 UTC
1693 12:09:46.447165 ELOG: Event(93) added with size 9 at 2022-11-25 12:09:46 UTC
1694 12:09:46.453775 ELOG: Event(9A) added with size 9 at 2022-11-25 12:09:46 UTC
1695 12:09:46.460322 ELOG: Event(9E) added with size 10 at 2022-11-25 12:09:46 UTC
1696 12:09:46.467066 ELOG: Event(9F) added with size 14 at 2022-11-25 12:09:46 UTC
1697 12:09:46.470045 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1698 12:09:46.477821 ELOG: Event(A1) added with size 10 at 2022-11-25 12:09:46 UTC
1699 12:09:46.487552 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1700 12:09:46.493656 ELOG: Event(A0) added with size 9 at 2022-11-25 12:09:46 UTC
1701 12:09:46.497411 elog_add_boot_reason: Logged dev mode boot
1702 12:09:46.500538 Finalize devices...
1703 12:09:46.500635 PCI: 00:17.0 final
1704 12:09:46.504150 Devices finalized
1705 12:09:46.507226 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1706 12:09:46.513568 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1707 12:09:46.517077 ME: HFSTS1 : 0x90000245
1708 12:09:46.520163 ME: HFSTS2 : 0x3B850126
1709 12:09:46.526853 ME: HFSTS3 : 0x00000020
1710 12:09:46.530488 ME: HFSTS4 : 0x00004800
1711 12:09:46.533495 ME: HFSTS5 : 0x00000000
1712 12:09:46.537181 ME: HFSTS6 : 0x40400006
1713 12:09:46.540221 ME: Manufacturing Mode : NO
1714 12:09:46.543852 ME: FW Partition Table : OK
1715 12:09:46.546761 ME: Bringup Loader Failure : NO
1716 12:09:46.550222 ME: Firmware Init Complete : YES
1717 12:09:46.553521 ME: Boot Options Present : NO
1718 12:09:46.556551 ME: Update In Progress : NO
1719 12:09:46.560246 ME: D0i3 Support : YES
1720 12:09:46.563250 ME: Low Power State Enabled : NO
1721 12:09:46.566727 ME: CPU Replaced : NO
1722 12:09:46.569802 ME: CPU Replacement Valid : YES
1723 12:09:46.573311 ME: Current Working State : 5
1724 12:09:46.576271 ME: Current Operation State : 1
1725 12:09:46.579873 ME: Current Operation Mode : 0
1726 12:09:46.582956 ME: Error Code : 0
1727 12:09:46.586617 ME: CPU Debug Disabled : YES
1728 12:09:46.589620 ME: TXT Support : NO
1729 12:09:46.596401 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1730 12:09:46.603154 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1731 12:09:46.603273 CBFS @ c08000 size 3f8000
1732 12:09:46.609957 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1733 12:09:46.612922 CBFS: Locating 'fallback/dsdt.aml'
1734 12:09:46.616542 CBFS: Found @ offset 10bb80 size 3fa5
1735 12:09:46.622629 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1736 12:09:46.626302 CBFS @ c08000 size 3f8000
1737 12:09:46.629223 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1738 12:09:46.632714
1739 12:09:46.632818 CBFS: Locating 'fallback/slic'
1740 12:09:46.638138 CBFS: 'fallback/slic' not found.
1741 12:09:46.644733 ACPI: Writing ACPI tables at 99b3e000.
1742 12:09:46.644859 ACPI: * FACS
1743 12:09:46.647750 ACPI: * DSDT
1744 12:09:46.651240 Ramoops buffer: 0x100000@0x99a3d000.
1745 12:09:46.654809 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1746 12:09:46.660955 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1747 12:09:46.664394 Google Chrome EC: version:
1748 12:09:46.668029 ro: helios_v2.0.2659-56403530b
1749 12:09:46.671300 rw: helios_v2.0.2849-c41de27e7d
1750 12:09:46.671409 running image: 1
1751 12:09:46.675533 ACPI: * FADT
1752 12:09:46.675634 SCI is IRQ9
1753 12:09:46.678471 ACPI: added table 1/32, length now 40
1754 12:09:46.681948
1755 12:09:46.682049 ACPI: * SSDT
1756 12:09:46.685528 Found 1 CPU(s) with 8 core(s) each.
1757 12:09:46.688541 Error: Could not locate 'wifi_sar' in VPD.
1758 12:09:46.695312 Checking CBFS for default SAR values
1759 12:09:46.698453 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1760 12:09:46.702004 CBFS @ c08000 size 3f8000
1761 12:09:46.708811 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1762 12:09:46.711887 CBFS: Locating 'wifi_sar_defaults.hex'
1763 12:09:46.715052 CBFS: Found @ offset 5fac0 size 77
1764 12:09:46.718641 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1765 12:09:46.721781 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1766 12:09:46.724809
1767 12:09:46.728646 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1768 12:09:46.735085 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1769 12:09:46.738143 failed to find key in VPD: dsm_calib_r0_0
1770 12:09:46.747950 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1771 12:09:46.751467 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1772 12:09:46.754913 failed to find key in VPD: dsm_calib_r0_1
1773 12:09:46.764606 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1774 12:09:46.771197 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1775 12:09:46.774321 failed to find key in VPD: dsm_calib_r0_2
1776 12:09:46.784342 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1777 12:09:46.788176 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1778 12:09:46.794600 failed to find key in VPD: dsm_calib_r0_3
1779 12:09:46.800856 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1780 12:09:46.807728 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1781 12:09:46.810670 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1782 12:09:46.814408 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1783 12:09:46.818058 EC returned error result code 1
1784 12:09:46.821844 EC returned error result code 1
1785 12:09:46.826007 EC returned error result code 1
1786 12:09:46.832660 PS2K: Bad resp from EC. Vivaldi disabled!
1787 12:09:46.835572 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1788 12:09:46.842360 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1789 12:09:46.849079 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1790 12:09:46.852089 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1791 12:09:46.858573 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1792 12:09:46.865635 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1793 12:09:46.872173 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1794 12:09:46.875112 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1795 12:09:46.878680 ACPI: added table 2/32, length now 44
1796 12:09:46.882190
1797 12:09:46.882325 ACPI: * MCFG
1798 12:09:46.885374 ACPI: added table 3/32, length now 48
1799 12:09:46.888430 ACPI: * TPM2
1800 12:09:46.892102 TPM2 log created at 99a2d000
1801 12:09:46.895099 ACPI: added table 4/32, length now 52
1802 12:09:46.895209 ACPI: * MADT
1803 12:09:46.898691 SCI is IRQ9
1804 12:09:46.901681 ACPI: added table 5/32, length now 56
1805 12:09:46.901782 current = 99b43ac0
1806 12:09:46.905490 ACPI: * DMAR
1807 12:09:46.908600 ACPI: added table 6/32, length now 60
1808 12:09:46.911694 ACPI: * IGD OpRegion
1809 12:09:46.911794 GMA: Found VBT in CBFS
1810 12:09:46.914856 GMA: Found valid VBT in CBFS
1811 12:09:46.918587 ACPI: added table 7/32, length now 64
1812 12:09:46.921768 ACPI: * HPET
1813 12:09:46.924783 ACPI: added table 8/32, length now 68
1814 12:09:46.924884 ACPI: done.
1815 12:09:46.928468 ACPI tables: 31744 bytes.
1816 12:09:46.931889 smbios_write_tables: 99a2c000
1817 12:09:46.934944 EC returned error result code 3
1818 12:09:46.938446 Couldn't obtain OEM name from CBI
1819 12:09:46.942203 Create SMBIOS type 17
1820 12:09:46.945111 PCI: 00:00.0 (Intel Cannonlake)
1821 12:09:46.948185 PCI: 00:14.3 (Intel WiFi)
1822 12:09:46.951919 SMBIOS tables: 939 bytes.
1823 12:09:46.954911 Writing table forward entry at 0x00000500
1824 12:09:46.961580 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1825 12:09:46.965114 Writing coreboot table at 0x99b62000
1826 12:09:46.971708 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1827 12:09:46.974705 1. 0000000000001000-000000000009ffff: RAM
1828 12:09:46.978304 2. 00000000000a0000-00000000000fffff: RESERVED
1829 12:09:46.984924 3. 0000000000100000-0000000099a2bfff: RAM
1830 12:09:46.987954 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1831 12:09:46.994501 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1832 12:09:47.001283 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1833 12:09:47.004371 7. 000000009a000000-000000009f7fffff: RESERVED
1834 12:09:47.011106 8. 00000000e0000000-00000000efffffff: RESERVED
1835 12:09:47.014550 9. 00000000fc000000-00000000fc000fff: RESERVED
1836 12:09:47.018280 10. 00000000fe000000-00000000fe00ffff: RESERVED
1837 12:09:47.024396 11. 00000000fed10000-00000000fed17fff: RESERVED
1838 12:09:47.027482 12. 00000000fed80000-00000000fed83fff: RESERVED
1839 12:09:47.034680 13. 00000000fed90000-00000000fed91fff: RESERVED
1840 12:09:47.037785 14. 00000000feda0000-00000000feda1fff: RESERVED
1841 12:09:47.043993 15. 0000000100000000-000000045e7fffff: RAM
1842 12:09:47.047609 Graphics framebuffer located at 0xc0000000
1843 12:09:47.050627 Passing 5 GPIOs to payload:
1844 12:09:47.054334 NAME | PORT | POLARITY | VALUE
1845 12:09:47.060967 write protect | undefined | high | low
1846 12:09:47.063883 lid | undefined | high | high
1847 12:09:47.070832 power | undefined | high | low
1848 12:09:47.077506 oprom | undefined | high | low
1849 12:09:47.080463 EC in RW | 0x000000cb | high | low
1850 12:09:47.084157 Board ID: 4
1851 12:09:47.087184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1852 12:09:47.090371 CBFS @ c08000 size 3f8000
1853 12:09:47.097087 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1854 12:09:47.103824 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1855 12:09:47.103949 coreboot table: 1492 bytes.
1856 12:09:47.107487 IMD ROOT 0. 99fff000 00001000
1857 12:09:47.110545 IMD SMALL 1. 99ffe000 00001000
1858 12:09:47.113705 FSP MEMORY 2. 99c4e000 003b0000
1859 12:09:47.117330 CONSOLE 3. 99c2e000 00020000
1860 12:09:47.120465 FMAP 4. 99c2d000 0000054e
1861 12:09:47.123371 TIME STAMP 5. 99c2c000 00000910
1862 12:09:47.127235 VBOOT WORK 6. 99c18000 00014000
1863 12:09:47.130142 MRC DATA 7. 99c16000 00001958
1864 12:09:47.133766 ROMSTG STCK 8. 99c15000 00001000
1865 12:09:47.137322 AFTER CAR 9. 99c0b000 0000a000
1866 12:09:47.140429 RAMSTAGE 10. 99baf000 0005c000
1867 12:09:47.143762 REFCODE 11. 99b7a000 00035000
1868 12:09:47.146846 SMM BACKUP 12. 99b6a000 00010000
1869 12:09:47.150410 COREBOOT 13. 99b62000 00008000
1870 12:09:47.153517 ACPI 14. 99b3e000 00024000
1871 12:09:47.157162 ACPI GNVS 15. 99b3d000 00001000
1872 12:09:47.160229 RAMOOPS 16. 99a3d000 00100000
1873 12:09:47.163728 TPM2 TCGLOG17. 99a2d000 00010000
1874 12:09:47.166709 SMBIOS 18. 99a2c000 00000800
1875 12:09:47.170374 IMD small region:
1876 12:09:47.173808 IMD ROOT 0. 99ffec00 00000400
1877 12:09:47.176788 FSP RUNTIME 1. 99ffebe0 00000004
1878 12:09:47.180614 EC HOSTEVENT 2. 99ffebc0 00000008
1879 12:09:47.183457 POWER STATE 3. 99ffeb80 00000040
1880 12:09:47.187056 ROMSTAGE 4. 99ffeb60 00000004
1881 12:09:47.190007 MEM INFO 5. 99ffe9a0 000001b9
1882 12:09:47.193689 VPD 6. 99ffe920 0000006c
1883 12:09:47.196709 MTRR: Physical address space:
1884 12:09:47.203242 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1885 12:09:47.210048 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1886 12:09:47.216297 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1887 12:09:47.223169 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1888 12:09:47.229940 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1889 12:09:47.236036 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1890 12:09:47.243057 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1891 12:09:47.245967 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 12:09:47.249488 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 12:09:47.252550 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 12:09:47.259211 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 12:09:47.262305 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 12:09:47.265852 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 12:09:47.268915 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 12:09:47.276004 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 12:09:47.278944 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 12:09:47.282542 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 12:09:47.285513 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 12:09:47.289009 call enable_fixed_mtrr()
1903 12:09:47.292587 CPU physical address size: 39 bits
1904 12:09:47.298833 MTRR: default type WB/UC MTRR counts: 6/8.
1905 12:09:47.302490 MTRR: WB selected as default type.
1906 12:09:47.309224 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1907 12:09:47.312177 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1908 12:09:47.318863 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1909 12:09:47.325623 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1910 12:09:47.331773 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1911 12:09:47.338565 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1912 12:09:47.341678 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 12:09:47.345262
1914 12:09:47.348668 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 12:09:47.351645 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 12:09:47.355227 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 12:09:47.358346 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 12:09:47.365154 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 12:09:47.368705 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 12:09:47.371637 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 12:09:47.374651 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 12:09:47.381811 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 12:09:47.384753 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 12:09:47.384895
1925 12:09:47.385005 MTRR check
1926 12:09:47.388362 Fixed MTRRs : Enabled
1927 12:09:47.391357 Variable MTRRs: Enabled
1928 12:09:47.391470
1929 12:09:47.394968 call enable_fixed_mtrr()
1930 12:09:47.398086 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1931 12:09:47.401735 CPU physical address size: 39 bits
1932 12:09:47.407855 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1933 12:09:47.411442 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:09:47.414566 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 12:09:47.421093 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 12:09:47.424814 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 12:09:47.427959 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 12:09:47.430888 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 12:09:47.437775 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 12:09:47.440827 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 12:09:47.444469 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 12:09:47.447466 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 12:09:47.454523 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 12:09:47.457457 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 12:09:47.461031 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 12:09:47.464118 call enable_fixed_mtrr()
1947 12:09:47.467236 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 12:09:47.470895 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 12:09:47.477390 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 12:09:47.480888 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 12:09:47.483898 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 12:09:47.487585 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 12:09:47.494176 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 12:09:47.497129 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 12:09:47.500324 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 12:09:47.503937 CPU physical address size: 39 bits
1957 12:09:47.506972 call enable_fixed_mtrr()
1958 12:09:47.510716 CBFS @ c08000 size 3f8000
1959 12:09:47.516966 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1960 12:09:47.520630 CBFS: Locating 'fallback/payload'
1961 12:09:47.523665 CPU physical address size: 39 bits
1962 12:09:47.526850 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 12:09:47.530516 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 12:09:47.533586 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 12:09:47.540382 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 12:09:47.543238 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 12:09:47.546949 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 12:09:47.549881 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 12:09:47.556300 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 12:09:47.560070 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 12:09:47.563046 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 12:09:47.566676 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 12:09:47.573254 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 12:09:47.573385 call enable_fixed_mtrr()
1975 12:09:47.579896 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 12:09:47.583467 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 12:09:47.586318 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 12:09:47.589901 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 12:09:47.595971 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 12:09:47.599433 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 12:09:47.603062 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 12:09:47.606123 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 12:09:47.612956 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 12:09:47.616060 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 12:09:47.619631 CPU physical address size: 39 bits
1986 12:09:47.622699 call enable_fixed_mtrr()
1987 12:09:47.625814 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:09:47.629594 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 12:09:47.635705 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:09:47.639263 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:09:47.642385 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:09:47.646019 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:09:47.649058 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:09:47.655580 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:09:47.659057 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:09:47.662089 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:09:47.665740 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:09:47.672439 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 12:09:47.675978 call enable_fixed_mtrr()
2000 12:09:47.678941 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 12:09:47.682050 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 12:09:47.685662 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 12:09:47.688660 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 12:09:47.692057
2005 12:09:47.695139 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 12:09:47.698898 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 12:09:47.701863 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 12:09:47.705502 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 12:09:47.711723 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 12:09:47.715467 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 12:09:47.718441 CPU physical address size: 39 bits
2012 12:09:47.721618 call enable_fixed_mtrr()
2013 12:09:47.725316 CBFS: Found @ offset 1c96c0 size 3f798
2014 12:09:47.728397 CPU physical address size: 39 bits
2015 12:09:47.731485 CPU physical address size: 39 bits
2016 12:09:47.738236 Checking segment from ROM address 0xffdd16f8
2017 12:09:47.742064 Checking segment from ROM address 0xffdd1714
2018 12:09:47.745003 Loading segment from ROM address 0xffdd16f8
2019 12:09:47.748027 code (compression=0)
2020 12:09:47.758331 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2021 12:09:47.765125 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2022 12:09:47.768110 it's not compressed!
2023 12:09:47.859469 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2024 12:09:47.866065 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2025 12:09:47.869796 Loading segment from ROM address 0xffdd1714
2026 12:09:47.872813 Entry Point 0x30000000
2027 12:09:47.875726 Loaded segments
2028 12:09:47.881476 Finalizing chipset.
2029 12:09:47.885099 Finalizing SMM.
2030 12:09:47.888092 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2031 12:09:47.891480 mp_park_aps done after 0 msecs.
2032 12:09:47.898047 Jumping to boot code at 30000000(99b62000)
2033 12:09:47.904812 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2034 12:09:47.904946
2035 12:09:47.905025
2036 12:09:47.905096
2037 12:09:47.907942 Starting depthcharge on Helios...
2038 12:09:47.908041
2039 12:09:47.908405 end: 2.2.3 depthcharge-start (duration 00:00:20) [common]
2040 12:09:47.908529 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2041 12:09:47.908625 Setting prompt string to ['hatch:']
2042 12:09:47.908716 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2043 12:09:47.917759 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2044 12:09:47.917898
2045 12:09:47.924555 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2046 12:09:47.924677
2047 12:09:47.931107 board_setup: Info: eMMC controller not present; skipping
2048 12:09:47.931215
2049 12:09:47.934087 New NVMe Controller 0x30053ac0 @ 00:1d:00
2050 12:09:47.934193
2051 12:09:47.940935 board_setup: Info: SDHCI controller not present; skipping
2052 12:09:47.941050
2053 12:09:47.947774 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2054 12:09:47.947884
2055 12:09:47.947964 Wipe memory regions:
2056 12:09:47.948036
2057 12:09:47.950918 [0x00000000001000, 0x000000000a0000)
2058 12:09:47.951018
2059 12:09:47.957492 [0x00000000100000, 0x00000030000000)
2060 12:09:47.957605
2061 12:09:48.024074 [0x00000030657430, 0x00000099a2c000)
2062 12:09:48.024243
2063 12:09:48.174314 [0x00000100000000, 0x0000045e800000)
2064 12:09:48.174489
2065 12:09:49.630186 R8152: Initializing
2066 12:09:49.630361
2067 12:09:49.633665 Version 9 (ocp_data = 6010)
2068 12:09:49.633767
2069 12:09:49.637789 R8152: Done initializing
2070 12:09:49.637894
2071 12:09:49.640890 Adding net device
2072 12:09:49.640989
2073 12:09:50.123869 R8152: Initializing
2074 12:09:50.124044
2075 12:09:50.127449 Version 6 (ocp_data = 5c30)
2076 12:09:50.127558
2077 12:09:50.130412 R8152: Done initializing
2078 12:09:50.130503
2079 12:09:50.133666 net_add_device: Attemp to include the same device
2080 12:09:50.137357
2081 12:09:50.144635 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2082 12:09:50.144769
2083 12:09:50.144846
2084 12:09:50.144917
2085 12:09:50.145207 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2087 12:09:50.246021 hatch: tftpboot 192.168.201.1 8123203/tftp-deploy-t0wj258y/kernel/bzImage 8123203/tftp-deploy-t0wj258y/kernel/cmdline 8123203/tftp-deploy-t0wj258y/ramdisk/ramdisk.cpio.gz
2088 12:09:50.246221 Setting prompt string to 'Starting kernel'
2089 12:09:50.246310 Setting prompt string to ['Starting kernel']
2090 12:09:50.246389 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2091 12:09:50.246474 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2092 12:09:50.250572 tftpboot 192.168.201.1 8123203/tftp-deploy-t0wj258y/kernel/bzImaoy-t0wj258y/kernel/cmdline 8123203/tftp-deploy-t0wj258y/ramdisk/ramdisk.cpio.gz
2093 12:09:50.250679
2094 12:09:50.250766 Waiting for link
2095 12:09:50.250841
2096 12:09:50.451736 done.
2097 12:09:50.451917
2098 12:09:50.452009 MAC: 00:24:32:50:1a:59
2099 12:09:50.452083
2100 12:09:50.454681 Sending DHCP discover... done.
2101 12:09:50.454794
2102 12:09:50.458108 Waiting for reply... done.
2103 12:09:50.458210
2104 12:09:50.461598 Sending DHCP request... done.
2105 12:09:50.461703
2106 12:09:50.468168 Waiting for reply... done.
2107 12:09:50.468288
2108 12:09:50.468368 My ip is 192.168.201.14
2109 12:09:50.468441
2110 12:09:50.471351 The DHCP server ip is 192.168.201.1
2111 12:09:50.471452
2112 12:09:50.478097 TFTP server IP predefined by user: 192.168.201.1
2113 12:09:50.478209
2114 12:09:50.484409 Bootfile predefined by user: 8123203/tftp-deploy-t0wj258y/kernel/bzImage
2115 12:09:50.484528
2116 12:09:50.488097 Sending tftp read request... done.
2117 12:09:50.488192
2118 12:09:50.491338 Waiting for the transfer...
2119 12:09:50.491434
2120 12:09:51.041766 00000000 ################################################################
2121 12:09:51.041925
2122 12:09:51.576616 00080000 ################################################################
2123 12:09:51.576784
2124 12:09:52.129060 00100000 ################################################################
2125 12:09:52.129217
2126 12:09:52.663067 00180000 ################################################################
2127 12:09:52.663222
2128 12:09:53.216472 00200000 ################################################################
2129 12:09:53.216646
2130 12:09:53.762537 00280000 ################################################################
2131 12:09:53.762702
2132 12:09:54.312416 00300000 ################################################################
2133 12:09:54.312575
2134 12:09:54.869500 00380000 ################################################################
2135 12:09:54.869656
2136 12:09:55.418621 00400000 ################################################################
2137 12:09:55.418797
2138 12:09:55.972878 00480000 ################################################################
2139 12:09:55.973202
2140 12:09:56.585204 00500000 ################################################################
2141 12:09:56.585704
2142 12:09:57.163116 00580000 ################################################################
2143 12:09:57.163276
2144 12:09:57.738811 00600000 ################################################################
2145 12:09:57.739296
2146 12:09:58.173470 00680000 ###################################### done.
2147 12:09:58.174046
2148 12:09:58.176392 The bootfile was 7126928 bytes long.
2149 12:09:58.176845
2150 12:09:58.179536 Sending tftp read request... done.
2151 12:09:58.179988
2152 12:09:58.183263 Waiting for the transfer...
2153 12:09:58.183712
2154 12:09:58.886225 00000000 ################################################################
2155 12:09:58.886824
2156 12:09:59.549306 00080000 ################################################################
2157 12:09:59.549919
2158 12:10:00.183277 00100000 ################################################################
2159 12:10:00.183892
2160 12:10:00.778408 00180000 ################################################################
2161 12:10:00.778588
2162 12:10:01.348851 00200000 ################################################################
2163 12:10:01.349013
2164 12:10:01.923459 00280000 ################################################################
2165 12:10:01.923616
2166 12:10:02.499985 00300000 ################################################################
2167 12:10:02.500139
2168 12:10:03.078407 00380000 ################################################################
2169 12:10:03.078569
2170 12:10:03.644155 00400000 ################################################################
2171 12:10:03.644312
2172 12:10:04.216466 00480000 ################################################################
2173 12:10:04.216622
2174 12:10:04.486496 00500000 ################################ done.
2175 12:10:04.486652
2176 12:10:04.489514 Sending tftp read request... done.
2177 12:10:04.489619
2178 12:10:04.493153 Waiting for the transfer...
2179 12:10:04.493266
2180 12:10:04.493355 00000000 # done.
2181 12:10:04.493438
2182 12:10:04.503055 Command line loaded dynamically from TFTP file: 8123203/tftp-deploy-t0wj258y/kernel/cmdline
2183 12:10:04.503192
2184 12:10:04.529545 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8123203/extract-nfsrootfs-ue8jl_r3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2185 12:10:04.529849
2186 12:10:04.535906 ec_init(0): CrosEC protocol v3 supported (256, 256)
2187 12:10:04.536309
2188 12:10:04.543304 Shutting down all USB controllers.
2189 12:10:04.543816
2190 12:10:04.544300 Removing current net device
2191 12:10:04.544662
2192 12:10:04.546984 Finalizing coreboot
2193 12:10:04.547518
2194 12:10:04.553693 Exiting depthcharge with code 4 at timestamp: 23962254
2195 12:10:04.554199
2196 12:10:04.554609
2197 12:10:04.554996 Starting kernel ...
2198 12:10:04.555358
2199 12:10:04.555705
2200 12:10:04.556944 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2201 12:10:04.557444 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2202 12:10:04.557886 Setting prompt string to ['Linux version [0-9]']
2203 12:10:04.558343 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2204 12:10:04.558800 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2205 12:10:04.559758
2206 12:10:04.560222
2208 12:14:28.558496 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2210 12:14:28.559769 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2212 12:14:28.560705 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2215 12:14:28.562228 end: 2 depthcharge-action (duration 00:05:00) [common]
2217 12:14:28.563555 Cleaning after the job
2218 12:14:28.564019 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/ramdisk
2219 12:14:28.566385 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/kernel
2220 12:14:28.569099 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/nfsrootfs
2221 12:14:28.648768 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8123203/tftp-deploy-t0wj258y/modules
2222 12:14:28.649099 start: 4.1 power-off (timeout 00:00:30) [common]
2223 12:14:28.649283 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2224 12:14:28.670434 >> Command sent successfully.
2225 12:14:28.672462 Returned 0 in 0 seconds
2226 12:14:28.773673 end: 4.1 power-off (duration 00:00:00) [common]
2228 12:14:28.775275 start: 4.2 read-feedback (timeout 00:10:00) [common]
2229 12:14:28.776478 Listened to connection for namespace 'common' for up to 1s
2230 12:14:29.736581 Listened to connection for namespace 'common' for up to 1s
2231 12:14:29.739821 Listened to connection for namespace 'common' for up to 1s
2232 12:14:29.743343 Listened to connection for namespace 'common' for up to 1s
2233 12:14:29.746611 Listened to connection for namespace 'common' for up to 1s
2234 12:14:29.749915 Listened to connection for namespace 'common' for up to 1s
2235 12:14:29.753142 Listened to connection for namespace 'common' for up to 1s
2236 12:14:29.756504 Listened to connection for namespace 'common' for up to 1s
2237 12:14:29.760294 Listened to connection for namespace 'common' for up to 1s
2238 12:14:29.763513 Listened to connection for namespace 'common' for up to 1s
2239 12:14:29.766226 Listened to connection for namespace 'common' for up to 1s
2240 12:14:29.769878 Listened to connection for namespace 'common' for up to 1s
2241 12:14:29.773373 Listened to connection for namespace 'common' for up to 1s
2242 12:14:29.776095 Finalising connection for namespace 'common'
2243 12:14:29.776538 Disconnecting from shell: Finalise
2244 12:14:29.776842
2245 12:14:29.878221 end: 4.2 read-feedback (duration 00:00:01) [common]
2246 12:14:29.878901 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8123203
2247 12:14:30.042673 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8123203
2248 12:14:30.042925 JobError: Your job cannot terminate cleanly.