Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 10:52:57.643203 lava-dispatcher, installed at version: 2022.10
2 10:52:57.643400 start: 0 validate
3 10:52:57.643530 Start time: 2022-11-22 10:52:57.643522+00:00 (UTC)
4 10:52:57.643648 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:52:57.643778 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 10:52:57.937486 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:52:57.938240 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:52:58.229790 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:52:58.230500 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:52:58.236089 validate duration: 0.59
12 10:52:58.236381 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:52:58.236494 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:52:58.236599 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:52:58.236704 Not decompressing ramdisk as can be used compressed.
16 10:52:58.236791 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 10:52:58.236859 saving as /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/ramdisk/rootfs.cpio.gz
18 10:52:58.236922 total size: 8415749 (8MB)
19 10:52:58.239249 progress 0% (0MB)
20 10:52:58.247221 progress 5% (0MB)
21 10:52:58.253977 progress 10% (0MB)
22 10:52:58.261462 progress 15% (1MB)
23 10:52:58.269137 progress 20% (1MB)
24 10:52:58.276631 progress 25% (2MB)
25 10:52:58.283913 progress 30% (2MB)
26 10:52:58.291009 progress 35% (2MB)
27 10:52:58.299092 progress 40% (3MB)
28 10:52:58.306608 progress 45% (3MB)
29 10:52:58.313281 progress 50% (4MB)
30 10:52:58.320964 progress 55% (4MB)
31 10:52:58.328666 progress 60% (4MB)
32 10:52:58.336378 progress 65% (5MB)
33 10:52:58.343851 progress 70% (5MB)
34 10:52:58.350583 progress 75% (6MB)
35 10:52:58.358058 progress 80% (6MB)
36 10:52:58.366706 progress 85% (6MB)
37 10:52:58.374004 progress 90% (7MB)
38 10:52:58.380138 progress 95% (7MB)
39 10:52:58.387466 progress 100% (8MB)
40 10:52:58.387757 8MB downloaded in 0.15s (53.21MB/s)
41 10:52:58.387930 end: 1.1.1 http-download (duration 00:00:00) [common]
43 10:52:58.388208 end: 1.1 download-retry (duration 00:00:00) [common]
44 10:52:58.388314 start: 1.2 download-retry (timeout 00:10:00) [common]
45 10:52:58.388418 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 10:52:58.388541 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:52:58.388616 saving as /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/kernel/bzImage
48 10:52:58.388700 total size: 7126928 (6MB)
49 10:52:58.388782 No compression specified
50 10:52:58.390987 progress 0% (0MB)
51 10:52:58.397300 progress 5% (0MB)
52 10:52:58.403674 progress 10% (0MB)
53 10:52:58.409743 progress 15% (1MB)
54 10:52:58.416731 progress 20% (1MB)
55 10:52:58.422838 progress 25% (1MB)
56 10:52:58.428619 progress 30% (2MB)
57 10:52:58.435156 progress 35% (2MB)
58 10:52:58.441493 progress 40% (2MB)
59 10:52:58.447612 progress 45% (3MB)
60 10:52:58.453595 progress 50% (3MB)
61 10:52:58.460884 progress 55% (3MB)
62 10:52:58.466816 progress 60% (4MB)
63 10:52:58.472785 progress 65% (4MB)
64 10:52:58.479496 progress 70% (4MB)
65 10:52:58.485656 progress 75% (5MB)
66 10:52:58.491956 progress 80% (5MB)
67 10:52:58.497900 progress 85% (5MB)
68 10:52:58.504406 progress 90% (6MB)
69 10:52:58.511361 progress 95% (6MB)
70 10:52:58.516982 progress 100% (6MB)
71 10:52:58.517222 6MB downloaded in 0.13s (52.89MB/s)
72 10:52:58.517390 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:52:58.517660 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:52:58.517766 start: 1.3 download-retry (timeout 00:10:00) [common]
76 10:52:58.517869 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 10:52:58.517992 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:52:58.518066 saving as /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/modules/modules.tar
79 10:52:58.518148 total size: 52008 (0MB)
80 10:52:58.518227 Using unxz to decompress xz
81 10:52:58.522442 progress 63% (0MB)
82 10:52:58.522832 progress 100% (0MB)
83 10:52:58.526063 0MB downloaded in 0.01s (6.27MB/s)
84 10:52:58.526278 end: 1.3.1 http-download (duration 00:00:00) [common]
86 10:52:58.526568 end: 1.3 download-retry (duration 00:00:00) [common]
87 10:52:58.526680 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 10:52:58.526788 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 10:52:58.526893 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 10:52:58.526999 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 10:52:58.527176 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv
92 10:52:58.527301 makedir: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin
93 10:52:58.527405 makedir: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/tests
94 10:52:58.527503 makedir: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/results
95 10:52:58.527621 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-add-keys
96 10:52:58.527767 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-add-sources
97 10:52:58.527901 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-background-process-start
98 10:52:58.528034 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-background-process-stop
99 10:52:58.528165 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-common-functions
100 10:52:58.528293 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-echo-ipv4
101 10:52:58.528424 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-install-packages
102 10:52:58.528592 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-installed-packages
103 10:52:58.528720 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-os-build
104 10:52:58.528848 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-probe-channel
105 10:52:58.528978 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-probe-ip
106 10:52:58.529106 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-target-ip
107 10:52:58.529236 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-target-mac
108 10:52:58.529364 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-target-storage
109 10:52:58.529496 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-case
110 10:52:58.529624 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-event
111 10:52:58.529754 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-feedback
112 10:52:58.529883 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-raise
113 10:52:58.530017 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-reference
114 10:52:58.530144 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-runner
115 10:52:58.530271 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-set
116 10:52:58.530402 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-test-shell
117 10:52:58.530533 Updating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-install-packages (oe)
118 10:52:58.530670 Updating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/bin/lava-installed-packages (oe)
119 10:52:58.530787 Creating /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/environment
120 10:52:58.530896 LAVA metadata
121 10:52:58.530980 - LAVA_JOB_ID=8077744
122 10:52:58.531064 - LAVA_DISPATCHER_IP=192.168.201.1
123 10:52:58.531193 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 10:52:58.531266 skipped lava-vland-overlay
125 10:52:58.531368 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 10:52:58.531471 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 10:52:58.531545 skipped lava-multinode-overlay
128 10:52:58.531645 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 10:52:58.531746 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 10:52:58.531835 Loading test definitions
131 10:52:58.531951 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 10:52:58.532039 Using /lava-8077744 at stage 0
133 10:52:58.532339 uuid=8077744_1.4.2.3.1 testdef=None
134 10:52:58.532443 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 10:52:58.532551 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 10:52:58.533061 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 10:52:58.533320 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 10:52:58.533909 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 10:52:58.534187 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 10:52:58.534751 runner path: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/0/tests/0_dmesg test_uuid 8077744_1.4.2.3.1
143 10:52:58.534921 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 10:52:58.535188 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 10:52:58.535272 Using /lava-8077744 at stage 1
147 10:52:58.535545 uuid=8077744_1.4.2.3.5 testdef=None
148 10:52:58.535647 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 10:52:58.535751 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 10:52:58.536215 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 10:52:58.536474 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 10:52:58.537065 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 10:52:58.537337 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 10:52:58.537909 runner path: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/1/tests/1_bootrr test_uuid 8077744_1.4.2.3.5
157 10:52:58.538066 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 10:52:58.538301 Creating lava-test-runner.conf files
160 10:52:58.538385 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/0 for stage 0
161 10:52:58.538493 - 0_dmesg
162 10:52:58.538580 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077744/lava-overlay-agr8utpv/lava-8077744/1 for stage 1
163 10:52:58.538686 - 1_bootrr
164 10:52:58.538795 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 10:52:58.538902 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 10:52:58.545076 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 10:52:58.545191 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 10:52:58.545297 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 10:52:58.545401 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 10:52:58.545506 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 10:52:58.726334 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 10:52:58.726686 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 10:52:58.726819 extracting modules file /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077744/extract-overlay-ramdisk-tfz0vtj7/ramdisk
174 10:52:58.731109 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 10:52:58.731232 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 10:52:58.731331 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077744/compress-overlay-mwi6768l/overlay-1.4.2.4.tar.gz to ramdisk
177 10:52:58.731417 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077744/compress-overlay-mwi6768l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8077744/extract-overlay-ramdisk-tfz0vtj7/ramdisk
178 10:52:58.735322 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 10:52:58.735441 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 10:52:58.735545 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 10:52:58.735651 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 10:52:58.735739 Building ramdisk /var/lib/lava/dispatcher/tmp/8077744/extract-overlay-ramdisk-tfz0vtj7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8077744/extract-overlay-ramdisk-tfz0vtj7/ramdisk
183 10:52:58.797632 >> 48008 blocks
184 10:52:59.530725 rename /var/lib/lava/dispatcher/tmp/8077744/extract-overlay-ramdisk-tfz0vtj7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/ramdisk/ramdisk.cpio.gz
185 10:52:59.531200 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 10:52:59.531336 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 10:52:59.531449 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 10:52:59.531555 No mkimage arch provided, not using FIT.
189 10:52:59.531658 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 10:52:59.531760 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 10:52:59.531878 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 10:52:59.531991 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 10:52:59.532079 No LXC device requested
194 10:52:59.532182 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 10:52:59.532287 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 10:52:59.532387 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 10:52:59.532469 Checking files for TFTP limit of 4294967296 bytes.
198 10:52:59.532875 end: 1 tftp-deploy (duration 00:00:01) [common]
199 10:52:59.532996 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 10:52:59.533111 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 10:52:59.533248 substitutions:
202 10:52:59.533324 - {DTB}: None
203 10:52:59.533406 - {INITRD}: 8077744/tftp-deploy-5006hay8/ramdisk/ramdisk.cpio.gz
204 10:52:59.533484 - {KERNEL}: 8077744/tftp-deploy-5006hay8/kernel/bzImage
205 10:52:59.533562 - {LAVA_MAC}: None
206 10:52:59.533638 - {PRESEED_CONFIG}: None
207 10:52:59.533712 - {PRESEED_LOCAL}: None
208 10:52:59.533787 - {RAMDISK}: 8077744/tftp-deploy-5006hay8/ramdisk/ramdisk.cpio.gz
209 10:52:59.533861 - {ROOT_PART}: None
210 10:52:59.533936 - {ROOT}: None
211 10:52:59.534010 - {SERVER_IP}: 192.168.201.1
212 10:52:59.534083 - {TEE}: None
213 10:52:59.534157 Parsed boot commands:
214 10:52:59.534228 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 10:52:59.534402 Parsed boot commands: tftpboot 192.168.201.1 8077744/tftp-deploy-5006hay8/kernel/bzImage 8077744/tftp-deploy-5006hay8/kernel/cmdline 8077744/tftp-deploy-5006hay8/ramdisk/ramdisk.cpio.gz
216 10:52:59.534506 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 10:52:59.534612 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 10:52:59.534726 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 10:52:59.534836 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 10:52:59.534961 Not connected, no need to disconnect.
221 10:52:59.535062 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 10:52:59.535165 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 10:52:59.535243 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
224 10:52:59.537693 Setting prompt string to ['lava-test: # ']
225 10:52:59.537969 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 10:52:59.538082 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 10:52:59.538193 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 10:52:59.538297 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 10:52:59.538484 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
230 10:52:59.557450 >> Command sent successfully.
231 10:52:59.559352 Returned 0 in 0 seconds
232 10:52:59.660491 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 10:52:59.663189 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 10:52:59.663783 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 10:52:59.664266 Setting prompt string to 'Starting depthcharge on Voema...'
237 10:52:59.664684 Changing prompt to 'Starting depthcharge on Voema...'
238 10:52:59.665142 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 10:52:59.666470 [Enter `^Ec?' for help]
240 10:53:07.850199
241 10:53:07.850848
242 10:53:07.859847 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 10:53:07.863124 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 10:53:07.870018 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 10:53:07.873169 CPU: AES supported, TXT NOT supported, VT supported
246 10:53:07.879822 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 10:53:07.886138 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 10:53:07.889709 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 10:53:07.892968 VBOOT: Loading verstage.
250 10:53:07.899320 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 10:53:07.903286 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 10:53:07.906083 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 10:53:07.916595 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 10:53:07.923895 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 10:53:07.924469
256 10:53:07.924861
257 10:53:07.936792 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 10:53:07.951153 Probing TPM: . done!
259 10:53:07.953762 TPM ready after 0 ms
260 10:53:07.957322 Connected to device vid:did:rid of 1ae0:0028:00
261 10:53:07.968678 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 10:53:07.975469 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 10:53:07.978570 Initialized TPM device CR50 revision 0
264 10:53:08.030028 tlcl_send_startup: Startup return code is 0
265 10:53:08.030599 TPM: setup succeeded
266 10:53:08.045880 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 10:53:08.059905 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 10:53:08.072532 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 10:53:08.082744 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 10:53:08.086732 Chrome EC: UHEPI supported
271 10:53:08.090009 Phase 1
272 10:53:08.093237 FMAP: area GBB found @ 1805000 (458752 bytes)
273 10:53:08.099945 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 10:53:08.103083
275 10:53:08.110223 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 10:53:08.116746 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 10:53:08.123643 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 10:53:08.126422 Recovery requested (1009000e)
279 10:53:08.129948 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 10:53:08.141671 tlcl_extend: response is 0
281 10:53:08.148656 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 10:53:08.157719 tlcl_extend: response is 0
283 10:53:08.164609 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 10:53:08.171058 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 10:53:08.177731 BS: verstage times (exec / console): total (unknown) / 142 ms
286 10:53:08.178318
287 10:53:08.178714
288 10:53:08.191421 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 10:53:08.197661 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 10:53:08.200932 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 10:53:08.204139 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 10:53:08.210875 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 10:53:08.214536 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 10:53:08.217289 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 10:53:08.221089 TCO_STS: 0000 0000
296 10:53:08.224502 GEN_PMCON: d0015038 00002200
297 10:53:08.227496 GBLRST_CAUSE: 00000000 00000000
298 10:53:08.228079 HPR_CAUSE0: 00000000
299 10:53:08.231122 prev_sleep_state 5
300 10:53:08.234264 Boot Count incremented to 12326
301 10:53:08.241052 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 10:53:08.247225 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 10:53:08.254439 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 10:53:08.260920 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 10:53:08.265742 Chrome EC: UHEPI supported
306 10:53:08.272413 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 10:53:08.285007 Probing TPM: done!
308 10:53:08.293313 Connected to device vid:did:rid of 1ae0:0028:00
309 10:53:08.300755 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
310 10:53:08.303643 Initialized TPM device CR50 revision 0
311 10:53:08.309589
312 10:53:08.319644 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 10:53:08.326383 MRC: Hash idx 0x100b comparison successful.
314 10:53:08.330119 MRC cache found, size faa8
315 10:53:08.330732 bootmode is set to: 2
316 10:53:08.333538 SPD index = 0
317 10:53:08.340287 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
318 10:53:08.343007 SPD: module type is LPDDR4X
319 10:53:08.346699 SPD: module part number is MT53E512M64D4NW-046
320 10:53:08.353275 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
321 10:53:08.356431 SPD: device width 16 bits, bus width 16 bits
322 10:53:08.363138 SPD: module size is 1024 MB (per channel)
323 10:53:08.795838 CBMEM:
324 10:53:08.798840 IMD: root @ 0x76fff000 254 entries.
325 10:53:08.802845 IMD: root @ 0x76ffec00 62 entries.
326 10:53:08.805916 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
327 10:53:08.812346 FMAP: area RW_VPD found @ f35000 (8192 bytes)
328 10:53:08.815732 External stage cache:
329 10:53:08.819524 IMD: root @ 0x7b3ff000 254 entries.
330 10:53:08.822415 IMD: root @ 0x7b3fec00 62 entries.
331 10:53:08.837990 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
332 10:53:08.844389 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 10:53:08.850732 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
334 10:53:08.864753 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 10:53:08.868372 cse_lite: Skip switching to RW in the recovery path
336 10:53:08.872514
337 10:53:08.873122 8 DIMMs found
338 10:53:08.873535 SMM Memory Map
339 10:53:08.876143 SMRAM : 0x7b000000 0x800000
340 10:53:08.879420 Subregion 0: 0x7b000000 0x200000
341 10:53:08.882266 Subregion 1: 0x7b200000 0x200000
342 10:53:08.886278 Subregion 2: 0x7b400000 0x400000
343 10:53:08.889243 top_of_ram = 0x77000000
344 10:53:08.896138 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
345 10:53:08.898951 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
346 10:53:08.905911 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
347 10:53:08.909834 MTRR Range: Start=ff000000 End=0 (Size 1000000)
348 10:53:08.919046 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
349 10:53:08.922411 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
350 10:53:08.934706 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
351 10:53:08.938198 Processing 211 relocs. Offset value of 0x74c0b000
352 10:53:08.941261
353 10:53:08.947727 BS: romstage times (exec / console): total (unknown) / 277 ms
354 10:53:08.953903
355 10:53:08.954482
356 10:53:08.963584 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
357 10:53:08.967541 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 10:53:08.977752 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 10:53:08.983590 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 10:53:08.990950 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
361 10:53:08.996828 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
362 10:53:09.044044 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
363 10:53:09.050619 Processing 5008 relocs. Offset value of 0x75d98000
364 10:53:09.053735 BS: postcar times (exec / console): total (unknown) / 59 ms
365 10:53:09.054225
366 10:53:09.057486
367 10:53:09.057973
368 10:53:09.067118 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
369 10:53:09.067611 Normal boot
370 10:53:09.070145 FW_CONFIG value is 0x804c02
371 10:53:09.073815 PCI: 00:07.0 disabled by fw_config
372 10:53:09.077378 PCI: 00:07.1 disabled by fw_config
373 10:53:09.080818 PCI: 00:0d.2 disabled by fw_config
374 10:53:09.083530 PCI: 00:1c.7 disabled by fw_config
375 10:53:09.090385 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 10:53:09.097286 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 10:53:09.099901 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 10:53:09.103481 GENERIC: 0.0 disabled by fw_config
379 10:53:09.106626 GENERIC: 1.0 disabled by fw_config
380 10:53:09.110541
381 10:53:09.113761 fw_config match found: DB_USB=USB3_ACTIVE
382 10:53:09.116382 fw_config match found: DB_USB=USB3_ACTIVE
383 10:53:09.120149 fw_config match found: DB_USB=USB3_ACTIVE
384 10:53:09.126808 fw_config match found: DB_USB=USB3_ACTIVE
385 10:53:09.129598 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 10:53:09.136586 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 10:53:09.146462 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 10:53:09.153445 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 10:53:09.156490 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 10:53:09.163039 microcode: Update skipped, already up-to-date
391 10:53:09.169621 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 10:53:09.197190 Detected 4 core, 8 thread CPU.
393 10:53:09.200274 Setting up SMI for CPU
394 10:53:09.204145 IED base = 0x7b400000
395 10:53:09.204661 IED size = 0x00400000
396 10:53:09.207206 Will perform SMM setup.
397 10:53:09.213711 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 10:53:09.220653 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 10:53:09.227152 Processing 16 relocs. Offset value of 0x00030000
400 10:53:09.230486 Attempting to start 7 APs
401 10:53:09.233880 Waiting for 10ms after sending INIT.
402 10:53:09.249143 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 10:53:09.252857 AP: slot 3 apic_id 7.
404 10:53:09.255662 AP: slot 7 apic_id 6.
405 10:53:09.256148 AP: slot 6 apic_id 2.
406 10:53:09.259988 AP: slot 2 apic_id 3.
407 10:53:09.262786 AP: slot 5 apic_id 4.
408 10:53:09.263323 done.
409 10:53:09.263710 AP: slot 4 apic_id 5.
410 10:53:09.269216 Waiting for 2nd SIPI to complete...done.
411 10:53:09.276611 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 10:53:09.282959 Processing 13 relocs. Offset value of 0x00038000
413 10:53:09.283566 Unable to locate Global NVS
414 10:53:09.292890 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 10:53:09.296033 Installing permanent SMM handler to 0x7b000000
416 10:53:09.305536 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 10:53:09.309626 Processing 794 relocs. Offset value of 0x7b010000
418 10:53:09.319115 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 10:53:09.322846 Processing 13 relocs. Offset value of 0x7b008000
420 10:53:09.329096 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 10:53:09.335618 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 10:53:09.339031 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 10:53:09.345596 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 10:53:09.352462 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 10:53:09.359182 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 10:53:09.362479 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 10:53:09.365400
428 10:53:09.365891 Unable to locate Global NVS
429 10:53:09.372426 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
430 10:53:09.377185 Clearing SMI status registers
431 10:53:09.381096 SMI_STS: PM1
432 10:53:09.381673 PM1_STS: PWRBTN
433 10:53:09.390661 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
434 10:53:09.391280 In relocation handler: CPU 0
435 10:53:09.397440 New SMBASE=0x7b000000 IEDBASE=0x7b400000
436 10:53:09.400260 Writing SMRR. base = 0x7b000006, mask=0xff800c00
437 10:53:09.403905 Relocation complete.
438 10:53:09.410677 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
439 10:53:09.414537 In relocation handler: CPU 1
440 10:53:09.417358 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
441 10:53:09.420560 Relocation complete.
442 10:53:09.427250 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
443 10:53:09.430428 In relocation handler: CPU 6
444 10:53:09.433487 New SMBASE=0x7affe800 IEDBASE=0x7b400000
445 10:53:09.440411 Writing SMRR. base = 0x7b000006, mask=0xff800c00
446 10:53:09.440990 Relocation complete.
447 10:53:09.447159 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
448 10:53:09.450281 In relocation handler: CPU 2
449 10:53:09.454122 New SMBASE=0x7afff800 IEDBASE=0x7b400000
450 10:53:09.456878 Relocation complete.
451 10:53:09.463827 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
452 10:53:09.467060 In relocation handler: CPU 3
453 10:53:09.470838 New SMBASE=0x7afff400 IEDBASE=0x7b400000
454 10:53:09.473946 Relocation complete.
455 10:53:09.480110 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
456 10:53:09.483693 In relocation handler: CPU 7
457 10:53:09.487104 New SMBASE=0x7affe400 IEDBASE=0x7b400000
458 10:53:09.494199 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 10:53:09.494778 Relocation complete.
460 10:53:09.497210
461 10:53:09.503664 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
462 10:53:09.507200 In relocation handler: CPU 5
463 10:53:09.510628 New SMBASE=0x7affec00 IEDBASE=0x7b400000
464 10:53:09.514014 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 10:53:09.517281 Relocation complete.
466 10:53:09.524234 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
467 10:53:09.527045 In relocation handler: CPU 4
468 10:53:09.530359 New SMBASE=0x7afff000 IEDBASE=0x7b400000
469 10:53:09.533708 Relocation complete.
470 10:53:09.534193 Initializing CPU #0
471 10:53:09.537504
472 10:53:09.537984 CPU: vendor Intel device 806c1
473 10:53:09.540883
474 10:53:09.541365 CPU: family 06, model 8c, stepping 01
475 10:53:09.544679
476 10:53:09.545163 Clearing out pending MCEs
477 10:53:09.547929 Setting up local APIC...
478 10:53:09.551487 apic_id: 0x00 done.
479 10:53:09.551971 Turbo is available but hidden
480 10:53:09.554582 Turbo is available and visible
481 10:53:09.561962 microcode: Update skipped, already up-to-date
482 10:53:09.562546 CPU #0 initialized
483 10:53:09.564980 Initializing CPU #5
484 10:53:09.567887 Initializing CPU #4
485 10:53:09.571304 CPU: vendor Intel device 806c1
486 10:53:09.574968 CPU: family 06, model 8c, stepping 01
487 10:53:09.578253 CPU: vendor Intel device 806c1
488 10:53:09.581292 CPU: family 06, model 8c, stepping 01
489 10:53:09.585323 Clearing out pending MCEs
490 10:53:09.585919 Clearing out pending MCEs
491 10:53:09.587929 Setting up local APIC...
492 10:53:09.591679 Initializing CPU #7
493 10:53:09.592270 Initializing CPU #3
494 10:53:09.594683 CPU: vendor Intel device 806c1
495 10:53:09.601346 CPU: family 06, model 8c, stepping 01
496 10:53:09.601916 CPU: vendor Intel device 806c1
497 10:53:09.608066 CPU: family 06, model 8c, stepping 01
498 10:53:09.608551 Clearing out pending MCEs
499 10:53:09.611226 Clearing out pending MCEs
500 10:53:09.614729 Setting up local APIC...
501 10:53:09.618005 Initializing CPU #6
502 10:53:09.618491 Initializing CPU #2
503 10:53:09.621272 CPU: vendor Intel device 806c1
504 10:53:09.624869 CPU: family 06, model 8c, stepping 01
505 10:53:09.627839 CPU: vendor Intel device 806c1
506 10:53:09.631403 CPU: family 06, model 8c, stepping 01
507 10:53:09.634454 Clearing out pending MCEs
508 10:53:09.637774 Clearing out pending MCEs
509 10:53:09.641544 Setting up local APIC...
510 10:53:09.642230 Setting up local APIC...
511 10:53:09.644508
512 10:53:09.644996 apic_id: 0x02 done.
513 10:53:09.647731 Setting up local APIC...
514 10:53:09.651129 Setting up local APIC...
515 10:53:09.651608 apic_id: 0x06 done.
516 10:53:09.655128 apic_id: 0x07 done.
517 10:53:09.657728 microcode: Update skipped, already up-to-date
518 10:53:09.661044 apic_id: 0x03 done.
519 10:53:09.664273 CPU #6 initialized
520 10:53:09.667578 microcode: Update skipped, already up-to-date
521 10:53:09.670762 microcode: Update skipped, already up-to-date
522 10:53:09.678215 microcode: Update skipped, already up-to-date
523 10:53:09.678808 CPU #7 initialized
524 10:53:09.680932 CPU #3 initialized
525 10:53:09.681410 CPU #2 initialized
526 10:53:09.684219
527 10:53:09.684701 Initializing CPU #1
528 10:53:09.687479 apic_id: 0x05 done.
529 10:53:09.687955 apic_id: 0x04 done.
530 10:53:09.694438 microcode: Update skipped, already up-to-date
531 10:53:09.697635 microcode: Update skipped, already up-to-date
532 10:53:09.701078 CPU #4 initialized
533 10:53:09.701581 CPU #5 initialized
534 10:53:09.704115 CPU: vendor Intel device 806c1
535 10:53:09.707628 CPU: family 06, model 8c, stepping 01
536 10:53:09.711318 Clearing out pending MCEs
537 10:53:09.714265 Setting up local APIC...
538 10:53:09.717884 apic_id: 0x01 done.
539 10:53:09.721272 microcode: Update skipped, already up-to-date
540 10:53:09.724222 CPU #1 initialized
541 10:53:09.727906 bsp_do_flight_plan done after 455 msecs.
542 10:53:09.730672 CPU: frequency set to 4000 MHz
543 10:53:09.731190 Enabling SMIs.
544 10:53:09.738348 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
545 10:53:09.754751 SATAXPCIE1 indicates PCIe NVMe is present
546 10:53:09.757861 Probing TPM: done!
547 10:53:09.761666 Connected to device vid:did:rid of 1ae0:0028:00
548 10:53:09.772588 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
549 10:53:09.775286 Initialized TPM device CR50 revision 0
550 10:53:09.778495 Enabling S0i3.4
551 10:53:09.785464 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 10:53:09.788976 Found a VBT of 8704 bytes after decompression
553 10:53:09.795447 cse_lite: CSE RO boot. HybridStorageMode disabled
554 10:53:09.801695 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 10:53:09.876692 FSPS returned 0
556 10:53:09.880452 Executing Phase 1 of FspMultiPhaseSiInit
557 10:53:09.890347 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 10:53:09.893149 port C0 DISC req: usage 1 usb3 1 usb2 5
559 10:53:09.896761 Raw Buffer output 0 00000511
560 10:53:09.899746 Raw Buffer output 1 00000000
561 10:53:09.903813 pmc_send_ipc_cmd succeeded
562 10:53:09.906760 port C1 DISC req: usage 1 usb3 2 usb2 3
563 10:53:09.910759
564 10:53:09.911365 Raw Buffer output 0 00000321
565 10:53:09.913615 Raw Buffer output 1 00000000
566 10:53:09.917976 pmc_send_ipc_cmd succeeded
567 10:53:09.923257 Detected 4 core, 8 thread CPU.
568 10:53:09.926441 Detected 4 core, 8 thread CPU.
569 10:53:10.161121 Display FSP Version Info HOB
570 10:53:10.164212 Reference Code - CPU = a.0.4c.31
571 10:53:10.167457 uCode Version = 0.0.0.86
572 10:53:10.171160 TXT ACM version = ff.ff.ff.ffff
573 10:53:10.174571 Reference Code - ME = a.0.4c.31
574 10:53:10.177457 MEBx version = 0.0.0.0
575 10:53:10.181103 ME Firmware Version = Consumer SKU
576 10:53:10.183986 Reference Code - PCH = a.0.4c.31
577 10:53:10.187477 PCH-CRID Status = Disabled
578 10:53:10.190713 PCH-CRID Original Value = ff.ff.ff.ffff
579 10:53:10.194450 PCH-CRID New Value = ff.ff.ff.ffff
580 10:53:10.197638 OPROM - RST - RAID = ff.ff.ff.ffff
581 10:53:10.200837 PCH Hsio Version = 4.0.0.0
582 10:53:10.204342 Reference Code - SA - System Agent = a.0.4c.31
583 10:53:10.207558 Reference Code - MRC = 2.0.0.1
584 10:53:10.210808 SA - PCIe Version = a.0.4c.31
585 10:53:10.214914 SA-CRID Status = Disabled
586 10:53:10.217533 SA-CRID Original Value = 0.0.0.1
587 10:53:10.220944 SA-CRID New Value = 0.0.0.1
588 10:53:10.224159 OPROM - VBIOS = ff.ff.ff.ffff
589 10:53:10.227433 IO Manageability Engine FW Version = 11.1.4.0
590 10:53:10.230797 PHY Build Version = 0.0.0.e0
591 10:53:10.234587 Thunderbolt(TM) FW Version = 0.0.0.0
592 10:53:10.241342 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
593 10:53:10.244525 ITSS IRQ Polarities Before:
594 10:53:10.245093 IPC0: 0xffffffff
595 10:53:10.247810 IPC1: 0xffffffff
596 10:53:10.248377 IPC2: 0xffffffff
597 10:53:10.250776 IPC3: 0xffffffff
598 10:53:10.254162 ITSS IRQ Polarities After:
599 10:53:10.254733 IPC0: 0xffffffff
600 10:53:10.257845 IPC1: 0xffffffff
601 10:53:10.258430 IPC2: 0xffffffff
602 10:53:10.261052 IPC3: 0xffffffff
603 10:53:10.264168 Found PCIe Root Port #9 at PCI: 00:1d.0.
604 10:53:10.277652 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
605 10:53:10.287992 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
606 10:53:10.300940 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
607 10:53:10.307198 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
608 10:53:10.307679 Enumerating buses...
609 10:53:10.314020 Show all devs... Before device enumeration.
610 10:53:10.314604 Root Device: enabled 1
611 10:53:10.317344 DOMAIN: 0000: enabled 1
612 10:53:10.320429 CPU_CLUSTER: 0: enabled 1
613 10:53:10.324527 PCI: 00:00.0: enabled 1
614 10:53:10.325114 PCI: 00:02.0: enabled 1
615 10:53:10.326998 PCI: 00:04.0: enabled 1
616 10:53:10.331252 PCI: 00:05.0: enabled 1
617 10:53:10.333795 PCI: 00:06.0: enabled 0
618 10:53:10.334269 PCI: 00:07.0: enabled 0
619 10:53:10.337437 PCI: 00:07.1: enabled 0
620 10:53:10.340819 PCI: 00:07.2: enabled 0
621 10:53:10.344477 PCI: 00:07.3: enabled 0
622 10:53:10.345052 PCI: 00:08.0: enabled 1
623 10:53:10.347502 PCI: 00:09.0: enabled 0
624 10:53:10.350243 PCI: 00:0a.0: enabled 0
625 10:53:10.354222 PCI: 00:0d.0: enabled 1
626 10:53:10.354806 PCI: 00:0d.1: enabled 0
627 10:53:10.357107 PCI: 00:0d.2: enabled 0
628 10:53:10.360555 PCI: 00:0d.3: enabled 0
629 10:53:10.361035 PCI: 00:0e.0: enabled 0
630 10:53:10.364052 PCI: 00:10.2: enabled 1
631 10:53:10.366988 PCI: 00:10.6: enabled 0
632 10:53:10.370500 PCI: 00:10.7: enabled 0
633 10:53:10.371012 PCI: 00:12.0: enabled 0
634 10:53:10.373468 PCI: 00:12.6: enabled 0
635 10:53:10.377360 PCI: 00:13.0: enabled 0
636 10:53:10.380273 PCI: 00:14.0: enabled 1
637 10:53:10.380895 PCI: 00:14.1: enabled 0
638 10:53:10.383695 PCI: 00:14.2: enabled 1
639 10:53:10.387454 PCI: 00:14.3: enabled 1
640 10:53:10.390099 PCI: 00:15.0: enabled 1
641 10:53:10.390635 PCI: 00:15.1: enabled 1
642 10:53:10.393444 PCI: 00:15.2: enabled 1
643 10:53:10.397021 PCI: 00:15.3: enabled 1
644 10:53:10.397607 PCI: 00:16.0: enabled 1
645 10:53:10.400216
646 10:53:10.400703 PCI: 00:16.1: enabled 0
647 10:53:10.403896 PCI: 00:16.2: enabled 0
648 10:53:10.406762 PCI: 00:16.3: enabled 0
649 10:53:10.407285 PCI: 00:16.4: enabled 0
650 10:53:10.410755 PCI: 00:16.5: enabled 0
651 10:53:10.413331 PCI: 00:17.0: enabled 1
652 10:53:10.416816 PCI: 00:19.0: enabled 0
653 10:53:10.417293 PCI: 00:19.1: enabled 1
654 10:53:10.419996 PCI: 00:19.2: enabled 0
655 10:53:10.423615 PCI: 00:1c.0: enabled 1
656 10:53:10.427519 PCI: 00:1c.1: enabled 0
657 10:53:10.428102 PCI: 00:1c.2: enabled 0
658 10:53:10.430498 PCI: 00:1c.3: enabled 0
659 10:53:10.433314 PCI: 00:1c.4: enabled 0
660 10:53:10.436775 PCI: 00:1c.5: enabled 0
661 10:53:10.437278 PCI: 00:1c.6: enabled 1
662 10:53:10.440687 PCI: 00:1c.7: enabled 0
663 10:53:10.443790 PCI: 00:1d.0: enabled 1
664 10:53:10.444364 PCI: 00:1d.1: enabled 0
665 10:53:10.446966 PCI: 00:1d.2: enabled 1
666 10:53:10.450248 PCI: 00:1d.3: enabled 0
667 10:53:10.453830 PCI: 00:1e.0: enabled 1
668 10:53:10.454403 PCI: 00:1e.1: enabled 0
669 10:53:10.456617 PCI: 00:1e.2: enabled 1
670 10:53:10.460313 PCI: 00:1e.3: enabled 1
671 10:53:10.464035 PCI: 00:1f.0: enabled 1
672 10:53:10.464600 PCI: 00:1f.1: enabled 0
673 10:53:10.466716 PCI: 00:1f.2: enabled 1
674 10:53:10.470577 PCI: 00:1f.3: enabled 1
675 10:53:10.473475 PCI: 00:1f.4: enabled 0
676 10:53:10.473955 PCI: 00:1f.5: enabled 1
677 10:53:10.477401 PCI: 00:1f.6: enabled 0
678 10:53:10.480036 PCI: 00:1f.7: enabled 0
679 10:53:10.480519 APIC: 00: enabled 1
680 10:53:10.483545 GENERIC: 0.0: enabled 1
681 10:53:10.487328 GENERIC: 0.0: enabled 1
682 10:53:10.489961 GENERIC: 1.0: enabled 1
683 10:53:10.490507 GENERIC: 0.0: enabled 1
684 10:53:10.493590 GENERIC: 1.0: enabled 1
685 10:53:10.496410 USB0 port 0: enabled 1
686 10:53:10.496966 GENERIC: 0.0: enabled 1
687 10:53:10.499783
688 10:53:10.500264 USB0 port 0: enabled 1
689 10:53:10.503539 GENERIC: 0.0: enabled 1
690 10:53:10.506788 I2C: 00:1a: enabled 1
691 10:53:10.507364 I2C: 00:31: enabled 1
692 10:53:10.509743 I2C: 00:32: enabled 1
693 10:53:10.513214 I2C: 00:10: enabled 1
694 10:53:10.513727 I2C: 00:15: enabled 1
695 10:53:10.517120 GENERIC: 0.0: enabled 0
696 10:53:10.519990 GENERIC: 1.0: enabled 0
697 10:53:10.523585 GENERIC: 0.0: enabled 1
698 10:53:10.524064 SPI: 00: enabled 1
699 10:53:10.526870 SPI: 00: enabled 1
700 10:53:10.527491 PNP: 0c09.0: enabled 1
701 10:53:10.530303 GENERIC: 0.0: enabled 1
702 10:53:10.533433 USB3 port 0: enabled 1
703 10:53:10.536392 USB3 port 1: enabled 1
704 10:53:10.536877 USB3 port 2: enabled 0
705 10:53:10.539845 USB3 port 3: enabled 0
706 10:53:10.543213 USB2 port 0: enabled 0
707 10:53:10.543862 USB2 port 1: enabled 1
708 10:53:10.546706 USB2 port 2: enabled 1
709 10:53:10.550713 USB2 port 3: enabled 0
710 10:53:10.551322 USB2 port 4: enabled 1
711 10:53:10.553242
712 10:53:10.553814 USB2 port 5: enabled 0
713 10:53:10.556681 USB2 port 6: enabled 0
714 10:53:10.559592 USB2 port 7: enabled 0
715 10:53:10.560168 USB2 port 8: enabled 0
716 10:53:10.563566 USB2 port 9: enabled 0
717 10:53:10.566214 USB3 port 0: enabled 0
718 10:53:10.566691 USB3 port 1: enabled 1
719 10:53:10.569647 USB3 port 2: enabled 0
720 10:53:10.572941 USB3 port 3: enabled 0
721 10:53:10.576774 GENERIC: 0.0: enabled 1
722 10:53:10.577338 GENERIC: 1.0: enabled 1
723 10:53:10.579814 APIC: 01: enabled 1
724 10:53:10.583029 APIC: 03: enabled 1
725 10:53:10.583507 APIC: 07: enabled 1
726 10:53:10.586834 APIC: 05: enabled 1
727 10:53:10.587449 APIC: 04: enabled 1
728 10:53:10.589796 APIC: 02: enabled 1
729 10:53:10.593201 APIC: 06: enabled 1
730 10:53:10.593676 Compare with tree...
731 10:53:10.596513 Root Device: enabled 1
732 10:53:10.599466 DOMAIN: 0000: enabled 1
733 10:53:10.602924 PCI: 00:00.0: enabled 1
734 10:53:10.603496 PCI: 00:02.0: enabled 1
735 10:53:10.606271 PCI: 00:04.0: enabled 1
736 10:53:10.609690 GENERIC: 0.0: enabled 1
737 10:53:10.612854 PCI: 00:05.0: enabled 1
738 10:53:10.616324 PCI: 00:06.0: enabled 0
739 10:53:10.616804 PCI: 00:07.0: enabled 0
740 10:53:10.619921 GENERIC: 0.0: enabled 1
741 10:53:10.623092 PCI: 00:07.1: enabled 0
742 10:53:10.626520 GENERIC: 1.0: enabled 1
743 10:53:10.629546 PCI: 00:07.2: enabled 0
744 10:53:10.630111 GENERIC: 0.0: enabled 1
745 10:53:10.632910 PCI: 00:07.3: enabled 0
746 10:53:10.636375 GENERIC: 1.0: enabled 1
747 10:53:10.639508 PCI: 00:08.0: enabled 1
748 10:53:10.643072 PCI: 00:09.0: enabled 0
749 10:53:10.643665 PCI: 00:0a.0: enabled 0
750 10:53:10.646328 PCI: 00:0d.0: enabled 1
751 10:53:10.650100 USB0 port 0: enabled 1
752 10:53:10.653167 USB3 port 0: enabled 1
753 10:53:10.656795 USB3 port 1: enabled 1
754 10:53:10.657362 USB3 port 2: enabled 0
755 10:53:10.659202 USB3 port 3: enabled 0
756 10:53:10.663258 PCI: 00:0d.1: enabled 0
757 10:53:10.666207 PCI: 00:0d.2: enabled 0
758 10:53:10.669274 GENERIC: 0.0: enabled 1
759 10:53:10.669781 PCI: 00:0d.3: enabled 0
760 10:53:10.672673
761 10:53:10.673152 PCI: 00:0e.0: enabled 0
762 10:53:10.675888 PCI: 00:10.2: enabled 1
763 10:53:10.679462 PCI: 00:10.6: enabled 0
764 10:53:10.682874 PCI: 00:10.7: enabled 0
765 10:53:10.683482 PCI: 00:12.0: enabled 0
766 10:53:10.686024 PCI: 00:12.6: enabled 0
767 10:53:10.689364 PCI: 00:13.0: enabled 0
768 10:53:10.692993 PCI: 00:14.0: enabled 1
769 10:53:10.696397 USB0 port 0: enabled 1
770 10:53:10.696874 USB2 port 0: enabled 0
771 10:53:10.699540 USB2 port 1: enabled 1
772 10:53:10.702357 USB2 port 2: enabled 1
773 10:53:10.705563 USB2 port 3: enabled 0
774 10:53:10.709185 USB2 port 4: enabled 1
775 10:53:10.712779 USB2 port 5: enabled 0
776 10:53:10.713255 USB2 port 6: enabled 0
777 10:53:10.716243 USB2 port 7: enabled 0
778 10:53:10.719356 USB2 port 8: enabled 0
779 10:53:10.722422 USB2 port 9: enabled 0
780 10:53:10.726195 USB3 port 0: enabled 0
781 10:53:10.729854 USB3 port 1: enabled 1
782 10:53:10.730434 USB3 port 2: enabled 0
783 10:53:10.732685 USB3 port 3: enabled 0
784 10:53:10.735730 PCI: 00:14.1: enabled 0
785 10:53:10.739459 PCI: 00:14.2: enabled 1
786 10:53:10.742997 PCI: 00:14.3: enabled 1
787 10:53:10.743475 GENERIC: 0.0: enabled 1
788 10:53:10.745885 PCI: 00:15.0: enabled 1
789 10:53:10.749155 I2C: 00:1a: enabled 1
790 10:53:10.752883 I2C: 00:31: enabled 1
791 10:53:10.753467 I2C: 00:32: enabled 1
792 10:53:10.756505 PCI: 00:15.1: enabled 1
793 10:53:10.759369 I2C: 00:10: enabled 1
794 10:53:10.762743 PCI: 00:15.2: enabled 1
795 10:53:10.766442 PCI: 00:15.3: enabled 1
796 10:53:10.767068 PCI: 00:16.0: enabled 1
797 10:53:10.769103 PCI: 00:16.1: enabled 0
798 10:53:10.772688 PCI: 00:16.2: enabled 0
799 10:53:10.776370 PCI: 00:16.3: enabled 0
800 10:53:10.779282 PCI: 00:16.4: enabled 0
801 10:53:10.779874 PCI: 00:16.5: enabled 0
802 10:53:10.783012 PCI: 00:17.0: enabled 1
803 10:53:10.786124 PCI: 00:19.0: enabled 0
804 10:53:10.789714 PCI: 00:19.1: enabled 1
805 10:53:10.790197 I2C: 00:15: enabled 1
806 10:53:10.793613 PCI: 00:19.2: enabled 0
807 10:53:10.797600 PCI: 00:1d.0: enabled 1
808 10:53:10.798091 GENERIC: 0.0: enabled 1
809 10:53:10.800599
810 10:53:10.801070 PCI: 00:1e.0: enabled 1
811 10:53:10.803675 PCI: 00:1e.1: enabled 0
812 10:53:10.806867 PCI: 00:1e.2: enabled 1
813 10:53:10.810176 SPI: 00: enabled 1
814 10:53:10.810648 PCI: 00:1e.3: enabled 1
815 10:53:10.813913 SPI: 00: enabled 1
816 10:53:10.817307 PCI: 00:1f.0: enabled 1
817 10:53:10.820379 PNP: 0c09.0: enabled 1
818 10:53:10.820908 PCI: 00:1f.1: enabled 0
819 10:53:10.823451 PCI: 00:1f.2: enabled 1
820 10:53:10.873807 GENERIC: 0.0: enabled 1
821 10:53:10.874435 GENERIC: 0.0: enabled 1
822 10:53:10.875200 GENERIC: 1.0: enabled 1
823 10:53:10.875585 PCI: 00:1f.3: enabled 1
824 10:53:10.875942 PCI: 00:1f.4: enabled 0
825 10:53:10.876270 PCI: 00:1f.5: enabled 1
826 10:53:10.876589 PCI: 00:1f.6: enabled 0
827 10:53:10.876902 PCI: 00:1f.7: enabled 0
828 10:53:10.877210 CPU_CLUSTER: 0: enabled 1
829 10:53:10.877516 APIC: 00: enabled 1
830 10:53:10.877822 APIC: 01: enabled 1
831 10:53:10.878127 APIC: 03: enabled 1
832 10:53:10.878429 APIC: 07: enabled 1
833 10:53:10.878727 APIC: 05: enabled 1
834 10:53:10.879062 APIC: 04: enabled 1
835 10:53:10.879368 APIC: 02: enabled 1
836 10:53:10.879668 APIC: 06: enabled 1
837 10:53:10.880341 Root Device scanning...
838 10:53:10.880694 scan_static_bus for Root Device
839 10:53:10.881000 DOMAIN: 0000 enabled
840 10:53:10.881650 CPU_CLUSTER: 0 enabled
841 10:53:10.882002 DOMAIN: 0000 scanning...
842 10:53:10.885042 PCI: pci_scan_bus for bus 00
843 10:53:10.888513 PCI: 00:00.0 [8086/0000] ops
844 10:53:10.891428 PCI: 00:00.0 [8086/9a12] enabled
845 10:53:10.894855 PCI: 00:02.0 [8086/0000] bus ops
846 10:53:10.897978 PCI: 00:02.0 [8086/9a40] enabled
847 10:53:10.901619 PCI: 00:04.0 [8086/0000] bus ops
848 10:53:10.904563 PCI: 00:04.0 [8086/9a03] enabled
849 10:53:10.908016 PCI: 00:05.0 [8086/9a19] enabled
850 10:53:10.911445 PCI: 00:07.0 [0000/0000] hidden
851 10:53:10.914509 PCI: 00:08.0 [8086/9a11] enabled
852 10:53:10.918544 PCI: 00:0a.0 [8086/9a0d] disabled
853 10:53:10.921280 PCI: 00:0d.0 [8086/0000] bus ops
854 10:53:10.925059 PCI: 00:0d.0 [8086/9a13] enabled
855 10:53:10.928206 PCI: 00:14.0 [8086/0000] bus ops
856 10:53:10.931591 PCI: 00:14.0 [8086/a0ed] enabled
857 10:53:10.935340 PCI: 00:14.2 [8086/a0ef] enabled
858 10:53:10.938417 PCI: 00:14.3 [8086/0000] bus ops
859 10:53:10.941926 PCI: 00:14.3 [8086/a0f0] enabled
860 10:53:10.944801 PCI: 00:15.0 [8086/0000] bus ops
861 10:53:10.948652 PCI: 00:15.0 [8086/a0e8] enabled
862 10:53:10.951547 PCI: 00:15.1 [8086/0000] bus ops
863 10:53:10.954688 PCI: 00:15.1 [8086/a0e9] enabled
864 10:53:10.958515 PCI: 00:15.2 [8086/0000] bus ops
865 10:53:10.961127 PCI: 00:15.2 [8086/a0ea] enabled
866 10:53:10.965155 PCI: 00:15.3 [8086/0000] bus ops
867 10:53:10.968316 PCI: 00:15.3 [8086/a0eb] enabled
868 10:53:10.971584 PCI: 00:16.0 [8086/0000] ops
869 10:53:10.974473 PCI: 00:16.0 [8086/a0e0] enabled
870 10:53:10.978057 PCI: Static device PCI: 00:17.0 not found, disabling it.
871 10:53:10.981733 PCI: 00:19.0 [8086/0000] bus ops
872 10:53:10.984705 PCI: 00:19.0 [8086/a0c5] disabled
873 10:53:10.987960 PCI: 00:19.1 [8086/0000] bus ops
874 10:53:10.991830 PCI: 00:19.1 [8086/a0c6] enabled
875 10:53:10.994992 PCI: 00:1d.0 [8086/0000] bus ops
876 10:53:10.998361 PCI: 00:1d.0 [8086/a0b0] enabled
877 10:53:11.001606 PCI: 00:1e.0 [8086/0000] ops
878 10:53:11.004742 PCI: 00:1e.0 [8086/a0a8] enabled
879 10:53:11.008047 PCI: 00:1e.2 [8086/0000] bus ops
880 10:53:11.011434 PCI: 00:1e.2 [8086/a0aa] enabled
881 10:53:11.014959 PCI: 00:1e.3 [8086/0000] bus ops
882 10:53:11.018614 PCI: 00:1e.3 [8086/a0ab] enabled
883 10:53:11.021268 PCI: 00:1f.0 [8086/0000] bus ops
884 10:53:11.025043 PCI: 00:1f.0 [8086/a087] enabled
885 10:53:11.028007 RTC Init
886 10:53:11.031497 Set power on after power failure.
887 10:53:11.031971 Disabling Deep S3
888 10:53:11.034529 Disabling Deep S3
889 10:53:11.034994 Disabling Deep S4
890 10:53:11.038049 Disabling Deep S4
891 10:53:11.038499 Disabling Deep S5
892 10:53:11.041066
893 10:53:11.041500 Disabling Deep S5
894 10:53:11.044536 PCI: 00:1f.2 [0000/0000] hidden
895 10:53:11.048281 PCI: 00:1f.3 [8086/0000] bus ops
896 10:53:11.051311 PCI: 00:1f.3 [8086/a0c8] enabled
897 10:53:11.055103 PCI: 00:1f.5 [8086/0000] bus ops
898 10:53:11.057840 PCI: 00:1f.5 [8086/a0a4] enabled
899 10:53:11.061728 PCI: Leftover static devices:
900 10:53:11.062274 PCI: 00:10.2
901 10:53:11.064960 PCI: 00:10.6
902 10:53:11.065504 PCI: 00:10.7
903 10:53:11.067814 PCI: 00:06.0
904 10:53:11.068250 PCI: 00:07.1
905 10:53:11.068607 PCI: 00:07.2
906 10:53:11.071325 PCI: 00:07.3
907 10:53:11.071796 PCI: 00:09.0
908 10:53:11.074628 PCI: 00:0d.1
909 10:53:11.075086 PCI: 00:0d.2
910 10:53:11.075435 PCI: 00:0d.3
911 10:53:11.078100
912 10:53:11.078660 PCI: 00:0e.0
913 10:53:11.079047 PCI: 00:12.0
914 10:53:11.081226 PCI: 00:12.6
915 10:53:11.081664 PCI: 00:13.0
916 10:53:11.084714 PCI: 00:14.1
917 10:53:11.085153 PCI: 00:16.1
918 10:53:11.085504 PCI: 00:16.2
919 10:53:11.087827 PCI: 00:16.3
920 10:53:11.088265 PCI: 00:16.4
921 10:53:11.091464 PCI: 00:16.5
922 10:53:11.092065 PCI: 00:17.0
923 10:53:11.092449 PCI: 00:19.2
924 10:53:11.094938 PCI: 00:1e.1
925 10:53:11.095534 PCI: 00:1f.1
926 10:53:11.098181 PCI: 00:1f.4
927 10:53:11.098669 PCI: 00:1f.6
928 10:53:11.099100 PCI: 00:1f.7
929 10:53:11.101341
930 10:53:11.101926 PCI: Check your devicetree.cb.
931 10:53:11.104537 PCI: 00:02.0 scanning...
932 10:53:11.108148 scan_generic_bus for PCI: 00:02.0
933 10:53:11.110859 scan_generic_bus for PCI: 00:02.0 done
934 10:53:11.114552
935 10:53:11.118171 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
936 10:53:11.121015 PCI: 00:04.0 scanning...
937 10:53:11.124196 scan_generic_bus for PCI: 00:04.0
938 10:53:11.124653 GENERIC: 0.0 enabled
939 10:53:11.131120 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
940 10:53:11.138162 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
941 10:53:11.138732 PCI: 00:0d.0 scanning...
942 10:53:11.141366 scan_static_bus for PCI: 00:0d.0
943 10:53:11.144766 USB0 port 0 enabled
944 10:53:11.147995 USB0 port 0 scanning...
945 10:53:11.151279 scan_static_bus for USB0 port 0
946 10:53:11.151837 USB3 port 0 enabled
947 10:53:11.154568
948 10:53:11.155045 USB3 port 1 enabled
949 10:53:11.158054 USB3 port 2 disabled
950 10:53:11.158595 USB3 port 3 disabled
951 10:53:11.161722 USB3 port 0 scanning...
952 10:53:11.164789 scan_static_bus for USB3 port 0
953 10:53:11.167580 scan_static_bus for USB3 port 0 done
954 10:53:11.174552 scan_bus: bus USB3 port 0 finished in 6 msecs
955 10:53:11.175131 USB3 port 1 scanning...
956 10:53:11.177491 scan_static_bus for USB3 port 1
957 10:53:11.184712 scan_static_bus for USB3 port 1 done
958 10:53:11.188070 scan_bus: bus USB3 port 1 finished in 6 msecs
959 10:53:11.191119 scan_static_bus for USB0 port 0 done
960 10:53:11.194357 scan_bus: bus USB0 port 0 finished in 43 msecs
961 10:53:11.201203 scan_static_bus for PCI: 00:0d.0 done
962 10:53:11.204195 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
963 10:53:11.208252 PCI: 00:14.0 scanning...
964 10:53:11.210980 scan_static_bus for PCI: 00:14.0
965 10:53:11.214860 USB0 port 0 enabled
966 10:53:11.215504 USB0 port 0 scanning...
967 10:53:11.217597 scan_static_bus for USB0 port 0
968 10:53:11.220971 USB2 port 0 disabled
969 10:53:11.224027 USB2 port 1 enabled
970 10:53:11.224478 USB2 port 2 enabled
971 10:53:11.227427 USB2 port 3 disabled
972 10:53:11.227953 USB2 port 4 enabled
973 10:53:11.230867 USB2 port 5 disabled
974 10:53:11.234742 USB2 port 6 disabled
975 10:53:11.235280 USB2 port 7 disabled
976 10:53:11.238153 USB2 port 8 disabled
977 10:53:11.240637 USB2 port 9 disabled
978 10:53:11.241110 USB3 port 0 disabled
979 10:53:11.244699 USB3 port 1 enabled
980 10:53:11.247355 USB3 port 2 disabled
981 10:53:11.247802 USB3 port 3 disabled
982 10:53:11.251605 USB2 port 1 scanning...
983 10:53:11.254665 scan_static_bus for USB2 port 1
984 10:53:11.258218 scan_static_bus for USB2 port 1 done
985 10:53:11.261228 scan_bus: bus USB2 port 1 finished in 6 msecs
986 10:53:11.264789
987 10:53:11.265335 USB2 port 2 scanning...
988 10:53:11.267807 scan_static_bus for USB2 port 2
989 10:53:11.271027 scan_static_bus for USB2 port 2 done
990 10:53:11.277908 scan_bus: bus USB2 port 2 finished in 6 msecs
991 10:53:11.278452 USB2 port 4 scanning...
992 10:53:11.281139
993 10:53:11.284425 scan_static_bus for USB2 port 4
994 10:53:11.287823 scan_static_bus for USB2 port 4 done
995 10:53:11.290474 scan_bus: bus USB2 port 4 finished in 6 msecs
996 10:53:11.293917 USB3 port 1 scanning...
997 10:53:11.297584 scan_static_bus for USB3 port 1
998 10:53:11.300472 scan_static_bus for USB3 port 1 done
999 10:53:11.304393 scan_bus: bus USB3 port 1 finished in 6 msecs
1000 10:53:11.307375 scan_static_bus for USB0 port 0 done
1001 10:53:11.313966 scan_bus: bus USB0 port 0 finished in 93 msecs
1002 10:53:11.317243 scan_static_bus for PCI: 00:14.0 done
1003 10:53:11.320749 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1004 10:53:11.324118 PCI: 00:14.3 scanning...
1005 10:53:11.327554 scan_static_bus for PCI: 00:14.3
1006 10:53:11.330739 GENERIC: 0.0 enabled
1007 10:53:11.334111 scan_static_bus for PCI: 00:14.3 done
1008 10:53:11.340325 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1009 10:53:11.340883 PCI: 00:15.0 scanning...
1010 10:53:11.344041 scan_static_bus for PCI: 00:15.0
1011 10:53:11.347573 I2C: 00:1a enabled
1012 10:53:11.350561 I2C: 00:31 enabled
1013 10:53:11.351169 I2C: 00:32 enabled
1014 10:53:11.354292 scan_static_bus for PCI: 00:15.0 done
1015 10:53:11.360806 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1016 10:53:11.361389 PCI: 00:15.1 scanning...
1017 10:53:11.364358 scan_static_bus for PCI: 00:15.1
1018 10:53:11.368155 I2C: 00:10 enabled
1019 10:53:11.371485 scan_static_bus for PCI: 00:15.1 done
1020 10:53:11.375144 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1021 10:53:11.378547 PCI: 00:15.2 scanning...
1022 10:53:11.381651 scan_static_bus for PCI: 00:15.2
1023 10:53:11.384891 scan_static_bus for PCI: 00:15.2 done
1024 10:53:11.391405 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1025 10:53:11.395050 PCI: 00:15.3 scanning...
1026 10:53:11.397911 scan_static_bus for PCI: 00:15.3
1027 10:53:11.401447 scan_static_bus for PCI: 00:15.3 done
1028 10:53:11.404475 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1029 10:53:11.407973 PCI: 00:19.1 scanning...
1030 10:53:11.411523 scan_static_bus for PCI: 00:19.1
1031 10:53:11.414449 I2C: 00:15 enabled
1032 10:53:11.417671 scan_static_bus for PCI: 00:19.1 done
1033 10:53:11.421757 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1034 10:53:11.424318 PCI: 00:1d.0 scanning...
1035 10:53:11.427949 do_pci_scan_bridge for PCI: 00:1d.0
1036 10:53:11.431486 PCI: pci_scan_bus for bus 01
1037 10:53:11.434348 PCI: 01:00.0 [1c5c/174a] enabled
1038 10:53:11.437872 GENERIC: 0.0 enabled
1039 10:53:11.441484 Enabling Common Clock Configuration
1040 10:53:11.444789 L1 Sub-State supported from root port 29
1041 10:53:11.448505 L1 Sub-State Support = 0xf
1042 10:53:11.451209 CommonModeRestoreTime = 0x28
1043 10:53:11.454635 Power On Value = 0x16, Power On Scale = 0x0
1044 10:53:11.457961 ASPM: Enabled L1
1045 10:53:11.461285 PCIe: Max_Payload_Size adjusted to 128
1046 10:53:11.464613 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1047 10:53:11.468123 PCI: 00:1e.2 scanning...
1048 10:53:11.471121 scan_generic_bus for PCI: 00:1e.2
1049 10:53:11.474793 SPI: 00 enabled
1050 10:53:11.477920 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1051 10:53:11.484785 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1052 10:53:11.487672 PCI: 00:1e.3 scanning...
1053 10:53:11.491538 scan_generic_bus for PCI: 00:1e.3
1054 10:53:11.492122 SPI: 00 enabled
1055 10:53:11.497573 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1056 10:53:11.504546 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1057 10:53:11.505139 PCI: 00:1f.0 scanning...
1058 10:53:11.507986 scan_static_bus for PCI: 00:1f.0
1059 10:53:11.510584 PNP: 0c09.0 enabled
1060 10:53:11.514434 PNP: 0c09.0 scanning...
1061 10:53:11.517321 scan_static_bus for PNP: 0c09.0
1062 10:53:11.520955 scan_static_bus for PNP: 0c09.0 done
1063 10:53:11.523898 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1064 10:53:11.527278 scan_static_bus for PCI: 00:1f.0 done
1065 10:53:11.534569 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1066 10:53:11.537286 PCI: 00:1f.2 scanning...
1067 10:53:11.540890 scan_static_bus for PCI: 00:1f.2
1068 10:53:11.541333 GENERIC: 0.0 enabled
1069 10:53:11.544156 GENERIC: 0.0 scanning...
1070 10:53:11.547414 scan_static_bus for GENERIC: 0.0
1071 10:53:11.550770 GENERIC: 0.0 enabled
1072 10:53:11.551346 GENERIC: 1.0 enabled
1073 10:53:11.557662 scan_static_bus for GENERIC: 0.0 done
1074 10:53:11.560741 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1075 10:53:11.564509 scan_static_bus for PCI: 00:1f.2 done
1076 10:53:11.570354 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1077 10:53:11.570932 PCI: 00:1f.3 scanning...
1078 10:53:11.573764 scan_static_bus for PCI: 00:1f.3
1079 10:53:11.581115 scan_static_bus for PCI: 00:1f.3 done
1080 10:53:11.584188 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1081 10:53:11.587576 PCI: 00:1f.5 scanning...
1082 10:53:11.590690 scan_generic_bus for PCI: 00:1f.5
1083 10:53:11.593789 scan_generic_bus for PCI: 00:1f.5 done
1084 10:53:11.597172 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1085 10:53:11.603758 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1086 10:53:11.607393 scan_static_bus for Root Device done
1087 10:53:11.610957 scan_bus: bus Root Device finished in 736 msecs
1088 10:53:11.613936
1089 10:53:11.614379 done
1090 10:53:11.620702 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1091 10:53:11.624160 Chrome EC: UHEPI supported
1092 10:53:11.630701 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1093 10:53:11.637428 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1094 10:53:11.640436 SPI flash protection: WPSW=0 SRP0=0
1095 10:53:11.643708 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1096 10:53:11.650683 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1097 10:53:11.654060 found VGA at PCI: 00:02.0
1098 10:53:11.657243 Setting up VGA for PCI: 00:02.0
1099 10:53:11.661037 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1100 10:53:11.667054 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1101 10:53:11.667589 Allocating resources...
1102 10:53:11.670766 Reading resources...
1103 10:53:11.673976 Root Device read_resources bus 0 link: 0
1104 10:53:11.681012 DOMAIN: 0000 read_resources bus 0 link: 0
1105 10:53:11.683961 PCI: 00:04.0 read_resources bus 1 link: 0
1106 10:53:11.690275 PCI: 00:04.0 read_resources bus 1 link: 0 done
1107 10:53:11.693888 PCI: 00:0d.0 read_resources bus 0 link: 0
1108 10:53:11.697335 USB0 port 0 read_resources bus 0 link: 0
1109 10:53:11.704856 USB0 port 0 read_resources bus 0 link: 0 done
1110 10:53:11.707571 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1111 10:53:11.714213 PCI: 00:14.0 read_resources bus 0 link: 0
1112 10:53:11.717708 USB0 port 0 read_resources bus 0 link: 0
1113 10:53:11.724379 USB0 port 0 read_resources bus 0 link: 0 done
1114 10:53:11.727792 PCI: 00:14.0 read_resources bus 0 link: 0 done
1115 10:53:11.734113 PCI: 00:14.3 read_resources bus 0 link: 0
1116 10:53:11.738258 PCI: 00:14.3 read_resources bus 0 link: 0 done
1117 10:53:11.744564 PCI: 00:15.0 read_resources bus 0 link: 0
1118 10:53:11.747892 PCI: 00:15.0 read_resources bus 0 link: 0 done
1119 10:53:11.754647 PCI: 00:15.1 read_resources bus 0 link: 0
1120 10:53:11.757867 PCI: 00:15.1 read_resources bus 0 link: 0 done
1121 10:53:11.764974 PCI: 00:19.1 read_resources bus 0 link: 0
1122 10:53:11.767983 PCI: 00:19.1 read_resources bus 0 link: 0 done
1123 10:53:11.775116 PCI: 00:1d.0 read_resources bus 1 link: 0
1124 10:53:11.778257 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1125 10:53:11.784844 PCI: 00:1e.2 read_resources bus 2 link: 0
1126 10:53:11.788540 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1127 10:53:11.794691 PCI: 00:1e.3 read_resources bus 3 link: 0
1128 10:53:11.798518 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1129 10:53:11.804539 PCI: 00:1f.0 read_resources bus 0 link: 0
1130 10:53:11.808083 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1131 10:53:11.810910 PCI: 00:1f.2 read_resources bus 0 link: 0
1132 10:53:11.817925 GENERIC: 0.0 read_resources bus 0 link: 0
1133 10:53:11.821368 GENERIC: 0.0 read_resources bus 0 link: 0 done
1134 10:53:11.828345 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1135 10:53:11.834567 DOMAIN: 0000 read_resources bus 0 link: 0 done
1136 10:53:11.838611 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1137 10:53:11.841202 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1138 10:53:11.844589
1139 10:53:11.848203 Root Device read_resources bus 0 link: 0 done
1140 10:53:11.850984 Done reading resources.
1141 10:53:11.854483 Show resources in subtree (Root Device)...After reading.
1142 10:53:11.861054 Root Device child on link 0 DOMAIN: 0000
1143 10:53:11.864565 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1144 10:53:11.874490 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1145 10:53:11.884422 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1146 10:53:11.885031 PCI: 00:00.0
1147 10:53:11.894196 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1148 10:53:11.904242 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1149 10:53:11.914208 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1150 10:53:11.924019 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1151 10:53:11.934015 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1152 10:53:11.940862 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1153 10:53:11.951203 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1154 10:53:11.960686 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1155 10:53:11.970773 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1156 10:53:11.980061 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1157 10:53:11.987063 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1158 10:53:11.997404 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1159 10:53:12.007079 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1160 10:53:12.017315 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1161 10:53:12.026978 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1162 10:53:12.033436 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1163 10:53:12.036718
1164 10:53:12.046802 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 10:53:12.053568 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 10:53:12.063474 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 10:53:12.073012 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 10:53:12.076773 PCI: 00:02.0
1169 10:53:12.086783 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 10:53:12.096699 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 10:53:12.103441 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 10:53:12.110101 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 10:53:12.119957 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 10:53:12.120455 GENERIC: 0.0
1175 10:53:12.122767 PCI: 00:05.0
1176 10:53:12.132850 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 10:53:12.136578 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 10:53:12.139435 GENERIC: 0.0
1179 10:53:12.139878 PCI: 00:08.0
1180 10:53:12.149237 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 10:53:12.152896 PCI: 00:0a.0
1182 10:53:12.156307 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 10:53:12.166066 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 10:53:12.169855 USB0 port 0 child on link 0 USB3 port 0
1185 10:53:12.173105 USB3 port 0
1186 10:53:12.173608 USB3 port 1
1187 10:53:12.176249 USB3 port 2
1188 10:53:12.176739 USB3 port 3
1189 10:53:12.179545
1190 10:53:12.183083 PCI: 00:14.0 child on link 0 USB0 port 0
1191 10:53:12.192961 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 10:53:12.196351 USB0 port 0 child on link 0 USB2 port 0
1193 10:53:12.199467 USB2 port 0
1194 10:53:12.200053 USB2 port 1
1195 10:53:12.202927 USB2 port 2
1196 10:53:12.203523 USB2 port 3
1197 10:53:12.206137 USB2 port 4
1198 10:53:12.206728 USB2 port 5
1199 10:53:12.209445 USB2 port 6
1200 10:53:12.210037 USB2 port 7
1201 10:53:12.212534 USB2 port 8
1202 10:53:12.213033 USB2 port 9
1203 10:53:12.216156 USB3 port 0
1204 10:53:12.219718 USB3 port 1
1205 10:53:12.220232 USB3 port 2
1206 10:53:12.222472 USB3 port 3
1207 10:53:12.222989 PCI: 00:14.2
1208 10:53:12.232984 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 10:53:12.242932 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1210 10:53:12.246275 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 10:53:12.256142 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 10:53:12.259474 GENERIC: 0.0
1213 10:53:12.263129 PCI: 00:15.0 child on link 0 I2C: 00:1a
1214 10:53:12.272670 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 10:53:12.276285 I2C: 00:1a
1216 10:53:12.276986 I2C: 00:31
1217 10:53:12.279593 I2C: 00:32
1218 10:53:12.283060 PCI: 00:15.1 child on link 0 I2C: 00:10
1219 10:53:12.292996 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 10:53:12.293587 I2C: 00:10
1221 10:53:12.296332 PCI: 00:15.2
1222 10:53:12.306201 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 10:53:12.306786 PCI: 00:15.3
1224 10:53:12.315720 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 10:53:12.319104 PCI: 00:16.0
1226 10:53:12.329410 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 10:53:12.329901 PCI: 00:19.0
1228 10:53:12.336036 PCI: 00:19.1 child on link 0 I2C: 00:15
1229 10:53:12.345531 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 10:53:12.346019 I2C: 00:15
1231 10:53:12.352678 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1232 10:53:12.359133 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1233 10:53:12.368766 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1234 10:53:12.379134 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1235 10:53:12.379722 GENERIC: 0.0
1236 10:53:12.382950 PCI: 01:00.0
1237 10:53:12.392609 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1238 10:53:12.402444 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1239 10:53:12.412461 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1240 10:53:12.413274 PCI: 00:1e.0
1241 10:53:12.422176 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1242 10:53:12.428742 PCI: 00:1e.2 child on link 0 SPI: 00
1243 10:53:12.438979 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 10:53:12.439585 SPI: 00
1245 10:53:12.442016 PCI: 00:1e.3 child on link 0 SPI: 00
1246 10:53:12.452074 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 10:53:12.455492 SPI: 00
1248 10:53:12.458662 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1249 10:53:12.465043 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1250 10:53:12.468505
1251 10:53:12.469168 PNP: 0c09.0
1252 10:53:12.478497 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1253 10:53:12.481915 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1254 10:53:12.491899 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1255 10:53:12.502128 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1256 10:53:12.505202 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1257 10:53:12.508572 GENERIC: 0.0
1258 10:53:12.509078 GENERIC: 1.0
1259 10:53:12.512286 PCI: 00:1f.3
1260 10:53:12.521734 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1261 10:53:12.531572 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1262 10:53:12.532012 PCI: 00:1f.5
1263 10:53:12.541987 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1264 10:53:12.544751 CPU_CLUSTER: 0 child on link 0 APIC: 00
1265 10:53:12.548098 APIC: 00
1266 10:53:12.548658 APIC: 01
1267 10:53:12.549060 APIC: 03
1268 10:53:12.551786 APIC: 07
1269 10:53:12.552270 APIC: 05
1270 10:53:12.552646 APIC: 04
1271 10:53:12.554785
1272 10:53:12.555388 APIC: 02
1273 10:53:12.555773 APIC: 06
1274 10:53:12.564902 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1275 10:53:12.568215 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1276 10:53:12.574535 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1277 10:53:12.581036 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1278 10:53:12.584668 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1279 10:53:12.591838 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1280 10:53:12.594768 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1281 10:53:12.601651 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1282 10:53:12.608319 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1283 10:53:12.618031 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1284 10:53:12.624553 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1285 10:53:12.630944 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1286 10:53:12.637570 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1287 10:53:12.644469 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1288 10:53:12.650935 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1289 10:53:12.654365 DOMAIN: 0000: Resource ranges:
1290 10:53:12.657672 * Base: 1000, Size: 800, Tag: 100
1291 10:53:12.664400 * Base: 1900, Size: e700, Tag: 100
1292 10:53:12.667423 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1293 10:53:12.674080 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1294 10:53:12.680669 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1295 10:53:12.691261 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1296 10:53:12.698063 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1297 10:53:12.703989 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1298 10:53:12.713659 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1299 10:53:12.721044 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1300 10:53:12.727194 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1301 10:53:12.733714 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1302 10:53:12.737064
1303 10:53:12.743998 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 10:53:12.750567 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 10:53:12.756964 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 10:53:12.766794 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 10:53:12.773360 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 10:53:12.780303 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 10:53:12.790497 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 10:53:12.796750 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 10:53:12.804157 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 10:53:12.813641 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1313 10:53:12.820064 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 10:53:12.827398 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 10:53:12.837029 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 10:53:12.843697 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 10:53:12.850050 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 10:53:12.853595 DOMAIN: 0000: Resource ranges:
1319 10:53:12.860183 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 10:53:12.863133 * Base: d0000000, Size: 28000000, Tag: 200
1321 10:53:12.866804 * Base: fa000000, Size: 1000000, Tag: 200
1322 10:53:12.873334 * Base: fb001000, Size: 2fff000, Tag: 200
1323 10:53:12.876631 * Base: fe010000, Size: 2e000, Tag: 200
1324 10:53:12.880421 * Base: fe03f000, Size: d41000, Tag: 200
1325 10:53:12.883378 * Base: fed88000, Size: 8000, Tag: 200
1326 10:53:12.886485 * Base: fed93000, Size: d000, Tag: 200
1327 10:53:12.893790 * Base: feda2000, Size: 1e000, Tag: 200
1328 10:53:12.896661 * Base: fede0000, Size: 1220000, Tag: 200
1329 10:53:12.900351 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1330 10:53:12.903393
1331 10:53:12.910024 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1332 10:53:12.916424 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1333 10:53:12.922859 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1334 10:53:12.930159 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1335 10:53:12.936408 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1336 10:53:12.943219 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1337 10:53:12.949406 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1338 10:53:12.956191 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1339 10:53:12.962833 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1340 10:53:12.969256 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1341 10:53:12.976533 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1342 10:53:12.983310 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1343 10:53:12.989837 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1344 10:53:12.996525 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1345 10:53:13.002643 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1346 10:53:13.009375 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1347 10:53:13.016118 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1348 10:53:13.022711 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1349 10:53:13.028969 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1350 10:53:13.035655 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1351 10:53:13.042510 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1352 10:53:13.048951 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1353 10:53:13.055778 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1354 10:53:13.062270 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1355 10:53:13.065693 PCI: 00:1d.0: Resource ranges:
1356 10:53:13.069113 * Base: 7fc00000, Size: 100000, Tag: 200
1357 10:53:13.076066 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1358 10:53:13.082379 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1359 10:53:13.089003 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1360 10:53:13.099421 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1361 10:53:13.105532 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1362 10:53:13.109081 Root Device assign_resources, bus 0 link: 0
1363 10:53:13.116348 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 10:53:13.122604 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1365 10:53:13.132424 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1366 10:53:13.138969 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1367 10:53:13.148630 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1368 10:53:13.152374 PCI: 00:04.0 assign_resources, bus 1 link: 0
1369 10:53:13.156056 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 10:53:13.159001
1371 10:53:13.165405 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1372 10:53:13.171918 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1373 10:53:13.182876 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1374 10:53:13.185976 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 10:53:13.192269 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1376 10:53:13.199175 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1377 10:53:13.202725 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 10:53:13.205558
1379 10:53:13.209233 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 10:53:13.215870 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1381 10:53:13.225687 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1382 10:53:13.232286 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1383 10:53:13.238753 PCI: 00:14.3 assign_resources, bus 0 link: 0
1384 10:53:13.242060 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 10:53:13.252358 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1386 10:53:13.255395 PCI: 00:15.0 assign_resources, bus 0 link: 0
1387 10:53:13.258781 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 10:53:13.268634 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1389 10:53:13.272378 PCI: 00:15.1 assign_resources, bus 0 link: 0
1390 10:53:13.278445 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 10:53:13.285317 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1392 10:53:13.295425 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1393 10:53:13.302452 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1394 10:53:13.312303 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1395 10:53:13.315435 PCI: 00:19.1 assign_resources, bus 0 link: 0
1396 10:53:13.318407 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 10:53:13.328059 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1398 10:53:13.338255 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1399 10:53:13.348353 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1400 10:53:13.351610 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1401 10:53:13.358098 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1402 10:53:13.368474 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1403 10:53:13.374997 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1404 10:53:13.378060 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 10:53:13.381567
1406 10:53:13.388152 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 10:53:13.391651 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 10:53:13.398194 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 10:53:13.404876 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 10:53:13.411563 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 10:53:13.415198 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 10:53:13.417942 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 10:53:13.421658
1414 10:53:13.424880 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 10:53:13.427914 LPC: Trying to open IO window from 800 size 1ff
1416 10:53:13.438422 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1417 10:53:13.444902 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1418 10:53:13.455068 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1419 10:53:13.458687 DOMAIN: 0000 assign_resources, bus 0 link: 0
1420 10:53:13.465210 Root Device assign_resources, bus 0 link: 0
1421 10:53:13.465798 Done setting resources.
1422 10:53:13.471487 Show resources in subtree (Root Device)...After assigning values.
1423 10:53:13.477936 Root Device child on link 0 DOMAIN: 0000
1424 10:53:13.481501 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1425 10:53:13.491631 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1426 10:53:13.501877 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1427 10:53:13.502470 PCI: 00:00.0
1428 10:53:13.511427 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1429 10:53:13.521215 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1430 10:53:13.531301 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1431 10:53:13.541512 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1432 10:53:13.547932 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1433 10:53:13.558206 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1434 10:53:13.567866 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1435 10:53:13.577172 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1436 10:53:13.587832 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1437 10:53:13.594377 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1438 10:53:13.604757 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1439 10:53:13.614359 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1440 10:53:13.624359 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1441 10:53:13.634231 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1442 10:53:13.640460 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1443 10:53:13.651114 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1444 10:53:13.660430 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1445 10:53:13.670750 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1446 10:53:13.680591 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1447 10:53:13.690169 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1448 10:53:13.690663 PCI: 00:02.0
1449 10:53:13.703997 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1450 10:53:13.714356 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1451 10:53:13.723828 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1452 10:53:13.727413 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1453 10:53:13.736875 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1454 10:53:13.740800 GENERIC: 0.0
1455 10:53:13.741283 PCI: 00:05.0
1456 10:53:13.750281 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1457 10:53:13.757038 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1458 10:53:13.757633 GENERIC: 0.0
1459 10:53:13.760149 PCI: 00:08.0
1460 10:53:13.770084 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1461 10:53:13.770687 PCI: 00:0a.0
1462 10:53:13.776743 PCI: 00:0d.0 child on link 0 USB0 port 0
1463 10:53:13.786811 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1464 10:53:13.790261 USB0 port 0 child on link 0 USB3 port 0
1465 10:53:13.793691 USB3 port 0
1466 10:53:13.794271 USB3 port 1
1467 10:53:13.797290 USB3 port 2
1468 10:53:13.797869 USB3 port 3
1469 10:53:13.803891 PCI: 00:14.0 child on link 0 USB0 port 0
1470 10:53:13.813802 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1471 10:53:13.817280 USB0 port 0 child on link 0 USB2 port 0
1472 10:53:13.819887 USB2 port 0
1473 10:53:13.820491 USB2 port 1
1474 10:53:13.823190 USB2 port 2
1475 10:53:13.823705 USB2 port 3
1476 10:53:13.827245 USB2 port 4
1477 10:53:13.827859 USB2 port 5
1478 10:53:13.829897 USB2 port 6
1479 10:53:13.830382 USB2 port 7
1480 10:53:13.834072 USB2 port 8
1481 10:53:13.834686 USB2 port 9
1482 10:53:13.836468 USB3 port 0
1483 10:53:13.836981 USB3 port 1
1484 10:53:13.839877 USB3 port 2
1485 10:53:13.840365 USB3 port 3
1486 10:53:13.843071 PCI: 00:14.2
1487 10:53:13.853424 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1488 10:53:13.863294 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1489 10:53:13.870254 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1490 10:53:13.879637 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1491 10:53:13.880220 GENERIC: 0.0
1492 10:53:13.883239 PCI: 00:15.0 child on link 0 I2C: 00:1a
1493 10:53:13.896410 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1494 10:53:13.896993 I2C: 00:1a
1495 10:53:13.899933 I2C: 00:31
1496 10:53:13.900428 I2C: 00:32
1497 10:53:13.902987 PCI: 00:15.1 child on link 0 I2C: 00:10
1498 10:53:13.912987 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1499 10:53:13.916474 I2C: 00:10
1500 10:53:13.917053 PCI: 00:15.2
1501 10:53:13.926676 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1502 10:53:13.929725
1503 10:53:13.930215 PCI: 00:15.3
1504 10:53:13.939467 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 10:53:13.943043 PCI: 00:16.0
1506 10:53:13.952982 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 10:53:13.953588 PCI: 00:19.0
1508 10:53:13.959489 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 10:53:13.969486 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 10:53:13.970009 I2C: 00:15
1511 10:53:13.972839 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 10:53:13.982564 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 10:53:13.996294 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 10:53:14.006622 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 10:53:14.007250 GENERIC: 0.0
1516 10:53:14.009598 PCI: 01:00.0
1517 10:53:14.019504 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 10:53:14.029448 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1519 10:53:14.039157 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1520 10:53:14.042606 PCI: 00:1e.0
1521 10:53:14.052687 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1522 10:53:14.056057 PCI: 00:1e.2 child on link 0 SPI: 00
1523 10:53:14.068845 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1524 10:53:14.069293 SPI: 00
1525 10:53:14.072446 PCI: 00:1e.3 child on link 0 SPI: 00
1526 10:53:14.082392 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1527 10:53:14.086101 SPI: 00
1528 10:53:14.088960 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1529 10:53:14.099038 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1530 10:53:14.099665 PNP: 0c09.0
1531 10:53:14.108989 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1532 10:53:14.112688 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1533 10:53:14.122071 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1534 10:53:14.132455 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1535 10:53:14.135719 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1536 10:53:14.138767 GENERIC: 0.0
1537 10:53:14.139230 GENERIC: 1.0
1538 10:53:14.142562 PCI: 00:1f.3
1539 10:53:14.152556 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1540 10:53:14.161951 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1541 10:53:14.162524 PCI: 00:1f.5
1542 10:53:14.175945 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1543 10:53:14.179070 CPU_CLUSTER: 0 child on link 0 APIC: 00
1544 10:53:14.179703 APIC: 00
1545 10:53:14.182549 APIC: 01
1546 10:53:14.183058 APIC: 03
1547 10:53:14.183432 APIC: 07
1548 10:53:14.185504 APIC: 05
1549 10:53:14.185973 APIC: 04
1550 10:53:14.186344 APIC: 02
1551 10:53:14.188792
1552 10:53:14.189375 APIC: 06
1553 10:53:14.192178 Done allocating resources.
1554 10:53:14.198710 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1555 10:53:14.201698 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1556 10:53:14.205421 Configure GPIOs for I2S audio on UP4.
1557 10:53:14.209223
1558 10:53:14.215751 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1559 10:53:14.216321 Enabling resources...
1560 10:53:14.222158 PCI: 00:00.0 subsystem <- 8086/9a12
1561 10:53:14.222787 PCI: 00:00.0 cmd <- 06
1562 10:53:14.225725 PCI: 00:02.0 subsystem <- 8086/9a40
1563 10:53:14.228792 PCI: 00:02.0 cmd <- 03
1564 10:53:14.232351 PCI: 00:04.0 subsystem <- 8086/9a03
1565 10:53:14.235514 PCI: 00:04.0 cmd <- 02
1566 10:53:14.238433 PCI: 00:05.0 subsystem <- 8086/9a19
1567 10:53:14.242401 PCI: 00:05.0 cmd <- 02
1568 10:53:14.245841 PCI: 00:08.0 subsystem <- 8086/9a11
1569 10:53:14.248718 PCI: 00:08.0 cmd <- 06
1570 10:53:14.251877 PCI: 00:0d.0 subsystem <- 8086/9a13
1571 10:53:14.255003 PCI: 00:0d.0 cmd <- 02
1572 10:53:14.259135 PCI: 00:14.0 subsystem <- 8086/a0ed
1573 10:53:14.259711 PCI: 00:14.0 cmd <- 02
1574 10:53:14.265436 PCI: 00:14.2 subsystem <- 8086/a0ef
1575 10:53:14.266021 PCI: 00:14.2 cmd <- 02
1576 10:53:14.268783 PCI: 00:14.3 subsystem <- 8086/a0f0
1577 10:53:14.271726 PCI: 00:14.3 cmd <- 02
1578 10:53:14.275398 PCI: 00:15.0 subsystem <- 8086/a0e8
1579 10:53:14.278576 PCI: 00:15.0 cmd <- 02
1580 10:53:14.281690 PCI: 00:15.1 subsystem <- 8086/a0e9
1581 10:53:14.285317 PCI: 00:15.1 cmd <- 02
1582 10:53:14.288997 PCI: 00:15.2 subsystem <- 8086/a0ea
1583 10:53:14.292037 PCI: 00:15.2 cmd <- 02
1584 10:53:14.294926 PCI: 00:15.3 subsystem <- 8086/a0eb
1585 10:53:14.298471 PCI: 00:15.3 cmd <- 02
1586 10:53:14.301990 PCI: 00:16.0 subsystem <- 8086/a0e0
1587 10:53:14.302570 PCI: 00:16.0 cmd <- 02
1588 10:53:14.305472
1589 10:53:14.308318 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 10:53:14.308819 PCI: 00:19.1 cmd <- 02
1591 10:53:14.312297 PCI: 00:1d.0 bridge ctrl <- 0013
1592 10:53:14.318417 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 10:53:14.319035 PCI: 00:1d.0 cmd <- 06
1594 10:53:14.321926 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 10:53:14.324729 PCI: 00:1e.0 cmd <- 06
1596 10:53:14.328778 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 10:53:14.331538 PCI: 00:1e.2 cmd <- 06
1598 10:53:14.335518 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 10:53:14.338373 PCI: 00:1e.3 cmd <- 02
1600 10:53:14.342046 PCI: 00:1f.0 subsystem <- 8086/a087
1601 10:53:14.344860 PCI: 00:1f.0 cmd <- 407
1602 10:53:14.348793 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 10:53:14.351568 PCI: 00:1f.3 cmd <- 02
1604 10:53:14.355055 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 10:53:14.358316 PCI: 00:1f.5 cmd <- 406
1606 10:53:14.361728 PCI: 01:00.0 cmd <- 02
1607 10:53:14.366059 done.
1608 10:53:14.368703 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 10:53:14.372236 Initializing devices...
1610 10:53:14.375623 Root Device init
1611 10:53:14.379162 Chrome EC: Set SMI mask to 0x0000000000000000
1612 10:53:14.385434 Chrome EC: clear events_b mask to 0x0000000000000000
1613 10:53:14.392082 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 10:53:14.398341 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 10:53:14.404909 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 10:53:14.408402 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 10:53:14.412158
1618 10:53:14.415407 fw_config match found: DB_USB=USB3_ACTIVE
1619 10:53:14.421682 Configure Right Type-C port orientation for retimer
1620 10:53:14.425316 Root Device init finished in 46 msecs
1621 10:53:14.428422 PCI: 00:00.0 init
1622 10:53:14.431582 CPU TDP = 9 Watts
1623 10:53:14.432067 CPU PL1 = 9 Watts
1624 10:53:14.435073 CPU PL2 = 40 Watts
1625 10:53:14.435512 CPU PL4 = 83 Watts
1626 10:53:14.441908 PCI: 00:00.0 init finished in 8 msecs
1627 10:53:14.442499 PCI: 00:02.0 init
1628 10:53:14.444783 GMA: Found VBT in CBFS
1629 10:53:14.448711 GMA: Found valid VBT in CBFS
1630 10:53:14.454802 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 10:53:14.461212 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 10:53:14.465116 PCI: 00:02.0 init finished in 18 msecs
1633 10:53:14.467776 PCI: 00:05.0 init
1634 10:53:14.471099 PCI: 00:05.0 init finished in 0 msecs
1635 10:53:14.474734 PCI: 00:08.0 init
1636 10:53:14.478026 PCI: 00:08.0 init finished in 0 msecs
1637 10:53:14.481236 PCI: 00:14.0 init
1638 10:53:14.485047 PCI: 00:14.0 init finished in 0 msecs
1639 10:53:14.485534 PCI: 00:14.2 init
1640 10:53:14.491761 PCI: 00:14.2 init finished in 0 msecs
1641 10:53:14.492350 PCI: 00:15.0 init
1642 10:53:14.494454 I2C bus 0 version 0x3230302a
1643 10:53:14.497973 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 10:53:14.501271 PCI: 00:15.0 init finished in 6 msecs
1645 10:53:14.504801 PCI: 00:15.1 init
1646 10:53:14.508544 I2C bus 1 version 0x3230302a
1647 10:53:14.511234 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 10:53:14.515038 PCI: 00:15.1 init finished in 6 msecs
1649 10:53:14.518206 PCI: 00:15.2 init
1650 10:53:14.521857 I2C bus 2 version 0x3230302a
1651 10:53:14.524560 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 10:53:14.528170 PCI: 00:15.2 init finished in 6 msecs
1653 10:53:14.531091 PCI: 00:15.3 init
1654 10:53:14.535340 I2C bus 3 version 0x3230302a
1655 10:53:14.538185 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 10:53:14.541956 PCI: 00:15.3 init finished in 6 msecs
1657 10:53:14.542539 PCI: 00:16.0 init
1658 10:53:14.548113 PCI: 00:16.0 init finished in 0 msecs
1659 10:53:14.548693 PCI: 00:19.1 init
1660 10:53:14.551562 I2C bus 5 version 0x3230302a
1661 10:53:14.554519 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 10:53:14.561364 PCI: 00:19.1 init finished in 6 msecs
1663 10:53:14.561933 PCI: 00:1d.0 init
1664 10:53:14.564813 Initializing PCH PCIe bridge.
1665 10:53:14.567796 PCI: 00:1d.0 init finished in 3 msecs
1666 10:53:14.571917 PCI: 00:1f.0 init
1667 10:53:14.575659 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 10:53:14.581792 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 10:53:14.582284 IOAPIC: ID = 0x02
1670 10:53:14.585040 IOAPIC: Dumping registers
1671 10:53:14.588548 reg 0x0000: 0x02000000
1672 10:53:14.592555 reg 0x0001: 0x00770020
1673 10:53:14.593146 reg 0x0002: 0x00000000
1674 10:53:14.598223 PCI: 00:1f.0 init finished in 21 msecs
1675 10:53:14.598706 PCI: 00:1f.2 init
1676 10:53:14.601073 Disabling ACPI via APMC.
1677 10:53:14.605297 APMC done.
1678 10:53:14.607974 PCI: 00:1f.2 init finished in 5 msecs
1679 10:53:14.620102 PCI: 01:00.0 init
1680 10:53:14.623145 PCI: 01:00.0 init finished in 0 msecs
1681 10:53:14.626878 PNP: 0c09.0 init
1682 10:53:14.629838 Google Chrome EC uptime: 8.398 seconds
1683 10:53:14.636648 Google Chrome AP resets since EC boot: 1
1684 10:53:14.639504 Google Chrome most recent AP reset causes:
1685 10:53:14.643157 0.349: 32775 shutdown: entering G3
1686 10:53:14.650284 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 10:53:14.653011 PNP: 0c09.0 init finished in 22 msecs
1688 10:53:14.658932 Devices initialized
1689 10:53:14.662251 Show all devs... After init.
1690 10:53:14.665450 Root Device: enabled 1
1691 10:53:14.666053 DOMAIN: 0000: enabled 1
1692 10:53:14.668856 CPU_CLUSTER: 0: enabled 1
1693 10:53:14.672067 PCI: 00:00.0: enabled 1
1694 10:53:14.675622 PCI: 00:02.0: enabled 1
1695 10:53:14.676110 PCI: 00:04.0: enabled 1
1696 10:53:14.678636 PCI: 00:05.0: enabled 1
1697 10:53:14.681779 PCI: 00:06.0: enabled 0
1698 10:53:14.685410 PCI: 00:07.0: enabled 0
1699 10:53:14.686004 PCI: 00:07.1: enabled 0
1700 10:53:14.688666 PCI: 00:07.2: enabled 0
1701 10:53:14.691880 PCI: 00:07.3: enabled 0
1702 10:53:14.695455 PCI: 00:08.0: enabled 1
1703 10:53:14.695944 PCI: 00:09.0: enabled 0
1704 10:53:14.699033 PCI: 00:0a.0: enabled 0
1705 10:53:14.701994 PCI: 00:0d.0: enabled 1
1706 10:53:14.702485 PCI: 00:0d.1: enabled 0
1707 10:53:14.705290
1708 10:53:14.705856 PCI: 00:0d.2: enabled 0
1709 10:53:14.708873 PCI: 00:0d.3: enabled 0
1710 10:53:14.711608 PCI: 00:0e.0: enabled 0
1711 10:53:14.712099 PCI: 00:10.2: enabled 1
1712 10:53:14.715248 PCI: 00:10.6: enabled 0
1713 10:53:14.718530 PCI: 00:10.7: enabled 0
1714 10:53:14.722367 PCI: 00:12.0: enabled 0
1715 10:53:14.722992 PCI: 00:12.6: enabled 0
1716 10:53:14.725062 PCI: 00:13.0: enabled 0
1717 10:53:14.728302 PCI: 00:14.0: enabled 1
1718 10:53:14.731912 PCI: 00:14.1: enabled 0
1719 10:53:14.732434 PCI: 00:14.2: enabled 1
1720 10:53:14.735372 PCI: 00:14.3: enabled 1
1721 10:53:14.738725 PCI: 00:15.0: enabled 1
1722 10:53:14.741919 PCI: 00:15.1: enabled 1
1723 10:53:14.742365 PCI: 00:15.2: enabled 1
1724 10:53:14.745258 PCI: 00:15.3: enabled 1
1725 10:53:14.748381 PCI: 00:16.0: enabled 1
1726 10:53:14.748920 PCI: 00:16.1: enabled 0
1727 10:53:14.751992 PCI: 00:16.2: enabled 0
1728 10:53:14.755688 PCI: 00:16.3: enabled 0
1729 10:53:14.758654 PCI: 00:16.4: enabled 0
1730 10:53:14.759229 PCI: 00:16.5: enabled 0
1731 10:53:14.761624 PCI: 00:17.0: enabled 0
1732 10:53:14.765137 PCI: 00:19.0: enabled 0
1733 10:53:14.768534 PCI: 00:19.1: enabled 1
1734 10:53:14.768977 PCI: 00:19.2: enabled 0
1735 10:53:14.771427 PCI: 00:1c.0: enabled 1
1736 10:53:14.775191 PCI: 00:1c.1: enabled 0
1737 10:53:14.778443 PCI: 00:1c.2: enabled 0
1738 10:53:14.778927 PCI: 00:1c.3: enabled 0
1739 10:53:14.781847 PCI: 00:1c.4: enabled 0
1740 10:53:14.784831 PCI: 00:1c.5: enabled 0
1741 10:53:14.785278 PCI: 00:1c.6: enabled 1
1742 10:53:14.788356
1743 10:53:14.788799 PCI: 00:1c.7: enabled 0
1744 10:53:14.791575 PCI: 00:1d.0: enabled 1
1745 10:53:14.795144 PCI: 00:1d.1: enabled 0
1746 10:53:14.795683 PCI: 00:1d.2: enabled 1
1747 10:53:14.798031 PCI: 00:1d.3: enabled 0
1748 10:53:14.801259 PCI: 00:1e.0: enabled 1
1749 10:53:14.804915 PCI: 00:1e.1: enabled 0
1750 10:53:14.805352 PCI: 00:1e.2: enabled 1
1751 10:53:14.807958 PCI: 00:1e.3: enabled 1
1752 10:53:14.811561 PCI: 00:1f.0: enabled 1
1753 10:53:14.814946 PCI: 00:1f.1: enabled 0
1754 10:53:14.815446 PCI: 00:1f.2: enabled 1
1755 10:53:14.817879 PCI: 00:1f.3: enabled 1
1756 10:53:14.821755 PCI: 00:1f.4: enabled 0
1757 10:53:14.824823 PCI: 00:1f.5: enabled 1
1758 10:53:14.825479 PCI: 00:1f.6: enabled 0
1759 10:53:14.827869 PCI: 00:1f.7: enabled 0
1760 10:53:14.831626 APIC: 00: enabled 1
1761 10:53:14.832146 GENERIC: 0.0: enabled 1
1762 10:53:14.834436 GENERIC: 0.0: enabled 1
1763 10:53:14.838226 GENERIC: 1.0: enabled 1
1764 10:53:14.841507 GENERIC: 0.0: enabled 1
1765 10:53:14.841993 GENERIC: 1.0: enabled 1
1766 10:53:14.844448 USB0 port 0: enabled 1
1767 10:53:14.848324 GENERIC: 0.0: enabled 1
1768 10:53:14.848910 USB0 port 0: enabled 1
1769 10:53:14.851321 GENERIC: 0.0: enabled 1
1770 10:53:14.854783 I2C: 00:1a: enabled 1
1771 10:53:14.858017 I2C: 00:31: enabled 1
1772 10:53:14.858500 I2C: 00:32: enabled 1
1773 10:53:14.861625 I2C: 00:10: enabled 1
1774 10:53:14.864504 I2C: 00:15: enabled 1
1775 10:53:14.864943 GENERIC: 0.0: enabled 0
1776 10:53:14.868177 GENERIC: 1.0: enabled 0
1777 10:53:14.871172 GENERIC: 0.0: enabled 1
1778 10:53:14.871611 SPI: 00: enabled 1
1779 10:53:14.874850 SPI: 00: enabled 1
1780 10:53:14.877850 PNP: 0c09.0: enabled 1
1781 10:53:14.878390 GENERIC: 0.0: enabled 1
1782 10:53:14.881089 USB3 port 0: enabled 1
1783 10:53:14.884766 USB3 port 1: enabled 1
1784 10:53:14.885211 USB3 port 2: enabled 0
1785 10:53:14.887760 USB3 port 3: enabled 0
1786 10:53:14.891360 USB2 port 0: enabled 0
1787 10:53:14.895044 USB2 port 1: enabled 1
1788 10:53:14.895635 USB2 port 2: enabled 1
1789 10:53:14.897956 USB2 port 3: enabled 0
1790 10:53:14.901627 USB2 port 4: enabled 1
1791 10:53:14.902231 USB2 port 5: enabled 0
1792 10:53:14.904701 USB2 port 6: enabled 0
1793 10:53:14.908007 USB2 port 7: enabled 0
1794 10:53:14.908497 USB2 port 8: enabled 0
1795 10:53:14.911240
1796 10:53:14.911836 USB2 port 9: enabled 0
1797 10:53:14.914419 USB3 port 0: enabled 0
1798 10:53:14.918057 USB3 port 1: enabled 1
1799 10:53:14.918545 USB3 port 2: enabled 0
1800 10:53:14.921457 USB3 port 3: enabled 0
1801 10:53:14.924300 GENERIC: 0.0: enabled 1
1802 10:53:14.924816 GENERIC: 1.0: enabled 1
1803 10:53:14.927513
1804 10:53:14.928001 APIC: 01: enabled 1
1805 10:53:14.931173 APIC: 03: enabled 1
1806 10:53:14.931658 APIC: 07: enabled 1
1807 10:53:14.934295 APIC: 05: enabled 1
1808 10:53:14.937878 APIC: 04: enabled 1
1809 10:53:14.938453 APIC: 02: enabled 1
1810 10:53:14.941169 APIC: 06: enabled 1
1811 10:53:14.944848 PCI: 01:00.0: enabled 1
1812 10:53:14.948120 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1813 10:53:14.954867 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1814 10:53:14.957627 ELOG: NV offset 0xf30000 size 0x1000
1815 10:53:14.964495 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1816 10:53:14.971014 ELOG: Event(17) added with size 13 at 2022-11-22 10:53:14 UTC
1817 10:53:14.977933 ELOG: Event(92) added with size 9 at 2022-11-22 10:53:15 UTC
1818 10:53:14.984762 ELOG: Event(93) added with size 9 at 2022-11-22 10:53:15 UTC
1819 10:53:14.990921 ELOG: Event(9E) added with size 10 at 2022-11-22 10:53:15 UTC
1820 10:53:14.998381 ELOG: Event(9F) added with size 14 at 2022-11-22 10:53:15 UTC
1821 10:53:15.004502 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
1822 10:53:15.007628 ELOG: Event(A1) added with size 10 at 2022-11-22 10:53:15 UTC
1823 10:53:15.011530
1824 10:53:15.015091 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1825 10:53:15.021047 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1826 10:53:15.024714 Finalize devices...
1827 10:53:15.025204 Devices finalized
1828 10:53:15.031208 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1829 10:53:15.037636 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1830 10:53:15.040848 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1831 10:53:15.047819 ME: HFSTS1 : 0x80030055
1832 10:53:15.051477 ME: HFSTS2 : 0x30280116
1833 10:53:15.054483 ME: HFSTS3 : 0x00000050
1834 10:53:15.061550 ME: HFSTS4 : 0x00004000
1835 10:53:15.064458 ME: HFSTS5 : 0x00000000
1836 10:53:15.067418 ME: HFSTS6 : 0x00400006
1837 10:53:15.074171 ME: Manufacturing Mode : YES
1838 10:53:15.077343 ME: SPI Protection Mode Enabled : NO
1839 10:53:15.080396 ME: FW Partition Table : OK
1840 10:53:15.084094 ME: Bringup Loader Failure : NO
1841 10:53:15.087368 ME: Firmware Init Complete : NO
1842 10:53:15.090538 ME: Boot Options Present : NO
1843 10:53:15.094207 ME: Update In Progress : NO
1844 10:53:15.097977 ME: D0i3 Support : YES
1845 10:53:15.104579 ME: Low Power State Enabled : NO
1846 10:53:15.107357 ME: CPU Replaced : YES
1847 10:53:15.110798 ME: CPU Replacement Valid : YES
1848 10:53:15.114157 ME: Current Working State : 5
1849 10:53:15.117518 ME: Current Operation State : 1
1850 10:53:15.120384 ME: Current Operation Mode : 3
1851 10:53:15.124111 ME: Error Code : 0
1852 10:53:15.126754 ME: Enhanced Debug Mode : NO
1853 10:53:15.133926 ME: CPU Debug Disabled : YES
1854 10:53:15.137296 ME: TXT Support : NO
1855 10:53:15.143379 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1856 10:53:15.150478 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1857 10:53:15.154179 CBFS: 'fallback/slic' not found.
1858 10:53:15.157250 ACPI: Writing ACPI tables at 76b01000.
1859 10:53:15.157869 ACPI: * FACS
1860 10:53:15.160220
1861 10:53:15.160832 ACPI: * DSDT
1862 10:53:15.163965 Ramoops buffer: 0x100000@0x76a00000.
1863 10:53:15.170288 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1864 10:53:15.173937 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1865 10:53:15.176749 Google Chrome EC: version:
1866 10:53:15.180619 ro: voema_v2.0.7540-147f8d37d1
1867 10:53:15.183878 rw: voema_v2.0.7540-147f8d37d1
1868 10:53:15.186773 running image: 2
1869 10:53:15.193392 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1870 10:53:15.196977 ACPI: * FADT
1871 10:53:15.197462 SCI is IRQ9
1872 10:53:15.200471 ACPI: added table 1/32, length now 40
1873 10:53:15.203444 ACPI: * SSDT
1874 10:53:15.207253 Found 1 CPU(s) with 8 core(s) each.
1875 10:53:15.210414 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1876 10:53:15.216627 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1877 10:53:15.220005 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1878 10:53:15.223195 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1879 10:53:15.229777 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1880 10:53:15.237245 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1881 10:53:15.240346 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1882 10:53:15.246761 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1883 10:53:15.253299 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1884 10:53:15.256373 \_SB.PCI0.RP09: Added StorageD3Enable property
1885 10:53:15.259754 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1886 10:53:15.266860 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1887 10:53:15.273612 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1888 10:53:15.276666 PS2K: Passing 80 keymaps to kernel
1889 10:53:15.283005 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1890 10:53:15.289606 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1891 10:53:15.295940 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1892 10:53:15.302671 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1893 10:53:15.309525 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1894 10:53:15.315756 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1895 10:53:15.319344 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1896 10:53:15.322936
1897 10:53:15.326078 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1898 10:53:15.329312
1899 10:53:15.332536 ACPI: added table 2/32, length now 44
1900 10:53:15.333069 ACPI: * MCFG
1901 10:53:15.335764 ACPI: added table 3/32, length now 48
1902 10:53:15.339054 ACPI: * TPM2
1903 10:53:15.342684 TPM2 log created at 0x769f0000
1904 10:53:15.345705 ACPI: added table 4/32, length now 52
1905 10:53:15.346198 ACPI: * MADT
1906 10:53:15.349274 SCI is IRQ9
1907 10:53:15.352423 ACPI: added table 5/32, length now 56
1908 10:53:15.353017 current = 76b09850
1909 10:53:15.355607
1910 10:53:15.356097 ACPI: * DMAR
1911 10:53:15.359137 ACPI: added table 6/32, length now 60
1912 10:53:15.362483 ACPI: added table 7/32, length now 64
1913 10:53:15.366387 ACPI: * HPET
1914 10:53:15.369348 ACPI: added table 8/32, length now 68
1915 10:53:15.369942 ACPI: done.
1916 10:53:15.372562 ACPI tables: 35216 bytes.
1917 10:53:15.375704 smbios_write_tables: 769ef000
1918 10:53:15.379396 EC returned error result code 3
1919 10:53:15.382459 Couldn't obtain OEM name from CBI
1920 10:53:15.385903 Create SMBIOS type 16
1921 10:53:15.389197 Create SMBIOS type 17
1922 10:53:15.392295 GENERIC: 0.0 (WIFI Device)
1923 10:53:15.392786 SMBIOS tables: 1750 bytes.
1924 10:53:15.399242 Writing table forward entry at 0x00000500
1925 10:53:15.405896 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1926 10:53:15.409544 Writing coreboot table at 0x76b25000
1927 10:53:15.412566 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1928 10:53:15.419034 1. 0000000000001000-000000000009ffff: RAM
1929 10:53:15.422218 2. 00000000000a0000-00000000000fffff: RESERVED
1930 10:53:15.425942 3. 0000000000100000-00000000769eefff: RAM
1931 10:53:15.432032 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1932 10:53:15.438862 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1933 10:53:15.442457 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1934 10:53:15.445516
1935 10:53:15.448942 7. 0000000077000000-000000007fbfffff: RESERVED
1936 10:53:15.452022 8. 00000000c0000000-00000000cfffffff: RESERVED
1937 10:53:15.458311 9. 00000000f8000000-00000000f9ffffff: RESERVED
1938 10:53:15.461655 10. 00000000fb000000-00000000fb000fff: RESERVED
1939 10:53:15.468567 11. 00000000fe000000-00000000fe00ffff: RESERVED
1940 10:53:15.472298 12. 00000000fed80000-00000000fed87fff: RESERVED
1941 10:53:15.478417 13. 00000000fed90000-00000000fed92fff: RESERVED
1942 10:53:15.481887 14. 00000000feda0000-00000000feda1fff: RESERVED
1943 10:53:15.488521 15. 00000000fedc0000-00000000feddffff: RESERVED
1944 10:53:15.491872 16. 0000000100000000-00000002803fffff: RAM
1945 10:53:15.495309 Passing 4 GPIOs to payload:
1946 10:53:15.498562 NAME | PORT | POLARITY | VALUE
1947 10:53:15.505183 lid | undefined | high | high
1948 10:53:15.508349 power | undefined | high | low
1949 10:53:15.515731 oprom | undefined | high | low
1950 10:53:15.522284 EC in RW | 0x000000e5 | high | high
1951 10:53:15.528516 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ae62
1952 10:53:15.529138 coreboot table: 1576 bytes.
1953 10:53:15.532009 IMD ROOT 0. 0x76fff000 0x00001000
1954 10:53:15.535078
1955 10:53:15.538203 IMD SMALL 1. 0x76ffe000 0x00001000
1956 10:53:15.541909 FSP MEMORY 2. 0x76c4e000 0x003b0000
1957 10:53:15.544669 VPD 3. 0x76c4d000 0x00000367
1958 10:53:15.548556 RO MCACHE 4. 0x76c4c000 0x00000fdc
1959 10:53:15.551812 CONSOLE 5. 0x76c2c000 0x00020000
1960 10:53:15.555135 FMAP 6. 0x76c2b000 0x00000578
1961 10:53:15.558087 TIME STAMP 7. 0x76c2a000 0x00000910
1962 10:53:15.561722 VBOOT WORK 8. 0x76c16000 0x00014000
1963 10:53:15.568391 ROMSTG STCK 9. 0x76c15000 0x00001000
1964 10:53:15.572042 AFTER CAR 10. 0x76c0a000 0x0000b000
1965 10:53:15.575030 RAMSTAGE 11. 0x76b97000 0x00073000
1966 10:53:15.578330 REFCODE 12. 0x76b42000 0x00055000
1967 10:53:15.581794 SMM BACKUP 13. 0x76b32000 0x00010000
1968 10:53:15.584877 4f444749 14. 0x76b30000 0x00002000
1969 10:53:15.588334 EXT VBT15. 0x76b2d000 0x0000219f
1970 10:53:15.591712 COREBOOT 16. 0x76b25000 0x00008000
1971 10:53:15.594697 ACPI 17. 0x76b01000 0x00024000
1972 10:53:15.598668 ACPI GNVS 18. 0x76b00000 0x00001000
1973 10:53:15.601650
1974 10:53:15.605450 RAMOOPS 19. 0x76a00000 0x00100000
1975 10:53:15.608224 TPM2 TCGLOG20. 0x769f0000 0x00010000
1976 10:53:15.611860 SMBIOS 21. 0x769ef000 0x00000800
1977 10:53:15.612452 IMD small region:
1978 10:53:15.618249 IMD ROOT 0. 0x76ffec00 0x00000400
1979 10:53:15.622071 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1980 10:53:15.625274 POWER STATE 2. 0x76ffeb80 0x00000044
1981 10:53:15.628333 ROMSTAGE 3. 0x76ffeb60 0x00000004
1982 10:53:15.631895 MEM INFO 4. 0x76ffe980 0x000001e0
1983 10:53:15.638273 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1984 10:53:15.641538 MTRR: Physical address space:
1985 10:53:15.648207 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1986 10:53:15.655463 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1987 10:53:15.661824 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1988 10:53:15.665035 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1989 10:53:15.668011
1990 10:53:15.671864 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1991 10:53:15.678523 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1992 10:53:15.684853 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1993 10:53:15.688004 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 10:53:15.695807 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 10:53:15.697803 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 10:53:15.701517 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 10:53:15.705183 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 10:53:15.711328 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 10:53:15.715249 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 10:53:15.718131 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 10:53:15.721931 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 10:53:15.724806 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 10:53:15.728365
2004 10:53:15.731422 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 10:53:15.734873 call enable_fixed_mtrr()
2006 10:53:15.737892 CPU physical address size: 39 bits
2007 10:53:15.741491 MTRR: default type WB/UC MTRR counts: 6/6.
2008 10:53:15.744683 MTRR: UC selected as default type.
2009 10:53:15.751342 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2010 10:53:15.757942 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2011 10:53:15.764378 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2012 10:53:15.771323 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2013 10:53:15.778057 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2014 10:53:15.784457 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2015 10:53:15.784951
2016 10:53:15.785525 MTRR check
2017 10:53:15.787434 Fixed MTRRs : Enabled
2018 10:53:15.791529 Variable MTRRs: Enabled
2019 10:53:15.792146
2020 10:53:15.794263 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 10:53:15.797862 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 10:53:15.804129 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 10:53:15.807729 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 10:53:15.810656 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 10:53:15.814490 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 10:53:15.820751 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 10:53:15.824612 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 10:53:15.827339 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 10:53:15.830784 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 10:53:15.837156 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 10:53:15.844249 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2032 10:53:15.844766 call enable_fixed_mtrr()
2033 10:53:15.847638 Checking cr50 for pending updates
2034 10:53:15.851626 CPU physical address size: 39 bits
2035 10:53:15.857391 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 10:53:15.861082 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 10:53:15.864704 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 10:53:15.867464 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 10:53:15.874173 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 10:53:15.878289 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 10:53:15.881104 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 10:53:15.884088 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 10:53:15.890734 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 10:53:15.894344 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 10:53:15.897697 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 10:53:15.900993 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 10:53:15.908064 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 10:53:15.908657 call enable_fixed_mtrr()
2049 10:53:15.914615 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 10:53:15.917902 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 10:53:15.921086 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 10:53:15.924373 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 10:53:15.930720 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 10:53:15.934168 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 10:53:15.937920 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 10:53:15.940620 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 10:53:15.947733 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 10:53:15.950858 CPU physical address size: 39 bits
2059 10:53:15.954337 call enable_fixed_mtrr()
2060 10:53:15.957646 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 10:53:15.960761 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 10:53:15.964501
2063 10:53:15.967700 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 10:53:15.970856 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 10:53:15.974272 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 10:53:15.977662 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 10:53:15.984232 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 10:53:15.987586 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 10:53:15.990963 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 10:53:15.993787 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 10:53:16.000714 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 10:53:16.003911 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 10:53:16.006983 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 10:53:16.014175 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 10:53:16.016865 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 10:53:16.020342 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 10:53:16.024309 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 10:53:16.030516 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 10:53:16.033909 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 10:53:16.036853 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 10:53:16.040386 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 10:53:16.043712 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 10:53:16.046678
2084 10:53:16.050286 call enable_fixed_mtrr()
2085 10:53:16.050824 call enable_fixed_mtrr()
2086 10:53:16.056633 MTRR: Fixed MSR 0x250 0x0606060606060606
2087 10:53:16.060353 MTRR: Fixed MSR 0x250 0x0606060606060606
2088 10:53:16.063880 MTRR: Fixed MSR 0x258 0x0606060606060606
2089 10:53:16.067033 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 10:53:16.073623 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 10:53:16.076893 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 10:53:16.080350 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 10:53:16.083537 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 10:53:16.086682 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 10:53:16.093592 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 10:53:16.096572 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 10:53:16.100362 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 10:53:16.106749 MTRR: Fixed MSR 0x258 0x0606060606060606
2099 10:53:16.107273 call enable_fixed_mtrr()
2100 10:53:16.113370 MTRR: Fixed MSR 0x259 0x0000000000000000
2101 10:53:16.117260 MTRR: Fixed MSR 0x268 0x0606060606060606
2102 10:53:16.120233 MTRR: Fixed MSR 0x269 0x0606060606060606
2103 10:53:16.123577 MTRR: Fixed MSR 0x26a 0x0606060606060606
2104 10:53:16.130714 MTRR: Fixed MSR 0x26b 0x0606060606060606
2105 10:53:16.133512 MTRR: Fixed MSR 0x26c 0x0606060606060606
2106 10:53:16.136996 MTRR: Fixed MSR 0x26d 0x0606060606060606
2107 10:53:16.140163 MTRR: Fixed MSR 0x26e 0x0606060606060606
2108 10:53:16.147175 MTRR: Fixed MSR 0x26f 0x0606060606060606
2109 10:53:16.149834 CPU physical address size: 39 bits
2110 10:53:16.153711 call enable_fixed_mtrr()
2111 10:53:16.156897 CPU physical address size: 39 bits
2112 10:53:16.160079 CPU physical address size: 39 bits
2113 10:53:16.167530 CPU physical address size: 39 bits
2114 10:53:16.168108 Reading cr50 TPM mode
2115 10:53:16.171025 CPU physical address size: 39 bits
2116 10:53:16.177457 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2117 10:53:16.184207 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2118 10:53:16.187832
2119 10:53:16.191062 Checking segment from ROM address 0xffc02b38
2120 10:53:16.194154 Checking segment from ROM address 0xffc02b54
2121 10:53:16.201348 Loading segment from ROM address 0xffc02b38
2122 10:53:16.201942 code (compression=0)
2123 10:53:16.210989 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2124 10:53:16.217412 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2125 10:53:16.220811 it's not compressed!
2126 10:53:16.360554 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2127 10:53:16.367117 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2128 10:53:16.373708 Loading segment from ROM address 0xffc02b54
2129 10:53:16.374367 Entry Point 0x30000000
2130 10:53:16.376568 Loaded segments
2131 10:53:16.383458 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2132 10:53:16.426192 Finalizing chipset.
2133 10:53:16.429666 Finalizing SMM.
2134 10:53:16.430182 APMC done.
2135 10:53:16.436000 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2136 10:53:16.439273 mp_park_aps done after 0 msecs.
2137 10:53:16.442747 Jumping to boot code at 0x30000000(0x76b25000)
2138 10:53:16.453156 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2139 10:53:16.453757
2140 10:53:16.454147
2141 10:53:16.454505
2142 10:53:16.456124 Starting depthcharge on Voema...
2143 10:53:16.456608
2144 10:53:16.457910 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2145 10:53:16.458526 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2146 10:53:16.459046 Setting prompt string to ['volteer:']
2147 10:53:16.459574 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2148 10:53:16.466331 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2149 10:53:16.466953
2150 10:53:16.473206 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2151 10:53:16.473794
2152 10:53:16.476477 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2153 10:53:16.477057
2154 10:53:16.480987 Failed to find eMMC card reader
2155 10:53:16.481574
2156 10:53:16.483792 Wipe memory regions:
2157 10:53:16.484320
2158 10:53:16.487027 [0x00000000001000, 0x000000000a0000)
2159 10:53:16.487518
2160 10:53:16.490274 [0x00000000100000, 0x00000030000000)
2161 10:53:16.490852
2162 10:53:16.520899 [0x00000032662db0, 0x000000769ef000)
2163 10:53:16.521469
2164 10:53:16.560030 [0x00000100000000, 0x00000280400000)
2165 10:53:16.560603
2166 10:53:16.765567 ec_init: CrosEC protocol v3 supported (256, 256)
2167 10:53:16.766138
2168 10:53:16.772074 update_port_state: port C0 state: usb enable 1 mux conn 0
2169 10:53:16.772658
2170 10:53:16.782602 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2171 10:53:16.783216
2172 10:53:16.789434 pmc_check_ipc_sts: STS_BUSY done after 1661 us
2173 10:53:16.790013
2174 10:53:16.792397 send_conn_disc_msg: pmc_send_cmd succeeded
2175 10:53:16.792983
2176 10:53:17.225283 R8152: Initializing
2177 10:53:17.225469
2178 10:53:17.228775 Version 6 (ocp_data = 5c30)
2179 10:53:17.228890
2180 10:53:17.232027 R8152: Done initializing
2181 10:53:17.232146
2182 10:53:17.235321 Adding net device
2183 10:53:17.235407
2184 10:53:17.540884 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2185 10:53:17.541437
2186 10:53:17.541828
2187 10:53:17.542192
2188 10:53:17.543790 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2190 10:53:17.645560 volteer: tftpboot 192.168.201.1 8077744/tftp-deploy-5006hay8/kernel/bzImage 8077744/tftp-deploy-5006hay8/kernel/cmdline 8077744/tftp-deploy-5006hay8/ramdisk/ramdisk.cpio.gz
2191 10:53:17.646407 Setting prompt string to 'Starting kernel'
2192 10:53:17.646930 Setting prompt string to ['Starting kernel']
2193 10:53:17.647421 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2194 10:53:17.647850 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2195 10:53:17.651883 tftpboot 192.168.201.1 8077744/tftp-deploy-5006hay8/kernel/bzImaoy-5006hay8/kernel/cmdline 8077744/tftp-deploy-5006hay8/ramdisk/ramdisk.cpio.gz
2196 10:53:17.652398
2197 10:53:17.652789 Waiting for link
2198 10:53:17.653172
2199 10:53:17.854443 done.
2200 10:53:17.854581
2201 10:53:17.854653 MAC: 00:24:32:30:7d:bc
2202 10:53:17.854717
2203 10:53:17.858316 Sending DHCP discover... done.
2204 10:53:17.858406
2205 10:53:17.861115 Waiting for reply... done.
2206 10:53:17.861202
2207 10:53:17.864633 Sending DHCP request... done.
2208 10:53:17.864721
2209 10:53:17.871238 Waiting for reply... done.
2210 10:53:17.871327
2211 10:53:17.871396 My ip is 192.168.201.22
2212 10:53:17.871460
2213 10:53:17.874324 The DHCP server ip is 192.168.201.1
2214 10:53:17.874411
2215 10:53:17.880762 TFTP server IP predefined by user: 192.168.201.1
2216 10:53:17.880851
2217 10:53:17.887762 Bootfile predefined by user: 8077744/tftp-deploy-5006hay8/kernel/bzImage
2218 10:53:17.887845
2219 10:53:17.890678 Sending tftp read request... done.
2220 10:53:17.890756
2221 10:53:17.894789 Waiting for the transfer...
2222 10:53:17.894866
2223 10:53:18.472538 00000000 ################################################################
2224 10:53:18.472687
2225 10:53:19.071171 00080000 ################################################################
2226 10:53:19.071378
2227 10:53:19.778946 00100000 ################################################################
2228 10:53:19.779496
2229 10:53:20.457846 00180000 ################################################################
2230 10:53:20.458422
2231 10:53:21.161677 00200000 ################################################################
2232 10:53:21.162212
2233 10:53:21.864567 00280000 ################################################################
2234 10:53:21.865099
2235 10:53:22.569621 00300000 ################################################################
2236 10:53:22.570322
2237 10:53:23.297408 00380000 ################################################################
2238 10:53:23.297989
2239 10:53:24.019943 00400000 ################################################################
2240 10:53:24.020536
2241 10:53:24.725693 00480000 ################################################################
2242 10:53:24.726251
2243 10:53:25.393774 00500000 ################################################################
2244 10:53:25.394303
2245 10:53:26.123045 00580000 ################################################################
2246 10:53:26.123571
2247 10:53:26.829146 00600000 ################################################################
2248 10:53:26.829712
2249 10:53:27.247342 00680000 ###################################### done.
2250 10:53:27.247895
2251 10:53:27.250023 The bootfile was 7126928 bytes long.
2252 10:53:27.250487
2253 10:53:27.253516 Sending tftp read request... done.
2254 10:53:27.254066
2255 10:53:27.256872 Waiting for the transfer...
2256 10:53:27.257451
2257 10:53:27.941258 00000000 ################################################################
2258 10:53:27.941804
2259 10:53:28.629333 00080000 ################################################################
2260 10:53:28.629897
2261 10:53:29.327553 00100000 ################################################################
2262 10:53:29.328088
2263 10:53:30.028419 00180000 ################################################################
2264 10:53:30.028960
2265 10:53:30.715439 00200000 ################################################################
2266 10:53:30.716035
2267 10:53:31.361590 00280000 ################################################################
2268 10:53:31.361808
2269 10:53:32.054633 00300000 ################################################################
2270 10:53:32.055187
2271 10:53:32.741572 00380000 ################################################################
2272 10:53:32.742112
2273 10:53:33.427891 00400000 ################################################################
2274 10:53:33.428449
2275 10:53:34.152344 00480000 ################################################################
2276 10:53:34.152883
2277 10:53:34.863745 00500000 ################################################################
2278 10:53:34.864295
2279 10:53:35.560281 00580000 ################################################################
2280 10:53:35.560836
2281 10:53:36.220789 00600000 ################################################################
2282 10:53:36.220943
2283 10:53:36.853496 00680000 ################################################################
2284 10:53:36.853647
2285 10:53:37.460172 00700000 ################################################################
2286 10:53:37.460320
2287 10:53:38.084585 00780000 ################################################################
2288 10:53:38.084734
2289 10:53:38.262147 00800000 #################### done.
2290 10:53:38.262290
2291 10:53:38.265808 Sending tftp read request... done.
2292 10:53:38.265925
2293 10:53:38.268871 Waiting for the transfer...
2294 10:53:38.268963
2295 10:53:38.269035 00000000 # done.
2296 10:53:38.269128
2297 10:53:38.279141 Command line loaded dynamically from TFTP file: 8077744/tftp-deploy-5006hay8/kernel/cmdline
2298 10:53:38.279619
2299 10:53:38.292382 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2300 10:53:38.292893
2301 10:53:38.299921 Shutting down all USB controllers.
2302 10:53:38.300481
2303 10:53:38.300904 Removing current net device
2304 10:53:38.301287
2305 10:53:38.302997 Finalizing coreboot
2306 10:53:38.303537
2307 10:53:38.309854 Exiting depthcharge with code 4 at timestamp: 30499919
2308 10:53:38.310446
2309 10:53:38.310821
2310 10:53:38.311263 Starting kernel ...
2311 10:53:38.311620
2312 10:53:38.311976
2313 10:53:38.312339
2314 10:53:38.313661 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2315 10:53:38.314165 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2316 10:53:38.314619 Setting prompt string to ['Linux version [0-9]']
2317 10:53:38.315073 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2318 10:53:38.315454 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2320 10:57:59.315076 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2322 10:57:59.316203 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2324 10:57:59.317060 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2327 10:57:59.318460 end: 2 depthcharge-action (duration 00:05:00) [common]
2329 10:57:59.319659 Cleaning after the job
2330 10:57:59.320099 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/ramdisk
2331 10:57:59.323052 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/kernel
2332 10:57:59.325431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077744/tftp-deploy-5006hay8/modules
2333 10:57:59.326318 start: 5.1 power-off (timeout 00:00:30) [common]
2334 10:57:59.327103 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2335 10:57:59.384896 >> Command sent successfully.
2336 10:57:59.387471 Returned 0 in 0 seconds
2337 10:57:59.488681 end: 5.1 power-off (duration 00:00:00) [common]
2339 10:57:59.490076 start: 5.2 read-feedback (timeout 00:10:00) [common]
2340 10:57:59.491291 Listened to connection for namespace 'common' for up to 1s
2341 10:58:00.495540 Finalising connection for namespace 'common'
2342 10:58:00.496179 Disconnecting from shell: Finalise
2343 10:58:00.597693 end: 5.2 read-feedback (duration 00:00:01) [common]
2344 10:58:00.598303 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8077744
2345 10:58:00.621416 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8077744
2346 10:58:00.622041 JobError: Your job cannot terminate cleanly.