Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 10:52:34.550439 lava-dispatcher, installed at version: 2022.10
2 10:52:34.550616 start: 0 validate
3 10:52:34.550745 Start time: 2022-11-22 10:52:34.550738+00:00 (UTC)
4 10:52:34.550866 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:52:34.550988 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 10:52:34.848637 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:52:34.849437 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:52:35.140136 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:52:35.140828 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:52:35.439306 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:52:35.440043 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:52:35.738595 validate duration: 1.19
14 10:52:35.739947 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:52:35.740554 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:52:35.741059 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:52:35.741616 Not decompressing ramdisk as can be used compressed.
18 10:52:35.742099 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/initrd.cpio.gz
19 10:52:35.742467 saving as /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/ramdisk/initrd.cpio.gz
20 10:52:35.742817 total size: 5431606 (5MB)
21 10:52:35.749548 progress 0% (0MB)
22 10:52:35.757600 progress 5% (0MB)
23 10:52:35.764986 progress 10% (0MB)
24 10:52:35.766292 progress 15% (0MB)
25 10:52:35.767736 progress 20% (1MB)
26 10:52:35.769041 progress 25% (1MB)
27 10:52:35.770375 progress 30% (1MB)
28 10:52:35.771824 progress 35% (1MB)
29 10:52:35.773110 progress 40% (2MB)
30 10:52:35.774437 progress 45% (2MB)
31 10:52:35.775720 progress 50% (2MB)
32 10:52:35.777176 progress 55% (2MB)
33 10:52:35.778506 progress 60% (3MB)
34 10:52:35.779788 progress 65% (3MB)
35 10:52:35.781727 progress 70% (3MB)
36 10:52:35.783593 progress 75% (3MB)
37 10:52:35.785761 progress 80% (4MB)
38 10:52:35.787847 progress 85% (4MB)
39 10:52:35.790341 progress 90% (4MB)
40 10:52:35.793023 progress 95% (4MB)
41 10:52:35.794812 progress 100% (5MB)
42 10:52:35.795080 5MB downloaded in 0.05s (99.10MB/s)
43 10:52:35.795234 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:52:35.795481 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:52:35.795569 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:52:35.795656 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:52:35.795762 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 10:52:35.795829 saving as /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/kernel/bzImage
50 10:52:35.795890 total size: 7126928 (6MB)
51 10:52:35.795951 No compression specified
52 10:52:41.807887 progress 0% (0MB)
53 10:52:41.817986 progress 5% (0MB)
54 10:52:41.828614 progress 10% (0MB)
55 10:52:41.838586 progress 15% (1MB)
56 10:52:41.845352 progress 20% (1MB)
57 10:52:41.850067 progress 25% (1MB)
58 10:52:41.853969 progress 30% (2MB)
59 10:52:41.857328 progress 35% (2MB)
60 10:52:41.860001 progress 40% (2MB)
61 10:52:41.861757 progress 45% (3MB)
62 10:52:41.863493 progress 50% (3MB)
63 10:52:41.865215 progress 55% (3MB)
64 10:52:41.866955 progress 60% (4MB)
65 10:52:41.868688 progress 65% (4MB)
66 10:52:41.870425 progress 70% (4MB)
67 10:52:41.872140 progress 75% (5MB)
68 10:52:41.873717 progress 80% (5MB)
69 10:52:41.875473 progress 85% (5MB)
70 10:52:41.877239 progress 90% (6MB)
71 10:52:41.879103 progress 95% (6MB)
72 10:52:41.880885 progress 100% (6MB)
73 10:52:41.881101 6MB downloaded in 6.09s (1.12MB/s)
74 10:52:41.881253 end: 1.2.1 http-download (duration 00:00:06) [common]
76 10:52:41.881496 end: 1.2 download-retry (duration 00:00:06) [common]
77 10:52:41.881587 start: 1.3 download-retry (timeout 00:09:54) [common]
78 10:52:41.881672 start: 1.3.1 http-download (timeout 00:09:54) [common]
79 10:52:41.881779 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/full.rootfs.tar.xz
80 10:52:41.881846 saving as /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/nfsrootfs/full.rootfs.tar
81 10:52:41.881908 total size: 133303528 (127MB)
82 10:52:41.881970 Using unxz to decompress xz
83 10:52:41.887504 progress 0% (0MB)
84 10:52:42.220660 progress 5% (6MB)
85 10:52:42.579146 progress 10% (12MB)
86 10:52:42.865230 progress 15% (19MB)
87 10:52:43.067293 progress 20% (25MB)
88 10:52:43.315323 progress 25% (31MB)
89 10:52:43.649958 progress 30% (38MB)
90 10:52:43.990021 progress 35% (44MB)
91 10:52:44.378560 progress 40% (50MB)
92 10:52:44.755304 progress 45% (57MB)
93 10:52:45.105165 progress 50% (63MB)
94 10:52:45.471375 progress 55% (69MB)
95 10:52:45.828441 progress 60% (76MB)
96 10:52:46.187393 progress 65% (82MB)
97 10:52:46.543978 progress 70% (89MB)
98 10:52:46.903974 progress 75% (95MB)
99 10:52:47.334987 progress 80% (101MB)
100 10:52:47.762556 progress 85% (108MB)
101 10:52:48.034486 progress 90% (114MB)
102 10:52:48.373636 progress 95% (120MB)
103 10:52:48.763729 progress 100% (127MB)
104 10:52:48.768473 127MB downloaded in 6.89s (18.46MB/s)
105 10:52:48.768759 end: 1.3.1 http-download (duration 00:00:07) [common]
107 10:52:48.769019 end: 1.3 download-retry (duration 00:00:07) [common]
108 10:52:48.769158 start: 1.4 download-retry (timeout 00:09:47) [common]
109 10:52:48.769259 start: 1.4.1 http-download (timeout 00:09:47) [common]
110 10:52:48.769394 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 10:52:48.769465 saving as /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/modules/modules.tar
112 10:52:48.769582 total size: 52008 (0MB)
113 10:52:48.769644 Using unxz to decompress xz
114 10:52:48.774343 progress 63% (0MB)
115 10:52:48.775170 progress 100% (0MB)
116 10:52:48.777947 0MB downloaded in 0.01s (5.93MB/s)
117 10:52:48.778161 end: 1.4.1 http-download (duration 00:00:00) [common]
119 10:52:48.778413 end: 1.4 download-retry (duration 00:00:00) [common]
120 10:52:48.778506 start: 1.5 prepare-tftp-overlay (timeout 00:09:47) [common]
121 10:52:48.778604 start: 1.5.1 extract-nfsrootfs (timeout 00:09:47) [common]
122 10:52:50.003523 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8077705/extract-nfsrootfs-t6t0ditv
123 10:52:50.003722 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 10:52:50.003825 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
125 10:52:50.003960 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg
126 10:52:50.004059 makedir: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin
127 10:52:50.004142 makedir: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/tests
128 10:52:50.004222 makedir: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/results
129 10:52:50.004318 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-add-keys
130 10:52:50.004446 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-add-sources
131 10:52:50.004560 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-background-process-start
132 10:52:50.004672 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-background-process-stop
133 10:52:50.004784 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-common-functions
134 10:52:50.004895 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-echo-ipv4
135 10:52:50.005004 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-install-packages
136 10:52:50.005114 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-installed-packages
137 10:52:50.005222 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-os-build
138 10:52:50.005330 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-probe-channel
139 10:52:50.005437 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-probe-ip
140 10:52:50.005619 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-target-ip
141 10:52:50.005732 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-target-mac
142 10:52:50.005840 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-target-storage
143 10:52:50.005951 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-case
144 10:52:50.006062 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-event
145 10:52:50.006168 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-feedback
146 10:52:50.006276 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-raise
147 10:52:50.006382 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-reference
148 10:52:50.006490 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-runner
149 10:52:50.006597 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-set
150 10:52:50.006704 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-test-shell
151 10:52:50.006812 Updating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-install-packages (oe)
152 10:52:50.006924 Updating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/bin/lava-installed-packages (oe)
153 10:52:50.007020 Creating /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/environment
154 10:52:50.007121 LAVA metadata
155 10:52:50.007200 - LAVA_JOB_ID=8077705
156 10:52:50.007292 - LAVA_DISPATCHER_IP=192.168.201.1
157 10:52:50.007389 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
158 10:52:50.007455 skipped lava-vland-overlay
159 10:52:50.007531 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 10:52:50.007613 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
161 10:52:50.007676 skipped lava-multinode-overlay
162 10:52:50.007750 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 10:52:50.007830 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
164 10:52:50.007902 Loading test definitions
165 10:52:50.007993 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
166 10:52:50.008065 Using /lava-8077705 at stage 0
167 10:52:50.008321 uuid=8077705_1.5.2.3.1 testdef=None
168 10:52:50.008412 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 10:52:50.008501 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
170 10:52:50.008963 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 10:52:50.009193 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
173 10:52:50.009933 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 10:52:50.010174 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
176 10:52:50.010763 runner path: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/0/tests/0_dmesg test_uuid 8077705_1.5.2.3.1
177 10:52:50.010910 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 10:52:50.011144 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:46) [common]
180 10:52:50.011218 Using /lava-8077705 at stage 1
181 10:52:50.011458 uuid=8077705_1.5.2.3.5 testdef=None
182 10:52:50.011549 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 10:52:50.011636 start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
184 10:52:50.012065 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 10:52:50.012289 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
187 10:52:50.012845 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 10:52:50.013081 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
190 10:52:50.013658 runner path: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/1/tests/1_bootrr test_uuid 8077705_1.5.2.3.5
191 10:52:50.013800 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 10:52:50.014014 Creating lava-test-runner.conf files
194 10:52:50.014079 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/0 for stage 0
195 10:52:50.014161 - 0_dmesg
196 10:52:50.014237 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077705/lava-overlay-8gq4w9qg/lava-8077705/1 for stage 1
197 10:52:50.014321 - 1_bootrr
198 10:52:50.014413 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 10:52:50.014499 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
200 10:52:50.020137 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 10:52:50.020243 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:46) [common]
202 10:52:50.020330 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 10:52:50.020418 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 10:52:50.020504 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:46) [common]
205 10:52:50.121897 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 10:52:50.122225 start: 1.5.4 extract-modules (timeout 00:09:46) [common]
207 10:52:50.122334 extracting modules file /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077705/extract-nfsrootfs-t6t0ditv
208 10:52:50.126281 extracting modules file /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077705/extract-overlay-ramdisk-04y0h2sm/ramdisk
209 10:52:50.129996 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 10:52:50.130110 start: 1.5.5 apply-overlay-tftp (timeout 00:09:46) [common]
211 10:52:50.130195 [common] Applying overlay to NFS
212 10:52:50.130265 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077705/compress-overlay-w0w8kz8e/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8077705/extract-nfsrootfs-t6t0ditv
213 10:52:50.133975 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 10:52:50.134084 start: 1.5.6 configure-preseed-file (timeout 00:09:46) [common]
215 10:52:50.134177 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 10:52:50.134267 start: 1.5.7 compress-ramdisk (timeout 00:09:46) [common]
217 10:52:50.134346 Building ramdisk /var/lib/lava/dispatcher/tmp/8077705/extract-overlay-ramdisk-04y0h2sm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8077705/extract-overlay-ramdisk-04y0h2sm/ramdisk
218 10:52:50.167653 >> 24546 blocks
219 10:52:50.655177 rename /var/lib/lava/dispatcher/tmp/8077705/extract-overlay-ramdisk-04y0h2sm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/ramdisk/ramdisk.cpio.gz
220 10:52:50.655554 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 10:52:50.655676 start: 1.5.8 prepare-kernel (timeout 00:09:45) [common]
222 10:52:50.655780 start: 1.5.8.1 prepare-fit (timeout 00:09:45) [common]
223 10:52:50.655878 No mkimage arch provided, not using FIT.
224 10:52:50.655971 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 10:52:50.656057 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 10:52:50.656152 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 10:52:50.656249 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:45) [common]
228 10:52:50.656331 No LXC device requested
229 10:52:50.656410 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 10:52:50.656502 start: 1.7 deploy-device-env (timeout 00:09:45) [common]
231 10:52:50.656583 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 10:52:50.656655 Checking files for TFTP limit of 4294967296 bytes.
233 10:52:50.657026 end: 1 tftp-deploy (duration 00:00:15) [common]
234 10:52:50.657131 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 10:52:50.657225 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 10:52:50.657350 substitutions:
237 10:52:50.657419 - {DTB}: None
238 10:52:50.657515 - {INITRD}: 8077705/tftp-deploy-8ysq7363/ramdisk/ramdisk.cpio.gz
239 10:52:50.657607 - {KERNEL}: 8077705/tftp-deploy-8ysq7363/kernel/bzImage
240 10:52:50.657670 - {LAVA_MAC}: None
241 10:52:50.657730 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8077705/extract-nfsrootfs-t6t0ditv
242 10:52:50.657789 - {NFS_SERVER_IP}: 192.168.201.1
243 10:52:50.657846 - {PRESEED_CONFIG}: None
244 10:52:50.657905 - {PRESEED_LOCAL}: None
245 10:52:50.657962 - {RAMDISK}: 8077705/tftp-deploy-8ysq7363/ramdisk/ramdisk.cpio.gz
246 10:52:50.658019 - {ROOT_PART}: None
247 10:52:50.658076 - {ROOT}: None
248 10:52:50.658133 - {SERVER_IP}: 192.168.201.1
249 10:52:50.658189 - {TEE}: None
250 10:52:50.658246 Parsed boot commands:
251 10:52:50.658302 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 10:52:50.658459 Parsed boot commands: tftpboot 192.168.201.1 8077705/tftp-deploy-8ysq7363/kernel/bzImage 8077705/tftp-deploy-8ysq7363/kernel/cmdline 8077705/tftp-deploy-8ysq7363/ramdisk/ramdisk.cpio.gz
253 10:52:50.658552 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 10:52:50.658641 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 10:52:50.658755 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 10:52:50.658856 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 10:52:50.658927 Not connected, no need to disconnect.
258 10:52:50.659005 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 10:52:50.659089 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 10:52:50.659161 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
261 10:52:50.661802 Setting prompt string to ['lava-test: # ']
262 10:52:50.662095 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 10:52:50.662211 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 10:52:50.662306 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 10:52:50.662399 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 10:52:50.662567 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
267 10:52:50.681196 >> Command sent successfully.
268 10:52:50.683189 Returned 0 in 0 seconds
269 10:52:50.784432 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 10:52:50.785815 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 10:52:50.786269 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 10:52:50.786677 Setting prompt string to 'Starting depthcharge on Voema...'
274 10:52:50.786991 Changing prompt to 'Starting depthcharge on Voema...'
275 10:52:50.787312 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 10:52:50.788407 [Enter `^Ec?' for help]
277 10:52:58.242018
278 10:52:58.242171
279 10:52:58.251968 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 10:52:58.255193 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 10:52:58.261850 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 10:52:58.265701 CPU: AES supported, TXT NOT supported, VT supported
283 10:52:58.272237 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 10:52:58.275606 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 10:52:58.282412 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 10:52:58.285970 VBOOT: Loading verstage.
287 10:52:58.289469 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 10:52:58.295853 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 10:52:58.298899 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 10:52:58.309142 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 10:52:58.315778 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 10:52:58.315869
293 10:52:58.315938
294 10:52:58.325962 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 10:52:58.342716 Probing TPM: . done!
296 10:52:58.345932 TPM ready after 0 ms
297 10:52:58.348980 Connected to device vid:did:rid of 1ae0:0028:00
298 10:52:58.360843 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 10:52:58.366979 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 10:52:58.370552 Initialized TPM device CR50 revision 0
301 10:52:58.428051 tlcl_send_startup: Startup return code is 0
302 10:52:58.428190 TPM: setup succeeded
303 10:52:58.443497 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 10:52:58.457767 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 10:52:58.470464 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 10:52:58.480585 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 10:52:58.484115 Chrome EC: UHEPI supported
308 10:52:58.487223 Phase 1
309 10:52:58.490526 FMAP: area GBB found @ 1805000 (458752 bytes)
310 10:52:58.500581 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 10:52:58.507075 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 10:52:58.513603 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 10:52:58.520460 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 10:52:58.523730 Recovery requested (1009000e)
315 10:52:58.526940 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 10:52:58.538650 tlcl_extend: response is 0
317 10:52:58.545325 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 10:52:58.555126 tlcl_extend: response is 0
319 10:52:58.561657 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 10:52:58.568107 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 10:52:58.575072 BS: verstage times (exec / console): total (unknown) / 142 ms
322 10:52:58.575163
323 10:52:58.575251
324 10:52:58.588287 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 10:52:58.595043 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 10:52:58.598038 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 10:52:58.601889 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 10:52:58.608208 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 10:52:58.611161 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 10:52:58.614622 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 10:52:58.618215 TCO_STS: 0000 0000
332 10:52:58.620923 GEN_PMCON: d0015038 00002200
333 10:52:58.624925 GBLRST_CAUSE: 00000000 00000000
334 10:52:58.627617 HPR_CAUSE0: 00000000
335 10:52:58.627702 prev_sleep_state 5
336 10:52:58.630911 Boot Count incremented to 10073
337 10:52:58.637823 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 10:52:58.644403 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 10:52:58.654403 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 10:52:58.660653 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 10:52:58.663962 Chrome EC: UHEPI supported
342 10:52:58.670404 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 10:52:58.681832 Probing TPM: done!
344 10:52:58.688509 Connected to device vid:did:rid of 1ae0:0028:00
345 10:52:58.698950 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 10:52:58.702063 Initialized TPM device CR50 revision 0
347 10:52:58.716860 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 10:52:58.723261 MRC: Hash idx 0x100b comparison successful.
349 10:52:58.726647 MRC cache found, size faa8
350 10:52:58.726735 bootmode is set to: 2
351 10:52:58.730083 SPD index = 2
352 10:52:58.736493 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 10:52:58.740276 SPD: module type is LPDDR4X
354 10:52:58.743515 SPD: module part number is MT53D1G64D4NW-046
355 10:52:58.750194 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 10:52:58.756907 SPD: device width 16 bits, bus width 16 bits
357 10:52:58.759634 SPD: module size is 2048 MB (per channel)
358 10:52:59.189471 CBMEM:
359 10:52:59.192706 IMD: root @ 0x76fff000 254 entries.
360 10:52:59.195956 IMD: root @ 0x76ffec00 62 entries.
361 10:52:59.200129 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 10:52:59.205780 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 10:52:59.209125 External stage cache:
364 10:52:59.212260 IMD: root @ 0x7b3ff000 254 entries.
365 10:52:59.215602 IMD: root @ 0x7b3fec00 62 entries.
366 10:52:59.230550 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 10:52:59.237224 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 10:52:59.243922 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 10:52:59.257420 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 10:52:59.264088 cse_lite: Skip switching to RW in the recovery path
371 10:52:59.264186 8 DIMMs found
372 10:52:59.264255 SMM Memory Map
373 10:52:59.267778
374 10:52:59.271196 SMRAM : 0x7b000000 0x800000
375 10:52:59.273978 Subregion 0: 0x7b000000 0x200000
376 10:52:59.277447 Subregion 1: 0x7b200000 0x200000
377 10:52:59.280553 Subregion 2: 0x7b400000 0x400000
378 10:52:59.280639 top_of_ram = 0x77000000
379 10:52:59.287178 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
380 10:52:59.293966 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
381 10:52:59.297143 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
382 10:52:59.303612 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 10:52:59.310040 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
384 10:52:59.316735 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
385 10:52:59.327310 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
386 10:52:59.330557 Processing 211 relocs. Offset value of 0x74c0b000
387 10:52:59.333508
388 10:52:59.340055 BS: romstage times (exec / console): total (unknown) / 277 ms
389 10:52:59.346802
390 10:52:59.346888
391 10:52:59.354076 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
392 10:52:59.360381 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 10:52:59.366980 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 10:52:59.376665 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 10:52:59.383230 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
396 10:52:59.390144 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
397 10:52:59.432782 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
398 10:52:59.439519 Processing 5008 relocs. Offset value of 0x75d98000
399 10:52:59.442840 BS: postcar times (exec / console): total (unknown) / 59 ms
400 10:52:59.446130
401 10:52:59.446208
402 10:52:59.456053 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
403 10:52:59.456151 Normal boot
404 10:52:59.459353 FW_CONFIG value is 0x804c02
405 10:52:59.462394 PCI: 00:07.0 disabled by fw_config
406 10:52:59.466493 PCI: 00:07.1 disabled by fw_config
407 10:52:59.469041 PCI: 00:0d.2 disabled by fw_config
408 10:52:59.472280
409 10:52:59.475875 PCI: 00:1c.7 disabled by fw_config
410 10:52:59.479328 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 10:52:59.485643 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 10:52:59.488928 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 10:52:59.492524
414 10:52:59.495882 GENERIC: 0.0 disabled by fw_config
415 10:52:59.498841 GENERIC: 1.0 disabled by fw_config
416 10:52:59.502418 fw_config match found: DB_USB=USB3_ACTIVE
417 10:52:59.505633 fw_config match found: DB_USB=USB3_ACTIVE
418 10:52:59.509006 fw_config match found: DB_USB=USB3_ACTIVE
419 10:52:59.515476 fw_config match found: DB_USB=USB3_ACTIVE
420 10:52:59.518791 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 10:52:59.528933 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 10:52:59.535499 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 10:52:59.542106 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 10:52:59.545428 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 10:52:59.548615
426 10:52:59.552389 microcode: Update skipped, already up-to-date
427 10:52:59.558719 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 10:52:59.586810 Detected 4 core, 8 thread CPU.
429 10:52:59.589813 Setting up SMI for CPU
430 10:52:59.593323 IED base = 0x7b400000
431 10:52:59.593411 IED size = 0x00400000
432 10:52:59.596139
433 10:52:59.596226 Will perform SMM setup.
434 10:52:59.603307 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 10:52:59.609800 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 10:52:59.616103 Processing 16 relocs. Offset value of 0x00030000
437 10:52:59.619680 Attempting to start 7 APs
438 10:52:59.622831 Waiting for 10ms after sending INIT.
439 10:52:59.638490 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 10:52:59.638580 done.
441 10:52:59.642021 AP: slot 5 apic_id 4.
442 10:52:59.644952 AP: slot 4 apic_id 5.
443 10:52:59.645038 AP: slot 2 apic_id 3.
444 10:52:59.648385 AP: slot 6 apic_id 2.
445 10:52:59.651717 AP: slot 3 apic_id 7.
446 10:52:59.651803 AP: slot 7 apic_id 6.
447 10:52:59.658045 Waiting for 2nd SIPI to complete...done.
448 10:52:59.664830 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 10:52:59.671658 Processing 13 relocs. Offset value of 0x00038000
450 10:52:59.671741 Unable to locate Global NVS
451 10:52:59.674741
452 10:52:59.681317 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
453 10:52:59.684637 Installing permanent SMM handler to 0x7b000000
454 10:52:59.694500 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
455 10:52:59.697758 Processing 794 relocs. Offset value of 0x7b010000
456 10:52:59.707934 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
457 10:52:59.711129 Processing 13 relocs. Offset value of 0x7b008000
458 10:52:59.717878 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
459 10:52:59.724758 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
460 10:52:59.727954 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
461 10:52:59.734649 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
462 10:52:59.741315 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
463 10:52:59.748441 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
464 10:52:59.754698 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
465 10:52:59.754783 Unable to locate Global NVS
466 10:52:59.764298 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
467 10:52:59.767455 Clearing SMI status registers
468 10:52:59.767542 SMI_STS: PM1
469 10:52:59.770791 PM1_STS: PWRBTN
470 10:52:59.777418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
471 10:52:59.780849 In relocation handler: CPU 0
472 10:52:59.783970 New SMBASE=0x7b000000 IEDBASE=0x7b400000
473 10:52:59.790640 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 10:52:59.790726 Relocation complete.
475 10:52:59.800577 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
476 10:52:59.800668 In relocation handler: CPU 1
477 10:52:59.803932
478 10:52:59.807349 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
479 10:52:59.807435 Relocation complete.
480 10:52:59.817194 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
481 10:52:59.817281 In relocation handler: CPU 7
482 10:52:59.820525
483 10:52:59.823852 New SMBASE=0x7affe400 IEDBASE=0x7b400000
484 10:52:59.827256 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 10:52:59.830120 Relocation complete.
486 10:52:59.837125 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
487 10:52:59.840254 In relocation handler: CPU 3
488 10:52:59.843539 New SMBASE=0x7afff400 IEDBASE=0x7b400000
489 10:52:59.847072 Relocation complete.
490 10:52:59.853405 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 10:52:59.857141 In relocation handler: CPU 5
492 10:52:59.860088 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 10:52:59.866664 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 10:52:59.866751 Relocation complete.
495 10:52:59.876462 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
496 10:52:59.876549 In relocation handler: CPU 4
497 10:52:59.883346 New SMBASE=0x7afff000 IEDBASE=0x7b400000
498 10:52:59.883433 Relocation complete.
499 10:52:59.889527 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 10:52:59.892945
501 10:52:59.893034 In relocation handler: CPU 6
502 10:52:59.899746 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 10:52:59.903731 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 10:52:59.906518 Relocation complete.
505 10:52:59.913070 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
506 10:52:59.916634 In relocation handler: CPU 2
507 10:52:59.919478 New SMBASE=0x7afff800 IEDBASE=0x7b400000
508 10:52:59.923198 Relocation complete.
509 10:52:59.923286 Initializing CPU #0
510 10:52:59.926292 CPU: vendor Intel device 806c1
511 10:52:59.932701 CPU: family 06, model 8c, stepping 01
512 10:52:59.932786 Clearing out pending MCEs
513 10:52:59.936139 Setting up local APIC...
514 10:52:59.939080 apic_id: 0x00 done.
515 10:52:59.942889 Turbo is available but hidden
516 10:52:59.945928 Turbo is available and visible
517 10:52:59.949221 microcode: Update skipped, already up-to-date
518 10:52:59.952885 CPU #0 initialized
519 10:52:59.952970 Initializing CPU #5
520 10:52:59.955703 Initializing CPU #4
521 10:52:59.959224 Initializing CPU #6
522 10:52:59.959309 Initializing CPU #2
523 10:52:59.962410 CPU: vendor Intel device 806c1
524 10:52:59.965566 CPU: family 06, model 8c, stepping 01
525 10:52:59.969316 CPU: vendor Intel device 806c1
526 10:52:59.972194 CPU: family 06, model 8c, stepping 01
527 10:52:59.975567 Clearing out pending MCEs
528 10:52:59.979054 Clearing out pending MCEs
529 10:52:59.982382 Setting up local APIC...
530 10:52:59.982467 Initializing CPU #7
531 10:52:59.985914 Initializing CPU #3
532 10:52:59.989242 CPU: vendor Intel device 806c1
533 10:52:59.992259 CPU: family 06, model 8c, stepping 01
534 10:52:59.995530 CPU: vendor Intel device 806c1
535 10:52:59.999437 CPU: family 06, model 8c, stepping 01
536 10:53:00.002472 Clearing out pending MCEs
537 10:53:00.005367 CPU: vendor Intel device 806c1
538 10:53:00.008784 CPU: family 06, model 8c, stepping 01
539 10:53:00.013030 Setting up local APIC...
540 10:53:00.013115 Initializing CPU #1
541 10:53:00.016279 Clearing out pending MCEs
542 10:53:00.019993 apic_id: 0x07 done.
543 10:53:00.020078 Setting up local APIC...
544 10:53:00.023227 Clearing out pending MCEs
545 10:53:00.026576 CPU: vendor Intel device 806c1
546 10:53:00.029694 CPU: family 06, model 8c, stepping 01
547 10:53:00.033390 Setting up local APIC...
548 10:53:00.036459 Setting up local APIC...
549 10:53:00.039895 CPU: vendor Intel device 806c1
550 10:53:00.043386 CPU: family 06, model 8c, stepping 01
551 10:53:00.043475 apic_id: 0x06 done.
552 10:53:00.049638 microcode: Update skipped, already up-to-date
553 10:53:00.052861 microcode: Update skipped, already up-to-date
554 10:53:00.056168 CPU #3 initialized
555 10:53:00.056253 apic_id: 0x03 done.
556 10:53:00.059432
557 10:53:00.059518 apic_id: 0x02 done.
558 10:53:00.066192 microcode: Update skipped, already up-to-date
559 10:53:00.069311 microcode: Update skipped, already up-to-date
560 10:53:00.072868 CPU #2 initialized
561 10:53:00.072956 CPU #6 initialized
562 10:53:00.076087 Clearing out pending MCEs
563 10:53:00.079785 apic_id: 0x05 done.
564 10:53:00.079871 Setting up local APIC...
565 10:53:00.082879 CPU #7 initialized
566 10:53:00.086171 microcode: Update skipped, already up-to-date
567 10:53:00.089637 apic_id: 0x04 done.
568 10:53:00.092870 CPU #4 initialized
569 10:53:00.096294 microcode: Update skipped, already up-to-date
570 10:53:00.099379 Clearing out pending MCEs
571 10:53:00.099464 CPU #5 initialized
572 10:53:00.102663 Setting up local APIC...
573 10:53:00.105806 apic_id: 0x01 done.
574 10:53:00.109152 microcode: Update skipped, already up-to-date
575 10:53:00.112604 CPU #1 initialized
576 10:53:00.115569 bsp_do_flight_plan done after 454 msecs.
577 10:53:00.119082 CPU: frequency set to 4400 MHz
578 10:53:00.119169 Enabling SMIs.
579 10:53:00.122323
580 10:53:00.125715 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 10:53:00.143145 SATAXPCIE1 indicates PCIe NVMe is present
582 10:53:00.146354 Probing TPM: done!
583 10:53:00.149652 Connected to device vid:did:rid of 1ae0:0028:00
584 10:53:00.160214 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
585 10:53:00.164289 Initialized TPM device CR50 revision 0
586 10:53:00.167188 Enabling S0i3.4
587 10:53:00.173722 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 10:53:00.177057 Found a VBT of 8704 bytes after decompression
589 10:53:00.184234 cse_lite: CSE RO boot. HybridStorageMode disabled
590 10:53:00.190325 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 10:53:00.265710 FSPS returned 0
592 10:53:00.268970 Executing Phase 1 of FspMultiPhaseSiInit
593 10:53:00.278935 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 10:53:00.282293 port C0 DISC req: usage 1 usb3 1 usb2 5
595 10:53:00.285434 Raw Buffer output 0 00000511
596 10:53:00.288629 Raw Buffer output 1 00000000
597 10:53:00.292452 pmc_send_ipc_cmd succeeded
598 10:53:00.296204 port C1 DISC req: usage 1 usb3 2 usb2 3
599 10:53:00.299593
600 10:53:00.299679 Raw Buffer output 0 00000321
601 10:53:00.302506 Raw Buffer output 1 00000000
602 10:53:00.306799 pmc_send_ipc_cmd succeeded
603 10:53:00.311781 Detected 4 core, 8 thread CPU.
604 10:53:00.314811 Detected 4 core, 8 thread CPU.
605 10:53:00.515686 Display FSP Version Info HOB
606 10:53:00.518271 Reference Code - CPU = a.0.4c.31
607 10:53:00.521383 uCode Version = 0.0.0.86
608 10:53:00.524915 TXT ACM version = ff.ff.ff.ffff
609 10:53:00.527976 Reference Code - ME = a.0.4c.31
610 10:53:00.531328 MEBx version = 0.0.0.0
611 10:53:00.534730 ME Firmware Version = Consumer SKU
612 10:53:00.537913 Reference Code - PCH = a.0.4c.31
613 10:53:00.541306 PCH-CRID Status = Disabled
614 10:53:00.544421 PCH-CRID Original Value = ff.ff.ff.ffff
615 10:53:00.547737 PCH-CRID New Value = ff.ff.ff.ffff
616 10:53:00.550956 OPROM - RST - RAID = ff.ff.ff.ffff
617 10:53:00.554325 PCH Hsio Version = 4.0.0.0
618 10:53:00.557712 Reference Code - SA - System Agent = a.0.4c.31
619 10:53:00.561041 Reference Code - MRC = 2.0.0.1
620 10:53:00.564323 SA - PCIe Version = a.0.4c.31
621 10:53:00.567382 SA-CRID Status = Disabled
622 10:53:00.570869 SA-CRID Original Value = 0.0.0.1
623 10:53:00.574246 SA-CRID New Value = 0.0.0.1
624 10:53:00.577620 OPROM - VBIOS = ff.ff.ff.ffff
625 10:53:00.580891 IO Manageability Engine FW Version = 11.1.4.0
626 10:53:00.584119 PHY Build Version = 0.0.0.e0
627 10:53:00.587429 Thunderbolt(TM) FW Version = 0.0.0.0
628 10:53:00.594930 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 10:53:00.597929 ITSS IRQ Polarities Before:
630 10:53:00.598015 IPC0: 0xffffffff
631 10:53:00.601365 IPC1: 0xffffffff
632 10:53:00.601451 IPC2: 0xffffffff
633 10:53:00.604985 IPC3: 0xffffffff
634 10:53:00.607920 ITSS IRQ Polarities After:
635 10:53:00.608007 IPC0: 0xffffffff
636 10:53:00.611165 IPC1: 0xffffffff
637 10:53:00.611250 IPC2: 0xffffffff
638 10:53:00.614479 IPC3: 0xffffffff
639 10:53:00.617924 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 10:53:00.630908 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 10:53:00.641010 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 10:53:00.654410 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 10:53:00.661018 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
644 10:53:00.664050 Enumerating buses...
645 10:53:00.667648 Show all devs... Before device enumeration.
646 10:53:00.670710 Root Device: enabled 1
647 10:53:00.670797 DOMAIN: 0000: enabled 1
648 10:53:00.674214 CPU_CLUSTER: 0: enabled 1
649 10:53:00.677617 PCI: 00:00.0: enabled 1
650 10:53:00.680895 PCI: 00:02.0: enabled 1
651 10:53:00.680981 PCI: 00:04.0: enabled 1
652 10:53:00.683729 PCI: 00:05.0: enabled 1
653 10:53:00.687553 PCI: 00:06.0: enabled 0
654 10:53:00.690560 PCI: 00:07.0: enabled 0
655 10:53:00.690646 PCI: 00:07.1: enabled 0
656 10:53:00.693888 PCI: 00:07.2: enabled 0
657 10:53:00.697081 PCI: 00:07.3: enabled 0
658 10:53:00.697167 PCI: 00:08.0: enabled 1
659 10:53:00.700419
660 10:53:00.700505 PCI: 00:09.0: enabled 0
661 10:53:00.703787 PCI: 00:0a.0: enabled 0
662 10:53:00.707067 PCI: 00:0d.0: enabled 1
663 10:53:00.707153 PCI: 00:0d.1: enabled 0
664 10:53:00.710310 PCI: 00:0d.2: enabled 0
665 10:53:00.713493 PCI: 00:0d.3: enabled 0
666 10:53:00.717313 PCI: 00:0e.0: enabled 0
667 10:53:00.717398 PCI: 00:10.2: enabled 1
668 10:53:00.720239 PCI: 00:10.6: enabled 0
669 10:53:00.723457 PCI: 00:10.7: enabled 0
670 10:53:00.726949 PCI: 00:12.0: enabled 0
671 10:53:00.727034 PCI: 00:12.6: enabled 0
672 10:53:00.730442 PCI: 00:13.0: enabled 0
673 10:53:00.733768 PCI: 00:14.0: enabled 1
674 10:53:00.736695 PCI: 00:14.1: enabled 0
675 10:53:00.736781 PCI: 00:14.2: enabled 1
676 10:53:00.740238 PCI: 00:14.3: enabled 1
677 10:53:00.743657 PCI: 00:15.0: enabled 1
678 10:53:00.743760 PCI: 00:15.1: enabled 1
679 10:53:00.746559
680 10:53:00.746645 PCI: 00:15.2: enabled 1
681 10:53:00.750324 PCI: 00:15.3: enabled 1
682 10:53:00.753188 PCI: 00:16.0: enabled 1
683 10:53:00.753274 PCI: 00:16.1: enabled 0
684 10:53:00.756704 PCI: 00:16.2: enabled 0
685 10:53:00.760205 PCI: 00:16.3: enabled 0
686 10:53:00.763142 PCI: 00:16.4: enabled 0
687 10:53:00.763228 PCI: 00:16.5: enabled 0
688 10:53:00.766559 PCI: 00:17.0: enabled 1
689 10:53:00.770077 PCI: 00:19.0: enabled 0
690 10:53:00.773215 PCI: 00:19.1: enabled 1
691 10:53:00.773301 PCI: 00:19.2: enabled 0
692 10:53:00.776655 PCI: 00:1c.0: enabled 1
693 10:53:00.779858 PCI: 00:1c.1: enabled 0
694 10:53:00.783116 PCI: 00:1c.2: enabled 0
695 10:53:00.783202 PCI: 00:1c.3: enabled 0
696 10:53:00.786373 PCI: 00:1c.4: enabled 0
697 10:53:00.789604 PCI: 00:1c.5: enabled 0
698 10:53:00.792760 PCI: 00:1c.6: enabled 1
699 10:53:00.792845 PCI: 00:1c.7: enabled 0
700 10:53:00.796628 PCI: 00:1d.0: enabled 1
701 10:53:00.799830 PCI: 00:1d.1: enabled 0
702 10:53:00.799916 PCI: 00:1d.2: enabled 1
703 10:53:00.802806 PCI: 00:1d.3: enabled 0
704 10:53:00.806340 PCI: 00:1e.0: enabled 1
705 10:53:00.809622 PCI: 00:1e.1: enabled 0
706 10:53:00.809707 PCI: 00:1e.2: enabled 1
707 10:53:00.812822 PCI: 00:1e.3: enabled 1
708 10:53:00.816345 PCI: 00:1f.0: enabled 1
709 10:53:00.819659 PCI: 00:1f.1: enabled 0
710 10:53:00.819743 PCI: 00:1f.2: enabled 1
711 10:53:00.822699 PCI: 00:1f.3: enabled 1
712 10:53:00.825673 PCI: 00:1f.4: enabled 0
713 10:53:00.829122 PCI: 00:1f.5: enabled 1
714 10:53:00.829206 PCI: 00:1f.6: enabled 0
715 10:53:00.832739 PCI: 00:1f.7: enabled 0
716 10:53:00.835883 APIC: 00: enabled 1
717 10:53:00.835966 GENERIC: 0.0: enabled 1
718 10:53:00.838946 GENERIC: 0.0: enabled 1
719 10:53:00.842416 GENERIC: 1.0: enabled 1
720 10:53:00.845831 GENERIC: 0.0: enabled 1
721 10:53:00.845914 GENERIC: 1.0: enabled 1
722 10:53:00.849435 USB0 port 0: enabled 1
723 10:53:00.852531 GENERIC: 0.0: enabled 1
724 10:53:00.855587 USB0 port 0: enabled 1
725 10:53:00.855671 GENERIC: 0.0: enabled 1
726 10:53:00.859263 I2C: 00:1a: enabled 1
727 10:53:00.862547 I2C: 00:31: enabled 1
728 10:53:00.862630 I2C: 00:32: enabled 1
729 10:53:00.865573 I2C: 00:10: enabled 1
730 10:53:00.869208 I2C: 00:15: enabled 1
731 10:53:00.869292 GENERIC: 0.0: enabled 0
732 10:53:00.872434 GENERIC: 1.0: enabled 0
733 10:53:00.875730 GENERIC: 0.0: enabled 1
734 10:53:00.875817 SPI: 00: enabled 1
735 10:53:00.878936
736 10:53:00.879021 SPI: 00: enabled 1
737 10:53:00.882732 PNP: 0c09.0: enabled 1
738 10:53:00.885422 GENERIC: 0.0: enabled 1
739 10:53:00.885544 USB3 port 0: enabled 1
740 10:53:00.889086 USB3 port 1: enabled 1
741 10:53:00.892333 USB3 port 2: enabled 0
742 10:53:00.892419 USB3 port 3: enabled 0
743 10:53:00.895393 USB2 port 0: enabled 0
744 10:53:00.898703 USB2 port 1: enabled 1
745 10:53:00.898787 USB2 port 2: enabled 1
746 10:53:00.902499
747 10:53:00.902584 USB2 port 3: enabled 0
748 10:53:00.905388 USB2 port 4: enabled 1
749 10:53:00.908674 USB2 port 5: enabled 0
750 10:53:00.908758 USB2 port 6: enabled 0
751 10:53:00.912414 USB2 port 7: enabled 0
752 10:53:00.915309 USB2 port 8: enabled 0
753 10:53:00.915393 USB2 port 9: enabled 0
754 10:53:00.918647 USB3 port 0: enabled 0
755 10:53:00.921962 USB3 port 1: enabled 1
756 10:53:00.925808 USB3 port 2: enabled 0
757 10:53:00.925891 USB3 port 3: enabled 0
758 10:53:00.928597 GENERIC: 0.0: enabled 1
759 10:53:00.931959 GENERIC: 1.0: enabled 1
760 10:53:00.932044 APIC: 01: enabled 1
761 10:53:00.934996 APIC: 03: enabled 1
762 10:53:00.938746 APIC: 07: enabled 1
763 10:53:00.938838 APIC: 05: enabled 1
764 10:53:00.941874 APIC: 04: enabled 1
765 10:53:00.941958 APIC: 02: enabled 1
766 10:53:00.945081 APIC: 06: enabled 1
767 10:53:00.948212 Compare with tree...
768 10:53:00.948296 Root Device: enabled 1
769 10:53:00.951865 DOMAIN: 0000: enabled 1
770 10:53:00.955215 PCI: 00:00.0: enabled 1
771 10:53:00.958420 PCI: 00:02.0: enabled 1
772 10:53:00.961737 PCI: 00:04.0: enabled 1
773 10:53:00.961821 GENERIC: 0.0: enabled 1
774 10:53:00.965590 PCI: 00:05.0: enabled 1
775 10:53:00.968679 PCI: 00:06.0: enabled 0
776 10:53:00.971499 PCI: 00:07.0: enabled 0
777 10:53:00.975167 GENERIC: 0.0: enabled 1
778 10:53:00.975251 PCI: 00:07.1: enabled 0
779 10:53:00.978626 GENERIC: 1.0: enabled 1
780 10:53:00.981390 PCI: 00:07.2: enabled 0
781 10:53:00.985231 GENERIC: 0.0: enabled 1
782 10:53:00.989023 PCI: 00:07.3: enabled 0
783 10:53:00.989107 GENERIC: 1.0: enabled 1
784 10:53:00.991767
785 10:53:00.991861 PCI: 00:08.0: enabled 1
786 10:53:00.995183 PCI: 00:09.0: enabled 0
787 10:53:00.998501 PCI: 00:0a.0: enabled 0
788 10:53:01.001636 PCI: 00:0d.0: enabled 1
789 10:53:01.001725 USB0 port 0: enabled 1
790 10:53:01.004736 USB3 port 0: enabled 1
791 10:53:01.007988 USB3 port 1: enabled 1
792 10:53:01.011426 USB3 port 2: enabled 0
793 10:53:01.014821 USB3 port 3: enabled 0
794 10:53:01.018021 PCI: 00:0d.1: enabled 0
795 10:53:01.018124 PCI: 00:0d.2: enabled 0
796 10:53:01.021469 GENERIC: 0.0: enabled 1
797 10:53:01.024822 PCI: 00:0d.3: enabled 0
798 10:53:01.028275 PCI: 00:0e.0: enabled 0
799 10:53:01.031546 PCI: 00:10.2: enabled 1
800 10:53:01.031630 PCI: 00:10.6: enabled 0
801 10:53:01.034549 PCI: 00:10.7: enabled 0
802 10:53:01.037964 PCI: 00:12.0: enabled 0
803 10:53:01.041489 PCI: 00:12.6: enabled 0
804 10:53:01.044377 PCI: 00:13.0: enabled 0
805 10:53:01.044461 PCI: 00:14.0: enabled 1
806 10:53:01.048231 USB0 port 0: enabled 1
807 10:53:01.051099 USB2 port 0: enabled 0
808 10:53:01.054624 USB2 port 1: enabled 1
809 10:53:01.057851 USB2 port 2: enabled 1
810 10:53:01.057935 USB2 port 3: enabled 0
811 10:53:01.061142 USB2 port 4: enabled 1
812 10:53:01.064438 USB2 port 5: enabled 0
813 10:53:01.068219 USB2 port 6: enabled 0
814 10:53:01.071006 USB2 port 7: enabled 0
815 10:53:01.074610 USB2 port 8: enabled 0
816 10:53:01.074721 USB2 port 9: enabled 0
817 10:53:01.077368 USB3 port 0: enabled 0
818 10:53:01.080786 USB3 port 1: enabled 1
819 10:53:01.084451 USB3 port 2: enabled 0
820 10:53:01.087330 USB3 port 3: enabled 0
821 10:53:01.091009 PCI: 00:14.1: enabled 0
822 10:53:01.091093 PCI: 00:14.2: enabled 1
823 10:53:01.094161 PCI: 00:14.3: enabled 1
824 10:53:01.097482 GENERIC: 0.0: enabled 1
825 10:53:01.100853 PCI: 00:15.0: enabled 1
826 10:53:01.100963 I2C: 00:1a: enabled 1
827 10:53:01.104045
828 10:53:01.104130 I2C: 00:31: enabled 1
829 10:53:01.107499 I2C: 00:32: enabled 1
830 10:53:01.110714 PCI: 00:15.1: enabled 1
831 10:53:01.114366 I2C: 00:10: enabled 1
832 10:53:01.114449 PCI: 00:15.2: enabled 1
833 10:53:01.117823 PCI: 00:15.3: enabled 1
834 10:53:01.120702 PCI: 00:16.0: enabled 1
835 10:53:01.124078 PCI: 00:16.1: enabled 0
836 10:53:01.127469 PCI: 00:16.2: enabled 0
837 10:53:01.127564 PCI: 00:16.3: enabled 0
838 10:53:01.130705 PCI: 00:16.4: enabled 0
839 10:53:01.133805 PCI: 00:16.5: enabled 0
840 10:53:01.137031 PCI: 00:17.0: enabled 1
841 10:53:01.140627 PCI: 00:19.0: enabled 0
842 10:53:01.140709 PCI: 00:19.1: enabled 1
843 10:53:01.143777 I2C: 00:15: enabled 1
844 10:53:01.147445 PCI: 00:19.2: enabled 0
845 10:53:01.150488 PCI: 00:1d.0: enabled 1
846 10:53:01.154081 GENERIC: 0.0: enabled 1
847 10:53:01.154163 PCI: 00:1e.0: enabled 1
848 10:53:01.157037 PCI: 00:1e.1: enabled 0
849 10:53:01.160231 PCI: 00:1e.2: enabled 1
850 10:53:01.163496 SPI: 00: enabled 1
851 10:53:01.163578 PCI: 00:1e.3: enabled 1
852 10:53:01.166829 SPI: 00: enabled 1
853 10:53:01.170143 PCI: 00:1f.0: enabled 1
854 10:53:01.173585 PNP: 0c09.0: enabled 1
855 10:53:01.173668 PCI: 00:1f.1: enabled 0
856 10:53:01.177291 PCI: 00:1f.2: enabled 1
857 10:53:01.180296 GENERIC: 0.0: enabled 1
858 10:53:01.183843 GENERIC: 0.0: enabled 1
859 10:53:01.186871 GENERIC: 1.0: enabled 1
860 10:53:01.190423 PCI: 00:1f.3: enabled 1
861 10:53:01.190507 PCI: 00:1f.4: enabled 0
862 10:53:01.241839 PCI: 00:1f.5: enabled 1
863 10:53:01.241964 PCI: 00:1f.6: enabled 0
864 10:53:01.242233 PCI: 00:1f.7: enabled 0
865 10:53:01.242307 CPU_CLUSTER: 0: enabled 1
866 10:53:01.242369 APIC: 00: enabled 1
867 10:53:01.242618 APIC: 01: enabled 1
868 10:53:01.242683 APIC: 03: enabled 1
869 10:53:01.242742 APIC: 07: enabled 1
870 10:53:01.242799 APIC: 05: enabled 1
871 10:53:01.242863 APIC: 04: enabled 1
872 10:53:01.243109 APIC: 02: enabled 1
873 10:53:01.243172 APIC: 06: enabled 1
874 10:53:01.243230 Root Device scanning...
875 10:53:01.243476 scan_static_bus for Root Device
876 10:53:01.243547 DOMAIN: 0000 enabled
877 10:53:01.243786 CPU_CLUSTER: 0 enabled
878 10:53:01.243853 DOMAIN: 0000 scanning...
879 10:53:01.243911 PCI: pci_scan_bus for bus 00
880 10:53:01.244155
881 10:53:01.244252 PCI: 00:00.0 [8086/0000] ops
882 10:53:01.244323 PCI: 00:00.0 [8086/9a12] enabled
883 10:53:01.286617
884 10:53:01.286737 PCI: 00:02.0 [8086/0000] bus ops
885 10:53:01.287285 PCI: 00:02.0 [8086/9a40] enabled
886 10:53:01.287371 PCI: 00:04.0 [8086/0000] bus ops
887 10:53:01.287630 PCI: 00:04.0 [8086/9a03] enabled
888 10:53:01.287701 PCI: 00:05.0 [8086/9a19] enabled
889 10:53:01.287948 PCI: 00:07.0 [0000/0000] hidden
890 10:53:01.288013 PCI: 00:08.0 [8086/9a11] enabled
891 10:53:01.288261 PCI: 00:0a.0 [8086/9a0d] disabled
892 10:53:01.288326 PCI: 00:0d.0 [8086/0000] bus ops
893 10:53:01.288692 PCI: 00:0d.0 [8086/9a13] enabled
894 10:53:01.288776 PCI: 00:14.0 [8086/0000] bus ops
895 10:53:01.289032 PCI: 00:14.0 [8086/a0ed] enabled
896 10:53:01.289103 PCI: 00:14.2 [8086/a0ef] enabled
897 10:53:01.291946 PCI: 00:14.3 [8086/0000] bus ops
898 10:53:01.295011 PCI: 00:14.3 [8086/a0f0] enabled
899 10:53:01.298518 PCI: 00:15.0 [8086/0000] bus ops
900 10:53:01.301694 PCI: 00:15.0 [8086/a0e8] enabled
901 10:53:01.304853 PCI: 00:15.1 [8086/0000] bus ops
902 10:53:01.308507 PCI: 00:15.1 [8086/a0e9] enabled
903 10:53:01.311696 PCI: 00:15.2 [8086/0000] bus ops
904 10:53:01.314691 PCI: 00:15.2 [8086/a0ea] enabled
905 10:53:01.318264 PCI: 00:15.3 [8086/0000] bus ops
906 10:53:01.321388 PCI: 00:15.3 [8086/a0eb] enabled
907 10:53:01.324815 PCI: 00:16.0 [8086/0000] ops
908 10:53:01.328109 PCI: 00:16.0 [8086/a0e0] enabled
909 10:53:01.331348 PCI: Static device PCI: 00:17.0 not found, disabling it.
910 10:53:01.334780 PCI: 00:19.0 [8086/0000] bus ops
911 10:53:01.338074 PCI: 00:19.0 [8086/a0c5] disabled
912 10:53:01.341697 PCI: 00:19.1 [8086/0000] bus ops
913 10:53:01.344507 PCI: 00:19.1 [8086/a0c6] enabled
914 10:53:01.348112 PCI: 00:1d.0 [8086/0000] bus ops
915 10:53:01.351476 PCI: 00:1d.0 [8086/a0b0] enabled
916 10:53:01.354554 PCI: 00:1e.0 [8086/0000] ops
917 10:53:01.357802 PCI: 00:1e.0 [8086/a0a8] enabled
918 10:53:01.361398 PCI: 00:1e.2 [8086/0000] bus ops
919 10:53:01.364624 PCI: 00:1e.2 [8086/a0aa] enabled
920 10:53:01.367744 PCI: 00:1e.3 [8086/0000] bus ops
921 10:53:01.370934 PCI: 00:1e.3 [8086/a0ab] enabled
922 10:53:01.374671 PCI: 00:1f.0 [8086/0000] bus ops
923 10:53:01.377376 PCI: 00:1f.0 [8086/a087] enabled
924 10:53:01.380787 RTC Init
925 10:53:01.384038 Set power on after power failure.
926 10:53:01.384123 Disabling Deep S3
927 10:53:01.387499 Disabling Deep S3
928 10:53:01.387584 Disabling Deep S4
929 10:53:01.391019
930 10:53:01.391104 Disabling Deep S4
931 10:53:01.393925 Disabling Deep S5
932 10:53:01.394009 Disabling Deep S5
933 10:53:01.397370 PCI: 00:1f.2 [0000/0000] hidden
934 10:53:01.400785 PCI: 00:1f.3 [8086/0000] bus ops
935 10:53:01.403930 PCI: 00:1f.3 [8086/a0c8] enabled
936 10:53:01.407392 PCI: 00:1f.5 [8086/0000] bus ops
937 10:53:01.410365 PCI: 00:1f.5 [8086/a0a4] enabled
938 10:53:01.414170 PCI: Leftover static devices:
939 10:53:01.417162 PCI: 00:10.2
940 10:53:01.417248 PCI: 00:10.6
941 10:53:01.417314 PCI: 00:10.7
942 10:53:01.420448 PCI: 00:06.0
943 10:53:01.420533 PCI: 00:07.1
944 10:53:01.424202 PCI: 00:07.2
945 10:53:01.424290 PCI: 00:07.3
946 10:53:01.424361 PCI: 00:09.0
947 10:53:01.427691 PCI: 00:0d.1
948 10:53:01.427775 PCI: 00:0d.2
949 10:53:01.430667 PCI: 00:0d.3
950 10:53:01.430754 PCI: 00:0e.0
951 10:53:01.430822 PCI: 00:12.0
952 10:53:01.433997
953 10:53:01.434084 PCI: 00:12.6
954 10:53:01.434152 PCI: 00:13.0
955 10:53:01.437272 PCI: 00:14.1
956 10:53:01.437357 PCI: 00:16.1
957 10:53:01.440518 PCI: 00:16.2
958 10:53:01.440604 PCI: 00:16.3
959 10:53:01.440672 PCI: 00:16.4
960 10:53:01.443694 PCI: 00:16.5
961 10:53:01.443780 PCI: 00:17.0
962 10:53:01.447466 PCI: 00:19.2
963 10:53:01.447552 PCI: 00:1e.1
964 10:53:01.447620 PCI: 00:1f.1
965 10:53:01.450631 PCI: 00:1f.4
966 10:53:01.450715 PCI: 00:1f.6
967 10:53:01.453486 PCI: 00:1f.7
968 10:53:01.456873 PCI: Check your devicetree.cb.
969 10:53:01.456957 PCI: 00:02.0 scanning...
970 10:53:01.460476 scan_generic_bus for PCI: 00:02.0
971 10:53:01.463825
972 10:53:01.466883 scan_generic_bus for PCI: 00:02.0 done
973 10:53:01.470253 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
974 10:53:01.473461 PCI: 00:04.0 scanning...
975 10:53:01.477084 scan_generic_bus for PCI: 00:04.0
976 10:53:01.480221 GENERIC: 0.0 enabled
977 10:53:01.483497 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
978 10:53:01.490356 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
979 10:53:01.493840 PCI: 00:0d.0 scanning...
980 10:53:01.496684 scan_static_bus for PCI: 00:0d.0
981 10:53:01.496795 USB0 port 0 enabled
982 10:53:01.500195 USB0 port 0 scanning...
983 10:53:01.503141 scan_static_bus for USB0 port 0
984 10:53:01.506871 USB3 port 0 enabled
985 10:53:01.506954 USB3 port 1 enabled
986 10:53:01.509933 USB3 port 2 disabled
987 10:53:01.513093 USB3 port 3 disabled
988 10:53:01.513177 USB3 port 0 scanning...
989 10:53:01.516740 scan_static_bus for USB3 port 0
990 10:53:01.523317 scan_static_bus for USB3 port 0 done
991 10:53:01.526895 scan_bus: bus USB3 port 0 finished in 6 msecs
992 10:53:01.529710 USB3 port 1 scanning...
993 10:53:01.532924 scan_static_bus for USB3 port 1
994 10:53:01.536638 scan_static_bus for USB3 port 1 done
995 10:53:01.539842 scan_bus: bus USB3 port 1 finished in 6 msecs
996 10:53:01.543478 scan_static_bus for USB0 port 0 done
997 10:53:01.549778 scan_bus: bus USB0 port 0 finished in 43 msecs
998 10:53:01.553449 scan_static_bus for PCI: 00:0d.0 done
999 10:53:01.556412 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1000 10:53:01.559573 PCI: 00:14.0 scanning...
1001 10:53:01.562848 scan_static_bus for PCI: 00:14.0
1002 10:53:01.566139 USB0 port 0 enabled
1003 10:53:01.569590 USB0 port 0 scanning...
1004 10:53:01.572935 scan_static_bus for USB0 port 0
1005 10:53:01.573021 USB2 port 0 disabled
1006 10:53:01.576735 USB2 port 1 enabled
1007 10:53:01.579448 USB2 port 2 enabled
1008 10:53:01.579533 USB2 port 3 disabled
1009 10:53:01.583102 USB2 port 4 enabled
1010 10:53:01.583187 USB2 port 5 disabled
1011 10:53:01.586074 USB2 port 6 disabled
1012 10:53:01.589396 USB2 port 7 disabled
1013 10:53:01.589487 USB2 port 8 disabled
1014 10:53:01.592948 USB2 port 9 disabled
1015 10:53:01.596126 USB3 port 0 disabled
1016 10:53:01.596210 USB3 port 1 enabled
1017 10:53:01.599034 USB3 port 2 disabled
1018 10:53:01.602530 USB3 port 3 disabled
1019 10:53:01.602614 USB2 port 1 scanning...
1020 10:53:01.605798 scan_static_bus for USB2 port 1
1021 10:53:01.612435 scan_static_bus for USB2 port 1 done
1022 10:53:01.615736 scan_bus: bus USB2 port 1 finished in 6 msecs
1023 10:53:01.619286 USB2 port 2 scanning...
1024 10:53:01.622315 scan_static_bus for USB2 port 2
1025 10:53:01.625818 scan_static_bus for USB2 port 2 done
1026 10:53:01.628802 scan_bus: bus USB2 port 2 finished in 6 msecs
1027 10:53:01.632219 USB2 port 4 scanning...
1028 10:53:01.635807 scan_static_bus for USB2 port 4
1029 10:53:01.638691 scan_static_bus for USB2 port 4 done
1030 10:53:01.642473 scan_bus: bus USB2 port 4 finished in 6 msecs
1031 10:53:01.645387
1032 10:53:01.645471 USB3 port 1 scanning...
1033 10:53:01.648812 scan_static_bus for USB3 port 1
1034 10:53:01.652379 scan_static_bus for USB3 port 1 done
1035 10:53:01.658607 scan_bus: bus USB3 port 1 finished in 6 msecs
1036 10:53:01.661933 scan_static_bus for USB0 port 0 done
1037 10:53:01.665224 scan_bus: bus USB0 port 0 finished in 93 msecs
1038 10:53:01.668605 scan_static_bus for PCI: 00:14.0 done
1039 10:53:01.672224
1040 10:53:01.675169 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1041 10:53:01.678608 PCI: 00:14.3 scanning...
1042 10:53:01.681898 scan_static_bus for PCI: 00:14.3
1043 10:53:01.681984 GENERIC: 0.0 enabled
1044 10:53:01.688585 scan_static_bus for PCI: 00:14.3 done
1045 10:53:01.691908 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1046 10:53:01.695039 PCI: 00:15.0 scanning...
1047 10:53:01.698545 scan_static_bus for PCI: 00:15.0
1048 10:53:01.698631 I2C: 00:1a enabled
1049 10:53:01.701938
1050 10:53:01.702023 I2C: 00:31 enabled
1051 10:53:01.704961 I2C: 00:32 enabled
1052 10:53:01.707984 scan_static_bus for PCI: 00:15.0 done
1053 10:53:01.711952 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1054 10:53:01.714934 PCI: 00:15.1 scanning...
1055 10:53:01.718287 scan_static_bus for PCI: 00:15.1
1056 10:53:01.721255 I2C: 00:10 enabled
1057 10:53:01.724734 scan_static_bus for PCI: 00:15.1 done
1058 10:53:01.728428 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1059 10:53:01.731660 PCI: 00:15.2 scanning...
1060 10:53:01.735136 scan_static_bus for PCI: 00:15.2
1061 10:53:01.737900 scan_static_bus for PCI: 00:15.2 done
1062 10:53:01.744700 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 10:53:01.744786 PCI: 00:15.3 scanning...
1064 10:53:01.747896 scan_static_bus for PCI: 00:15.3
1065 10:53:01.754645 scan_static_bus for PCI: 00:15.3 done
1066 10:53:01.758027 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 10:53:01.761378 PCI: 00:19.1 scanning...
1068 10:53:01.764885 scan_static_bus for PCI: 00:19.1
1069 10:53:01.764971 I2C: 00:15 enabled
1070 10:53:01.771538 scan_static_bus for PCI: 00:19.1 done
1071 10:53:01.774543 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 10:53:01.777721 PCI: 00:1d.0 scanning...
1073 10:53:01.781171 do_pci_scan_bridge for PCI: 00:1d.0
1074 10:53:01.784426 PCI: pci_scan_bus for bus 01
1075 10:53:01.787623 PCI: 01:00.0 [15b7/5009] enabled
1076 10:53:01.791216 GENERIC: 0.0 enabled
1077 10:53:01.794554 Enabling Common Clock Configuration
1078 10:53:01.797566 L1 Sub-State supported from root port 29
1079 10:53:01.800741 L1 Sub-State Support = 0x5
1080 10:53:01.803862 CommonModeRestoreTime = 0x28
1081 10:53:01.807302 Power On Value = 0x16, Power On Scale = 0x0
1082 10:53:01.810435 ASPM: Enabled L1
1083 10:53:01.813881 PCIe: Max_Payload_Size adjusted to 128
1084 10:53:01.817198 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 10:53:01.820683 PCI: 00:1e.2 scanning...
1086 10:53:01.823865 scan_generic_bus for PCI: 00:1e.2
1087 10:53:01.827398 SPI: 00 enabled
1088 10:53:01.830349 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 10:53:01.836961 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 10:53:01.840187 PCI: 00:1e.3 scanning...
1091 10:53:01.843958 scan_generic_bus for PCI: 00:1e.3
1092 10:53:01.844043 SPI: 00 enabled
1093 10:53:01.850560 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 10:53:01.853890 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 10:53:01.857394 PCI: 00:1f.0 scanning...
1096 10:53:01.860908 scan_static_bus for PCI: 00:1f.0
1097 10:53:01.863690 PNP: 0c09.0 enabled
1098 10:53:01.867601 PNP: 0c09.0 scanning...
1099 10:53:01.870795 scan_static_bus for PNP: 0c09.0
1100 10:53:01.873460 scan_static_bus for PNP: 0c09.0 done
1101 10:53:01.876897 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1102 10:53:01.880221 scan_static_bus for PCI: 00:1f.0 done
1103 10:53:01.886770 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1104 10:53:01.889918 PCI: 00:1f.2 scanning...
1105 10:53:01.893432 scan_static_bus for PCI: 00:1f.2
1106 10:53:01.893556 GENERIC: 0.0 enabled
1107 10:53:01.896704 GENERIC: 0.0 scanning...
1108 10:53:01.900318 scan_static_bus for GENERIC: 0.0
1109 10:53:01.903571 GENERIC: 0.0 enabled
1110 10:53:01.903656 GENERIC: 1.0 enabled
1111 10:53:01.906685
1112 10:53:01.910068 scan_static_bus for GENERIC: 0.0 done
1113 10:53:01.913441 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1114 10:53:01.916695 scan_static_bus for PCI: 00:1f.2 done
1115 10:53:01.923107 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1116 10:53:01.923193 PCI: 00:1f.3 scanning...
1117 10:53:01.926711 scan_static_bus for PCI: 00:1f.3
1118 10:53:01.933647 scan_static_bus for PCI: 00:1f.3 done
1119 10:53:01.936688 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1120 10:53:01.939913 PCI: 00:1f.5 scanning...
1121 10:53:01.943348 scan_generic_bus for PCI: 00:1f.5
1122 10:53:01.946801 scan_generic_bus for PCI: 00:1f.5 done
1123 10:53:01.950037 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1124 10:53:01.953447
1125 10:53:01.956544 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1126 10:53:01.960121 scan_static_bus for Root Device done
1127 10:53:01.966194 scan_bus: bus Root Device finished in 735 msecs
1128 10:53:01.966298 done
1129 10:53:01.973239 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1130 10:53:01.976054 Chrome EC: UHEPI supported
1131 10:53:01.983391 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1132 10:53:01.986306 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1133 10:53:01.990072
1134 10:53:01.992736 SPI flash protection: WPSW=0 SRP0=1
1135 10:53:01.996044 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1136 10:53:02.002969 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1137 10:53:02.005808 found VGA at PCI: 00:02.0
1138 10:53:02.009268 Setting up VGA for PCI: 00:02.0
1139 10:53:02.012589 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1140 10:53:02.019428 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1141 10:53:02.019516 Allocating resources...
1142 10:53:02.022497 Reading resources...
1143 10:53:02.025837 Root Device read_resources bus 0 link: 0
1144 10:53:02.032684 DOMAIN: 0000 read_resources bus 0 link: 0
1145 10:53:02.035606 PCI: 00:04.0 read_resources bus 1 link: 0
1146 10:53:02.042285 PCI: 00:04.0 read_resources bus 1 link: 0 done
1147 10:53:02.045690 PCI: 00:0d.0 read_resources bus 0 link: 0
1148 10:53:02.048868 USB0 port 0 read_resources bus 0 link: 0
1149 10:53:02.052300
1150 10:53:02.055604 USB0 port 0 read_resources bus 0 link: 0 done
1151 10:53:02.061886 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1152 10:53:02.065420 PCI: 00:14.0 read_resources bus 0 link: 0
1153 10:53:02.068659 USB0 port 0 read_resources bus 0 link: 0
1154 10:53:02.075919 USB0 port 0 read_resources bus 0 link: 0 done
1155 10:53:02.079032 PCI: 00:14.0 read_resources bus 0 link: 0 done
1156 10:53:02.085784 PCI: 00:14.3 read_resources bus 0 link: 0
1157 10:53:02.089465 PCI: 00:14.3 read_resources bus 0 link: 0 done
1158 10:53:02.096025 PCI: 00:15.0 read_resources bus 0 link: 0
1159 10:53:02.099441 PCI: 00:15.0 read_resources bus 0 link: 0 done
1160 10:53:02.105493 PCI: 00:15.1 read_resources bus 0 link: 0
1161 10:53:02.108884 PCI: 00:15.1 read_resources bus 0 link: 0 done
1162 10:53:02.116098 PCI: 00:19.1 read_resources bus 0 link: 0
1163 10:53:02.119688 PCI: 00:19.1 read_resources bus 0 link: 0 done
1164 10:53:02.126110 PCI: 00:1d.0 read_resources bus 1 link: 0
1165 10:53:02.129870 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1166 10:53:02.135949 PCI: 00:1e.2 read_resources bus 2 link: 0
1167 10:53:02.139354 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1168 10:53:02.146190 PCI: 00:1e.3 read_resources bus 3 link: 0
1169 10:53:02.149063 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1170 10:53:02.155720 PCI: 00:1f.0 read_resources bus 0 link: 0
1171 10:53:02.159006 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1172 10:53:02.162692 PCI: 00:1f.2 read_resources bus 0 link: 0
1173 10:53:02.166137
1174 10:53:02.169227 GENERIC: 0.0 read_resources bus 0 link: 0
1175 10:53:02.172909 GENERIC: 0.0 read_resources bus 0 link: 0 done
1176 10:53:02.179109 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1177 10:53:02.185692 DOMAIN: 0000 read_resources bus 0 link: 0 done
1178 10:53:02.189052 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1179 10:53:02.195530 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1180 10:53:02.198726 Root Device read_resources bus 0 link: 0 done
1181 10:53:02.202169 Done reading resources.
1182 10:53:02.205513 Show resources in subtree (Root Device)...After reading.
1183 10:53:02.212114 Root Device child on link 0 DOMAIN: 0000
1184 10:53:02.215752 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1185 10:53:02.225454 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1186 10:53:02.235542 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1187 10:53:02.235628 PCI: 00:00.0
1188 10:53:02.245160 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1189 10:53:02.255000 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1190 10:53:02.265091 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1191 10:53:02.274925 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1192 10:53:02.285132 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1193 10:53:02.294645 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1194 10:53:02.301375 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1195 10:53:02.311261 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1196 10:53:02.321251 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1197 10:53:02.331303 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1198 10:53:02.340892 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1199 10:53:02.347893 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1200 10:53:02.350933
1201 10:53:02.358328 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1202 10:53:02.367393 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1203 10:53:02.377379 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1204 10:53:02.387226 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1205 10:53:02.397446 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1206 10:53:02.407483 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1207 10:53:02.413576 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1208 10:53:02.423652 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1209 10:53:02.426981 PCI: 00:02.0
1210 10:53:02.436959 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1211 10:53:02.446610 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1212 10:53:02.456844 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1213 10:53:02.459922 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1214 10:53:02.469982 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1215 10:53:02.473387 GENERIC: 0.0
1216 10:53:02.473488 PCI: 00:05.0
1217 10:53:02.482848 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1218 10:53:02.489775 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1219 10:53:02.489864 GENERIC: 0.0
1220 10:53:02.493113 PCI: 00:08.0
1221 10:53:02.502778 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 10:53:02.502867 PCI: 00:0a.0
1223 10:53:02.506061 PCI: 00:0d.0 child on link 0 USB0 port 0
1224 10:53:02.516142 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1225 10:53:02.520121
1226 10:53:02.522753 USB0 port 0 child on link 0 USB3 port 0
1227 10:53:02.522841 USB3 port 0
1228 10:53:02.525957 USB3 port 1
1229 10:53:02.526045 USB3 port 2
1230 10:53:02.529420 USB3 port 3
1231 10:53:02.533121 PCI: 00:14.0 child on link 0 USB0 port 0
1232 10:53:02.542455 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1233 10:53:02.549214 USB0 port 0 child on link 0 USB2 port 0
1234 10:53:02.549332 USB2 port 0
1235 10:53:02.552234 USB2 port 1
1236 10:53:02.552323 USB2 port 2
1237 10:53:02.555804 USB2 port 3
1238 10:53:02.555895 USB2 port 4
1239 10:53:02.559166 USB2 port 5
1240 10:53:02.559255 USB2 port 6
1241 10:53:02.562270 USB2 port 7
1242 10:53:02.562360 USB2 port 8
1243 10:53:02.565752
1244 10:53:02.565841 USB2 port 9
1245 10:53:02.569239 USB3 port 0
1246 10:53:02.569330 USB3 port 1
1247 10:53:02.572165 USB3 port 2
1248 10:53:02.572253 USB3 port 3
1249 10:53:02.575849 PCI: 00:14.2
1250 10:53:02.585415 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 10:53:02.595687 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1252 10:53:02.598537 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1253 10:53:02.608418 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1254 10:53:02.611952 GENERIC: 0.0
1255 10:53:02.615061 PCI: 00:15.0 child on link 0 I2C: 00:1a
1256 10:53:02.625077 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 10:53:02.625215 I2C: 00:1a
1258 10:53:02.629062 I2C: 00:31
1259 10:53:02.629157 I2C: 00:32
1260 10:53:02.634911 PCI: 00:15.1 child on link 0 I2C: 00:10
1261 10:53:02.644983 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 10:53:02.645126 I2C: 00:10
1263 10:53:02.648514 PCI: 00:15.2
1264 10:53:02.658315 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 10:53:02.658453 PCI: 00:15.3
1266 10:53:02.668294 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 10:53:02.671607 PCI: 00:16.0
1268 10:53:02.681034 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1269 10:53:02.681180 PCI: 00:19.0
1270 10:53:02.684357 PCI: 00:19.1 child on link 0 I2C: 00:15
1271 10:53:02.687868
1272 10:53:02.694532 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1273 10:53:02.697600
1274 10:53:02.697699 I2C: 00:15
1275 10:53:02.701019 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1276 10:53:02.711261 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1277 10:53:02.720873 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1278 10:53:02.731505 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1279 10:53:02.731652 GENERIC: 0.0
1280 10:53:02.734224 PCI: 01:00.0
1281 10:53:02.743942 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1282 10:53:02.754272 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1283 10:53:02.754419 PCI: 00:1e.0
1284 10:53:02.766890 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1285 10:53:02.770934 PCI: 00:1e.2 child on link 0 SPI: 00
1286 10:53:02.779922 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1287 10:53:02.780068 SPI: 00
1288 10:53:02.786634 PCI: 00:1e.3 child on link 0 SPI: 00
1289 10:53:02.796517 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1290 10:53:02.796655 SPI: 00
1291 10:53:02.799912 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1292 10:53:02.809933 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1293 10:53:02.810073 PNP: 0c09.0
1294 10:53:02.820052 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1295 10:53:02.823135 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1296 10:53:02.832974 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1297 10:53:02.842907 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1298 10:53:02.846238 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1299 10:53:02.849445 GENERIC: 0.0
1300 10:53:02.852948 GENERIC: 1.0
1301 10:53:02.853039 PCI: 00:1f.3
1302 10:53:02.862889 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1303 10:53:02.872659 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1304 10:53:02.875798 PCI: 00:1f.5
1305 10:53:02.882358 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1306 10:53:02.889308 CPU_CLUSTER: 0 child on link 0 APIC: 00
1307 10:53:02.889397 APIC: 00
1308 10:53:02.889466 APIC: 01
1309 10:53:02.892649 APIC: 03
1310 10:53:02.892735 APIC: 07
1311 10:53:02.895756 APIC: 05
1312 10:53:02.895843 APIC: 04
1313 10:53:02.895910 APIC: 02
1314 10:53:02.899200 APIC: 06
1315 10:53:02.905540 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1316 10:53:02.912410 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1317 10:53:02.919041 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1318 10:53:02.925324 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1319 10:53:02.928796 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1320 10:53:02.932201 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1321 10:53:02.938729 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1322 10:53:02.945425 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1323 10:53:02.955187 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1324 10:53:02.961999 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1325 10:53:02.968300 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1326 10:53:02.974913 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1327 10:53:02.981659 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1328 10:53:02.991514 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1329 10:53:02.994675 DOMAIN: 0000: Resource ranges:
1330 10:53:02.998288 * Base: 1000, Size: 800, Tag: 100
1331 10:53:03.001288 * Base: 1900, Size: e700, Tag: 100
1332 10:53:03.004615 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1333 10:53:03.007792
1334 10:53:03.011421 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1335 10:53:03.014686
1336 10:53:03.021234 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1337 10:53:03.027831 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1338 10:53:03.034152 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1339 10:53:03.044470 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1340 10:53:03.051064 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1341 10:53:03.057819 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1342 10:53:03.067526 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1343 10:53:03.074010 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1344 10:53:03.080728 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1345 10:53:03.090785 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1346 10:53:03.097419 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1347 10:53:03.104018 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1348 10:53:03.113815 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1349 10:53:03.120533 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1350 10:53:03.126695 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1351 10:53:03.136785 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1352 10:53:03.143263 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1353 10:53:03.150141 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1354 10:53:03.160022 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1355 10:53:03.166349 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1356 10:53:03.173402 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1357 10:53:03.183471 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1358 10:53:03.189702 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1359 10:53:03.192725 DOMAIN: 0000: Resource ranges:
1360 10:53:03.196139 * Base: 7fc00000, Size: 40400000, Tag: 200
1361 10:53:03.202892 * Base: d0000000, Size: 28000000, Tag: 200
1362 10:53:03.205806 * Base: fa000000, Size: 1000000, Tag: 200
1363 10:53:03.209413 * Base: fb001000, Size: 2fff000, Tag: 200
1364 10:53:03.212558 * Base: fe010000, Size: 2e000, Tag: 200
1365 10:53:03.219088 * Base: fe03f000, Size: d41000, Tag: 200
1366 10:53:03.222552 * Base: fed88000, Size: 8000, Tag: 200
1367 10:53:03.225867 * Base: fed93000, Size: d000, Tag: 200
1368 10:53:03.229440 * Base: feda2000, Size: 1e000, Tag: 200
1369 10:53:03.236307 * Base: fede0000, Size: 1220000, Tag: 200
1370 10:53:03.239528 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1371 10:53:03.245742 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1372 10:53:03.252680 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1373 10:53:03.259030 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1374 10:53:03.265612 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1375 10:53:03.271905 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1376 10:53:03.278804 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1377 10:53:03.285131 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1378 10:53:03.291680 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1379 10:53:03.298179 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1380 10:53:03.305319 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1381 10:53:03.311468 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1382 10:53:03.318202 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1383 10:53:03.324981 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1384 10:53:03.331508 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1385 10:53:03.338185 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1386 10:53:03.344516 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1387 10:53:03.351295 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1388 10:53:03.357862 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1389 10:53:03.364857 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1390 10:53:03.371270 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1391 10:53:03.377795 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1392 10:53:03.384386 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1393 10:53:03.394275 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1394 10:53:03.400922 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1395 10:53:03.404009 PCI: 00:1d.0: Resource ranges:
1396 10:53:03.407530 * Base: 7fc00000, Size: 100000, Tag: 200
1397 10:53:03.414359 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1398 10:53:03.420892 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1399 10:53:03.430525 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1400 10:53:03.437257 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1401 10:53:03.440354 Root Device assign_resources, bus 0 link: 0
1402 10:53:03.447460 DOMAIN: 0000 assign_resources, bus 0 link: 0
1403 10:53:03.453755 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1404 10:53:03.463600 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1405 10:53:03.470518 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1406 10:53:03.480942 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1407 10:53:03.483329 PCI: 00:04.0 assign_resources, bus 1 link: 0
1408 10:53:03.490052 PCI: 00:04.0 assign_resources, bus 1 link: 0
1409 10:53:03.496752 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1410 10:53:03.506777 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1411 10:53:03.513218 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1412 10:53:03.516327 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1413 10:53:03.522911 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1414 10:53:03.529630 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1415 10:53:03.536266 PCI: 00:14.0 assign_resources, bus 0 link: 0
1416 10:53:03.540078 PCI: 00:14.0 assign_resources, bus 0 link: 0
1417 10:53:03.549654 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1418 10:53:03.556250 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1419 10:53:03.566349 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1420 10:53:03.569418 PCI: 00:14.3 assign_resources, bus 0 link: 0
1421 10:53:03.572365 PCI: 00:14.3 assign_resources, bus 0 link: 0
1422 10:53:03.582155 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1423 10:53:03.585599 PCI: 00:15.0 assign_resources, bus 0 link: 0
1424 10:53:03.592068 PCI: 00:15.0 assign_resources, bus 0 link: 0
1425 10:53:03.598890 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1426 10:53:03.602247 PCI: 00:15.1 assign_resources, bus 0 link: 0
1427 10:53:03.605109
1428 10:53:03.608503 PCI: 00:15.1 assign_resources, bus 0 link: 0
1429 10:53:03.615121 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1430 10:53:03.625719 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1431 10:53:03.631653 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1432 10:53:03.642013 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1433 10:53:03.644885 PCI: 00:19.1 assign_resources, bus 0 link: 0
1434 10:53:03.651915 PCI: 00:19.1 assign_resources, bus 0 link: 0
1435 10:53:03.658304 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1436 10:53:03.667755 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1437 10:53:03.677781 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1438 10:53:03.680994 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1439 10:53:03.690875 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1440 10:53:03.697377 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1441 10:53:03.704402 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1442 10:53:03.710881 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1443 10:53:03.717371 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1444 10:53:03.720653 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1445 10:53:03.730357 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1446 10:53:03.733487 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1447 10:53:03.737225 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1448 10:53:03.743484 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1449 10:53:03.747141 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1450 10:53:03.753434 LPC: Trying to open IO window from 800 size 1ff
1451 10:53:03.760067 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1452 10:53:03.769760 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1453 10:53:03.776158 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1454 10:53:03.783116 DOMAIN: 0000 assign_resources, bus 0 link: 0
1455 10:53:03.786408 Root Device assign_resources, bus 0 link: 0
1456 10:53:03.789682 Done setting resources.
1457 10:53:03.796368 Show resources in subtree (Root Device)...After assigning values.
1458 10:53:03.799875 Root Device child on link 0 DOMAIN: 0000
1459 10:53:03.802664 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1460 10:53:03.812590 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1461 10:53:03.822671 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1462 10:53:03.825665 PCI: 00:00.0
1463 10:53:03.835635 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1464 10:53:03.842687 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1465 10:53:03.845682
1466 10:53:03.851977 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1467 10:53:03.861992 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1468 10:53:03.871748 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1469 10:53:03.882574 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1470 10:53:03.892004 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1471 10:53:03.901996 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1472 10:53:03.908406 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1473 10:53:03.918143 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1474 10:53:03.927827 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1475 10:53:03.938101 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1476 10:53:03.947914 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1477 10:53:03.955040 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1478 10:53:03.964834 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1479 10:53:03.974583 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1480 10:53:03.984697 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1481 10:53:03.994191 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1482 10:53:04.003941 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1483 10:53:04.013694 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1484 10:53:04.013909 PCI: 00:02.0
1485 10:53:04.023919 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1486 10:53:04.027295
1487 10:53:04.037014 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1488 10:53:04.043757 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1489 10:53:04.047146
1490 10:53:04.050273 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1491 10:53:04.060124 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1492 10:53:04.063423 GENERIC: 0.0
1493 10:53:04.063595 PCI: 00:05.0
1494 10:53:04.073320 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1495 10:53:04.080009 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1496 10:53:04.080226 GENERIC: 0.0
1497 10:53:04.083379 PCI: 00:08.0
1498 10:53:04.093897 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1499 10:53:04.094149 PCI: 00:0a.0
1500 10:53:04.099845 PCI: 00:0d.0 child on link 0 USB0 port 0
1501 10:53:04.109380 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1502 10:53:04.112950 USB0 port 0 child on link 0 USB3 port 0
1503 10:53:04.116410 USB3 port 0
1504 10:53:04.116812 USB3 port 1
1505 10:53:04.120150 USB3 port 2
1506 10:53:04.120665 USB3 port 3
1507 10:53:04.126350 PCI: 00:14.0 child on link 0 USB0 port 0
1508 10:53:04.136590 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1509 10:53:04.139600 USB0 port 0 child on link 0 USB2 port 0
1510 10:53:04.142887 USB2 port 0
1511 10:53:04.143404 USB2 port 1
1512 10:53:04.146276 USB2 port 2
1513 10:53:04.146823 USB2 port 3
1514 10:53:04.149606 USB2 port 4
1515 10:53:04.150147 USB2 port 5
1516 10:53:04.152988 USB2 port 6
1517 10:53:04.153576 USB2 port 7
1518 10:53:04.156387 USB2 port 8
1519 10:53:04.159494 USB2 port 9
1520 10:53:04.160042 USB3 port 0
1521 10:53:04.162717 USB3 port 1
1522 10:53:04.163257 USB3 port 2
1523 10:53:04.165912 USB3 port 3
1524 10:53:04.166354 PCI: 00:14.2
1525 10:53:04.176130 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1526 10:53:04.185803 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1527 10:53:04.192710 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1528 10:53:04.202517 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1529 10:53:04.203054 GENERIC: 0.0
1530 10:53:04.208748 PCI: 00:15.0 child on link 0 I2C: 00:1a
1531 10:53:04.219174 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1532 10:53:04.219711 I2C: 00:1a
1533 10:53:04.222690 I2C: 00:31
1534 10:53:04.223263 I2C: 00:32
1535 10:53:04.228802 PCI: 00:15.1 child on link 0 I2C: 00:10
1536 10:53:04.238688 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1537 10:53:04.239247 I2C: 00:10
1538 10:53:04.242194 PCI: 00:15.2
1539 10:53:04.252181 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1540 10:53:04.252722 PCI: 00:15.3
1541 10:53:04.262144 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1542 10:53:04.265070 PCI: 00:16.0
1543 10:53:04.274931 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1544 10:53:04.278464 PCI: 00:19.0
1545 10:53:04.281846 PCI: 00:19.1 child on link 0 I2C: 00:15
1546 10:53:04.291641 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1547 10:53:04.292190 I2C: 00:15
1548 10:53:04.298588 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1549 10:53:04.308432 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1550 10:53:04.318139 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1551 10:53:04.327985 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1552 10:53:04.331331 GENERIC: 0.0
1553 10:53:04.331770 PCI: 01:00.0
1554 10:53:04.341345 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1555 10:53:04.344699
1556 10:53:04.354925 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1557 10:53:04.355489 PCI: 00:1e.0
1558 10:53:04.364711 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1559 10:53:04.371429 PCI: 00:1e.2 child on link 0 SPI: 00
1560 10:53:04.381371 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1561 10:53:04.381857 SPI: 00
1562 10:53:04.385056 PCI: 00:1e.3 child on link 0 SPI: 00
1563 10:53:04.394258 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1564 10:53:04.398166 SPI: 00
1565 10:53:04.401272 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1566 10:53:04.410960 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1567 10:53:04.411537 PNP: 0c09.0
1568 10:53:04.421083 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1569 10:53:04.424044 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1570 10:53:04.434382 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1571 10:53:04.444313 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1572 10:53:04.447754 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1573 10:53:04.450798 GENERIC: 0.0
1574 10:53:04.451352 GENERIC: 1.0
1575 10:53:04.454023 PCI: 00:1f.3
1576 10:53:04.464043 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1577 10:53:04.473688 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1578 10:53:04.477195 PCI: 00:1f.5
1579 10:53:04.487066 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1580 10:53:04.490458 CPU_CLUSTER: 0 child on link 0 APIC: 00
1581 10:53:04.494195 APIC: 00
1582 10:53:04.494628 APIC: 01
1583 10:53:04.494971 APIC: 03
1584 10:53:04.496926 APIC: 07
1585 10:53:04.497358 APIC: 05
1586 10:53:04.497746 APIC: 04
1587 10:53:04.500186
1588 10:53:04.500621 APIC: 02
1589 10:53:04.500964 APIC: 06
1590 10:53:04.503741 Done allocating resources.
1591 10:53:04.510146 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1592 10:53:04.517158 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1593 10:53:04.519813 Configure GPIOs for I2S audio on UP4.
1594 10:53:04.526811 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1595 10:53:04.530099 Enabling resources...
1596 10:53:04.533044 PCI: 00:00.0 subsystem <- 8086/9a12
1597 10:53:04.536837 PCI: 00:00.0 cmd <- 06
1598 10:53:04.539871 PCI: 00:02.0 subsystem <- 8086/9a40
1599 10:53:04.540307 PCI: 00:02.0 cmd <- 03
1600 10:53:04.543120
1601 10:53:04.546507 PCI: 00:04.0 subsystem <- 8086/9a03
1602 10:53:04.547042 PCI: 00:04.0 cmd <- 02
1603 10:53:04.553558 PCI: 00:05.0 subsystem <- 8086/9a19
1604 10:53:04.553997 PCI: 00:05.0 cmd <- 02
1605 10:53:04.556348 PCI: 00:08.0 subsystem <- 8086/9a11
1606 10:53:04.559866 PCI: 00:08.0 cmd <- 06
1607 10:53:04.562953 PCI: 00:0d.0 subsystem <- 8086/9a13
1608 10:53:04.566124 PCI: 00:0d.0 cmd <- 02
1609 10:53:04.569248 PCI: 00:14.0 subsystem <- 8086/a0ed
1610 10:53:04.572485 PCI: 00:14.0 cmd <- 02
1611 10:53:04.575845 PCI: 00:14.2 subsystem <- 8086/a0ef
1612 10:53:04.579273 PCI: 00:14.2 cmd <- 02
1613 10:53:04.582650 PCI: 00:14.3 subsystem <- 8086/a0f0
1614 10:53:04.585586 PCI: 00:14.3 cmd <- 02
1615 10:53:04.589233 PCI: 00:15.0 subsystem <- 8086/a0e8
1616 10:53:04.592544 PCI: 00:15.0 cmd <- 02
1617 10:53:04.595721 PCI: 00:15.1 subsystem <- 8086/a0e9
1618 10:53:04.596159 PCI: 00:15.1 cmd <- 02
1619 10:53:04.602759 PCI: 00:15.2 subsystem <- 8086/a0ea
1620 10:53:04.603284 PCI: 00:15.2 cmd <- 02
1621 10:53:04.605795 PCI: 00:15.3 subsystem <- 8086/a0eb
1622 10:53:04.609167 PCI: 00:15.3 cmd <- 02
1623 10:53:04.612533 PCI: 00:16.0 subsystem <- 8086/a0e0
1624 10:53:04.615746 PCI: 00:16.0 cmd <- 02
1625 10:53:04.619097 PCI: 00:19.1 subsystem <- 8086/a0c6
1626 10:53:04.622075 PCI: 00:19.1 cmd <- 02
1627 10:53:04.625888 PCI: 00:1d.0 bridge ctrl <- 0013
1628 10:53:04.628892 PCI: 00:1d.0 subsystem <- 8086/a0b0
1629 10:53:04.632634 PCI: 00:1d.0 cmd <- 06
1630 10:53:04.635625 PCI: 00:1e.0 subsystem <- 8086/a0a8
1631 10:53:04.639125 PCI: 00:1e.0 cmd <- 06
1632 10:53:04.642084 PCI: 00:1e.2 subsystem <- 8086/a0aa
1633 10:53:04.645537 PCI: 00:1e.2 cmd <- 06
1634 10:53:04.648880 PCI: 00:1e.3 subsystem <- 8086/a0ab
1635 10:53:04.649422 PCI: 00:1e.3 cmd <- 02
1636 10:53:04.656040 PCI: 00:1f.0 subsystem <- 8086/a087
1637 10:53:04.656475 PCI: 00:1f.0 cmd <- 407
1638 10:53:04.658530 PCI: 00:1f.3 subsystem <- 8086/a0c8
1639 10:53:04.661940 PCI: 00:1f.3 cmd <- 02
1640 10:53:04.665778 PCI: 00:1f.5 subsystem <- 8086/a0a4
1641 10:53:04.668740 PCI: 00:1f.5 cmd <- 406
1642 10:53:04.673130 PCI: 01:00.0 cmd <- 02
1643 10:53:04.677864 done.
1644 10:53:04.680809 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1645 10:53:04.684023 Initializing devices...
1646 10:53:04.687311 Root Device init
1647 10:53:04.690722 Chrome EC: Set SMI mask to 0x0000000000000000
1648 10:53:04.697525 Chrome EC: clear events_b mask to 0x0000000000000000
1649 10:53:04.704350 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1650 10:53:04.707292 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1651 10:53:04.714595 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1652 10:53:04.720810 Chrome EC: Set WAKE mask to 0x0000000000000000
1653 10:53:04.724101 fw_config match found: DB_USB=USB3_ACTIVE
1654 10:53:04.731416 Configure Right Type-C port orientation for retimer
1655 10:53:04.734024 Root Device init finished in 44 msecs
1656 10:53:04.737579 PCI: 00:00.0 init
1657 10:53:04.740815 CPU TDP = 9 Watts
1658 10:53:04.741251 CPU PL1 = 9 Watts
1659 10:53:04.744219 CPU PL2 = 40 Watts
1660 10:53:04.747088 CPU PL4 = 83 Watts
1661 10:53:04.750538 PCI: 00:00.0 init finished in 8 msecs
1662 10:53:04.750976 PCI: 00:02.0 init
1663 10:53:04.753928 GMA: Found VBT in CBFS
1664 10:53:04.757138 GMA: Found valid VBT in CBFS
1665 10:53:04.764031 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1666 10:53:04.770500 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1667 10:53:04.773512 PCI: 00:02.0 init finished in 18 msecs
1668 10:53:04.776907 PCI: 00:05.0 init
1669 10:53:04.780177 PCI: 00:05.0 init finished in 0 msecs
1670 10:53:04.783776 PCI: 00:08.0 init
1671 10:53:04.786946 PCI: 00:08.0 init finished in 0 msecs
1672 10:53:04.790003 PCI: 00:14.0 init
1673 10:53:04.793152 PCI: 00:14.0 init finished in 0 msecs
1674 10:53:04.796693 PCI: 00:14.2 init
1675 10:53:04.799964 PCI: 00:14.2 init finished in 0 msecs
1676 10:53:04.803173 PCI: 00:15.0 init
1677 10:53:04.806995 I2C bus 0 version 0x3230302a
1678 10:53:04.809791 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1679 10:53:04.813106 PCI: 00:15.0 init finished in 6 msecs
1680 10:53:04.813704 PCI: 00:15.1 init
1681 10:53:04.816491 I2C bus 1 version 0x3230302a
1682 10:53:04.819846 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1683 10:53:04.826376 PCI: 00:15.1 init finished in 6 msecs
1684 10:53:04.826815 PCI: 00:15.2 init
1685 10:53:04.830091 I2C bus 2 version 0x3230302a
1686 10:53:04.832911 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1687 10:53:04.836114 PCI: 00:15.2 init finished in 6 msecs
1688 10:53:04.840447 PCI: 00:15.3 init
1689 10:53:04.843176 I2C bus 3 version 0x3230302a
1690 10:53:04.846910 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1691 10:53:04.849648 PCI: 00:15.3 init finished in 6 msecs
1692 10:53:04.853142 PCI: 00:16.0 init
1693 10:53:04.856042 PCI: 00:16.0 init finished in 0 msecs
1694 10:53:04.859457 PCI: 00:19.1 init
1695 10:53:04.863226 I2C bus 5 version 0x3230302a
1696 10:53:04.866323 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1697 10:53:04.869375 PCI: 00:19.1 init finished in 6 msecs
1698 10:53:04.872705 PCI: 00:1d.0 init
1699 10:53:04.876249 Initializing PCH PCIe bridge.
1700 10:53:04.879968 PCI: 00:1d.0 init finished in 3 msecs
1701 10:53:04.883230 PCI: 00:1f.0 init
1702 10:53:04.885989 IOAPIC: Initializing IOAPIC at 0xfec00000
1703 10:53:04.889025 IOAPIC: Bootstrap Processor Local APIC = 0x00
1704 10:53:04.892399 IOAPIC: ID = 0x02
1705 10:53:04.896165 IOAPIC: Dumping registers
1706 10:53:04.896478 reg 0x0000: 0x02000000
1707 10:53:04.898945
1708 10:53:04.899258 reg 0x0001: 0x00770020
1709 10:53:04.902432 reg 0x0002: 0x00000000
1710 10:53:04.905441 PCI: 00:1f.0 init finished in 21 msecs
1711 10:53:04.908854 PCI: 00:1f.2 init
1712 10:53:04.912513 Disabling ACPI via APMC.
1713 10:53:04.912817 APMC done.
1714 10:53:04.918976 PCI: 00:1f.2 init finished in 5 msecs
1715 10:53:04.929469 PCI: 01:00.0 init
1716 10:53:04.932746 PCI: 01:00.0 init finished in 0 msecs
1717 10:53:04.936442 PNP: 0c09.0 init
1718 10:53:04.939431 Google Chrome EC uptime: 8.251 seconds
1719 10:53:04.946002 Google Chrome AP resets since EC boot: 1
1720 10:53:04.949174 Google Chrome most recent AP reset causes:
1721 10:53:04.952503 0.452: 32775 shutdown: entering G3
1722 10:53:04.959220 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1723 10:53:04.962679 PNP: 0c09.0 init finished in 22 msecs
1724 10:53:04.968339 Devices initialized
1725 10:53:04.971681 Show all devs... After init.
1726 10:53:04.974812 Root Device: enabled 1
1727 10:53:04.975167 DOMAIN: 0000: enabled 1
1728 10:53:04.978281 CPU_CLUSTER: 0: enabled 1
1729 10:53:04.981685 PCI: 00:00.0: enabled 1
1730 10:53:04.984870 PCI: 00:02.0: enabled 1
1731 10:53:04.985169 PCI: 00:04.0: enabled 1
1732 10:53:04.988237 PCI: 00:05.0: enabled 1
1733 10:53:04.991512 PCI: 00:06.0: enabled 0
1734 10:53:04.994635 PCI: 00:07.0: enabled 0
1735 10:53:04.994934 PCI: 00:07.1: enabled 0
1736 10:53:04.998159 PCI: 00:07.2: enabled 0
1737 10:53:05.001645 PCI: 00:07.3: enabled 0
1738 10:53:05.004915 PCI: 00:08.0: enabled 1
1739 10:53:05.005247 PCI: 00:09.0: enabled 0
1740 10:53:05.008326 PCI: 00:0a.0: enabled 0
1741 10:53:05.011306 PCI: 00:0d.0: enabled 1
1742 10:53:05.014532 PCI: 00:0d.1: enabled 0
1743 10:53:05.014840 PCI: 00:0d.2: enabled 0
1744 10:53:05.018557 PCI: 00:0d.3: enabled 0
1745 10:53:05.021235 PCI: 00:0e.0: enabled 0
1746 10:53:05.021600 PCI: 00:10.2: enabled 1
1747 10:53:05.024333
1748 10:53:05.024640 PCI: 00:10.6: enabled 0
1749 10:53:05.027589 PCI: 00:10.7: enabled 0
1750 10:53:05.031423 PCI: 00:12.0: enabled 0
1751 10:53:05.031729 PCI: 00:12.6: enabled 0
1752 10:53:05.034809 PCI: 00:13.0: enabled 0
1753 10:53:05.038133 PCI: 00:14.0: enabled 1
1754 10:53:05.041106 PCI: 00:14.1: enabled 0
1755 10:53:05.041415 PCI: 00:14.2: enabled 1
1756 10:53:05.044419 PCI: 00:14.3: enabled 1
1757 10:53:05.047547 PCI: 00:15.0: enabled 1
1758 10:53:05.051405 PCI: 00:15.1: enabled 1
1759 10:53:05.051840 PCI: 00:15.2: enabled 1
1760 10:53:05.054376 PCI: 00:15.3: enabled 1
1761 10:53:05.058130 PCI: 00:16.0: enabled 1
1762 10:53:05.061272 PCI: 00:16.1: enabled 0
1763 10:53:05.061823 PCI: 00:16.2: enabled 0
1764 10:53:05.064396 PCI: 00:16.3: enabled 0
1765 10:53:05.067925 PCI: 00:16.4: enabled 0
1766 10:53:05.068348 PCI: 00:16.5: enabled 0
1767 10:53:05.071228 PCI: 00:17.0: enabled 0
1768 10:53:05.074216 PCI: 00:19.0: enabled 0
1769 10:53:05.077589 PCI: 00:19.1: enabled 1
1770 10:53:05.078016 PCI: 00:19.2: enabled 0
1771 10:53:05.080987 PCI: 00:1c.0: enabled 1
1772 10:53:05.084563 PCI: 00:1c.1: enabled 0
1773 10:53:05.087390 PCI: 00:1c.2: enabled 0
1774 10:53:05.087818 PCI: 00:1c.3: enabled 0
1775 10:53:05.091047 PCI: 00:1c.4: enabled 0
1776 10:53:05.094442 PCI: 00:1c.5: enabled 0
1777 10:53:05.097703 PCI: 00:1c.6: enabled 1
1778 10:53:05.098132 PCI: 00:1c.7: enabled 0
1779 10:53:05.100676 PCI: 00:1d.0: enabled 1
1780 10:53:05.104194 PCI: 00:1d.1: enabled 0
1781 10:53:05.107740 PCI: 00:1d.2: enabled 1
1782 10:53:05.108168 PCI: 00:1d.3: enabled 0
1783 10:53:05.110601 PCI: 00:1e.0: enabled 1
1784 10:53:05.114250 PCI: 00:1e.1: enabled 0
1785 10:53:05.114677 PCI: 00:1e.2: enabled 1
1786 10:53:05.117941 PCI: 00:1e.3: enabled 1
1787 10:53:05.121193 PCI: 00:1f.0: enabled 1
1788 10:53:05.124329 PCI: 00:1f.1: enabled 0
1789 10:53:05.125033 PCI: 00:1f.2: enabled 1
1790 10:53:05.127317 PCI: 00:1f.3: enabled 1
1791 10:53:05.130778 PCI: 00:1f.4: enabled 0
1792 10:53:05.134222 PCI: 00:1f.5: enabled 1
1793 10:53:05.134975 PCI: 00:1f.6: enabled 0
1794 10:53:05.137706 PCI: 00:1f.7: enabled 0
1795 10:53:05.140770 APIC: 00: enabled 1
1796 10:53:05.141234 GENERIC: 0.0: enabled 1
1797 10:53:05.144031 GENERIC: 0.0: enabled 1
1798 10:53:05.147001 GENERIC: 1.0: enabled 1
1799 10:53:05.150224 GENERIC: 0.0: enabled 1
1800 10:53:05.150528 GENERIC: 1.0: enabled 1
1801 10:53:05.154188 USB0 port 0: enabled 1
1802 10:53:05.157096 GENERIC: 0.0: enabled 1
1803 10:53:05.160335 USB0 port 0: enabled 1
1804 10:53:05.160640 GENERIC: 0.0: enabled 1
1805 10:53:05.163861 I2C: 00:1a: enabled 1
1806 10:53:05.166802 I2C: 00:31: enabled 1
1807 10:53:05.167103 I2C: 00:32: enabled 1
1808 10:53:05.170209 I2C: 00:10: enabled 1
1809 10:53:05.173454 I2C: 00:15: enabled 1
1810 10:53:05.173774 GENERIC: 0.0: enabled 0
1811 10:53:05.176645 GENERIC: 1.0: enabled 0
1812 10:53:05.180219 GENERIC: 0.0: enabled 1
1813 10:53:05.183309 SPI: 00: enabled 1
1814 10:53:05.183750 SPI: 00: enabled 1
1815 10:53:05.186997 PNP: 0c09.0: enabled 1
1816 10:53:05.189869 GENERIC: 0.0: enabled 1
1817 10:53:05.190175 USB3 port 0: enabled 1
1818 10:53:05.193059 USB3 port 1: enabled 1
1819 10:53:05.196744 USB3 port 2: enabled 0
1820 10:53:05.197051 USB3 port 3: enabled 0
1821 10:53:05.199970 USB2 port 0: enabled 0
1822 10:53:05.203276 USB2 port 1: enabled 1
1823 10:53:05.206403 USB2 port 2: enabled 1
1824 10:53:05.206727 USB2 port 3: enabled 0
1825 10:53:05.209499 USB2 port 4: enabled 1
1826 10:53:05.212752 USB2 port 5: enabled 0
1827 10:53:05.213056 USB2 port 6: enabled 0
1828 10:53:05.216380 USB2 port 7: enabled 0
1829 10:53:05.219733 USB2 port 8: enabled 0
1830 10:53:05.223118 USB2 port 9: enabled 0
1831 10:53:05.223424 USB3 port 0: enabled 0
1832 10:53:05.226445 USB3 port 1: enabled 1
1833 10:53:05.229584 USB3 port 2: enabled 0
1834 10:53:05.230033 USB3 port 3: enabled 0
1835 10:53:05.233107 GENERIC: 0.0: enabled 1
1836 10:53:05.236594 GENERIC: 1.0: enabled 1
1837 10:53:05.237016 APIC: 01: enabled 1
1838 10:53:05.239492 APIC: 03: enabled 1
1839 10:53:05.243264 APIC: 07: enabled 1
1840 10:53:05.243707 APIC: 05: enabled 1
1841 10:53:05.246127 APIC: 04: enabled 1
1842 10:53:05.249741 APIC: 02: enabled 1
1843 10:53:05.250177 APIC: 06: enabled 1
1844 10:53:05.252573 PCI: 01:00.0: enabled 1
1845 10:53:05.259677 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1846 10:53:05.263138 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1847 10:53:05.265950 ELOG: NV offset 0xf30000 size 0x1000
1848 10:53:05.273576 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1849 10:53:05.280316 ELOG: Event(17) added with size 13 at 2022-11-22 10:53:05 UTC
1850 10:53:05.286553 ELOG: Event(92) added with size 9 at 2022-11-22 10:53:05 UTC
1851 10:53:05.293776 ELOG: Event(93) added with size 9 at 2022-11-22 10:53:05 UTC
1852 10:53:05.299897 ELOG: Event(9E) added with size 10 at 2022-11-22 10:53:05 UTC
1853 10:53:05.306457 ELOG: Event(9F) added with size 14 at 2022-11-22 10:53:05 UTC
1854 10:53:05.313403 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1855 10:53:05.320072 ELOG: Event(A1) added with size 10 at 2022-11-22 10:53:05 UTC
1856 10:53:05.326572 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1857 10:53:05.332886 ELOG: Event(A0) added with size 9 at 2022-11-22 10:53:05 UTC
1858 10:53:05.336285 elog_add_boot_reason: Logged dev mode boot
1859 10:53:05.342836 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1860 10:53:05.343271 Finalize devices...
1861 10:53:05.346345 Devices finalized
1862 10:53:05.352756 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1863 10:53:05.356028 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1864 10:53:05.362993 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1865 10:53:05.366426 ME: HFSTS1 : 0x80030055
1866 10:53:05.372726 ME: HFSTS2 : 0x30280116
1867 10:53:05.375875 ME: HFSTS3 : 0x00000050
1868 10:53:05.379319 ME: HFSTS4 : 0x00004000
1869 10:53:05.385914 ME: HFSTS5 : 0x00000000
1870 10:53:05.389252 ME: HFSTS6 : 0x40400006
1871 10:53:05.392685 ME: Manufacturing Mode : YES
1872 10:53:05.396299 ME: SPI Protection Mode Enabled : NO
1873 10:53:05.399350 ME: FW Partition Table : OK
1874 10:53:05.402576
1875 10:53:05.405894 ME: Bringup Loader Failure : NO
1876 10:53:05.409343 ME: Firmware Init Complete : NO
1877 10:53:05.412592 ME: Boot Options Present : NO
1878 10:53:05.415858 ME: Update In Progress : NO
1879 10:53:05.419722 ME: D0i3 Support : YES
1880 10:53:05.422524 ME: Low Power State Enabled : NO
1881 10:53:05.426074 ME: CPU Replaced : YES
1882 10:53:05.432294 ME: CPU Replacement Valid : YES
1883 10:53:05.435828 ME: Current Working State : 5
1884 10:53:05.439298 ME: Current Operation State : 1
1885 10:53:05.442277 ME: Current Operation Mode : 3
1886 10:53:05.445567 ME: Error Code : 0
1887 10:53:05.448783 ME: Enhanced Debug Mode : NO
1888 10:53:05.452683 ME: CPU Debug Disabled : YES
1889 10:53:05.455634 ME: TXT Support : NO
1890 10:53:05.462332 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1891 10:53:05.468899 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1892 10:53:05.472445 CBFS: 'fallback/slic' not found.
1893 10:53:05.478994 ACPI: Writing ACPI tables at 76b01000.
1894 10:53:05.479445 ACPI: * FACS
1895 10:53:05.482057 ACPI: * DSDT
1896 10:53:05.485196 Ramoops buffer: 0x100000@0x76a00000.
1897 10:53:05.489014 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1898 10:53:05.495350 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1899 10:53:05.498523 Google Chrome EC: version:
1900 10:53:05.502068 ro: voema_v2.0.10114-a447f03e46
1901 10:53:05.505189 rw: voema_v2.0.10114-a447f03e46
1902 10:53:05.505655 running image: 2
1903 10:53:05.511748 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1904 10:53:05.516501 ACPI: * FADT
1905 10:53:05.516931 SCI is IRQ9
1906 10:53:05.522915 ACPI: added table 1/32, length now 40
1907 10:53:05.523340 ACPI: * SSDT
1908 10:53:05.526180 Found 1 CPU(s) with 8 core(s) each.
1909 10:53:05.532590 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1910 10:53:05.536066 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1911 10:53:05.539158 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1912 10:53:05.542384 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1913 10:53:05.545723
1914 10:53:05.549267 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1915 10:53:05.555989 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1916 10:53:05.559196 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1917 10:53:05.565743 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1918 10:53:05.572395 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1919 10:53:05.575726 \_SB.PCI0.RP09: Added StorageD3Enable property
1920 10:53:05.582090 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1921 10:53:05.585458 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1922 10:53:05.592554 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1923 10:53:05.595353 PS2K: Passing 80 keymaps to kernel
1924 10:53:05.602400 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1925 10:53:05.608694 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1926 10:53:05.615319 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1927 10:53:05.621695 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1928 10:53:05.628712 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1929 10:53:05.634859 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1930 10:53:05.641236 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1931 10:53:05.648413 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1932 10:53:05.651832 ACPI: added table 2/32, length now 44
1933 10:53:05.651937 ACPI: * MCFG
1934 10:53:05.657962 ACPI: added table 3/32, length now 48
1935 10:53:05.658076 ACPI: * TPM2
1936 10:53:05.661321 TPM2 log created at 0x769f0000
1937 10:53:05.664503 ACPI: added table 4/32, length now 52
1938 10:53:05.667888 ACPI: * MADT
1939 10:53:05.668024 SCI is IRQ9
1940 10:53:05.671041 ACPI: added table 5/32, length now 56
1941 10:53:05.674797 current = 76b09850
1942 10:53:05.674973 ACPI: * DMAR
1943 10:53:05.680989 ACPI: added table 6/32, length now 60
1944 10:53:05.684328 ACPI: added table 7/32, length now 64
1945 10:53:05.684533 ACPI: * HPET
1946 10:53:05.687783 ACPI: added table 8/32, length now 68
1947 10:53:05.691712 ACPI: done.
1948 10:53:05.694167 ACPI tables: 35216 bytes.
1949 10:53:05.694470 smbios_write_tables: 769ef000
1950 10:53:05.698007
1951 10:53:05.701169 EC returned error result code 3
1952 10:53:05.704413 Couldn't obtain OEM name from CBI
1953 10:53:05.708016 Create SMBIOS type 16
1954 10:53:05.708548 Create SMBIOS type 17
1955 10:53:05.710957 GENERIC: 0.0 (WIFI Device)
1956 10:53:05.714062 SMBIOS tables: 1734 bytes.
1957 10:53:05.717962 Writing table forward entry at 0x00000500
1958 10:53:05.724435 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1959 10:53:05.727805 Writing coreboot table at 0x76b25000
1960 10:53:05.734259 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1961 10:53:05.737743 1. 0000000000001000-000000000009ffff: RAM
1962 10:53:05.744265 2. 00000000000a0000-00000000000fffff: RESERVED
1963 10:53:05.746979 3. 0000000000100000-00000000769eefff: RAM
1964 10:53:05.754199 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1965 10:53:05.757171 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1966 10:53:05.763654 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1967 10:53:05.770266 7. 0000000077000000-000000007fbfffff: RESERVED
1968 10:53:05.773551 8. 00000000c0000000-00000000cfffffff: RESERVED
1969 10:53:05.780451 9. 00000000f8000000-00000000f9ffffff: RESERVED
1970 10:53:05.783343 10. 00000000fb000000-00000000fb000fff: RESERVED
1971 10:53:05.787007 11. 00000000fe000000-00000000fe00ffff: RESERVED
1972 10:53:05.793911 12. 00000000fed80000-00000000fed87fff: RESERVED
1973 10:53:05.796733 13. 00000000fed90000-00000000fed92fff: RESERVED
1974 10:53:05.803806 14. 00000000feda0000-00000000feda1fff: RESERVED
1975 10:53:05.806670 15. 00000000fedc0000-00000000feddffff: RESERVED
1976 10:53:05.813409 16. 0000000100000000-00000004803fffff: RAM
1977 10:53:05.813889 Passing 4 GPIOs to payload:
1978 10:53:05.819902 NAME | PORT | POLARITY | VALUE
1979 10:53:05.826302 lid | undefined | high | high
1980 10:53:05.829537 power | undefined | high | low
1981 10:53:05.836330 oprom | undefined | high | low
1982 10:53:05.839737 EC in RW | 0x000000e5 | high | high
1983 10:53:05.846082 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1984 10:53:05.849576 coreboot table: 1576 bytes.
1985 10:53:05.852536 IMD ROOT 0. 0x76fff000 0x00001000
1986 10:53:05.855958 IMD SMALL 1. 0x76ffe000 0x00001000
1987 10:53:05.862652 FSP MEMORY 2. 0x76c4e000 0x003b0000
1988 10:53:05.866104 VPD 3. 0x76c4d000 0x00000367
1989 10:53:05.869037 RO MCACHE 4. 0x76c4c000 0x00000fdc
1990 10:53:05.872670 CONSOLE 5. 0x76c2c000 0x00020000
1991 10:53:05.875892 FMAP 6. 0x76c2b000 0x00000578
1992 10:53:05.879383 TIME STAMP 7. 0x76c2a000 0x00000910
1993 10:53:05.882606 VBOOT WORK 8. 0x76c16000 0x00014000
1994 10:53:05.885813 ROMSTG STCK 9. 0x76c15000 0x00001000
1995 10:53:05.892281 AFTER CAR 10. 0x76c0a000 0x0000b000
1996 10:53:05.896207 RAMSTAGE 11. 0x76b97000 0x00073000
1997 10:53:05.898891 REFCODE 12. 0x76b42000 0x00055000
1998 10:53:05.902527 SMM BACKUP 13. 0x76b32000 0x00010000
1999 10:53:05.905581 4f444749 14. 0x76b30000 0x00002000
2000 10:53:05.909214 EXT VBT15. 0x76b2d000 0x0000219f
2001 10:53:05.912344 COREBOOT 16. 0x76b25000 0x00008000
2002 10:53:05.915814 ACPI 17. 0x76b01000 0x00024000
2003 10:53:05.918919 ACPI GNVS 18. 0x76b00000 0x00001000
2004 10:53:05.922061
2005 10:53:05.925778 RAMOOPS 19. 0x76a00000 0x00100000
2006 10:53:05.928854 TPM2 TCGLOG20. 0x769f0000 0x00010000
2007 10:53:05.932573 SMBIOS 21. 0x769ef000 0x00000800
2008 10:53:05.933015 IMD small region:
2009 10:53:05.938595 IMD ROOT 0. 0x76ffec00 0x00000400
2010 10:53:05.942090 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2011 10:53:05.945565 POWER STATE 2. 0x76ffeb80 0x00000044
2012 10:53:05.948540 ROMSTAGE 3. 0x76ffeb60 0x00000004
2013 10:53:05.951755 MEM INFO 4. 0x76ffe980 0x000001e0
2014 10:53:05.959038 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2015 10:53:05.961676 MTRR: Physical address space:
2016 10:53:05.968592 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2017 10:53:05.974553 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2018 10:53:05.981198 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2019 10:53:05.988007 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2020 10:53:05.991636 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2021 10:53:05.994830
2022 10:53:05.998216 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2023 10:53:06.004901 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2024 10:53:06.010898 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 10:53:06.014722 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 10:53:06.017662 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 10:53:06.021263 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 10:53:06.027409 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 10:53:06.031026 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 10:53:06.034074 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 10:53:06.037373 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 10:53:06.040889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 10:53:06.044251
2034 10:53:06.047312 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 10:53:06.050731 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 10:53:06.054356 call enable_fixed_mtrr()
2037 10:53:06.057835 CPU physical address size: 39 bits
2038 10:53:06.064687 MTRR: default type WB/UC MTRR counts: 6/7.
2039 10:53:06.067728 MTRR: WB selected as default type.
2040 10:53:06.073885 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2041 10:53:06.077659 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2042 10:53:06.080535
2043 10:53:06.084217 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2044 10:53:06.091036 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2045 10:53:06.097492 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2046 10:53:06.103903 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2047 10:53:06.108190
2048 10:53:06.108672 MTRR check
2049 10:53:06.111268 Fixed MTRRs : Enabled
2050 10:53:06.111703 Variable MTRRs: Enabled
2051 10:53:06.112047
2052 10:53:06.117815 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 10:53:06.121395 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 10:53:06.124770 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 10:53:06.127980 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 10:53:06.134899 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 10:53:06.137576 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 10:53:06.140941 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 10:53:06.144808 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 10:53:06.151016 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 10:53:06.154416 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 10:53:06.158053 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 10:53:06.160820 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 10:53:06.164189 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 10:53:06.167392
2066 10:53:06.170991 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 10:53:06.174005 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 10:53:06.177513 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 10:53:06.181003 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 10:53:06.187951 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 10:53:06.190531 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 10:53:06.194182 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 10:53:06.197245 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 10:53:06.204024 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 10:53:06.207434 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 10:53:06.213868 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 10:53:06.214367 call enable_fixed_mtrr()
2078 10:53:06.221026 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 10:53:06.223965 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 10:53:06.227384 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 10:53:06.231004 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 10:53:06.237050 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 10:53:06.240342 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 10:53:06.243933 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 10:53:06.247200 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 10:53:06.253540 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 10:53:06.257014 CPU physical address size: 39 bits
2088 10:53:06.261150 call enable_fixed_mtrr()
2089 10:53:06.264635 call enable_fixed_mtrr()
2090 10:53:06.267998 CPU physical address size: 39 bits
2091 10:53:06.274607 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2092 10:53:06.277784 CPU physical address size: 39 bits
2093 10:53:06.281360 Checking cr50 for pending updates
2094 10:53:06.288540 MTRR: Fixed MSR 0x250 0x0606060606060606
2095 10:53:06.291900 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 10:53:06.295432 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 10:53:06.298128 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 10:53:06.302113 MTRR: Fixed MSR 0x268 0x0606060606060606
2099 10:53:06.305178
2100 10:53:06.308679 MTRR: Fixed MSR 0x269 0x0606060606060606
2101 10:53:06.311790 MTRR: Fixed MSR 0x26a 0x0606060606060606
2102 10:53:06.314774 MTRR: Fixed MSR 0x26b 0x0606060606060606
2103 10:53:06.317986 MTRR: Fixed MSR 0x26c 0x0606060606060606
2104 10:53:06.325109 MTRR: Fixed MSR 0x26d 0x0606060606060606
2105 10:53:06.328038 MTRR: Fixed MSR 0x26e 0x0606060606060606
2106 10:53:06.331520 MTRR: Fixed MSR 0x26f 0x0606060606060606
2107 10:53:06.339101 MTRR: Fixed MSR 0x258 0x0606060606060606
2108 10:53:06.342567 MTRR: Fixed MSR 0x259 0x0000000000000000
2109 10:53:06.345767 MTRR: Fixed MSR 0x268 0x0606060606060606
2110 10:53:06.348951 MTRR: Fixed MSR 0x269 0x0606060606060606
2111 10:53:06.356038 MTRR: Fixed MSR 0x26a 0x0606060606060606
2112 10:53:06.359041 MTRR: Fixed MSR 0x26b 0x0606060606060606
2113 10:53:06.362314 MTRR: Fixed MSR 0x26c 0x0606060606060606
2114 10:53:06.365265 MTRR: Fixed MSR 0x26d 0x0606060606060606
2115 10:53:06.372454 MTRR: Fixed MSR 0x26e 0x0606060606060606
2116 10:53:06.375667 MTRR: Fixed MSR 0x26f 0x0606060606060606
2117 10:53:06.378684 call enable_fixed_mtrr()
2118 10:53:06.382202 call enable_fixed_mtrr()
2119 10:53:06.386129 Reading cr50 TPM mode
2120 10:53:06.386568 CPU physical address size: 39 bits
2121 10:53:06.389290
2122 10:53:06.392535 CPU physical address size: 39 bits
2123 10:53:06.395432 MTRR: Fixed MSR 0x250 0x0606060606060606
2124 10:53:06.402635 MTRR: Fixed MSR 0x250 0x0606060606060606
2125 10:53:06.405463 MTRR: Fixed MSR 0x258 0x0606060606060606
2126 10:53:06.409045 MTRR: Fixed MSR 0x259 0x0000000000000000
2127 10:53:06.412768 MTRR: Fixed MSR 0x268 0x0606060606060606
2128 10:53:06.418803 MTRR: Fixed MSR 0x269 0x0606060606060606
2129 10:53:06.422381 MTRR: Fixed MSR 0x26a 0x0606060606060606
2130 10:53:06.425758 MTRR: Fixed MSR 0x26b 0x0606060606060606
2131 10:53:06.428958 MTRR: Fixed MSR 0x26c 0x0606060606060606
2132 10:53:06.432326 MTRR: Fixed MSR 0x26d 0x0606060606060606
2133 10:53:06.435113
2134 10:53:06.438924 MTRR: Fixed MSR 0x26e 0x0606060606060606
2135 10:53:06.441741 MTRR: Fixed MSR 0x26f 0x0606060606060606
2136 10:53:06.449135 MTRR: Fixed MSR 0x258 0x0606060606060606
2137 10:53:06.449629 call enable_fixed_mtrr()
2138 10:53:06.455652 MTRR: Fixed MSR 0x259 0x0000000000000000
2139 10:53:06.459457 MTRR: Fixed MSR 0x268 0x0606060606060606
2140 10:53:06.462117 MTRR: Fixed MSR 0x269 0x0606060606060606
2141 10:53:06.465725 MTRR: Fixed MSR 0x26a 0x0606060606060606
2142 10:53:06.472388 MTRR: Fixed MSR 0x26b 0x0606060606060606
2143 10:53:06.475480 MTRR: Fixed MSR 0x26c 0x0606060606060606
2144 10:53:06.479132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2145 10:53:06.482086 MTRR: Fixed MSR 0x26e 0x0606060606060606
2146 10:53:06.488554 MTRR: Fixed MSR 0x26f 0x0606060606060606
2147 10:53:06.491813 CPU physical address size: 39 bits
2148 10:53:06.496641 call enable_fixed_mtrr()
2149 10:53:06.502985 BS: BS_PAYLOAD_LOAD entry times (exec / console): 107 / 8 ms
2150 10:53:06.506653 CPU physical address size: 39 bits
2151 10:53:06.512915 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2152 10:53:06.520031 Checking segment from ROM address 0xffc02b38
2153 10:53:06.522994 Checking segment from ROM address 0xffc02b54
2154 10:53:06.526349 Loading segment from ROM address 0xffc02b38
2155 10:53:06.529897 code (compression=0)
2156 10:53:06.539655 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2157 10:53:06.545952 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2158 10:53:06.549523 it's not compressed!
2159 10:53:06.689717 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2160 10:53:06.696177 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2161 10:53:06.703224 Loading segment from ROM address 0xffc02b54
2162 10:53:06.706226 Entry Point 0x30000000
2163 10:53:06.706662 Loaded segments
2164 10:53:06.712927 BS: BS_PAYLOAD_LOAD run times (exec / console): 140 / 63 ms
2165 10:53:06.758851 Finalizing chipset.
2166 10:53:06.761172 Finalizing SMM.
2167 10:53:06.761643 APMC done.
2168 10:53:06.767932 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2169 10:53:06.771032 mp_park_aps done after 0 msecs.
2170 10:53:06.774310 Jumping to boot code at 0x30000000(0x76b25000)
2171 10:53:06.784536 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2172 10:53:06.785063
2173 10:53:06.785426
2174 10:53:06.787333
2175 10:53:06.787767
2176 10:53:06.788760 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2177 10:53:06.789259 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2178 10:53:06.789703 Setting prompt string to ['volteer:']
2179 10:53:06.790100 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2180 10:53:06.790861 Starting depthcharge on Voema...
2181 10:53:06.791226
2182 10:53:06.797509 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2183 10:53:06.797956
2184 10:53:06.803947 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2185 10:53:06.804386
2186 10:53:06.810541 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2187 10:53:06.811062
2188 10:53:06.814155 Failed to find eMMC card reader
2189 10:53:06.814593
2190 10:53:06.817387 Wipe memory regions:
2191 10:53:06.817868
2192 10:53:06.820460 [0x00000000001000, 0x000000000a0000)
2193 10:53:06.820893
2194 10:53:06.823866 [0x00000000100000, 0x00000030000000)
2195 10:53:06.824300
2196 10:53:06.863359 [0x00000032662db0, 0x000000769ef000)
2197 10:53:06.863884
2198 10:53:06.913868 [0x00000100000000, 0x00000480400000)
2199 10:53:06.914367
2200 10:53:07.545903 ec_init: CrosEC protocol v3 supported (256, 256)
2201 10:53:07.546425
2202 10:53:07.977756 R8152: Initializing
2203 10:53:07.978488
2204 10:53:07.980666 Version 6 (ocp_data = 5c30)
2205 10:53:07.981239
2206 10:53:07.984049 R8152: Done initializing
2207 10:53:07.984528
2208 10:53:07.987366 Adding net device
2209 10:53:07.988016
2210 10:53:08.291782 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2211 10:53:08.292348
2212 10:53:08.292878
2213 10:53:08.293369
2214 10:53:08.295346 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2216 10:53:08.397329 volteer: tftpboot 192.168.201.1 8077705/tftp-deploy-8ysq7363/kernel/bzImage 8077705/tftp-deploy-8ysq7363/kernel/cmdline 8077705/tftp-deploy-8ysq7363/ramdisk/ramdisk.cpio.gz
2217 10:53:08.398131 Setting prompt string to 'Starting kernel'
2218 10:53:08.398659 Setting prompt string to ['Starting kernel']
2219 10:53:08.399110 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2220 10:53:08.399668 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2221 10:53:08.403331 tftpboot 192.168.201.1 8077705/tftp-deploy-8ysq7363/kernel/bzImoy-8ysq7363/kernel/cmdline 8077705/tftp-deploy-8ysq7363/ramdisk/ramdisk.cpio.gz
2222 10:53:08.403774
2223 10:53:08.404216 Waiting for link
2224 10:53:08.404638
2225 10:53:08.605913 done.
2226 10:53:08.606480
2227 10:53:08.606967 MAC: 00:24:32:30:7a:04
2228 10:53:08.607347
2229 10:53:08.609447 Sending DHCP discover... done.
2230 10:53:08.609923
2231 10:53:08.612417 Waiting for reply... done.
2232 10:53:08.612883
2233 10:53:08.615707 Sending DHCP request... done.
2234 10:53:08.616150
2235 10:53:08.622962 Waiting for reply... done.
2236 10:53:08.623425
2237 10:53:08.623778 My ip is 192.168.201.22
2238 10:53:08.624103
2239 10:53:08.629551 The DHCP server ip is 192.168.201.1
2240 10:53:08.629994
2241 10:53:08.632592 TFTP server IP predefined by user: 192.168.201.1
2242 10:53:08.633035
2243 10:53:08.639424 Bootfile predefined by user: 8077705/tftp-deploy-8ysq7363/kernel/bzImage
2244 10:53:08.639920
2245 10:53:08.642762 Sending tftp read request... done.
2246 10:53:08.643202
2247 10:53:08.649545 Waiting for the transfer...
2248 10:53:08.649989
2249 10:53:09.252214 00000000 ################################################################
2250 10:53:09.252356
2251 10:53:09.846415 00080000 ################################################################
2252 10:53:09.846558
2253 10:53:10.413765 00100000 ################################################################
2254 10:53:10.413908
2255 10:53:10.972375 00180000 ################################################################
2256 10:53:10.972523
2257 10:53:11.541330 00200000 ################################################################
2258 10:53:11.541468
2259 10:53:12.108283 00280000 ################################################################
2260 10:53:12.108429
2261 10:53:12.664629 00300000 ################################################################
2262 10:53:12.664785
2263 10:53:13.231837 00380000 ################################################################
2264 10:53:13.231980
2265 10:53:13.790917 00400000 ################################################################
2266 10:53:13.791059
2267 10:53:14.354201 00480000 ################################################################
2268 10:53:14.354341
2269 10:53:14.889152 00500000 ################################################################
2270 10:53:14.889293
2271 10:53:15.447941 00580000 ################################################################
2272 10:53:15.448082
2273 10:53:16.014026 00600000 ################################################################
2274 10:53:16.014171
2275 10:53:16.351513 00680000 ###################################### done.
2276 10:53:16.351653
2277 10:53:16.354350 The bootfile was 7126928 bytes long.
2278 10:53:16.354437
2279 10:53:16.357699 Sending tftp read request... done.
2280 10:53:16.357786
2281 10:53:16.360963 Waiting for the transfer...
2282 10:53:16.361048
2283 10:53:16.938693 00000000 ################################################################
2284 10:53:16.938830
2285 10:53:17.506111 00080000 ################################################################
2286 10:53:17.506259
2287 10:53:18.079188 00100000 ################################################################
2288 10:53:18.079332
2289 10:53:18.660457 00180000 ################################################################
2290 10:53:18.660597
2291 10:53:19.242634 00200000 ################################################################
2292 10:53:19.242779
2293 10:53:19.829767 00280000 ################################################################
2294 10:53:19.829905
2295 10:53:20.422978 00300000 ################################################################
2296 10:53:20.423125
2297 10:53:21.012188 00380000 ################################################################
2298 10:53:21.012333
2299 10:53:21.605471 00400000 ################################################################
2300 10:53:21.606036
2301 10:53:22.292756 00480000 ################################################################
2302 10:53:22.293335
2303 10:53:22.616785 00500000 ################################ done.
2304 10:53:22.616954
2305 10:53:22.619946 Sending tftp read request... done.
2306 10:53:22.620039
2307 10:53:22.623240 Waiting for the transfer...
2308 10:53:22.623327
2309 10:53:22.626720 00000000 # done.
2310 10:53:22.626802
2311 10:53:22.633688 Command line loaded dynamically from TFTP file: 8077705/tftp-deploy-8ysq7363/kernel/cmdline
2312 10:53:22.633852
2313 10:53:22.653102 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8077705/extract-nfsrootfs-t6t0ditv,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2314 10:53:22.653267
2315 10:53:22.661832 Shutting down all USB controllers.
2316 10:53:22.661990
2317 10:53:22.662079 Removing current net device
2318 10:53:22.662167
2319 10:53:22.664713 Finalizing coreboot
2320 10:53:22.664841
2321 10:53:22.671577 Exiting depthcharge with code 4 at timestamp: 24456072
2322 10:53:22.671773
2323 10:53:22.671872
2324 10:53:22.671964 Starting kernel ...
2325 10:53:22.672050
2326 10:53:22.672133
2327 10:53:22.672574 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2328 10:53:22.672710 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2329 10:53:22.672811 Setting prompt string to ['Linux version [0-9]']
2330 10:53:22.672907 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2331 10:53:22.673002 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2332 10:53:22.674912
2334 10:57:50.673850 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2336 10:57:50.675036 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2338 10:57:50.675915 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2341 10:57:50.677291 end: 2 depthcharge-action (duration 00:05:00) [common]
2343 10:57:50.678067 Cleaning after the job
2344 10:57:50.678154 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/ramdisk
2345 10:57:50.678649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/kernel
2346 10:57:50.679166 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/nfsrootfs
2347 10:57:50.710464 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077705/tftp-deploy-8ysq7363/modules
2348 10:57:50.710787 start: 5.1 power-off (timeout 00:00:30) [common]
2349 10:57:50.710945 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2350 10:57:50.730039 >> Command sent successfully.
2351 10:57:50.731969 Returned 0 in 0 seconds
2352 10:57:50.833188 end: 5.1 power-off (duration 00:00:00) [common]
2354 10:57:50.834732 start: 5.2 read-feedback (timeout 00:10:00) [common]
2355 10:57:50.835830 Listened to connection for namespace 'common' for up to 1s
2356 10:57:51.840561 Finalising connection for namespace 'common'
2357 10:57:51.841256 Disconnecting from shell: Finalise
2358 10:57:51.942842 end: 5.2 read-feedback (duration 00:00:01) [common]
2359 10:57:51.943463 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8077705
2360 10:57:52.039006 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8077705
2361 10:57:52.039202 JobError: Your job cannot terminate cleanly.