Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 10:53:05.834048 lava-dispatcher, installed at version: 2022.10
2 10:53:05.834251 start: 0 validate
3 10:53:05.834444 Start time: 2022-11-22 10:53:05.834436+00:00 (UTC)
4 10:53:05.834627 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:53:05.834776 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 10:53:06.119822 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:53:06.120042 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:53:06.121262 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:53:06.121405 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:53:06.411913 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:53:06.412097 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:53:06.414701 validate duration: 0.58
14 10:53:06.415006 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:53:06.415162 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:53:06.415280 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:53:06.415389 Not decompressing ramdisk as can be used compressed.
18 10:53:06.415486 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 10:53:06.415565 saving as /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/ramdisk/initrd.cpio.gz
20 10:53:06.415676 total size: 5431719 (5MB)
21 10:53:06.416739 progress 0% (0MB)
22 10:53:06.418293 progress 5% (0MB)
23 10:53:06.419722 progress 10% (0MB)
24 10:53:06.421229 progress 15% (0MB)
25 10:53:06.422761 progress 20% (1MB)
26 10:53:06.424200 progress 25% (1MB)
27 10:53:06.425609 progress 30% (1MB)
28 10:53:06.427139 progress 35% (1MB)
29 10:53:06.428543 progress 40% (2MB)
30 10:53:06.429970 progress 45% (2MB)
31 10:53:06.431384 progress 50% (2MB)
32 10:53:06.432988 progress 55% (2MB)
33 10:53:06.434364 progress 60% (3MB)
34 10:53:06.435781 progress 65% (3MB)
35 10:53:06.437412 progress 70% (3MB)
36 10:53:06.438813 progress 75% (3MB)
37 10:53:06.440220 progress 80% (4MB)
38 10:53:06.441642 progress 85% (4MB)
39 10:53:06.443233 progress 90% (4MB)
40 10:53:06.444597 progress 95% (4MB)
41 10:53:06.445994 progress 100% (5MB)
42 10:53:06.446338 5MB downloaded in 0.03s (168.97MB/s)
43 10:53:06.446542 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:53:06.446827 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:53:06.446933 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:53:06.447065 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:53:06.447184 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 10:53:06.447257 saving as /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/kernel/bzImage
50 10:53:06.447339 total size: 7126928 (6MB)
51 10:53:06.447448 No compression specified
52 10:53:06.448635 progress 0% (0MB)
53 10:53:06.450591 progress 5% (0MB)
54 10:53:06.452633 progress 10% (0MB)
55 10:53:06.454554 progress 15% (1MB)
56 10:53:06.456442 progress 20% (1MB)
57 10:53:06.458425 progress 25% (1MB)
58 10:53:06.460334 progress 30% (2MB)
59 10:53:06.462222 progress 35% (2MB)
60 10:53:06.463965 progress 40% (2MB)
61 10:53:06.465872 progress 45% (3MB)
62 10:53:06.467803 progress 50% (3MB)
63 10:53:06.469681 progress 55% (3MB)
64 10:53:06.471543 progress 60% (4MB)
65 10:53:06.473447 progress 65% (4MB)
66 10:53:06.475306 progress 70% (4MB)
67 10:53:06.477172 progress 75% (5MB)
68 10:53:06.478862 progress 80% (5MB)
69 10:53:06.480749 progress 85% (5MB)
70 10:53:06.482739 progress 90% (6MB)
71 10:53:06.484588 progress 95% (6MB)
72 10:53:06.486693 progress 100% (6MB)
73 10:53:06.486955 6MB downloaded in 0.04s (171.58MB/s)
74 10:53:06.487126 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:53:06.487403 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:53:06.487510 start: 1.3 download-retry (timeout 00:10:00) [common]
78 10:53:06.487613 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 10:53:06.487749 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 10:53:06.487840 saving as /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/nfsrootfs/full.rootfs.tar
81 10:53:06.487941 total size: 207113456 (197MB)
82 10:53:06.488014 Using unxz to decompress xz
83 10:53:06.491689 progress 0% (0MB)
84 10:53:07.085643 progress 5% (9MB)
85 10:53:07.648084 progress 10% (19MB)
86 10:53:08.287295 progress 15% (29MB)
87 10:53:08.776864 progress 20% (39MB)
88 10:53:09.273145 progress 25% (49MB)
89 10:53:10.121253 progress 30% (59MB)
90 10:53:10.909130 progress 35% (69MB)
91 10:53:11.628162 progress 40% (79MB)
92 10:53:12.231658 progress 45% (88MB)
93 10:53:12.841021 progress 50% (98MB)
94 10:53:13.511762 progress 55% (108MB)
95 10:53:14.221808 progress 60% (118MB)
96 10:53:14.377260 progress 65% (128MB)
97 10:53:14.526960 progress 70% (138MB)
98 10:53:14.632372 progress 75% (148MB)
99 10:53:14.705204 progress 80% (158MB)
100 10:53:14.780086 progress 85% (167MB)
101 10:53:14.894345 progress 90% (177MB)
102 10:53:15.198975 progress 95% (187MB)
103 10:53:15.828640 progress 100% (197MB)
104 10:53:15.834744 197MB downloaded in 9.35s (21.13MB/s)
105 10:53:15.835086 end: 1.3.1 http-download (duration 00:00:09) [common]
107 10:53:15.835397 end: 1.3 download-retry (duration 00:00:09) [common]
108 10:53:15.835495 start: 1.4 download-retry (timeout 00:09:51) [common]
109 10:53:15.835595 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 10:53:15.835720 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 10:53:15.835801 saving as /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/modules/modules.tar
112 10:53:15.835889 total size: 52008 (0MB)
113 10:53:15.835990 Using unxz to decompress xz
114 10:53:15.839036 progress 63% (0MB)
115 10:53:15.839422 progress 100% (0MB)
116 10:53:15.842688 0MB downloaded in 0.01s (7.30MB/s)
117 10:53:15.842922 end: 1.4.1 http-download (duration 00:00:00) [common]
119 10:53:15.843200 end: 1.4 download-retry (duration 00:00:00) [common]
120 10:53:15.843301 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 10:53:15.843406 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 10:53:17.882836 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8077722/extract-nfsrootfs-q1ugm8xr
123 10:53:17.883046 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 10:53:17.883149 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 10:53:17.883284 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199
126 10:53:17.883382 makedir: /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin
127 10:53:17.883468 makedir: /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/tests
128 10:53:17.883548 makedir: /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/results
129 10:53:17.883644 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-add-keys
130 10:53:17.883774 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-add-sources
131 10:53:17.883887 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-background-process-start
132 10:53:17.884001 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-background-process-stop
133 10:53:17.884110 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-common-functions
134 10:53:17.884218 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-echo-ipv4
135 10:53:17.884326 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-install-packages
136 10:53:17.884433 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-installed-packages
137 10:53:17.884538 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-os-build
138 10:53:17.884645 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-probe-channel
139 10:53:17.884782 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-probe-ip
140 10:53:17.884901 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-target-ip
141 10:53:17.885007 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-target-mac
142 10:53:17.885112 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-target-storage
143 10:53:17.885220 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-case
144 10:53:17.885328 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-event
145 10:53:17.885440 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-feedback
146 10:53:17.885545 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-raise
147 10:53:17.885651 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-reference
148 10:53:17.885756 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-runner
149 10:53:17.885863 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-set
150 10:53:17.885969 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-test-shell
151 10:53:17.886077 Updating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-add-keys (debian)
152 10:53:17.886191 Updating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-add-sources (debian)
153 10:53:17.886346 Updating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-install-packages (debian)
154 10:53:17.886458 Updating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-installed-packages (debian)
155 10:53:17.886567 Updating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/bin/lava-os-build (debian)
156 10:53:17.886661 Creating /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/environment
157 10:53:17.886745 LAVA metadata
158 10:53:17.886810 - LAVA_JOB_ID=8077722
159 10:53:17.886871 - LAVA_DISPATCHER_IP=192.168.201.1
160 10:53:17.886965 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
161 10:53:17.887028 skipped lava-vland-overlay
162 10:53:17.887102 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 10:53:17.887181 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
164 10:53:17.887241 skipped lava-multinode-overlay
165 10:53:17.887312 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 10:53:17.887391 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 10:53:17.887461 Loading test definitions
168 10:53:17.887548 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 10:53:17.887614 Using /lava-8077722 at stage 0
170 10:53:17.887838 uuid=8077722_1.5.2.3.1 testdef=None
171 10:53:17.887926 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 10:53:17.888010 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 10:53:17.888416 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 10:53:17.888649 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 10:53:17.889162 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 10:53:17.889401 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 10:53:17.889855 runner path: /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/0/tests/0_timesync-off test_uuid 8077722_1.5.2.3.1
180 10:53:17.890002 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 10:53:17.890232 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 10:53:17.890305 Using /lava-8077722 at stage 0
184 10:53:17.890399 Fetching tests from https://github.com/kernelci/test-definitions.git
185 10:53:17.890479 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/0/tests/1_kselftest-filesystems'
186 10:53:27.709131 Running '/usr/bin/git checkout kernelci.org
187 10:53:27.855419 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
188 10:53:27.856313 uuid=8077722_1.5.2.3.5 testdef=None
189 10:53:27.856475 end: 1.5.2.3.5 git-repo-action (duration 00:00:10) [common]
191 10:53:27.856738 start: 1.5.2.3.6 test-overlay (timeout 00:09:39) [common]
192 10:53:27.857503 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 10:53:27.857747 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:39) [common]
195 10:53:27.858646 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 10:53:27.858894 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:39) [common]
198 10:53:27.859988 runner path: /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/0/tests/1_kselftest-filesystems test_uuid 8077722_1.5.2.3.5
199 10:53:27.860081 BOARD='asus-C436FA-Flip-hatch'
200 10:53:27.860149 BRANCH='cip'
201 10:53:27.860212 SKIPFILE='skipfile-lkft.yaml'
202 10:53:27.860271 TESTPROG_URL='None'
203 10:53:27.860331 TST_CASENAME=''
204 10:53:27.860389 TST_CMDFILES='filesystems'
205 10:53:27.860521 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 10:53:27.860741 Creating lava-test-runner.conf files
208 10:53:27.860846 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077722/lava-overlay-_ndu9199/lava-8077722/0 for stage 0
209 10:53:27.860932 - 0_timesync-off
210 10:53:27.861000 - 1_kselftest-filesystems
211 10:53:27.861090 end: 1.5.2.3 test-definition (duration 00:00:10) [common]
212 10:53:27.861186 start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
213 10:53:35.597023 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
214 10:53:35.597212 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
215 10:53:35.597328 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 10:53:35.597441 end: 1.5.2 lava-overlay (duration 00:00:18) [common]
217 10:53:35.597536 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
218 10:53:35.702193 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 10:53:35.702555 start: 1.5.4 extract-modules (timeout 00:09:31) [common]
220 10:53:35.702677 extracting modules file /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077722/extract-nfsrootfs-q1ugm8xr
221 10:53:35.707305 extracting modules file /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077722/extract-overlay-ramdisk-kdgozym_/ramdisk
222 10:53:35.711618 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 10:53:35.711755 start: 1.5.5 apply-overlay-tftp (timeout 00:09:31) [common]
224 10:53:35.711859 [common] Applying overlay to NFS
225 10:53:35.711943 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077722/compress-overlay-sq18h4q3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8077722/extract-nfsrootfs-q1ugm8xr
226 10:53:36.215368 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
227 10:53:36.215546 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
228 10:53:36.215656 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 10:53:36.215755 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
230 10:53:36.215840 Building ramdisk /var/lib/lava/dispatcher/tmp/8077722/extract-overlay-ramdisk-kdgozym_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8077722/extract-overlay-ramdisk-kdgozym_/ramdisk
231 10:53:36.249551 >> 24546 blocks
232 10:53:36.744312 rename /var/lib/lava/dispatcher/tmp/8077722/extract-overlay-ramdisk-kdgozym_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/ramdisk/ramdisk.cpio.gz
233 10:53:36.744739 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 10:53:36.744890 start: 1.5.8 prepare-kernel (timeout 00:09:30) [common]
235 10:53:36.745011 start: 1.5.8.1 prepare-fit (timeout 00:09:30) [common]
236 10:53:36.745112 No mkimage arch provided, not using FIT.
237 10:53:36.745221 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 10:53:36.745313 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 10:53:36.745425 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
240 10:53:36.745544 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
241 10:53:36.745648 No LXC device requested
242 10:53:36.745762 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 10:53:36.745898 start: 1.7 deploy-device-env (timeout 00:09:30) [common]
244 10:53:36.745999 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 10:53:36.746095 Checking files for TFTP limit of 4294967296 bytes.
246 10:53:36.746521 end: 1 tftp-deploy (duration 00:00:30) [common]
247 10:53:36.746627 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 10:53:36.746735 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 10:53:36.746892 substitutions:
250 10:53:36.746967 - {DTB}: None
251 10:53:36.747064 - {INITRD}: 8077722/tftp-deploy-uw_f3qk1/ramdisk/ramdisk.cpio.gz
252 10:53:36.747138 - {KERNEL}: 8077722/tftp-deploy-uw_f3qk1/kernel/bzImage
253 10:53:36.747208 - {LAVA_MAC}: None
254 10:53:36.747283 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8077722/extract-nfsrootfs-q1ugm8xr
255 10:53:36.747351 - {NFS_SERVER_IP}: 192.168.201.1
256 10:53:36.747417 - {PRESEED_CONFIG}: None
257 10:53:36.747500 - {PRESEED_LOCAL}: None
258 10:53:36.747575 - {RAMDISK}: 8077722/tftp-deploy-uw_f3qk1/ramdisk/ramdisk.cpio.gz
259 10:53:36.747640 - {ROOT_PART}: None
260 10:53:36.747704 - {ROOT}: None
261 10:53:36.747778 - {SERVER_IP}: 192.168.201.1
262 10:53:36.747837 - {TEE}: None
263 10:53:36.747896 Parsed boot commands:
264 10:53:36.747969 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 10:53:36.748130 Parsed boot commands: tftpboot 192.168.201.1 8077722/tftp-deploy-uw_f3qk1/kernel/bzImage 8077722/tftp-deploy-uw_f3qk1/kernel/cmdline 8077722/tftp-deploy-uw_f3qk1/ramdisk/ramdisk.cpio.gz
266 10:53:36.748242 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 10:53:36.748345 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 10:53:36.748452 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 10:53:36.748549 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 10:53:36.748633 Not connected, no need to disconnect.
271 10:53:36.748739 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 10:53:36.748830 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 10:53:36.748933 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
274 10:53:36.751735 Setting prompt string to ['lava-test: # ']
275 10:53:36.752064 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 10:53:36.752202 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 10:53:36.752314 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 10:53:36.752424 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 10:53:36.752627 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 10:53:36.773279 >> Command sent successfully.
281 10:53:36.775403 Returned 0 in 0 seconds
282 10:53:36.876313 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 10:53:36.877267 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 10:53:36.877597 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 10:53:36.877833 Setting prompt string to 'Starting depthcharge on Helios...'
287 10:53:36.878021 Changing prompt to 'Starting depthcharge on Helios...'
288 10:53:36.878239 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 10:53:36.878985 [Enter `^Ec?' for help]
290 10:53:43.215399
291 10:53:43.215552
292 10:53:43.225030 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 10:53:43.228545 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 10:53:43.235586 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 10:53:43.238506 CPU: AES supported, TXT NOT supported, VT supported
296 10:53:43.245603 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 10:53:43.248435 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 10:53:43.255349 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 10:53:43.258827 VBOOT: Loading verstage.
300 10:53:43.262259 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 10:53:43.268663 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 10:53:43.272260 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 10:53:43.275084 CBFS @ c08000 size 3f8000
304 10:53:43.282105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 10:53:43.284941 CBFS: Locating 'fallback/verstage'
306 10:53:43.288465 CBFS: Found @ offset 10fb80 size 1072c
307 10:53:43.291938
308 10:53:43.292017
309 10:53:43.301818 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 10:53:43.316539 Probing TPM: . done!
311 10:53:43.319965 TPM ready after 0 ms
312 10:53:43.322837 Connected to device vid:did:rid of 1ae0:0028:00
313 10:53:43.333390 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 10:53:43.336997 Initialized TPM device CR50 revision 0
315 10:53:43.377707 tlcl_send_startup: Startup return code is 0
316 10:53:43.377828 TPM: setup succeeded
317 10:53:43.390630 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 10:53:43.394839 Chrome EC: UHEPI supported
319 10:53:43.397541 Phase 1
320 10:53:43.401091 FMAP: area GBB found @ c05000 (12288 bytes)
321 10:53:43.407470 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 10:53:43.410928 Phase 2
323 10:53:43.411042 Phase 3
324 10:53:43.414390 FMAP: area GBB found @ c05000 (12288 bytes)
325 10:53:43.420895 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 10:53:43.427286 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 10:53:43.430761 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 10:53:43.437361 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 10:53:43.453166 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 10:53:43.456676 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 10:53:43.463003 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 10:53:43.467085 Phase 4
333 10:53:43.470822 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 10:53:43.476998 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 10:53:43.656519 VB2:vb2_rsa_verify_digest() Digest check failed!
336 10:53:43.659969 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 10:53:43.663474
338 10:53:43.663587 Saving nvdata
339 10:53:43.666214 Reboot requested (10020007)
340 10:53:43.669615 board_reset() called!
341 10:53:43.669703 full_reset() called!
342 10:53:48.182745
343 10:53:48.182896
344 10:53:48.192422 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
345 10:53:48.195926 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
346 10:53:48.202289 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
347 10:53:48.205715 CPU: AES supported, TXT NOT supported, VT supported
348 10:53:48.212052 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
349 10:53:48.215621 PCH: device id 0284 (rev 00) is Cometlake-U Premium
350 10:53:48.222108 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
351 10:53:48.224929 VBOOT: Loading verstage.
352 10:53:48.228572 FMAP: Found "FLASH" version 1.1 at 0xc04000.
353 10:53:48.235026 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
354 10:53:48.242015 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 10:53:48.242116 CBFS @ c08000 size 3f8000
356 10:53:48.248332 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 10:53:48.251267 CBFS: Locating 'fallback/verstage'
358 10:53:48.254626 CBFS: Found @ offset 10fb80 size 1072c
359 10:53:48.258952
360 10:53:48.259034
361 10:53:48.268701 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
362 10:53:48.283904 Probing TPM: . done!
363 10:53:48.286780 TPM ready after 0 ms
364 10:53:48.290064 Connected to device vid:did:rid of 1ae0:0028:00
365 10:53:48.300250 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
366 10:53:48.303700 Initialized TPM device CR50 revision 0
367 10:53:48.344642 tlcl_send_startup: Startup return code is 0
368 10:53:48.344772 TPM: setup succeeded
369 10:53:48.357487 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
370 10:53:48.361769 Chrome EC: UHEPI supported
371 10:53:48.364656 Phase 1
372 10:53:48.368119 FMAP: area GBB found @ c05000 (12288 bytes)
373 10:53:48.374452 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
374 10:53:48.380848 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
375 10:53:48.384287 Recovery requested (1009000e)
376 10:53:48.390695 Saving nvdata
377 10:53:48.396129 tlcl_extend: response is 0
378 10:53:48.405153 tlcl_extend: response is 0
379 10:53:48.412148 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 10:53:48.415063 CBFS @ c08000 size 3f8000
381 10:53:48.422135 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 10:53:48.425058 CBFS: Locating 'fallback/romstage'
383 10:53:48.428624 CBFS: Found @ offset 80 size 145fc
384 10:53:48.432045 Accumulated console time in verstage 98 ms
385 10:53:48.432125
386 10:53:48.432210
387 10:53:48.434929
388 10:53:48.445257 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
389 10:53:48.451679 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
390 10:53:48.454603 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
391 10:53:48.458108 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
392 10:53:48.464495 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
393 10:53:48.468125 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
394 10:53:48.471556 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
395 10:53:48.474513 TCO_STS: 0000 0000
396 10:53:48.477865 GEN_PMCON: e0015238 00000200
397 10:53:48.481406 GBLRST_CAUSE: 00000000 00000000
398 10:53:48.481481 prev_sleep_state 5
399 10:53:48.484722 Boot Count incremented to 38736
400 10:53:48.491868 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 10:53:48.495214 CBFS @ c08000 size 3f8000
402 10:53:48.501437 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 10:53:48.501532 CBFS: Locating 'fspm.bin'
404 10:53:48.508256 CBFS: Found @ offset 5ffc0 size 71000
405 10:53:48.511138 Chrome EC: UHEPI supported
406 10:53:48.518249 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
407 10:53:48.521715 Probing TPM: done!
408 10:53:48.528091 Connected to device vid:did:rid of 1ae0:0028:00
409 10:53:48.538011 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
410 10:53:48.544266 Initialized TPM device CR50 revision 0
411 10:53:48.552700 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
412 10:53:48.562525 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
413 10:53:48.562615 MRC cache found, size 1948
414 10:53:48.566042 bootmode is set to: 2
415 10:53:48.569665 PRMRR disabled by config.
416 10:53:48.572341 SPD INDEX = 1
417 10:53:48.576053 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
418 10:53:48.579513 CBFS @ c08000 size 3f8000
419 10:53:48.585763 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
420 10:53:48.585850 CBFS: Locating 'spd.bin'
421 10:53:48.589180 CBFS: Found @ offset 5fb80 size 400
422 10:53:48.592634
423 10:53:48.592712 SPD: module type is LPDDR3
424 10:53:48.595583 SPD: module part is
425 10:53:48.602349 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
426 10:53:48.605731 SPD: device width 4 bits, bus width 8 bits
427 10:53:48.608540 SPD: module size is 4096 MB (per channel)
428 10:53:48.612129 memory slot: 0 configuration done.
429 10:53:48.618533 memory slot: 2 configuration done.
430 10:53:48.667834 CBMEM:
431 10:53:48.671329 IMD: root @ 99fff000 254 entries.
432 10:53:48.674069 IMD: root @ 99ffec00 62 entries.
433 10:53:48.677667 External stage cache:
434 10:53:48.681083 IMD: root @ 9abff000 254 entries.
435 10:53:48.683926 IMD: root @ 9abfec00 62 entries.
436 10:53:48.687549 Chrome EC: clear events_b mask to 0x0000000020004000
437 10:53:48.691014
438 10:53:48.703636 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
439 10:53:48.716753 tlcl_write: response is 0
440 10:53:48.725483 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
441 10:53:48.732616 MRC: TPM MRC hash updated successfully.
442 10:53:48.732700 2 DIMMs found
443 10:53:48.735507 SMM Memory Map
444 10:53:48.739053 SMRAM : 0x9a000000 0x1000000
445 10:53:48.742360 Subregion 0: 0x9a000000 0xa00000
446 10:53:48.746037 Subregion 1: 0x9aa00000 0x200000
447 10:53:48.748859 Subregion 2: 0x9ac00000 0x400000
448 10:53:48.752419 top_of_ram = 0x9a000000
449 10:53:48.755402 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
450 10:53:48.761764 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
451 10:53:48.765379 MTRR Range: Start=ff000000 End=0 (Size 1000000)
452 10:53:48.772234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 10:53:48.775131 CBFS @ c08000 size 3f8000
454 10:53:48.778602 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 10:53:48.782002 CBFS: Locating 'fallback/postcar'
456 10:53:48.788348 CBFS: Found @ offset 107000 size 4b44
457 10:53:48.794625 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
458 10:53:48.805058 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
459 10:53:48.807774 Processing 180 relocs. Offset value of 0x97c0c000
460 10:53:48.816585 Accumulated console time in romstage 286 ms
461 10:53:48.816674
462 10:53:48.816784
463 10:53:48.826589 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
464 10:53:48.833007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 10:53:48.836382 CBFS @ c08000 size 3f8000
466 10:53:48.842844 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 10:53:48.846264 CBFS: Locating 'fallback/ramstage'
468 10:53:48.849749 CBFS: Found @ offset 43380 size 1b9e8
469 10:53:48.856275 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
470 10:53:48.887942 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
471 10:53:48.891626 Processing 3976 relocs. Offset value of 0x98db0000
472 10:53:48.894490
473 10:53:48.898110 Accumulated console time in postcar 52 ms
474 10:53:48.898192
475 10:53:48.898258
476 10:53:48.907852 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
477 10:53:48.914654 FMAP: area RO_VPD found @ c00000 (16384 bytes)
478 10:53:48.917506 WARNING: RO_VPD is uninitialized or empty.
479 10:53:48.920999 FMAP: area RW_VPD found @ af8000 (8192 bytes)
480 10:53:48.927485 FMAP: area RW_VPD found @ af8000 (8192 bytes)
481 10:53:48.927569 Normal boot.
482 10:53:48.934454 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
483 10:53:48.937330 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
484 10:53:48.940874 CBFS @ c08000 size 3f8000
485 10:53:48.947306 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
486 10:53:48.950743 CBFS: Locating 'cpu_microcode_blob.bin'
487 10:53:48.954315 CBFS: Found @ offset 14700 size 2ec00
488 10:53:48.957821 microcode: sig=0x806ec pf=0x4 revision=0xc9
489 10:53:48.960703 Skip microcode update
490 10:53:48.967366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
491 10:53:48.967457 CBFS @ c08000 size 3f8000
492 10:53:48.973713 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
493 10:53:48.977251 CBFS: Locating 'fsps.bin'
494 10:53:48.980657 CBFS: Found @ offset d1fc0 size 35000
495 10:53:49.005958 Detected 4 core, 8 thread CPU.
496 10:53:49.009686 Setting up SMI for CPU
497 10:53:49.013058 IED base = 0x9ac00000
498 10:53:49.013143 IED size = 0x00400000
499 10:53:49.016453
500 10:53:49.016568 Will perform SMM setup.
501 10:53:49.022956 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
502 10:53:49.029408 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
503 10:53:49.035912 Processing 16 relocs. Offset value of 0x00030000
504 10:53:49.036023 Attempting to start 7 APs
505 10:53:49.042284 Waiting for 10ms after sending INIT.
506 10:53:49.055749 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
507 10:53:49.055842 done.
508 10:53:49.059241 AP: slot 7 apic_id 4.
509 10:53:49.062792 AP: slot 6 apic_id 5.
510 10:53:49.065723 Waiting for 2nd SIPI to complete...done.
511 10:53:49.069385 AP: slot 5 apic_id 6.
512 10:53:49.069462 AP: slot 4 apic_id 7.
513 10:53:49.072899 AP: slot 3 apic_id 3.
514 10:53:49.075620 AP: slot 1 apic_id 2.
515 10:53:49.082742 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
516 10:53:49.089061 Processing 13 relocs. Offset value of 0x00038000
517 10:53:49.092616 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
518 10:53:49.095942
519 10:53:49.098704 Installing SMM handler to 0x9a000000
520 10:53:49.105686 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 10:53:49.112568 Processing 658 relocs. Offset value of 0x9a010000
522 10:53:49.118839 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 10:53:49.122336 Processing 13 relocs. Offset value of 0x9a008000
524 10:53:49.128707 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 10:53:49.135257 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 10:53:49.141794 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 10:53:49.145333 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 10:53:49.151599 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 10:53:49.158613 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 10:53:49.165025 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 10:53:49.171335 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 10:53:49.174745 Clearing SMI status registers
533 10:53:49.174833 SMI_STS: PM1
534 10:53:49.178326 PM1_STS: PWRBTN
535 10:53:49.178416 TCO_STS: SECOND_TO
536 10:53:49.181118 New SMBASE 0x9a000000
537 10:53:49.184688 In relocation handler: CPU 0
538 10:53:49.188302 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 10:53:49.191127 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 10:53:49.194460
541 10:53:49.194549 Relocation complete.
542 10:53:49.197892 New SMBASE 0x99fff800
543 10:53:49.201313 In relocation handler: CPU 2
544 10:53:49.205042 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
545 10:53:49.207613 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 10:53:49.211114 Relocation complete.
547 10:53:49.214403 New SMBASE 0x99ffec00
548 10:53:49.217840 In relocation handler: CPU 5
549 10:53:49.221263 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 10:53:49.223900 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 10:53:49.227348 Relocation complete.
552 10:53:49.230952 New SMBASE 0x99fff000
553 10:53:49.233774 In relocation handler: CPU 4
554 10:53:49.237287 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 10:53:49.240720 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 10:53:49.244386 Relocation complete.
557 10:53:49.247237 New SMBASE 0x99ffe800
558 10:53:49.250811 In relocation handler: CPU 6
559 10:53:49.253666 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
560 10:53:49.257134 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 10:53:49.260647 Relocation complete.
562 10:53:49.263437 New SMBASE 0x99ffe400
563 10:53:49.267093 In relocation handler: CPU 7
564 10:53:49.270729 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
565 10:53:49.273627 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 10:53:49.276977 Relocation complete.
567 10:53:49.280405 New SMBASE 0x99fff400
568 10:53:49.283104 In relocation handler: CPU 3
569 10:53:49.286612 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
570 10:53:49.290094 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 10:53:49.293590 Relocation complete.
572 10:53:49.296474 New SMBASE 0x99fffc00
573 10:53:49.299956 In relocation handler: CPU 1
574 10:53:49.302817 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
575 10:53:49.306362 Writing SMRR. base = 0x9a000006, mask=0xff000800
576 10:53:49.309842 Relocation complete.
577 10:53:49.312760 Initializing CPU #0
578 10:53:49.316126 CPU: vendor Intel device 806ec
579 10:53:49.319649 CPU: family 06, model 8e, stepping 0c
580 10:53:49.323045 Clearing out pending MCEs
581 10:53:49.323133 Setting up local APIC...
582 10:53:49.326423 apic_id: 0x00 done.
583 10:53:49.329034 Turbo is available but hidden
584 10:53:49.332888 Turbo is available and visible
585 10:53:49.336363 VMX status: enabled
586 10:53:49.339085 IA32_FEATURE_CONTROL status: locked
587 10:53:49.339173 Skip microcode update
588 10:53:49.342645 CPU #0 initialized
589 10:53:49.346281 Initializing CPU #2
590 10:53:49.346369 Initializing CPU #3
591 10:53:49.349166 Initializing CPU #1
592 10:53:49.352646 CPU: vendor Intel device 806ec
593 10:53:49.355496 CPU: family 06, model 8e, stepping 0c
594 10:53:49.359083 CPU: vendor Intel device 806ec
595 10:53:49.361909 CPU: family 06, model 8e, stepping 0c
596 10:53:49.365548 Clearing out pending MCEs
597 10:53:49.369083 Clearing out pending MCEs
598 10:53:49.369171 Setting up local APIC...
599 10:53:49.371987 Initializing CPU #7
600 10:53:49.375386 CPU: vendor Intel device 806ec
601 10:53:49.378988 CPU: family 06, model 8e, stepping 0c
602 10:53:49.381771 Clearing out pending MCEs
603 10:53:49.381859 Initializing CPU #6
604 10:53:49.385243
605 10:53:49.385344 CPU: vendor Intel device 806ec
606 10:53:49.391622 CPU: family 06, model 8e, stepping 0c
607 10:53:49.391713 Setting up local APIC...
608 10:53:49.395136 Setting up local APIC...
609 10:53:49.398596 CPU: vendor Intel device 806ec
610 10:53:49.401472 CPU: family 06, model 8e, stepping 0c
611 10:53:49.404860 Clearing out pending MCEs
612 10:53:49.408516 Clearing out pending MCEs
613 10:53:49.411862 Setting up local APIC...
614 10:53:49.411946 apic_id: 0x03 done.
615 10:53:49.414787 apic_id: 0x02 done.
616 10:53:49.417968 VMX status: enabled
617 10:53:49.418050 VMX status: enabled
618 10:53:49.421407 IA32_FEATURE_CONTROL status: locked
619 10:53:49.424847 IA32_FEATURE_CONTROL status: locked
620 10:53:49.428378 Skip microcode update
621 10:53:49.431096 Skip microcode update
622 10:53:49.431184 CPU #3 initialized
623 10:53:49.434658 CPU #1 initialized
624 10:53:49.438221 apic_id: 0x01 done.
625 10:53:49.438329 Initializing CPU #4
626 10:53:49.441015 Initializing CPU #5
627 10:53:49.444621 CPU: vendor Intel device 806ec
628 10:53:49.447331 CPU: family 06, model 8e, stepping 0c
629 10:53:49.450874 CPU: vendor Intel device 806ec
630 10:53:49.454532 CPU: family 06, model 8e, stepping 0c
631 10:53:49.457291 Clearing out pending MCEs
632 10:53:49.460766 Clearing out pending MCEs
633 10:53:49.460862 Setting up local APIC...
634 10:53:49.464330 apic_id: 0x04 done.
635 10:53:49.467258 Setting up local APIC...
636 10:53:49.470753 Setting up local APIC...
637 10:53:49.470834 VMX status: enabled
638 10:53:49.474297 apic_id: 0x05 done.
639 10:53:49.474376 VMX status: enabled
640 10:53:49.477302 apic_id: 0x06 done.
641 10:53:49.480793 apic_id: 0x07 done.
642 10:53:49.480873 VMX status: enabled
643 10:53:49.484373 VMX status: enabled
644 10:53:49.487166 IA32_FEATURE_CONTROL status: locked
645 10:53:49.490712 IA32_FEATURE_CONTROL status: locked
646 10:53:49.494251 Skip microcode update
647 10:53:49.494340 Skip microcode update
648 10:53:49.497085
649 10:53:49.497182 CPU #5 initialized
650 10:53:49.500642 CPU #4 initialized
651 10:53:49.503421 IA32_FEATURE_CONTROL status: locked
652 10:53:49.506888 IA32_FEATURE_CONTROL status: locked
653 10:53:49.506985 VMX status: enabled
654 10:53:49.510393
655 10:53:49.510484 Skip microcode update
656 10:53:49.513854 IA32_FEATURE_CONTROL status: locked
657 10:53:49.516781 CPU #7 initialized
658 10:53:49.520272 Skip microcode update
659 10:53:49.520393 Skip microcode update
660 10:53:49.523758 CPU #6 initialized
661 10:53:49.523875 CPU #2 initialized
662 10:53:49.529869 bsp_do_flight_plan done after 461 msecs.
663 10:53:49.533245 CPU: frequency set to 4200 MHz
664 10:53:49.533337 Enabling SMIs.
665 10:53:49.536771 Locking SMM.
666 10:53:49.550437 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
667 10:53:49.553308 CBFS @ c08000 size 3f8000
668 10:53:49.559721 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
669 10:53:49.559812 CBFS: Locating 'vbt.bin'
670 10:53:49.563227 CBFS: Found @ offset 5f5c0 size 499
671 10:53:49.566709
672 10:53:49.569654 Found a VBT of 4608 bytes after decompression
673 10:53:49.750332 Display FSP Version Info HOB
674 10:53:49.753325 Reference Code - CPU = 9.0.1e.30
675 10:53:49.756928 uCode Version = 0.0.0.ca
676 10:53:49.759868 TXT ACM version = ff.ff.ff.ffff
677 10:53:49.763527 Display FSP Version Info HOB
678 10:53:49.766271 Reference Code - ME = 9.0.1e.30
679 10:53:49.769832 MEBx version = 0.0.0.0
680 10:53:49.773216 ME Firmware Version = Consumer SKU
681 10:53:49.776130 Display FSP Version Info HOB
682 10:53:49.779744 Reference Code - CML PCH = 9.0.1e.30
683 10:53:49.782722 PCH-CRID Status = Disabled
684 10:53:49.786372 PCH-CRID Original Value = ff.ff.ff.ffff
685 10:53:49.789785 PCH-CRID New Value = ff.ff.ff.ffff
686 10:53:49.792634 OPROM - RST - RAID = ff.ff.ff.ffff
687 10:53:49.796148 ChipsetInit Base Version = ff.ff.ff.ffff
688 10:53:49.799599 ChipsetInit Oem Version = ff.ff.ff.ffff
689 10:53:49.802433 Display FSP Version Info HOB
690 10:53:49.809383 Reference Code - SA - System Agent = 9.0.1e.30
691 10:53:49.812152 Reference Code - MRC = 0.7.1.6c
692 10:53:49.815698 SA - PCIe Version = 9.0.1e.30
693 10:53:49.815788 SA-CRID Status = Disabled
694 10:53:49.818651 SA-CRID Original Value = 0.0.0.c
695 10:53:49.822034
696 10:53:49.822124 SA-CRID New Value = 0.0.0.c
697 10:53:49.825499 OPROM - VBIOS = ff.ff.ff.ffff
698 10:53:49.828884 RTC Init
699 10:53:49.831797 Set power on after power failure.
700 10:53:49.831887 Disabling Deep S3
701 10:53:49.835232 Disabling Deep S3
702 10:53:49.838595 Disabling Deep S4
703 10:53:49.838679 Disabling Deep S4
704 10:53:49.842034 Disabling Deep S5
705 10:53:49.842124 Disabling Deep S5
706 10:53:49.848551 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
707 10:53:49.851440 Enumerating buses...
708 10:53:49.854964 Show all devs... Before device enumeration.
709 10:53:49.858617 Root Device: enabled 1
710 10:53:49.861418 CPU_CLUSTER: 0: enabled 1
711 10:53:49.861501 DOMAIN: 0000: enabled 1
712 10:53:49.864869 APIC: 00: enabled 1
713 10:53:49.867747 PCI: 00:00.0: enabled 1
714 10:53:49.867832 PCI: 00:02.0: enabled 1
715 10:53:49.871360 PCI: 00:04.0: enabled 0
716 10:53:49.874958 PCI: 00:05.0: enabled 0
717 10:53:49.877819 PCI: 00:12.0: enabled 1
718 10:53:49.877907 PCI: 00:12.5: enabled 0
719 10:53:49.881317 PCI: 00:12.6: enabled 0
720 10:53:49.884147 PCI: 00:14.0: enabled 1
721 10:53:49.887645 PCI: 00:14.1: enabled 0
722 10:53:49.887731 PCI: 00:14.3: enabled 1
723 10:53:49.891159 PCI: 00:14.5: enabled 0
724 10:53:49.894664 PCI: 00:15.0: enabled 1
725 10:53:49.897492 PCI: 00:15.1: enabled 1
726 10:53:49.897579 PCI: 00:15.2: enabled 0
727 10:53:49.900973 PCI: 00:15.3: enabled 0
728 10:53:49.903872 PCI: 00:16.0: enabled 1
729 10:53:49.907319 PCI: 00:16.1: enabled 0
730 10:53:49.907408 PCI: 00:16.2: enabled 0
731 10:53:49.910795 PCI: 00:16.3: enabled 0
732 10:53:49.914272 PCI: 00:16.4: enabled 0
733 10:53:49.917578 PCI: 00:16.5: enabled 0
734 10:53:49.917666 PCI: 00:17.0: enabled 1
735 10:53:49.920395 PCI: 00:19.0: enabled 1
736 10:53:49.924013 PCI: 00:19.1: enabled 0
737 10:53:49.927370 PCI: 00:19.2: enabled 0
738 10:53:49.927459 PCI: 00:1a.0: enabled 0
739 10:53:49.930688 PCI: 00:1c.0: enabled 0
740 10:53:49.934035 PCI: 00:1c.1: enabled 0
741 10:53:49.934153 PCI: 00:1c.2: enabled 0
742 10:53:49.936895 PCI: 00:1c.3: enabled 0
743 10:53:49.940488 PCI: 00:1c.4: enabled 0
744 10:53:49.943238 PCI: 00:1c.5: enabled 0
745 10:53:49.943325 PCI: 00:1c.6: enabled 0
746 10:53:49.946721 PCI: 00:1c.7: enabled 0
747 10:53:49.950295 PCI: 00:1d.0: enabled 1
748 10:53:49.953147 PCI: 00:1d.1: enabled 0
749 10:53:49.953235 PCI: 00:1d.2: enabled 0
750 10:53:49.956631 PCI: 00:1d.3: enabled 0
751 10:53:49.960221 PCI: 00:1d.4: enabled 0
752 10:53:49.963070 PCI: 00:1d.5: enabled 1
753 10:53:49.963158 PCI: 00:1e.0: enabled 1
754 10:53:49.966731 PCI: 00:1e.1: enabled 0
755 10:53:49.969521 PCI: 00:1e.2: enabled 1
756 10:53:49.973039 PCI: 00:1e.3: enabled 1
757 10:53:49.973128 PCI: 00:1f.0: enabled 1
758 10:53:49.976703 PCI: 00:1f.1: enabled 1
759 10:53:49.979630 PCI: 00:1f.2: enabled 1
760 10:53:49.982515 PCI: 00:1f.3: enabled 1
761 10:53:49.982600 PCI: 00:1f.4: enabled 1
762 10:53:49.986290 PCI: 00:1f.5: enabled 1
763 10:53:49.989228 PCI: 00:1f.6: enabled 0
764 10:53:49.989340 USB0 port 0: enabled 1
765 10:53:49.992670
766 10:53:49.992771 I2C: 00:15: enabled 1
767 10:53:49.996143 I2C: 00:5d: enabled 1
768 10:53:49.999059 GENERIC: 0.0: enabled 1
769 10:53:49.999150 I2C: 00:1a: enabled 1
770 10:53:50.002735 I2C: 00:38: enabled 1
771 10:53:50.005482 I2C: 00:39: enabled 1
772 10:53:50.005571 I2C: 00:3a: enabled 1
773 10:53:50.008896 I2C: 00:3b: enabled 1
774 10:53:50.012389 PCI: 00:00.0: enabled 1
775 10:53:50.012477 SPI: 00: enabled 1
776 10:53:50.016059 SPI: 01: enabled 1
777 10:53:50.018760 PNP: 0c09.0: enabled 1
778 10:53:50.018848 USB2 port 0: enabled 1
779 10:53:50.022221 USB2 port 1: enabled 1
780 10:53:50.025617 USB2 port 2: enabled 0
781 10:53:50.028552 USB2 port 3: enabled 0
782 10:53:50.028640 USB2 port 5: enabled 0
783 10:53:50.031846 USB2 port 6: enabled 1
784 10:53:50.035240 USB2 port 9: enabled 1
785 10:53:50.035330 USB3 port 0: enabled 1
786 10:53:50.038839 USB3 port 1: enabled 1
787 10:53:50.041657 USB3 port 2: enabled 1
788 10:53:50.045107 USB3 port 3: enabled 1
789 10:53:50.045193 USB3 port 4: enabled 0
790 10:53:50.047934 APIC: 02: enabled 1
791 10:53:50.051464 APIC: 01: enabled 1
792 10:53:50.051549 APIC: 03: enabled 1
793 10:53:50.054995 APIC: 07: enabled 1
794 10:53:50.055080 APIC: 06: enabled 1
795 10:53:50.057779 APIC: 05: enabled 1
796 10:53:50.061298 APIC: 04: enabled 1
797 10:53:50.061387 Compare with tree...
798 10:53:50.064252 Root Device: enabled 1
799 10:53:50.067694 CPU_CLUSTER: 0: enabled 1
800 10:53:50.071371 APIC: 00: enabled 1
801 10:53:50.071461 APIC: 02: enabled 1
802 10:53:50.074233 APIC: 01: enabled 1
803 10:53:50.077705 APIC: 03: enabled 1
804 10:53:50.077788 APIC: 07: enabled 1
805 10:53:50.081317 APIC: 06: enabled 1
806 10:53:50.084268 APIC: 05: enabled 1
807 10:53:50.084345 APIC: 04: enabled 1
808 10:53:50.087934 DOMAIN: 0000: enabled 1
809 10:53:50.090627 PCI: 00:00.0: enabled 1
810 10:53:50.094215 PCI: 00:02.0: enabled 1
811 10:53:50.097633 PCI: 00:04.0: enabled 0
812 10:53:50.097714 PCI: 00:05.0: enabled 0
813 10:53:50.100535 PCI: 00:12.0: enabled 1
814 10:53:50.103942 PCI: 00:12.5: enabled 0
815 10:53:50.106868 PCI: 00:12.6: enabled 0
816 10:53:50.110385 PCI: 00:14.0: enabled 1
817 10:53:50.110473 USB0 port 0: enabled 1
818 10:53:50.113937 USB2 port 0: enabled 1
819 10:53:50.116929 USB2 port 1: enabled 1
820 10:53:50.120418 USB2 port 2: enabled 0
821 10:53:50.123356 USB2 port 3: enabled 0
822 10:53:50.123454 USB2 port 5: enabled 0
823 10:53:50.126914 USB2 port 6: enabled 1
824 10:53:50.129949 USB2 port 9: enabled 1
825 10:53:50.133581 USB3 port 0: enabled 1
826 10:53:50.137014 USB3 port 1: enabled 1
827 10:53:50.139950 USB3 port 2: enabled 1
828 10:53:50.140044 USB3 port 3: enabled 1
829 10:53:50.143414
830 10:53:50.143498 USB3 port 4: enabled 0
831 10:53:50.146089 PCI: 00:14.1: enabled 0
832 10:53:50.149547 PCI: 00:14.3: enabled 1
833 10:53:50.153209 PCI: 00:14.5: enabled 0
834 10:53:50.156084 PCI: 00:15.0: enabled 1
835 10:53:50.156170 I2C: 00:15: enabled 1
836 10:53:50.159717 PCI: 00:15.1: enabled 1
837 10:53:50.162621 I2C: 00:5d: enabled 1
838 10:53:50.166120 GENERIC: 0.0: enabled 1
839 10:53:50.168989 PCI: 00:15.2: enabled 0
840 10:53:50.169080 PCI: 00:15.3: enabled 0
841 10:53:50.172539 PCI: 00:16.0: enabled 1
842 10:53:50.176052 PCI: 00:16.1: enabled 0
843 10:53:50.178979 PCI: 00:16.2: enabled 0
844 10:53:50.182463 PCI: 00:16.3: enabled 0
845 10:53:50.182549 PCI: 00:16.4: enabled 0
846 10:53:50.185929 PCI: 00:16.5: enabled 0
847 10:53:50.188799 PCI: 00:17.0: enabled 1
848 10:53:50.192493 PCI: 00:19.0: enabled 1
849 10:53:50.195365 I2C: 00:1a: enabled 1
850 10:53:50.195454 I2C: 00:38: enabled 1
851 10:53:50.199120 I2C: 00:39: enabled 1
852 10:53:50.201889 I2C: 00:3a: enabled 1
853 10:53:50.205430 I2C: 00:3b: enabled 1
854 10:53:50.205520 PCI: 00:19.1: enabled 0
855 10:53:50.208867 PCI: 00:19.2: enabled 0
856 10:53:50.211779 PCI: 00:1a.0: enabled 0
857 10:53:50.215188 PCI: 00:1c.0: enabled 0
858 10:53:50.218609 PCI: 00:1c.1: enabled 0
859 10:53:50.218694 PCI: 00:1c.2: enabled 0
860 10:53:50.221940 PCI: 00:1c.3: enabled 0
861 10:53:50.224864 PCI: 00:1c.4: enabled 0
862 10:53:50.228506 PCI: 00:1c.5: enabled 0
863 10:53:50.231986 PCI: 00:1c.6: enabled 0
864 10:53:50.232070 PCI: 00:1c.7: enabled 0
865 10:53:50.234738 PCI: 00:1d.0: enabled 1
866 10:53:50.238315 PCI: 00:1d.1: enabled 0
867 10:53:50.241784 PCI: 00:1d.2: enabled 0
868 10:53:50.244461 PCI: 00:1d.3: enabled 0
869 10:53:50.244538 PCI: 00:1d.4: enabled 0
870 10:53:50.247967 PCI: 00:1d.5: enabled 1
871 10:53:50.251440 PCI: 00:00.0: enabled 1
872 10:53:50.254265 PCI: 00:1e.0: enabled 1
873 10:53:50.257715 PCI: 00:1e.1: enabled 0
874 10:53:50.257792 PCI: 00:1e.2: enabled 1
875 10:53:50.261289 SPI: 00: enabled 1
876 10:53:50.264256 PCI: 00:1e.3: enabled 1
877 10:53:50.267788 SPI: 01: enabled 1
878 10:53:50.267867 PCI: 00:1f.0: enabled 1
879 10:53:50.271277 PNP: 0c09.0: enabled 1
880 10:53:50.274012 PCI: 00:1f.1: enabled 1
881 10:53:50.277424 PCI: 00:1f.2: enabled 1
882 10:53:50.280965 PCI: 00:1f.3: enabled 1
883 10:53:50.281041 PCI: 00:1f.4: enabled 1
884 10:53:50.283727 PCI: 00:1f.5: enabled 1
885 10:53:50.287284 PCI: 00:1f.6: enabled 0
886 10:53:50.290804 Root Device scanning...
887 10:53:50.293772 scan_static_bus for Root Device
888 10:53:50.297311 CPU_CLUSTER: 0 enabled
889 10:53:50.297388 DOMAIN: 0000 enabled
890 10:53:50.300085 DOMAIN: 0000 scanning...
891 10:53:50.303599 PCI: pci_scan_bus for bus 00
892 10:53:50.306587 PCI: 00:00.0 [8086/0000] ops
893 10:53:50.310124 PCI: 00:00.0 [8086/9b61] enabled
894 10:53:50.313730 PCI: 00:02.0 [8086/0000] bus ops
895 10:53:50.316416 PCI: 00:02.0 [8086/9b41] enabled
896 10:53:50.319822 PCI: 00:04.0 [8086/1903] disabled
897 10:53:50.323234 PCI: 00:08.0 [8086/1911] enabled
898 10:53:50.326686 PCI: 00:12.0 [8086/02f9] enabled
899 10:53:50.329480 PCI: 00:14.0 [8086/0000] bus ops
900 10:53:50.333056 PCI: 00:14.0 [8086/02ed] enabled
901 10:53:50.336672 PCI: 00:14.2 [8086/02ef] enabled
902 10:53:50.339522 PCI: 00:14.3 [8086/02f0] enabled
903 10:53:50.342906 PCI: 00:15.0 [8086/0000] bus ops
904 10:53:50.346314 PCI: 00:15.0 [8086/02e8] enabled
905 10:53:50.349292 PCI: 00:15.1 [8086/0000] bus ops
906 10:53:50.352431 PCI: 00:15.1 [8086/02e9] enabled
907 10:53:50.355860 PCI: 00:16.0 [8086/0000] ops
908 10:53:50.359509 PCI: 00:16.0 [8086/02e0] enabled
909 10:53:50.362469 PCI: 00:17.0 [8086/0000] ops
910 10:53:50.366009 PCI: 00:17.0 [8086/02d3] enabled
911 10:53:50.368896 PCI: 00:19.0 [8086/0000] bus ops
912 10:53:50.372428 PCI: 00:19.0 [8086/02c5] enabled
913 10:53:50.375346 PCI: 00:1d.0 [8086/0000] bus ops
914 10:53:50.378904 PCI: 00:1d.0 [8086/02b0] enabled
915 10:53:50.385716 PCI: Static device PCI: 00:1d.5 not found, disabling it.
916 10:53:50.388571 PCI: 00:1e.0 [8086/0000] ops
917 10:53:50.392104 PCI: 00:1e.0 [8086/02a8] enabled
918 10:53:50.395679 PCI: 00:1e.2 [8086/0000] bus ops
919 10:53:50.398569 PCI: 00:1e.2 [8086/02aa] enabled
920 10:53:50.401470 PCI: 00:1e.3 [8086/0000] bus ops
921 10:53:50.405072 PCI: 00:1e.3 [8086/02ab] enabled
922 10:53:50.408449 PCI: 00:1f.0 [8086/0000] bus ops
923 10:53:50.411855 PCI: 00:1f.0 [8086/0284] enabled
924 10:53:50.418191 PCI: Static device PCI: 00:1f.1 not found, disabling it.
925 10:53:50.421575 PCI: Static device PCI: 00:1f.2 not found, disabling it.
926 10:53:50.424960 PCI: 00:1f.3 [8086/0000] bus ops
927 10:53:50.427699 PCI: 00:1f.3 [8086/02c8] enabled
928 10:53:50.431262 PCI: 00:1f.4 [8086/0000] bus ops
929 10:53:50.434894 PCI: 00:1f.4 [8086/02a3] enabled
930 10:53:50.437580 PCI: 00:1f.5 [8086/0000] bus ops
931 10:53:50.440895 PCI: 00:1f.5 [8086/02a4] enabled
932 10:53:50.444351 PCI: Leftover static devices:
933 10:53:50.447667 PCI: 00:05.0
934 10:53:50.447747 PCI: 00:12.5
935 10:53:50.451208 PCI: 00:12.6
936 10:53:50.451284 PCI: 00:14.1
937 10:53:50.451349 PCI: 00:14.5
938 10:53:50.453912 PCI: 00:15.2
939 10:53:50.454030 PCI: 00:15.3
940 10:53:50.457455 PCI: 00:16.1
941 10:53:50.457532 PCI: 00:16.2
942 10:53:50.457596 PCI: 00:16.3
943 10:53:50.460310
944 10:53:50.460388 PCI: 00:16.4
945 10:53:50.460453 PCI: 00:16.5
946 10:53:50.463770 PCI: 00:19.1
947 10:53:50.463844 PCI: 00:19.2
948 10:53:50.467418 PCI: 00:1a.0
949 10:53:50.467494 PCI: 00:1c.0
950 10:53:50.467558 PCI: 00:1c.1
951 10:53:50.470367 PCI: 00:1c.2
952 10:53:50.470445 PCI: 00:1c.3
953 10:53:50.474008 PCI: 00:1c.4
954 10:53:50.474084 PCI: 00:1c.5
955 10:53:50.476996 PCI: 00:1c.6
956 10:53:50.477071 PCI: 00:1c.7
957 10:53:50.477136 PCI: 00:1d.1
958 10:53:50.480553 PCI: 00:1d.2
959 10:53:50.480626 PCI: 00:1d.3
960 10:53:50.483492 PCI: 00:1d.4
961 10:53:50.483565 PCI: 00:1d.5
962 10:53:50.483627 PCI: 00:1e.1
963 10:53:50.486873 PCI: 00:1f.1
964 10:53:50.486947 PCI: 00:1f.2
965 10:53:50.490487 PCI: 00:1f.6
966 10:53:50.493305 PCI: Check your devicetree.cb.
967 10:53:50.493385 PCI: 00:02.0 scanning...
968 10:53:50.496987 scan_generic_bus for PCI: 00:02.0
969 10:53:50.499893
970 10:53:50.503455 scan_generic_bus for PCI: 00:02.0 done
971 10:53:50.506901 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
972 10:53:50.509736 PCI: 00:14.0 scanning...
973 10:53:50.513314 scan_static_bus for PCI: 00:14.0
974 10:53:50.516256 USB0 port 0 enabled
975 10:53:50.519910 USB0 port 0 scanning...
976 10:53:50.523316 scan_static_bus for USB0 port 0
977 10:53:50.523404 USB2 port 0 enabled
978 10:53:50.526005 USB2 port 1 enabled
979 10:53:50.529582 USB2 port 2 disabled
980 10:53:50.529663 USB2 port 3 disabled
981 10:53:50.532564 USB2 port 5 disabled
982 10:53:50.536150 USB2 port 6 enabled
983 10:53:50.536229 USB2 port 9 enabled
984 10:53:50.539637 USB3 port 0 enabled
985 10:53:50.539726 USB3 port 1 enabled
986 10:53:50.542357 USB3 port 2 enabled
987 10:53:50.545826 USB3 port 3 enabled
988 10:53:50.545912 USB3 port 4 disabled
989 10:53:50.548677 USB2 port 0 scanning...
990 10:53:50.552294 scan_static_bus for USB2 port 0
991 10:53:50.555766 scan_static_bus for USB2 port 0 done
992 10:53:50.562179 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
993 10:53:50.565637 USB2 port 1 scanning...
994 10:53:50.568408 scan_static_bus for USB2 port 1
995 10:53:50.571988 scan_static_bus for USB2 port 1 done
996 10:53:50.578341 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
997 10:53:50.578427 USB2 port 6 scanning...
998 10:53:50.581877 scan_static_bus for USB2 port 6
999 10:53:50.588146 scan_static_bus for USB2 port 6 done
1000 10:53:50.591852 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
1001 10:53:50.594633 USB2 port 9 scanning...
1002 10:53:50.598292 scan_static_bus for USB2 port 9
1003 10:53:50.601177 scan_static_bus for USB2 port 9 done
1004 10:53:50.608258 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
1005 10:53:50.608347 USB3 port 0 scanning...
1006 10:53:50.611670 scan_static_bus for USB3 port 0
1007 10:53:50.617991 scan_static_bus for USB3 port 0 done
1008 10:53:50.621452 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
1009 10:53:50.624682 USB3 port 1 scanning...
1010 10:53:50.628151 scan_static_bus for USB3 port 1
1011 10:53:50.630869 scan_static_bus for USB3 port 1 done
1012 10:53:50.637694 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
1013 10:53:50.641194 USB3 port 2 scanning...
1014 10:53:50.643938 scan_static_bus for USB3 port 2
1015 10:53:50.647550 scan_static_bus for USB3 port 2 done
1016 10:53:50.650376 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
1017 10:53:50.653992 USB3 port 3 scanning...
1018 10:53:50.657375 scan_static_bus for USB3 port 3
1019 10:53:50.660931 scan_static_bus for USB3 port 3 done
1020 10:53:50.667061 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
1021 10:53:50.670610 scan_static_bus for USB0 port 0 done
1022 10:53:50.677057 scan_bus: scanning of bus USB0 port 0 took 155472 usecs
1023 10:53:50.680046 scan_static_bus for PCI: 00:14.0 done
1024 10:53:50.687016 scan_bus: scanning of bus PCI: 00:14.0 took 173102 usecs
1025 10:53:50.687118 PCI: 00:15.0 scanning...
1026 10:53:50.693515 scan_generic_bus for PCI: 00:15.0
1027 10:53:50.697086 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1028 10:53:50.699917 scan_generic_bus for PCI: 00:15.0 done
1029 10:53:50.706526 scan_bus: scanning of bus PCI: 00:15.0 took 14314 usecs
1030 10:53:50.706619 PCI: 00:15.1 scanning...
1031 10:53:50.710078 scan_generic_bus for PCI: 00:15.1
1032 10:53:50.713532
1033 10:53:50.716496 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1034 10:53:50.720001 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1035 10:53:50.723508 scan_generic_bus for PCI: 00:15.1 done
1036 10:53:50.729717 scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs
1037 10:53:50.733123 PCI: 00:19.0 scanning...
1038 10:53:50.736667 scan_generic_bus for PCI: 00:19.0
1039 10:53:50.739341 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1040 10:53:50.742829 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1041 10:53:50.749820 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1042 10:53:50.752631 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1043 10:53:50.756051 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1044 10:53:50.759411 scan_generic_bus for PCI: 00:19.0 done
1045 10:53:50.765641 scan_bus: scanning of bus PCI: 00:19.0 took 30723 usecs
1046 10:53:50.769031 PCI: 00:1d.0 scanning...
1047 10:53:50.771979 do_pci_scan_bridge for PCI: 00:1d.0
1048 10:53:50.775510 PCI: pci_scan_bus for bus 01
1049 10:53:50.778402 PCI: 01:00.0 [1c5c/1327] enabled
1050 10:53:50.781996 Enabling Common Clock Configuration
1051 10:53:50.785539 L1 Sub-State supported from root port 29
1052 10:53:50.788336 L1 Sub-State Support = 0xf
1053 10:53:50.791853 CommonModeRestoreTime = 0x28
1054 10:53:50.794736 Power On Value = 0x16, Power On Scale = 0x0
1055 10:53:50.798376 ASPM: Enabled L1
1056 10:53:50.804835 scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs
1057 10:53:50.804919 PCI: 00:1e.2 scanning...
1058 10:53:50.811874 scan_generic_bus for PCI: 00:1e.2
1059 10:53:50.814735 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1060 10:53:50.818318 scan_generic_bus for PCI: 00:1e.2 done
1061 10:53:50.824707 scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
1062 10:53:50.824830 PCI: 00:1e.3 scanning...
1063 10:53:50.828274 scan_generic_bus for PCI: 00:1e.3
1064 10:53:50.834471 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1065 10:53:50.838113 scan_generic_bus for PCI: 00:1e.3 done
1066 10:53:50.844448 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1067 10:53:50.844541 PCI: 00:1f.0 scanning...
1068 10:53:50.847856 scan_static_bus for PCI: 00:1f.0
1069 10:53:50.850641 PNP: 0c09.0 enabled
1070 10:53:50.854186 scan_static_bus for PCI: 00:1f.0 done
1071 10:53:50.860821 scan_bus: scanning of bus PCI: 00:1f.0 took 12061 usecs
1072 10:53:50.864253 PCI: 00:1f.3 scanning...
1073 10:53:50.867755 scan_bus: scanning of bus PCI: 00:1f.3 took 2863 usecs
1074 10:53:50.870385 PCI: 00:1f.4 scanning...
1075 10:53:50.873970 scan_generic_bus for PCI: 00:1f.4
1076 10:53:50.877400 scan_generic_bus for PCI: 00:1f.4 done
1077 10:53:50.880684
1078 10:53:50.883580 scan_bus: scanning of bus PCI: 00:1f.4 took 10175 usecs
1079 10:53:50.887108 PCI: 00:1f.5 scanning...
1080 10:53:50.889874 scan_generic_bus for PCI: 00:1f.5
1081 10:53:50.893394 scan_generic_bus for PCI: 00:1f.5 done
1082 10:53:50.899804 scan_bus: scanning of bus PCI: 00:1f.5 took 10201 usecs
1083 10:53:50.906327 scan_bus: scanning of bus DOMAIN: 0000 took 605331 usecs
1084 10:53:50.909816 scan_static_bus for Root Device done
1085 10:53:50.916699 scan_bus: scanning of bus Root Device took 625207 usecs
1086 10:53:50.916825 done
1087 10:53:50.919482 Chrome EC: UHEPI supported
1088 10:53:50.926585 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1089 10:53:50.929279 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1090 10:53:50.935886 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1091 10:53:50.943520 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1092 10:53:50.947061 SPI flash protection: WPSW=0 SRP0=1
1093 10:53:50.953424 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1094 10:53:50.956392 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1095 10:53:50.959802 found VGA at PCI: 00:02.0
1096 10:53:50.963163 Setting up VGA for PCI: 00:02.0
1097 10:53:50.969403 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1098 10:53:50.972754 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1099 10:53:50.976385 Allocating resources...
1100 10:53:50.979086 Reading resources...
1101 10:53:50.982710 Root Device read_resources bus 0 link: 0
1102 10:53:50.985644 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1103 10:53:50.992735 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1104 10:53:50.995587 DOMAIN: 0000 read_resources bus 0 link: 0
1105 10:53:51.003680 PCI: 00:14.0 read_resources bus 0 link: 0
1106 10:53:51.007267 USB0 port 0 read_resources bus 0 link: 0
1107 10:53:51.014977 USB0 port 0 read_resources bus 0 link: 0 done
1108 10:53:51.018391 PCI: 00:14.0 read_resources bus 0 link: 0 done
1109 10:53:51.026030 PCI: 00:15.0 read_resources bus 1 link: 0
1110 10:53:51.028949 PCI: 00:15.0 read_resources bus 1 link: 0 done
1111 10:53:51.035764 PCI: 00:15.1 read_resources bus 2 link: 0
1112 10:53:51.038609 PCI: 00:15.1 read_resources bus 2 link: 0 done
1113 10:53:51.046373 PCI: 00:19.0 read_resources bus 3 link: 0
1114 10:53:51.052752 PCI: 00:19.0 read_resources bus 3 link: 0 done
1115 10:53:51.056153 PCI: 00:1d.0 read_resources bus 1 link: 0
1116 10:53:51.062497 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1117 10:53:51.065851 PCI: 00:1e.2 read_resources bus 4 link: 0
1118 10:53:51.072645 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1119 10:53:51.076004 PCI: 00:1e.3 read_resources bus 5 link: 0
1120 10:53:51.082174 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1121 10:53:51.085643 PCI: 00:1f.0 read_resources bus 0 link: 0
1122 10:53:51.092033 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1123 10:53:51.098994 DOMAIN: 0000 read_resources bus 0 link: 0 done
1124 10:53:51.102622 Root Device read_resources bus 0 link: 0 done
1125 10:53:51.105553 Done reading resources.
1126 10:53:51.112093 Show resources in subtree (Root Device)...After reading.
1127 10:53:51.115128 Root Device child on link 0 CPU_CLUSTER: 0
1128 10:53:51.118694 CPU_CLUSTER: 0 child on link 0 APIC: 00
1129 10:53:51.121482 APIC: 00
1130 10:53:51.121585 APIC: 02
1131 10:53:51.124952 APIC: 01
1132 10:53:51.125055 APIC: 03
1133 10:53:51.125154 APIC: 07
1134 10:53:51.128411 APIC: 06
1135 10:53:51.128514 APIC: 05
1136 10:53:51.128583 APIC: 04
1137 10:53:51.134656 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1138 10:53:51.144581 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1139 10:53:51.197682 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1140 10:53:51.197794 PCI: 00:00.0
1141 10:53:51.198059 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1142 10:53:51.198323 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1143 10:53:51.198631 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1144 10:53:51.198710 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1145 10:53:51.247036 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1146 10:53:51.247782 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1147 10:53:51.248800 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1148 10:53:51.249072 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1149 10:53:51.249335 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1150 10:53:51.249408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1151 10:53:51.290930 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1152 10:53:51.291034 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1153 10:53:51.291292 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1154 10:53:51.292131 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1155 10:53:51.294997 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1156 10:53:51.304963 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1157 10:53:51.307863 PCI: 00:02.0
1158 10:53:51.317706 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1159 10:53:51.327664 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1160 10:53:51.333968 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1161 10:53:51.337402 PCI: 00:04.0
1162 10:53:51.337488 PCI: 00:08.0
1163 10:53:51.347775 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 10:53:51.350739 PCI: 00:12.0
1165 10:53:51.360586 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 10:53:51.363449 PCI: 00:14.0 child on link 0 USB0 port 0
1167 10:53:51.373664 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 10:53:51.379960 USB0 port 0 child on link 0 USB2 port 0
1169 10:53:51.380048 USB2 port 0
1170 10:53:51.383560 USB2 port 1
1171 10:53:51.383645 USB2 port 2
1172 10:53:51.386347 USB2 port 3
1173 10:53:51.386432 USB2 port 5
1174 10:53:51.389922 USB2 port 6
1175 10:53:51.390007 USB2 port 9
1176 10:53:51.393209 USB3 port 0
1177 10:53:51.396628 USB3 port 1
1178 10:53:51.396740 USB3 port 2
1179 10:53:51.399431 USB3 port 3
1180 10:53:51.399527 USB3 port 4
1181 10:53:51.402926 PCI: 00:14.2
1182 10:53:51.412366 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1183 10:53:51.422512 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 10:53:51.422602 PCI: 00:14.3
1185 10:53:51.432427 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1186 10:53:51.438600 PCI: 00:15.0 child on link 0 I2C: 01:15
1187 10:53:51.448870 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 10:53:51.448963 I2C: 01:15
1189 10:53:51.452414 PCI: 00:15.1 child on link 0 I2C: 02:5d
1190 10:53:51.461506 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 10:53:51.464966 I2C: 02:5d
1192 10:53:51.465053 GENERIC: 0.0
1193 10:53:51.468437 PCI: 00:16.0
1194 10:53:51.478465 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 10:53:51.478556 PCI: 00:17.0
1196 10:53:51.481413
1197 10:53:51.487714 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1198 10:53:51.497535 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1199 10:53:51.507479 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1200 10:53:51.513975 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1201 10:53:51.523931 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1202 10:53:51.531001 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1203 10:53:51.537186 PCI: 00:19.0 child on link 0 I2C: 03:1a
1204 10:53:51.547175 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 10:53:51.547257 I2C: 03:1a
1206 10:53:51.550712 I2C: 03:38
1207 10:53:51.550794 I2C: 03:39
1208 10:53:51.553496 I2C: 03:3a
1209 10:53:51.553602 I2C: 03:3b
1210 10:53:51.556968 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1211 10:53:51.566295 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1212 10:53:51.576249 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1213 10:53:51.586399 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1214 10:53:51.586483 PCI: 01:00.0
1215 10:53:51.595931 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 10:53:51.599500 PCI: 00:1e.0
1217 10:53:51.608902 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 10:53:51.619036 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1219 10:53:51.625426 PCI: 00:1e.2 child on link 0 SPI: 00
1220 10:53:51.635044 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 10:53:51.635130 SPI: 00
1222 10:53:51.638595 PCI: 00:1e.3 child on link 0 SPI: 01
1223 10:53:51.648430 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 10:53:51.651950 SPI: 01
1225 10:53:51.654912 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1226 10:53:51.664688 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1227 10:53:51.670940 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1228 10:53:51.674516 PNP: 0c09.0
1229 10:53:51.684527 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1230 10:53:51.684613 PCI: 00:1f.3
1231 10:53:51.693763 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 10:53:51.703927 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1233 10:53:51.706837 PCI: 00:1f.4
1234 10:53:51.716623 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1235 10:53:51.726615 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1236 10:53:51.726700 PCI: 00:1f.5
1237 10:53:51.736637 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 10:53:51.743051 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1239 10:53:51.749391 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1240 10:53:51.756201 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1241 10:53:51.759743 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1242 10:53:51.762529 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1243 10:53:51.765989 PCI: 00:17.0 18 * [0x60 - 0x67] io
1244 10:53:51.769477 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1245 10:53:51.775630 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1246 10:53:51.782729 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1247 10:53:51.792364 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 10:53:51.798642 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 10:53:51.805573 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1250 10:53:51.811949 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1251 10:53:51.818359 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1252 10:53:51.821880 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1253 10:53:51.828424 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1254 10:53:51.831221 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1255 10:53:51.838323 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1256 10:53:51.841191 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1257 10:53:51.848247 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1258 10:53:51.851044 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1259 10:53:51.858274 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1260 10:53:51.861170 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1261 10:53:51.867533 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1262 10:53:51.870989 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1263 10:53:51.877273 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1264 10:53:51.880966 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1265 10:53:51.887378 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1266 10:53:51.890905 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1267 10:53:51.897098 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1268 10:53:51.900572 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1269 10:53:51.904071 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1270 10:53:51.906894
1271 10:53:51.910390 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1272 10:53:51.913969 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1273 10:53:51.916658
1274 10:53:51.920354 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1275 10:53:51.923135 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1276 10:53:51.929678 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1277 10:53:51.939480 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1278 10:53:51.942994 avoid_fixed_resources: DOMAIN: 0000
1279 10:53:51.946431 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1280 10:53:51.952778 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1281 10:53:51.962454 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1282 10:53:51.968958 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1283 10:53:51.975867 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1284 10:53:51.985827 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1285 10:53:51.992276 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1286 10:53:51.998481 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1287 10:53:52.008078 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1288 10:53:52.015169 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1289 10:53:52.021754 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1290 10:53:52.028165 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1291 10:53:52.031662 Setting resources...
1292 10:53:52.037928 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1293 10:53:52.041458 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1294 10:53:52.044756 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1295 10:53:52.051101 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1296 10:53:52.054529 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1297 10:53:52.060671 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1298 10:53:52.067799 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1299 10:53:52.074357 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1300 10:53:52.080605 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1301 10:53:52.084220 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1302 10:53:52.090690 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1303 10:53:52.094072 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1304 10:53:52.100296 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1305 10:53:52.103892 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1306 10:53:52.110044 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1307 10:53:52.113538 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1308 10:53:52.119956 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1309 10:53:52.123589 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1310 10:53:52.129978 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1311 10:53:52.133420 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1312 10:53:52.139492 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1313 10:53:52.143043 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1314 10:53:52.149402 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1315 10:53:52.152961 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1316 10:53:52.159171 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1317 10:53:52.162501 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1318 10:53:52.168718 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1319 10:53:52.172421 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1320 10:53:52.178714 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1321 10:53:52.181714 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1322 10:53:52.188730 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1323 10:53:52.192259 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1324 10:53:52.198333 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1325 10:53:52.201809
1326 10:53:52.207962 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1327 10:53:52.214894 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1328 10:53:52.221660 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1329 10:53:52.227983 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1330 10:53:52.234365 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1331 10:53:52.237870 Root Device assign_resources, bus 0 link: 0
1332 10:53:52.244118 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 10:53:52.251059 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1334 10:53:52.260689 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1335 10:53:52.267153 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1336 10:53:52.276870 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1337 10:53:52.283302 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1338 10:53:52.293540 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1339 10:53:52.297118 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 10:53:52.303437 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 10:53:52.309887 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1342 10:53:52.319705 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1343 10:53:52.325996 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1344 10:53:52.336066 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1345 10:53:52.338929 PCI: 00:15.0 assign_resources, bus 1 link: 0
1346 10:53:52.346028 PCI: 00:15.0 assign_resources, bus 1 link: 0
1347 10:53:52.352312 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1348 10:53:52.358707 PCI: 00:15.1 assign_resources, bus 2 link: 0
1349 10:53:52.362137 PCI: 00:15.1 assign_resources, bus 2 link: 0
1350 10:53:52.372093 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1351 10:53:52.378340 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1352 10:53:52.385288 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1353 10:53:52.395083 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1354 10:53:52.401453 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1355 10:53:52.407643 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1356 10:53:52.417590 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1357 10:53:52.424396 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1358 10:53:52.430889 PCI: 00:19.0 assign_resources, bus 3 link: 0
1359 10:53:52.433861 PCI: 00:19.0 assign_resources, bus 3 link: 0
1360 10:53:52.443860 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1361 10:53:52.453787 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1362 10:53:52.460046 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1363 10:53:52.463639 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1364 10:53:52.473929 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1365 10:53:52.476651 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 10:53:52.487086 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1367 10:53:52.493430 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1368 10:53:52.499785 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1369 10:53:52.503301 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1370 10:53:52.513193 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1371 10:53:52.516001 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1372 10:53:52.522952 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1373 10:53:52.525895 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 10:53:52.532382 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1375 10:53:52.535906 LPC: Trying to open IO window from 800 size 1ff
1376 10:53:52.545170 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1377 10:53:52.552341 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1378 10:53:52.562073 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1379 10:53:52.568390 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1380 10:53:52.574672 DOMAIN: 0000 assign_resources, bus 0 link: 0
1381 10:53:52.578051 Root Device assign_resources, bus 0 link: 0
1382 10:53:52.581515 Done setting resources.
1383 10:53:52.587809 Show resources in subtree (Root Device)...After assigning values.
1384 10:53:52.591397 Root Device child on link 0 CPU_CLUSTER: 0
1385 10:53:52.594836 CPU_CLUSTER: 0 child on link 0 APIC: 00
1386 10:53:52.597741 APIC: 00
1387 10:53:52.597819 APIC: 02
1388 10:53:52.601301 APIC: 01
1389 10:53:52.601378 APIC: 03
1390 10:53:52.601443 APIC: 07
1391 10:53:52.604745 APIC: 06
1392 10:53:52.604834 APIC: 05
1393 10:53:52.604897 APIC: 04
1394 10:53:52.610934 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1395 10:53:52.620440 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1396 10:53:52.630320 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1397 10:53:52.633956 PCI: 00:00.0
1398 10:53:52.643316 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1399 10:53:52.653105 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1400 10:53:52.660008 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1401 10:53:52.669851 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1402 10:53:52.679675 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1403 10:53:52.689470 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1404 10:53:52.699564 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1405 10:53:52.709167 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1406 10:53:52.715622 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1407 10:53:52.725941 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1408 10:53:52.735162 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1409 10:53:52.745149 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1410 10:53:52.754925 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1411 10:53:52.765373 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1412 10:53:52.774465 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1413 10:53:52.781520 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1414 10:53:52.784298 PCI: 00:02.0
1415 10:53:52.794708 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1416 10:53:52.804624 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1417 10:53:52.814406 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1418 10:53:52.817436 PCI: 00:04.0
1419 10:53:52.817521 PCI: 00:08.0
1420 10:53:52.827248 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1421 10:53:52.830096 PCI: 00:12.0
1422 10:53:52.840301 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1423 10:53:52.843866 PCI: 00:14.0 child on link 0 USB0 port 0
1424 10:53:52.856524 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1425 10:53:52.859995 USB0 port 0 child on link 0 USB2 port 0
1426 10:53:52.860077 USB2 port 0
1427 10:53:52.862828 USB2 port 1
1428 10:53:52.866292 USB2 port 2
1429 10:53:52.866370 USB2 port 3
1430 10:53:52.869797 USB2 port 5
1431 10:53:52.869877 USB2 port 6
1432 10:53:52.873252 USB2 port 9
1433 10:53:52.873330 USB3 port 0
1434 10:53:52.875970 USB3 port 1
1435 10:53:52.876047 USB3 port 2
1436 10:53:52.879598 USB3 port 3
1437 10:53:52.879679 USB3 port 4
1438 10:53:52.883094 PCI: 00:14.2
1439 10:53:52.892761 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1440 10:53:52.902677 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1441 10:53:52.905576 PCI: 00:14.3
1442 10:53:52.915529 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1443 10:53:52.918964 PCI: 00:15.0 child on link 0 I2C: 01:15
1444 10:53:52.928777 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1445 10:53:52.931605 I2C: 01:15
1446 10:53:52.935028 PCI: 00:15.1 child on link 0 I2C: 02:5d
1447 10:53:52.945016 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1448 10:53:52.947910 I2C: 02:5d
1449 10:53:52.947996 GENERIC: 0.0
1450 10:53:52.951466 PCI: 00:16.0
1451 10:53:52.961098 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1452 10:53:52.961189 PCI: 00:17.0
1453 10:53:52.963882
1454 10:53:52.973823 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1455 10:53:52.983532 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1456 10:53:52.990573 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1457 10:53:52.993346
1458 10:53:53.000255 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1459 10:53:53.010374 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1460 10:53:53.019586 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1461 10:53:53.023151 PCI: 00:19.0 child on link 0 I2C: 03:1a
1462 10:53:53.036464 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1463 10:53:53.036553 I2C: 03:1a
1464 10:53:53.039261 I2C: 03:38
1465 10:53:53.039348 I2C: 03:39
1466 10:53:53.039417 I2C: 03:3a
1467 10:53:53.042765
1468 10:53:53.042859 I2C: 03:3b
1469 10:53:53.046237 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1470 10:53:53.056178 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1471 10:53:53.065874 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1472 10:53:53.075813 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1473 10:53:53.079199 PCI: 01:00.0
1474 10:53:53.088298 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1475 10:53:53.091715 PCI: 00:1e.0
1476 10:53:53.101566 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1477 10:53:53.111650 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1478 10:53:53.114426 PCI: 00:1e.2 child on link 0 SPI: 00
1479 10:53:53.128212 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1480 10:53:53.128334 SPI: 00
1481 10:53:53.131025 PCI: 00:1e.3 child on link 0 SPI: 01
1482 10:53:53.140976 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1483 10:53:53.143889 SPI: 01
1484 10:53:53.147418 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 10:53:53.157318 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 10:53:53.163580 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1487 10:53:53.167184 PNP: 0c09.0
1488 10:53:53.177048 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1489 10:53:53.177146 PCI: 00:1f.3
1490 10:53:53.186660 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1491 10:53:53.199293 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1492 10:53:53.199384 PCI: 00:1f.4
1493 10:53:53.209170 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1494 10:53:53.219032 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1495 10:53:53.219119 PCI: 00:1f.5
1496 10:53:53.232232 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1497 10:53:53.232328 Done allocating resources.
1498 10:53:53.238563 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1499 10:53:53.242053 Enabling resources...
1500 10:53:53.245628 PCI: 00:00.0 subsystem <- 8086/9b61
1501 10:53:53.248551 PCI: 00:00.0 cmd <- 06
1502 10:53:53.251501 PCI: 00:02.0 subsystem <- 8086/9b41
1503 10:53:53.255010 PCI: 00:02.0 cmd <- 03
1504 10:53:53.258592 PCI: 00:08.0 cmd <- 06
1505 10:53:53.261398 PCI: 00:12.0 subsystem <- 8086/02f9
1506 10:53:53.264929 PCI: 00:12.0 cmd <- 02
1507 10:53:53.268522 PCI: 00:14.0 subsystem <- 8086/02ed
1508 10:53:53.271285 PCI: 00:14.0 cmd <- 02
1509 10:53:53.271369 PCI: 00:14.2 cmd <- 02
1510 10:53:53.278125 PCI: 00:14.3 subsystem <- 8086/02f0
1511 10:53:53.278212 PCI: 00:14.3 cmd <- 02
1512 10:53:53.284298 PCI: 00:15.0 subsystem <- 8086/02e8
1513 10:53:53.284379 PCI: 00:15.0 cmd <- 02
1514 10:53:53.287854 PCI: 00:15.1 subsystem <- 8086/02e9
1515 10:53:53.291422 PCI: 00:15.1 cmd <- 02
1516 10:53:53.294420 PCI: 00:16.0 subsystem <- 8086/02e0
1517 10:53:53.297767 PCI: 00:16.0 cmd <- 02
1518 10:53:53.300619 PCI: 00:17.0 subsystem <- 8086/02d3
1519 10:53:53.304205 PCI: 00:17.0 cmd <- 03
1520 10:53:53.307769 PCI: 00:19.0 subsystem <- 8086/02c5
1521 10:53:53.310675 PCI: 00:19.0 cmd <- 02
1522 10:53:53.314118 PCI: 00:1d.0 bridge ctrl <- 0013
1523 10:53:53.317008 PCI: 00:1d.0 subsystem <- 8086/02b0
1524 10:53:53.320417 PCI: 00:1d.0 cmd <- 06
1525 10:53:53.323956 PCI: 00:1e.0 subsystem <- 8086/02a8
1526 10:53:53.326756 PCI: 00:1e.0 cmd <- 06
1527 10:53:53.330274 PCI: 00:1e.2 subsystem <- 8086/02aa
1528 10:53:53.333694 PCI: 00:1e.2 cmd <- 06
1529 10:53:53.336533 PCI: 00:1e.3 subsystem <- 8086/02ab
1530 10:53:53.340099 PCI: 00:1e.3 cmd <- 02
1531 10:53:53.343655 PCI: 00:1f.0 subsystem <- 8086/0284
1532 10:53:53.346277 PCI: 00:1f.0 cmd <- 407
1533 10:53:53.349830 PCI: 00:1f.3 subsystem <- 8086/02c8
1534 10:53:53.349912 PCI: 00:1f.3 cmd <- 02
1535 10:53:53.356294 PCI: 00:1f.4 subsystem <- 8086/02a3
1536 10:53:53.356386 PCI: 00:1f.4 cmd <- 03
1537 10:53:53.359845 PCI: 00:1f.5 subsystem <- 8086/02a4
1538 10:53:53.363299 PCI: 00:1f.5 cmd <- 406
1539 10:53:53.373060 PCI: 01:00.0 cmd <- 02
1540 10:53:53.378060 done.
1541 10:53:53.389834 ME: Version: 14.0.39.1367
1542 10:53:53.396134 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1543 10:53:53.399483 Initializing devices...
1544 10:53:53.399568 Root Device init ...
1545 10:53:53.406545 Chrome EC: Set SMI mask to 0x0000000000000000
1546 10:53:53.409418 Chrome EC: clear events_b mask to 0x0000000000000000
1547 10:53:53.416591 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1548 10:53:53.422935 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1549 10:53:53.429462 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1550 10:53:53.432681 Chrome EC: Set WAKE mask to 0x0000000000000000
1551 10:53:53.436303 Root Device init finished in 35209 usecs
1552 10:53:53.439497
1553 10:53:53.439576 CPU_CLUSTER: 0 init ...
1554 10:53:53.445775 CPU_CLUSTER: 0 init finished in 2447 usecs
1555 10:53:53.450719 PCI: 00:00.0 init ...
1556 10:53:53.454337 CPU TDP: 15 Watts
1557 10:53:53.457119 CPU PL2 = 64 Watts
1558 10:53:53.460643 PCI: 00:00.0 init finished in 7073 usecs
1559 10:53:53.463474 PCI: 00:02.0 init ...
1560 10:53:53.466968 PCI: 00:02.0 init finished in 2253 usecs
1561 10:53:53.470323 PCI: 00:08.0 init ...
1562 10:53:53.473703 PCI: 00:08.0 init finished in 2250 usecs
1563 10:53:53.477135 PCI: 00:12.0 init ...
1564 10:53:53.480622 PCI: 00:12.0 init finished in 2251 usecs
1565 10:53:53.483427 PCI: 00:14.0 init ...
1566 10:53:53.486869 PCI: 00:14.0 init finished in 2252 usecs
1567 10:53:53.490423 PCI: 00:14.2 init ...
1568 10:53:53.493267 PCI: 00:14.2 init finished in 2251 usecs
1569 10:53:53.496752 PCI: 00:14.3 init ...
1570 10:53:53.499602 PCI: 00:14.3 init finished in 2268 usecs
1571 10:53:53.503126 PCI: 00:15.0 init ...
1572 10:53:53.506594 DW I2C bus 0 at 0xd121f000 (400 KHz)
1573 10:53:53.510056 PCI: 00:15.0 init finished in 5972 usecs
1574 10:53:53.512989
1575 10:53:53.513076 PCI: 00:15.1 init ...
1576 10:53:53.516388 DW I2C bus 1 at 0xd1220000 (400 KHz)
1577 10:53:53.522742 PCI: 00:15.1 init finished in 5974 usecs
1578 10:53:53.522828 PCI: 00:16.0 init ...
1579 10:53:53.526282
1580 10:53:53.529041 PCI: 00:16.0 init finished in 2242 usecs
1581 10:53:53.532471 PCI: 00:19.0 init ...
1582 10:53:53.536048 DW I2C bus 4 at 0xd1222000 (400 KHz)
1583 10:53:53.539409 PCI: 00:19.0 init finished in 5975 usecs
1584 10:53:53.542315 PCI: 00:1d.0 init ...
1585 10:53:53.545811 Initializing PCH PCIe bridge.
1586 10:53:53.549133 PCI: 00:1d.0 init finished in 5282 usecs
1587 10:53:53.552905 PCI: 00:1f.0 init ...
1588 10:53:53.555688 IOAPIC: Initializing IOAPIC at 0xfec00000
1589 10:53:53.561969 IOAPIC: Bootstrap Processor Local APIC = 0x00
1590 10:53:53.562048 IOAPIC: ID = 0x02
1591 10:53:53.565498 IOAPIC: Dumping registers
1592 10:53:53.569093 reg 0x0000: 0x02000000
1593 10:53:53.571902 reg 0x0001: 0x00770020
1594 10:53:53.575555 reg 0x0002: 0x00000000
1595 10:53:53.578460 PCI: 00:1f.0 init finished in 23517 usecs
1596 10:53:53.581955 PCI: 00:1f.4 init ...
1597 10:53:53.584701 PCI: 00:1f.4 init finished in 2260 usecs
1598 10:53:53.596587 PCI: 01:00.0 init ...
1599 10:53:53.599908 PCI: 01:00.0 init finished in 2251 usecs
1600 10:53:53.604084 PNP: 0c09.0 init ...
1601 10:53:53.607657 Google Chrome EC uptime: 11.088 seconds
1602 10:53:53.611078
1603 10:53:53.613884 Google Chrome AP resets since EC boot: 0
1604 10:53:53.617424 Google Chrome most recent AP reset causes:
1605 10:53:53.623749 Google Chrome EC reset flags at last EC boot: reset-pin
1606 10:53:53.626662 PNP: 0c09.0 init finished in 20594 usecs
1607 10:53:53.630140 Devices initialized
1608 10:53:53.633675 Show all devs... After init.
1609 10:53:53.633760 Root Device: enabled 1
1610 10:53:53.636652 CPU_CLUSTER: 0: enabled 1
1611 10:53:53.640121 DOMAIN: 0000: enabled 1
1612 10:53:53.640209 APIC: 00: enabled 1
1613 10:53:53.643652
1614 10:53:53.643738 PCI: 00:00.0: enabled 1
1615 10:53:53.646423 PCI: 00:02.0: enabled 1
1616 10:53:53.649915 PCI: 00:04.0: enabled 0
1617 10:53:53.650000 PCI: 00:05.0: enabled 0
1618 10:53:53.653347 PCI: 00:12.0: enabled 1
1619 10:53:53.656309 PCI: 00:12.5: enabled 0
1620 10:53:53.659810 PCI: 00:12.6: enabled 0
1621 10:53:53.659900 PCI: 00:14.0: enabled 1
1622 10:53:53.662788 PCI: 00:14.1: enabled 0
1623 10:53:53.666342 PCI: 00:14.3: enabled 1
1624 10:53:53.669311 PCI: 00:14.5: enabled 0
1625 10:53:53.669397 PCI: 00:15.0: enabled 1
1626 10:53:53.672650 PCI: 00:15.1: enabled 1
1627 10:53:53.676201 PCI: 00:15.2: enabled 0
1628 10:53:53.679666 PCI: 00:15.3: enabled 0
1629 10:53:53.679751 PCI: 00:16.0: enabled 1
1630 10:53:53.682611 PCI: 00:16.1: enabled 0
1631 10:53:53.686035 PCI: 00:16.2: enabled 0
1632 10:53:53.689404 PCI: 00:16.3: enabled 0
1633 10:53:53.689489 PCI: 00:16.4: enabled 0
1634 10:53:53.692911 PCI: 00:16.5: enabled 0
1635 10:53:53.695792 PCI: 00:17.0: enabled 1
1636 10:53:53.699153 PCI: 00:19.0: enabled 1
1637 10:53:53.699239 PCI: 00:19.1: enabled 0
1638 10:53:53.702005 PCI: 00:19.2: enabled 0
1639 10:53:53.705535 PCI: 00:1a.0: enabled 0
1640 10:53:53.709081 PCI: 00:1c.0: enabled 0
1641 10:53:53.709168 PCI: 00:1c.1: enabled 0
1642 10:53:53.712010 PCI: 00:1c.2: enabled 0
1643 10:53:53.715699 PCI: 00:1c.3: enabled 0
1644 10:53:53.718433 PCI: 00:1c.4: enabled 0
1645 10:53:53.718518 PCI: 00:1c.5: enabled 0
1646 10:53:53.722018 PCI: 00:1c.6: enabled 0
1647 10:53:53.725418 PCI: 00:1c.7: enabled 0
1648 10:53:53.725503 PCI: 00:1d.0: enabled 1
1649 10:53:53.728268
1650 10:53:53.728354 PCI: 00:1d.1: enabled 0
1651 10:53:53.731654 PCI: 00:1d.2: enabled 0
1652 10:53:53.735103 PCI: 00:1d.3: enabled 0
1653 10:53:53.735188 PCI: 00:1d.4: enabled 0
1654 10:53:53.738696 PCI: 00:1d.5: enabled 0
1655 10:53:53.742056 PCI: 00:1e.0: enabled 1
1656 10:53:53.744870 PCI: 00:1e.1: enabled 0
1657 10:53:53.744955 PCI: 00:1e.2: enabled 1
1658 10:53:53.748324 PCI: 00:1e.3: enabled 1
1659 10:53:53.751822 PCI: 00:1f.0: enabled 1
1660 10:53:53.754736 PCI: 00:1f.1: enabled 0
1661 10:53:53.754821 PCI: 00:1f.2: enabled 0
1662 10:53:53.758290 PCI: 00:1f.3: enabled 1
1663 10:53:53.761732 PCI: 00:1f.4: enabled 1
1664 10:53:53.764462 PCI: 00:1f.5: enabled 1
1665 10:53:53.764570 PCI: 00:1f.6: enabled 0
1666 10:53:53.767950 USB0 port 0: enabled 1
1667 10:53:53.771491 I2C: 01:15: enabled 1
1668 10:53:53.771609 I2C: 02:5d: enabled 1
1669 10:53:53.774353 GENERIC: 0.0: enabled 1
1670 10:53:53.777775 I2C: 03:1a: enabled 1
1671 10:53:53.780701 I2C: 03:38: enabled 1
1672 10:53:53.780823 I2C: 03:39: enabled 1
1673 10:53:53.784204 I2C: 03:3a: enabled 1
1674 10:53:53.787677 I2C: 03:3b: enabled 1
1675 10:53:53.787763 PCI: 00:00.0: enabled 1
1676 10:53:53.791058 SPI: 00: enabled 1
1677 10:53:53.793864 SPI: 01: enabled 1
1678 10:53:53.793952 PNP: 0c09.0: enabled 1
1679 10:53:53.797395 USB2 port 0: enabled 1
1680 10:53:53.800331 USB2 port 1: enabled 1
1681 10:53:53.800438 USB2 port 2: enabled 0
1682 10:53:53.803739 USB2 port 3: enabled 0
1683 10:53:53.807400 USB2 port 5: enabled 0
1684 10:53:53.810263 USB2 port 6: enabled 1
1685 10:53:53.810351 USB2 port 9: enabled 1
1686 10:53:53.813724 USB3 port 0: enabled 1
1687 10:53:53.817357 USB3 port 1: enabled 1
1688 10:53:53.817446 USB3 port 2: enabled 1
1689 10:53:53.820163 USB3 port 3: enabled 1
1690 10:53:53.823812 USB3 port 4: enabled 0
1691 10:53:53.823905 APIC: 02: enabled 1
1692 10:53:53.826840 APIC: 01: enabled 1
1693 10:53:53.830369 APIC: 03: enabled 1
1694 10:53:53.830454 APIC: 07: enabled 1
1695 10:53:53.833036 APIC: 06: enabled 1
1696 10:53:53.836680 APIC: 05: enabled 1
1697 10:53:53.836794 APIC: 04: enabled 1
1698 10:53:53.839529 PCI: 00:08.0: enabled 1
1699 10:53:53.842961 PCI: 00:14.2: enabled 1
1700 10:53:53.843038 PCI: 01:00.0: enabled 1
1701 10:53:53.847822 Disabling ACPI via APMC:
1702 10:53:53.852065 done.
1703 10:53:53.854888 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1704 10:53:53.858426 ELOG: NV offset 0xaf0000 size 0x4000
1705 10:53:53.865568 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1706 10:53:53.872607 ELOG: Event(17) added with size 13 at 2022-11-22 10:53:53 UTC
1707 10:53:53.878990 POST: Unexpected post code in previous boot: 0x73
1708 10:53:53.885264 ELOG: Event(A3) added with size 11 at 2022-11-22 10:53:53 UTC
1709 10:53:53.891563 ELOG: Event(A6) added with size 13 at 2022-11-22 10:53:53 UTC
1710 10:53:53.898437 ELOG: Event(92) added with size 9 at 2022-11-22 10:53:53 UTC
1711 10:53:53.904789 ELOG: Event(93) added with size 9 at 2022-11-22 10:53:53 UTC
1712 10:53:53.911152 ELOG: Event(9A) added with size 9 at 2022-11-22 10:53:53 UTC
1713 10:53:53.914719 ELOG: Event(9E) added with size 10 at 2022-11-22 10:53:53 UTC
1714 10:53:53.917583
1715 10:53:53.921164 ELOG: Event(9F) added with size 14 at 2022-11-22 10:53:53 UTC
1716 10:53:53.927864 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1717 10:53:53.934211 ELOG: Event(A1) added with size 10 at 2022-11-22 10:53:53 UTC
1718 10:53:53.944081 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1719 10:53:53.947537 ELOG: Event(A0) added with size 9 at 2022-11-22 10:53:53 UTC
1720 10:53:53.953907 elog_add_boot_reason: Logged dev mode boot
1721 10:53:53.953997 Finalize devices...
1722 10:53:53.957247 PCI: 00:17.0 final
1723 10:53:53.960604 Devices finalized
1724 10:53:53.963546 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1725 10:53:53.969928 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1726 10:53:53.973489 ME: HFSTS1 : 0x90000245
1727 10:53:53.976939 ME: HFSTS2 : 0x3B850126
1728 10:53:53.986114 ME: HFSTS3 : 0x00000020
1729 10:53:53.986204 ME: HFSTS4 : 0x00004800
1730 10:53:53.989547 ME: HFSTS5 : 0x00000000
1731 10:53:53.993028 ME: HFSTS6 : 0x40400006
1732 10:53:53.996580 ME: Manufacturing Mode : NO
1733 10:53:53.999203 ME: FW Partition Table : OK
1734 10:53:54.002798 ME: Bringup Loader Failure : NO
1735 10:53:54.005499 ME: Firmware Init Complete : YES
1736 10:53:54.009103 ME: Boot Options Present : NO
1737 10:53:54.012508 ME: Update In Progress : NO
1738 10:53:54.015954
1739 10:53:54.018819 ME: D0i3 Support : YES
1740 10:53:54.022346 ME: Low Power State Enabled : NO
1741 10:53:54.025341 ME: CPU Replaced : NO
1742 10:53:54.028801 ME: CPU Replacement Valid : YES
1743 10:53:54.032309 ME: Current Working State : 5
1744 10:53:54.032395 ME: Current Operation State : 1
1745 10:53:54.035972
1746 10:53:54.036059 ME: Current Operation Mode : 0
1747 10:53:54.038766 ME: Error Code : 0
1748 10:53:54.041716 ME: CPU Debug Disabled : YES
1749 10:53:54.045180
1750 10:53:54.048591 ME: TXT Support : NO
1751 10:53:54.051617 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1752 10:53:54.058652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1753 10:53:54.061295 CBFS @ c08000 size 3f8000
1754 10:53:54.064945 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1755 10:53:54.067764 CBFS: Locating 'fallback/dsdt.aml'
1756 10:53:54.074929 CBFS: Found @ offset 10bb80 size 3fa5
1757 10:53:54.078474 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1758 10:53:54.081253 CBFS @ c08000 size 3f8000
1759 10:53:54.088127 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1760 10:53:54.090950 CBFS: Locating 'fallback/slic'
1761 10:53:54.094518 CBFS: 'fallback/slic' not found.
1762 10:53:54.097918 ACPI: Writing ACPI tables at 99b3e000.
1763 10:53:54.100778
1764 10:53:54.100858 ACPI: * FACS
1765 10:53:54.104233 ACPI: * DSDT
1766 10:53:54.107855 Ramoops buffer: 0x100000@0x99a3d000.
1767 10:53:54.110721 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1768 10:53:54.114242 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1769 10:53:54.118436 Google Chrome EC: version:
1770 10:53:54.121278 ro: helios_v2.0.2659-56403530b
1771 10:53:54.124939 rw: helios_v2.0.2849-c41de27e7d
1772 10:53:54.127767 running image: 1
1773 10:53:54.131400 ACPI: * FADT
1774 10:53:54.131482 SCI is IRQ9
1775 10:53:54.137701 ACPI: added table 1/32, length now 40
1776 10:53:54.137786 ACPI: * SSDT
1777 10:53:54.141136 Found 1 CPU(s) with 8 core(s) each.
1778 10:53:54.144612 Error: Could not locate 'wifi_sar' in VPD.
1779 10:53:54.151043 Checking CBFS for default SAR values
1780 10:53:54.154472 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1781 10:53:54.157371 CBFS @ c08000 size 3f8000
1782 10:53:54.163842 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1783 10:53:54.167439 CBFS: Locating 'wifi_sar_defaults.hex'
1784 10:53:54.170294 CBFS: Found @ offset 5fac0 size 77
1785 10:53:54.173791 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1786 10:53:54.180049 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1787 10:53:54.183446 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1788 10:53:54.189873 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1789 10:53:54.193362 failed to find key in VPD: dsm_calib_r0_0
1790 10:53:54.203208 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1791 10:53:54.206733 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1792 10:53:54.212943 failed to find key in VPD: dsm_calib_r0_1
1793 10:53:54.219290 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1794 10:53:54.226423 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1795 10:53:54.229273 failed to find key in VPD: dsm_calib_r0_2
1796 10:53:54.238970 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1797 10:53:54.245996 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1798 10:53:54.248900 failed to find key in VPD: dsm_calib_r0_3
1799 10:53:54.258534 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1800 10:53:54.261999 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1801 10:53:54.268418 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1802 10:53:54.272079 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1803 10:53:54.275751 EC returned error result code 1
1804 10:53:54.279342 EC returned error result code 1
1805 10:53:54.282049 EC returned error result code 1
1806 10:53:54.288475 PS2K: Bad resp from EC. Vivaldi disabled!
1807 10:53:54.292514 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1808 10:53:54.298781 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1809 10:53:54.305049 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1810 10:53:54.308588 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1811 10:53:54.314771 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1812 10:53:54.321774 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1813 10:53:54.324764 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1814 10:53:54.331170 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1815 10:53:54.334857 ACPI: added table 2/32, length now 44
1816 10:53:54.337670 ACPI: * MCFG
1817 10:53:54.341188 ACPI: added table 3/32, length now 48
1818 10:53:54.344675 ACPI: * TPM2
1819 10:53:54.344798 TPM2 log created at 99a2d000
1820 10:53:54.348291
1821 10:53:54.351092 ACPI: added table 4/32, length now 52
1822 10:53:54.351179 ACPI: * MADT
1823 10:53:54.354501 SCI is IRQ9
1824 10:53:54.357991 ACPI: added table 5/32, length now 56
1825 10:53:54.358077 current = 99b43ac0
1826 10:53:54.360851 ACPI: * DMAR
1827 10:53:54.364283 ACPI: added table 6/32, length now 60
1828 10:53:54.367161 ACPI: * IGD OpRegion
1829 10:53:54.367251 GMA: Found VBT in CBFS
1830 10:53:54.370690 GMA: Found valid VBT in CBFS
1831 10:53:54.373673 ACPI: added table 7/32, length now 64
1832 10:53:54.377411
1833 10:53:54.377513 ACPI: * HPET
1834 10:53:54.380310 ACPI: added table 8/32, length now 68
1835 10:53:54.383839 ACPI: done.
1836 10:53:54.383918 ACPI tables: 31744 bytes.
1837 10:53:54.386761 smbios_write_tables: 99a2c000
1838 10:53:54.390389 EC returned error result code 3
1839 10:53:54.393665
1840 10:53:54.396584 Couldn't obtain OEM name from CBI
1841 10:53:54.396669 Create SMBIOS type 17
1842 10:53:54.400084 PCI: 00:00.0 (Intel Cannonlake)
1843 10:53:54.402971 PCI: 00:14.3 (Intel WiFi)
1844 10:53:54.406285 SMBIOS tables: 939 bytes.
1845 10:53:54.409828 Writing table forward entry at 0x00000500
1846 10:53:54.416171 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1847 10:53:54.419796 Writing coreboot table at 0x99b62000
1848 10:53:54.425968 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1849 10:53:54.429425 1. 0000000000001000-000000000009ffff: RAM
1850 10:53:54.436045 2. 00000000000a0000-00000000000fffff: RESERVED
1851 10:53:54.438929 3. 0000000000100000-0000000099a2bfff: RAM
1852 10:53:54.445958 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1853 10:53:54.448929 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1854 10:53:54.455450 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1855 10:53:54.461886 7. 000000009a000000-000000009f7fffff: RESERVED
1856 10:53:54.465461 8. 00000000e0000000-00000000efffffff: RESERVED
1857 10:53:54.471904 9. 00000000fc000000-00000000fc000fff: RESERVED
1858 10:53:54.474881 10. 00000000fe000000-00000000fe00ffff: RESERVED
1859 10:53:54.481308 11. 00000000fed10000-00000000fed17fff: RESERVED
1860 10:53:54.484846 12. 00000000fed80000-00000000fed83fff: RESERVED
1861 10:53:54.488317 13. 00000000fed90000-00000000fed91fff: RESERVED
1862 10:53:54.494558 14. 00000000feda0000-00000000feda1fff: RESERVED
1863 10:53:54.498083 15. 0000000100000000-000000045e7fffff: RAM
1864 10:53:54.501688 Graphics framebuffer located at 0xc0000000
1865 10:53:54.504291
1866 10:53:54.504379 Passing 5 GPIOs to payload:
1867 10:53:54.511023 NAME | PORT | POLARITY | VALUE
1868 10:53:54.517355 write protect | undefined | high | low
1869 10:53:54.520905 lid | undefined | high | high
1870 10:53:54.527787 power | undefined | high | low
1871 10:53:54.530481 oprom | undefined | high | low
1872 10:53:54.536918 EC in RW | 0x000000cb | high | low
1873 10:53:54.537005 Board ID: 4
1874 10:53:54.543978 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1875 10:53:54.546750 CBFS @ c08000 size 3f8000
1876 10:53:54.553725 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1877 10:53:54.556603 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1878 10:53:54.560044 coreboot table: 1492 bytes.
1879 10:53:54.563511 IMD ROOT 0. 99fff000 00001000
1880 10:53:54.566417 IMD SMALL 1. 99ffe000 00001000
1881 10:53:54.569889 FSP MEMORY 2. 99c4e000 003b0000
1882 10:53:54.573517 CONSOLE 3. 99c2e000 00020000
1883 10:53:54.576326 FMAP 4. 99c2d000 0000054e
1884 10:53:54.579828 TIME STAMP 5. 99c2c000 00000910
1885 10:53:54.582794 VBOOT WORK 6. 99c18000 00014000
1886 10:53:54.586189 MRC DATA 7. 99c16000 00001958
1887 10:53:54.589761 ROMSTG STCK 8. 99c15000 00001000
1888 10:53:54.592678 AFTER CAR 9. 99c0b000 0000a000
1889 10:53:54.596155 RAMSTAGE 10. 99baf000 0005c000
1890 10:53:54.598953 REFCODE 11. 99b7a000 00035000
1891 10:53:54.602370 SMM BACKUP 12. 99b6a000 00010000
1892 10:53:54.605878
1893 10:53:54.605965 COREBOOT 13. 99b62000 00008000
1894 10:53:54.609293
1895 10:53:54.612074 ACPI 14. 99b3e000 00024000
1896 10:53:54.615652 ACPI GNVS 15. 99b3d000 00001000
1897 10:53:54.619121 RAMOOPS 16. 99a3d000 00100000
1898 10:53:54.621896 TPM2 TCGLOG17. 99a2d000 00010000
1899 10:53:54.625441 SMBIOS 18. 99a2c000 00000800
1900 10:53:54.625527 IMD small region:
1901 10:53:54.628826 IMD ROOT 0. 99ffec00 00000400
1902 10:53:54.631642 FSP RUNTIME 1. 99ffebe0 00000004
1903 10:53:54.635266 EC HOSTEVENT 2. 99ffebc0 00000008
1904 10:53:54.638179 POWER STATE 3. 99ffeb80 00000040
1905 10:53:54.641780
1906 10:53:54.645267 ROMSTAGE 4. 99ffeb60 00000004
1907 10:53:54.648003 MEM INFO 5. 99ffe9a0 000001b9
1908 10:53:54.651571 VPD 6. 99ffe920 0000006c
1909 10:53:54.654522 MTRR: Physical address space:
1910 10:53:54.661328 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1911 10:53:54.664658 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1912 10:53:54.671028 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1913 10:53:54.678028 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1914 10:53:54.684402 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1915 10:53:54.690692 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1916 10:53:54.697733 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1917 10:53:54.700508 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 10:53:54.704033 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 10:53:54.710247 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 10:53:54.713552 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 10:53:54.716962 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 10:53:54.720544 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 10:53:54.726854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 10:53:54.730406 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 10:53:54.733905 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 10:53:54.736684 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 10:53:54.743856 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 10:53:54.746515 call enable_fixed_mtrr()
1929 10:53:54.750148 CPU physical address size: 39 bits
1930 10:53:54.753769 MTRR: default type WB/UC MTRR counts: 6/8.
1931 10:53:54.756664 MTRR: WB selected as default type.
1932 10:53:54.763615 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1933 10:53:54.769739 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1934 10:53:54.776913 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1935 10:53:54.783276 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1936 10:53:54.789552 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1937 10:53:54.793071 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1938 10:53:54.800108 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 10:53:54.803585 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 10:53:54.806425 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 10:53:54.809913 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 10:53:54.816812 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 10:53:54.819534 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 10:53:54.822932 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 10:53:54.826443 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 10:53:54.829228
1947 10:53:54.832785 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 10:53:54.836224 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 10:53:54.839076 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 10:53:54.839158
1951 10:53:54.842701 MTRR check
1952 10:53:54.842785 Fixed MTRRs : Enabled
1953 10:53:54.846299
1954 10:53:54.846384 Variable MTRRs: Enabled
1955 10:53:54.846451
1956 10:53:54.849220 call enable_fixed_mtrr()
1957 10:53:54.855609 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1958 10:53:54.859222 CPU physical address size: 39 bits
1959 10:53:54.861991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1960 10:53:54.868893 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 10:53:54.871778 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 10:53:54.875251 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 10:53:54.878753 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 10:53:54.885049 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 10:53:54.888718 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 10:53:54.891577 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 10:53:54.894981 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 10:53:54.901254 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 10:53:54.904785 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 10:53:54.908245 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 10:53:54.911038 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 10:53:54.917798 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 10:53:54.921397 call enable_fixed_mtrr()
1974 10:53:54.924249 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 10:53:54.927594 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 10:53:54.931069 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 10:53:54.937322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 10:53:54.940793 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 10:53:54.943720 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 10:53:54.947206 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 10:53:54.953604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 10:53:54.956959 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 10:53:54.959989 CPU physical address size: 39 bits
1984 10:53:54.963500 call enable_fixed_mtrr()
1985 10:53:54.966967 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 10:53:54.970452 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 10:53:54.976868 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 10:53:54.979678 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 10:53:54.983309 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 10:53:54.986870 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 10:53:54.993316 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 10:53:54.996065 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 10:53:54.999558 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 10:53:55.003227 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 10:53:55.009368 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 10:53:55.012654 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 10:53:55.016076 call enable_fixed_mtrr()
1998 10:53:55.019466 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 10:53:55.022173 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 10:53:55.025761 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 10:53:55.032054 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 10:53:55.035569 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 10:53:55.038904 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 10:53:55.042493 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 10:53:55.048765 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 10:53:55.051553 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 10:53:55.055066 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 10:53:55.058619 CPU physical address size: 39 bits
2009 10:53:55.062134 call enable_fixed_mtrr()
2010 10:53:55.065235 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 10:53:55.071450 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 10:53:55.074993 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 10:53:55.077912 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 10:53:55.081341 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 10:53:55.084799
2016 10:53:55.087650 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 10:53:55.091066 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 10:53:55.094711 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 10:53:55.097522 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 10:53:55.101148
2021 10:53:55.103945 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 10:53:55.107472 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 10:53:55.110889 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 10:53:55.113791 call enable_fixed_mtrr()
2025 10:53:55.117241 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 10:53:55.124098 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 10:53:55.126934 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 10:53:55.130544 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 10:53:55.133280 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 10:53:55.140240 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 10:53:55.143752 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 10:53:55.146627 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 10:53:55.150075 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 10:53:55.156261 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 10:53:55.159727 CPU physical address size: 39 bits
2036 10:53:55.163354 call enable_fixed_mtrr()
2037 10:53:55.163432 CBFS @ c08000 size 3f8000
2038 10:53:55.166700
2039 10:53:55.169589 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2040 10:53:55.173012 CBFS: Locating 'fallback/payload'
2041 10:53:55.176496 CPU physical address size: 39 bits
2042 10:53:55.182657 CBFS: Found @ offset 1c96c0 size 3f798
2043 10:53:55.186171 CPU physical address size: 39 bits
2044 10:53:55.189001 Checking segment from ROM address 0xffdd16f8
2045 10:53:55.192622 CPU physical address size: 39 bits
2046 10:53:55.196169 Checking segment from ROM address 0xffdd1714
2047 10:53:55.202614 Loading segment from ROM address 0xffdd16f8
2048 10:53:55.202698 code (compression=0)
2049 10:53:55.212358 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2050 10:53:55.221974 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2051 10:53:55.222063 it's not compressed!
2052 10:53:55.315323 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2053 10:53:55.321454 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2054 10:53:55.328244 Loading segment from ROM address 0xffdd1714
2055 10:53:55.328331 Entry Point 0x30000000
2056 10:53:55.331682 Loaded segments
2057 10:53:55.337160 Finalizing chipset.
2058 10:53:55.340667 Finalizing SMM.
2059 10:53:55.344169 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2060 10:53:55.347522 mp_park_aps done after 0 msecs.
2061 10:53:55.354059 Jumping to boot code at 30000000(99b62000)
2062 10:53:55.360293 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2063 10:53:55.360379
2064 10:53:55.360446
2065 10:53:55.360508
2066 10:53:55.363621 Starting depthcharge on Helios...
2067 10:53:55.363706
2068 10:53:55.364078 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2069 10:53:55.364183 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2070 10:53:55.364271 Setting prompt string to ['hatch:']
2071 10:53:55.364351 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2072 10:53:55.373373 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2073 10:53:55.373485
2074 10:53:55.379793 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2075 10:53:55.379947
2076 10:53:55.386812 board_setup: Info: eMMC controller not present; skipping
2077 10:53:55.386915
2078 10:53:55.389651 New NVMe Controller 0x30053ac0 @ 00:1d:00
2079 10:53:55.389731
2080 10:53:55.396662 board_setup: Info: SDHCI controller not present; skipping
2081 10:53:55.396747
2082 10:53:55.403147 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2083 10:53:55.403227
2084 10:53:55.403295 Wipe memory regions:
2085 10:53:55.403359
2086 10:53:55.406015 [0x00000000001000, 0x000000000a0000)
2087 10:53:55.409524
2088 10:53:55.413004 [0x00000000100000, 0x00000030000000)
2089 10:53:55.413099
2090 10:53:55.479874 [0x00000030657430, 0x00000099a2c000)
2091 10:53:55.479984
2092 10:53:55.620470 [0x00000100000000, 0x0000045e800000)
2093 10:53:55.620615
2094 10:53:57.003280 R8152: Initializing
2095 10:53:57.003425
2096 10:53:57.006009 Version 9 (ocp_data = 6010)
2097 10:53:57.006086
2098 10:53:57.010368 R8152: Done initializing
2099 10:53:57.010447
2100 10:53:57.013806 Adding net device
2101 10:53:57.013887
2102 10:53:57.497069 R8152: Initializing
2103 10:53:57.497221
2104 10:53:57.499884 Version 6 (ocp_data = 5c30)
2105 10:53:57.499971
2106 10:53:57.503255 R8152: Done initializing
2107 10:53:57.503339
2108 10:53:57.509533 net_add_device: Attemp to include the same device
2109 10:53:57.509624
2110 10:53:57.516368 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2111 10:53:57.516483
2112 10:53:57.516549
2113 10:53:57.516611
2114 10:53:57.516881 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 10:53:57.617656 hatch: tftpboot 192.168.201.1 8077722/tftp-deploy-uw_f3qk1/kernel/bzImage 8077722/tftp-deploy-uw_f3qk1/kernel/cmdline 8077722/tftp-deploy-uw_f3qk1/ramdisk/ramdisk.cpio.gz
2117 10:53:57.617844 Setting prompt string to 'Starting kernel'
2118 10:53:57.617919 Setting prompt string to ['Starting kernel']
2119 10:53:57.617986 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 10:53:57.618058 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2121 10:53:57.622626 tftpboot 192.168.201.1 8077722/tftp-deploy-uw_f3qk1/kernel/bzImoy-uw_f3qk1/kernel/cmdline 8077722/tftp-deploy-uw_f3qk1/ramdisk/ramdisk.cpio.gz
2122 10:53:57.622713
2123 10:53:57.622780 Waiting for link
2124 10:53:57.622841
2125 10:53:57.823170 done.
2126 10:53:57.823324
2127 10:53:57.823413 MAC: 00:24:32:50:19:be
2128 10:53:57.823489
2129 10:53:57.826632 Sending DHCP discover... done.
2130 10:53:57.826716
2131 10:53:57.830215 Waiting for reply... done.
2132 10:53:57.830300
2133 10:53:57.832942 Sending DHCP request... done.
2134 10:53:57.833026
2135 10:53:57.836562 Waiting for reply... done.
2136 10:53:57.836648
2137 10:53:57.839297 My ip is 192.168.201.15
2138 10:53:57.839381
2139 10:53:57.842724 The DHCP server ip is 192.168.201.1
2140 10:53:57.842808
2141 10:53:57.846259 TFTP server IP predefined by user: 192.168.201.1
2142 10:53:57.846343
2143 10:53:57.852658 Bootfile predefined by user: 8077722/tftp-deploy-uw_f3qk1/kernel/bzImage
2144 10:53:57.852778
2145 10:53:57.856100 Sending tftp read request... done.
2146 10:53:57.856184
2147 10:53:57.862394 Waiting for the transfer...
2148 10:53:57.862481
2149 10:53:58.370660 00000000 ################################################################
2150 10:53:58.370809
2151 10:53:58.881280 00080000 ################################################################
2152 10:53:58.881422
2153 10:53:59.403926 00100000 ################################################################
2154 10:53:59.404078
2155 10:53:59.930550 00180000 ################################################################
2156 10:53:59.930717
2157 10:54:00.459270 00200000 ################################################################
2158 10:54:00.459413
2159 10:54:00.970676 00280000 ################################################################
2160 10:54:00.970818
2161 10:54:01.491302 00300000 ################################################################
2162 10:54:01.491456
2163 10:54:02.019250 00380000 ################################################################
2164 10:54:02.019431
2165 10:54:02.559484 00400000 ################################################################
2166 10:54:02.559630
2167 10:54:03.116187 00480000 ################################################################
2168 10:54:03.116322
2169 10:54:03.662479 00500000 ################################################################
2170 10:54:03.662714
2171 10:54:04.198124 00580000 ################################################################
2172 10:54:04.198267
2173 10:54:04.731370 00600000 ################################################################
2174 10:54:04.731570
2175 10:54:05.060058 00680000 ###################################### done.
2176 10:54:05.060200
2177 10:54:05.063797 The bootfile was 7126928 bytes long.
2178 10:54:05.064243
2179 10:54:05.067096 Sending tftp read request... done.
2180 10:54:05.067546
2181 10:54:05.070167 Waiting for the transfer...
2182 10:54:05.070616
2183 10:54:05.698178 00000000 ################################################################
2184 10:54:05.698791
2185 10:54:06.395192 00080000 ################################################################
2186 10:54:06.395848
2187 10:54:07.008354 00100000 ################################################################
2188 10:54:07.008517
2189 10:54:07.661306 00180000 ################################################################
2190 10:54:07.661609
2191 10:54:08.264543 00200000 ################################################################
2192 10:54:08.264705
2193 10:54:08.924659 00280000 ################################################################
2194 10:54:08.924975
2195 10:54:09.586023 00300000 ################################################################
2196 10:54:09.586183
2197 10:54:10.224524 00380000 ################################################################
2198 10:54:10.225123
2199 10:54:10.918308 00400000 ################################################################
2200 10:54:10.918863
2201 10:54:11.634249 00480000 ################################################################
2202 10:54:11.634774
2203 10:54:11.966844 00500000 ################################ done.
2204 10:54:11.967363
2205 10:54:11.970600 Sending tftp read request... done.
2206 10:54:11.971177
2207 10:54:11.973105 Waiting for the transfer...
2208 10:54:11.973690
2209 10:54:11.976348 00000000 # done.
2210 10:54:11.976863
2211 10:54:11.983182 Command line loaded dynamically from TFTP file: 8077722/tftp-deploy-uw_f3qk1/kernel/cmdline
2212 10:54:11.983629
2213 10:54:12.009547 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8077722/extract-nfsrootfs-q1ugm8xr,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2214 10:54:12.010130
2215 10:54:12.016358 ec_init(0): CrosEC protocol v3 supported (256, 256)
2216 10:54:12.016928
2217 10:54:12.023803 Shutting down all USB controllers.
2218 10:54:12.024349
2219 10:54:12.024713 Removing current net device
2220 10:54:12.025092
2221 10:54:12.027823 Finalizing coreboot
2222 10:54:12.028380
2223 10:54:12.034049 Exiting depthcharge with code 4 at timestamp: 24001321
2224 10:54:12.034498
2225 10:54:12.034847
2226 10:54:12.035174 Starting kernel ...
2227 10:54:12.035491
2228 10:54:12.036655 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2229 10:54:12.037249 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2230 10:54:12.037667 Setting prompt string to ['Linux version [0-9]']
2231 10:54:12.038045 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2232 10:54:12.038592 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2233 10:54:12.039496
2234 10:54:12.039878
2235 10:54:12.040216
2237 10:58:37.037452 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2239 10:58:37.037683 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2241 10:58:37.037855 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2244 10:58:37.038150 end: 2 depthcharge-action (duration 00:05:00) [common]
2246 10:58:37.038415 Cleaning after the job
2247 10:58:37.038508 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/ramdisk
2248 10:58:37.039013 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/kernel
2249 10:58:37.039570 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/nfsrootfs
2250 10:58:37.079508 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077722/tftp-deploy-uw_f3qk1/modules
2251 10:58:37.079797 start: 4.1 power-off (timeout 00:00:30) [common]
2252 10:58:37.079959 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2253 10:58:37.099742 >> Command sent successfully.
2254 10:58:37.101767 Returned 0 in 0 seconds
2255 10:58:37.202538 end: 4.1 power-off (duration 00:00:00) [common]
2257 10:58:37.202861 start: 4.2 read-feedback (timeout 00:10:00) [common]
2258 10:58:37.203094 Listened to connection for namespace 'common' for up to 1s
2259 10:58:38.204793 Finalising connection for namespace 'common'
2260 10:58:38.204961 Disconnecting from shell: Finalise
2261 10:58:38.305719 end: 4.2 read-feedback (duration 00:00:01) [common]
2262 10:58:38.305891 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8077722
2263 10:58:38.473222 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8077722
2264 10:58:38.473407 JobError: Your job cannot terminate cleanly.