Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 10:52:44.510109 lava-dispatcher, installed at version: 2022.10
2 10:52:44.510325 start: 0 validate
3 10:52:44.510470 Start time: 2022-11-22 10:52:44.510462+00:00 (UTC)
4 10:52:44.510607 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:52:44.510747 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 10:52:44.797934 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:52:44.798108 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:52:44.799790 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:52:44.799913 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:52:45.092754 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:52:45.092954 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:52:45.095779 validate duration: 0.59
14 10:52:45.096060 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:52:45.096164 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:52:45.096256 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:52:45.096358 Not decompressing ramdisk as can be used compressed.
18 10:52:45.096442 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 10:52:45.096513 saving as /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/ramdisk/initrd.cpio.gz
20 10:52:45.096632 total size: 5431719 (5MB)
21 10:52:45.099569 progress 0% (0MB)
22 10:52:45.113247 progress 5% (0MB)
23 10:52:45.125784 progress 10% (0MB)
24 10:52:45.136808 progress 15% (0MB)
25 10:52:45.145806 progress 20% (1MB)
26 10:52:45.158810 progress 25% (1MB)
27 10:52:45.170383 progress 30% (1MB)
28 10:52:45.180980 progress 35% (1MB)
29 10:52:45.191779 progress 40% (2MB)
30 10:52:45.199828 progress 45% (2MB)
31 10:52:45.208501 progress 50% (2MB)
32 10:52:45.213675 progress 55% (2MB)
33 10:52:45.219056 progress 60% (3MB)
34 10:52:45.223902 progress 65% (3MB)
35 10:52:45.229682 progress 70% (3MB)
36 10:52:45.234323 progress 75% (3MB)
37 10:52:45.240991 progress 80% (4MB)
38 10:52:45.245461 progress 85% (4MB)
39 10:52:45.251895 progress 90% (4MB)
40 10:52:45.257388 progress 95% (4MB)
41 10:52:45.263624 progress 100% (5MB)
42 10:52:45.263998 5MB downloaded in 0.17s (30.95MB/s)
43 10:52:45.264167 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:52:45.264420 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:52:45.264512 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:52:45.264601 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:52:45.264710 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 10:52:45.264797 saving as /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/kernel/bzImage
50 10:52:45.264904 total size: 7126928 (6MB)
51 10:52:45.264966 No compression specified
52 10:52:45.267211 progress 0% (0MB)
53 10:52:45.272968 progress 5% (0MB)
54 10:52:45.278915 progress 10% (0MB)
55 10:52:45.285019 progress 15% (1MB)
56 10:52:45.291218 progress 20% (1MB)
57 10:52:45.297914 progress 25% (1MB)
58 10:52:45.303785 progress 30% (2MB)
59 10:52:45.309909 progress 35% (2MB)
60 10:52:45.315261 progress 40% (2MB)
61 10:52:45.321605 progress 45% (3MB)
62 10:52:45.328136 progress 50% (3MB)
63 10:52:45.333694 progress 55% (3MB)
64 10:52:45.340395 progress 60% (4MB)
65 10:52:45.346008 progress 65% (4MB)
66 10:52:45.352105 progress 70% (4MB)
67 10:52:45.359260 progress 75% (5MB)
68 10:52:45.364044 progress 80% (5MB)
69 10:52:45.369775 progress 85% (5MB)
70 10:52:45.376905 progress 90% (6MB)
71 10:52:45.381908 progress 95% (6MB)
72 10:52:45.387666 progress 100% (6MB)
73 10:52:45.387956 6MB downloaded in 0.12s (55.24MB/s)
74 10:52:45.388124 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:52:45.388376 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:52:45.388471 start: 1.3 download-retry (timeout 00:10:00) [common]
78 10:52:45.388563 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 10:52:45.388678 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 10:52:45.388750 saving as /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/nfsrootfs/full.rootfs.tar
81 10:52:45.388846 total size: 207113456 (197MB)
82 10:52:45.388943 Using unxz to decompress xz
83 10:52:45.397966 progress 0% (0MB)
84 10:52:46.008891 progress 5% (9MB)
85 10:52:46.688012 progress 10% (19MB)
86 10:52:48.368732 progress 15% (29MB)
87 10:52:49.848818 progress 20% (39MB)
88 10:52:50.782800 progress 25% (49MB)
89 10:52:51.699778 progress 30% (59MB)
90 10:52:52.398916 progress 35% (69MB)
91 10:52:53.044129 progress 40% (79MB)
92 10:52:53.631693 progress 45% (88MB)
93 10:52:54.254310 progress 50% (98MB)
94 10:52:54.915777 progress 55% (108MB)
95 10:52:55.641992 progress 60% (118MB)
96 10:52:55.789476 progress 65% (128MB)
97 10:52:55.939562 progress 70% (138MB)
98 10:52:56.036676 progress 75% (148MB)
99 10:52:56.105875 progress 80% (158MB)
100 10:52:56.177095 progress 85% (167MB)
101 10:52:56.284467 progress 90% (177MB)
102 10:52:56.559798 progress 95% (187MB)
103 10:52:57.166621 progress 100% (197MB)
104 10:52:57.172579 197MB downloaded in 11.78s (16.76MB/s)
105 10:52:57.172875 end: 1.3.1 http-download (duration 00:00:12) [common]
107 10:52:57.173170 end: 1.3 download-retry (duration 00:00:12) [common]
108 10:52:57.173280 start: 1.4 download-retry (timeout 00:09:48) [common]
109 10:52:57.173379 start: 1.4.1 http-download (timeout 00:09:48) [common]
110 10:52:57.173514 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 10:52:57.173588 saving as /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/modules/modules.tar
112 10:52:57.173653 total size: 52008 (0MB)
113 10:52:57.173737 Using unxz to decompress xz
114 10:52:57.471460 progress 63% (0MB)
115 10:52:57.475404 progress 100% (0MB)
116 10:52:57.476992 0MB downloaded in 0.30s (0.16MB/s)
117 10:52:57.477278 end: 1.4.1 http-download (duration 00:00:00) [common]
119 10:52:57.477597 end: 1.4 download-retry (duration 00:00:00) [common]
120 10:52:57.477712 start: 1.5 prepare-tftp-overlay (timeout 00:09:48) [common]
121 10:52:57.477815 start: 1.5.1 extract-nfsrootfs (timeout 00:09:48) [common]
122 10:52:59.612341 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8077707/extract-nfsrootfs-jwowlhi2
123 10:52:59.612540 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 10:52:59.612649 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
125 10:52:59.612798 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr
126 10:52:59.612903 makedir: /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin
127 10:52:59.613004 makedir: /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/tests
128 10:52:59.613092 makedir: /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/results
129 10:52:59.613195 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-add-keys
130 10:52:59.613331 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-add-sources
131 10:52:59.613451 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-background-process-start
132 10:52:59.613566 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-background-process-stop
133 10:52:59.613680 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-common-functions
134 10:52:59.613792 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-echo-ipv4
135 10:52:59.613907 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-install-packages
136 10:52:59.614019 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-installed-packages
137 10:52:59.614128 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-os-build
138 10:52:59.614243 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-probe-channel
139 10:52:59.614355 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-probe-ip
140 10:52:59.614464 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-target-ip
141 10:52:59.614573 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-target-mac
142 10:52:59.614681 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-target-storage
143 10:52:59.614793 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-case
144 10:52:59.614909 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-event
145 10:52:59.615034 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-feedback
146 10:52:59.615147 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-raise
147 10:52:59.615266 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-reference
148 10:52:59.615376 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-runner
149 10:52:59.615488 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-set
150 10:52:59.615599 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-test-shell
151 10:52:59.615711 Updating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-add-keys (debian)
152 10:52:59.615827 Updating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-add-sources (debian)
153 10:52:59.615940 Updating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-install-packages (debian)
154 10:52:59.616053 Updating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-installed-packages (debian)
155 10:52:59.616178 Updating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/bin/lava-os-build (debian)
156 10:52:59.616277 Creating /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/environment
157 10:52:59.616365 LAVA metadata
158 10:52:59.616433 - LAVA_JOB_ID=8077707
159 10:52:59.616499 - LAVA_DISPATCHER_IP=192.168.201.1
160 10:52:59.616616 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:45) [common]
161 10:52:59.616684 skipped lava-vland-overlay
162 10:52:59.616763 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 10:52:59.616846 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
164 10:52:59.616909 skipped lava-multinode-overlay
165 10:52:59.616984 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 10:52:59.617067 start: 1.5.2.3 test-definition (timeout 00:09:45) [common]
167 10:52:59.617139 Loading test definitions
168 10:52:59.617231 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:45) [common]
169 10:52:59.617304 Using /lava-8077707 at stage 0
170 10:52:59.617537 uuid=8077707_1.5.2.3.1 testdef=None
171 10:52:59.617630 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 10:52:59.617719 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
173 10:52:59.618144 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 10:52:59.618560 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
176 10:52:59.619083 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 10:52:59.619330 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
179 10:52:59.619830 runner path: /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/0/tests/0_timesync-off test_uuid 8077707_1.5.2.3.1
180 10:52:59.619981 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 10:52:59.620230 start: 1.5.2.3.5 git-repo-action (timeout 00:09:45) [common]
183 10:52:59.620307 Using /lava-8077707 at stage 0
184 10:52:59.620408 Fetching tests from https://github.com/kernelci/test-definitions.git
185 10:52:59.620491 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/0/tests/1_kselftest-futex'
186 10:53:08.598912 Running '/usr/bin/git checkout kernelci.org
187 10:53:08.742563 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
188 10:53:08.743274 uuid=8077707_1.5.2.3.5 testdef=None
189 10:53:08.743445 end: 1.5.2.3.5 git-repo-action (duration 00:00:09) [common]
191 10:53:08.743711 start: 1.5.2.3.6 test-overlay (timeout 00:09:36) [common]
192 10:53:08.744470 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 10:53:08.744733 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:36) [common]
195 10:53:08.745691 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 10:53:08.745952 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:36) [common]
198 10:53:08.746946 runner path: /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/0/tests/1_kselftest-futex test_uuid 8077707_1.5.2.3.5
199 10:53:08.747041 BOARD='asus-C436FA-Flip-hatch'
200 10:53:08.747113 BRANCH='cip'
201 10:53:08.747179 SKIPFILE='skipfile-lkft.yaml'
202 10:53:08.747242 TESTPROG_URL='None'
203 10:53:08.747306 TST_CASENAME=''
204 10:53:08.747367 TST_CMDFILES='futex'
205 10:53:08.747507 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 10:53:08.747743 Creating lava-test-runner.conf files
208 10:53:08.747814 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077707/lava-overlay-1dhhdejr/lava-8077707/0 for stage 0
209 10:53:08.747901 - 0_timesync-off
210 10:53:08.747972 - 1_kselftest-futex
211 10:53:08.748066 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
212 10:53:08.748163 start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
213 10:53:16.350734 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
214 10:53:16.350905 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:29) [common]
215 10:53:16.351017 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 10:53:16.351130 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
217 10:53:16.351231 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
218 10:53:16.455822 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 10:53:16.456175 start: 1.5.4 extract-modules (timeout 00:09:29) [common]
220 10:53:16.456297 extracting modules file /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077707/extract-nfsrootfs-jwowlhi2
221 10:53:16.460780 extracting modules file /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077707/extract-overlay-ramdisk-lws_e6xr/ramdisk
222 10:53:16.464934 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 10:53:16.465063 start: 1.5.5 apply-overlay-tftp (timeout 00:09:29) [common]
224 10:53:16.465162 [common] Applying overlay to NFS
225 10:53:16.465239 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077707/compress-overlay-gvb60njm/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8077707/extract-nfsrootfs-jwowlhi2
226 10:53:16.963479 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 10:53:16.963693 start: 1.5.6 configure-preseed-file (timeout 00:09:28) [common]
228 10:53:16.963815 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 10:53:16.963913 start: 1.5.7 compress-ramdisk (timeout 00:09:28) [common]
230 10:53:16.964002 Building ramdisk /var/lib/lava/dispatcher/tmp/8077707/extract-overlay-ramdisk-lws_e6xr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8077707/extract-overlay-ramdisk-lws_e6xr/ramdisk
231 10:53:16.999234 >> 24546 blocks
232 10:53:17.481925 rename /var/lib/lava/dispatcher/tmp/8077707/extract-overlay-ramdisk-lws_e6xr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/ramdisk/ramdisk.cpio.gz
233 10:53:17.482330 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 10:53:17.482465 start: 1.5.8 prepare-kernel (timeout 00:09:28) [common]
235 10:53:17.482575 start: 1.5.8.1 prepare-fit (timeout 00:09:28) [common]
236 10:53:17.482678 No mkimage arch provided, not using FIT.
237 10:53:17.482778 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 10:53:17.482870 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 10:53:17.482976 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
240 10:53:17.483079 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:28) [common]
241 10:53:17.483163 No LXC device requested
242 10:53:17.483254 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 10:53:17.483351 start: 1.7 deploy-device-env (timeout 00:09:28) [common]
244 10:53:17.483442 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 10:53:17.483516 Checking files for TFTP limit of 4294967296 bytes.
246 10:53:17.483917 end: 1 tftp-deploy (duration 00:00:32) [common]
247 10:53:17.484029 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 10:53:17.484127 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 10:53:17.484265 substitutions:
250 10:53:17.484344 - {DTB}: None
251 10:53:17.484419 - {INITRD}: 8077707/tftp-deploy-kpc_ws_f/ramdisk/ramdisk.cpio.gz
252 10:53:17.484485 - {KERNEL}: 8077707/tftp-deploy-kpc_ws_f/kernel/bzImage
253 10:53:17.484551 - {LAVA_MAC}: None
254 10:53:17.484615 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8077707/extract-nfsrootfs-jwowlhi2
255 10:53:17.484678 - {NFS_SERVER_IP}: 192.168.201.1
256 10:53:17.484739 - {PRESEED_CONFIG}: None
257 10:53:17.484803 - {PRESEED_LOCAL}: None
258 10:53:17.484863 - {RAMDISK}: 8077707/tftp-deploy-kpc_ws_f/ramdisk/ramdisk.cpio.gz
259 10:53:17.484924 - {ROOT_PART}: None
260 10:53:17.484985 - {ROOT}: None
261 10:53:17.485044 - {SERVER_IP}: 192.168.201.1
262 10:53:17.485105 - {TEE}: None
263 10:53:17.485166 Parsed boot commands:
264 10:53:17.485224 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 10:53:17.485389 Parsed boot commands: tftpboot 192.168.201.1 8077707/tftp-deploy-kpc_ws_f/kernel/bzImage 8077707/tftp-deploy-kpc_ws_f/kernel/cmdline 8077707/tftp-deploy-kpc_ws_f/ramdisk/ramdisk.cpio.gz
266 10:53:17.485487 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 10:53:17.485586 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 10:53:17.485688 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 10:53:17.485787 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 10:53:17.485865 Not connected, no need to disconnect.
271 10:53:17.485949 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 10:53:17.486039 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 10:53:17.486114 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
274 10:53:17.488955 Setting prompt string to ['lava-test: # ']
275 10:53:17.489285 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 10:53:17.489398 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 10:53:17.489507 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 10:53:17.489606 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 10:53:17.489809 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
280 10:53:17.509820 >> Command sent successfully.
281 10:53:17.512095 Returned 0 in 0 seconds
282 10:53:17.612880 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 10:53:17.613217 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 10:53:17.613338 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 10:53:17.613433 Setting prompt string to 'Starting depthcharge on Helios...'
287 10:53:17.613512 Changing prompt to 'Starting depthcharge on Helios...'
288 10:53:17.613590 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 10:53:17.613879 [Enter `^Ec?' for help]
290 10:53:24.698031
291 10:53:24.698198
292 10:53:24.707860 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 10:53:24.711611 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 10:53:24.718076 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 10:53:24.721470 CPU: AES supported, TXT NOT supported, VT supported
296 10:53:24.727900 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 10:53:24.731642 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 10:53:24.737987 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 10:53:24.741640 VBOOT: Loading verstage.
300 10:53:24.744536 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 10:53:24.751035 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 10:53:24.758071 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 10:53:24.758178 CBFS @ c08000 size 3f8000
304 10:53:24.764284 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 10:53:24.767571 CBFS: Locating 'fallback/verstage'
306 10:53:24.771172 CBFS: Found @ offset 10fb80 size 1072c
307 10:53:24.775213
308 10:53:24.775296
309 10:53:24.784789 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 10:53:24.799085 Probing TPM: . done!
311 10:53:24.802759 TPM ready after 0 ms
312 10:53:24.805668 Connected to device vid:did:rid of 1ae0:0028:00
313 10:53:24.816140 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 10:53:24.819692 Initialized TPM device CR50 revision 0
315 10:53:24.860529 tlcl_send_startup: Startup return code is 0
316 10:53:24.860646 TPM: setup succeeded
317 10:53:24.873287 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 10:53:24.877675 Chrome EC: UHEPI supported
319 10:53:24.880474 Phase 1
320 10:53:24.884157 FMAP: area GBB found @ c05000 (12288 bytes)
321 10:53:24.890543 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 10:53:24.893535 Phase 2
323 10:53:24.893618 Phase 3
324 10:53:24.896876 FMAP: area GBB found @ c05000 (12288 bytes)
325 10:53:24.903194 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 10:53:24.910189 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 10:53:24.913080 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 10:53:24.920038 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 10:53:24.935908 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 10:53:24.938821 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 10:53:24.945626 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 10:53:24.949934 Phase 4
333 10:53:24.953466 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 10:53:24.959894 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 10:53:25.139708 VB2:vb2_rsa_verify_digest() Digest check failed!
336 10:53:25.146046 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 10:53:25.146149 Saving nvdata
338 10:53:25.149117 Reboot requested (10020007)
339 10:53:25.152675 board_reset() called!
340 10:53:25.152758 full_reset() called!
341 10:53:29.665349
342 10:53:29.665501
343 10:53:29.675519 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 10:53:29.678601 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 10:53:29.684943 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 10:53:29.688447 CPU: AES supported, TXT NOT supported, VT supported
347 10:53:29.695004 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 10:53:29.701305 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 10:53:29.704877 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 10:53:29.708089 VBOOT: Loading verstage.
351 10:53:29.714318 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 10:53:29.717681 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 10:53:29.724652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 10:53:29.724739 CBFS @ c08000 size 3f8000
355 10:53:29.730880 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 10:53:29.734452 CBFS: Locating 'fallback/verstage'
357 10:53:29.740671 CBFS: Found @ offset 10fb80 size 1072c
358 10:53:29.740763
359 10:53:29.740843
360 10:53:29.750511 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 10:53:29.766344 Probing TPM: . done!
362 10:53:29.769942 TPM ready after 0 ms
363 10:53:29.773230 Connected to device vid:did:rid of 1ae0:0028:00
364 10:53:29.783435 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
365 10:53:29.786878 Initialized TPM device CR50 revision 0
366 10:53:29.827689 tlcl_send_startup: Startup return code is 0
367 10:53:29.827818 TPM: setup succeeded
368 10:53:29.840802 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 10:53:29.844318 Chrome EC: UHEPI supported
370 10:53:29.847250 Phase 1
371 10:53:29.850750 FMAP: area GBB found @ c05000 (12288 bytes)
372 10:53:29.857193 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 10:53:29.864269 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 10:53:29.867147 Recovery requested (1009000e)
375 10:53:29.873370 Saving nvdata
376 10:53:29.879509 tlcl_extend: response is 0
377 10:53:29.887824 tlcl_extend: response is 0
378 10:53:29.894818 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 10:53:29.898087 CBFS @ c08000 size 3f8000
380 10:53:29.904851 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 10:53:29.908584 CBFS: Locating 'fallback/romstage'
382 10:53:29.911408 CBFS: Found @ offset 80 size 145fc
383 10:53:29.914705 Accumulated console time in verstage 98 ms
384 10:53:29.914793
385 10:53:29.914862
386 10:53:29.927814 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 10:53:29.934665 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 10:53:29.937724 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 10:53:29.941002 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 10:53:29.947376 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 10:53:29.950809 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 10:53:29.954283 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 10:53:29.957653 TCO_STS: 0000 0000
394 10:53:29.960517 GEN_PMCON: e0015238 00000200
395 10:53:29.964069 GBLRST_CAUSE: 00000000 00000000
396 10:53:29.964145 prev_sleep_state 5
397 10:53:29.968287 Boot Count incremented to 38590
398 10:53:29.974597 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 10:53:29.977916 CBFS @ c08000 size 3f8000
400 10:53:29.984457 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 10:53:29.984538 CBFS: Locating 'fspm.bin'
402 10:53:29.991213 CBFS: Found @ offset 5ffc0 size 71000
403 10:53:29.994534 Chrome EC: UHEPI supported
404 10:53:30.000853 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 10:53:30.004755 Probing TPM: done!
406 10:53:30.011086 Connected to device vid:did:rid of 1ae0:0028:00
407 10:53:30.021239 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
408 10:53:30.026999 Initialized TPM device CR50 revision 0
409 10:53:30.036163 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 10:53:30.042548 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 10:53:30.046103
412 10:53:30.046184 MRC cache found, size 1948
413 10:53:30.048940 bootmode is set to: 2
414 10:53:30.052590 PRMRR disabled by config.
415 10:53:30.055840 SPD INDEX = 1
416 10:53:30.058832 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 10:53:30.062143 CBFS @ c08000 size 3f8000
418 10:53:30.068614 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 10:53:30.068708 CBFS: Locating 'spd.bin'
420 10:53:30.075367 CBFS: Found @ offset 5fb80 size 400
421 10:53:30.075474 SPD: module type is LPDDR3
422 10:53:30.078847 SPD: module part is
423 10:53:30.085496 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
424 10:53:30.088526 SPD: device width 4 bits, bus width 8 bits
425 10:53:30.091783 SPD: module size is 4096 MB (per channel)
426 10:53:30.095260 memory slot: 0 configuration done.
427 10:53:30.098469
428 10:53:30.101892 memory slot: 2 configuration done.
429 10:53:30.150801 CBMEM:
430 10:53:30.154118 IMD: root @ 99fff000 254 entries.
431 10:53:30.157001 IMD: root @ 99ffec00 62 entries.
432 10:53:30.160410 External stage cache:
433 10:53:30.163869 IMD: root @ 9abff000 254 entries.
434 10:53:30.166875 IMD: root @ 9abfec00 62 entries.
435 10:53:30.173898 Chrome EC: clear events_b mask to 0x0000000020004000
436 10:53:30.186435 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 10:53:30.199899 tlcl_write: response is 0
438 10:53:30.208866 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
439 10:53:30.215390 MRC: TPM MRC hash updated successfully.
440 10:53:30.215488 2 DIMMs found
441 10:53:30.218407 SMM Memory Map
442 10:53:30.221888 SMRAM : 0x9a000000 0x1000000
443 10:53:30.225325 Subregion 0: 0x9a000000 0xa00000
444 10:53:30.228602 Subregion 1: 0x9aa00000 0x200000
445 10:53:30.231761 Subregion 2: 0x9ac00000 0x400000
446 10:53:30.235176 top_of_ram = 0x9a000000
447 10:53:30.238509 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
448 10:53:30.244905 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
449 10:53:30.248169 MTRR Range: Start=ff000000 End=0 (Size 1000000)
450 10:53:30.254890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
451 10:53:30.258197 CBFS @ c08000 size 3f8000
452 10:53:30.261079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
453 10:53:30.264531 CBFS: Locating 'fallback/postcar'
454 10:53:30.271350 CBFS: Found @ offset 107000 size 4b44
455 10:53:30.277718 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
456 10:53:30.287457 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
457 10:53:30.291104 Processing 180 relocs. Offset value of 0x97c0c000
458 10:53:30.298644 Accumulated console time in romstage 286 ms
459 10:53:30.298738
460 10:53:30.298810
461 10:53:30.308632 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
462 10:53:30.315104 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 10:53:30.318665 CBFS @ c08000 size 3f8000
464 10:53:30.321872 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 10:53:30.328732 CBFS: Locating 'fallback/ramstage'
466 10:53:30.331834 CBFS: Found @ offset 43380 size 1b9e8
467 10:53:30.338425 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
468 10:53:30.370307 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
469 10:53:30.373708 Processing 3976 relocs. Offset value of 0x98db0000
470 10:53:30.380247 Accumulated console time in postcar 52 ms
471 10:53:30.380337
472 10:53:30.380411
473 10:53:30.390285 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
474 10:53:30.397065 FMAP: area RO_VPD found @ c00000 (16384 bytes)
475 10:53:30.399933 WARNING: RO_VPD is uninitialized or empty.
476 10:53:30.403325 FMAP: area RW_VPD found @ af8000 (8192 bytes)
477 10:53:30.410329 FMAP: area RW_VPD found @ af8000 (8192 bytes)
478 10:53:30.410423 Normal boot.
479 10:53:30.416425 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
480 10:53:30.419532 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
481 10:53:30.422952 CBFS @ c08000 size 3f8000
482 10:53:30.429585 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
483 10:53:30.432884 CBFS: Locating 'cpu_microcode_blob.bin'
484 10:53:30.436207 CBFS: Found @ offset 14700 size 2ec00
485 10:53:30.439564 microcode: sig=0x806ec pf=0x4 revision=0xc9
486 10:53:30.443123 Skip microcode update
487 10:53:30.449341 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
488 10:53:30.449429 CBFS @ c08000 size 3f8000
489 10:53:30.455744 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
490 10:53:30.459174 CBFS: Locating 'fsps.bin'
491 10:53:30.462530 CBFS: Found @ offset d1fc0 size 35000
492 10:53:30.488244 Detected 4 core, 8 thread CPU.
493 10:53:30.491698 Setting up SMI for CPU
494 10:53:30.494941 IED base = 0x9ac00000
495 10:53:30.495017 IED size = 0x00400000
496 10:53:30.498276
497 10:53:30.498352 Will perform SMM setup.
498 10:53:30.504755 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
499 10:53:30.511370 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
500 10:53:30.518194 Processing 16 relocs. Offset value of 0x00030000
501 10:53:30.518299 Attempting to start 7 APs
502 10:53:30.524379 Waiting for 10ms after sending INIT.
503 10:53:30.538434 Waiting for 1st SIPI to complete...done.
504 10:53:30.538527 AP: slot 6 apic_id 7.
505 10:53:30.541336 AP: slot 3 apic_id 6.
506 10:53:30.544751 Waiting for 2nd SIPI to complete...done.
507 10:53:30.548396 AP: slot 2 apic_id 1.
508 10:53:30.551298 AP: slot 4 apic_id 2.
509 10:53:30.551382 AP: slot 1 apic_id 3.
510 10:53:30.554831 AP: slot 7 apic_id 4.
511 10:53:30.557676 AP: slot 5 apic_id 5.
512 10:53:30.564605 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
513 10:53:30.570900 Processing 13 relocs. Offset value of 0x00038000
514 10:53:30.577905 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
515 10:53:30.580888 Installing SMM handler to 0x9a000000
516 10:53:30.587759 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
517 10:53:30.594085 Processing 658 relocs. Offset value of 0x9a010000
518 10:53:30.600852 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
519 10:53:30.603759 Processing 13 relocs. Offset value of 0x9a008000
520 10:53:30.610534 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
521 10:53:30.617500 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
522 10:53:30.623852 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
523 10:53:30.627148 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
524 10:53:30.634045 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
525 10:53:30.640647 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
526 10:53:30.647268 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
527 10:53:30.653666 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
528 10:53:30.656856 Clearing SMI status registers
529 10:53:30.656953 SMI_STS: PM1
530 10:53:30.660389 PM1_STS: PWRBTN
531 10:53:30.660477 TCO_STS: SECOND_TO
532 10:53:30.663203 New SMBASE 0x9a000000
533 10:53:30.666715 In relocation handler: CPU 0
534 10:53:30.670146 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
535 10:53:30.676514 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 10:53:30.676606 Relocation complete.
537 10:53:30.680126 New SMBASE 0x99fff800
538 10:53:30.683119 In relocation handler: CPU 2
539 10:53:30.686614 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
540 10:53:30.692769 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 10:53:30.692852 Relocation complete.
542 10:53:30.696197 New SMBASE 0x99fff400
543 10:53:30.699485 In relocation handler: CPU 3
544 10:53:30.702884 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
545 10:53:30.706335 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 10:53:30.709846 Relocation complete.
547 10:53:30.713237 New SMBASE 0x99ffe800
548 10:53:30.716372 In relocation handler: CPU 6
549 10:53:30.719319 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
550 10:53:30.722768 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 10:53:30.725704 Relocation complete.
552 10:53:30.729042 New SMBASE 0x99ffec00
553 10:53:30.732434 In relocation handler: CPU 5
554 10:53:30.735813 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
555 10:53:30.739216 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 10:53:30.742109 Relocation complete.
557 10:53:30.745452 New SMBASE 0x99ffe400
558 10:53:30.748879 In relocation handler: CPU 7
559 10:53:30.752520 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
560 10:53:30.755353 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 10:53:30.759156 Relocation complete.
562 10:53:30.762054 New SMBASE 0x99fff000
563 10:53:30.765474 In relocation handler: CPU 4
564 10:53:30.768435 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
565 10:53:30.771877 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 10:53:30.775344 Relocation complete.
567 10:53:30.778224 New SMBASE 0x99fffc00
568 10:53:30.781751 In relocation handler: CPU 1
569 10:53:30.785126 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
570 10:53:30.788583 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 10:53:30.791930 Relocation complete.
572 10:53:30.794903 Initializing CPU #0
573 10:53:30.798144 CPU: vendor Intel device 806ec
574 10:53:30.801593 CPU: family 06, model 8e, stepping 0c
575 10:53:30.805047 Clearing out pending MCEs
576 10:53:30.805140 Setting up local APIC...
577 10:53:30.807914 apic_id: 0x00 done.
578 10:53:30.811382 Turbo is available but hidden
579 10:53:30.814699 Turbo is available and visible
580 10:53:30.818026 VMX status: enabled
581 10:53:30.821367 IA32_FEATURE_CONTROL status: locked
582 10:53:30.821450 Skip microcode update
583 10:53:30.824789 CPU #0 initialized
584 10:53:30.827746 Initializing CPU #2
585 10:53:30.827826 Initializing CPU #7
586 10:53:30.830973 Initializing CPU #5
587 10:53:30.834390 CPU: vendor Intel device 806ec
588 10:53:30.837620 CPU: family 06, model 8e, stepping 0c
589 10:53:30.840963 CPU: vendor Intel device 806ec
590 10:53:30.844239 CPU: family 06, model 8e, stepping 0c
591 10:53:30.847754 Clearing out pending MCEs
592 10:53:30.851024 Clearing out pending MCEs
593 10:53:30.851102 Setting up local APIC...
594 10:53:30.854399 Initializing CPU #3
595 10:53:30.857402 Initializing CPU #6
596 10:53:30.860664 CPU: vendor Intel device 806ec
597 10:53:30.864014 CPU: family 06, model 8e, stepping 0c
598 10:53:30.867507 CPU: vendor Intel device 806ec
599 10:53:30.870471 CPU: family 06, model 8e, stepping 0c
600 10:53:30.874014 Clearing out pending MCEs
601 10:53:30.874092 Initializing CPU #1
602 10:53:30.877614 Initializing CPU #4
603 10:53:30.880576 CPU: vendor Intel device 806ec
604 10:53:30.883983 CPU: family 06, model 8e, stepping 0c
605 10:53:30.887399 CPU: vendor Intel device 806ec
606 10:53:30.890282 CPU: family 06, model 8e, stepping 0c
607 10:53:30.893592 Clearing out pending MCEs
608 10:53:30.896913 Clearing out pending MCEs
609 10:53:30.897000 Setting up local APIC...
610 10:53:30.900546 CPU: vendor Intel device 806ec
611 10:53:30.903755 CPU: family 06, model 8e, stepping 0c
612 10:53:30.907051 Clearing out pending MCEs
613 10:53:30.910507 Clearing out pending MCEs
614 10:53:30.914077 Setting up local APIC...
615 10:53:30.916687 Setting up local APIC...
616 10:53:30.916771 apic_id: 0x06 done.
617 10:53:30.920184 Setting up local APIC...
618 10:53:30.923438 Setting up local APIC...
619 10:53:30.923533 apic_id: 0x03 done.
620 10:53:30.926915 apic_id: 0x02 done.
621 10:53:30.930082 VMX status: enabled
622 10:53:30.930162 VMX status: enabled
623 10:53:30.933241 IA32_FEATURE_CONTROL status: locked
624 10:53:30.936587 IA32_FEATURE_CONTROL status: locked
625 10:53:30.939922
626 10:53:30.940006 Skip microcode update
627 10:53:30.943382 Skip microcode update
628 10:53:30.943465 CPU #1 initialized
629 10:53:30.946733 CPU #4 initialized
630 10:53:30.950001 apic_id: 0x01 done.
631 10:53:30.950088 Setting up local APIC...
632 10:53:30.953379 apic_id: 0x07 done.
633 10:53:30.956296 VMX status: enabled
634 10:53:30.956380 apic_id: 0x04 done.
635 10:53:30.959749 apic_id: 0x05 done.
636 10:53:30.963091 VMX status: enabled
637 10:53:30.963183 VMX status: enabled
638 10:53:30.966170 IA32_FEATURE_CONTROL status: locked
639 10:53:30.969764 IA32_FEATURE_CONTROL status: locked
640 10:53:30.973248 Skip microcode update
641 10:53:30.976101 Skip microcode update
642 10:53:30.976184 CPU #7 initialized
643 10:53:30.979503 CPU #5 initialized
644 10:53:30.982439 IA32_FEATURE_CONTROL status: locked
645 10:53:30.986076 VMX status: enabled
646 10:53:30.986178 Skip microcode update
647 10:53:30.992387 IA32_FEATURE_CONTROL status: locked
648 10:53:30.992476 CPU #3 initialized
649 10:53:30.995777 Skip microcode update
650 10:53:30.995860 VMX status: enabled
651 10:53:30.999159 CPU #6 initialized
652 10:53:31.002371 IA32_FEATURE_CONTROL status: locked
653 10:53:31.005952 Skip microcode update
654 10:53:31.006048 CPU #2 initialized
655 10:53:31.012317 bsp_do_flight_plan done after 463 msecs.
656 10:53:31.015380 CPU: frequency set to 4200 MHz
657 10:53:31.015460 Enabling SMIs.
658 10:53:31.018781 Locking SMM.
659 10:53:31.032337 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
660 10:53:31.035598 CBFS @ c08000 size 3f8000
661 10:53:31.042380 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
662 10:53:31.042475 CBFS: Locating 'vbt.bin'
663 10:53:31.045240 CBFS: Found @ offset 5f5c0 size 499
664 10:53:31.048594
665 10:53:31.052138 Found a VBT of 4608 bytes after decompression
666 10:53:31.235462 Display FSP Version Info HOB
667 10:53:31.238709 Reference Code - CPU = 9.0.1e.30
668 10:53:31.242283 uCode Version = 0.0.0.ca
669 10:53:31.245538 TXT ACM version = ff.ff.ff.ffff
670 10:53:31.248495 Display FSP Version Info HOB
671 10:53:31.251860 Reference Code - ME = 9.0.1e.30
672 10:53:31.255270 MEBx version = 0.0.0.0
673 10:53:31.258206 ME Firmware Version = Consumer SKU
674 10:53:31.261870 Display FSP Version Info HOB
675 10:53:31.265229 Reference Code - CML PCH = 9.0.1e.30
676 10:53:31.268560 PCH-CRID Status = Disabled
677 10:53:31.271387 PCH-CRID Original Value = ff.ff.ff.ffff
678 10:53:31.274463 PCH-CRID New Value = ff.ff.ff.ffff
679 10:53:31.277803 OPROM - RST - RAID = ff.ff.ff.ffff
680 10:53:31.281233 ChipsetInit Base Version = ff.ff.ff.ffff
681 10:53:31.287646 ChipsetInit Oem Version = ff.ff.ff.ffff
682 10:53:31.287733 Display FSP Version Info HOB
683 10:53:31.294017 Reference Code - SA - System Agent = 9.0.1e.30
684 10:53:31.297376 Reference Code - MRC = 0.7.1.6c
685 10:53:31.301063 SA - PCIe Version = 9.0.1e.30
686 10:53:31.304081 SA-CRID Status = Disabled
687 10:53:31.307437 SA-CRID Original Value = 0.0.0.c
688 10:53:31.307530 SA-CRID New Value = 0.0.0.c
689 10:53:31.310733 OPROM - VBIOS = ff.ff.ff.ffff
690 10:53:31.314124 RTC Init
691 10:53:31.317655 Set power on after power failure.
692 10:53:31.317743 Disabling Deep S3
693 10:53:31.321267 Disabling Deep S3
694 10:53:31.324033 Disabling Deep S4
695 10:53:31.324123 Disabling Deep S4
696 10:53:31.327334 Disabling Deep S5
697 10:53:31.327421 Disabling Deep S5
698 10:53:31.334009 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
699 10:53:31.337506 Enumerating buses...
700 10:53:31.340523 Show all devs... Before device enumeration.
701 10:53:31.343738 Root Device: enabled 1
702 10:53:31.347298 CPU_CLUSTER: 0: enabled 1
703 10:53:31.347388 DOMAIN: 0000: enabled 1
704 10:53:31.350075 APIC: 00: enabled 1
705 10:53:31.353348 PCI: 00:00.0: enabled 1
706 10:53:31.353435 PCI: 00:02.0: enabled 1
707 10:53:31.356657
708 10:53:31.356744 PCI: 00:04.0: enabled 0
709 10:53:31.359937 PCI: 00:05.0: enabled 0
710 10:53:31.363343 PCI: 00:12.0: enabled 1
711 10:53:31.363434 PCI: 00:12.5: enabled 0
712 10:53:31.366824 PCI: 00:12.6: enabled 0
713 10:53:31.369649 PCI: 00:14.0: enabled 1
714 10:53:31.373196 PCI: 00:14.1: enabled 0
715 10:53:31.373277 PCI: 00:14.3: enabled 1
716 10:53:31.376581 PCI: 00:14.5: enabled 0
717 10:53:31.379553 PCI: 00:15.0: enabled 1
718 10:53:31.383030 PCI: 00:15.1: enabled 1
719 10:53:31.383111 PCI: 00:15.2: enabled 0
720 10:53:31.386474 PCI: 00:15.3: enabled 0
721 10:53:31.389378 PCI: 00:16.0: enabled 1
722 10:53:31.393018 PCI: 00:16.1: enabled 0
723 10:53:31.393094 PCI: 00:16.2: enabled 0
724 10:53:31.396414 PCI: 00:16.3: enabled 0
725 10:53:31.399343 PCI: 00:16.4: enabled 0
726 10:53:31.402608 PCI: 00:16.5: enabled 0
727 10:53:31.402697 PCI: 00:17.0: enabled 1
728 10:53:31.405808 PCI: 00:19.0: enabled 1
729 10:53:31.409145 PCI: 00:19.1: enabled 0
730 10:53:31.412612 PCI: 00:19.2: enabled 0
731 10:53:31.412700 PCI: 00:1a.0: enabled 0
732 10:53:31.415501 PCI: 00:1c.0: enabled 0
733 10:53:31.418919 PCI: 00:1c.1: enabled 0
734 10:53:31.422449 PCI: 00:1c.2: enabled 0
735 10:53:31.422536 PCI: 00:1c.3: enabled 0
736 10:53:31.425447 PCI: 00:1c.4: enabled 0
737 10:53:31.428860 PCI: 00:1c.5: enabled 0
738 10:53:31.432504 PCI: 00:1c.6: enabled 0
739 10:53:31.432592 PCI: 00:1c.7: enabled 0
740 10:53:31.435088 PCI: 00:1d.0: enabled 1
741 10:53:31.438551 PCI: 00:1d.1: enabled 0
742 10:53:31.441552 PCI: 00:1d.2: enabled 0
743 10:53:31.441639 PCI: 00:1d.3: enabled 0
744 10:53:31.444829 PCI: 00:1d.4: enabled 0
745 10:53:31.448428 PCI: 00:1d.5: enabled 1
746 10:53:31.448516 PCI: 00:1e.0: enabled 1
747 10:53:31.451840
748 10:53:31.451932 PCI: 00:1e.1: enabled 0
749 10:53:31.454659 PCI: 00:1e.2: enabled 1
750 10:53:31.457856 PCI: 00:1e.3: enabled 1
751 10:53:31.457936 PCI: 00:1f.0: enabled 1
752 10:53:31.461677
753 10:53:31.461757 PCI: 00:1f.1: enabled 1
754 10:53:31.464471 PCI: 00:1f.2: enabled 1
755 10:53:31.468014 PCI: 00:1f.3: enabled 1
756 10:53:31.468093 PCI: 00:1f.4: enabled 1
757 10:53:31.471533
758 10:53:31.471640 PCI: 00:1f.5: enabled 1
759 10:53:31.474338 PCI: 00:1f.6: enabled 0
760 10:53:31.477825 USB0 port 0: enabled 1
761 10:53:31.477908 I2C: 00:15: enabled 1
762 10:53:31.480733 I2C: 00:5d: enabled 1
763 10:53:31.484276 GENERIC: 0.0: enabled 1
764 10:53:31.484362 I2C: 00:1a: enabled 1
765 10:53:31.487561 I2C: 00:38: enabled 1
766 10:53:31.490576 I2C: 00:39: enabled 1
767 10:53:31.494048 I2C: 00:3a: enabled 1
768 10:53:31.494127 I2C: 00:3b: enabled 1
769 10:53:31.497489 PCI: 00:00.0: enabled 1
770 10:53:31.500517 SPI: 00: enabled 1
771 10:53:31.500596 SPI: 01: enabled 1
772 10:53:31.503800 PNP: 0c09.0: enabled 1
773 10:53:31.507276 USB2 port 0: enabled 1
774 10:53:31.507359 USB2 port 1: enabled 1
775 10:53:31.510662 USB2 port 2: enabled 0
776 10:53:31.513454 USB2 port 3: enabled 0
777 10:53:31.513536 USB2 port 5: enabled 0
778 10:53:31.516924 USB2 port 6: enabled 1
779 10:53:31.520229 USB2 port 9: enabled 1
780 10:53:31.523384 USB3 port 0: enabled 1
781 10:53:31.523474 USB3 port 1: enabled 1
782 10:53:31.527049 USB3 port 2: enabled 1
783 10:53:31.529921 USB3 port 3: enabled 1
784 10:53:31.530000 USB3 port 4: enabled 0
785 10:53:31.533170 APIC: 03: enabled 1
786 10:53:31.536585 APIC: 01: enabled 1
787 10:53:31.536668 APIC: 06: enabled 1
788 10:53:31.539876 APIC: 02: enabled 1
789 10:53:31.542946 APIC: 05: enabled 1
790 10:53:31.543024 APIC: 07: enabled 1
791 10:53:31.546105 APIC: 04: enabled 1
792 10:53:31.546179 Compare with tree...
793 10:53:31.549500
794 10:53:31.549580 Root Device: enabled 1
795 10:53:31.553041 CPU_CLUSTER: 0: enabled 1
796 10:53:31.556406 APIC: 00: enabled 1
797 10:53:31.556503 APIC: 03: enabled 1
798 10:53:31.559698 APIC: 01: enabled 1
799 10:53:31.563258 APIC: 06: enabled 1
800 10:53:31.563360 APIC: 02: enabled 1
801 10:53:31.565955 APIC: 05: enabled 1
802 10:53:31.569398 APIC: 07: enabled 1
803 10:53:31.572335 APIC: 04: enabled 1
804 10:53:31.572417 DOMAIN: 0000: enabled 1
805 10:53:31.575625 PCI: 00:00.0: enabled 1
806 10:53:31.578909 PCI: 00:02.0: enabled 1
807 10:53:31.582424 PCI: 00:04.0: enabled 0
808 10:53:31.585312 PCI: 00:05.0: enabled 0
809 10:53:31.585405 PCI: 00:12.0: enabled 1
810 10:53:31.588847 PCI: 00:12.5: enabled 0
811 10:53:31.592341 PCI: 00:12.6: enabled 0
812 10:53:31.595309 PCI: 00:14.0: enabled 1
813 10:53:31.598699 USB0 port 0: enabled 1
814 10:53:31.598782 USB2 port 0: enabled 1
815 10:53:31.602028 USB2 port 1: enabled 1
816 10:53:31.605387 USB2 port 2: enabled 0
817 10:53:31.608989 USB2 port 3: enabled 0
818 10:53:31.611637 USB2 port 5: enabled 0
819 10:53:31.611718 USB2 port 6: enabled 1
820 10:53:31.615177
821 10:53:31.615267 USB2 port 9: enabled 1
822 10:53:31.618402 USB3 port 0: enabled 1
823 10:53:31.621769 USB3 port 1: enabled 1
824 10:53:31.625318 USB3 port 2: enabled 1
825 10:53:31.628112 USB3 port 3: enabled 1
826 10:53:31.628223 USB3 port 4: enabled 0
827 10:53:31.631431 PCI: 00:14.1: enabled 0
828 10:53:31.634903 PCI: 00:14.3: enabled 1
829 10:53:31.638254 PCI: 00:14.5: enabled 0
830 10:53:31.641122 PCI: 00:15.0: enabled 1
831 10:53:31.641217 I2C: 00:15: enabled 1
832 10:53:31.644778 PCI: 00:15.1: enabled 1
833 10:53:31.647951 I2C: 00:5d: enabled 1
834 10:53:31.651149 GENERIC: 0.0: enabled 1
835 10:53:31.654349 PCI: 00:15.2: enabled 0
836 10:53:31.654435 PCI: 00:15.3: enabled 0
837 10:53:31.657830
838 10:53:31.657923 PCI: 00:16.0: enabled 1
839 10:53:31.661009 PCI: 00:16.1: enabled 0
840 10:53:31.664330 PCI: 00:16.2: enabled 0
841 10:53:31.667305 PCI: 00:16.3: enabled 0
842 10:53:31.670833 PCI: 00:16.4: enabled 0
843 10:53:31.670937 PCI: 00:16.5: enabled 0
844 10:53:31.674362 PCI: 00:17.0: enabled 1
845 10:53:31.677620 PCI: 00:19.0: enabled 1
846 10:53:31.680564 I2C: 00:1a: enabled 1
847 10:53:31.680651 I2C: 00:38: enabled 1
848 10:53:31.684245 I2C: 00:39: enabled 1
849 10:53:31.687070 I2C: 00:3a: enabled 1
850 10:53:31.690586 I2C: 00:3b: enabled 1
851 10:53:31.693501 PCI: 00:19.1: enabled 0
852 10:53:31.693587 PCI: 00:19.2: enabled 0
853 10:53:31.696879 PCI: 00:1a.0: enabled 0
854 10:53:31.700288 PCI: 00:1c.0: enabled 0
855 10:53:31.703281 PCI: 00:1c.1: enabled 0
856 10:53:31.706727 PCI: 00:1c.2: enabled 0
857 10:53:31.706808 PCI: 00:1c.3: enabled 0
858 10:53:31.710115 PCI: 00:1c.4: enabled 0
859 10:53:31.713458 PCI: 00:1c.5: enabled 0
860 10:53:31.716235 PCI: 00:1c.6: enabled 0
861 10:53:31.719651 PCI: 00:1c.7: enabled 0
862 10:53:31.719735 PCI: 00:1d.0: enabled 1
863 10:53:31.723183 PCI: 00:1d.1: enabled 0
864 10:53:31.726459 PCI: 00:1d.2: enabled 0
865 10:53:31.729378 PCI: 00:1d.3: enabled 0
866 10:53:31.732732 PCI: 00:1d.4: enabled 0
867 10:53:31.732815 PCI: 00:1d.5: enabled 1
868 10:53:31.736162 PCI: 00:00.0: enabled 1
869 10:53:31.739555 PCI: 00:1e.0: enabled 1
870 10:53:31.742864 PCI: 00:1e.1: enabled 0
871 10:53:31.745697 PCI: 00:1e.2: enabled 1
872 10:53:31.745778 SPI: 00: enabled 1
873 10:53:31.749045 PCI: 00:1e.3: enabled 1
874 10:53:31.752459 SPI: 01: enabled 1
875 10:53:31.755455 PCI: 00:1f.0: enabled 1
876 10:53:31.755536 PNP: 0c09.0: enabled 1
877 10:53:31.758933
878 10:53:31.759013 PCI: 00:1f.1: enabled 1
879 10:53:31.762283 PCI: 00:1f.2: enabled 1
880 10:53:31.765636 PCI: 00:1f.3: enabled 1
881 10:53:31.768877 PCI: 00:1f.4: enabled 1
882 10:53:31.771995 PCI: 00:1f.5: enabled 1
883 10:53:31.772074 PCI: 00:1f.6: enabled 0
884 10:53:31.775298 Root Device scanning...
885 10:53:31.778659 scan_static_bus for Root Device
886 10:53:31.781726 CPU_CLUSTER: 0 enabled
887 10:53:31.784909 DOMAIN: 0000 enabled
888 10:53:31.784987 DOMAIN: 0000 scanning...
889 10:53:31.788351 PCI: pci_scan_bus for bus 00
890 10:53:31.791250 PCI: 00:00.0 [8086/0000] ops
891 10:53:31.794722 PCI: 00:00.0 [8086/9b61] enabled
892 10:53:31.798140 PCI: 00:02.0 [8086/0000] bus ops
893 10:53:31.801599 PCI: 00:02.0 [8086/9b41] enabled
894 10:53:31.804449 PCI: 00:04.0 [8086/1903] disabled
895 10:53:31.807901 PCI: 00:08.0 [8086/1911] enabled
896 10:53:31.810805 PCI: 00:12.0 [8086/02f9] enabled
897 10:53:31.814610 PCI: 00:14.0 [8086/0000] bus ops
898 10:53:31.817836 PCI: 00:14.0 [8086/02ed] enabled
899 10:53:31.820625 PCI: 00:14.2 [8086/02ef] enabled
900 10:53:31.824065 PCI: 00:14.3 [8086/02f0] enabled
901 10:53:31.827329 PCI: 00:15.0 [8086/0000] bus ops
902 10:53:31.830910 PCI: 00:15.0 [8086/02e8] enabled
903 10:53:31.833856 PCI: 00:15.1 [8086/0000] bus ops
904 10:53:31.837117
905 10:53:31.837199 PCI: 00:15.1 [8086/02e9] enabled
906 10:53:31.840591
907 10:53:31.840698 PCI: 00:16.0 [8086/0000] ops
908 10:53:31.843897 PCI: 00:16.0 [8086/02e0] enabled
909 10:53:31.847387 PCI: 00:17.0 [8086/0000] ops
910 10:53:31.850234 PCI: 00:17.0 [8086/02d3] enabled
911 10:53:31.853721 PCI: 00:19.0 [8086/0000] bus ops
912 10:53:31.857043 PCI: 00:19.0 [8086/02c5] enabled
913 10:53:31.860434 PCI: 00:1d.0 [8086/0000] bus ops
914 10:53:31.863435 PCI: 00:1d.0 [8086/02b0] enabled
915 10:53:31.869854 PCI: Static device PCI: 00:1d.5 not found, disabling it.
916 10:53:31.873274 PCI: 00:1e.0 [8086/0000] ops
917 10:53:31.876346 PCI: 00:1e.0 [8086/02a8] enabled
918 10:53:31.879647 PCI: 00:1e.2 [8086/0000] bus ops
919 10:53:31.883127 PCI: 00:1e.2 [8086/02aa] enabled
920 10:53:31.886530 PCI: 00:1e.3 [8086/0000] bus ops
921 10:53:31.889563 PCI: 00:1e.3 [8086/02ab] enabled
922 10:53:31.893050 PCI: 00:1f.0 [8086/0000] bus ops
923 10:53:31.895939 PCI: 00:1f.0 [8086/0284] enabled
924 10:53:31.902456 PCI: Static device PCI: 00:1f.1 not found, disabling it.
925 10:53:31.909370 PCI: Static device PCI: 00:1f.2 not found, disabling it.
926 10:53:31.912277 PCI: 00:1f.3 [8086/0000] bus ops
927 10:53:31.915503 PCI: 00:1f.3 [8086/02c8] enabled
928 10:53:31.918922 PCI: 00:1f.4 [8086/0000] bus ops
929 10:53:31.922338 PCI: 00:1f.4 [8086/02a3] enabled
930 10:53:31.925823 PCI: 00:1f.5 [8086/0000] bus ops
931 10:53:31.928501 PCI: 00:1f.5 [8086/02a4] enabled
932 10:53:31.932054 PCI: Leftover static devices:
933 10:53:31.932135 PCI: 00:05.0
934 10:53:31.935357 PCI: 00:12.5
935 10:53:31.935434 PCI: 00:12.6
936 10:53:31.935499 PCI: 00:14.1
937 10:53:31.938367 PCI: 00:14.5
938 10:53:31.938445 PCI: 00:15.2
939 10:53:31.941647 PCI: 00:15.3
940 10:53:31.941723 PCI: 00:16.1
941 10:53:31.941796 PCI: 00:16.2
942 10:53:31.945126 PCI: 00:16.3
943 10:53:31.945215 PCI: 00:16.4
944 10:53:31.948587 PCI: 00:16.5
945 10:53:31.948674 PCI: 00:19.1
946 10:53:31.948743 PCI: 00:19.2
947 10:53:31.951446
948 10:53:31.951534 PCI: 00:1a.0
949 10:53:31.951605 PCI: 00:1c.0
950 10:53:31.954875 PCI: 00:1c.1
951 10:53:31.954964 PCI: 00:1c.2
952 10:53:31.958407 PCI: 00:1c.3
953 10:53:31.958487 PCI: 00:1c.4
954 10:53:31.958555 PCI: 00:1c.5
955 10:53:31.961609 PCI: 00:1c.6
956 10:53:31.961685 PCI: 00:1c.7
957 10:53:31.964469 PCI: 00:1d.1
958 10:53:31.964557 PCI: 00:1d.2
959 10:53:31.967894 PCI: 00:1d.3
960 10:53:31.967974 PCI: 00:1d.4
961 10:53:31.968044 PCI: 00:1d.5
962 10:53:31.971124 PCI: 00:1e.1
963 10:53:31.971202 PCI: 00:1f.1
964 10:53:31.974637 PCI: 00:1f.2
965 10:53:31.974728 PCI: 00:1f.6
966 10:53:31.977902 PCI: Check your devicetree.cb.
967 10:53:31.981351 PCI: 00:02.0 scanning...
968 10:53:31.984059 scan_generic_bus for PCI: 00:02.0
969 10:53:31.987765 scan_generic_bus for PCI: 00:02.0 done
970 10:53:31.994063 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
971 10:53:31.997664 PCI: 00:14.0 scanning...
972 10:53:32.000880 scan_static_bus for PCI: 00:14.0
973 10:53:32.000996 USB0 port 0 enabled
974 10:53:32.003771 USB0 port 0 scanning...
975 10:53:32.007277 scan_static_bus for USB0 port 0
976 10:53:32.010804 USB2 port 0 enabled
977 10:53:32.010893 USB2 port 1 enabled
978 10:53:32.013650 USB2 port 2 disabled
979 10:53:32.016932 USB2 port 3 disabled
980 10:53:32.017020 USB2 port 5 disabled
981 10:53:32.020328 USB2 port 6 enabled
982 10:53:32.023846 USB2 port 9 enabled
983 10:53:32.023933 USB3 port 0 enabled
984 10:53:32.026685 USB3 port 1 enabled
985 10:53:32.026773 USB3 port 2 enabled
986 10:53:32.030116 USB3 port 3 enabled
987 10:53:32.033518 USB3 port 4 disabled
988 10:53:32.033605 USB2 port 0 scanning...
989 10:53:32.036897 scan_static_bus for USB2 port 0
990 10:53:32.043682 scan_static_bus for USB2 port 0 done
991 10:53:32.047089 scan_bus: scanning of bus USB2 port 0 took 9712 usecs
992 10:53:32.049894 USB2 port 1 scanning...
993 10:53:32.053400 scan_static_bus for USB2 port 1
994 10:53:32.056821 scan_static_bus for USB2 port 1 done
995 10:53:32.062972 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
996 10:53:32.066301 USB2 port 6 scanning...
997 10:53:32.069762 scan_static_bus for USB2 port 6
998 10:53:32.072854 scan_static_bus for USB2 port 6 done
999 10:53:32.075791 scan_bus: scanning of bus USB2 port 6 took 9712 usecs
1000 10:53:32.079226 USB2 port 9 scanning...
1001 10:53:32.082784 scan_static_bus for USB2 port 9
1002 10:53:32.086064 scan_static_bus for USB2 port 9 done
1003 10:53:32.092402 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
1004 10:53:32.095767 USB3 port 0 scanning...
1005 10:53:32.099046 scan_static_bus for USB3 port 0
1006 10:53:32.102500 scan_static_bus for USB3 port 0 done
1007 10:53:32.108860 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
1008 10:53:32.108947 USB3 port 1 scanning...
1009 10:53:32.111756 scan_static_bus for USB3 port 1
1010 10:53:32.118827 scan_static_bus for USB3 port 1 done
1011 10:53:32.121928 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
1012 10:53:32.124767 USB3 port 2 scanning...
1013 10:53:32.128497 scan_static_bus for USB3 port 2
1014 10:53:32.131490 scan_static_bus for USB3 port 2 done
1015 10:53:32.138272 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
1016 10:53:32.141657 USB3 port 3 scanning...
1017 10:53:32.144422 scan_static_bus for USB3 port 3
1018 10:53:32.147906 scan_static_bus for USB3 port 3 done
1019 10:53:32.151372 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
1020 10:53:32.157881 scan_static_bus for USB0 port 0 done
1021 10:53:32.161042 scan_bus: scanning of bus USB0 port 0 took 155445 usecs
1022 10:53:32.164437 scan_static_bus for PCI: 00:14.0 done
1023 10:53:32.170676 scan_bus: scanning of bus PCI: 00:14.0 took 173073 usecs
1024 10:53:32.174038 PCI: 00:15.0 scanning...
1025 10:53:32.177251 scan_generic_bus for PCI: 00:15.0
1026 10:53:32.180899 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1027 10:53:32.183648 scan_generic_bus for PCI: 00:15.0 done
1028 10:53:32.187085
1029 10:53:32.190626 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
1030 10:53:32.193487 PCI: 00:15.1 scanning...
1031 10:53:32.197075 scan_generic_bus for PCI: 00:15.1
1032 10:53:32.199992 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1033 10:53:32.206898 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1034 10:53:32.209842 scan_generic_bus for PCI: 00:15.1 done
1035 10:53:32.216237 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
1036 10:53:32.216329 PCI: 00:19.0 scanning...
1037 10:53:32.219727 scan_generic_bus for PCI: 00:19.0
1038 10:53:32.226525 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1039 10:53:32.229827 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1040 10:53:32.232581 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1041 10:53:32.236022 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1042 10:53:32.242454 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1043 10:53:32.245934 scan_generic_bus for PCI: 00:19.0 done
1044 10:53:32.252722 scan_bus: scanning of bus PCI: 00:19.0 took 30755 usecs
1045 10:53:32.252808 PCI: 00:1d.0 scanning...
1046 10:53:32.259008 do_pci_scan_bridge for PCI: 00:1d.0
1047 10:53:32.259097 PCI: pci_scan_bus for bus 01
1048 10:53:32.262422 PCI: 01:00.0 [1c5c/1327] enabled
1049 10:53:32.265771
1050 10:53:32.268777 Enabling Common Clock Configuration
1051 10:53:32.272658 L1 Sub-State supported from root port 29
1052 10:53:32.275539 L1 Sub-State Support = 0xf
1053 10:53:32.278761 CommonModeRestoreTime = 0x28
1054 10:53:32.282121 Power On Value = 0x16, Power On Scale = 0x0
1055 10:53:32.285624 ASPM: Enabled L1
1056 10:53:32.288443 scan_bus: scanning of bus PCI: 00:1d.0 took 32805 usecs
1057 10:53:32.291931 PCI: 00:1e.2 scanning...
1058 10:53:32.294875 scan_generic_bus for PCI: 00:1e.2
1059 10:53:32.298438 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1060 10:53:32.304646 scan_generic_bus for PCI: 00:1e.2 done
1061 10:53:32.308070 scan_bus: scanning of bus PCI: 00:1e.2 took 13993 usecs
1062 10:53:32.311556 PCI: 00:1e.3 scanning...
1063 10:53:32.314559 scan_generic_bus for PCI: 00:1e.3
1064 10:53:32.317923 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1065 10:53:32.321409 scan_generic_bus for PCI: 00:1e.3 done
1066 10:53:32.327462 scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
1067 10:53:32.330897 PCI: 00:1f.0 scanning...
1068 10:53:32.334358 scan_static_bus for PCI: 00:1f.0
1069 10:53:32.337651 PNP: 0c09.0 enabled
1070 10:53:32.341147 scan_static_bus for PCI: 00:1f.0 done
1071 10:53:32.347329 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1072 10:53:32.347429 PCI: 00:1f.3 scanning...
1073 10:53:32.354128 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1074 10:53:32.356994 PCI: 00:1f.4 scanning...
1075 10:53:32.360579 scan_generic_bus for PCI: 00:1f.4
1076 10:53:32.363916 scan_generic_bus for PCI: 00:1f.4 done
1077 10:53:32.370106 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1078 10:53:32.373505 PCI: 00:1f.5 scanning...
1079 10:53:32.377016 scan_generic_bus for PCI: 00:1f.5
1080 10:53:32.380086 scan_generic_bus for PCI: 00:1f.5 done
1081 10:53:32.386624 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1082 10:53:32.389914 scan_bus: scanning of bus DOMAIN: 0000 took 605255 usecs
1083 10:53:32.396255 scan_static_bus for Root Device done
1084 10:53:32.399815 scan_bus: scanning of bus Root Device took 625133 usecs
1085 10:53:32.402727 done
1086 10:53:32.402813 Chrome EC: UHEPI supported
1087 10:53:32.405649
1088 10:53:32.409195 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1089 10:53:32.416055 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1090 10:53:32.422465 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1091 10:53:32.428705 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1092 10:53:32.432125 SPI flash protection: WPSW=0 SRP0=0
1093 10:53:32.439030 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1094 10:53:32.441993 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1095 10:53:32.445172 found VGA at PCI: 00:02.0
1096 10:53:32.448454 Setting up VGA for PCI: 00:02.0
1097 10:53:32.455339 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1098 10:53:32.458756 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1099 10:53:32.461424 Allocating resources...
1100 10:53:32.464726 Reading resources...
1101 10:53:32.468093 Root Device read_resources bus 0 link: 0
1102 10:53:32.471584 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1103 10:53:32.477924 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1104 10:53:32.481103 DOMAIN: 0000 read_resources bus 0 link: 0
1105 10:53:32.489034 PCI: 00:14.0 read_resources bus 0 link: 0
1106 10:53:32.492401 USB0 port 0 read_resources bus 0 link: 0
1107 10:53:32.500612 USB0 port 0 read_resources bus 0 link: 0 done
1108 10:53:32.504171 PCI: 00:14.0 read_resources bus 0 link: 0 done
1109 10:53:32.511093 PCI: 00:15.0 read_resources bus 1 link: 0
1110 10:53:32.514466 PCI: 00:15.0 read_resources bus 1 link: 0 done
1111 10:53:32.521357 PCI: 00:15.1 read_resources bus 2 link: 0
1112 10:53:32.524380 PCI: 00:15.1 read_resources bus 2 link: 0 done
1113 10:53:32.532142 PCI: 00:19.0 read_resources bus 3 link: 0
1114 10:53:32.538311 PCI: 00:19.0 read_resources bus 3 link: 0 done
1115 10:53:32.541694 PCI: 00:1d.0 read_resources bus 1 link: 0
1116 10:53:32.548670 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1117 10:53:32.551325 PCI: 00:1e.2 read_resources bus 4 link: 0
1118 10:53:32.558125 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1119 10:53:32.561054 PCI: 00:1e.3 read_resources bus 5 link: 0
1120 10:53:32.567843 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1121 10:53:32.571364 PCI: 00:1f.0 read_resources bus 0 link: 0
1122 10:53:32.578049 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1123 10:53:32.584523 DOMAIN: 0000 read_resources bus 0 link: 0 done
1124 10:53:32.587953 Root Device read_resources bus 0 link: 0 done
1125 10:53:32.591223 Done reading resources.
1126 10:53:32.597456 Show resources in subtree (Root Device)...After reading.
1127 10:53:32.600897 Root Device child on link 0 CPU_CLUSTER: 0
1128 10:53:32.603826 CPU_CLUSTER: 0 child on link 0 APIC: 00
1129 10:53:32.607326 APIC: 00
1130 10:53:32.607410 APIC: 03
1131 10:53:32.607483 APIC: 01
1132 10:53:32.610720
1133 10:53:32.610806 APIC: 06
1134 10:53:32.610875 APIC: 02
1135 10:53:32.613601 APIC: 05
1136 10:53:32.613687 APIC: 07
1137 10:53:32.613753 APIC: 04
1138 10:53:32.620546 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1139 10:53:32.671717 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1140 10:53:32.673111 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1141 10:53:32.673202 PCI: 00:00.0
1142 10:53:32.673462 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1143 10:53:32.673729 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1144 10:53:32.673802 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1145 10:53:32.677035 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1146 10:53:32.687102 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1147 10:53:32.696644 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1148 10:53:32.706218 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1149 10:53:32.715823 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1150 10:53:32.726216 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1151 10:53:32.732432 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1152 10:53:32.742309 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1153 10:53:32.752087 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1154 10:53:32.761627 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1155 10:53:32.772011 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1156 10:53:32.781504 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1157 10:53:32.791121 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1158 10:53:32.791233 PCI: 00:02.0
1159 10:53:32.801562 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1160 10:53:32.811480 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1161 10:53:32.820620 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1162 10:53:32.824057 PCI: 00:04.0
1163 10:53:32.824137 PCI: 00:08.0
1164 10:53:32.833918 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 10:53:32.837310 PCI: 00:12.0
1166 10:53:32.846799 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 10:53:32.850184 PCI: 00:14.0 child on link 0 USB0 port 0
1168 10:53:32.860359 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1169 10:53:32.863162 USB0 port 0 child on link 0 USB2 port 0
1170 10:53:32.866628 USB2 port 0
1171 10:53:32.866715 USB2 port 1
1172 10:53:32.870638 USB2 port 2
1173 10:53:32.873377 USB2 port 3
1174 10:53:32.873462 USB2 port 5
1175 10:53:32.876146 USB2 port 6
1176 10:53:32.876241 USB2 port 9
1177 10:53:32.879388 USB3 port 0
1178 10:53:32.879472 USB3 port 1
1179 10:53:32.882903 USB3 port 2
1180 10:53:32.882996 USB3 port 3
1181 10:53:32.886161 USB3 port 4
1182 10:53:32.886259 PCI: 00:14.2
1183 10:53:32.896087 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1184 10:53:32.905655 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 10:53:32.909169 PCI: 00:14.3
1186 10:53:32.918322 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1187 10:53:32.921826 PCI: 00:15.0 child on link 0 I2C: 01:15
1188 10:53:32.931664 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 10:53:32.935133 I2C: 01:15
1190 10:53:32.937928 PCI: 00:15.1 child on link 0 I2C: 02:5d
1191 10:53:32.948299 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 10:53:32.951139 I2C: 02:5d
1193 10:53:32.951232 GENERIC: 0.0
1194 10:53:32.954650 PCI: 00:16.0
1195 10:53:32.964114 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 10:53:32.964210 PCI: 00:17.0
1197 10:53:32.973899 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1198 10:53:32.983682 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1199 10:53:32.990466 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1200 10:53:33.000161 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1201 10:53:33.007055 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1202 10:53:33.016378 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1203 10:53:33.019704 PCI: 00:19.0 child on link 0 I2C: 03:1a
1204 10:53:33.023123
1205 10:53:33.029451 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 10:53:33.032845
1207 10:53:33.032930 I2C: 03:1a
1208 10:53:33.033000 I2C: 03:38
1209 10:53:33.036308 I2C: 03:39
1210 10:53:33.036395 I2C: 03:3a
1211 10:53:33.039710 I2C: 03:3b
1212 10:53:33.043106 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1213 10:53:33.053008 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1214 10:53:33.062267 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1215 10:53:33.072555 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1216 10:53:33.072642 PCI: 01:00.0
1217 10:53:33.082277 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1218 10:53:33.085650 PCI: 00:1e.0
1219 10:53:33.095291 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1220 10:53:33.104986 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1221 10:53:33.108417 PCI: 00:1e.2 child on link 0 SPI: 00
1222 10:53:33.118092 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 10:53:33.121788 SPI: 00
1224 10:53:33.124543 PCI: 00:1e.3 child on link 0 SPI: 01
1225 10:53:33.134193 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 10:53:33.134287 SPI: 01
1227 10:53:33.137515
1228 10:53:33.141129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1229 10:53:33.147630 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1230 10:53:33.150535
1231 10:53:33.157035 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1232 10:53:33.160271 PNP: 0c09.0
1233 10:53:33.166902 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 10:53:33.170300 PCI: 00:1f.3
1235 10:53:33.180050 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 10:53:33.190278 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 10:53:33.193070 PCI: 00:1f.4
1238 10:53:33.199551 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1239 10:53:33.209863 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1240 10:53:33.212916 PCI: 00:1f.5
1241 10:53:33.222740 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1242 10:53:33.229171 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1243 10:53:33.235658 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1244 10:53:33.242588 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1245 10:53:33.245725 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1246 10:53:33.248499 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1247 10:53:33.252062 PCI: 00:17.0 18 * [0x60 - 0x67] io
1248 10:53:33.255432 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1249 10:53:33.261600 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1250 10:53:33.268295 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1251 10:53:33.278019 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1252 10:53:33.284935 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1253 10:53:33.291004 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1254 10:53:33.294489 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1255 10:53:33.304114 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 10:53:33.307742 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1257 10:53:33.313852 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1258 10:53:33.317188 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1259 10:53:33.323622 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1260 10:53:33.327423 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1261 10:53:33.333514 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1262 10:53:33.336918 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1263 10:53:33.343158 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1264 10:53:33.346648 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1265 10:53:33.353256 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1266 10:53:33.356097 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1267 10:53:33.363090 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1268 10:53:33.366248 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1269 10:53:33.372511 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1270 10:53:33.375893 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1271 10:53:33.382224 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1272 10:53:33.385822 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1273 10:53:33.392254 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1274 10:53:33.395662 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1275 10:53:33.402411 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1276 10:53:33.405323 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1277 10:53:33.411884 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1278 10:53:33.415251 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1279 10:53:33.425009 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1280 10:53:33.428015 avoid_fixed_resources: DOMAIN: 0000
1281 10:53:33.434506 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1282 10:53:33.438062 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1283 10:53:33.447845 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1284 10:53:33.454390 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1285 10:53:33.460641 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1286 10:53:33.470321 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1287 10:53:33.477174 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1288 10:53:33.483583 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1289 10:53:33.487016
1290 10:53:33.493052 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1291 10:53:33.499810 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1292 10:53:33.506197 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1293 10:53:33.516034 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1294 10:53:33.516124 Setting resources...
1295 10:53:33.522874 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1296 10:53:33.525676 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1297 10:53:33.532921 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1298 10:53:33.535858 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1299 10:53:33.538773 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1300 10:53:33.545534 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1301 10:53:33.551753 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1302 10:53:33.558709 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1303 10:53:33.565154 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1304 10:53:33.571261 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1305 10:53:33.575198 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1306 10:53:33.581440 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1307 10:53:33.584748 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1308 10:53:33.591684 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1309 10:53:33.594450 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1310 10:53:33.601073 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1311 10:53:33.604530 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1312 10:53:33.610562 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1313 10:53:33.613917 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1314 10:53:33.620143 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1315 10:53:33.623776 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1316 10:53:33.629949 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1317 10:53:33.633564 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1318 10:53:33.639723 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1319 10:53:33.643298 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1320 10:53:33.650055 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1321 10:53:33.652885 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1322 10:53:33.659370 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1323 10:53:33.662893 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1324 10:53:33.669214 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1325 10:53:33.672380 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1326 10:53:33.678946 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1327 10:53:33.685708 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1328 10:53:33.691801 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1329 10:53:33.698418 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1330 10:53:33.701710
1331 10:53:33.708338 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1332 10:53:33.711810 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1333 10:53:33.721247 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1334 10:53:33.724717 Root Device assign_resources, bus 0 link: 0
1335 10:53:33.727780 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 10:53:33.738201 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1337 10:53:33.744279 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1338 10:53:33.754552 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1339 10:53:33.760777 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1340 10:53:33.770782 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1341 10:53:33.777252 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1342 10:53:33.783869 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 10:53:33.786732 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 10:53:33.796782 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1345 10:53:33.803389 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1346 10:53:33.812871 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1347 10:53:33.819837 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1348 10:53:33.826069 PCI: 00:15.0 assign_resources, bus 1 link: 0
1349 10:53:33.829436 PCI: 00:15.0 assign_resources, bus 1 link: 0
1350 10:53:33.839199 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1351 10:53:33.842482 PCI: 00:15.1 assign_resources, bus 2 link: 0
1352 10:53:33.849329 PCI: 00:15.1 assign_resources, bus 2 link: 0
1353 10:53:33.855374 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1354 10:53:33.865280 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1355 10:53:33.871850 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1356 10:53:33.878460 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1357 10:53:33.888159 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1358 10:53:33.894636 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1359 10:53:33.901418 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1360 10:53:33.911515 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1361 10:53:33.914612 PCI: 00:19.0 assign_resources, bus 3 link: 0
1362 10:53:33.920832 PCI: 00:19.0 assign_resources, bus 3 link: 0
1363 10:53:33.927460 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1364 10:53:33.937166 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1365 10:53:33.947314 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1366 10:53:33.950540 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1367 10:53:33.960337 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1368 10:53:33.963426 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 10:53:33.973335 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1370 10:53:33.980073 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1371 10:53:33.983298 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1372 10:53:33.986075
1373 10:53:33.989913 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1374 10:53:33.999539 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1375 10:53:34.002642 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1376 10:53:34.006043 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1377 10:53:34.012468 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 10:53:34.015620 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 10:53:34.022592 LPC: Trying to open IO window from 800 size 1ff
1380 10:53:34.028494 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1381 10:53:34.038333 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1382 10:53:34.045225 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1383 10:53:34.055148 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1384 10:53:34.058322 DOMAIN: 0000 assign_resources, bus 0 link: 0
1385 10:53:34.064828 Root Device assign_resources, bus 0 link: 0
1386 10:53:34.064912 Done setting resources.
1387 10:53:34.071217 Show resources in subtree (Root Device)...After assigning values.
1388 10:53:34.077748 Root Device child on link 0 CPU_CLUSTER: 0
1389 10:53:34.080952 CPU_CLUSTER: 0 child on link 0 APIC: 00
1390 10:53:34.081038 APIC: 00
1391 10:53:34.084349 APIC: 03
1392 10:53:34.084431 APIC: 01
1393 10:53:34.087741 APIC: 06
1394 10:53:34.087824 APIC: 02
1395 10:53:34.087892 APIC: 05
1396 10:53:34.091115 APIC: 07
1397 10:53:34.091196 APIC: 04
1398 10:53:34.097883 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1399 10:53:34.104301 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1400 10:53:34.117036 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1401 10:53:34.117129 PCI: 00:00.0
1402 10:53:34.127243 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1403 10:53:34.136662 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1404 10:53:34.146513 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1405 10:53:34.156127 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1406 10:53:34.165957 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1407 10:53:34.175632 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1408 10:53:34.185555 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1409 10:53:34.192281 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1410 10:53:34.201741 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1411 10:53:34.211541 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1412 10:53:34.221644 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1413 10:53:34.231278 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1414 10:53:34.241545 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1415 10:53:34.251149 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1416 10:53:34.261023 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1417 10:53:34.267139 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1418 10:53:34.270498 PCI: 00:02.0
1419 10:53:34.280574 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1420 10:53:34.289789 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1421 10:53:34.300037 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1422 10:53:34.303056 PCI: 00:04.0
1423 10:53:34.303145 PCI: 00:08.0
1424 10:53:34.313205 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1425 10:53:34.316188 PCI: 00:12.0
1426 10:53:34.326121 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1427 10:53:34.329565 PCI: 00:14.0 child on link 0 USB0 port 0
1428 10:53:34.342056 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1429 10:53:34.345408 USB0 port 0 child on link 0 USB2 port 0
1430 10:53:34.345502 USB2 port 0
1431 10:53:34.348847 USB2 port 1
1432 10:53:34.352422 USB2 port 2
1433 10:53:34.352516 USB2 port 3
1434 10:53:34.355538 USB2 port 5
1435 10:53:34.355621 USB2 port 6
1436 10:53:34.358413 USB2 port 9
1437 10:53:34.358499 USB3 port 0
1438 10:53:34.361847 USB3 port 1
1439 10:53:34.361933 USB3 port 2
1440 10:53:34.364979 USB3 port 3
1441 10:53:34.365065 USB3 port 4
1442 10:53:34.368333 PCI: 00:14.2
1443 10:53:34.378620 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1444 10:53:34.388184 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1445 10:53:34.391340 PCI: 00:14.3
1446 10:53:34.401010 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1447 10:53:34.404546 PCI: 00:15.0 child on link 0 I2C: 01:15
1448 10:53:34.414600 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1449 10:53:34.417320 I2C: 01:15
1450 10:53:34.420516 PCI: 00:15.1 child on link 0 I2C: 02:5d
1451 10:53:34.430308 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1452 10:53:34.433675 I2C: 02:5d
1453 10:53:34.433757 GENERIC: 0.0
1454 10:53:34.437098 PCI: 00:16.0
1455 10:53:34.446780 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1456 10:53:34.446877 PCI: 00:17.0
1457 10:53:34.459638 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1458 10:53:34.469571 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1459 10:53:34.475892 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1460 10:53:34.485891 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1461 10:53:34.495705 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1462 10:53:34.505395 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1463 10:53:34.508696 PCI: 00:19.0 child on link 0 I2C: 03:1a
1464 10:53:34.512113
1465 10:53:34.521878 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1466 10:53:34.521983 I2C: 03:1a
1467 10:53:34.524925 I2C: 03:38
1468 10:53:34.525015 I2C: 03:39
1469 10:53:34.528651 I2C: 03:3a
1470 10:53:34.528740 I2C: 03:3b
1471 10:53:34.531316 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1472 10:53:34.541541 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1473 10:53:34.551334 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1474 10:53:34.564137 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1475 10:53:34.564236 PCI: 01:00.0
1476 10:53:34.574029 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1477 10:53:34.577399 PCI: 00:1e.0
1478 10:53:34.587167 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 10:53:34.596727 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1480 10:53:34.603600 PCI: 00:1e.2 child on link 0 SPI: 00
1481 10:53:34.613051 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1482 10:53:34.613159 SPI: 00
1483 10:53:34.616651 PCI: 00:1e.3 child on link 0 SPI: 01
1484 10:53:34.626129 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1485 10:53:34.629883 SPI: 01
1486 10:53:34.632695 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 10:53:34.642735 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 10:53:34.652600 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1489 10:53:34.652695 PNP: 0c09.0
1490 10:53:34.662291 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1491 10:53:34.662386 PCI: 00:1f.3
1492 10:53:34.672159 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1493 10:53:34.685338 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1494 10:53:34.685435 PCI: 00:1f.4
1495 10:53:34.695154 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1496 10:53:34.705311 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1497 10:53:34.705406 PCI: 00:1f.5
1498 10:53:34.718105 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1499 10:53:34.718206 Done allocating resources.
1500 10:53:34.724926 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1501 10:53:34.727734 Enabling resources...
1502 10:53:34.731033 PCI: 00:00.0 subsystem <- 8086/9b61
1503 10:53:34.734403 PCI: 00:00.0 cmd <- 06
1504 10:53:34.737840 PCI: 00:02.0 subsystem <- 8086/9b41
1505 10:53:34.741056 PCI: 00:02.0 cmd <- 03
1506 10:53:34.744818 PCI: 00:08.0 cmd <- 06
1507 10:53:34.747368 PCI: 00:12.0 subsystem <- 8086/02f9
1508 10:53:34.750770 PCI: 00:12.0 cmd <- 02
1509 10:53:34.754167 PCI: 00:14.0 subsystem <- 8086/02ed
1510 10:53:34.757142 PCI: 00:14.0 cmd <- 02
1511 10:53:34.757241 PCI: 00:14.2 cmd <- 02
1512 10:53:34.763854 PCI: 00:14.3 subsystem <- 8086/02f0
1513 10:53:34.763936 PCI: 00:14.3 cmd <- 02
1514 10:53:34.767317 PCI: 00:15.0 subsystem <- 8086/02e8
1515 10:53:34.770886
1516 10:53:34.770977 PCI: 00:15.0 cmd <- 02
1517 10:53:34.774101 PCI: 00:15.1 subsystem <- 8086/02e9
1518 10:53:34.777308 PCI: 00:15.1 cmd <- 02
1519 10:53:34.780178 PCI: 00:16.0 subsystem <- 8086/02e0
1520 10:53:34.783614 PCI: 00:16.0 cmd <- 02
1521 10:53:34.786816 PCI: 00:17.0 subsystem <- 8086/02d3
1522 10:53:34.790171 PCI: 00:17.0 cmd <- 03
1523 10:53:34.793374 PCI: 00:19.0 subsystem <- 8086/02c5
1524 10:53:34.796605 PCI: 00:19.0 cmd <- 02
1525 10:53:34.799971 PCI: 00:1d.0 bridge ctrl <- 0013
1526 10:53:34.803343 PCI: 00:1d.0 subsystem <- 8086/02b0
1527 10:53:34.806126 PCI: 00:1d.0 cmd <- 06
1528 10:53:34.809449 PCI: 00:1e.0 subsystem <- 8086/02a8
1529 10:53:34.812856 PCI: 00:1e.0 cmd <- 06
1530 10:53:34.816198 PCI: 00:1e.2 subsystem <- 8086/02aa
1531 10:53:34.819255 PCI: 00:1e.2 cmd <- 06
1532 10:53:34.822569 PCI: 00:1e.3 subsystem <- 8086/02ab
1533 10:53:34.825927 PCI: 00:1e.3 cmd <- 02
1534 10:53:34.829245 PCI: 00:1f.0 subsystem <- 8086/0284
1535 10:53:34.832775 PCI: 00:1f.0 cmd <- 407
1536 10:53:34.835617 PCI: 00:1f.3 subsystem <- 8086/02c8
1537 10:53:34.835704 PCI: 00:1f.3 cmd <- 02
1538 10:53:34.838674
1539 10:53:34.841912 PCI: 00:1f.4 subsystem <- 8086/02a3
1540 10:53:34.842005 PCI: 00:1f.4 cmd <- 03
1541 10:53:34.848693 PCI: 00:1f.5 subsystem <- 8086/02a4
1542 10:53:34.848779 PCI: 00:1f.5 cmd <- 406
1543 10:53:34.858829 PCI: 01:00.0 cmd <- 02
1544 10:53:34.863926 done.
1545 10:53:34.874063 ME: Version: 14.0.39.1367
1546 10:53:34.880348 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 9
1547 10:53:34.883590 Initializing devices...
1548 10:53:34.883677 Root Device init ...
1549 10:53:34.890146 Chrome EC: Set SMI mask to 0x0000000000000000
1550 10:53:34.893493 Chrome EC: clear events_b mask to 0x0000000000000000
1551 10:53:34.897041
1552 10:53:34.900267 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1553 10:53:34.906383 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1554 10:53:34.912893 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1555 10:53:34.916286 Chrome EC: Set WAKE mask to 0x0000000000000000
1556 10:53:34.922741 Root Device init finished in 35176 usecs
1557 10:53:34.922836 CPU_CLUSTER: 0 init ...
1558 10:53:34.926185
1559 10:53:34.929610 CPU_CLUSTER: 0 init finished in 2439 usecs
1560 10:53:34.934574 PCI: 00:00.0 init ...
1561 10:53:34.938137 CPU TDP: 15 Watts
1562 10:53:34.941039 CPU PL2 = 64 Watts
1563 10:53:34.944635 PCI: 00:00.0 init finished in 7070 usecs
1564 10:53:34.947402 PCI: 00:02.0 init ...
1565 10:53:34.950939 PCI: 00:02.0 init finished in 2253 usecs
1566 10:53:34.954219 PCI: 00:08.0 init ...
1567 10:53:34.957683 PCI: 00:08.0 init finished in 2251 usecs
1568 10:53:34.960625 PCI: 00:12.0 init ...
1569 10:53:34.963771 PCI: 00:12.0 init finished in 2252 usecs
1570 10:53:34.967263 PCI: 00:14.0 init ...
1571 10:53:34.970706 PCI: 00:14.0 init finished in 2252 usecs
1572 10:53:34.973514 PCI: 00:14.2 init ...
1573 10:53:34.976668 PCI: 00:14.2 init finished in 2253 usecs
1574 10:53:34.980119 PCI: 00:14.3 init ...
1575 10:53:34.983521 PCI: 00:14.3 init finished in 2270 usecs
1576 10:53:34.986992 PCI: 00:15.0 init ...
1577 10:53:34.990195 DW I2C bus 0 at 0xd121f000 (400 KHz)
1578 10:53:34.996942 PCI: 00:15.0 init finished in 5977 usecs
1579 10:53:34.997031 PCI: 00:15.1 init ...
1580 10:53:35.000391 DW I2C bus 1 at 0xd1220000 (400 KHz)
1581 10:53:35.003096
1582 10:53:35.006341 PCI: 00:15.1 init finished in 5970 usecs
1583 10:53:35.009696 PCI: 00:16.0 init ...
1584 10:53:35.013071 PCI: 00:16.0 init finished in 2253 usecs
1585 10:53:35.016070 PCI: 00:19.0 init ...
1586 10:53:35.019327 DW I2C bus 4 at 0xd1222000 (400 KHz)
1587 10:53:35.022687 PCI: 00:19.0 init finished in 5976 usecs
1588 10:53:35.026008 PCI: 00:1d.0 init ...
1589 10:53:35.029398 Initializing PCH PCIe bridge.
1590 10:53:35.032749 PCI: 00:1d.0 init finished in 5285 usecs
1591 10:53:35.036668 PCI: 00:1f.0 init ...
1592 10:53:35.039901 IOAPIC: Initializing IOAPIC at 0xfec00000
1593 10:53:35.046186 IOAPIC: Bootstrap Processor Local APIC = 0x00
1594 10:53:35.046276 IOAPIC: ID = 0x02
1595 10:53:35.049544 IOAPIC: Dumping registers
1596 10:53:35.052926 reg 0x0000: 0x02000000
1597 10:53:35.056338 reg 0x0001: 0x00770020
1598 10:53:35.059195 reg 0x0002: 0x00000000
1599 10:53:35.062599 PCI: 00:1f.0 init finished in 23541 usecs
1600 10:53:35.065897 PCI: 00:1f.4 init ...
1601 10:53:35.068783 PCI: 00:1f.4 init finished in 2263 usecs
1602 10:53:35.080694 PCI: 01:00.0 init ...
1603 10:53:35.083670 PCI: 01:00.0 init finished in 2253 usecs
1604 10:53:35.087997 PNP: 0c09.0 init ...
1605 10:53:35.091287 Google Chrome EC uptime: 11.068 seconds
1606 10:53:35.094672
1607 10:53:35.098090 Google Chrome AP resets since EC boot: 0
1608 10:53:35.101180 Google Chrome most recent AP reset causes:
1609 10:53:35.107870 Google Chrome EC reset flags at last EC boot: reset-pin
1610 10:53:35.111374 PNP: 0c09.0 init finished in 20572 usecs
1611 10:53:35.114141 Devices initialized
1612 10:53:35.117566 Show all devs... After init.
1613 10:53:35.117655 Root Device: enabled 1
1614 10:53:35.120698 CPU_CLUSTER: 0: enabled 1
1615 10:53:35.123873 DOMAIN: 0000: enabled 1
1616 10:53:35.127104 APIC: 00: enabled 1
1617 10:53:35.127192 PCI: 00:00.0: enabled 1
1618 10:53:35.130836 PCI: 00:02.0: enabled 1
1619 10:53:35.133754 PCI: 00:04.0: enabled 0
1620 10:53:35.133865 PCI: 00:05.0: enabled 0
1621 10:53:35.137026
1622 10:53:35.137114 PCI: 00:12.0: enabled 1
1623 10:53:35.140356 PCI: 00:12.5: enabled 0
1624 10:53:35.143987 PCI: 00:12.6: enabled 0
1625 10:53:35.144079 PCI: 00:14.0: enabled 1
1626 10:53:35.146599
1627 10:53:35.146687 PCI: 00:14.1: enabled 0
1628 10:53:35.149987 PCI: 00:14.3: enabled 1
1629 10:53:35.153135 PCI: 00:14.5: enabled 0
1630 10:53:35.153225 PCI: 00:15.0: enabled 1
1631 10:53:35.156574 PCI: 00:15.1: enabled 1
1632 10:53:35.160056 PCI: 00:15.2: enabled 0
1633 10:53:35.163385 PCI: 00:15.3: enabled 0
1634 10:53:35.163464 PCI: 00:16.0: enabled 1
1635 10:53:35.166759 PCI: 00:16.1: enabled 0
1636 10:53:35.169552 PCI: 00:16.2: enabled 0
1637 10:53:35.173108 PCI: 00:16.3: enabled 0
1638 10:53:35.173187 PCI: 00:16.4: enabled 0
1639 10:53:35.176219 PCI: 00:16.5: enabled 0
1640 10:53:35.179466 PCI: 00:17.0: enabled 1
1641 10:53:35.182768 PCI: 00:19.0: enabled 1
1642 10:53:35.182854 PCI: 00:19.1: enabled 0
1643 10:53:35.186097 PCI: 00:19.2: enabled 0
1644 10:53:35.189371 PCI: 00:1a.0: enabled 0
1645 10:53:35.192650 PCI: 00:1c.0: enabled 0
1646 10:53:35.192754 PCI: 00:1c.1: enabled 0
1647 10:53:35.195920 PCI: 00:1c.2: enabled 0
1648 10:53:35.199157 PCI: 00:1c.3: enabled 0
1649 10:53:35.202438 PCI: 00:1c.4: enabled 0
1650 10:53:35.202520 PCI: 00:1c.5: enabled 0
1651 10:53:35.205686 PCI: 00:1c.6: enabled 0
1652 10:53:35.209009 PCI: 00:1c.7: enabled 0
1653 10:53:35.212318 PCI: 00:1d.0: enabled 1
1654 10:53:35.212395 PCI: 00:1d.1: enabled 0
1655 10:53:35.215596 PCI: 00:1d.2: enabled 0
1656 10:53:35.218589 PCI: 00:1d.3: enabled 0
1657 10:53:35.221788 PCI: 00:1d.4: enabled 0
1658 10:53:35.221874 PCI: 00:1d.5: enabled 0
1659 10:53:35.225113 PCI: 00:1e.0: enabled 1
1660 10:53:35.228392 PCI: 00:1e.1: enabled 0
1661 10:53:35.232142 PCI: 00:1e.2: enabled 1
1662 10:53:35.232244 PCI: 00:1e.3: enabled 1
1663 10:53:35.235258 PCI: 00:1f.0: enabled 1
1664 10:53:35.238640 PCI: 00:1f.1: enabled 0
1665 10:53:35.238742 PCI: 00:1f.2: enabled 0
1666 10:53:35.241334
1667 10:53:35.241425 PCI: 00:1f.3: enabled 1
1668 10:53:35.244713 PCI: 00:1f.4: enabled 1
1669 10:53:35.248487 PCI: 00:1f.5: enabled 1
1670 10:53:35.248576 PCI: 00:1f.6: enabled 0
1671 10:53:35.251796
1672 10:53:35.251887 USB0 port 0: enabled 1
1673 10:53:35.254445 I2C: 01:15: enabled 1
1674 10:53:35.257824 I2C: 02:5d: enabled 1
1675 10:53:35.257908 GENERIC: 0.0: enabled 1
1676 10:53:35.261287 I2C: 03:1a: enabled 1
1677 10:53:35.264151 I2C: 03:38: enabled 1
1678 10:53:35.264232 I2C: 03:39: enabled 1
1679 10:53:35.267479 I2C: 03:3a: enabled 1
1680 10:53:35.270914 I2C: 03:3b: enabled 1
1681 10:53:35.270996 PCI: 00:00.0: enabled 1
1682 10:53:35.274400
1683 10:53:35.274489 SPI: 00: enabled 1
1684 10:53:35.277745 SPI: 01: enabled 1
1685 10:53:35.277832 PNP: 0c09.0: enabled 1
1686 10:53:35.281150 USB2 port 0: enabled 1
1687 10:53:35.284517 USB2 port 1: enabled 1
1688 10:53:35.287300 USB2 port 2: enabled 0
1689 10:53:35.287387 USB2 port 3: enabled 0
1690 10:53:35.290562 USB2 port 5: enabled 0
1691 10:53:35.293705 USB2 port 6: enabled 1
1692 10:53:35.293793 USB2 port 9: enabled 1
1693 10:53:35.297052 USB3 port 0: enabled 1
1694 10:53:35.300258 USB3 port 1: enabled 1
1695 10:53:35.303603 USB3 port 2: enabled 1
1696 10:53:35.303692 USB3 port 3: enabled 1
1697 10:53:35.306879 USB3 port 4: enabled 0
1698 10:53:35.310395 APIC: 03: enabled 1
1699 10:53:35.310497 APIC: 01: enabled 1
1700 10:53:35.313444 APIC: 06: enabled 1
1701 10:53:35.313532 APIC: 02: enabled 1
1702 10:53:35.316705 APIC: 05: enabled 1
1703 10:53:35.320115 APIC: 07: enabled 1
1704 10:53:35.320198 APIC: 04: enabled 1
1705 10:53:35.323300 PCI: 00:08.0: enabled 1
1706 10:53:35.326537 PCI: 00:14.2: enabled 1
1707 10:53:35.330119 PCI: 01:00.0: enabled 1
1708 10:53:35.333317 Disabling ACPI via APMC:
1709 10:53:35.333407 done.
1710 10:53:35.340144 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1711 10:53:35.343553 ELOG: NV offset 0xaf0000 size 0x4000
1712 10:53:35.349710 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1713 10:53:35.356446 ELOG: Event(17) added with size 13 at 2022-11-22 10:53:35 UTC
1714 10:53:35.362655 POST: Unexpected post code in previous boot: 0x25
1715 10:53:35.369202 ELOG: Event(A3) added with size 11 at 2022-11-22 10:53:35 UTC
1716 10:53:35.375658 ELOG: Event(A6) added with size 13 at 2022-11-22 10:53:35 UTC
1717 10:53:35.382534 ELOG: Event(92) added with size 9 at 2022-11-22 10:53:35 UTC
1718 10:53:35.389014 ELOG: Event(93) added with size 9 at 2022-11-22 10:53:35 UTC
1719 10:53:35.395150 ELOG: Event(9A) added with size 9 at 2022-11-22 10:53:35 UTC
1720 10:53:35.398517 ELOG: Event(9E) added with size 10 at 2022-11-22 10:53:35 UTC
1721 10:53:35.401760
1722 10:53:35.404973 ELOG: Event(16) added with size 11 at 2022-11-22 10:53:35 UTC
1723 10:53:35.408209 Erasing flash addr af0000 + 4 KiB
1724 10:53:35.479208 ELOG: Event(9F) added with size 14 at 2022-11-22 10:53:35 UTC
1725 10:53:35.485299 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 61
1726 10:53:35.492252 ELOG: Event(A1) added with size 10 at 2022-11-22 10:53:35 UTC
1727 10:53:35.498372 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1728 10:53:35.505537 ELOG: Event(A0) added with size 9 at 2022-11-22 10:53:35 UTC
1729 10:53:35.511832 elog_add_boot_reason: Logged dev mode boot
1730 10:53:35.511919 Finalize devices...
1731 10:53:35.515147 PCI: 00:17.0 final
1732 10:53:35.515236 Devices finalized
1733 10:53:35.521815 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1734 10:53:35.528363 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1735 10:53:35.531755 ME: HFSTS1 : 0x90000245
1736 10:53:35.535285 ME: HFSTS2 : 0x3B850126
1737 10:53:35.538477 ME: HFSTS3 : 0x00000020
1738 10:53:35.545100 ME: HFSTS4 : 0x00004800
1739 10:53:35.547812 ME: HFSTS5 : 0x00000000
1740 10:53:35.551310 ME: HFSTS6 : 0x40400006
1741 10:53:35.554909 ME: Manufacturing Mode : NO
1742 10:53:35.557986 ME: FW Partition Table : OK
1743 10:53:35.560856 ME: Bringup Loader Failure : NO
1744 10:53:35.564334 ME: Firmware Init Complete : YES
1745 10:53:35.567657 ME: Boot Options Present : NO
1746 10:53:35.571219 ME: Update In Progress : NO
1747 10:53:35.574586 ME: D0i3 Support : YES
1748 10:53:35.577489 ME: Low Power State Enabled : NO
1749 10:53:35.580808 ME: CPU Replaced : NO
1750 10:53:35.584196 ME: CPU Replacement Valid : YES
1751 10:53:35.587065 ME: Current Working State : 5
1752 10:53:35.590786 ME: Current Operation State : 1
1753 10:53:35.594089 ME: Current Operation Mode : 0
1754 10:53:35.596879 ME: Error Code : 0
1755 10:53:35.600298 ME: CPU Debug Disabled : YES
1756 10:53:35.603653 ME: TXT Support : NO
1757 10:53:35.610023 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1758 10:53:35.616769 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1759 10:53:35.616861 CBFS @ c08000 size 3f8000
1760 10:53:35.623031 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1761 10:53:35.626847 CBFS: Locating 'fallback/dsdt.aml'
1762 10:53:35.633218 CBFS: Found @ offset 10bb80 size 3fa5
1763 10:53:35.636309 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1764 10:53:35.639619 CBFS @ c08000 size 3f8000
1765 10:53:35.646064 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1766 10:53:35.649446 CBFS: Locating 'fallback/slic'
1767 10:53:35.652690 CBFS: 'fallback/slic' not found.
1768 10:53:35.655857 ACPI: Writing ACPI tables at 99b3e000.
1769 10:53:35.659292 ACPI: * FACS
1770 10:53:35.659380 ACPI: * DSDT
1771 10:53:35.662559
1772 10:53:35.665480 Ramoops buffer: 0x100000@0x99a3d000.
1773 10:53:35.668900 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1774 10:53:35.672267 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1775 10:53:35.676125 Google Chrome EC: version:
1776 10:53:35.679652 ro: helios_v2.0.2659-56403530b
1777 10:53:35.682888 rw: helios_v2.0.2849-c41de27e7d
1778 10:53:35.685697 running image: 1
1779 10:53:35.689467 ACPI: * FADT
1780 10:53:35.689560 SCI is IRQ9
1781 10:53:35.695590 ACPI: added table 1/32, length now 40
1782 10:53:35.695676 ACPI: * SSDT
1783 10:53:35.698923 Found 1 CPU(s) with 8 core(s) each.
1784 10:53:35.702388 Error: Could not locate 'wifi_sar' in VPD.
1785 10:53:35.708931 Checking CBFS for default SAR values
1786 10:53:35.712160 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 10:53:35.715523 CBFS @ c08000 size 3f8000
1788 10:53:35.722375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 10:53:35.725197 CBFS: Locating 'wifi_sar_defaults.hex'
1790 10:53:35.728553 CBFS: Found @ offset 5fac0 size 77
1791 10:53:35.731751 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1792 10:53:35.738200 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1793 10:53:35.741462 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1794 10:53:35.748130 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1795 10:53:35.751429 failed to find key in VPD: dsm_calib_r0_0
1796 10:53:35.761122 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1797 10:53:35.764708 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1798 10:53:35.771287 failed to find key in VPD: dsm_calib_r0_1
1799 10:53:35.777686 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1800 10:53:35.784439 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1801 10:53:35.787285 failed to find key in VPD: dsm_calib_r0_2
1802 10:53:35.797193 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1803 10:53:35.803912 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1804 10:53:35.807098 failed to find key in VPD: dsm_calib_r0_3
1805 10:53:35.817226 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1806 10:53:35.820091 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1807 10:53:35.826726 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1808 10:53:35.830119 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1809 10:53:35.833558 EC returned error result code 1
1810 10:53:35.836850 EC returned error result code 1
1811 10:53:35.840402 EC returned error result code 1
1812 10:53:35.847235 PS2K: Bad resp from EC. Vivaldi disabled!
1813 10:53:35.850495 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1814 10:53:35.856853 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1815 10:53:35.863414 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1816 10:53:35.866522 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1817 10:53:35.873253 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1818 10:53:35.879478 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1819 10:53:35.882862 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1820 10:53:35.889324 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1821 10:53:35.892506 ACPI: added table 2/32, length now 44
1822 10:53:35.896285 ACPI: * MCFG
1823 10:53:35.899460 ACPI: added table 3/32, length now 48
1824 10:53:35.902588 ACPI: * TPM2
1825 10:53:35.905692 TPM2 log created at 99a2d000
1826 10:53:35.908936 ACPI: added table 4/32, length now 52
1827 10:53:35.909019 ACPI: * MADT
1828 10:53:35.912183 SCI is IRQ9
1829 10:53:35.915407 ACPI: added table 5/32, length now 56
1830 10:53:35.915494 current = 99b43ac0
1831 10:53:35.918723 ACPI: * DMAR
1832 10:53:35.922229 ACPI: added table 6/32, length now 60
1833 10:53:35.925488 ACPI: * IGD OpRegion
1834 10:53:35.925576 GMA: Found VBT in CBFS
1835 10:53:35.928804 GMA: Found valid VBT in CBFS
1836 10:53:35.935007 ACPI: added table 7/32, length now 64
1837 10:53:35.935093 ACPI: * HPET
1838 10:53:35.938319 ACPI: added table 8/32, length now 68
1839 10:53:35.941730 ACPI: done.
1840 10:53:35.941817 ACPI tables: 31744 bytes.
1841 10:53:35.945140 smbios_write_tables: 99a2c000
1842 10:53:35.948428 EC returned error result code 3
1843 10:53:35.954800 Couldn't obtain OEM name from CBI
1844 10:53:35.954891 Create SMBIOS type 17
1845 10:53:35.958047 PCI: 00:00.0 (Intel Cannonlake)
1846 10:53:35.961557 PCI: 00:14.3 (Intel WiFi)
1847 10:53:35.964960 SMBIOS tables: 939 bytes.
1848 10:53:35.968055 Writing table forward entry at 0x00000500
1849 10:53:35.974285 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1850 10:53:35.977738 Writing coreboot table at 0x99b62000
1851 10:53:35.984050 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1852 10:53:35.987456 1. 0000000000001000-000000000009ffff: RAM
1853 10:53:35.994161 2. 00000000000a0000-00000000000fffff: RESERVED
1854 10:53:35.997449 3. 0000000000100000-0000000099a2bfff: RAM
1855 10:53:36.003911 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1856 10:53:36.007206 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1857 10:53:36.013241 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1858 10:53:36.019992 7. 000000009a000000-000000009f7fffff: RESERVED
1859 10:53:36.023314 8. 00000000e0000000-00000000efffffff: RESERVED
1860 10:53:36.030007 9. 00000000fc000000-00000000fc000fff: RESERVED
1861 10:53:36.033302 10. 00000000fe000000-00000000fe00ffff: RESERVED
1862 10:53:36.039654 11. 00000000fed10000-00000000fed17fff: RESERVED
1863 10:53:36.042853 12. 00000000fed80000-00000000fed83fff: RESERVED
1864 10:53:36.046310 13. 00000000fed90000-00000000fed91fff: RESERVED
1865 10:53:36.052757 14. 00000000feda0000-00000000feda1fff: RESERVED
1866 10:53:36.056000 15. 0000000100000000-000000045e7fffff: RAM
1867 10:53:36.062420 Graphics framebuffer located at 0xc0000000
1868 10:53:36.062506 Passing 5 GPIOs to payload:
1869 10:53:36.069284 NAME | PORT | POLARITY | VALUE
1870 10:53:36.075979 write protect | undefined | high | low
1871 10:53:36.078597 lid | undefined | high | high
1872 10:53:36.085534 power | undefined | high | low
1873 10:53:36.089071 oprom | undefined | high | low
1874 10:53:36.095136 EC in RW | 0x000000cb | high | low
1875 10:53:36.095223 Board ID: 4
1876 10:53:36.101752 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1877 10:53:36.105055 CBFS @ c08000 size 3f8000
1878 10:53:36.111724 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1879 10:53:36.115036 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1880 10:53:36.118238 coreboot table: 1492 bytes.
1881 10:53:36.121555 IMD ROOT 0. 99fff000 00001000
1882 10:53:36.124487 IMD SMALL 1. 99ffe000 00001000
1883 10:53:36.127774 FSP MEMORY 2. 99c4e000 003b0000
1884 10:53:36.131099 CONSOLE 3. 99c2e000 00020000
1885 10:53:36.134543 FMAP 4. 99c2d000 0000054e
1886 10:53:36.137550 TIME STAMP 5. 99c2c000 00000910
1887 10:53:36.140690 VBOOT WORK 6. 99c18000 00014000
1888 10:53:36.144226 MRC DATA 7. 99c16000 00001958
1889 10:53:36.147613 ROMSTG STCK 8. 99c15000 00001000
1890 10:53:36.151082 AFTER CAR 9. 99c0b000 0000a000
1891 10:53:36.154036
1892 10:53:36.154131 RAMSTAGE 10. 99baf000 0005c000
1893 10:53:36.157348
1894 10:53:36.160443 REFCODE 11. 99b7a000 00035000
1895 10:53:36.163826 SMM BACKUP 12. 99b6a000 00010000
1896 10:53:36.167304 COREBOOT 13. 99b62000 00008000
1897 10:53:36.170446 ACPI 14. 99b3e000 00024000
1898 10:53:36.173813 ACPI GNVS 15. 99b3d000 00001000
1899 10:53:36.176694 RAMOOPS 16. 99a3d000 00100000
1900 10:53:36.179998 TPM2 TCGLOG17. 99a2d000 00010000
1901 10:53:36.183440 SMBIOS 18. 99a2c000 00000800
1902 10:53:36.183526 IMD small region:
1903 10:53:36.186793 IMD ROOT 0. 99ffec00 00000400
1904 10:53:36.190090 FSP RUNTIME 1. 99ffebe0 00000004
1905 10:53:36.193020 EC HOSTEVENT 2. 99ffebc0 00000008
1906 10:53:36.196308
1907 10:53:36.199670 POWER STATE 3. 99ffeb80 00000040
1908 10:53:36.202848 ROMSTAGE 4. 99ffeb60 00000004
1909 10:53:36.206183 MEM INFO 5. 99ffe9a0 000001b9
1910 10:53:36.209434 VPD 6. 99ffe920 0000006c
1911 10:53:36.213051 MTRR: Physical address space:
1912 10:53:36.219398 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1913 10:53:36.222698 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1914 10:53:36.225965
1915 10:53:36.229285 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1916 10:53:36.236154 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1917 10:53:36.242406 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1918 10:53:36.249148 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1919 10:53:36.255667 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1920 10:53:36.258966 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 10:53:36.262363 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 10:53:36.265322
1923 10:53:36.268749 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 10:53:36.272204 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 10:53:36.275381 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 10:53:36.278651 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 10:53:36.281571
1928 10:53:36.284900 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 10:53:36.288289 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 10:53:36.291736 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 10:53:36.295234 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 10:53:36.301269 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 10:53:36.304488 call enable_fixed_mtrr()
1934 10:53:36.307725 CPU physical address size: 39 bits
1935 10:53:36.311154 MTRR: default type WB/UC MTRR counts: 6/8.
1936 10:53:36.314354 MTRR: WB selected as default type.
1937 10:53:36.320931 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1938 10:53:36.327538 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1939 10:53:36.334346 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1940 10:53:36.340565 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1941 10:53:36.347195 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1942 10:53:36.353911 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1943 10:53:36.357415 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 10:53:36.360231 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 10:53:36.366992 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 10:53:36.370245 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 10:53:36.373624 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 10:53:36.376865 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 10:53:36.383306 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 10:53:36.386756 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 10:53:36.390154 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 10:53:36.392993 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 10:53:36.399516 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 10:53:36.399604
1955 10:53:36.399674 MTRR check
1956 10:53:36.403026 Fixed MTRRs : Enabled
1957 10:53:36.406251 Variable MTRRs: Enabled
1958 10:53:36.406339
1959 10:53:36.409291 call enable_fixed_mtrr()
1960 10:53:36.412871 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1961 10:53:36.416105 CPU physical address size: 39 bits
1962 10:53:36.422269 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1963 10:53:36.425638 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 10:53:36.428804 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 10:53:36.435704 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 10:53:36.439197 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 10:53:36.441899 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 10:53:36.445172 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 10:53:36.451937 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 10:53:36.454877 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 10:53:36.458560 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 10:53:36.461954 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 10:53:36.468403 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 10:53:36.471235 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 10:53:36.474656 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 10:53:36.478054 call enable_fixed_mtrr()
1977 10:53:36.481385 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 10:53:36.484765 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 10:53:36.487753
1980 10:53:36.490992 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 10:53:36.494345 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 10:53:36.497426 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 10:53:36.504031 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 10:53:36.507411 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 10:53:36.510594 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 10:53:36.514200 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 10:53:36.517391 CPU physical address size: 39 bits
1988 10:53:36.520635 call enable_fixed_mtrr()
1989 10:53:36.527404 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 10:53:36.530155 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 10:53:36.533384 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 10:53:36.536740 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 10:53:36.540207 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 10:53:36.543338
1995 10:53:36.546812 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 10:53:36.550012 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 10:53:36.553446 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 10:53:36.560250 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 10:53:36.562852 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 10:53:36.566223 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 10:53:36.569348 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 10:53:36.576463 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 10:53:36.576551 call enable_fixed_mtrr()
2004 10:53:36.582619 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 10:53:36.586040 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 10:53:36.589342 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 10:53:36.592751 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 10:53:36.599561 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 10:53:36.602425 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 10:53:36.606027 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 10:53:36.609236 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 10:53:36.615466 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 10:53:36.618943 CPU physical address size: 39 bits
2014 10:53:36.622127 call enable_fixed_mtrr()
2015 10:53:36.622218 CBFS @ c08000 size 3f8000
2016 10:53:36.628816 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2017 10:53:36.632011 CBFS: Locating 'fallback/payload'
2018 10:53:36.635376 CPU physical address size: 39 bits
2019 10:53:36.638814 CPU physical address size: 39 bits
2020 10:53:36.642266 CBFS: Found @ offset 1c96c0 size 3f798
2021 10:53:36.645298
2022 10:53:36.648798 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 10:53:36.651450 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 10:53:36.654896 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 10:53:36.658407 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 10:53:36.661263
2027 10:53:36.664832 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 10:53:36.668225 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 10:53:36.671356 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 10:53:36.674322 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 10:53:36.677631
2032 10:53:36.680951 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 10:53:36.684277 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 10:53:36.687765 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 10:53:36.694624 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 10:53:36.694716 call enable_fixed_mtrr()
2037 10:53:36.700830 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 10:53:36.704259 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 10:53:36.707695 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 10:53:36.710464 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 10:53:36.717174 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 10:53:36.720739 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 10:53:36.723485 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 10:53:36.726954 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 10:53:36.733712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 10:53:36.737011 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 10:53:36.740403 CPU physical address size: 39 bits
2048 10:53:36.743651 call enable_fixed_mtrr()
2049 10:53:36.746496 Checking segment from ROM address 0xffdd16f8
2050 10:53:36.749984 CPU physical address size: 39 bits
2051 10:53:36.756432 Checking segment from ROM address 0xffdd1714
2052 10:53:36.760129 Loading segment from ROM address 0xffdd16f8
2053 10:53:36.763195 code (compression=0)
2054 10:53:36.769606 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2055 10:53:36.779292 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2056 10:53:36.782622 it's not compressed!
2057 10:53:36.873411 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2058 10:53:36.879885 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2059 10:53:36.883353 Loading segment from ROM address 0xffdd1714
2060 10:53:36.886698 Entry Point 0x30000000
2061 10:53:36.890130 Loaded segments
2062 10:53:36.895829 Finalizing chipset.
2063 10:53:36.899213 Finalizing SMM.
2064 10:53:36.901962 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2065 10:53:36.905334 mp_park_aps done after 0 msecs.
2066 10:53:36.911835 Jumping to boot code at 30000000(99b62000)
2067 10:53:36.918197 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2068 10:53:36.918297
2069 10:53:36.918384
2070 10:53:36.918465
2071 10:53:36.921734 Starting depthcharge on Helios...
2072 10:53:36.921826
2073 10:53:36.922182 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2074 10:53:36.922312 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2075 10:53:36.922406 Setting prompt string to ['hatch:']
2076 10:53:36.922489 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2077 10:53:36.931696 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2078 10:53:36.931781
2079 10:53:36.938228 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2080 10:53:36.938311
2081 10:53:36.944363 board_setup: Info: eMMC controller not present; skipping
2082 10:53:36.944456
2083 10:53:36.947807 New NVMe Controller 0x30053ac0 @ 00:1d:00
2084 10:53:36.947915
2085 10:53:36.954145 board_setup: Info: SDHCI controller not present; skipping
2086 10:53:36.954254
2087 10:53:36.960679 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2088 10:53:36.960771
2089 10:53:36.960843 Wipe memory regions:
2090 10:53:36.960910
2091 10:53:36.967252 [0x00000000001000, 0x000000000a0000)
2092 10:53:36.967337
2093 10:53:36.970614 [0x00000000100000, 0x00000030000000)
2094 10:53:36.970695
2095 10:53:37.037488 [0x00000030657430, 0x00000099a2c000)
2096 10:53:37.037606
2097 10:53:37.178994 [0x00000100000000, 0x0000045e800000)
2098 10:53:37.179129
2099 10:53:38.562373 R8152: Initializing
2100 10:53:38.562525
2101 10:53:38.565180 Version 9 (ocp_data = 6010)
2102 10:53:38.565289
2103 10:53:38.569675 R8152: Done initializing
2104 10:53:38.569759
2105 10:53:38.572999 Adding net device
2106 10:53:38.573079
2107 10:53:39.176913 R8152: Initializing
2108 10:53:39.177058
2109 10:53:39.180370 Version 6 (ocp_data = 5c30)
2110 10:53:39.180453
2111 10:53:39.183259 R8152: Done initializing
2112 10:53:39.183337
2113 10:53:39.190383 net_add_device: Attemp to include the same device
2114 10:53:39.190470
2115 10:53:39.197176 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2116 10:53:39.197286
2117 10:53:39.197357
2118 10:53:39.197429
2119 10:53:39.197718 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2121 10:53:39.298232 hatch: tftpboot 192.168.201.1 8077707/tftp-deploy-kpc_ws_f/kernel/bzImage 8077707/tftp-deploy-kpc_ws_f/kernel/cmdline 8077707/tftp-deploy-kpc_ws_f/ramdisk/ramdisk.cpio.gz
2122 10:53:39.298406 Setting prompt string to 'Starting kernel'
2123 10:53:39.298491 Setting prompt string to ['Starting kernel']
2124 10:53:39.298601 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 10:53:39.298725 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2126 10:53:39.302472 tftpboot 192.168.201.1 8077707/tftp-deploy-kpc_ws_f/kernel/bzImoy-kpc_ws_f/kernel/cmdline 8077707/tftp-deploy-kpc_ws_f/ramdisk/ramdisk.cpio.gz
2127 10:53:39.302595
2128 10:53:39.302671 Waiting for link
2129 10:53:39.302734
2130 10:53:39.503362 done.
2131 10:53:39.503531
2132 10:53:39.503605 MAC: 00:24:32:30:7f:7f
2133 10:53:39.503686
2134 10:53:39.506620 Sending DHCP discover... done.
2135 10:53:39.506715
2136 10:53:39.509622 Waiting for reply... done.
2137 10:53:39.509704
2138 10:53:39.512771 Sending DHCP request... done.
2139 10:53:39.512865
2140 10:53:39.516131 Waiting for reply... done.
2141 10:53:39.516210
2142 10:53:39.519601 My ip is 192.168.201.15
2143 10:53:39.519692
2144 10:53:39.522824 The DHCP server ip is 192.168.201.1
2145 10:53:39.522907
2146 10:53:39.526048 TFTP server IP predefined by user: 192.168.201.1
2147 10:53:39.526130
2148 10:53:39.532482 Bootfile predefined by user: 8077707/tftp-deploy-kpc_ws_f/kernel/bzImage
2149 10:53:39.536007
2150 10:53:39.538854 Sending tftp read request... done.
2151 10:53:39.538935
2152 10:53:39.542525 Waiting for the transfer...
2153 10:53:39.542608
2154 10:53:40.059021 00000000 ################################################################
2155 10:53:40.059175
2156 10:53:40.578161 00080000 ################################################################
2157 10:53:40.578321
2158 10:53:41.092240 00100000 ################################################################
2159 10:53:41.092396
2160 10:53:41.606587 00180000 ################################################################
2161 10:53:41.606733
2162 10:53:42.120904 00200000 ################################################################
2163 10:53:42.121049
2164 10:53:42.635326 00280000 ################################################################
2165 10:53:42.635464
2166 10:53:43.144859 00300000 ################################################################
2167 10:53:43.145003
2168 10:53:43.652430 00380000 ################################################################
2169 10:53:43.652572
2170 10:53:44.166437 00400000 ################################################################
2171 10:53:44.166579
2172 10:53:44.681274 00480000 ################################################################
2173 10:53:44.681416
2174 10:53:45.192409 00500000 ################################################################
2175 10:53:45.192560
2176 10:53:45.705909 00580000 ################################################################
2177 10:53:45.706065
2178 10:53:46.225987 00600000 ################################################################
2179 10:53:46.226128
2180 10:53:46.541264 00680000 ###################################### done.
2181 10:53:46.541413
2182 10:53:46.544182 The bootfile was 7126928 bytes long.
2183 10:53:46.544267
2184 10:53:46.547722 Sending tftp read request... done.
2185 10:53:46.547807
2186 10:53:46.550573 Waiting for the transfer...
2187 10:53:46.550652
2188 10:53:47.061665 00000000 ################################################################
2189 10:53:47.061815
2190 10:53:47.575855 00080000 ################################################################
2191 10:53:47.576003
2192 10:53:48.085259 00100000 ################################################################
2193 10:53:48.085399
2194 10:53:48.599729 00180000 ################################################################
2195 10:53:48.599879
2196 10:53:49.113028 00200000 ################################################################
2197 10:53:49.113170
2198 10:53:49.633388 00280000 ################################################################
2199 10:53:49.633546
2200 10:53:50.150053 00300000 ################################################################
2201 10:53:50.150227
2202 10:53:50.661552 00380000 ################################################################
2203 10:53:50.661708
2204 10:53:51.175351 00400000 ################################################################
2205 10:53:51.175509
2206 10:53:51.686022 00480000 ################################################################
2207 10:53:51.686182
2208 10:53:51.939157 00500000 ################################ done.
2209 10:53:51.939316
2210 10:53:51.942378 Sending tftp read request... done.
2211 10:53:51.942477
2212 10:53:51.945889 Waiting for the transfer...
2213 10:53:51.945986
2214 10:53:51.946068 00000000 # done.
2215 10:53:51.948950
2216 10:53:51.956020 Command line loaded dynamically from TFTP file: 8077707/tftp-deploy-kpc_ws_f/kernel/cmdline
2217 10:53:51.956134
2218 10:53:51.981856 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8077707/extract-nfsrootfs-jwowlhi2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2219 10:53:51.981991
2220 10:53:51.988248 ec_init(0): CrosEC protocol v3 supported (256, 256)
2221 10:53:51.988333
2222 10:53:51.995829 Shutting down all USB controllers.
2223 10:53:51.995926
2224 10:53:51.995995 Removing current net device
2225 10:53:51.996058
2226 10:53:52.004128 Finalizing coreboot
2227 10:53:52.004226
2228 10:53:52.010710 Exiting depthcharge with code 4 at timestamp: 22486634
2229 10:53:52.010796
2230 10:53:52.010865
2231 10:53:52.010939 Starting kernel ...
2232 10:53:52.011033
2233 10:53:52.011093
2234 10:53:52.011166
2235 10:53:52.011575 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2236 10:53:52.011686 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2237 10:53:52.011797 Setting prompt string to ['Linux version [0-9]']
2238 10:53:52.011879 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2239 10:53:52.011951 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2241 10:58:17.011932 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2243 10:58:17.012158 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2245 10:58:17.012329 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2248 10:58:17.012612 end: 2 depthcharge-action (duration 00:05:00) [common]
2250 10:58:17.012859 Cleaning after the job
2251 10:58:17.012955 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/ramdisk
2252 10:58:17.013431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/kernel
2253 10:58:17.013960 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/nfsrootfs
2254 10:58:17.050843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077707/tftp-deploy-kpc_ws_f/modules
2255 10:58:17.051161 start: 4.1 power-off (timeout 00:00:30) [common]
2256 10:58:17.051328 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2257 10:58:17.070535 >> Command sent successfully.
2258 10:58:17.072433 Returned 0 in 0 seconds
2259 10:58:17.173177 end: 4.1 power-off (duration 00:00:00) [common]
2261 10:58:17.173494 start: 4.2 read-feedback (timeout 00:10:00) [common]
2262 10:58:17.173731 Listened to connection for namespace 'common' for up to 1s
2263 10:58:18.178300 Finalising connection for namespace 'common'
2264 10:58:18.178481 Disconnecting from shell: Finalise
2265 10:58:18.279207 end: 4.2 read-feedback (duration 00:00:01) [common]
2266 10:58:18.279354 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8077707
2267 10:58:18.448338 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8077707
2268 10:58:18.448534 JobError: Your job cannot terminate cleanly.