Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:48:49.924030 lava-dispatcher, installed at version: 2022.10
2 07:48:49.924241 start: 0 validate
3 07:48:49.924376 Start time: 2022-11-25 07:48:49.924369+00:00 (UTC)
4 07:48:49.924502 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:48:49.924631 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 07:48:50.219894 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:48:50.220687 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:48:50.238101 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:48:50.238318 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:48:50.248025 validate duration: 0.32
12 07:48:50.248411 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:48:50.248564 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:48:50.248710 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:48:50.248845 Not decompressing ramdisk as can be used compressed.
16 07:48:50.248973 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 07:48:50.249079 saving as /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/ramdisk/rootfs.cpio.gz
18 07:48:50.249171 total size: 8415749 (8MB)
19 07:48:50.288452 progress 0% (0MB)
20 07:48:50.342629 progress 5% (0MB)
21 07:48:50.368645 progress 10% (0MB)
22 07:48:50.418630 progress 15% (1MB)
23 07:48:50.471397 progress 20% (1MB)
24 07:48:50.514044 progress 25% (2MB)
25 07:48:50.566360 progress 30% (2MB)
26 07:48:50.611299 progress 35% (2MB)
27 07:48:50.670567 progress 40% (3MB)
28 07:48:50.730805 progress 45% (3MB)
29 07:48:50.793073 progress 50% (4MB)
30 07:48:50.845931 progress 55% (4MB)
31 07:48:50.899053 progress 60% (4MB)
32 07:48:50.961080 progress 65% (5MB)
33 07:48:51.004673 progress 70% (5MB)
34 07:48:51.048067 progress 75% (6MB)
35 07:48:51.099688 progress 80% (6MB)
36 07:48:51.148100 progress 85% (6MB)
37 07:48:51.196717 progress 90% (7MB)
38 07:48:51.248016 progress 95% (7MB)
39 07:48:51.294882 progress 100% (8MB)
40 07:48:51.295224 8MB downloaded in 1.05s (7.67MB/s)
41 07:48:51.295401 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:48:51.295678 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:48:51.295779 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:48:51.295872 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:48:51.295992 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:48:51.296063 saving as /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/kernel/bzImage
48 07:48:51.296130 total size: 7131024 (6MB)
49 07:48:51.296200 No compression specified
50 07:48:51.333223 progress 0% (0MB)
51 07:48:51.381197 progress 5% (0MB)
52 07:48:51.416814 progress 10% (0MB)
53 07:48:51.445875 progress 15% (1MB)
54 07:48:51.492291 progress 20% (1MB)
55 07:48:51.522725 progress 25% (1MB)
56 07:48:51.561121 progress 30% (2MB)
57 07:48:51.607330 progress 35% (2MB)
58 07:48:51.652538 progress 40% (2MB)
59 07:48:51.692101 progress 45% (3MB)
60 07:48:51.727127 progress 50% (3MB)
61 07:48:51.760494 progress 55% (3MB)
62 07:48:51.809558 progress 60% (4MB)
63 07:48:51.852462 progress 65% (4MB)
64 07:48:51.888585 progress 70% (4MB)
65 07:48:51.919217 progress 75% (5MB)
66 07:48:51.956874 progress 80% (5MB)
67 07:48:52.003189 progress 85% (5MB)
68 07:48:52.040862 progress 90% (6MB)
69 07:48:52.088199 progress 95% (6MB)
70 07:48:52.122987 progress 100% (6MB)
71 07:48:52.123319 6MB downloaded in 0.83s (8.22MB/s)
72 07:48:52.123507 end: 1.2.1 http-download (duration 00:00:01) [common]
74 07:48:52.123786 end: 1.2 download-retry (duration 00:00:01) [common]
75 07:48:52.123889 start: 1.3 download-retry (timeout 00:09:58) [common]
76 07:48:52.123988 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 07:48:52.124109 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:48:52.124188 saving as /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/modules/modules.tar
79 07:48:52.124259 total size: 52060 (0MB)
80 07:48:52.124328 Using unxz to decompress xz
81 07:48:52.141153 progress 62% (0MB)
82 07:48:52.141616 progress 100% (0MB)
83 07:48:52.145383 0MB downloaded in 0.02s (2.35MB/s)
84 07:48:52.145660 end: 1.3.1 http-download (duration 00:00:00) [common]
86 07:48:52.145964 end: 1.3 download-retry (duration 00:00:00) [common]
87 07:48:52.146075 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 07:48:52.146185 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 07:48:52.146309 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 07:48:52.146415 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 07:48:52.146615 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a
92 07:48:52.146740 makedir: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin
93 07:48:52.146837 makedir: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/tests
94 07:48:52.146930 makedir: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/results
95 07:48:52.147048 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-add-keys
96 07:48:52.147198 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-add-sources
97 07:48:52.147332 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-background-process-start
98 07:48:52.147464 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-background-process-stop
99 07:48:52.147593 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-common-functions
100 07:48:52.147720 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-echo-ipv4
101 07:48:52.147848 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-install-packages
102 07:48:52.147974 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-installed-packages
103 07:48:52.148100 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-os-build
104 07:48:52.148225 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-probe-channel
105 07:48:52.148396 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-probe-ip
106 07:48:52.148535 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-target-ip
107 07:48:52.148664 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-target-mac
108 07:48:52.148791 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-target-storage
109 07:48:52.148920 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-case
110 07:48:52.149049 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-event
111 07:48:52.149177 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-feedback
112 07:48:52.149305 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-raise
113 07:48:52.149438 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-reference
114 07:48:52.149564 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-runner
115 07:48:52.149689 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-set
116 07:48:52.149815 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-test-shell
117 07:48:52.149943 Updating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-install-packages (oe)
118 07:48:52.150075 Updating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/bin/lava-installed-packages (oe)
119 07:48:52.150190 Creating /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/environment
120 07:48:52.150303 LAVA metadata
121 07:48:52.150384 - LAVA_JOB_ID=8119355
122 07:48:52.150461 - LAVA_DISPATCHER_IP=192.168.201.1
123 07:48:52.150583 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 07:48:52.150673 skipped lava-vland-overlay
125 07:48:52.150752 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 07:48:52.150838 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 07:48:52.150904 skipped lava-multinode-overlay
128 07:48:52.150980 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 07:48:52.151062 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 07:48:52.151136 Loading test definitions
131 07:48:52.151237 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 07:48:52.151313 Using /lava-8119355 at stage 0
133 07:48:52.151586 uuid=8119355_1.4.2.3.1 testdef=None
134 07:48:52.151678 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 07:48:52.151768 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 07:48:52.152330 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 07:48:52.152560 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 07:48:52.153147 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 07:48:52.153389 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 07:48:52.153929 runner path: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/0/tests/0_dmesg test_uuid 8119355_1.4.2.3.1
143 07:48:52.154077 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 07:48:52.154349 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 07:48:52.154423 Using /lava-8119355 at stage 1
147 07:48:52.154667 uuid=8119355_1.4.2.3.5 testdef=None
148 07:48:52.154758 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 07:48:52.154846 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 07:48:52.155284 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 07:48:52.155511 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 07:48:52.156078 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 07:48:52.156320 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 07:48:52.156900 runner path: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/1/tests/1_bootrr test_uuid 8119355_1.4.2.3.5
157 07:48:52.157043 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 07:48:52.157257 Creating lava-test-runner.conf files
160 07:48:52.157323 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/0 for stage 0
161 07:48:52.157404 - 0_dmesg
162 07:48:52.157477 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119355/lava-overlay-nimb9d3a/lava-8119355/1 for stage 1
163 07:48:52.157560 - 1_bootrr
164 07:48:52.157649 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 07:48:52.157737 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 07:48:52.163867 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 07:48:52.163977 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 07:48:52.164069 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 07:48:52.164157 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 07:48:52.164246 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 07:48:52.354271 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 07:48:52.354597 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 07:48:52.354711 extracting modules file /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119355/extract-overlay-ramdisk-yhcz3kos/ramdisk
174 07:48:52.358864 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 07:48:52.358991 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 07:48:52.359082 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119355/compress-overlay-yd6mwpsy/overlay-1.4.2.4.tar.gz to ramdisk
177 07:48:52.359159 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119355/compress-overlay-yd6mwpsy/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119355/extract-overlay-ramdisk-yhcz3kos/ramdisk
178 07:48:52.363112 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 07:48:52.363229 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 07:48:52.363328 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 07:48:52.363422 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 07:48:52.363501 Building ramdisk /var/lib/lava/dispatcher/tmp/8119355/extract-overlay-ramdisk-yhcz3kos/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119355/extract-overlay-ramdisk-yhcz3kos/ramdisk
183 07:48:52.428865 >> 48008 blocks
184 07:48:53.198539 rename /var/lib/lava/dispatcher/tmp/8119355/extract-overlay-ramdisk-yhcz3kos/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/ramdisk/ramdisk.cpio.gz
185 07:48:53.199035 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 07:48:53.199205 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 07:48:53.199357 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 07:48:53.199493 No mkimage arch provided, not using FIT.
189 07:48:53.199627 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 07:48:53.199757 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 07:48:53.199906 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 07:48:53.200046 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 07:48:53.200202 No LXC device requested
194 07:48:53.200334 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 07:48:53.200475 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 07:48:53.200608 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 07:48:53.200720 Checking files for TFTP limit of 4294967296 bytes.
198 07:48:53.201262 end: 1 tftp-deploy (duration 00:00:03) [common]
199 07:48:53.201412 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 07:48:53.201553 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 07:48:53.201733 substitutions:
202 07:48:53.201840 - {DTB}: None
203 07:48:53.201945 - {INITRD}: 8119355/tftp-deploy-ibk7aay8/ramdisk/ramdisk.cpio.gz
204 07:48:53.202046 - {KERNEL}: 8119355/tftp-deploy-ibk7aay8/kernel/bzImage
205 07:48:53.202145 - {LAVA_MAC}: None
206 07:48:53.202276 - {PRESEED_CONFIG}: None
207 07:48:53.202376 - {PRESEED_LOCAL}: None
208 07:48:53.202471 - {RAMDISK}: 8119355/tftp-deploy-ibk7aay8/ramdisk/ramdisk.cpio.gz
209 07:48:53.202568 - {ROOT_PART}: None
210 07:48:53.202694 - {ROOT}: None
211 07:48:53.202792 - {SERVER_IP}: 192.168.201.1
212 07:48:53.202915 - {TEE}: None
213 07:48:53.202981 Parsed boot commands:
214 07:48:53.203073 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 07:48:53.203259 Parsed boot commands: tftpboot 192.168.201.1 8119355/tftp-deploy-ibk7aay8/kernel/bzImage 8119355/tftp-deploy-ibk7aay8/kernel/cmdline 8119355/tftp-deploy-ibk7aay8/ramdisk/ramdisk.cpio.gz
216 07:48:53.203352 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 07:48:53.203475 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 07:48:53.203572 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 07:48:53.203701 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 07:48:53.203774 Not connected, no need to disconnect.
221 07:48:53.203851 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 07:48:53.203935 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 07:48:53.204004 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-7'
224 07:48:53.206965 Setting prompt string to ['lava-test: # ']
225 07:48:53.207253 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 07:48:53.207358 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 07:48:53.207455 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 07:48:53.207548 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 07:48:53.207738 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
230 07:48:53.227857 >> Command sent successfully.
231 07:48:53.230404 Returned 0 in 0 seconds
232 07:48:53.331246 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 07:48:53.331997 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 07:48:53.332147 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 07:48:53.332275 Setting prompt string to 'Starting depthcharge on Magolor...'
237 07:48:53.332379 Changing prompt to 'Starting depthcharge on Magolor...'
238 07:48:53.332490 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
239 07:48:53.332869 [Enter `^Ec?' for help]
240 07:49:00.985666
241 07:49:00.985882
242 07:49:00.994730 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
243 07:49:00.998674 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
244 07:49:01.001476 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
245 07:49:01.007984 CPU: AES supported, TXT NOT supported, VT supported
246 07:49:01.011726 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
247 07:49:01.017797 PCH: device id 4d87 (rev 01) is Jasperlake Super
248 07:49:01.021509 IGD: device id 4e55 (rev 01) is Jasperlake GT4
249 07:49:01.025177 VBOOT: Loading verstage.
250 07:49:01.028848 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 07:49:01.036373 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
252 07:49:01.040190 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 07:49:01.046452 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
254 07:49:01.046662
255 07:49:01.046809
256 07:49:01.056680 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
257 07:49:01.059717
258 07:49:01.073099 Probing TPM: . done!
259 07:49:01.076251 TPM ready after 0 ms
260 07:49:01.080304 Connected to device vid:did:rid of 1ae0:0028:00
261 07:49:01.090501 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
262 07:49:01.097469 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 07:49:01.100484 Initialized TPM device CR50 revision 0
264 07:49:01.213133 tlcl_send_startup: Startup return code is 0
265 07:49:01.213321 TPM: setup succeeded
266 07:49:01.227729 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 07:49:01.241389 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 07:49:01.260806 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 07:49:01.268388 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 07:49:01.271891 Chrome EC: UHEPI supported
271 07:49:01.272008 Phase 1
272 07:49:01.278977 FMAP: area GBB found @ c05000 (12288 bytes)
273 07:49:01.285872 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
274 07:49:01.292280 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
275 07:49:01.295927 Recovery requested (1009000e)
276 07:49:01.298974 TPM: Extending digest for VBOOT: boot mode into PCR 0
277 07:49:01.313892 tlcl_extend: response is 0
278 07:49:01.320952 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
279 07:49:01.330162 tlcl_extend: response is 0
280 07:49:01.336769 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
281 07:49:01.340212 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
282 07:49:01.346826 BS: verstage times (exec / console): total (unknown) / 124 ms
283 07:49:01.346946
284 07:49:01.350474
285 07:49:01.359981 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
286 07:49:01.363922 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
287 07:49:01.370900 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
288 07:49:01.373881 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
289 07:49:01.377700 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
290 07:49:01.384618 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
291 07:49:01.387688 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
292 07:49:01.391067 TCO_STS: 0000 0001
293 07:49:01.391167 GEN_PMCON: d0015038 00002200
294 07:49:01.394567 GBLRST_CAUSE: 00000000 00000000
295 07:49:01.397947 prev_sleep_state 5
296 07:49:01.401850 Boot Count incremented to 3408
297 07:49:01.408637 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
298 07:49:01.412129 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
299 07:49:01.422668 Chrome EC: UHEPI supported
300 07:49:01.428818 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
301 07:49:01.435058 Probing TPM: done!
302 07:49:01.442138 Connected to device vid:did:rid of 1ae0:0028:00
303 07:49:01.451715 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
304 07:49:01.459023 Initialized TPM device CR50 revision 0
305 07:49:01.469214 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
306 07:49:01.476446 MRC: Hash idx 0x100b comparison successful.
307 07:49:01.479168 MRC cache found, size 5458
308 07:49:01.479308 bootmode is set to: 2
309 07:49:01.482697 SPD INDEX = 0
310 07:49:01.485914 CBFS: Found 'spd.bin' @0x40c40 size 0x600
311 07:49:01.489409 SPD: module type is LPDDR4X
312 07:49:01.496548 SPD: module part number is MT53E512M32D2NP-046 WT:E
313 07:49:01.502588 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
314 07:49:01.505921 SPD: device width 16 bits, bus width 32 bits
315 07:49:01.509242 SPD: module size is 4096 MB (per channel)
316 07:49:01.512532 meminit_channels: DRAM half-populated
317 07:49:01.595365 CBMEM:
318 07:49:01.598735 IMD: root @ 0x76fff000 254 entries.
319 07:49:01.601786 IMD: root @ 0x76ffec00 62 entries.
320 07:49:01.605651 FMAP: area RO_VPD found @ c00000 (16384 bytes)
321 07:49:01.611749 WARNING: RO_VPD is uninitialized or empty.
322 07:49:01.615254 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
323 07:49:01.618353 WARNING: RW_VPD is uninitialized or empty.
324 07:49:01.623171 External stage cache:
325 07:49:01.626423 IMD: root @ 0x7b3ff000 254 entries.
326 07:49:01.629537 IMD: root @ 0x7b3fec00 62 entries.
327 07:49:01.639871 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
328 07:49:01.646797 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
329 07:49:01.652958 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
330 07:49:01.661352 MRC: 'RECOVERY_MRC_CACHE' does not need update.
331 07:49:01.664818 cse_lite: Skip switching to RW in the recovery path
332 07:49:01.668276 1 DIMMs found
333 07:49:01.668369 SMM Memory Map
334 07:49:01.671247 SMRAM : 0x7b000000 0x800000
335 07:49:01.674419 Subregion 0: 0x7b000000 0x200000
336 07:49:01.677781 Subregion 1: 0x7b200000 0x200000
337 07:49:01.681236 Subregion 2: 0x7b400000 0x400000
338 07:49:01.684715 top_of_ram = 0x77000000
339 07:49:01.691564 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
340 07:49:01.694512 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
341 07:49:01.701124 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 07:49:01.704735 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
343 07:49:01.711200 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
344 07:49:01.723001 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
345 07:49:01.726408 Processing 188 relocs. Offset value of 0x74c0e000
346 07:49:01.736251 BS: romstage times (exec / console): total (unknown) / 259 ms
347 07:49:01.740897
348 07:49:01.741007
349 07:49:01.750567 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
350 07:49:01.754157 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
351 07:49:01.761088 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
352 07:49:01.767339 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
353 07:49:01.823274 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
354 07:49:01.829874 Processing 4805 relocs. Offset value of 0x75da8000
355 07:49:01.833704 BS: postcar times (exec / console): total (unknown) / 42 ms
356 07:49:01.836379
357 07:49:01.836493
358 07:49:01.846681 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
359 07:49:01.846824 Normal boot
360 07:49:01.850586 EC returned error result code 3
361 07:49:01.854053 FW_CONFIG value is 0x204
362 07:49:01.857421 GENERIC: 0.0 disabled by fw_config
363 07:49:01.863948 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
364 07:49:01.867314 I2C: 00:10 disabled by fw_config
365 07:49:01.870462 I2C: 00:10 disabled by fw_config
366 07:49:01.874020 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
367 07:49:01.880580 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 07:49:01.884049 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
369 07:49:01.890905 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
370 07:49:01.894096 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
371 07:49:01.897159 I2C: 00:10 disabled by fw_config
372 07:49:01.903772 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
373 07:49:01.910474 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
374 07:49:01.913665 I2C: 00:1a disabled by fw_config
375 07:49:01.916930 I2C: 00:1a disabled by fw_config
376 07:49:01.923421 fw_config match found: AUDIO_AMP=UNPROVISIONED
377 07:49:01.926732 fw_config match found: AUDIO_AMP=UNPROVISIONED
378 07:49:01.929929 GENERIC: 0.0 disabled by fw_config
379 07:49:01.937104 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 07:49:01.940228 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
381 07:49:01.946982 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
382 07:49:01.950336 microcode: Update skipped, already up-to-date
383 07:49:01.956607 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
384 07:49:01.982440 Detected 2 core, 2 thread CPU.
385 07:49:01.985690 Setting up SMI for CPU
386 07:49:01.988728 IED base = 0x7b400000
387 07:49:01.988850 IED size = 0x00400000
388 07:49:01.992801 Will perform SMM setup.
389 07:49:01.995855 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
390 07:49:02.005959 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
391 07:49:02.008792 Processing 16 relocs. Offset value of 0x00030000
392 07:49:02.012442 Attempting to start 1 APs
393 07:49:02.015855 Waiting for 10ms after sending INIT.
394 07:49:02.032566 Waiting for 1st SIPI to complete...done.
395 07:49:02.035604 Waiting for 2nd SIPI to complete...done.
396 07:49:02.038965 AP: slot 1 apic_id 2.
397 07:49:02.045458 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
398 07:49:02.049005 Processing 13 relocs. Offset value of 0x00038000
399 07:49:02.052366
400 07:49:02.052472 Unable to locate Global NVS
401 07:49:02.059027 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
402 07:49:02.062063
403 07:49:02.065471 Installing permanent SMM handler to 0x7b000000
404 07:49:02.072327 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
405 07:49:02.079048 Processing 704 relocs. Offset value of 0x7b010000
406 07:49:02.086114 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
407 07:49:02.090107 Processing 13 relocs. Offset value of 0x7b008000
408 07:49:02.097341 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
409 07:49:02.100277 Unable to locate Global NVS
410 07:49:02.107095 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
411 07:49:02.110100 Clearing SMI status registers
412 07:49:02.113327 SMI_STS: PM1
413 07:49:02.113407 PM1_STS: PWRBTN
414 07:49:02.117182 TCO_STS: INTRD_DET
415 07:49:02.123641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
416 07:49:02.126613 In relocation handler: CPU 0
417 07:49:02.130106 New SMBASE=0x7b000000 IEDBASE=0x7b400000
418 07:49:02.136506 Writing SMRR. base = 0x7b000006, mask=0xff800800
419 07:49:02.136603 Relocation complete.
420 07:49:02.143112 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
421 07:49:02.146391 In relocation handler: CPU 1
422 07:49:02.153145 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
423 07:49:02.156625 Writing SMRR. base = 0x7b000006, mask=0xff800800
424 07:49:02.159755 Relocation complete.
425 07:49:02.159869 Initializing CPU #0
426 07:49:02.163125 CPU: vendor Intel device 906c0
427 07:49:02.166829 CPU: family 06, model 9c, stepping 00
428 07:49:02.169803 Clearing out pending MCEs
429 07:49:02.173309 Setting up local APIC...
430 07:49:02.176448 apic_id: 0x00 done.
431 07:49:02.179873 Turbo is available but hidden
432 07:49:02.179983 Turbo is available and visible
433 07:49:02.186571 microcode: Update skipped, already up-to-date
434 07:49:02.186685 CPU #0 initialized
435 07:49:02.190000 Initializing CPU #1
436 07:49:02.193581 CPU: vendor Intel device 906c0
437 07:49:02.196855 CPU: family 06, model 9c, stepping 00
438 07:49:02.199692 Clearing out pending MCEs
439 07:49:02.203158 Setting up local APIC...
440 07:49:02.203276 apic_id: 0x02 done.
441 07:49:02.209695 microcode: Update skipped, already up-to-date
442 07:49:02.209807 CPU #1 initialized
443 07:49:02.216516 bsp_do_flight_plan done after 175 msecs.
444 07:49:02.219938 CPU: frequency set to 2800 MHz
445 07:49:02.220050 Enabling SMIs.
446 07:49:02.226072 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
447 07:49:02.236582 Probing TPM: done!
448 07:49:02.243109 Connected to device vid:did:rid of 1ae0:0028:00
449 07:49:02.252812 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
450 07:49:02.256276 Initialized TPM device CR50 revision 0
451 07:49:02.259651 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
452 07:49:02.266654 Found a VBT of 7680 bytes after decompression
453 07:49:02.273482 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
454 07:49:02.308104 Detected 2 core, 2 thread CPU.
455 07:49:02.311441 Detected 2 core, 2 thread CPU.
456 07:49:02.674978 Display FSP Version Info HOB
457 07:49:02.678382 Reference Code - CPU = 8.7.22.30
458 07:49:02.681842 uCode Version = 24.0.0.1f
459 07:49:02.685763 TXT ACM version = ff.ff.ff.ffff
460 07:49:02.689403 Reference Code - ME = 8.7.22.30
461 07:49:02.689521 MEBx version = 0.0.0.0
462 07:49:02.692995 ME Firmware Version = Consumer SKU
463 07:49:02.696184 Reference Code - PCH = 8.7.22.30
464 07:49:02.699530 PCH-CRID Status = Disabled
465 07:49:02.702691 PCH-CRID Original Value = ff.ff.ff.ffff
466 07:49:02.706112 PCH-CRID New Value = ff.ff.ff.ffff
467 07:49:02.709748
468 07:49:02.712941 OPROM - RST - RAID = ff.ff.ff.ffff
469 07:49:02.713053 PCH Hsio Version = 4.0.0.0
470 07:49:02.720040 Reference Code - SA - System Agent = 8.7.22.30
471 07:49:02.723122 Reference Code - MRC = 0.0.4.68
472 07:49:02.725969 SA - PCIe Version = 8.7.22.30
473 07:49:02.726079 SA-CRID Status = Disabled
474 07:49:02.729598 SA-CRID Original Value = 0.0.0.0
475 07:49:02.733383 SA-CRID New Value = 0.0.0.0
476 07:49:02.736176 OPROM - VBIOS = ff.ff.ff.ffff
477 07:49:02.742649 IO Manageability Engine FW Version = ff.ff.ff.ffff
478 07:49:02.746200 PHY Build Version = ff.ff.ff.ffff
479 07:49:02.749805 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
480 07:49:02.756506 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
481 07:49:02.759310 ITSS IRQ Polarities Before:
482 07:49:02.759422 IPC0: 0xffffffff
483 07:49:02.762734 IPC1: 0xffffffff
484 07:49:02.762841 IPC2: 0xffffffff
485 07:49:02.766373 IPC3: 0xffffffff
486 07:49:02.769946 ITSS IRQ Polarities After:
487 07:49:02.770058 IPC0: 0xffffffff
488 07:49:02.772934 IPC1: 0xffffffff
489 07:49:02.773044 IPC2: 0xffffffff
490 07:49:02.776241 IPC3: 0xffffffff
491 07:49:02.786249 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
492 07:49:02.793060 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
493 07:49:02.796251 Enumerating buses...
494 07:49:02.799468 Show all devs... Before device enumeration.
495 07:49:02.802545 Root Device: enabled 1
496 07:49:02.806111 CPU_CLUSTER: 0: enabled 1
497 07:49:02.806244 DOMAIN: 0000: enabled 1
498 07:49:02.809152 PCI: 00:00.0: enabled 1
499 07:49:02.812890 PCI: 00:02.0: enabled 1
500 07:49:02.816111 PCI: 00:04.0: enabled 1
501 07:49:02.816221 PCI: 00:05.0: enabled 1
502 07:49:02.819706 PCI: 00:09.0: enabled 0
503 07:49:02.822765 PCI: 00:12.6: enabled 0
504 07:49:02.825760 PCI: 00:14.0: enabled 1
505 07:49:02.825871 PCI: 00:14.1: enabled 0
506 07:49:02.829268 PCI: 00:14.2: enabled 0
507 07:49:02.832685 PCI: 00:14.3: enabled 1
508 07:49:02.832793 PCI: 00:14.5: enabled 1
509 07:49:02.836101 PCI: 00:15.0: enabled 1
510 07:49:02.839017 PCI: 00:15.1: enabled 1
511 07:49:02.842585 PCI: 00:15.2: enabled 1
512 07:49:02.842693 PCI: 00:15.3: enabled 1
513 07:49:02.845639 PCI: 00:16.0: enabled 1
514 07:49:02.849509 PCI: 00:16.1: enabled 0
515 07:49:02.852514 PCI: 00:16.4: enabled 0
516 07:49:02.852624 PCI: 00:16.5: enabled 0
517 07:49:02.855919 PCI: 00:17.0: enabled 0
518 07:49:02.859431 PCI: 00:19.0: enabled 1
519 07:49:02.859542 PCI: 00:19.1: enabled 0
520 07:49:02.862650 PCI: 00:19.2: enabled 1
521 07:49:02.865693 PCI: 00:1a.0: enabled 1
522 07:49:02.868992 PCI: 00:1c.0: enabled 0
523 07:49:02.869105 PCI: 00:1c.1: enabled 0
524 07:49:02.872537 PCI: 00:1c.2: enabled 0
525 07:49:02.875565 PCI: 00:1c.3: enabled 0
526 07:49:02.879137 PCI: 00:1c.4: enabled 0
527 07:49:02.879262 PCI: 00:1c.5: enabled 0
528 07:49:02.882377 PCI: 00:1c.6: enabled 0
529 07:49:02.885744 PCI: 00:1c.7: enabled 1
530 07:49:02.888846 PCI: 00:1e.0: enabled 0
531 07:49:02.888936 PCI: 00:1e.1: enabled 0
532 07:49:02.892288 PCI: 00:1e.2: enabled 1
533 07:49:02.895443 PCI: 00:1e.3: enabled 0
534 07:49:02.895534 PCI: 00:1f.0: enabled 1
535 07:49:02.898882 PCI: 00:1f.1: enabled 1
536 07:49:02.902348 PCI: 00:1f.2: enabled 1
537 07:49:02.905583 PCI: 00:1f.3: enabled 1
538 07:49:02.905674 PCI: 00:1f.4: enabled 0
539 07:49:02.909298 PCI: 00:1f.5: enabled 1
540 07:49:02.912402 PCI: 00:1f.7: enabled 0
541 07:49:02.915438 GENERIC: 0.0: enabled 1
542 07:49:02.915528 GENERIC: 0.0: enabled 1
543 07:49:02.919063 USB0 port 0: enabled 1
544 07:49:02.922524 GENERIC: 0.0: enabled 1
545 07:49:02.922613 I2C: 00:2c: enabled 1
546 07:49:02.925647 I2C: 00:15: enabled 1
547 07:49:02.929214 GENERIC: 0.0: enabled 0
548 07:49:02.929304 I2C: 00:15: enabled 1
549 07:49:02.932344 I2C: 00:10: enabled 0
550 07:49:02.935604 I2C: 00:10: enabled 0
551 07:49:02.935746 I2C: 00:2c: enabled 1
552 07:49:02.938834 I2C: 00:40: enabled 1
553 07:49:02.942566 I2C: 00:10: enabled 1
554 07:49:02.942650 I2C: 00:39: enabled 1
555 07:49:02.945533 I2C: 00:36: enabled 1
556 07:49:02.949103 I2C: 00:10: enabled 0
557 07:49:02.949188 I2C: 00:0c: enabled 1
558 07:49:02.952217
559 07:49:02.952298 I2C: 00:50: enabled 1
560 07:49:02.955660 I2C: 00:1a: enabled 1
561 07:49:02.959029 I2C: 00:1a: enabled 0
562 07:49:02.959138 I2C: 00:1a: enabled 0
563 07:49:02.962595 I2C: 00:28: enabled 1
564 07:49:02.965871 I2C: 00:29: enabled 1
565 07:49:02.965962 PCI: 00:00.0: enabled 1
566 07:49:02.969401 SPI: 00: enabled 1
567 07:49:02.972567 PNP: 0c09.0: enabled 1
568 07:49:02.972656 GENERIC: 0.0: enabled 0
569 07:49:02.975957 USB2 port 0: enabled 1
570 07:49:02.978774 USB2 port 1: enabled 1
571 07:49:02.978867 USB2 port 2: enabled 1
572 07:49:02.982183 USB2 port 3: enabled 1
573 07:49:02.985717 USB2 port 4: enabled 0
574 07:49:02.985801 USB2 port 5: enabled 1
575 07:49:02.989188 USB2 port 6: enabled 0
576 07:49:02.992448 USB2 port 7: enabled 1
577 07:49:02.995941 USB3 port 0: enabled 1
578 07:49:02.996025 USB3 port 1: enabled 1
579 07:49:02.999248 USB3 port 2: enabled 1
580 07:49:03.002545 USB3 port 3: enabled 1
581 07:49:03.002631 APIC: 00: enabled 1
582 07:49:03.005767 APIC: 02: enabled 1
583 07:49:03.005851 Compare with tree...
584 07:49:03.009092
585 07:49:03.009174 Root Device: enabled 1
586 07:49:03.012098 CPU_CLUSTER: 0: enabled 1
587 07:49:03.015822 APIC: 00: enabled 1
588 07:49:03.015901 APIC: 02: enabled 1
589 07:49:03.019279 DOMAIN: 0000: enabled 1
590 07:49:03.022167 PCI: 00:00.0: enabled 1
591 07:49:03.025614 PCI: 00:02.0: enabled 1
592 07:49:03.025693 PCI: 00:04.0: enabled 1
593 07:49:03.029106
594 07:49:03.029184 GENERIC: 0.0: enabled 1
595 07:49:03.032224 PCI: 00:05.0: enabled 1
596 07:49:03.035332 GENERIC: 0.0: enabled 1
597 07:49:03.039025 PCI: 00:09.0: enabled 0
598 07:49:03.039113 PCI: 00:12.6: enabled 0
599 07:49:03.042075
600 07:49:03.042161 PCI: 00:14.0: enabled 1
601 07:49:03.045695 USB0 port 0: enabled 1
602 07:49:03.049275 USB2 port 0: enabled 1
603 07:49:03.051954 USB2 port 1: enabled 1
604 07:49:03.055242 USB2 port 2: enabled 1
605 07:49:03.055354 USB2 port 3: enabled 1
606 07:49:03.058602 USB2 port 4: enabled 0
607 07:49:03.062328 USB2 port 5: enabled 1
608 07:49:03.065612 USB2 port 6: enabled 0
609 07:49:03.068971 USB2 port 7: enabled 1
610 07:49:03.069088 USB3 port 0: enabled 1
611 07:49:03.072068 USB3 port 1: enabled 1
612 07:49:03.075528 USB3 port 2: enabled 1
613 07:49:03.078465 USB3 port 3: enabled 1
614 07:49:03.081819 PCI: 00:14.1: enabled 0
615 07:49:03.081902 PCI: 00:14.2: enabled 0
616 07:49:03.084981
617 07:49:03.085060 PCI: 00:14.3: enabled 1
618 07:49:03.088457 GENERIC: 0.0: enabled 1
619 07:49:03.091745 PCI: 00:14.5: enabled 1
620 07:49:03.094944 PCI: 00:15.0: enabled 1
621 07:49:03.095045 I2C: 00:2c: enabled 1
622 07:49:03.098402 I2C: 00:15: enabled 1
623 07:49:03.101875 PCI: 00:15.1: enabled 1
624 07:49:03.105608 PCI: 00:15.2: enabled 1
625 07:49:03.108425 GENERIC: 0.0: enabled 0
626 07:49:03.108507 I2C: 00:15: enabled 1
627 07:49:03.111990 I2C: 00:10: enabled 0
628 07:49:03.115021 I2C: 00:10: enabled 0
629 07:49:03.118207 I2C: 00:2c: enabled 1
630 07:49:03.118310 I2C: 00:40: enabled 1
631 07:49:03.121878 I2C: 00:10: enabled 1
632 07:49:03.124889 I2C: 00:39: enabled 1
633 07:49:03.128516 PCI: 00:15.3: enabled 1
634 07:49:03.131431 I2C: 00:36: enabled 1
635 07:49:03.131516 I2C: 00:10: enabled 0
636 07:49:03.134617 I2C: 00:0c: enabled 1
637 07:49:03.138455 I2C: 00:50: enabled 1
638 07:49:03.141331 PCI: 00:16.0: enabled 1
639 07:49:03.141412 PCI: 00:16.1: enabled 0
640 07:49:03.145201 PCI: 00:16.4: enabled 0
641 07:49:03.147992 PCI: 00:16.5: enabled 0
642 07:49:03.151173 PCI: 00:17.0: enabled 0
643 07:49:03.154822 PCI: 00:19.0: enabled 1
644 07:49:03.154906 I2C: 00:1a: enabled 1
645 07:49:03.158168 I2C: 00:1a: enabled 0
646 07:49:03.161077 I2C: 00:1a: enabled 0
647 07:49:03.164311 I2C: 00:28: enabled 1
648 07:49:03.164400 I2C: 00:29: enabled 1
649 07:49:03.167675 PCI: 00:19.1: enabled 0
650 07:49:03.171057 PCI: 00:19.2: enabled 1
651 07:49:03.174498 PCI: 00:1a.0: enabled 1
652 07:49:03.177711 PCI: 00:1e.0: enabled 0
653 07:49:03.177800 PCI: 00:1e.1: enabled 0
654 07:49:03.181096 PCI: 00:1e.2: enabled 1
655 07:49:03.184514 SPI: 00: enabled 1
656 07:49:03.188190 PCI: 00:1e.3: enabled 0
657 07:49:03.188281 PCI: 00:1f.0: enabled 1
658 07:49:03.191176 PNP: 0c09.0: enabled 1
659 07:49:03.194273 PCI: 00:1f.1: enabled 1
660 07:49:03.197846 PCI: 00:1f.2: enabled 1
661 07:49:03.200796 PCI: 00:1f.3: enabled 1
662 07:49:03.200881 GENERIC: 0.0: enabled 0
663 07:49:03.204653 PCI: 00:1f.4: enabled 0
664 07:49:03.207757 PCI: 00:1f.5: enabled 1
665 07:49:03.210946 PCI: 00:1f.7: enabled 0
666 07:49:03.211031 Root Device scanning...
667 07:49:03.214565 scan_static_bus for Root Device
668 07:49:03.217765 CPU_CLUSTER: 0 enabled
669 07:49:03.221284 DOMAIN: 0000 enabled
670 07:49:03.224262 DOMAIN: 0000 scanning...
671 07:49:03.224344 PCI: pci_scan_bus for bus 00
672 07:49:03.227588
673 07:49:03.227677 PCI: 00:00.0 [8086/0000] ops
674 07:49:03.230887 PCI: 00:00.0 [8086/4e22] enabled
675 07:49:03.234557 PCI: 00:02.0 [8086/0000] bus ops
676 07:49:03.237863 PCI: 00:02.0 [8086/4e55] enabled
677 07:49:03.241026 PCI: 00:04.0 [8086/0000] bus ops
678 07:49:03.244499 PCI: 00:04.0 [8086/4e03] enabled
679 07:49:03.247685 PCI: 00:05.0 [8086/0000] bus ops
680 07:49:03.251408 PCI: 00:05.0 [8086/4e19] enabled
681 07:49:03.254500 PCI: 00:08.0 [8086/4e11] enabled
682 07:49:03.257583 PCI: 00:14.0 [8086/0000] bus ops
683 07:49:03.260704 PCI: 00:14.0 [8086/4ded] enabled
684 07:49:03.264189 PCI: 00:14.2 [8086/4def] disabled
685 07:49:03.267653 PCI: 00:14.3 [8086/0000] bus ops
686 07:49:03.270760 PCI: 00:14.3 [8086/4df0] enabled
687 07:49:03.273939 PCI: 00:14.5 [8086/0000] ops
688 07:49:03.277743 PCI: 00:14.5 [8086/4df8] enabled
689 07:49:03.281006 PCI: 00:15.0 [8086/0000] bus ops
690 07:49:03.283974 PCI: 00:15.0 [8086/4de8] enabled
691 07:49:03.287935 PCI: 00:15.1 [8086/0000] bus ops
692 07:49:03.290857 PCI: 00:15.1 [8086/4de9] enabled
693 07:49:03.294541 PCI: 00:15.2 [8086/0000] bus ops
694 07:49:03.297497 PCI: 00:15.2 [8086/4dea] enabled
695 07:49:03.301142 PCI: 00:15.3 [8086/0000] bus ops
696 07:49:03.304222 PCI: 00:15.3 [8086/4deb] enabled
697 07:49:03.307896 PCI: 00:16.0 [8086/0000] ops
698 07:49:03.311159 PCI: 00:16.0 [8086/4de0] enabled
699 07:49:03.314548 PCI: 00:19.0 [8086/0000] bus ops
700 07:49:03.317537 PCI: 00:19.0 [8086/4dc5] enabled
701 07:49:03.320745 PCI: 00:19.2 [8086/0000] ops
702 07:49:03.324221 PCI: 00:19.2 [8086/4dc7] enabled
703 07:49:03.327718 PCI: 00:1a.0 [8086/0000] ops
704 07:49:03.330651 PCI: 00:1a.0 [8086/4dc4] enabled
705 07:49:03.334174 PCI: 00:1e.0 [8086/0000] ops
706 07:49:03.337706 PCI: 00:1e.0 [8086/4da8] disabled
707 07:49:03.340573 PCI: 00:1e.2 [8086/0000] bus ops
708 07:49:03.343788 PCI: 00:1e.2 [8086/4daa] enabled
709 07:49:03.347162 PCI: 00:1f.0 [8086/0000] bus ops
710 07:49:03.350855 PCI: 00:1f.0 [8086/4d87] enabled
711 07:49:03.354433 PCI: Static device PCI: 00:1f.1 not found, disabling it.
712 07:49:03.358113 RTC Init
713 07:49:03.361685 Set power on after power failure.
714 07:49:03.361783 Disabling Deep S3
715 07:49:03.364952 Disabling Deep S3
716 07:49:03.365045 Disabling Deep S4
717 07:49:03.368458 Disabling Deep S4
718 07:49:03.368548 Disabling Deep S5
719 07:49:03.371470 Disabling Deep S5
720 07:49:03.375043 PCI: 00:1f.2 [0000/0000] hidden
721 07:49:03.378145 PCI: 00:1f.3 [8086/0000] bus ops
722 07:49:03.381288 PCI: 00:1f.3 [8086/4dc8] enabled
723 07:49:03.384313 PCI: 00:1f.5 [8086/0000] bus ops
724 07:49:03.387733 PCI: 00:1f.5 [8086/4da4] enabled
725 07:49:03.391057 PCI: Leftover static devices:
726 07:49:03.391148 PCI: 00:12.6
727 07:49:03.394777 PCI: 00:09.0
728 07:49:03.394866 PCI: 00:14.1
729 07:49:03.394933 PCI: 00:16.1
730 07:49:03.397934 PCI: 00:16.4
731 07:49:03.398021 PCI: 00:16.5
732 07:49:03.401087 PCI: 00:17.0
733 07:49:03.401178 PCI: 00:19.1
734 07:49:03.401246 PCI: 00:1e.1
735 07:49:03.404772
736 07:49:03.404863 PCI: 00:1e.3
737 07:49:03.404929 PCI: 00:1f.1
738 07:49:03.407933 PCI: 00:1f.4
739 07:49:03.408020 PCI: 00:1f.7
740 07:49:03.411546 PCI: Check your devicetree.cb.
741 07:49:03.414753 PCI: 00:02.0 scanning...
742 07:49:03.417779 scan_generic_bus for PCI: 00:02.0
743 07:49:03.421335 scan_generic_bus for PCI: 00:02.0 done
744 07:49:03.424519 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
745 07:49:03.428269 PCI: 00:04.0 scanning...
746 07:49:03.431331 scan_generic_bus for PCI: 00:04.0
747 07:49:03.434815 GENERIC: 0.0 enabled
748 07:49:03.441003 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
749 07:49:03.444708 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
750 07:49:03.447716 PCI: 00:05.0 scanning...
751 07:49:03.450923 scan_generic_bus for PCI: 00:05.0
752 07:49:03.454576 GENERIC: 0.0 enabled
753 07:49:03.460966 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
754 07:49:03.464310 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
755 07:49:03.467390 PCI: 00:14.0 scanning...
756 07:49:03.471044 scan_static_bus for PCI: 00:14.0
757 07:49:03.471137 USB0 port 0 enabled
758 07:49:03.474097 USB0 port 0 scanning...
759 07:49:03.477618 scan_static_bus for USB0 port 0
760 07:49:03.481084 USB2 port 0 enabled
761 07:49:03.481177 USB2 port 1 enabled
762 07:49:03.484563 USB2 port 2 enabled
763 07:49:03.487713 USB2 port 3 enabled
764 07:49:03.487806 USB2 port 4 disabled
765 07:49:03.491039 USB2 port 5 enabled
766 07:49:03.491128 USB2 port 6 disabled
767 07:49:03.493904
768 07:49:03.493994 USB2 port 7 enabled
769 07:49:03.497397 USB3 port 0 enabled
770 07:49:03.497490 USB3 port 1 enabled
771 07:49:03.500850 USB3 port 2 enabled
772 07:49:03.504083 USB3 port 3 enabled
773 07:49:03.504180 USB2 port 0 scanning...
774 07:49:03.507566 scan_static_bus for USB2 port 0
775 07:49:03.510892 scan_static_bus for USB2 port 0 done
776 07:49:03.517452 scan_bus: bus USB2 port 0 finished in 6 msecs
777 07:49:03.520780 USB2 port 1 scanning...
778 07:49:03.524099 scan_static_bus for USB2 port 1
779 07:49:03.527251 scan_static_bus for USB2 port 1 done
780 07:49:03.530604 scan_bus: bus USB2 port 1 finished in 6 msecs
781 07:49:03.534159 USB2 port 2 scanning...
782 07:49:03.537636 scan_static_bus for USB2 port 2
783 07:49:03.541001 scan_static_bus for USB2 port 2 done
784 07:49:03.544209 scan_bus: bus USB2 port 2 finished in 6 msecs
785 07:49:03.547203 USB2 port 3 scanning...
786 07:49:03.550619 scan_static_bus for USB2 port 3
787 07:49:03.553665 scan_static_bus for USB2 port 3 done
788 07:49:03.556948 scan_bus: bus USB2 port 3 finished in 6 msecs
789 07:49:03.560749
790 07:49:03.560885 USB2 port 5 scanning...
791 07:49:03.564031 scan_static_bus for USB2 port 5
792 07:49:03.567245 scan_static_bus for USB2 port 5 done
793 07:49:03.573966 scan_bus: bus USB2 port 5 finished in 6 msecs
794 07:49:03.574095 USB2 port 7 scanning...
795 07:49:03.577142 scan_static_bus for USB2 port 7
796 07:49:03.583786 scan_static_bus for USB2 port 7 done
797 07:49:03.587213 scan_bus: bus USB2 port 7 finished in 6 msecs
798 07:49:03.590601 USB3 port 0 scanning...
799 07:49:03.593933 scan_static_bus for USB3 port 0
800 07:49:03.597012 scan_static_bus for USB3 port 0 done
801 07:49:03.600843 scan_bus: bus USB3 port 0 finished in 6 msecs
802 07:49:03.603912 USB3 port 1 scanning...
803 07:49:03.607382 scan_static_bus for USB3 port 1
804 07:49:03.610672 scan_static_bus for USB3 port 1 done
805 07:49:03.613763 scan_bus: bus USB3 port 1 finished in 6 msecs
806 07:49:03.617167 USB3 port 2 scanning...
807 07:49:03.620358 scan_static_bus for USB3 port 2
808 07:49:03.623876 scan_static_bus for USB3 port 2 done
809 07:49:03.630637 scan_bus: bus USB3 port 2 finished in 6 msecs
810 07:49:03.630851 USB3 port 3 scanning...
811 07:49:03.633719 scan_static_bus for USB3 port 3
812 07:49:03.636889 scan_static_bus for USB3 port 3 done
813 07:49:03.640369
814 07:49:03.643913 scan_bus: bus USB3 port 3 finished in 6 msecs
815 07:49:03.646945 scan_static_bus for USB0 port 0 done
816 07:49:03.650515 scan_bus: bus USB0 port 0 finished in 172 msecs
817 07:49:03.656687 scan_static_bus for PCI: 00:14.0 done
818 07:49:03.660261 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
819 07:49:03.663748 PCI: 00:14.3 scanning...
820 07:49:03.667004 scan_static_bus for PCI: 00:14.3
821 07:49:03.667237 GENERIC: 0.0 enabled
822 07:49:03.673497 scan_static_bus for PCI: 00:14.3 done
823 07:49:03.676634 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
824 07:49:03.680054 PCI: 00:15.0 scanning...
825 07:49:03.683743 scan_static_bus for PCI: 00:15.0
826 07:49:03.683950 I2C: 00:2c enabled
827 07:49:03.686612 I2C: 00:15 enabled
828 07:49:03.690217 scan_static_bus for PCI: 00:15.0 done
829 07:49:03.697365 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
830 07:49:03.697606 PCI: 00:15.1 scanning...
831 07:49:03.699859 scan_static_bus for PCI: 00:15.1
832 07:49:03.706734 scan_static_bus for PCI: 00:15.1 done
833 07:49:03.710164 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
834 07:49:03.713202 PCI: 00:15.2 scanning...
835 07:49:03.716700 scan_static_bus for PCI: 00:15.2
836 07:49:03.716849 GENERIC: 0.0 disabled
837 07:49:03.719831 I2C: 00:15 enabled
838 07:49:03.723469 I2C: 00:10 disabled
839 07:49:03.723620 I2C: 00:10 disabled
840 07:49:03.726467 I2C: 00:2c enabled
841 07:49:03.726606 I2C: 00:40 enabled
842 07:49:03.729818 I2C: 00:10 enabled
843 07:49:03.733028 I2C: 00:39 enabled
844 07:49:03.736275 scan_static_bus for PCI: 00:15.2 done
845 07:49:03.739795 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
846 07:49:03.742842 PCI: 00:15.3 scanning...
847 07:49:03.746480 scan_static_bus for PCI: 00:15.3
848 07:49:03.749710 I2C: 00:36 enabled
849 07:49:03.749861 I2C: 00:10 disabled
850 07:49:03.753340 I2C: 00:0c enabled
851 07:49:03.753503 I2C: 00:50 enabled
852 07:49:03.756652 scan_static_bus for PCI: 00:15.3 done
853 07:49:03.759909
854 07:49:03.763234 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
855 07:49:03.766336 PCI: 00:19.0 scanning...
856 07:49:03.769746 scan_static_bus for PCI: 00:19.0
857 07:49:03.769843 I2C: 00:1a enabled
858 07:49:03.772849 I2C: 00:1a disabled
859 07:49:03.776519 I2C: 00:1a disabled
860 07:49:03.776608 I2C: 00:28 enabled
861 07:49:03.779637 I2C: 00:29 enabled
862 07:49:03.783346 scan_static_bus for PCI: 00:19.0 done
863 07:49:03.786428 scan_bus: bus PCI: 00:19.0 finished in 16 msecs
864 07:49:03.789741 PCI: 00:1e.2 scanning...
865 07:49:03.793042 scan_generic_bus for PCI: 00:1e.2
866 07:49:03.796208 SPI: 00 enabled
867 07:49:03.799538 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
868 07:49:03.806034 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
869 07:49:03.809662 PCI: 00:1f.0 scanning...
870 07:49:03.812609 scan_static_bus for PCI: 00:1f.0
871 07:49:03.812699 PNP: 0c09.0 enabled
872 07:49:03.816183 PNP: 0c09.0 scanning...
873 07:49:03.819460 scan_static_bus for PNP: 0c09.0
874 07:49:03.822669 scan_static_bus for PNP: 0c09.0 done
875 07:49:03.829375 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
876 07:49:03.832499 scan_static_bus for PCI: 00:1f.0 done
877 07:49:03.836000 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
878 07:49:03.839257 PCI: 00:1f.3 scanning...
879 07:49:03.842675 scan_static_bus for PCI: 00:1f.3
880 07:49:03.845812 GENERIC: 0.0 disabled
881 07:49:03.849187 scan_static_bus for PCI: 00:1f.3 done
882 07:49:03.852626 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
883 07:49:03.855867 PCI: 00:1f.5 scanning...
884 07:49:03.859309 scan_generic_bus for PCI: 00:1f.5
885 07:49:03.862721 scan_generic_bus for PCI: 00:1f.5 done
886 07:49:03.869189 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
887 07:49:03.872485 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
888 07:49:03.876086 scan_static_bus for Root Device done
889 07:49:03.882338 scan_bus: bus Root Device finished in 663 msecs
890 07:49:03.882470 done
891 07:49:03.889139 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
892 07:49:03.892276 Chrome EC: UHEPI supported
893 07:49:03.895486 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
894 07:49:03.902355 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
895 07:49:03.905864 SPI flash protection: WPSW=1 SRP0=1
896 07:49:03.915302 fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
897 07:49:03.918754 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
898 07:49:03.925502 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 31 ms
899 07:49:03.928550 found VGA at PCI: 00:02.0
900 07:49:03.932023 Setting up VGA for PCI: 00:02.0
901 07:49:03.936341 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
902 07:49:03.940095 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
903 07:49:03.995045 Allocating resources...
904 07:49:03.995230 Reading resources...
905 07:49:03.995508 Root Device read_resources bus 0 link: 0
906 07:49:03.995584 CPU_CLUSTER: 0 read_resources bus 0 link: 0
907 07:49:03.995877 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
908 07:49:03.995947 DOMAIN: 0000 read_resources bus 0 link: 0
909 07:49:03.996012 PCI: 00:04.0 read_resources bus 1 link: 0
910 07:49:03.996074 PCI: 00:04.0 read_resources bus 1 link: 0 done
911 07:49:03.996346 PCI: 00:05.0 read_resources bus 2 link: 0
912 07:49:03.996631 PCI: 00:05.0 read_resources bus 2 link: 0 done
913 07:49:03.996709 PCI: 00:14.0 read_resources bus 0 link: 0
914 07:49:03.996774 USB0 port 0 read_resources bus 0 link: 0
915 07:49:04.049899 USB0 port 0 read_resources bus 0 link: 0 done
916 07:49:04.050304 PCI: 00:14.0 read_resources bus 0 link: 0 done
917 07:49:04.050400 PCI: 00:14.3 read_resources bus 0 link: 0
918 07:49:04.050470 PCI: 00:14.3 read_resources bus 0 link: 0 done
919 07:49:04.050722 PCI: 00:15.0 read_resources bus 0 link: 0
920 07:49:04.050804 PCI: 00:15.0 read_resources bus 0 link: 0 done
921 07:49:04.051056 PCI: 00:15.2 read_resources bus 0 link: 0
922 07:49:04.051314 PCI: 00:15.2 read_resources bus 0 link: 0 done
923 07:49:04.051947 PCI: 00:15.3 read_resources bus 0 link: 0
924 07:49:04.052042 PCI: 00:15.3 read_resources bus 0 link: 0 done
925 07:49:04.052301 PCI: 00:19.0 read_resources bus 0 link: 0
926 07:49:04.097741 PCI: 00:19.0 read_resources bus 0 link: 0 done
927 07:49:04.098019 PCI: 00:1e.2 read_resources bus 3 link: 0
928 07:49:04.098352 PCI: 00:1e.2 read_resources bus 3 link: 0 done
929 07:49:04.098479 PCI: 00:1f.0 read_resources bus 0 link: 0
930 07:49:04.098773 PCI: 00:1f.0 read_resources bus 0 link: 0 done
931 07:49:04.098864 PCI: 00:1f.3 read_resources bus 0 link: 0
932 07:49:04.099115 PCI: 00:1f.3 read_resources bus 0 link: 0 done
933 07:49:04.099511 DOMAIN: 0000 read_resources bus 0 link: 0 done
934 07:49:04.099630 Root Device read_resources bus 0 link: 0 done
935 07:49:04.099953 Done reading resources.
936 07:49:04.102707 Show resources in subtree (Root Device)...After reading.
937 07:49:04.102847 Root Device child on link 0 CPU_CLUSTER: 0
938 07:49:04.109253 CPU_CLUSTER: 0 child on link 0 APIC: 00
939 07:49:04.109410 APIC: 00
940 07:49:04.109482 APIC: 02
941 07:49:04.116295 DOMAIN: 0000 child on link 0 PCI: 00:00.0
942 07:49:04.126041 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
943 07:49:04.135739 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
944 07:49:04.135874 PCI: 00:00.0
945 07:49:04.145467 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
946 07:49:04.155554 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
947 07:49:04.165787 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
948 07:49:04.172149 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
949 07:49:04.182046 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
950 07:49:04.192251 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
951 07:49:04.201967 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
952 07:49:04.212029 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
953 07:49:04.218798 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
954 07:49:04.228095 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
955 07:49:04.238172 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
956 07:49:04.248489 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
957 07:49:04.258400 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
958 07:49:04.264790 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
959 07:49:04.274780 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
960 07:49:04.285012 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
961 07:49:04.294658 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
962 07:49:04.304570 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
963 07:49:04.314589 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
964 07:49:04.314767 PCI: 00:02.0
965 07:49:04.324610 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
966 07:49:04.334602 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
967 07:49:04.344602 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
968 07:49:04.347613 PCI: 00:04.0 child on link 0 GENERIC: 0.0
969 07:49:04.357650 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
970 07:49:04.361088 GENERIC: 0.0
971 07:49:04.364283 PCI: 00:05.0 child on link 0 GENERIC: 0.0
972 07:49:04.374784 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
973 07:49:04.377736 GENERIC: 0.0
974 07:49:04.377893 PCI: 00:08.0
975 07:49:04.387763 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
976 07:49:04.390773 PCI: 00:14.0 child on link 0 USB0 port 0
977 07:49:04.400927 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
978 07:49:04.407716 USB0 port 0 child on link 0 USB2 port 0
979 07:49:04.407826 USB2 port 0
980 07:49:04.411100 USB2 port 1
981 07:49:04.411189 USB2 port 2
982 07:49:04.414368 USB2 port 3
983 07:49:04.414457 USB2 port 4
984 07:49:04.417300 USB2 port 5
985 07:49:04.417390 USB2 port 6
986 07:49:04.420904 USB2 port 7
987 07:49:04.420997 USB3 port 0
988 07:49:04.424352 USB3 port 1
989 07:49:04.424442 USB3 port 2
990 07:49:04.427731 USB3 port 3
991 07:49:04.427820 PCI: 00:14.2
992 07:49:04.430819
993 07:49:04.434111 PCI: 00:14.3 child on link 0 GENERIC: 0.0
994 07:49:04.444186 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
995 07:49:04.444281 GENERIC: 0.0
996 07:49:04.447745 PCI: 00:14.5
997 07:49:04.457671 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
998 07:49:04.461136 PCI: 00:15.0 child on link 0 I2C: 00:2c
999 07:49:04.470956 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1000 07:49:04.473872 I2C: 00:2c
1001 07:49:04.474005 I2C: 00:15
1002 07:49:04.477494 PCI: 00:15.1
1003 07:49:04.484045 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 07:49:04.487174
1005 07:49:04.490502 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1006 07:49:04.500448 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 07:49:04.500543 GENERIC: 0.0
1008 07:49:04.503798 I2C: 00:15
1009 07:49:04.503885 I2C: 00:10
1010 07:49:04.507491 I2C: 00:10
1011 07:49:04.507581 I2C: 00:2c
1012 07:49:04.510478 I2C: 00:40
1013 07:49:04.510569 I2C: 00:10
1014 07:49:04.513644 I2C: 00:39
1015 07:49:04.517122 PCI: 00:15.3 child on link 0 I2C: 00:36
1016 07:49:04.527189 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 07:49:04.527287 I2C: 00:36
1018 07:49:04.530323 I2C: 00:10
1019 07:49:04.530415 I2C: 00:0c
1020 07:49:04.533463 I2C: 00:50
1021 07:49:04.533551 PCI: 00:16.0
1022 07:49:04.543906 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 07:49:04.550490 PCI: 00:19.0 child on link 0 I2C: 00:1a
1024 07:49:04.560293 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 07:49:04.560386 I2C: 00:1a
1026 07:49:04.560455 I2C: 00:1a
1027 07:49:04.563857
1028 07:49:04.563945 I2C: 00:1a
1029 07:49:04.564014 I2C: 00:28
1030 07:49:04.566938 I2C: 00:29
1031 07:49:04.567026 PCI: 00:19.2
1032 07:49:04.580327 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1033 07:49:04.590152 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1034 07:49:04.590293 PCI: 00:1a.0
1035 07:49:04.600019 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1036 07:49:04.603540 PCI: 00:1e.0
1037 07:49:04.606964 PCI: 00:1e.2 child on link 0 SPI: 00
1038 07:49:04.616913 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1039 07:49:04.617036 SPI: 00
1040 07:49:04.620778 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1041 07:49:04.631499 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1042 07:49:04.631619 PNP: 0c09.0
1043 07:49:04.641060 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1044 07:49:04.641184 PCI: 00:1f.2
1045 07:49:04.651316 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1046 07:49:04.661463 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1047 07:49:04.664707 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1048 07:49:04.674709 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1049 07:49:04.684600 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1050 07:49:04.688083 GENERIC: 0.0
1051 07:49:04.688207 PCI: 00:1f.5
1052 07:49:04.697701 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1053 07:49:04.704598 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1054 07:49:04.711561 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1055 07:49:04.718360 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1056 07:49:04.728118 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1057 07:49:04.734911 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1058 07:49:04.741351 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1059 07:49:04.744488 DOMAIN: 0000: Resource ranges:
1060 07:49:04.747894 * Base: 1000, Size: 800, Tag: 100
1061 07:49:04.751589 * Base: 1900, Size: e700, Tag: 100
1062 07:49:04.758139 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1063 07:49:04.764405 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1064 07:49:04.771117 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1065 07:49:04.778051 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1066 07:49:04.784409 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1067 07:49:04.787496
1068 07:49:04.794097 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1069 07:49:04.800930 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1070 07:49:04.808212 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1071 07:49:04.817632 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1072 07:49:04.824241 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1073 07:49:04.831074 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1074 07:49:04.840875 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1075 07:49:04.847660 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1076 07:49:04.854074 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1077 07:49:04.863975 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1078 07:49:04.870689 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1079 07:49:04.877058 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1080 07:49:04.883893 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1081 07:49:04.887271
1082 07:49:04.893745 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1083 07:49:04.900567 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1084 07:49:04.907327 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1085 07:49:04.916873 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1086 07:49:04.924138 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1087 07:49:04.930464 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1088 07:49:04.934025 DOMAIN: 0000: Resource ranges:
1089 07:49:04.940453 * Base: 7fc00000, Size: 40400000, Tag: 200
1090 07:49:04.943817 * Base: d0000000, Size: 2b000000, Tag: 200
1091 07:49:04.947273 * Base: fb001000, Size: 2fff000, Tag: 200
1092 07:49:04.950729 * Base: fe010000, Size: 22000, Tag: 200
1093 07:49:04.957215 * Base: fe033000, Size: a4d000, Tag: 200
1094 07:49:04.960400 * Base: fea88000, Size: 2f8000, Tag: 200
1095 07:49:04.963656 * Base: fed88000, Size: 8000, Tag: 200
1096 07:49:04.967065 * Base: fed93000, Size: d000, Tag: 200
1097 07:49:04.973831 * Base: feda2000, Size: 125e000, Tag: 200
1098 07:49:04.976880 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1099 07:49:04.984009 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1100 07:49:04.990429 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1101 07:49:04.997040 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1102 07:49:05.003753 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1103 07:49:05.010025 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1104 07:49:05.017301 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1105 07:49:05.023104 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1106 07:49:05.029840 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1107 07:49:05.036468 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1108 07:49:05.043474 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1109 07:49:05.050098 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1110 07:49:05.056327 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1111 07:49:05.062966 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1112 07:49:05.069753 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1113 07:49:05.076132 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1114 07:49:05.083026 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1115 07:49:05.089077 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1116 07:49:05.095964 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1117 07:49:05.102703 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1118 07:49:05.109036 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1119 07:49:05.115459 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1120 07:49:05.125622 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1121 07:49:05.128886 Root Device assign_resources, bus 0 link: 0
1122 07:49:05.132182 DOMAIN: 0000 assign_resources, bus 0 link: 0
1123 07:49:05.142320 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1124 07:49:05.148723 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1125 07:49:05.158474 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1126 07:49:05.165027 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1127 07:49:05.168746 PCI: 00:04.0 assign_resources, bus 1 link: 0
1128 07:49:05.175222 PCI: 00:04.0 assign_resources, bus 1 link: 0
1129 07:49:05.182188 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1130 07:49:05.188722 PCI: 00:05.0 assign_resources, bus 2 link: 0
1131 07:49:05.192334 PCI: 00:05.0 assign_resources, bus 2 link: 0
1132 07:49:05.198990 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1133 07:49:05.209916 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1134 07:49:05.213142 PCI: 00:14.0 assign_resources, bus 0 link: 0
1135 07:49:05.216147 PCI: 00:14.0 assign_resources, bus 0 link: 0
1136 07:49:05.226511 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1137 07:49:05.229685 PCI: 00:14.3 assign_resources, bus 0 link: 0
1138 07:49:05.233199 PCI: 00:14.3 assign_resources, bus 0 link: 0
1139 07:49:05.236564
1140 07:49:05.243235 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1141 07:49:05.249664 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1142 07:49:05.256307 PCI: 00:15.0 assign_resources, bus 0 link: 0
1143 07:49:05.259975 PCI: 00:15.0 assign_resources, bus 0 link: 0
1144 07:49:05.269672 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1145 07:49:05.276090 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1146 07:49:05.279163 PCI: 00:15.2 assign_resources, bus 0 link: 0
1147 07:49:05.285823 PCI: 00:15.2 assign_resources, bus 0 link: 0
1148 07:49:05.292769 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1149 07:49:05.299085 PCI: 00:15.3 assign_resources, bus 0 link: 0
1150 07:49:05.302514 PCI: 00:15.3 assign_resources, bus 0 link: 0
1151 07:49:05.309328 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1152 07:49:05.319556 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1153 07:49:05.322686 PCI: 00:19.0 assign_resources, bus 0 link: 0
1154 07:49:05.329543 PCI: 00:19.0 assign_resources, bus 0 link: 0
1155 07:49:05.335939 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1156 07:49:05.346098 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1157 07:49:05.352599 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1158 07:49:05.355881 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1159 07:49:05.362652 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1160 07:49:05.365890 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1161 07:49:05.372509 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1162 07:49:05.376127 LPC: Trying to open IO window from 800 size 1ff
1163 07:49:05.385765 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1164 07:49:05.392576 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1165 07:49:05.395514 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1166 07:49:05.402399 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1167 07:49:05.409014 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1168 07:49:05.412227 DOMAIN: 0000 assign_resources, bus 0 link: 0
1169 07:49:05.419003 Root Device assign_resources, bus 0 link: 0
1170 07:49:05.422050 Done setting resources.
1171 07:49:05.428936 Show resources in subtree (Root Device)...After assigning values.
1172 07:49:05.432274 Root Device child on link 0 CPU_CLUSTER: 0
1173 07:49:05.435431 CPU_CLUSTER: 0 child on link 0 APIC: 00
1174 07:49:05.435519 APIC: 00
1175 07:49:05.439121 APIC: 02
1176 07:49:05.441979 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1177 07:49:05.452071 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1178 07:49:05.462185 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1179 07:49:05.462299 PCI: 00:00.0
1180 07:49:05.472074 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1181 07:49:05.482302 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1182 07:49:05.492122 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1183 07:49:05.501802 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1184 07:49:05.508399 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1185 07:49:05.518650 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1186 07:49:05.528731 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1187 07:49:05.538935 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1188 07:49:05.548753 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1189 07:49:05.555281 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1190 07:49:05.565253 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1191 07:49:05.574990 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1192 07:49:05.584790 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1193 07:49:05.595068 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1194 07:49:05.601664 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1195 07:49:05.611484 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1196 07:49:05.621348 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1197 07:49:05.631174 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1198 07:49:05.641244 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1199 07:49:05.641352 PCI: 00:02.0
1200 07:49:05.651384 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1201 07:49:05.664872 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1202 07:49:05.671406 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1203 07:49:05.677951 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1204 07:49:05.687799 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1205 07:49:05.687891 GENERIC: 0.0
1206 07:49:05.694849 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1207 07:49:05.704316 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1208 07:49:05.704415 GENERIC: 0.0
1209 07:49:05.707621 PCI: 00:08.0
1210 07:49:05.717633 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1211 07:49:05.721097 PCI: 00:14.0 child on link 0 USB0 port 0
1212 07:49:05.731226 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1213 07:49:05.737589 USB0 port 0 child on link 0 USB2 port 0
1214 07:49:05.737695 USB2 port 0
1215 07:49:05.741091 USB2 port 1
1216 07:49:05.741205 USB2 port 2
1217 07:49:05.744747 USB2 port 3
1218 07:49:05.744834 USB2 port 4
1219 07:49:05.747614 USB2 port 5
1220 07:49:05.747719 USB2 port 6
1221 07:49:05.751535 USB2 port 7
1222 07:49:05.754501 USB3 port 0
1223 07:49:05.754590 USB3 port 1
1224 07:49:05.757672 USB3 port 2
1225 07:49:05.757761 USB3 port 3
1226 07:49:05.761417 PCI: 00:14.2
1227 07:49:05.764621 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1228 07:49:05.774519 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1229 07:49:05.777599 GENERIC: 0.0
1230 07:49:05.777688 PCI: 00:14.5
1231 07:49:05.787709 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1232 07:49:05.790986 PCI: 00:15.0 child on link 0 I2C: 00:2c
1233 07:49:05.800906 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1234 07:49:05.804531 I2C: 00:2c
1235 07:49:05.804620 I2C: 00:15
1236 07:49:05.807451 PCI: 00:15.1
1237 07:49:05.818193 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1238 07:49:05.820883 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1239 07:49:05.831295 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1240 07:49:05.834540 GENERIC: 0.0
1241 07:49:05.834632 I2C: 00:15
1242 07:49:05.837976 I2C: 00:10
1243 07:49:05.838070 I2C: 00:10
1244 07:49:05.841103 I2C: 00:2c
1245 07:49:05.841191 I2C: 00:40
1246 07:49:05.844327 I2C: 00:10
1247 07:49:05.844415 I2C: 00:39
1248 07:49:05.850758 PCI: 00:15.3 child on link 0 I2C: 00:36
1249 07:49:05.861113 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1250 07:49:05.861209 I2C: 00:36
1251 07:49:05.864385 I2C: 00:10
1252 07:49:05.864473 I2C: 00:0c
1253 07:49:05.867646 I2C: 00:50
1254 07:49:05.867734 PCI: 00:16.0
1255 07:49:05.877651 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1256 07:49:05.880802 PCI: 00:19.0 child on link 0 I2C: 00:1a
1257 07:49:05.894164 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1258 07:49:05.894280 I2C: 00:1a
1259 07:49:05.894350 I2C: 00:1a
1260 07:49:05.897321
1261 07:49:05.897409 I2C: 00:1a
1262 07:49:05.897477 I2C: 00:28
1263 07:49:05.900702 I2C: 00:29
1264 07:49:05.900790 PCI: 00:19.2
1265 07:49:05.913693 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1266 07:49:05.923540 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1267 07:49:05.923642 PCI: 00:1a.0
1268 07:49:05.933506 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1269 07:49:05.937207 PCI: 00:1e.0
1270 07:49:05.940123 PCI: 00:1e.2 child on link 0 SPI: 00
1271 07:49:05.949970 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1272 07:49:05.953136 SPI: 00
1273 07:49:05.956570 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1274 07:49:05.966789 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1275 07:49:05.966879 PNP: 0c09.0
1276 07:49:05.976873 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1277 07:49:05.976962 PCI: 00:1f.2
1278 07:49:05.986332 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1279 07:49:05.996563 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1280 07:49:05.999707 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1281 07:49:06.009827 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1282 07:49:06.020032 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1283 07:49:06.023113 GENERIC: 0.0
1284 07:49:06.023201 PCI: 00:1f.5
1285 07:49:06.036390 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1286 07:49:06.036482 Done allocating resources.
1287 07:49:06.042928 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2092 ms
1288 07:49:06.046237 Enabling resources...
1289 07:49:06.049765 PCI: 00:00.0 subsystem <- 8086/4e22
1290 07:49:06.052876 PCI: 00:00.0 cmd <- 06
1291 07:49:06.056677 PCI: 00:02.0 subsystem <- 8086/4e55
1292 07:49:06.059809 PCI: 00:02.0 cmd <- 03
1293 07:49:06.062847 PCI: 00:04.0 subsystem <- 8086/4e03
1294 07:49:06.066566 PCI: 00:04.0 cmd <- 02
1295 07:49:06.069717 PCI: 00:05.0 bridge ctrl <- 0003
1296 07:49:06.072796 PCI: 00:05.0 subsystem <- 8086/4e19
1297 07:49:06.072884 PCI: 00:05.0 cmd <- 02
1298 07:49:06.076092 PCI: 00:08.0 cmd <- 06
1299 07:49:06.079909 PCI: 00:14.0 subsystem <- 8086/4ded
1300 07:49:06.083198 PCI: 00:14.0 cmd <- 02
1301 07:49:06.086521 PCI: 00:14.3 subsystem <- 8086/4df0
1302 07:49:06.090116 PCI: 00:14.3 cmd <- 02
1303 07:49:06.093423 PCI: 00:14.5 subsystem <- 8086/4df8
1304 07:49:06.096312 PCI: 00:14.5 cmd <- 06
1305 07:49:06.099981 PCI: 00:15.0 subsystem <- 8086/4de8
1306 07:49:06.100068 PCI: 00:15.0 cmd <- 02
1307 07:49:06.106785 PCI: 00:15.1 subsystem <- 8086/4de9
1308 07:49:06.106894 PCI: 00:15.1 cmd <- 02
1309 07:49:06.109785 PCI: 00:15.2 subsystem <- 8086/4dea
1310 07:49:06.113053 PCI: 00:15.2 cmd <- 02
1311 07:49:06.116794 PCI: 00:15.3 subsystem <- 8086/4deb
1312 07:49:06.119952 PCI: 00:15.3 cmd <- 02
1313 07:49:06.123284 PCI: 00:16.0 subsystem <- 8086/4de0
1314 07:49:06.126220 PCI: 00:16.0 cmd <- 02
1315 07:49:06.129669 PCI: 00:19.0 subsystem <- 8086/4dc5
1316 07:49:06.132932 PCI: 00:19.0 cmd <- 02
1317 07:49:06.136077 PCI: 00:19.2 subsystem <- 8086/4dc7
1318 07:49:06.136164 PCI: 00:19.2 cmd <- 06
1319 07:49:06.143001 PCI: 00:1a.0 subsystem <- 8086/4dc4
1320 07:49:06.143088 PCI: 00:1a.0 cmd <- 06
1321 07:49:06.146461 PCI: 00:1e.2 subsystem <- 8086/4daa
1322 07:49:06.149507 PCI: 00:1e.2 cmd <- 06
1323 07:49:06.153293 PCI: 00:1f.0 subsystem <- 8086/4d87
1324 07:49:06.156415 PCI: 00:1f.0 cmd <- 407
1325 07:49:06.159903 PCI: 00:1f.3 subsystem <- 8086/4dc8
1326 07:49:06.162874 PCI: 00:1f.3 cmd <- 02
1327 07:49:06.166199 PCI: 00:1f.5 subsystem <- 8086/4da4
1328 07:49:06.169916 PCI: 00:1f.5 cmd <- 406
1329 07:49:06.173234 done.
1330 07:49:06.176647 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1331 07:49:06.179724 Initializing devices...
1332 07:49:06.182973 Root Device init
1333 07:49:06.183059 mainboard: EC init
1334 07:49:06.189417 Chrome EC: Set SMI mask to 0x0000000000000000
1335 07:49:06.192800 Chrome EC: clear events_b mask to 0x0000000000000000
1336 07:49:06.199710 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1337 07:49:06.206235 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1338 07:49:06.213075 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1339 07:49:06.216105 Chrome EC: Set WAKE mask to 0x0000000000000000
1340 07:49:06.223689 Root Device init finished in 36 msecs
1341 07:49:06.227136 PCI: 00:00.0 init
1342 07:49:06.227223 CPU TDP = 6 Watts
1343 07:49:06.230423 CPU PL1 = 7 Watts
1344 07:49:06.233284 CPU PL2 = 12 Watts
1345 07:49:06.236964 PCI: 00:00.0 init finished in 6 msecs
1346 07:49:06.237052 PCI: 00:02.0 init
1347 07:49:06.240400 GMA: Found VBT in CBFS
1348 07:49:06.243640 GMA: Found valid VBT in CBFS
1349 07:49:06.250131 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1350 07:49:06.257258 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1351 07:49:06.260119 PCI: 00:02.0 init finished in 18 msecs
1352 07:49:06.263302 PCI: 00:08.0 init
1353 07:49:06.266620 PCI: 00:08.0 init finished in 0 msecs
1354 07:49:06.270349 PCI: 00:14.0 init
1355 07:49:06.273496 XHCI: Updated LFPS sampling OFF time to 9 ms
1356 07:49:06.276700 PCI: 00:14.0 init finished in 4 msecs
1357 07:49:06.280733 PCI: 00:15.0 init
1358 07:49:06.283735 I2C bus 0 version 0x3230302a
1359 07:49:06.287127 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1360 07:49:06.290675 PCI: 00:15.0 init finished in 6 msecs
1361 07:49:06.293834 PCI: 00:15.1 init
1362 07:49:06.297087 I2C bus 1 version 0x3230302a
1363 07:49:06.300023 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1364 07:49:06.303411 PCI: 00:15.1 init finished in 6 msecs
1365 07:49:06.303498 PCI: 00:15.2 init
1366 07:49:06.306824 I2C bus 2 version 0x3230302a
1367 07:49:06.310452 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1368 07:49:06.316824 PCI: 00:15.2 init finished in 6 msecs
1369 07:49:06.316912 PCI: 00:15.3 init
1370 07:49:06.320030 I2C bus 3 version 0x3230302a
1371 07:49:06.323505 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1372 07:49:06.326977 PCI: 00:15.3 init finished in 6 msecs
1373 07:49:06.330151 PCI: 00:16.0 init
1374 07:49:06.333530 PCI: 00:16.0 init finished in 0 msecs
1375 07:49:06.336620 PCI: 00:19.0 init
1376 07:49:06.340229 I2C bus 4 version 0x3230302a
1377 07:49:06.343278 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1378 07:49:06.346734 PCI: 00:19.0 init finished in 6 msecs
1379 07:49:06.350151 PCI: 00:1a.0 init
1380 07:49:06.353476 PCI: 00:1a.0 init finished in 0 msecs
1381 07:49:06.353564 PCI: 00:1f.0 init
1382 07:49:06.359913 IOAPIC: Initializing IOAPIC at 0xfec00000
1383 07:49:06.363706 IOAPIC: Bootstrap Processor Local APIC = 0x00
1384 07:49:06.366885 IOAPIC: ID = 0x02
1385 07:49:06.366972 IOAPIC: Dumping registers
1386 07:49:06.370015 reg 0x0000: 0x02000000
1387 07:49:06.373178 reg 0x0001: 0x00770020
1388 07:49:06.376931 reg 0x0002: 0x00000000
1389 07:49:06.380042 PCI: 00:1f.0 init finished in 21 msecs
1390 07:49:06.383642 PCI: 00:1f.2 init
1391 07:49:06.383729 Disabling ACPI via APMC.
1392 07:49:06.389349 APMC done.
1393 07:49:06.392478 PCI: 00:1f.2 init finished in 6 msecs
1394 07:49:06.403477 PNP: 0c09.0 init
1395 07:49:06.406768 Google Chrome EC uptime: 6.574 seconds
1396 07:49:06.414020 Google Chrome AP resets since EC boot: 0
1397 07:49:06.417141 Google Chrome most recent AP reset causes:
1398 07:49:06.423714 Google Chrome EC reset flags at last EC boot: reset-pin
1399 07:49:06.426966 PNP: 0c09.0 init finished in 18 msecs
1400 07:49:06.427052 Devices initialized
1401 07:49:06.430120 Show all devs... After init.
1402 07:49:06.434019 Root Device: enabled 1
1403 07:49:06.437131 CPU_CLUSTER: 0: enabled 1
1404 07:49:06.440335 DOMAIN: 0000: enabled 1
1405 07:49:06.440422 PCI: 00:00.0: enabled 1
1406 07:49:06.443554 PCI: 00:02.0: enabled 1
1407 07:49:06.446645 PCI: 00:04.0: enabled 1
1408 07:49:06.446731 PCI: 00:05.0: enabled 1
1409 07:49:06.450124 PCI: 00:09.0: enabled 0
1410 07:49:06.453513 PCI: 00:12.6: enabled 0
1411 07:49:06.456940 PCI: 00:14.0: enabled 1
1412 07:49:06.457028 PCI: 00:14.1: enabled 0
1413 07:49:06.460205 PCI: 00:14.2: enabled 0
1414 07:49:06.463415 PCI: 00:14.3: enabled 1
1415 07:49:06.466826 PCI: 00:14.5: enabled 1
1416 07:49:06.466912 PCI: 00:15.0: enabled 1
1417 07:49:06.470627 PCI: 00:15.1: enabled 1
1418 07:49:06.473713 PCI: 00:15.2: enabled 1
1419 07:49:06.473811 PCI: 00:15.3: enabled 1
1420 07:49:06.476953 PCI: 00:16.0: enabled 1
1421 07:49:06.480345 PCI: 00:16.1: enabled 0
1422 07:49:06.483464 PCI: 00:16.4: enabled 0
1423 07:49:06.483553 PCI: 00:16.5: enabled 0
1424 07:49:06.487095 PCI: 00:17.0: enabled 0
1425 07:49:06.490420 PCI: 00:19.0: enabled 1
1426 07:49:06.493291 PCI: 00:19.1: enabled 0
1427 07:49:06.493378 PCI: 00:19.2: enabled 1
1428 07:49:06.496694 PCI: 00:1a.0: enabled 1
1429 07:49:06.500161 PCI: 00:1c.0: enabled 0
1430 07:49:06.500256 PCI: 00:1c.1: enabled 0
1431 07:49:06.503570 PCI: 00:1c.2: enabled 0
1432 07:49:06.506972 PCI: 00:1c.3: enabled 0
1433 07:49:06.510479 PCI: 00:1c.4: enabled 0
1434 07:49:06.510590 PCI: 00:1c.5: enabled 0
1435 07:49:06.513530 PCI: 00:1c.6: enabled 0
1436 07:49:06.516834 PCI: 00:1c.7: enabled 1
1437 07:49:06.516922 PCI: 00:1e.0: enabled 0
1438 07:49:06.520499
1439 07:49:06.520586 PCI: 00:1e.1: enabled 0
1440 07:49:06.523973 PCI: 00:1e.2: enabled 1
1441 07:49:06.526975 PCI: 00:1e.3: enabled 0
1442 07:49:06.527062 PCI: 00:1f.0: enabled 1
1443 07:49:06.530134 PCI: 00:1f.1: enabled 0
1444 07:49:06.533722 PCI: 00:1f.2: enabled 1
1445 07:49:06.536997 PCI: 00:1f.3: enabled 1
1446 07:49:06.537084 PCI: 00:1f.4: enabled 0
1447 07:49:06.540659 PCI: 00:1f.5: enabled 1
1448 07:49:06.543674 PCI: 00:1f.7: enabled 0
1449 07:49:06.543761 GENERIC: 0.0: enabled 1
1450 07:49:06.546897
1451 07:49:06.546985 GENERIC: 0.0: enabled 1
1452 07:49:06.550342 USB0 port 0: enabled 1
1453 07:49:06.553605 GENERIC: 0.0: enabled 1
1454 07:49:06.553692 I2C: 00:2c: enabled 1
1455 07:49:06.557091 I2C: 00:15: enabled 1
1456 07:49:06.560077 GENERIC: 0.0: enabled 0
1457 07:49:06.560206 I2C: 00:15: enabled 1
1458 07:49:06.563310 I2C: 00:10: enabled 0
1459 07:49:06.567184 I2C: 00:10: enabled 0
1460 07:49:06.567282 I2C: 00:2c: enabled 1
1461 07:49:06.569995 I2C: 00:40: enabled 1
1462 07:49:06.573492 I2C: 00:10: enabled 1
1463 07:49:06.576358 I2C: 00:39: enabled 1
1464 07:49:06.576446 I2C: 00:36: enabled 1
1465 07:49:06.579923 I2C: 00:10: enabled 0
1466 07:49:06.582974 I2C: 00:0c: enabled 1
1467 07:49:06.583051 I2C: 00:50: enabled 1
1468 07:49:06.586495 I2C: 00:1a: enabled 1
1469 07:49:06.589942 I2C: 00:1a: enabled 0
1470 07:49:06.590027 I2C: 00:1a: enabled 0
1471 07:49:06.592923 I2C: 00:28: enabled 1
1472 07:49:06.596564 I2C: 00:29: enabled 1
1473 07:49:06.596652 PCI: 00:00.0: enabled 1
1474 07:49:06.599506 SPI: 00: enabled 1
1475 07:49:06.602857 PNP: 0c09.0: enabled 1
1476 07:49:06.602944 GENERIC: 0.0: enabled 0
1477 07:49:06.606052 USB2 port 0: enabled 1
1478 07:49:06.609529 USB2 port 1: enabled 1
1479 07:49:06.612606 USB2 port 2: enabled 1
1480 07:49:06.612724 USB2 port 3: enabled 1
1481 07:49:06.616408 USB2 port 4: enabled 0
1482 07:49:06.619464 USB2 port 5: enabled 1
1483 07:49:06.619559 USB2 port 6: enabled 0
1484 07:49:06.622786 USB2 port 7: enabled 1
1485 07:49:06.625821 USB3 port 0: enabled 1
1486 07:49:06.625953 USB3 port 1: enabled 1
1487 07:49:06.629301 USB3 port 2: enabled 1
1488 07:49:06.632938 USB3 port 3: enabled 1
1489 07:49:06.633039 APIC: 00: enabled 1
1490 07:49:06.636589 APIC: 02: enabled 1
1491 07:49:06.639600 PCI: 00:08.0: enabled 1
1492 07:49:06.642940 BS: BS_DEV_INIT run times (exec / console): 25 / 436 ms
1493 07:49:06.649477 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1494 07:49:06.652562 ELOG: NV offset 0xbfa000 size 0x1000
1495 07:49:06.659343 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1496 07:49:06.666078 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:05 UTC
1497 07:49:06.672897 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:05 UTC
1498 07:49:06.679492 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:05 UTC
1499 07:49:06.685853 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:05 UTC
1500 07:49:06.692425 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:05 UTC
1501 07:49:06.696072 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1502 07:49:06.703003 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:05 UTC
1503 07:49:06.712612 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1504 07:49:06.716155 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:05 UTC
1505 07:49:06.719709
1506 07:49:06.722763 elog_add_boot_reason: Logged dev mode boot
1507 07:49:06.726035 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1508 07:49:06.729663
1509 07:49:06.729757 Finalize devices...
1510 07:49:06.733039 Devices finalized
1511 07:49:06.736108 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1512 07:49:06.742883 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1513 07:49:06.749573 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1514 07:49:06.752560 ME: HFSTS1 : 0x80030045
1515 07:49:06.755996 ME: HFSTS2 : 0x30280136
1516 07:49:06.759858 ME: HFSTS3 : 0x00000050
1517 07:49:06.762817 ME: HFSTS4 : 0x00004000
1518 07:49:06.769423 ME: HFSTS5 : 0x00000000
1519 07:49:06.772762 ME: HFSTS6 : 0x40400006
1520 07:49:06.775956 ME: Manufacturing Mode : NO
1521 07:49:06.779284 ME: FW Partition Table : OK
1522 07:49:06.782605 ME: Bringup Loader Failure : NO
1523 07:49:06.786171 ME: Firmware Init Complete : NO
1524 07:49:06.789370 ME: Boot Options Present : NO
1525 07:49:06.792546 ME: Update In Progress : NO
1526 07:49:06.795592 ME: D0i3 Support : YES
1527 07:49:06.799137 ME: Low Power State Enabled : NO
1528 07:49:06.802357 ME: CPU Replaced : YES
1529 07:49:06.805787 ME: CPU Replacement Valid : YES
1530 07:49:06.809374 ME: Current Working State : 5
1531 07:49:06.812671 ME: Current Operation State : 1
1532 07:49:06.815788 ME: Current Operation Mode : 3
1533 07:49:06.818885 ME: Error Code : 0
1534 07:49:06.822094 ME: CPU Debug Disabled : YES
1535 07:49:06.825721 ME: TXT Support : NO
1536 07:49:06.832203 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1537 07:49:06.835737 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1538 07:49:06.842440 ACPI: Writing ACPI tables at 76b27000.
1539 07:49:06.842527 ACPI: * FACS
1540 07:49:06.845855 ACPI: * DSDT
1541 07:49:06.848926 Ramoops buffer: 0x100000@0x76a26000.
1542 07:49:06.852250 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1543 07:49:06.859403 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1544 07:49:06.862100 Google Chrome EC: version:
1545 07:49:06.865295 ro: magolor_1.1.9999-103b6f9
1546 07:49:06.865383 rw: magolor_1.1.9999-103b6f9
1547 07:49:06.868876 running image: 1
1548 07:49:06.875309 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1549 07:49:06.878844 ACPI: * FADT
1550 07:49:06.878932 SCI is IRQ9
1551 07:49:06.882320 ACPI: added table 1/32, length now 40
1552 07:49:06.885461 ACPI: * SSDT
1553 07:49:06.888619 Found 1 CPU(s) with 2 core(s) each.
1554 07:49:06.892092 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1555 07:49:06.898819 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1556 07:49:06.902163 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1557 07:49:06.908550 WARNING: RO_VPD is uninitialized or empty.
1558 07:49:06.911932 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1559 07:49:06.915465 WARNING: RW_VPD is uninitialized or empty.
1560 07:49:06.918961 Could not locate 'wifi_sar' in VPD.
1561 07:49:06.924936 Checking CBFS for default SAR values
1562 07:49:06.928548 wifi_sar_defaults.hex has bad len in CBFS
1563 07:49:06.931721 failed from getting SAR limits!
1564 07:49:06.935466 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1565 07:49:06.941931 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1566 07:49:06.945010 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1567 07:49:06.952209 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1568 07:49:06.955480 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1569 07:49:06.958266
1570 07:49:06.961962 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1571 07:49:06.968134 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1572 07:49:06.971649 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1573 07:49:06.978128 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1574 07:49:06.984679 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1575 07:49:06.991746 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1576 07:49:06.994922 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1577 07:49:07.001261 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1578 07:49:07.008233 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1579 07:49:07.011160 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1580 07:49:07.018032 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1581 07:49:07.021235 PS2K: Passing 101 keymaps to kernel
1582 07:49:07.024716 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1583 07:49:07.027887
1584 07:49:07.031415 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1585 07:49:07.037960 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1586 07:49:07.044396 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1587 07:49:07.047820 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1588 07:49:07.054632 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1589 07:49:07.057861 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1590 07:49:07.064293 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1591 07:49:07.070720 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1592 07:49:07.077237 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1593 07:49:07.080810 ACPI: added table 2/32, length now 44
1594 07:49:07.080898 ACPI: * MCFG
1595 07:49:07.087426 ACPI: added table 3/32, length now 48
1596 07:49:07.087513 ACPI: * TPM2
1597 07:49:07.090713 TPM2 log created at 0x76a16000
1598 07:49:07.094045 ACPI: added table 4/32, length now 52
1599 07:49:07.097723 ACPI: * MADT
1600 07:49:07.097810 SCI is IRQ9
1601 07:49:07.100715 ACPI: added table 5/32, length now 56
1602 07:49:07.104110 current = 76b2d580
1603 07:49:07.104193 ACPI: * DMAR
1604 07:49:07.107404 ACPI: added table 6/32, length now 60
1605 07:49:07.110669 ACPI: added table 7/32, length now 64
1606 07:49:07.113868 ACPI: * HPET
1607 07:49:07.117279 ACPI: added table 8/32, length now 68
1608 07:49:07.117367 ACPI: done.
1609 07:49:07.120795 ACPI tables: 26304 bytes.
1610 07:49:07.124204 smbios_write_tables: 76a15000
1611 07:49:07.127715 EC returned error result code 3
1612 07:49:07.131055 Couldn't obtain OEM name from CBI
1613 07:49:07.134119 Create SMBIOS type 16
1614 07:49:07.137775 Create SMBIOS type 17
1615 07:49:07.141093 GENERIC: 0.0 (WIFI Device)
1616 07:49:07.141181 SMBIOS tables: 913 bytes.
1617 07:49:07.147834 Writing table forward entry at 0x00000500
1618 07:49:07.150932 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1619 07:49:07.154541
1620 07:49:07.157647 Writing coreboot table at 0x76b4b000
1621 07:49:07.160910 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1622 07:49:07.167432 1. 0000000000001000-000000000009ffff: RAM
1623 07:49:07.171102 2. 00000000000a0000-00000000000fffff: RESERVED
1624 07:49:07.174360 3. 0000000000100000-0000000076a14fff: RAM
1625 07:49:07.180799 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1626 07:49:07.187681 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1627 07:49:07.190973 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1628 07:49:07.197927 7. 0000000077000000-000000007fbfffff: RESERVED
1629 07:49:07.200835 8. 00000000c0000000-00000000cfffffff: RESERVED
1630 07:49:07.207704 9. 00000000fb000000-00000000fb000fff: RESERVED
1631 07:49:07.210641 10. 00000000fe000000-00000000fe00ffff: RESERVED
1632 07:49:07.217313 11. 00000000fea80000-00000000fea87fff: RESERVED
1633 07:49:07.220571 12. 00000000fed80000-00000000fed87fff: RESERVED
1634 07:49:07.223762 13. 00000000fed90000-00000000fed92fff: RESERVED
1635 07:49:07.230859 14. 00000000feda0000-00000000feda1fff: RESERVED
1636 07:49:07.234373 15. 0000000100000000-00000001803fffff: RAM
1637 07:49:07.237388 Passing 4 GPIOs to payload:
1638 07:49:07.244130 NAME | PORT | POLARITY | VALUE
1639 07:49:07.247286 lid | undefined | high | high
1640 07:49:07.253716 power | undefined | high | low
1641 07:49:07.257248 oprom | undefined | high | low
1642 07:49:07.263523 EC in RW | 0x000000b9 | high | low
1643 07:49:07.270241 Wrote coreboot table at: 0x76b4b000, 0x5a0 bytes, checksum 74b0
1644 07:49:07.273846 coreboot table: 1464 bytes.
1645 07:49:07.276883 IMD ROOT 0. 0x76fff000 0x00001000
1646 07:49:07.280094 IMD SMALL 1. 0x76ffe000 0x00001000
1647 07:49:07.283558 FSP MEMORY 2. 0x76c4e000 0x003b0000
1648 07:49:07.286934 CONSOLE 3. 0x76c2e000 0x00020000
1649 07:49:07.290156 FMAP 4. 0x76c2d000 0x00000578
1650 07:49:07.293419 TIME STAMP 5. 0x76c2c000 0x00000910
1651 07:49:07.296790 VBOOT WORK 6. 0x76c18000 0x00014000
1652 07:49:07.299852
1653 07:49:07.303407 ROMSTG STCK 7. 0x76c17000 0x00001000
1654 07:49:07.306767 AFTER CAR 8. 0x76c0d000 0x0000a000
1655 07:49:07.310065 RAMSTAGE 9. 0x76ba7000 0x00066000
1656 07:49:07.313304 REFCODE 10. 0x76b67000 0x00040000
1657 07:49:07.316943 SMM BACKUP 11. 0x76b57000 0x00010000
1658 07:49:07.320298 4f444749 12. 0x76b55000 0x00002000
1659 07:49:07.323461 EXT VBT13. 0x76b53000 0x00001c43
1660 07:49:07.326527 COREBOOT 14. 0x76b4b000 0x00008000
1661 07:49:07.329936 ACPI 15. 0x76b27000 0x00024000
1662 07:49:07.336450 ACPI GNVS 16. 0x76b26000 0x00001000
1663 07:49:07.339752 RAMOOPS 17. 0x76a26000 0x00100000
1664 07:49:07.343535 TPM2 TCGLOG18. 0x76a16000 0x00010000
1665 07:49:07.346521 SMBIOS 19. 0x76a15000 0x00000800
1666 07:49:07.346609 IMD small region:
1667 07:49:07.353096 IMD ROOT 0. 0x76ffec00 0x00000400
1668 07:49:07.356645 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1669 07:49:07.360244 POWER STATE 2. 0x76ffeba0 0x00000040
1670 07:49:07.363059 ROMSTAGE 3. 0x76ffeb80 0x00000004
1671 07:49:07.366417 MEM INFO 4. 0x76ffe9a0 0x000001e0
1672 07:49:07.373134 BS: BS_WRITE_TABLES run times (exec / console): 7 / 529 ms
1673 07:49:07.376958 MTRR: Physical address space:
1674 07:49:07.383725 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1675 07:49:07.389783 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1676 07:49:07.396635 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1677 07:49:07.399798 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1678 07:49:07.406730 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1679 07:49:07.413264 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1680 07:49:07.420071 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1681 07:49:07.423089 MTRR: Fixed MSR 0x250 0x0606060606060606
1682 07:49:07.426749 MTRR: Fixed MSR 0x258 0x0606060606060606
1683 07:49:07.433247 MTRR: Fixed MSR 0x259 0x0000000000000000
1684 07:49:07.436614 MTRR: Fixed MSR 0x268 0x0606060606060606
1685 07:49:07.440115 MTRR: Fixed MSR 0x269 0x0606060606060606
1686 07:49:07.443131 MTRR: Fixed MSR 0x26a 0x0606060606060606
1687 07:49:07.449654 MTRR: Fixed MSR 0x26b 0x0606060606060606
1688 07:49:07.452777 MTRR: Fixed MSR 0x26c 0x0606060606060606
1689 07:49:07.456362 MTRR: Fixed MSR 0x26d 0x0606060606060606
1690 07:49:07.459637 MTRR: Fixed MSR 0x26e 0x0606060606060606
1691 07:49:07.463091 MTRR: Fixed MSR 0x26f 0x0606060606060606
1692 07:49:07.467096 call enable_fixed_mtrr()
1693 07:49:07.470776 CPU physical address size: 39 bits
1694 07:49:07.477202 MTRR: default type WB/UC MTRR counts: 6/5.
1695 07:49:07.480084 MTRR: UC selected as default type.
1696 07:49:07.483693 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1697 07:49:07.486843
1698 07:49:07.490412 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1699 07:49:07.496530 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1700 07:49:07.503427 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1701 07:49:07.510092 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1702 07:49:07.510198
1703 07:49:07.513402 MTRR check
1704 07:49:07.513490 Fixed MTRRs : Enabled
1705 07:49:07.516549 Variable MTRRs: Enabled
1706 07:49:07.516652
1707 07:49:07.519986 MTRR: Fixed MSR 0x250 0x0606060606060606
1708 07:49:07.526750 MTRR: Fixed MSR 0x258 0x0606060606060606
1709 07:49:07.530080 MTRR: Fixed MSR 0x259 0x0000000000000000
1710 07:49:07.533304 MTRR: Fixed MSR 0x268 0x0606060606060606
1711 07:49:07.536474 MTRR: Fixed MSR 0x269 0x0606060606060606
1712 07:49:07.539994 MTRR: Fixed MSR 0x26a 0x0606060606060606
1713 07:49:07.546501 MTRR: Fixed MSR 0x26b 0x0606060606060606
1714 07:49:07.549748 MTRR: Fixed MSR 0x26c 0x0606060606060606
1715 07:49:07.552986 MTRR: Fixed MSR 0x26d 0x0606060606060606
1716 07:49:07.556362 MTRR: Fixed MSR 0x26e 0x0606060606060606
1717 07:49:07.562819 MTRR: Fixed MSR 0x26f 0x0606060606060606
1718 07:49:07.566416 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1719 07:49:07.569836 call enable_fixed_mtrr()
1720 07:49:07.573945 Checking cr50 for pending updates
1721 07:49:07.577206 CPU physical address size: 39 bits
1722 07:49:07.580804 Reading cr50 TPM mode
1723 07:49:07.590461 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1724 07:49:07.597887 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1725 07:49:07.601156 Checking segment from ROM address 0xfff9d5b8
1726 07:49:07.607954 Checking segment from ROM address 0xfff9d5d4
1727 07:49:07.611499 Loading segment from ROM address 0xfff9d5b8
1728 07:49:07.614739 code (compression=0)
1729 07:49:07.621052 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1730 07:49:07.631323 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1731 07:49:07.634181 it's not compressed!
1732 07:49:07.759282 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1733 07:49:07.765736 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1734 07:49:07.773581 Loading segment from ROM address 0xfff9d5d4
1735 07:49:07.776726 Entry Point 0x30000000
1736 07:49:07.776813 Loaded segments
1737 07:49:07.783103 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1738 07:49:07.799313 Finalizing chipset.
1739 07:49:07.802798 Finalizing SMM.
1740 07:49:07.802885 APMC done.
1741 07:49:07.809403 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1742 07:49:07.812854 mp_park_aps done after 0 msecs.
1743 07:49:07.815957 Jumping to boot code at 0x30000000(0x76b4b000)
1744 07:49:07.825986 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1745 07:49:07.826077
1746 07:49:07.826147
1747 07:49:07.826217
1748 07:49:07.829333 Starting depthcharge on Magolor...
1749 07:49:07.829422
1750 07:49:07.829762 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
1751 07:49:07.829871 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
1752 07:49:07.829959 Setting prompt string to ['dedede:']
1753 07:49:07.830040 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:45)
1754 07:49:07.839146 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1755 07:49:07.839237
1756 07:49:07.846039 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1757 07:49:07.846128
1758 07:49:07.849078 fw_config match found: AUDIO_AMP=UNPROVISIONED
1759 07:49:07.849211
1760 07:49:07.852616 Wipe memory regions:
1761 07:49:07.852704
1762 07:49:07.856174 [0x00000000001000, 0x000000000a0000)
1763 07:49:07.856263
1764 07:49:07.859001 [0x00000000100000, 0x00000030000000)
1765 07:49:07.859090
1766 07:49:07.991137 [0x00000031062170, 0x00000076a15000)
1767 07:49:07.991292
1768 07:49:08.162993 [0x00000100000000, 0x00000180400000)
1769 07:49:08.163148
1770 07:49:09.225078 R8152: Initializing
1771 07:49:09.225241
1772 07:49:09.228392 Version 6 (ocp_data = 5c30)
1773 07:49:09.228480
1774 07:49:09.232226 R8152: Done initializing
1775 07:49:09.232314
1776 07:49:09.235593 Adding net device
1777 07:49:09.235681
1778 07:49:09.238634 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1779 07:49:09.238723
1780 07:49:09.242361
1781 07:49:09.242447
1782 07:49:09.242726 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1784 07:49:09.343470 dedede: tftpboot 192.168.201.1 8119355/tftp-deploy-ibk7aay8/kernel/bzImage 8119355/tftp-deploy-ibk7aay8/kernel/cmdline 8119355/tftp-deploy-ibk7aay8/ramdisk/ramdisk.cpio.gz
1785 07:49:09.343637 Setting prompt string to 'Starting kernel'
1786 07:49:09.343714 Setting prompt string to ['Starting kernel']
1787 07:49:09.343783 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1788 07:49:09.343861 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
1789 07:49:09.348138 tftpboot 192.168.201.1 8119355/tftp-deploy-ibk7aay8/kernel/bzImay-ibk7aay8/kernel/cmdline 8119355/tftp-deploy-ibk7aay8/ramdisk/ramdisk.cpio.gz
1790 07:49:09.348238
1791 07:49:09.348307 Waiting for link
1792 07:49:09.348372
1793 07:49:09.549993 done.
1794 07:49:09.550141
1795 07:49:09.550219 MAC: 00:24:32:30:79:17
1796 07:49:09.550315
1797 07:49:09.553282 Sending DHCP discover... done.
1798 07:49:09.553372
1799 07:49:09.556724 Waiting for reply... done.
1800 07:49:09.556814
1801 07:49:09.560077 Sending DHCP request... done.
1802 07:49:09.560167
1803 07:49:09.563322 Waiting for reply... done.
1804 07:49:09.563410
1805 07:49:09.566196 My ip is 192.168.201.10
1806 07:49:09.566305
1807 07:49:09.569842 The DHCP server ip is 192.168.201.1
1808 07:49:09.569939
1809 07:49:09.573390 TFTP server IP predefined by user: 192.168.201.1
1810 07:49:09.573478
1811 07:49:09.579740 Bootfile predefined by user: 8119355/tftp-deploy-ibk7aay8/kernel/bzImage
1812 07:49:09.579840
1813 07:49:09.582976 Sending tftp read request... done.
1814 07:49:09.583064
1815 07:49:09.589617 Waiting for the transfer...
1816 07:49:09.589705
1817 07:49:10.161463 00000000 ################################################################
1818 07:49:10.161612
1819 07:49:10.727541 00080000 ################################################################
1820 07:49:10.727697
1821 07:49:11.307610 00100000 ################################################################
1822 07:49:11.307755
1823 07:49:11.886839 00180000 ################################################################
1824 07:49:11.886992
1825 07:49:12.455537 00200000 ################################################################
1826 07:49:12.455713
1827 07:49:13.004272 00280000 ################################################################
1828 07:49:13.004436
1829 07:49:13.553753 00300000 ################################################################
1830 07:49:13.553964
1831 07:49:14.099521 00380000 ################################################################
1832 07:49:14.099687
1833 07:49:14.664964 00400000 ################################################################
1834 07:49:14.665125
1835 07:49:15.229655 00480000 ################################################################
1836 07:49:15.229815
1837 07:49:15.787551 00500000 ################################################################
1838 07:49:15.787695
1839 07:49:16.348792 00580000 ################################################################
1840 07:49:16.348938
1841 07:49:16.915804 00600000 ################################################################
1842 07:49:16.916234
1843 07:49:17.305858 00680000 ####################################### done.
1844 07:49:17.305997
1845 07:49:17.309231 The bootfile was 7131024 bytes long.
1846 07:49:17.309320
1847 07:49:17.312729 Sending tftp read request... done.
1848 07:49:17.312815
1849 07:49:17.316127 Waiting for the transfer...
1850 07:49:17.316225
1851 07:49:17.905675 00000000 ################################################################
1852 07:49:17.905822
1853 07:49:18.489062 00080000 ################################################################
1854 07:49:18.489215
1855 07:49:19.058119 00100000 ################################################################
1856 07:49:19.058270
1857 07:49:19.617381 00180000 ################################################################
1858 07:49:19.617529
1859 07:49:20.169042 00200000 ################################################################
1860 07:49:20.169188
1861 07:49:20.729776 00280000 ################################################################
1862 07:49:20.729947
1863 07:49:21.289036 00300000 ################################################################
1864 07:49:21.289189
1865 07:49:21.859446 00380000 ################################################################
1866 07:49:21.859599
1867 07:49:22.424056 00400000 ################################################################
1868 07:49:22.424209
1869 07:49:22.984723 00480000 ################################################################
1870 07:49:22.984865
1871 07:49:23.514675 00500000 ################################################################
1872 07:49:23.514880
1873 07:49:24.039825 00580000 ################################################################
1874 07:49:24.040021
1875 07:49:24.567767 00600000 ################################################################
1876 07:49:24.567939
1877 07:49:25.097273 00680000 ################################################################
1878 07:49:25.097468
1879 07:49:25.626459 00700000 ################################################################
1880 07:49:25.626615
1881 07:49:26.153573 00780000 ################################################################
1882 07:49:26.153756
1883 07:49:26.316947 00800000 #################### done.
1884 07:49:26.317130
1885 07:49:26.320239 Sending tftp read request... done.
1886 07:49:26.320357
1887 07:49:26.324179 Waiting for the transfer...
1888 07:49:26.324315
1889 07:49:26.324423 00000000 # done.
1890 07:49:26.324527
1891 07:49:26.333465 Command line loaded dynamically from TFTP file: 8119355/tftp-deploy-ibk7aay8/kernel/cmdline
1892 07:49:26.333608
1893 07:49:26.347023 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1894 07:49:26.347192
1895 07:49:26.350393 ec_init: CrosEC protocol v3 supported (256, 256)
1896 07:49:26.350517
1897 07:49:26.361230 Shutting down all USB controllers.
1898 07:49:26.361381
1899 07:49:26.361489 Removing current net device
1900 07:49:26.361588
1901 07:49:26.364635 Finalizing coreboot
1902 07:49:26.364757
1903 07:49:26.371127 Exiting depthcharge with code 4 at timestamp: 25427932
1904 07:49:26.371263
1905 07:49:26.371367
1906 07:49:26.371464 Starting kernel ...
1907 07:49:26.371560
1908 07:49:26.371655
1909 07:49:26.371750
1910 07:49:26.372255 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
1911 07:49:26.372403 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
1912 07:49:26.372517 Setting prompt string to ['Linux version [0-9]']
1913 07:49:26.372627 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1914 07:49:26.372737 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1916 07:53:53.372716 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
1918 07:53:53.372958 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
1920 07:53:53.373148 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1923 07:53:53.373462 end: 2 depthcharge-action (duration 00:05:00) [common]
1925 07:53:53.373755 Cleaning after the job
1926 07:53:53.373854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/ramdisk
1927 07:53:53.374693 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/kernel
1928 07:53:53.375327 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119355/tftp-deploy-ibk7aay8/modules
1929 07:53:53.375549 start: 5.1 power-off (timeout 00:00:30) [common]
1930 07:53:53.375746 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1931 07:53:53.398627 >> Command sent successfully.
1932 07:53:53.400559 Returned 0 in 0 seconds
1933 07:53:53.501886 end: 5.1 power-off (duration 00:00:00) [common]
1935 07:53:53.503528 start: 5.2 read-feedback (timeout 00:10:00) [common]
1936 07:53:53.504683 Listened to connection for namespace 'common' for up to 1s
1937 07:53:54.499537 Listened to connection for namespace 'common' for up to 1s
1938 07:53:54.503934 Listened to connection for namespace 'common' for up to 1s
1939 07:53:54.504754 Finalising connection for namespace 'common'
1940 07:53:54.505335 Disconnecting from shell: Finalise
1941 07:53:54.505769
1942 07:53:54.607235 end: 5.2 read-feedback (duration 00:00:01) [common]
1943 07:53:54.607875 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119355
1944 07:53:54.633496 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119355
1945 07:53:54.634171 JobError: Your job cannot terminate cleanly.