Boot log: dell-latitude-5400-8665U-sarien
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:49:16.318293 lava-dispatcher, installed at version: 2022.10
2 07:49:16.318491 start: 0 validate
3 07:49:16.318624 Start time: 2022-11-25 07:49:16.318617+00:00 (UTC)
4 07:49:16.318759 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:49:16.318891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 07:49:16.330538 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:49:16.330741 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:49:16.342286 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:49:16.342444 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:49:16.355126 validate duration: 0.04
12 07:49:16.355522 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:49:16.355628 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:49:16.355724 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:49:16.355865 Not decompressing ramdisk as can be used compressed.
16 07:49:16.355990 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 07:49:16.356057 saving as /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/ramdisk/rootfs.cpio.gz
18 07:49:16.356120 total size: 8415749 (8MB)
19 07:49:16.380539 progress 0% (0MB)
20 07:49:16.420129 progress 5% (0MB)
21 07:49:16.454446 progress 10% (0MB)
22 07:49:16.486402 progress 15% (1MB)
23 07:49:16.524834 progress 20% (1MB)
24 07:49:16.564911 progress 25% (2MB)
25 07:49:16.599103 progress 30% (2MB)
26 07:49:16.635998 progress 35% (2MB)
27 07:49:16.677798 progress 40% (3MB)
28 07:49:16.712796 progress 45% (3MB)
29 07:49:16.751200 progress 50% (4MB)
30 07:49:16.782293 progress 55% (4MB)
31 07:49:16.824056 progress 60% (4MB)
32 07:49:16.857238 progress 65% (5MB)
33 07:49:16.892151 progress 70% (5MB)
34 07:49:16.930404 progress 75% (6MB)
35 07:49:16.975466 progress 80% (6MB)
36 07:49:17.005786 progress 85% (6MB)
37 07:49:17.045355 progress 90% (7MB)
38 07:49:17.080962 progress 95% (7MB)
39 07:49:17.110188 progress 100% (8MB)
40 07:49:17.110534 8MB downloaded in 0.75s (10.64MB/s)
41 07:49:17.110718 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:49:17.110973 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:49:17.111064 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:49:17.111152 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:49:17.111263 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:49:17.111336 saving as /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/kernel/bzImage
48 07:49:17.111399 total size: 7131024 (6MB)
49 07:49:17.111460 No compression specified
50 07:49:17.197448 progress 0% (0MB)
51 07:49:17.391715 progress 5% (0MB)
52 07:49:17.536166 progress 10% (0MB)
53 07:49:17.645446 progress 15% (1MB)
54 07:49:17.757090 progress 20% (1MB)
55 07:49:17.882231 progress 25% (1MB)
56 07:49:17.994083 progress 30% (2MB)
57 07:49:18.155216 progress 35% (2MB)
58 07:49:18.231117 progress 40% (2MB)
59 07:49:18.353302 progress 45% (3MB)
60 07:49:18.491619 progress 50% (3MB)
61 07:49:18.551823 progress 55% (3MB)
62 07:49:18.603734 progress 60% (4MB)
63 07:49:18.648393 progress 65% (4MB)
64 07:49:18.699366 progress 70% (4MB)
65 07:49:18.732545 progress 75% (5MB)
66 07:49:18.759079 progress 80% (5MB)
67 07:49:18.777930 progress 85% (5MB)
68 07:49:18.802975 progress 90% (6MB)
69 07:49:18.829006 progress 95% (6MB)
70 07:49:18.854406 progress 100% (6MB)
71 07:49:18.854713 6MB downloaded in 1.74s (3.90MB/s)
72 07:49:18.854912 end: 1.2.1 http-download (duration 00:00:02) [common]
74 07:49:18.855155 end: 1.2 download-retry (duration 00:00:02) [common]
75 07:49:18.855252 start: 1.3 download-retry (timeout 00:09:58) [common]
76 07:49:18.855350 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 07:49:18.855460 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:49:18.855529 saving as /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/modules/modules.tar
79 07:49:18.855591 total size: 52060 (0MB)
80 07:49:18.855655 Using unxz to decompress xz
81 07:49:18.860328 progress 62% (0MB)
82 07:49:18.860911 progress 100% (0MB)
83 07:49:18.864435 0MB downloaded in 0.01s (5.62MB/s)
84 07:49:18.864705 end: 1.3.1 http-download (duration 00:00:00) [common]
86 07:49:18.864987 end: 1.3 download-retry (duration 00:00:00) [common]
87 07:49:18.865087 start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
88 07:49:18.865185 start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
89 07:49:18.865273 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 07:49:18.865361 start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
91 07:49:18.865536 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci
92 07:49:18.865646 makedir: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin
93 07:49:18.865730 makedir: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/tests
94 07:49:18.865812 makedir: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/results
95 07:49:18.865921 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-add-keys
96 07:49:18.866108 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-add-sources
97 07:49:18.866228 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-background-process-start
98 07:49:18.866342 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-background-process-stop
99 07:49:18.866456 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-common-functions
100 07:49:18.866578 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-echo-ipv4
101 07:49:18.866692 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-install-packages
102 07:49:18.866805 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-installed-packages
103 07:49:18.866916 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-os-build
104 07:49:18.867025 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-probe-channel
105 07:49:18.867137 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-probe-ip
106 07:49:18.867248 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-target-ip
107 07:49:18.867359 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-target-mac
108 07:49:18.867467 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-target-storage
109 07:49:18.867582 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-case
110 07:49:18.867692 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-event
111 07:49:18.867803 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-feedback
112 07:49:18.867918 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-raise
113 07:49:18.868065 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-reference
114 07:49:18.868175 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-runner
115 07:49:18.868285 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-set
116 07:49:18.868393 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-test-shell
117 07:49:18.868505 Updating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-install-packages (oe)
118 07:49:18.868618 Updating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/bin/lava-installed-packages (oe)
119 07:49:18.868721 Creating /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/environment
120 07:49:18.868854 LAVA metadata
121 07:49:18.868928 - LAVA_JOB_ID=8119437
122 07:49:18.869000 - LAVA_DISPATCHER_IP=192.168.201.1
123 07:49:18.869142 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
124 07:49:18.869212 skipped lava-vland-overlay
125 07:49:18.869291 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 07:49:18.869376 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
127 07:49:18.869443 skipped lava-multinode-overlay
128 07:49:18.869528 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 07:49:18.869621 start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
130 07:49:18.869702 Loading test definitions
131 07:49:18.869804 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
132 07:49:18.869883 Using /lava-8119437 at stage 0
133 07:49:18.870226 uuid=8119437_1.4.2.3.1 testdef=None
134 07:49:18.870353 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 07:49:18.870461 start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
136 07:49:18.870971 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 07:49:18.871205 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
139 07:49:18.871781 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 07:49:18.872027 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
142 07:49:18.872607 runner path: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/0/tests/0_dmesg test_uuid 8119437_1.4.2.3.1
143 07:49:18.872760 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 07:49:18.872999 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
146 07:49:18.873075 Using /lava-8119437 at stage 1
147 07:49:18.873324 uuid=8119437_1.4.2.3.5 testdef=None
148 07:49:18.873416 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 07:49:18.873505 start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
150 07:49:18.873956 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 07:49:18.874229 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
153 07:49:18.874814 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 07:49:18.875085 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
156 07:49:18.875701 runner path: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/1/tests/1_bootrr test_uuid 8119437_1.4.2.3.5
157 07:49:18.875848 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 07:49:18.876062 Creating lava-test-runner.conf files
160 07:49:18.876166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/0 for stage 0
161 07:49:18.876249 - 0_dmesg
162 07:49:18.876323 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119437/lava-overlay-qzizjyci/lava-8119437/1 for stage 1
163 07:49:18.876406 - 1_bootrr
164 07:49:18.876497 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 07:49:18.876586 start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
166 07:49:18.883013 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 07:49:18.883206 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
168 07:49:18.883348 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 07:49:18.883476 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 07:49:18.883609 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
171 07:49:19.073277 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 07:49:19.073628 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
173 07:49:19.073745 extracting modules file /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119437/extract-overlay-ramdisk-_lomiiqk/ramdisk
174 07:49:19.078050 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 07:49:19.078179 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
176 07:49:19.078271 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119437/compress-overlay-n1srmhkr/overlay-1.4.2.4.tar.gz to ramdisk
177 07:49:19.078349 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119437/compress-overlay-n1srmhkr/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119437/extract-overlay-ramdisk-_lomiiqk/ramdisk
178 07:49:19.082684 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 07:49:19.082821 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
180 07:49:19.082916 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 07:49:19.083009 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
182 07:49:19.083094 Building ramdisk /var/lib/lava/dispatcher/tmp/8119437/extract-overlay-ramdisk-_lomiiqk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119437/extract-overlay-ramdisk-_lomiiqk/ramdisk
183 07:49:19.149830 >> 48008 blocks
184 07:49:19.916809 rename /var/lib/lava/dispatcher/tmp/8119437/extract-overlay-ramdisk-_lomiiqk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/ramdisk/ramdisk.cpio.gz
185 07:49:19.917221 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 07:49:19.917355 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
187 07:49:19.917463 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
188 07:49:19.917560 No mkimage arch provided, not using FIT.
189 07:49:19.917653 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 07:49:19.917762 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 07:49:19.917908 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 07:49:19.918030 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
193 07:49:19.918122 No LXC device requested
194 07:49:19.918216 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 07:49:19.918317 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
196 07:49:19.918406 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 07:49:19.918485 Checking files for TFTP limit of 4294967296 bytes.
198 07:49:19.918891 end: 1 tftp-deploy (duration 00:00:04) [common]
199 07:49:19.919010 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 07:49:19.919114 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 07:49:19.919249 substitutions:
202 07:49:19.919321 - {DTB}: None
203 07:49:19.919390 - {INITRD}: 8119437/tftp-deploy-dgheb1v5/ramdisk/ramdisk.cpio.gz
204 07:49:19.919452 - {KERNEL}: 8119437/tftp-deploy-dgheb1v5/kernel/bzImage
205 07:49:19.919514 - {LAVA_MAC}: None
206 07:49:19.919598 - {PRESEED_CONFIG}: None
207 07:49:19.919688 - {PRESEED_LOCAL}: None
208 07:49:19.919774 - {RAMDISK}: 8119437/tftp-deploy-dgheb1v5/ramdisk/ramdisk.cpio.gz
209 07:49:19.919841 - {ROOT_PART}: None
210 07:49:19.919901 - {ROOT}: None
211 07:49:19.919959 - {SERVER_IP}: 192.168.201.1
212 07:49:19.920020 - {TEE}: None
213 07:49:19.920080 Parsed boot commands:
214 07:49:19.920137 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 07:49:19.920298 Parsed boot commands: tftpboot 192.168.201.1 8119437/tftp-deploy-dgheb1v5/kernel/bzImage 8119437/tftp-deploy-dgheb1v5/kernel/cmdline 8119437/tftp-deploy-dgheb1v5/ramdisk/ramdisk.cpio.gz
216 07:49:19.920392 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 07:49:19.920488 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 07:49:19.920593 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 07:49:19.920685 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 07:49:19.920758 Not connected, no need to disconnect.
221 07:49:19.920836 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 07:49:19.920926 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 07:49:19.920999 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-4'
224 07:49:19.923717 Setting prompt string to ['lava-test: # ']
225 07:49:19.924011 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 07:49:19.924122 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 07:49:19.924232 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 07:49:19.924328 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 07:49:19.924531 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
230 07:49:19.944177 >> Command sent successfully.
231 07:49:19.946266 Returned 0 in 0 seconds
232 07:49:20.047061 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 07:49:20.047636 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 07:49:20.047737 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 07:49:20.047823 Setting prompt string to 'Starting depthcharge on sarien...'
237 07:49:20.047888 Changing prompt to 'Starting depthcharge on sarien...'
238 07:49:20.047956 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
239 07:49:20.048221 [Enter `^Ec?' for help]
240 07:49:34.430281
241 07:49:34.430845
242 07:49:34.431001
243 07:49:34.438638 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
244 07:49:34.439170
245 07:49:34.443544 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
246 07:49:34.448387 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
247 07:49:34.453643 CPU: AES supported, TXT supported, VT supported
248 07:49:34.458615 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
249 07:49:34.463613 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
250 07:49:34.463904
251 07:49:34.469397 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
252 07:49:34.471983 VBOOT: Loading verstage.
253 07:49:34.472230
254 07:49:34.475147 CBFS @ 1d00000 size 300000
255 07:49:34.481387 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
256 07:49:34.481672
257 07:49:34.484918 CBFS: Locating 'fallback/verstage'
258 07:49:34.485560
259 07:49:34.488690 CBFS: Found @ offset 10f6c0 size 1435c
260 07:49:34.504765
261 07:49:34.505060
262 07:49:34.505132
263 07:49:34.513802 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
264 07:49:34.520728 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
265 07:49:34.521023
266 07:49:34.523351 done! DID_VID 0x00281ae0
267 07:49:34.525211 TPM ready after 0 ms
268 07:49:34.525471
269 07:49:34.529211 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
270 07:49:34.602510 tlcl_send_startup: Startup return code is 0
271 07:49:34.603662 TPM: setup succeeded
272 07:49:34.604337
273 07:49:34.622901 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
274 07:49:34.623202
275 07:49:34.626469 Checking cr50 for recovery request
276 07:49:34.636184 Phase 1
277 07:49:34.636482
278 07:49:34.640978 FMAP: Found "FLASH" version 1.1 at 1c10000.
279 07:49:34.645975 FMAP: base = fe000000 size = 2000000 #areas = 37
280 07:49:34.650127 FMAP: area GBB found @ 1c11000 (978944 bytes)
281 07:49:34.650595
282 07:49:34.657927 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
283 07:49:34.658203 Phase 2
284 07:49:34.659447 Phase 3
285 07:49:34.664140 FMAP: area GBB found @ 1c11000 (978944 bytes)
286 07:49:34.670967 VB2:vb2_report_dev_firmware() This is developer signed firmware
287 07:49:34.676451 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
288 07:49:34.681324 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
289 07:49:34.686626 VB2:vb2_verify_keyblock() Checking key block signature...
290 07:49:34.701007 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
291 07:49:34.701308
292 07:49:34.706733 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
293 07:49:34.711174 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 07:49:34.714596 Phase 4
295 07:49:34.719952 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
296 07:49:34.726925 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
297 07:49:34.727660
298 07:49:34.898205 VB2:vb2_rsa_verify_digest() Digest check failed!
299 07:49:34.898856
300 07:49:34.902832 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
301 07:49:34.904364 Saving nvdata
302 07:49:34.907927 Reboot requested (10020007)
303 07:49:34.910930 board_reset() called!
304 07:49:34.912617 full_reset() called!
305 07:49:39.536754
306 07:49:39.537132
307 07:49:39.537227
308 07:49:39.545281 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
309 07:49:39.545570
310 07:49:39.550341 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
311 07:49:39.550623
312 07:49:39.555468 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
313 07:49:39.560305 CPU: AES supported, TXT supported, VT supported
314 07:49:39.564531 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
315 07:49:39.570566 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
316 07:49:39.574729 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
317 07:49:39.575024
318 07:49:39.579402 VBOOT: Loading verstage.
319 07:49:39.581561 CBFS @ 1d00000 size 300000
320 07:49:39.588178 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
321 07:49:39.590923 CBFS: Locating 'fallback/verstage'
322 07:49:39.595593 CBFS: Found @ offset 10f6c0 size 1435c
323 07:49:39.609394
324 07:49:39.610056
325 07:49:39.610140
326 07:49:39.618228 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
327 07:49:39.624976 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
328 07:49:39.747559 .done! DID_VID 0x00281ae0
329 07:49:39.750084 TPM ready after 0 ms
330 07:49:39.753822 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
331 07:49:39.754090
332 07:49:39.825813 tlcl_send_startup: Startup return code is 0
333 07:49:39.827233 TPM: setup succeeded
334 07:49:39.845572 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
335 07:49:39.845851
336 07:49:39.849808 Checking cr50 for recovery request
337 07:49:39.859194 Phase 1
338 07:49:39.863571 FMAP: Found "FLASH" version 1.1 at 1c10000.
339 07:49:39.863844
340 07:49:39.869587 FMAP: base = fe000000 size = 2000000 #areas = 37
341 07:49:39.873342 FMAP: area GBB found @ 1c11000 (978944 bytes)
342 07:49:39.881147 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
343 07:49:39.886642 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
344 07:49:39.886906
345 07:49:39.890087 Recovery requested (1009000e)
346 07:49:39.891323 Saving nvdata
347 07:49:39.908138 tlcl_extend: response is 0
348 07:49:39.922503 tlcl_extend: response is 0
349 07:49:39.925856 CBFS @ 1d00000 size 300000
350 07:49:39.932004 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
351 07:49:39.935309 CBFS: Locating 'fallback/romstage'
352 07:49:39.938856 CBFS: Found @ offset 80 size 15b2c
353 07:49:39.939126
354 07:49:39.940641
355 07:49:39.940899
356 07:49:39.940973
357 07:49:39.949232 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
358 07:49:39.953727 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
359 07:49:39.954187
360 07:49:39.958000 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
361 07:49:39.958286
362 07:49:39.962868 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
363 07:49:39.963152
364 07:49:39.966471 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
365 07:49:39.967049
366 07:49:39.971426 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
367 07:49:39.973690 TCO_STS: 0000 0004
368 07:49:39.973986
369 07:49:39.976366 GEN_PMCON: d0015209 00002200
370 07:49:39.979653 GBLRST_CAUSE: 00000000 00000000
371 07:49:39.981888 prev_sleep_state 5
372 07:49:39.985592 Boot Count incremented to 15265
373 07:49:39.988232 CBFS @ 1d00000 size 300000
374 07:49:39.994829 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
375 07:49:39.997542 CBFS: Locating 'fspm.bin'
376 07:49:40.001139 CBFS: Found @ offset 60fc0 size 70000
377 07:49:40.001414
378 07:49:40.006395 FMAP: Found "FLASH" version 1.1 at 1c10000.
379 07:49:40.006664
380 07:49:40.011121 FMAP: base = fe000000 size = 2000000 #areas = 37
381 07:49:40.011530
382 07:49:40.017217 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
383 07:49:40.017481
384 07:49:40.023169 Probing TPM I2C: done! DID_VID 0x00281ae0
385 07:49:40.023432
386 07:49:40.026010 Locality already claimed
387 07:49:40.029951 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
388 07:49:40.049744 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
389 07:49:40.055976 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 07:49:40.056252
391 07:49:40.058633 MRC cache found, size 18e0
392 07:49:40.060549 bootmode is set to :2
393 07:49:40.153205 CBMEM:
394 07:49:40.155955 IMD: root @ 89fff000 254 entries.
395 07:49:40.159763 IMD: root @ 89ffec00 62 entries.
396 07:49:40.162009 External stage cache:
397 07:49:40.162316
398 07:49:40.166006 IMD: root @ 8abff000 254 entries.
399 07:49:40.169523 IMD: root @ 8abfec00 62 entries.
400 07:49:40.175298 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
401 07:49:40.178478 creating vboot_handoff structure
402 07:49:40.199551 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
403 07:49:40.214647 tlcl_write: response is 0
404 07:49:40.214955
405 07:49:40.234185 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
406 07:49:40.237934 MRC: TPM MRC hash updated successfully.
407 07:49:40.240311 1 DIMMs found
408 07:49:40.241823 top_of_ram = 0x8a000000
409 07:49:40.247352 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
410 07:49:40.252416 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 07:49:40.255203 CBFS @ 1d00000 size 300000
412 07:49:40.261209 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 07:49:40.264805 CBFS: Locating 'fallback/postcar'
414 07:49:40.265082
415 07:49:40.268129 CBFS: Found @ offset 107000 size 41a4
416 07:49:40.268386
417 07:49:40.274549 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
418 07:49:40.285241 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
419 07:49:40.290070 Processing 126 relocs. Offset value of 0x87cdd000
420 07:49:40.292400
421 07:49:40.292665
422 07:49:40.292740
423 07:49:40.300969 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
424 07:49:40.303506 CBFS @ 1d00000 size 300000
425 07:49:40.303796
426 07:49:40.310541 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
427 07:49:40.313316 CBFS: Locating 'fallback/ramstage'
428 07:49:40.313580
429 07:49:40.317334 CBFS: Found @ offset 458c0 size 1a8a8
430 07:49:40.323718 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
431 07:49:40.324014
432 07:49:40.352781 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
433 07:49:40.353302
434 07:49:40.358394 Processing 3754 relocs. Offset value of 0x88e81000
435 07:49:40.364423
436 07:49:40.364705
437 07:49:40.364790
438 07:49:40.373184 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
439 07:49:40.377338 FMAP: Found "FLASH" version 1.1 at 1c10000.
440 07:49:40.382229 FMAP: base = fe000000 size = 2000000 #areas = 37
441 07:49:40.387697 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
442 07:49:40.391914 WARNING: RO_VPD is uninitialized or empty.
443 07:49:40.396252 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
444 07:49:40.401175 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
445 07:49:40.402483 Normal boot.
446 07:49:40.408491 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1164
447 07:49:40.408767
448 07:49:40.412003 CBFS @ 1d00000 size 300000
449 07:49:40.417832 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
450 07:49:40.422316 CBFS: Locating 'cpu_microcode_blob.bin'
451 07:49:40.425805 CBFS: Found @ offset 15c40 size 2fc00
452 07:49:40.429844 microcode: sig=0x806ec pf=0x80 revision=0xb7
453 07:49:40.430109
454 07:49:40.432167 Skip microcode update
455 07:49:40.434866 CBFS @ 1d00000 size 300000
456 07:49:40.441189 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
457 07:49:40.441907
458 07:49:40.444068 CBFS: Locating 'fsps.bin'
459 07:49:40.447902 CBFS: Found @ offset d1fc0 size 35000
460 07:49:40.482667 Detected 4 core, 8 thread CPU.
461 07:49:40.485205 Setting up SMI for CPU
462 07:49:40.487055 IED base = 0x8ac00000
463 07:49:40.489381 IED size = 0x00400000
464 07:49:40.492471 Will perform SMM setup.
465 07:49:40.497410 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
466 07:49:40.504675 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
467 07:49:40.509957 Processing 16 relocs. Offset value of 0x00030000
468 07:49:40.513057 Attempting to start 7 APs
469 07:49:40.516385 Waiting for 10ms after sending INIT.
470 07:49:40.531658 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
471 07:49:40.533134 done.
472 07:49:40.534997 AP: slot 7 apic_id 4.
473 07:49:40.535668
474 07:49:40.537697 AP: slot 6 apic_id 5.
475 07:49:40.539524 AP: slot 5 apic_id 7.
476 07:49:40.541454 AP: slot 2 apic_id 6.
477 07:49:40.541734
478 07:49:40.544232 AP: slot 4 apic_id 2.
479 07:49:40.546366 AP: slot 1 apic_id 3.
480 07:49:40.549926 Waiting for 2nd SIPI to complete...done.
481 07:49:40.550201
482 07:49:40.558150 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
483 07:49:40.562847 Processing 13 relocs. Offset value of 0x00038000
484 07:49:40.569292 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
485 07:49:40.572821 Installing SMM handler to 0x8a000000
486 07:49:40.580837 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
487 07:49:40.586368 Processing 867 relocs. Offset value of 0x8a010000
488 07:49:40.594673 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
489 07:49:40.600148 Processing 13 relocs. Offset value of 0x8a008000
490 07:49:40.605559 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
491 07:49:40.605838
492 07:49:40.611595 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
493 07:49:40.616938 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
494 07:49:40.622628 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
495 07:49:40.628478 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
496 07:49:40.633799 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
497 07:49:40.639463 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
498 07:49:40.647067 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
499 07:49:40.650200 Clearing SMI status registers
500 07:49:40.651029 SMI_STS: PM1
501 07:49:40.653596 PM1_STS: WAK PWRBTN
502 07:49:40.656016 TCO_STS: BOOT SECOND_TO
503 07:49:40.658450 GPE0 STD STS: eSPI
504 07:49:40.659877 New SMBASE 0x8a000000
505 07:49:40.660270
506 07:49:40.663126 In relocation handler: CPU 0
507 07:49:40.666940 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
508 07:49:40.667206
509 07:49:40.671950 Writing SMRR. base = 0x8a000006, mask=0xff000800
510 07:49:40.674078 Relocation complete.
511 07:49:40.676835 New SMBASE 0x89fff400
512 07:49:40.680030 In relocation handler: CPU 3
513 07:49:40.683514 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
514 07:49:40.688434 Writing SMRR. base = 0x8a000006, mask=0xff000800
515 07:49:40.689065
516 07:49:40.690631 Relocation complete.
517 07:49:40.692393 New SMBASE 0x89ffec00
518 07:49:40.692785
519 07:49:40.695541 In relocation handler: CPU 5
520 07:49:40.695807
521 07:49:40.699971 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
522 07:49:40.700234
523 07:49:40.705061 Writing SMRR. base = 0x8a000006, mask=0xff000800
524 07:49:40.706682 Relocation complete.
525 07:49:40.708996 New SMBASE 0x89fff800
526 07:49:40.712068 In relocation handler: CPU 2
527 07:49:40.716639 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
528 07:49:40.721030 Writing SMRR. base = 0x8a000006, mask=0xff000800
529 07:49:40.723490 Relocation complete.
530 07:49:40.725217 New SMBASE 0x89fff000
531 07:49:40.728576 In relocation handler: CPU 4
532 07:49:40.732906 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
533 07:49:40.737058 Writing SMRR. base = 0x8a000006, mask=0xff000800
534 07:49:40.737330
535 07:49:40.739634 Relocation complete.
536 07:49:40.742069 New SMBASE 0x89fffc00
537 07:49:40.744618 In relocation handler: CPU 1
538 07:49:40.748295 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
539 07:49:40.748782
540 07:49:40.753920 Writing SMRR. base = 0x8a000006, mask=0xff000800
541 07:49:40.756018 Relocation complete.
542 07:49:40.757849 New SMBASE 0x89ffe400
543 07:49:40.761431 In relocation handler: CPU 7
544 07:49:40.764709 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
545 07:49:40.770169 Writing SMRR. base = 0x8a000006, mask=0xff000800
546 07:49:40.772025 Relocation complete.
547 07:49:40.772725
548 07:49:40.774076 New SMBASE 0x89ffe800
549 07:49:40.777830 In relocation handler: CPU 6
550 07:49:40.781599 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
551 07:49:40.786316 Writing SMRR. base = 0x8a000006, mask=0xff000800
552 07:49:40.788226 Relocation complete.
553 07:49:40.790163 Initializing CPU #0
554 07:49:40.790453
555 07:49:40.793463 CPU: vendor Intel device 806ec
556 07:49:40.794035
557 07:49:40.797753 CPU: family 06, model 8e, stepping 0c
558 07:49:40.800888 Clearing out pending MCEs
559 07:49:40.804513 Setting up local APIC... apic_id: 0x00 done.
560 07:49:40.807311 Turbo is available but hidden
561 07:49:40.807874
562 07:49:40.809528 Turbo has been enabled
563 07:49:40.809792
564 07:49:40.812267 VMX status: enabled
565 07:49:40.816016 IA32_FEATURE_CONTROL status: locked
566 07:49:40.817783 Skip microcode update
567 07:49:40.819687 CPU #0 initialized
568 07:49:40.820197
569 07:49:40.822186 Initializing CPU #3
570 07:49:40.823956 Initializing CPU #6
571 07:49:40.826830 Initializing CPU #7
572 07:49:40.829470 CPU: vendor Intel device 806ec
573 07:49:40.832955 CPU: family 06, model 8e, stepping 0c
574 07:49:40.836380 CPU: vendor Intel device 806ec
575 07:49:40.839542 CPU: family 06, model 8e, stepping 0c
576 07:49:40.839807
577 07:49:40.842677 Clearing out pending MCEs
578 07:49:40.842962
579 07:49:40.844953 Clearing out pending MCEs
580 07:49:40.849947 Setting up local APIC...Initializing CPU #4
581 07:49:40.851469 Initializing CPU #1
582 07:49:40.855086 CPU: vendor Intel device 806ec
583 07:49:40.858364 CPU: family 06, model 8e, stepping 0c
584 07:49:40.861790 CPU: vendor Intel device 806ec
585 07:49:40.862401
586 07:49:40.865629 CPU: family 06, model 8e, stepping 0c
587 07:49:40.868281 Clearing out pending MCEs
588 07:49:40.870696 Clearing out pending MCEs
589 07:49:40.874723 Setting up local APIC...Initializing CPU #2
590 07:49:40.876984 Initializing CPU #5
591 07:49:40.877281
592 07:49:40.880254 CPU: vendor Intel device 806ec
593 07:49:40.883533 CPU: family 06, model 8e, stepping 0c
594 07:49:40.883804
595 07:49:40.887154 CPU: vendor Intel device 806ec
596 07:49:40.891437 CPU: family 06, model 8e, stepping 0c
597 07:49:40.893232 Clearing out pending MCEs
598 07:49:40.894055
599 07:49:40.896081 Clearing out pending MCEs
600 07:49:40.900387 Setting up local APIC... apic_id: 0x02 done.
601 07:49:40.905230 Setting up local APIC... apic_id: 0x06 done.
602 07:49:40.905892
603 07:49:40.912135 Setting up local APIC...Setting up local APIC...VMX status: enabled
604 07:49:40.913964 apic_id: 0x07 done.
605 07:49:40.914257
606 07:49:40.917446 IA32_FEATURE_CONTROL status: locked
607 07:49:40.919947 VMX status: enabled
608 07:49:40.921783 Skip microcode update
609 07:49:40.925321 IA32_FEATURE_CONTROL status: locked
610 07:49:40.927002 CPU #2 initialized
611 07:49:40.929770 Skip microcode update
612 07:49:40.932281 VMX status: enabled
613 07:49:40.933971 apic_id: 0x03 done.
614 07:49:40.937078 IA32_FEATURE_CONTROL status: locked
615 07:49:40.938977 VMX status: enabled
616 07:49:40.939234
617 07:49:40.941871 Skip microcode update
618 07:49:40.944976 IA32_FEATURE_CONTROL status: locked
619 07:49:40.946960 CPU #4 initialized
620 07:49:40.949173 Skip microcode update
621 07:49:40.950987 CPU #5 initialized
622 07:49:40.951258
623 07:49:40.952865 CPU #1 initialized
624 07:49:40.953383
625 07:49:40.955597 apic_id: 0x05 done.
626 07:49:40.957330 apic_id: 0x04 done.
627 07:49:40.959283 VMX status: enabled
628 07:49:40.962428 VMX status: enabled
629 07:49:40.965080 IA32_FEATURE_CONTROL status: locked
630 07:49:40.968600 IA32_FEATURE_CONTROL status: locked
631 07:49:40.970795 Skip microcode update
632 07:49:40.971059
633 07:49:40.973086 Skip microcode update
634 07:49:40.974869 CPU #6 initialized
635 07:49:40.975131
636 07:49:40.977862 CPU #7 initialized
637 07:49:40.980261 CPU: vendor Intel device 806ec
638 07:49:40.984228 CPU: family 06, model 8e, stepping 0c
639 07:49:40.986983 Clearing out pending MCEs
640 07:49:40.991508 Setting up local APIC... apic_id: 0x01 done.
641 07:49:40.992971 VMX status: enabled
642 07:49:40.993254
643 07:49:40.997000 IA32_FEATURE_CONTROL status: locked
644 07:49:40.997268
645 07:49:40.998895 Skip microcode update
646 07:49:40.999166
647 07:49:41.001585 CPU #3 initialized
648 07:49:41.005200 bsp_do_flight_plan done after 451 msecs.
649 07:49:41.005777
650 07:49:41.008544 CPU: frequency set to 4800 MHz
651 07:49:41.009801 Enabling SMIs.
652 07:49:41.010073
653 07:49:41.012169 Locking SMM.
654 07:49:41.015318 CBFS @ 1d00000 size 300000
655 07:49:41.021045 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
656 07:49:41.023906 CBFS: Locating 'vbt.bin'
657 07:49:41.027122 CBFS: Found @ offset 60a40 size 4a0
658 07:49:41.027820
659 07:49:41.032276 Found a VBT of 4608 bytes after decompression
660 07:49:41.045315 FMAP: area GBB found @ 1c11000 (978944 bytes)
661 07:49:41.107272 Detected 4 core, 8 thread CPU.
662 07:49:41.110387 Detected 4 core, 8 thread CPU.
663 07:49:41.337428 Display FSP Version Info HOB
664 07:49:41.340097 Reference Code - CPU = 7.0.5e.40
665 07:49:41.343199 uCode Version = 0.0.0.b8
666 07:49:41.346434 Display FSP Version Info HOB
667 07:49:41.348697 Reference Code - ME = 7.0.5e.40
668 07:49:41.348957
669 07:49:41.351390 MEBx version = 0.0.0.0
670 07:49:41.355026 ME Firmware Version = Consumer SKU
671 07:49:41.357604 Display FSP Version Info HOB
672 07:49:41.361701 Reference Code - CNL PCH = 7.0.5e.40
673 07:49:41.364359 PCH-CRID Status = Disabled
674 07:49:41.367544 CNL PCH H A0 Hsio Version = 2.0.0.0
675 07:49:41.368396
676 07:49:41.371308 CNL PCH H Ax Hsio Version = 9.0.0.0
677 07:49:41.372034
678 07:49:41.375234 CNL PCH H Bx Hsio Version = a.0.0.0
679 07:49:41.375499
680 07:49:41.379108 CNL PCH LP B0 Hsio Version = 7.0.0.0
681 07:49:41.382182 CNL PCH LP Bx Hsio Version = 6.0.0.0
682 07:49:41.385804 CNL PCH LP Dx Hsio Version = 7.0.0.0
683 07:49:41.386471
684 07:49:41.389615 Display FSP Version Info HOB
685 07:49:41.393609 Reference Code - SA - System Agent = 7.0.5e.40
686 07:49:41.397164 Reference Code - MRC = 0.7.1.68
687 07:49:41.399530 SA - PCIe Version = 7.0.5e.40
688 07:49:41.399790
689 07:49:41.402758 SA-CRID Status = Disabled
690 07:49:41.406038 SA-CRID Original Value = 0.0.0.c
691 07:49:41.408984 SA-CRID New Value = 0.0.0.c
692 07:49:41.427230 RTC Init
693 07:49:41.430899 Set power off after power failure.
694 07:49:41.432848 Disabling Deep S3
695 07:49:41.434619 Disabling Deep S3
696 07:49:41.436338 Disabling Deep S4
697 07:49:41.438644 Disabling Deep S4
698 07:49:41.440447 Disabling Deep S5
699 07:49:41.440717
700 07:49:41.442402 Disabling Deep S5
701 07:49:41.448539 BS: BS_DEV_INIT_CHIPS times (us): entry 602553 run 414377 exit 16225
702 07:49:41.451379 Enumerating buses...
703 07:49:41.455750 Show all devs... Before device enumeration.
704 07:49:41.457987 Root Device: enabled 1
705 07:49:41.460413 CPU_CLUSTER: 0: enabled 1
706 07:49:41.462643 DOMAIN: 0000: enabled 1
707 07:49:41.464802 APIC: 00: enabled 1
708 07:49:41.467230 PCI: 00:00.0: enabled 1
709 07:49:41.469660 PCI: 00:02.0: enabled 1
710 07:49:41.472015 PCI: 00:04.0: enabled 1
711 07:49:41.472278
712 07:49:41.474488 PCI: 00:12.0: enabled 1
713 07:49:41.476808 PCI: 00:12.5: enabled 0
714 07:49:41.479435 PCI: 00:12.6: enabled 0
715 07:49:41.482225 PCI: 00:13.0: enabled 0
716 07:49:41.484794 PCI: 00:14.0: enabled 1
717 07:49:41.486827 PCI: 00:14.1: enabled 0
718 07:49:41.489390 PCI: 00:14.3: enabled 1
719 07:49:41.491688 PCI: 00:14.5: enabled 0
720 07:49:41.494250 PCI: 00:15.0: enabled 1
721 07:49:41.494518
722 07:49:41.496367 PCI: 00:15.1: enabled 1
723 07:49:41.498624 PCI: 00:15.2: enabled 0
724 07:49:41.499333
725 07:49:41.501347 PCI: 00:15.3: enabled 0
726 07:49:41.503772 PCI: 00:16.0: enabled 1
727 07:49:41.506437 PCI: 00:16.1: enabled 0
728 07:49:41.508502 PCI: 00:16.2: enabled 0
729 07:49:41.508778
730 07:49:41.511329 PCI: 00:16.3: enabled 0
731 07:49:41.513723 PCI: 00:16.4: enabled 0
732 07:49:41.515830 PCI: 00:16.5: enabled 0
733 07:49:41.518167 PCI: 00:17.0: enabled 1
734 07:49:41.520867 PCI: 00:19.0: enabled 1
735 07:49:41.523264 PCI: 00:19.1: enabled 0
736 07:49:41.526118 PCI: 00:19.2: enabled 1
737 07:49:41.528651 PCI: 00:1a.0: enabled 0
738 07:49:41.531198 PCI: 00:1c.0: enabled 1
739 07:49:41.532984 PCI: 00:1c.1: enabled 0
740 07:49:41.533669
741 07:49:41.535203 PCI: 00:1c.2: enabled 0
742 07:49:41.535465
743 07:49:41.537498 PCI: 00:1c.3: enabled 0
744 07:49:41.538134
745 07:49:41.539991 PCI: 00:1c.4: enabled 0
746 07:49:41.540536
747 07:49:41.542837 PCI: 00:1c.5: enabled 0
748 07:49:41.545267 PCI: 00:1c.6: enabled 0
749 07:49:41.547661 PCI: 00:1c.7: enabled 1
750 07:49:41.550120 PCI: 00:1d.0: enabled 1
751 07:49:41.552677 PCI: 00:1d.1: enabled 1
752 07:49:41.555067 PCI: 00:1d.2: enabled 0
753 07:49:41.557388 PCI: 00:1d.3: enabled 0
754 07:49:41.560385 PCI: 00:1d.4: enabled 1
755 07:49:41.562221 PCI: 00:1e.0: enabled 0
756 07:49:41.562498
757 07:49:41.564261 PCI: 00:1e.1: enabled 0
758 07:49:41.567054 PCI: 00:1e.2: enabled 0
759 07:49:41.567737
760 07:49:41.569587 PCI: 00:1e.3: enabled 0
761 07:49:41.569868
762 07:49:41.571675 PCI: 00:1f.0: enabled 1
763 07:49:41.574435 PCI: 00:1f.1: enabled 1
764 07:49:41.576981 PCI: 00:1f.2: enabled 1
765 07:49:41.579315 PCI: 00:1f.3: enabled 1
766 07:49:41.579580
767 07:49:41.581381 PCI: 00:1f.4: enabled 1
768 07:49:41.581650
769 07:49:41.584238 PCI: 00:1f.5: enabled 1
770 07:49:41.586291 PCI: 00:1f.6: enabled 1
771 07:49:41.588836 USB0 port 0: enabled 1
772 07:49:41.591196 I2C: 00:10: enabled 1
773 07:49:41.593224 I2C: 00:10: enabled 1
774 07:49:41.595598 I2C: 00:34: enabled 1
775 07:49:41.595865
776 07:49:41.597586 I2C: 00:2c: enabled 1
777 07:49:41.597860
778 07:49:41.599694 I2C: 00:50: enabled 1
779 07:49:41.602121 PNP: 0c09.0: enabled 1
780 07:49:41.604487 USB2 port 0: enabled 1
781 07:49:41.607005 USB2 port 1: enabled 1
782 07:49:41.609513 USB2 port 2: enabled 1
783 07:49:41.611861 USB2 port 4: enabled 1
784 07:49:41.612502
785 07:49:41.614383 USB2 port 5: enabled 1
786 07:49:41.616945 USB2 port 6: enabled 1
787 07:49:41.618358 USB2 port 7: enabled 1
788 07:49:41.621298 USB2 port 8: enabled 1
789 07:49:41.623701 USB2 port 9: enabled 1
790 07:49:41.626095 USB3 port 0: enabled 1
791 07:49:41.628503 USB3 port 1: enabled 1
792 07:49:41.630094 USB3 port 2: enabled 1
793 07:49:41.632859 USB3 port 3: enabled 1
794 07:49:41.634450 USB3 port 4: enabled 1
795 07:49:41.634829
796 07:49:41.636796 APIC: 03: enabled 1
797 07:49:41.637060
798 07:49:41.639297 APIC: 06: enabled 1
799 07:49:41.639565
800 07:49:41.640776 APIC: 01: enabled 1
801 07:49:41.643575 APIC: 02: enabled 1
802 07:49:41.645369 APIC: 07: enabled 1
803 07:49:41.647485 APIC: 05: enabled 1
804 07:49:41.649548 APIC: 04: enabled 1
805 07:49:41.650122
806 07:49:41.651111 Compare with tree...
807 07:49:41.653469 Root Device: enabled 1
808 07:49:41.656592 CPU_CLUSTER: 0: enabled 1
809 07:49:41.659354 APIC: 00: enabled 1
810 07:49:41.660701 APIC: 03: enabled 1
811 07:49:41.663538 APIC: 06: enabled 1
812 07:49:41.665372 APIC: 01: enabled 1
813 07:49:41.665636
814 07:49:41.667744 APIC: 02: enabled 1
815 07:49:41.668408
816 07:49:41.670145 APIC: 07: enabled 1
817 07:49:41.671637 APIC: 05: enabled 1
818 07:49:41.671913
819 07:49:41.675070 APIC: 04: enabled 1
820 07:49:41.676573 DOMAIN: 0000: enabled 1
821 07:49:41.679547 PCI: 00:00.0: enabled 1
822 07:49:41.682058 PCI: 00:02.0: enabled 1
823 07:49:41.684363 PCI: 00:04.0: enabled 1
824 07:49:41.687361 PCI: 00:12.0: enabled 1
825 07:49:41.688088
826 07:49:41.689540 PCI: 00:12.5: enabled 0
827 07:49:41.689811
828 07:49:41.692372 PCI: 00:12.6: enabled 0
829 07:49:41.694718 PCI: 00:13.0: enabled 0
830 07:49:41.695311
831 07:49:41.697784 PCI: 00:14.0: enabled 1
832 07:49:41.700113 USB0 port 0: enabled 1
833 07:49:41.700622
834 07:49:41.702904 USB2 port 0: enabled 1
835 07:49:41.705646 USB2 port 1: enabled 1
836 07:49:41.706321
837 07:49:41.708404 USB2 port 2: enabled 1
838 07:49:41.711890 USB2 port 4: enabled 1
839 07:49:41.714003 USB2 port 5: enabled 1
840 07:49:41.716922 USB2 port 6: enabled 1
841 07:49:41.719062 USB2 port 7: enabled 1
842 07:49:41.720081
843 07:49:41.722172 USB2 port 8: enabled 1
844 07:49:41.725136 USB2 port 9: enabled 1
845 07:49:41.728047 USB3 port 0: enabled 1
846 07:49:41.728408
847 07:49:41.729943 USB3 port 1: enabled 1
848 07:49:41.730454
849 07:49:41.733216 USB3 port 2: enabled 1
850 07:49:41.736138 USB3 port 3: enabled 1
851 07:49:41.738610 USB3 port 4: enabled 1
852 07:49:41.741217 PCI: 00:14.1: enabled 0
853 07:49:41.741831
854 07:49:41.744204 PCI: 00:14.3: enabled 1
855 07:49:41.746520 PCI: 00:14.5: enabled 0
856 07:49:41.748754 PCI: 00:15.0: enabled 1
857 07:49:41.749015
858 07:49:41.751599 I2C: 00:10: enabled 1
859 07:49:41.751857
860 07:49:41.754181 I2C: 00:10: enabled 1
861 07:49:41.754444
862 07:49:41.756253 I2C: 00:34: enabled 1
863 07:49:41.756512
864 07:49:41.759336 PCI: 00:15.1: enabled 1
865 07:49:41.761904 I2C: 00:2c: enabled 1
866 07:49:41.764684 PCI: 00:15.2: enabled 0
867 07:49:41.766675 PCI: 00:15.3: enabled 0
868 07:49:41.766945
869 07:49:41.769276 PCI: 00:16.0: enabled 1
870 07:49:41.769632
871 07:49:41.772285 PCI: 00:16.1: enabled 0
872 07:49:41.774760 PCI: 00:16.2: enabled 0
873 07:49:41.777256 PCI: 00:16.3: enabled 0
874 07:49:41.780101 PCI: 00:16.4: enabled 0
875 07:49:41.783064 PCI: 00:16.5: enabled 0
876 07:49:41.785294 PCI: 00:17.0: enabled 1
877 07:49:41.788200 PCI: 00:19.0: enabled 1
878 07:49:41.790258 I2C: 00:50: enabled 1
879 07:49:41.793952 PCI: 00:19.1: enabled 0
880 07:49:41.795512 PCI: 00:19.2: enabled 1
881 07:49:41.798594 PCI: 00:1a.0: enabled 0
882 07:49:41.800916 PCI: 00:1c.0: enabled 1
883 07:49:41.801604
884 07:49:41.804060 PCI: 00:1c.1: enabled 0
885 07:49:41.806562 PCI: 00:1c.2: enabled 0
886 07:49:41.809177 PCI: 00:1c.3: enabled 0
887 07:49:41.811820 PCI: 00:1c.4: enabled 0
888 07:49:41.812091
889 07:49:41.814457 PCI: 00:1c.5: enabled 0
890 07:49:41.817529 PCI: 00:1c.6: enabled 0
891 07:49:41.819000 PCI: 00:1c.7: enabled 1
892 07:49:41.819433
893 07:49:41.821734 PCI: 00:1d.0: enabled 1
894 07:49:41.822001
895 07:49:41.824793 PCI: 00:1d.1: enabled 1
896 07:49:41.826908 PCI: 00:1d.2: enabled 0
897 07:49:41.829870 PCI: 00:1d.3: enabled 0
898 07:49:41.832892 PCI: 00:1d.4: enabled 1
899 07:49:41.835007 PCI: 00:1e.0: enabled 0
900 07:49:41.838508 PCI: 00:1e.1: enabled 0
901 07:49:41.840967 PCI: 00:1e.2: enabled 0
902 07:49:41.842777 PCI: 00:1e.3: enabled 0
903 07:49:41.843552
904 07:49:41.845944 PCI: 00:1f.0: enabled 1
905 07:49:41.846212
906 07:49:41.848412 PNP: 0c09.0: enabled 1
907 07:49:41.851243 PCI: 00:1f.1: enabled 1
908 07:49:41.853319 PCI: 00:1f.2: enabled 1
909 07:49:41.856496 PCI: 00:1f.3: enabled 1
910 07:49:41.858437 PCI: 00:1f.4: enabled 1
911 07:49:41.861150 PCI: 00:1f.5: enabled 1
912 07:49:41.864416 PCI: 00:1f.6: enabled 1
913 07:49:41.866605 Root Device scanning...
914 07:49:41.870327 root_dev_scan_bus for Root Device
915 07:49:41.871020
916 07:49:41.872727 CPU_CLUSTER: 0 enabled
917 07:49:41.874307 DOMAIN: 0000 enabled
918 07:49:41.877144 DOMAIN: 0000 scanning...
919 07:49:41.880114 PCI: pci_scan_bus for bus 00
920 07:49:41.883048 PCI: 00:00.0 [8086/0000] ops
921 07:49:41.883471
922 07:49:41.886715 PCI: 00:00.0 [8086/3e34] enabled
923 07:49:41.889296 PCI: 00:02.0 [8086/0000] ops
924 07:49:41.889550
925 07:49:41.893420 PCI: 00:02.0 [8086/3ea0] enabled
926 07:49:41.896135 PCI: 00:04.0 [8086/1903] enabled
927 07:49:41.899210 PCI: 00:08.0 [8086/1911] enabled
928 07:49:41.903545 PCI: 00:12.0 [8086/9df9] enabled
929 07:49:41.906649 PCI: 00:14.0 [8086/0000] bus ops
930 07:49:41.909338 PCI: 00:14.0 [8086/9ded] enabled
931 07:49:41.912653 PCI: 00:14.2 [8086/9def] enabled
932 07:49:41.915932 PCI: 00:14.3 [8086/9df0] enabled
933 07:49:41.916349
934 07:49:41.919792 PCI: 00:15.0 [8086/0000] bus ops
935 07:49:41.923155 PCI: 00:15.0 [8086/9de8] enabled
936 07:49:41.925869 PCI: 00:15.1 [8086/0000] bus ops
937 07:49:41.929157 PCI: 00:15.1 [8086/9de9] enabled
938 07:49:41.932566 PCI: 00:16.0 [8086/0000] ops
939 07:49:41.935383 PCI: 00:16.0 [8086/9de0] enabled
940 07:49:41.935657
941 07:49:41.938343 PCI: 00:17.0 [8086/0000] ops
942 07:49:41.938814
943 07:49:41.941661 PCI: 00:17.0 [8086/9dd3] enabled
944 07:49:41.945237 PCI: 00:19.0 [8086/0000] bus ops
945 07:49:41.948829 PCI: 00:19.0 [8086/9dc5] enabled
946 07:49:41.951749 PCI: 00:19.2 [8086/0000] ops
947 07:49:41.954702 PCI: 00:19.2 [8086/9dc7] enabled
948 07:49:41.954963
949 07:49:41.958329 PCI: 00:1c.0 [8086/0000] bus ops
950 07:49:41.961781 PCI: 00:1c.0 [8086/9dbf] enabled
951 07:49:41.967168 PCI: Static device PCI: 00:1c.7 not found, disabling it.
952 07:49:41.967443
953 07:49:41.970361 PCI: 00:1d.0 [8086/0000] bus ops
954 07:49:41.973796 PCI: 00:1d.0 [8086/9db4] enabled
955 07:49:41.980088 PCI: Static device PCI: 00:1d.1 not found, disabling it.
956 07:49:41.985526 PCI: Static device PCI: 00:1d.4 not found, disabling it.
957 07:49:41.988674 PCI: 00:1f.0 [8086/0000] bus ops
958 07:49:41.991701 PCI: 00:1f.0 [8086/9d84] enabled
959 07:49:41.991971
960 07:49:41.997921 PCI: Static device PCI: 00:1f.1 not found, disabling it.
961 07:49:42.003172 PCI: Static device PCI: 00:1f.2 not found, disabling it.
962 07:49:42.005958 PCI: 00:1f.3 [8086/0000] bus ops
963 07:49:42.006331
964 07:49:42.009634 PCI: 00:1f.3 [8086/9dc8] enabled
965 07:49:42.012528 PCI: 00:1f.4 [8086/0000] bus ops
966 07:49:42.013295
967 07:49:42.016404 PCI: 00:1f.4 [8086/9da3] enabled
968 07:49:42.019232 PCI: 00:1f.5 [8086/0000] bus ops
969 07:49:42.023127 PCI: 00:1f.5 [8086/9da4] enabled
970 07:49:42.026707 PCI: 00:1f.6 [8086/15be] enabled
971 07:49:42.029114 PCI: Leftover static devices:
972 07:49:42.030945 PCI: 00:12.5
973 07:49:42.031793 PCI: 00:12.6
974 07:49:42.033451 PCI: 00:13.0
975 07:49:42.035294 PCI: 00:14.1
976 07:49:42.036286 PCI: 00:14.5
977 07:49:42.037505 PCI: 00:15.2
978 07:49:42.038494 PCI: 00:15.3
979 07:49:42.039174
980 07:49:42.040184 PCI: 00:16.1
981 07:49:42.041666 PCI: 00:16.2
982 07:49:42.042572 PCI: 00:16.3
983 07:49:42.042838
984 07:49:42.044765 PCI: 00:16.4
985 07:49:42.046013 PCI: 00:16.5
986 07:49:42.046678 PCI: 00:19.1
987 07:49:42.048580 PCI: 00:1a.0
988 07:49:42.049445 PCI: 00:1c.1
989 07:49:42.051169 PCI: 00:1c.2
990 07:49:42.052508 PCI: 00:1c.3
991 07:49:42.053647 PCI: 00:1c.4
992 07:49:42.053933
993 07:49:42.054971 PCI: 00:1c.5
994 07:49:42.056660 PCI: 00:1c.6
995 07:49:42.056957
996 07:49:42.057657 PCI: 00:1c.7
997 07:49:42.059687 PCI: 00:1d.1
998 07:49:42.059983
999 07:49:42.060419 PCI: 00:1d.2
1000 07:49:42.061901 PCI: 00:1d.3
1001 07:49:42.062156
1002 07:49:42.063521 PCI: 00:1d.4
1003 07:49:42.064599 PCI: 00:1e.0
1004 07:49:42.066030 PCI: 00:1e.1
1005 07:49:42.066381
1006 07:49:42.067483 PCI: 00:1e.2
1007 07:49:42.068974 PCI: 00:1e.3
1008 07:49:42.070116 PCI: 00:1f.1
1009 07:49:42.070374
1010 07:49:42.071431 PCI: 00:1f.2
1011 07:49:42.074365 PCI: Check your devicetree.cb.
1012 07:49:42.077426 PCI: 00:14.0 scanning...
1013 07:49:42.080753 scan_usb_bus for PCI: 00:14.0
1014 07:49:42.082722 USB0 port 0 enabled
1015 07:49:42.084867 USB0 port 0 scanning...
1016 07:49:42.088107 scan_usb_bus for USB0 port 0
1017 07:49:42.090478 USB2 port 0 enabled
1018 07:49:42.092017 USB2 port 1 enabled
1019 07:49:42.092331
1020 07:49:42.094727 USB2 port 2 enabled
1021 07:49:42.096152 USB2 port 4 enabled
1022 07:49:42.096428
1023 07:49:42.098262 USB2 port 5 enabled
1024 07:49:42.100570 USB2 port 6 enabled
1025 07:49:42.102078 USB2 port 7 enabled
1026 07:49:42.102373
1027 07:49:42.104235 USB2 port 8 enabled
1028 07:49:42.104492
1029 07:49:42.106166 USB2 port 9 enabled
1030 07:49:42.106859
1031 07:49:42.108692 USB3 port 0 enabled
1032 07:49:42.110462 USB3 port 1 enabled
1033 07:49:42.112574 USB3 port 2 enabled
1034 07:49:42.113166
1035 07:49:42.114802 USB3 port 3 enabled
1036 07:49:42.117305 USB3 port 4 enabled
1037 07:49:42.119615 USB2 port 0 scanning...
1038 07:49:42.121986 scan_usb_bus for USB2 port 0
1039 07:49:42.122262
1040 07:49:42.126035 scan_usb_bus for USB2 port 0 done
1041 07:49:42.131321 scan_bus: scanning of bus USB2 port 0 took 9058 usecs
1042 07:49:42.133791 USB2 port 1 scanning...
1043 07:49:42.137261 scan_usb_bus for USB2 port 1
1044 07:49:42.140072 scan_usb_bus for USB2 port 1 done
1045 07:49:42.145125 scan_bus: scanning of bus USB2 port 1 took 9060 usecs
1046 07:49:42.145483
1047 07:49:42.148438 USB2 port 2 scanning...
1048 07:49:42.151571 scan_usb_bus for USB2 port 2
1049 07:49:42.154871 scan_usb_bus for USB2 port 2 done
1050 07:49:42.159798 scan_bus: scanning of bus USB2 port 2 took 9058 usecs
1051 07:49:42.162753 USB2 port 4 scanning...
1052 07:49:42.165610 scan_usb_bus for USB2 port 4
1053 07:49:42.169338 scan_usb_bus for USB2 port 4 done
1054 07:49:42.174816 scan_bus: scanning of bus USB2 port 4 took 9058 usecs
1055 07:49:42.176552 USB2 port 5 scanning...
1056 07:49:42.180482 scan_usb_bus for USB2 port 5
1057 07:49:42.183845 scan_usb_bus for USB2 port 5 done
1058 07:49:42.188536 scan_bus: scanning of bus USB2 port 5 took 9059 usecs
1059 07:49:42.191649 USB2 port 6 scanning...
1060 07:49:42.194774 scan_usb_bus for USB2 port 6
1061 07:49:42.197960 scan_usb_bus for USB2 port 6 done
1062 07:49:42.198247
1063 07:49:42.203416 scan_bus: scanning of bus USB2 port 6 took 9058 usecs
1064 07:49:42.203689
1065 07:49:42.205240 USB2 port 7 scanning...
1066 07:49:42.205525
1067 07:49:42.208598 scan_usb_bus for USB2 port 7
1068 07:49:42.209337
1069 07:49:42.212425 scan_usb_bus for USB2 port 7 done
1070 07:49:42.217234 scan_bus: scanning of bus USB2 port 7 took 9060 usecs
1071 07:49:42.218104
1072 07:49:42.219971 USB2 port 8 scanning...
1073 07:49:42.220603
1074 07:49:42.223565 scan_usb_bus for USB2 port 8
1075 07:49:42.226896 scan_usb_bus for USB2 port 8 done
1076 07:49:42.232101 scan_bus: scanning of bus USB2 port 8 took 9058 usecs
1077 07:49:42.235049 USB2 port 9 scanning...
1078 07:49:42.237206 scan_usb_bus for USB2 port 9
1079 07:49:42.237479
1080 07:49:42.240579 scan_usb_bus for USB2 port 9 done
1081 07:49:42.240846
1082 07:49:42.246062 scan_bus: scanning of bus USB2 port 9 took 9058 usecs
1083 07:49:42.248506 USB3 port 0 scanning...
1084 07:49:42.252278 scan_usb_bus for USB3 port 0
1085 07:49:42.255618 scan_usb_bus for USB3 port 0 done
1086 07:49:42.255895
1087 07:49:42.260752 scan_bus: scanning of bus USB3 port 0 took 9058 usecs
1088 07:49:42.263530 USB3 port 1 scanning...
1089 07:49:42.266180 scan_usb_bus for USB3 port 1
1090 07:49:42.270316 scan_usb_bus for USB3 port 1 done
1091 07:49:42.275646 scan_bus: scanning of bus USB3 port 1 took 9059 usecs
1092 07:49:42.277760 USB3 port 2 scanning...
1093 07:49:42.280817 scan_usb_bus for USB3 port 2
1094 07:49:42.283927 scan_usb_bus for USB3 port 2 done
1095 07:49:42.284198
1096 07:49:42.289575 scan_bus: scanning of bus USB3 port 2 took 9057 usecs
1097 07:49:42.289857
1098 07:49:42.291917 USB3 port 3 scanning...
1099 07:49:42.295662 scan_usb_bus for USB3 port 3
1100 07:49:42.298286 scan_usb_bus for USB3 port 3 done
1101 07:49:42.298572
1102 07:49:42.305136 scan_bus: scanning of bus USB3 port 3 took 9058 usecs
1103 07:49:42.306549 USB3 port 4 scanning...
1104 07:49:42.309518 scan_usb_bus for USB3 port 4
1105 07:49:42.309793
1106 07:49:42.312854 scan_usb_bus for USB3 port 4 done
1107 07:49:42.318541 scan_bus: scanning of bus USB3 port 4 took 9056 usecs
1108 07:49:42.321529 scan_usb_bus for USB0 port 0 done
1109 07:49:42.327137 scan_bus: scanning of bus USB0 port 0 took 239241 usecs
1110 07:49:42.330580 scan_usb_bus for PCI: 00:14.0 done
1111 07:49:42.336309 scan_bus: scanning of bus PCI: 00:14.0 took 256169 usecs
1112 07:49:42.336579
1113 07:49:42.339064 PCI: 00:15.0 scanning...
1114 07:49:42.342393 scan_generic_bus for PCI: 00:15.0
1115 07:49:42.346649 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
1116 07:49:42.350809 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
1117 07:49:42.351396
1118 07:49:42.355120 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
1119 07:49:42.358974 scan_generic_bus for PCI: 00:15.0 done
1120 07:49:42.364629 scan_bus: scanning of bus PCI: 00:15.0 took 22375 usecs
1121 07:49:42.366746 PCI: 00:15.1 scanning...
1122 07:49:42.370547 scan_generic_bus for PCI: 00:15.1
1123 07:49:42.374648 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
1124 07:49:42.375244
1125 07:49:42.378215 scan_generic_bus for PCI: 00:15.1 done
1126 07:49:42.384536 scan_bus: scanning of bus PCI: 00:15.1 took 14210 usecs
1127 07:49:42.384806
1128 07:49:42.386501 PCI: 00:19.0 scanning...
1129 07:49:42.390481 scan_generic_bus for PCI: 00:19.0
1130 07:49:42.390752
1131 07:49:42.394594 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
1132 07:49:42.394871
1133 07:49:42.398870 scan_generic_bus for PCI: 00:19.0 done
1134 07:49:42.404322 scan_bus: scanning of bus PCI: 00:19.0 took 14209 usecs
1135 07:49:42.406492 PCI: 00:1c.0 scanning...
1136 07:49:42.410658 do_pci_scan_bridge for PCI: 00:1c.0
1137 07:49:42.412946 PCI: pci_scan_bus for bus 01
1138 07:49:42.413219
1139 07:49:42.416439 PCI: 01:00.0 [10ec/525a] enabled
1140 07:49:42.419759 Capability: type 0x01 @ 0x80
1141 07:49:42.422417 Capability: type 0x05 @ 0x90
1142 07:49:42.425947 Capability: type 0x10 @ 0xb0
1143 07:49:42.428121 Capability: type 0x10 @ 0x40
1144 07:49:42.432441 Enabling Common Clock Configuration
1145 07:49:42.436760 L1 Sub-State supported from root port 28
1146 07:49:42.438875 L1 Sub-State Support = 0xf
1147 07:49:42.441472 CommonModeRestoreTime = 0x3c
1148 07:49:42.441735
1149 07:49:42.445935 Power On Value = 0x6, Power On Scale = 0x1
1150 07:49:42.448542 ASPM: Enabled L0s and L1
1151 07:49:42.451316 Capability: type 0x01 @ 0x80
1152 07:49:42.451692
1153 07:49:42.454282 Capability: type 0x05 @ 0x90
1154 07:49:42.454557
1155 07:49:42.457045 Capability: type 0x10 @ 0xb0
1156 07:49:42.457394
1157 07:49:42.462721 scan_bus: scanning of bus PCI: 00:1c.0 took 53660 usecs
1158 07:49:42.465174 PCI: 00:1d.0 scanning...
1159 07:49:42.469856 do_pci_scan_bridge for PCI: 00:1d.0
1160 07:49:42.472536 PCI: pci_scan_bus for bus 02
1161 07:49:42.475810 PCI: 02:00.0 [1217/8620] enabled
1162 07:49:42.476095
1163 07:49:42.478937 Capability: type 0x01 @ 0x6c
1164 07:49:42.481910 Capability: type 0x05 @ 0x48
1165 07:49:42.484923 Capability: type 0x10 @ 0x80
1166 07:49:42.487616 Capability: type 0x10 @ 0x40
1167 07:49:42.491335 L1 Sub-State supported from root port 29
1168 07:49:42.491613
1169 07:49:42.494184 L1 Sub-State Support = 0xf
1170 07:49:42.497259 CommonModeRestoreTime = 0x78
1171 07:49:42.501860 Power On Value = 0x16, Power On Scale = 0x0
1172 07:49:42.503249 ASPM: Enabled L1
1173 07:49:42.508068 Capability: type 0x01 @ 0x6c
1174 07:49:42.508829
1175 07:49:42.513170 Capability: type 0x05 @ 0x48
1176 07:49:42.518002 Capability: type 0x10 @ 0x80
1177 07:49:42.525109 scan_bus: scanning of bus PCI: 00:1d.0 took 55999 usecs
1178 07:49:42.527080 PCI: 00:1f.0 scanning...
1179 07:49:42.530577 scan_lpc_bus for PCI: 00:1f.0
1180 07:49:42.532426 PNP: 0c09.0 enabled
1181 07:49:42.536371 scan_lpc_bus for PCI: 00:1f.0 done
1182 07:49:42.541987 scan_bus: scanning of bus PCI: 00:1f.0 took 11394 usecs
1183 07:49:42.544126 PCI: 00:1f.3 scanning...
1184 07:49:42.549260 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
1185 07:49:42.549526
1186 07:49:42.552023 PCI: 00:1f.4 scanning...
1187 07:49:42.556599 scan_generic_bus for PCI: 00:1f.4
1188 07:49:42.559905 scan_generic_bus for PCI: 00:1f.4 done
1189 07:49:42.565112 scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs
1190 07:49:42.565912
1191 07:49:42.567562 PCI: 00:1f.5 scanning...
1192 07:49:42.567827
1193 07:49:42.571228 scan_generic_bus for PCI: 00:1f.5
1194 07:49:42.571498
1195 07:49:42.575385 scan_generic_bus for PCI: 00:1f.5 done
1196 07:49:42.575662
1197 07:49:42.581314 scan_bus: scanning of bus PCI: 00:1f.5 took 10127 usecs
1198 07:49:42.587027 scan_bus: scanning of bus DOMAIN: 0000 took 706537 usecs
1199 07:49:42.590892 root_dev_scan_bus for Root Device done
1200 07:49:42.596472 scan_bus: scanning of bus Root Device took 726674 usecs
1201 07:49:42.597027 done
1202 07:49:42.602816 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1203 07:49:42.608729 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1204 07:49:42.609259
1205 07:49:42.616849 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1206 07:49:42.623857 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1207 07:49:42.624142
1208 07:49:42.627604 SPI flash protection: WPSW=1 SRP0=1
1209 07:49:42.634762 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1210 07:49:42.640290 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1211 07:49:42.645672 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148265 exit 42584
1212 07:49:42.645943
1213 07:49:42.648527 found VGA at PCI: 00:02.0
1214 07:49:42.652270 Setting up VGA for PCI: 00:02.0
1215 07:49:42.656914 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1216 07:49:42.661548 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1217 07:49:42.662329
1218 07:49:42.664264 Allocating resources...
1219 07:49:42.666439 Reading resources...
1220 07:49:42.670399 Root Device read_resources bus 0 link: 0
1221 07:49:42.675132 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1222 07:49:42.681110 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1223 07:49:42.685231 DOMAIN: 0000 read_resources bus 0 link: 0
1224 07:49:42.690954 PCI: 00:14.0 read_resources bus 0 link: 0
1225 07:49:42.695347 USB0 port 0 read_resources bus 0 link: 0
1226 07:49:42.695665
1227 07:49:42.704713 USB0 port 0 read_resources bus 0 link: 0 done
1228 07:49:42.710485 PCI: 00:14.0 read_resources bus 0 link: 0 done
1229 07:49:42.715359 PCI: 00:15.0 read_resources bus 1 link: 0
1230 07:49:42.720825 PCI: 00:15.0 read_resources bus 1 link: 0 done
1231 07:49:42.725677 PCI: 00:15.1 read_resources bus 2 link: 0
1232 07:49:42.730864 PCI: 00:15.1 read_resources bus 2 link: 0 done
1233 07:49:42.735921 PCI: 00:19.0 read_resources bus 3 link: 0
1234 07:49:42.741252 PCI: 00:19.0 read_resources bus 3 link: 0 done
1235 07:49:42.746133 PCI: 00:1c.0 read_resources bus 1 link: 0
1236 07:49:42.752068 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1237 07:49:42.755886 PCI: 00:1d.0 read_resources bus 2 link: 0
1238 07:49:42.756216
1239 07:49:42.763314 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1240 07:49:42.767642 PCI: 00:1f.0 read_resources bus 0 link: 0
1241 07:49:42.773242 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1242 07:49:42.779861 DOMAIN: 0000 read_resources bus 0 link: 0 done
1243 07:49:42.784571 Root Device read_resources bus 0 link: 0 done
1244 07:49:42.785141
1245 07:49:42.786689 Done reading resources.
1246 07:49:42.792257 Show resources in subtree (Root Device)...After reading.
1247 07:49:42.792553
1248 07:49:42.797486 Root Device child on link 0 CPU_CLUSTER: 0
1249 07:49:42.800611 CPU_CLUSTER: 0 child on link 0 APIC: 00
1250 07:49:42.801282
1251 07:49:42.802073 APIC: 00
1252 07:49:42.802550
1253 07:49:42.803864 APIC: 03
1254 07:49:42.804990 APIC: 06
1255 07:49:42.806174 APIC: 01
1256 07:49:42.807356 APIC: 02
1257 07:49:42.808955 APIC: 07
1258 07:49:42.809744 APIC: 05
1259 07:49:42.812088 APIC: 04
1260 07:49:42.815348 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1261 07:49:42.824538 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1262 07:49:42.834922 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1263 07:49:42.835831 PCI: 00:00.0
1264 07:49:42.836101
1265 07:49:42.846190 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 07:49:42.854979 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1267 07:49:42.864373 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1268 07:49:42.865037
1269 07:49:42.873684 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1270 07:49:42.883482 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1271 07:49:42.892102 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1272 07:49:42.892615
1273 07:49:42.901704 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1274 07:49:42.911190 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1275 07:49:42.920142 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1276 07:49:42.929895 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1277 07:49:42.930583
1278 07:49:42.938962 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1279 07:49:42.949082 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1280 07:49:42.958031 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1281 07:49:42.967435 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1282 07:49:42.969065 PCI: 00:02.0
1283 07:49:42.969766
1284 07:49:42.979437 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1285 07:49:42.990055 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1286 07:49:42.998396 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1287 07:49:42.999081
1288 07:49:42.999558 PCI: 00:04.0
1289 07:49:43.009786 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1290 07:49:43.011430 PCI: 00:08.0
1291 07:49:43.021138 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1292 07:49:43.022730 PCI: 00:12.0
1293 07:49:43.023014
1294 07:49:43.032672 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1295 07:49:43.037470 PCI: 00:14.0 child on link 0 USB0 port 0
1296 07:49:43.038118
1297 07:49:43.047513 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1298 07:49:43.051515 USB0 port 0 child on link 0 USB2 port 0
1299 07:49:43.052928 USB2 port 0
1300 07:49:43.055187 USB2 port 1
1301 07:49:43.056991 USB2 port 2
1302 07:49:43.057661
1303 07:49:43.058413 USB2 port 4
1304 07:49:43.060067 USB2 port 5
1305 07:49:43.060651
1306 07:49:43.062167 USB2 port 6
1307 07:49:43.063630 USB2 port 7
1308 07:49:43.064351
1309 07:49:43.065236 USB2 port 8
1310 07:49:43.067497 USB2 port 9
1311 07:49:43.068228
1312 07:49:43.069091 USB3 port 0
1313 07:49:43.070708 USB3 port 1
1314 07:49:43.071413
1315 07:49:43.072267 USB3 port 2
1316 07:49:43.072579
1317 07:49:43.074825 USB3 port 3
1318 07:49:43.076033 USB3 port 4
1319 07:49:43.077900 PCI: 00:14.2
1320 07:49:43.088187 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1321 07:49:43.097940 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1322 07:49:43.099234 PCI: 00:14.3
1323 07:49:43.109101 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1324 07:49:43.109380
1325 07:49:43.113145 PCI: 00:15.0 child on link 0 I2C: 01:10
1326 07:49:43.123141 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1327 07:49:43.125538 I2C: 01:10
1328 07:49:43.126330 I2C: 01:10
1329 07:49:43.128128 I2C: 01:34
1330 07:49:43.128396
1331 07:49:43.132635 PCI: 00:15.1 child on link 0 I2C: 02:2c
1332 07:49:43.142306 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1333 07:49:43.142615
1334 07:49:43.143485 I2C: 02:2c
1335 07:49:43.144188
1336 07:49:43.144985 PCI: 00:16.0
1337 07:49:43.145238
1338 07:49:43.155459 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1339 07:49:43.156851 PCI: 00:17.0
1340 07:49:43.166589 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1341 07:49:43.175451 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1342 07:49:43.183794 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1343 07:49:43.192100 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1344 07:49:43.199570 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1345 07:49:43.199864
1346 07:49:43.208627 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1347 07:49:43.208970
1348 07:49:43.213082 PCI: 00:19.0 child on link 0 I2C: 03:50
1349 07:49:43.223128 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1350 07:49:43.223488
1351 07:49:43.232764 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1352 07:49:43.234390 I2C: 03:50
1353 07:49:43.236336 PCI: 00:19.2
1354 07:49:43.247319 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1355 07:49:43.256880 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1356 07:49:43.262041 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1357 07:49:43.270269 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1358 07:49:43.270638
1359 07:49:43.279772 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1360 07:49:43.280054
1361 07:49:43.289550 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1362 07:49:43.291103 PCI: 01:00.0
1363 07:49:43.300469 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1364 07:49:43.304653 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1365 07:49:43.304934
1366 07:49:43.312937 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1367 07:49:43.323315 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1368 07:49:43.332617 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1369 07:49:43.333799 PCI: 02:00.0
1370 07:49:43.334449
1371 07:49:43.342907 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1372 07:49:43.352550 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1373 07:49:43.356806 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1374 07:49:43.365312 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1375 07:49:43.365952
1376 07:49:43.374081 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1377 07:49:43.376015 PNP: 0c09.0
1378 07:49:43.384077 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1379 07:49:43.392537 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1380 07:49:43.392959
1381 07:49:43.401713 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1382 07:49:43.403029 PCI: 00:1f.3
1383 07:49:43.412768 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1384 07:49:43.413094
1385 07:49:43.423378 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1386 07:49:43.424749 PCI: 00:1f.4
1387 07:49:43.433895 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1388 07:49:43.443527 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1389 07:49:43.445321 PCI: 00:1f.5
1390 07:49:43.445612
1391 07:49:43.454700 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1392 07:49:43.455032
1393 07:49:43.455824 PCI: 00:1f.6
1394 07:49:43.465371 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1395 07:49:43.472077 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1396 07:49:43.478060 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1397 07:49:43.484757 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1398 07:49:43.485098
1399 07:49:43.491007 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1400 07:49:43.498110 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1401 07:49:43.501268 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1402 07:49:43.501639
1403 07:49:43.505557 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1404 07:49:43.509262 PCI: 00:17.0 18 * [0x60 - 0x67] io
1405 07:49:43.512360 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1406 07:49:43.519434 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1407 07:49:43.525906 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1408 07:49:43.533924 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1409 07:49:43.542491 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1410 07:49:43.548633 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1411 07:49:43.553288 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1412 07:49:43.560367 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1413 07:49:43.568931 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1414 07:49:43.576641 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1415 07:49:43.576977
1416 07:49:43.584196 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1417 07:49:43.587325 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1418 07:49:43.591858 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1419 07:49:43.600106 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1420 07:49:43.604080 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1421 07:49:43.609035 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1422 07:49:43.614073 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1423 07:49:43.619275 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1424 07:49:43.623340 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1425 07:49:43.629167 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1426 07:49:43.633606 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1427 07:49:43.638508 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1428 07:49:43.638825
1429 07:49:43.642724 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1430 07:49:43.647592 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1431 07:49:43.652562 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1432 07:49:43.657543 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1433 07:49:43.663056 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1434 07:49:43.663385
1435 07:49:43.667929 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1436 07:49:43.672329 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1437 07:49:43.672644
1438 07:49:43.677314 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1439 07:49:43.682255 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1440 07:49:43.687236 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1441 07:49:43.691667 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1442 07:49:43.696990 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1443 07:49:43.701424 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1444 07:49:43.706082 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1445 07:49:43.710991 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1446 07:49:43.716138 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1447 07:49:43.720879 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1448 07:49:43.729326 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1449 07:49:43.733592 avoid_fixed_resources: DOMAIN: 0000
1450 07:49:43.738694 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1451 07:49:43.739115
1452 07:49:43.744516 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1453 07:49:43.752362 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1454 07:49:43.752711
1455 07:49:43.759884 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1456 07:49:43.760486
1457 07:49:43.767874 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1458 07:49:43.768641
1459 07:49:43.775384 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1460 07:49:43.775921
1461 07:49:43.783021 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1462 07:49:43.791400 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1463 07:49:43.798426 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1464 07:49:43.806097 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1465 07:49:43.813087 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1466 07:49:43.820261 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1467 07:49:43.822490 Setting resources...
1468 07:49:43.822801
1469 07:49:43.828675 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1470 07:49:43.833158 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1471 07:49:43.836886 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1472 07:49:43.840714 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1473 07:49:43.841007
1474 07:49:43.844793 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1475 07:49:43.850822 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1476 07:49:43.851125
1477 07:49:43.857666 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1478 07:49:43.863961 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1479 07:49:43.869692 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1480 07:49:43.870053
1481 07:49:43.876373 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1482 07:49:43.876668
1483 07:49:43.883505 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1484 07:49:43.883813
1485 07:49:43.889491 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1486 07:49:43.894098 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1487 07:49:43.898978 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1488 07:49:43.903813 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1489 07:49:43.909198 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1490 07:49:43.913493 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1491 07:49:43.914129
1492 07:49:43.918957 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1493 07:49:43.922988 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1494 07:49:43.927695 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1495 07:49:43.927983
1496 07:49:43.932645 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1497 07:49:43.932955
1498 07:49:43.938194 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1499 07:49:43.942983 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1500 07:49:43.947767 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1501 07:49:43.952580 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1502 07:49:43.957159 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1503 07:49:43.962497 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1504 07:49:43.967120 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1505 07:49:43.971986 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1506 07:49:43.976370 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1507 07:49:43.977028
1508 07:49:43.981503 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1509 07:49:43.981793
1510 07:49:43.986135 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1511 07:49:43.991205 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1512 07:49:43.995792 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1513 07:49:44.000646 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1514 07:49:44.005984 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1515 07:49:44.013563 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1516 07:49:44.020365 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1517 07:49:44.020712
1518 07:49:44.028039 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1519 07:49:44.035076 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1520 07:49:44.035361
1521 07:49:44.040614 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1522 07:49:44.048019 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1523 07:49:44.054858 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1524 07:49:44.062152 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1525 07:49:44.069800 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1526 07:49:44.074688 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1527 07:49:44.079581 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1528 07:49:44.087687 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1529 07:49:44.091050 Root Device assign_resources, bus 0 link: 0
1530 07:49:44.096536 DOMAIN: 0000 assign_resources, bus 0 link: 0
1531 07:49:44.104274 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1532 07:49:44.104781
1533 07:49:44.113034 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1534 07:49:44.121080 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1535 07:49:44.128563 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1536 07:49:44.136955 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1537 07:49:44.145256 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1538 07:49:44.145880
1539 07:49:44.153695 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1540 07:49:44.158151 PCI: 00:14.0 assign_resources, bus 0 link: 0
1541 07:49:44.162703 PCI: 00:14.0 assign_resources, bus 0 link: 0
1542 07:49:44.171503 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1543 07:49:44.179393 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1544 07:49:44.188335 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1545 07:49:44.195604 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1546 07:49:44.195907
1547 07:49:44.200708 PCI: 00:15.0 assign_resources, bus 1 link: 0
1548 07:49:44.204714 PCI: 00:15.0 assign_resources, bus 1 link: 0
1549 07:49:44.204990
1550 07:49:44.213764 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1551 07:49:44.217879 PCI: 00:15.1 assign_resources, bus 2 link: 0
1552 07:49:44.222429 PCI: 00:15.1 assign_resources, bus 2 link: 0
1553 07:49:44.231402 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1554 07:49:44.238948 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1555 07:49:44.246801 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1556 07:49:44.254793 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1557 07:49:44.262520 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1558 07:49:44.269698 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1559 07:49:44.277260 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1560 07:49:44.277545
1561 07:49:44.286386 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1562 07:49:44.294305 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1563 07:49:44.298607 PCI: 00:19.0 assign_resources, bus 3 link: 0
1564 07:49:44.302850 PCI: 00:19.0 assign_resources, bus 3 link: 0
1565 07:49:44.303545
1566 07:49:44.311684 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1567 07:49:44.319858 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1568 07:49:44.328584 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1569 07:49:44.328863
1570 07:49:44.337195 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1571 07:49:44.337471
1572 07:49:44.341615 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1573 07:49:44.350325 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1574 07:49:44.355217 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1575 07:49:44.364087 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1576 07:49:44.372021 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1577 07:49:44.380914 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1578 07:49:44.385472 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1579 07:49:44.394847 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1580 07:49:44.404194 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1581 07:49:44.404810
1582 07:49:44.410724 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1583 07:49:44.415958 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1584 07:49:44.421034 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1585 07:49:44.425358 LPC: Trying to open IO window from 930 size 8
1586 07:49:44.425952
1587 07:49:44.429527 LPC: Trying to open IO window from 940 size 8
1588 07:49:44.434433 LPC: Trying to open IO window from 950 size 10
1589 07:49:44.442684 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1590 07:49:44.450531 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1591 07:49:44.450811
1592 07:49:44.458675 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1593 07:49:44.459058
1594 07:49:44.467093 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1595 07:49:44.475519 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1596 07:49:44.479834 DOMAIN: 0000 assign_resources, bus 0 link: 0
1597 07:49:44.484472 Root Device assign_resources, bus 0 link: 0
1598 07:49:44.484752
1599 07:49:44.487337 Done setting resources.
1600 07:49:44.493807 Show resources in subtree (Root Device)...After assigning values.
1601 07:49:44.497889 Root Device child on link 0 CPU_CLUSTER: 0
1602 07:49:44.502032 CPU_CLUSTER: 0 child on link 0 APIC: 00
1603 07:49:44.503401 APIC: 00
1604 07:49:44.504981 APIC: 03
1605 07:49:44.505645
1606 07:49:44.506260 APIC: 06
1607 07:49:44.507198 APIC: 01
1608 07:49:44.508531 APIC: 02
1609 07:49:44.509790 APIC: 07
1610 07:49:44.511009 APIC: 05
1611 07:49:44.512715 APIC: 04
1612 07:49:44.516896 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1613 07:49:44.517592
1614 07:49:44.525978 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1615 07:49:44.526284
1616 07:49:44.537629 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1617 07:49:44.539155 PCI: 00:00.0
1618 07:49:44.549383 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1619 07:49:44.558669 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1620 07:49:44.567122 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1621 07:49:44.567389
1622 07:49:44.576476 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1623 07:49:44.577108
1624 07:49:44.586250 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1625 07:49:44.586519
1626 07:49:44.595317 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1627 07:49:44.604693 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1628 07:49:44.614068 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1629 07:49:44.623083 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1630 07:49:44.632284 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1631 07:49:44.632560
1632 07:49:44.642574 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1633 07:49:44.652243 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1634 07:49:44.652858
1635 07:49:44.661183 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1636 07:49:44.670632 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1637 07:49:44.672666 PCI: 00:02.0
1638 07:49:44.682421 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1639 07:49:44.682916
1640 07:49:44.693231 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1641 07:49:44.702665 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1642 07:49:44.702944
1643 07:49:44.704048 PCI: 00:04.0
1644 07:49:44.714521 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1645 07:49:44.714793
1646 07:49:44.715978 PCI: 00:08.0
1647 07:49:44.726078 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1648 07:49:44.727883 PCI: 00:12.0
1649 07:49:44.738351 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1650 07:49:44.738977
1651 07:49:44.742651 PCI: 00:14.0 child on link 0 USB0 port 0
1652 07:49:44.753537 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1653 07:49:44.757594 USB0 port 0 child on link 0 USB2 port 0
1654 07:49:44.759373 USB2 port 0
1655 07:49:44.760636 USB2 port 1
1656 07:49:44.760917
1657 07:49:44.762534 USB2 port 2
1658 07:49:44.764240 USB2 port 4
1659 07:49:44.766039 USB2 port 5
1660 07:49:44.767779 USB2 port 6
1661 07:49:44.769440 USB2 port 7
1662 07:49:44.770132
1663 07:49:44.771693 USB2 port 8
1664 07:49:44.773375 USB2 port 9
1665 07:49:44.773646
1666 07:49:44.774936 USB3 port 0
1667 07:49:44.776730 USB3 port 1
1668 07:49:44.778350 USB3 port 2
1669 07:49:44.781036 USB3 port 3
1670 07:49:44.782346 USB3 port 4
1671 07:49:44.783823 PCI: 00:14.2
1672 07:49:44.794287 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1673 07:49:44.803967 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1674 07:49:44.806175 PCI: 00:14.3
1675 07:49:44.816913 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1676 07:49:44.820694 PCI: 00:15.0 child on link 0 I2C: 01:10
1677 07:49:44.830954 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1678 07:49:44.832631 I2C: 01:10
1679 07:49:44.833469 I2C: 01:10
1680 07:49:44.833893
1681 07:49:44.835318 I2C: 01:34
1682 07:49:44.839705 PCI: 00:15.1 child on link 0 I2C: 02:2c
1683 07:49:44.849803 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1684 07:49:44.851924 I2C: 02:2c
1685 07:49:44.853396 PCI: 00:16.0
1686 07:49:44.864247 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1687 07:49:44.865507 PCI: 00:17.0
1688 07:49:44.875434 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1689 07:49:44.885570 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1690 07:49:44.895488 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1691 07:49:44.903554 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1692 07:49:44.912464 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1693 07:49:44.912746
1694 07:49:44.923074 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1695 07:49:44.923697
1696 07:49:44.927001 PCI: 00:19.0 child on link 0 I2C: 03:50
1697 07:49:44.927293
1698 07:49:44.937904 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1699 07:49:44.938504
1700 07:49:44.948494 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1701 07:49:44.949689 I2C: 03:50
1702 07:49:44.951524 PCI: 00:19.2
1703 07:49:44.961890 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1704 07:49:44.972378 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1705 07:49:44.976584 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1706 07:49:44.977226
1707 07:49:44.986185 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1708 07:49:44.995969 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1709 07:49:44.996248
1710 07:49:45.006558 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1711 07:49:45.007313
1712 07:49:45.008070 PCI: 01:00.0
1713 07:49:45.018394 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1714 07:49:45.018675
1715 07:49:45.023030 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1716 07:49:45.023309
1717 07:49:45.033108 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1718 07:49:45.042674 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1719 07:49:45.052683 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1720 07:49:45.052977
1721 07:49:45.054496 PCI: 02:00.0
1722 07:49:45.065240 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1723 07:49:45.075102 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1724 07:49:45.075381
1725 07:49:45.079900 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1726 07:49:45.080190
1727 07:49:45.088283 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1728 07:49:45.097038 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1729 07:49:45.097384
1730 07:49:45.098754 PNP: 0c09.0
1731 07:49:45.099059
1732 07:49:45.107499 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1733 07:49:45.107847
1734 07:49:45.115936 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1735 07:49:45.124428 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1736 07:49:45.125109
1737 07:49:45.127008 PCI: 00:1f.3
1738 07:49:45.136592 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1739 07:49:45.146912 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1740 07:49:45.147247
1741 07:49:45.148781 PCI: 00:1f.4
1742 07:49:45.149061
1743 07:49:45.157826 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1744 07:49:45.167896 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1745 07:49:45.169522 PCI: 00:1f.5
1746 07:49:45.170124
1747 07:49:45.179879 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1748 07:49:45.180464
1749 07:49:45.181575 PCI: 00:1f.6
1750 07:49:45.192208 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1751 07:49:45.194773 Done allocating resources.
1752 07:49:45.200919 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548817 exit 22
1753 07:49:45.203642 Enabling resources...
1754 07:49:45.208550 PCI: 00:00.0 subsystem <- 1028/3e34
1755 07:49:45.210913 PCI: 00:00.0 cmd <- 06
1756 07:49:45.214272 PCI: 00:02.0 subsystem <- 1028/3ea0
1757 07:49:45.217145 PCI: 00:02.0 cmd <- 03
1758 07:49:45.220496 PCI: 00:04.0 subsystem <- 1028/1903
1759 07:49:45.223026 PCI: 00:04.0 cmd <- 02
1760 07:49:45.225441 PCI: 00:08.0 cmd <- 06
1761 07:49:45.229760 PCI: 00:12.0 subsystem <- 1028/9df9
1762 07:49:45.230105
1763 07:49:45.232209 PCI: 00:12.0 cmd <- 02
1764 07:49:45.236014 PCI: 00:14.0 subsystem <- 1028/9ded
1765 07:49:45.236343
1766 07:49:45.238457 PCI: 00:14.0 cmd <- 02
1767 07:49:45.241173 PCI: 00:14.2 cmd <- 02
1768 07:49:45.244829 PCI: 00:14.3 subsystem <- 1028/9df0
1769 07:49:45.247661 PCI: 00:14.3 cmd <- 02
1770 07:49:45.251354 PCI: 00:15.0 subsystem <- 1028/9de8
1771 07:49:45.253339 PCI: 00:15.0 cmd <- 02
1772 07:49:45.257455 PCI: 00:15.1 subsystem <- 1028/9de9
1773 07:49:45.257734
1774 07:49:45.259506 PCI: 00:15.1 cmd <- 02
1775 07:49:45.263656 PCI: 00:16.0 subsystem <- 1028/9de0
1776 07:49:45.263964
1777 07:49:45.265765 PCI: 00:16.0 cmd <- 02
1778 07:49:45.269561 PCI: 00:17.0 subsystem <- 1028/9dd3
1779 07:49:45.271840 PCI: 00:17.0 cmd <- 03
1780 07:49:45.275908 PCI: 00:19.0 subsystem <- 1028/9dc5
1781 07:49:45.278521 PCI: 00:19.0 cmd <- 06
1782 07:49:45.282350 PCI: 00:19.2 subsystem <- 1028/9dc7
1783 07:49:45.284298 PCI: 00:19.2 cmd <- 06
1784 07:49:45.284728
1785 07:49:45.288482 PCI: 00:1c.0 bridge ctrl <- 0003
1786 07:49:45.291610 PCI: 00:1c.0 subsystem <- 1028/9dbf
1787 07:49:45.291890
1788 07:49:45.294641 Capability: type 0x10 @ 0x40
1789 07:49:45.297960 Capability: type 0x05 @ 0x80
1790 07:49:45.300315 Capability: type 0x0d @ 0x90
1791 07:49:45.300601
1792 07:49:45.302720 PCI: 00:1c.0 cmd <- 06
1793 07:49:45.303007
1794 07:49:45.306432 PCI: 00:1d.0 bridge ctrl <- 0003
1795 07:49:45.310751 PCI: 00:1d.0 subsystem <- 1028/9db4
1796 07:49:45.312861 Capability: type 0x10 @ 0x40
1797 07:49:45.315741 Capability: type 0x05 @ 0x80
1798 07:49:45.318910 Capability: type 0x0d @ 0x90
1799 07:49:45.321008 PCI: 00:1d.0 cmd <- 06
1800 07:49:45.324759 PCI: 00:1f.0 subsystem <- 1028/9d84
1801 07:49:45.325088
1802 07:49:45.327469 PCI: 00:1f.0 cmd <- 407
1803 07:49:45.331969 PCI: 00:1f.3 subsystem <- 1028/9dc8
1804 07:49:45.333418 PCI: 00:1f.3 cmd <- 02
1805 07:49:45.333700
1806 07:49:45.337819 PCI: 00:1f.4 subsystem <- 1028/9da3
1807 07:49:45.339847 PCI: 00:1f.4 cmd <- 03
1808 07:49:45.340120
1809 07:49:45.344008 PCI: 00:1f.5 subsystem <- 1028/9da4
1810 07:49:45.344281
1811 07:49:45.346654 PCI: 00:1f.5 cmd <- 406
1812 07:49:45.346932
1813 07:49:45.350054 PCI: 00:1f.6 subsystem <- 1028/15be
1814 07:49:45.350333
1815 07:49:45.352886 PCI: 00:1f.6 cmd <- 02
1816 07:49:45.362894 PCI: 01:00.0 cmd <- 02
1817 07:49:45.363196
1818 07:49:45.367927 PCI: 02:00.0 cmd <- 06
1819 07:49:45.371661 done.
1820 07:49:45.371940
1821 07:49:45.377519 BS: BS_DEV_ENABLE times (us): entry 404 run 170538 exit 0
1822 07:49:45.379967 Initializing devices...
1823 07:49:45.383059 Root Device init ...
1824 07:49:45.386032 Root Device init finished in 2139 usecs
1825 07:49:45.389280 CPU_CLUSTER: 0 init ...
1826 07:49:45.393176 CPU_CLUSTER: 0 init finished in 2429 usecs
1827 07:49:45.399764 PCI: 00:00.0 init ...
1828 07:49:45.402770 CPU TDP: 15 Watts
1829 07:49:45.403056
1830 07:49:45.404489 CPU PL2 = 51 Watts
1831 07:49:45.405170
1832 07:49:45.408547 PCI: 00:00.0 init finished in 7035 usecs
1833 07:49:45.411434 PCI: 00:02.0 init ...
1834 07:49:45.415611 PCI: 00:02.0 init finished in 2236 usecs
1835 07:49:45.418411 PCI: 00:04.0 init ...
1836 07:49:45.421766 PCI: 00:04.0 init finished in 2236 usecs
1837 07:49:45.424925 PCI: 00:08.0 init ...
1838 07:49:45.428721 PCI: 00:08.0 init finished in 2235 usecs
1839 07:49:45.431939 PCI: 00:12.0 init ...
1840 07:49:45.436128 PCI: 00:12.0 init finished in 2236 usecs
1841 07:49:45.438459 PCI: 00:14.0 init ...
1842 07:49:45.441894 PCI: 00:14.0 init finished in 2236 usecs
1843 07:49:45.444349 PCI: 00:14.2 init ...
1844 07:49:45.444839
1845 07:49:45.448618 PCI: 00:14.2 init finished in 2235 usecs
1846 07:49:45.451237 PCI: 00:14.3 init ...
1847 07:49:45.451518
1848 07:49:45.455644 PCI: 00:14.3 init finished in 2240 usecs
1849 07:49:45.458053 PCI: 00:15.0 init ...
1850 07:49:45.462249 DW I2C bus 0 at 0xd1347000 (400 KHz)
1851 07:49:45.465798 PCI: 00:15.0 init finished in 5934 usecs
1852 07:49:45.468424 PCI: 00:15.1 init ...
1853 07:49:45.472094 DW I2C bus 1 at 0xd1348000 (400 KHz)
1854 07:49:45.472665
1855 07:49:45.476175 PCI: 00:15.1 init finished in 5933 usecs
1856 07:49:45.479246 PCI: 00:16.0 init ...
1857 07:49:45.483335 PCI: 00:16.0 init finished in 2236 usecs
1858 07:49:45.483908
1859 07:49:45.485719 PCI: 00:19.0 init ...
1860 07:49:45.486019
1861 07:49:45.489874 DW I2C bus 4 at 0xd134a000 (400 KHz)
1862 07:49:45.493881 PCI: 00:19.0 init finished in 5933 usecs
1863 07:49:45.496905 PCI: 00:1c.0 init ...
1864 07:49:45.499804 Initializing PCH PCIe bridge.
1865 07:49:45.504291 PCI: 00:1c.0 init finished in 5239 usecs
1866 07:49:45.506398 PCI: 00:1d.0 init ...
1867 07:49:45.509933 Initializing PCH PCIe bridge.
1868 07:49:45.513615 PCI: 00:1d.0 init finished in 5248 usecs
1869 07:49:45.514256
1870 07:49:45.516957 PCI: 00:1f.0 init ...
1871 07:49:45.520308 IOAPIC: Initializing IOAPIC at 0xfec00000
1872 07:49:45.520756
1873 07:49:45.525294 IOAPIC: Bootstrap Processor Local APIC = 0x00
1874 07:49:45.527584 IOAPIC: ID = 0x02
1875 07:49:45.529715 IOAPIC: Dumping registers
1876 07:49:45.532332 reg 0x0000: 0x02000000
1877 07:49:45.534903 reg 0x0001: 0x00770020
1878 07:49:45.537287 reg 0x0002: 0x00000000
1879 07:49:45.543662 PCI: 00:1f.0 init finished in 25028 usecs
1880 07:49:45.546599 PCI: 00:1f.3 init ...
1881 07:49:45.551072 HDA: codec_mask = 05
1882 07:49:45.551350
1883 07:49:45.554095 HDA: Initializing codec #2
1884 07:49:45.556787 HDA: codec viddid: 8086280b
1885 07:49:45.559900 HDA: No verb table entry found
1886 07:49:45.562382 HDA: Initializing codec #0
1887 07:49:45.565510 HDA: codec viddid: 10ec0236
1888 07:49:45.572586 HDA: verb loaded.
1889 07:49:45.576867 PCI: 00:1f.3 init finished in 28831 usecs
1890 07:49:45.577609
1891 07:49:45.580080 PCI: 00:1f.4 init ...
1892 07:49:45.583559 PCI: 00:1f.4 init finished in 2245 usecs
1893 07:49:45.586559 PCI: 00:1f.6 init ...
1894 07:49:45.586845
1895 07:49:45.590622 PCI: 00:1f.6 init finished in 2226 usecs
1896 07:49:45.602152 PCI: 01:00.0 init ...
1897 07:49:45.605362 PCI: 01:00.0 init finished in 2227 usecs
1898 07:49:45.605886
1899 07:49:45.608085 PCI: 02:00.0 init ...
1900 07:49:45.612547 PCI: 02:00.0 init finished in 2235 usecs
1901 07:49:45.614553 PNP: 0c09.0 init ...
1902 07:49:45.618793 EC Label : 00.00.20
1903 07:49:45.619446
1904 07:49:45.622723 EC Revision : 9ca674bba
1905 07:49:45.626293 EC Model Num : 08B9
1906 07:49:45.629447 EC Build Date : 05/10/19
1907 07:49:45.638986 PNP: 0c09.0 init finished in 21756 usecs
1908 07:49:45.640963 Devices initialized
1909 07:49:45.641246
1910 07:49:45.643561 Show all devs... After init.
1911 07:49:45.646183 Root Device: enabled 1
1912 07:49:45.648415 CPU_CLUSTER: 0: enabled 1
1913 07:49:45.649041
1914 07:49:45.650894 DOMAIN: 0000: enabled 1
1915 07:49:45.652953 APIC: 00: enabled 1
1916 07:49:45.655696 PCI: 00:00.0: enabled 1
1917 07:49:45.656349
1918 07:49:45.657850 PCI: 00:02.0: enabled 1
1919 07:49:45.660335 PCI: 00:04.0: enabled 1
1920 07:49:45.663132 PCI: 00:12.0: enabled 1
1921 07:49:45.665316 PCI: 00:12.5: enabled 0
1922 07:49:45.667354 PCI: 00:12.6: enabled 0
1923 07:49:45.667633
1924 07:49:45.670682 PCI: 00:13.0: enabled 0
1925 07:49:45.672564 PCI: 00:14.0: enabled 1
1926 07:49:45.673158
1927 07:49:45.675631 PCI: 00:14.1: enabled 0
1928 07:49:45.677282 PCI: 00:14.3: enabled 1
1929 07:49:45.679810 PCI: 00:14.5: enabled 0
1930 07:49:45.680093
1931 07:49:45.682208 PCI: 00:15.0: enabled 1
1932 07:49:45.684401 PCI: 00:15.1: enabled 1
1933 07:49:45.684685
1934 07:49:45.687087 PCI: 00:15.2: enabled 0
1935 07:49:45.689476 PCI: 00:15.3: enabled 0
1936 07:49:45.691726 PCI: 00:16.0: enabled 1
1937 07:49:45.692504
1938 07:49:45.694327 PCI: 00:16.1: enabled 0
1939 07:49:45.697756 PCI: 00:16.2: enabled 0
1940 07:49:45.699665 PCI: 00:16.3: enabled 0
1941 07:49:45.701909 PCI: 00:16.4: enabled 0
1942 07:49:45.703796 PCI: 00:16.5: enabled 0
1943 07:49:45.704068
1944 07:49:45.707335 PCI: 00:17.0: enabled 1
1945 07:49:45.709152 PCI: 00:19.0: enabled 1
1946 07:49:45.709751
1947 07:49:45.711647 PCI: 00:19.1: enabled 0
1948 07:49:45.711928
1949 07:49:45.713732 PCI: 00:19.2: enabled 1
1950 07:49:45.714308
1951 07:49:45.715956 PCI: 00:1a.0: enabled 0
1952 07:49:45.716232
1953 07:49:45.719014 PCI: 00:1c.0: enabled 1
1954 07:49:45.721302 PCI: 00:1c.1: enabled 0
1955 07:49:45.721597
1956 07:49:45.723707 PCI: 00:1c.2: enabled 0
1957 07:49:45.723987
1958 07:49:45.725813 PCI: 00:1c.3: enabled 0
1959 07:49:45.728859 PCI: 00:1c.4: enabled 0
1960 07:49:45.730928 PCI: 00:1c.5: enabled 0
1961 07:49:45.733036 PCI: 00:1c.6: enabled 0
1962 07:49:45.733770
1963 07:49:45.735427 PCI: 00:1c.7: enabled 0
1964 07:49:45.737871 PCI: 00:1d.0: enabled 1
1965 07:49:45.738407
1966 07:49:45.740563 PCI: 00:1d.1: enabled 0
1967 07:49:45.743056 PCI: 00:1d.2: enabled 0
1968 07:49:45.745434 PCI: 00:1d.3: enabled 0
1969 07:49:45.747676 PCI: 00:1d.4: enabled 0
1970 07:49:45.748299
1971 07:49:45.750856 PCI: 00:1e.0: enabled 0
1972 07:49:45.752893 PCI: 00:1e.1: enabled 0
1973 07:49:45.755357 PCI: 00:1e.2: enabled 0
1974 07:49:45.758324 PCI: 00:1e.3: enabled 0
1975 07:49:45.759736 PCI: 00:1f.0: enabled 1
1976 07:49:45.760380
1977 07:49:45.763260 PCI: 00:1f.1: enabled 0
1978 07:49:45.764807 PCI: 00:1f.2: enabled 0
1979 07:49:45.767659 PCI: 00:1f.3: enabled 1
1980 07:49:45.769636 PCI: 00:1f.4: enabled 1
1981 07:49:45.769913
1982 07:49:45.772614 PCI: 00:1f.5: enabled 1
1983 07:49:45.774673 PCI: 00:1f.6: enabled 1
1984 07:49:45.776857 USB0 port 0: enabled 1
1985 07:49:45.777143
1986 07:49:45.778951 I2C: 01:10: enabled 1
1987 07:49:45.779238
1988 07:49:45.781367 I2C: 01:10: enabled 1
1989 07:49:45.783477 I2C: 01:34: enabled 1
1990 07:49:45.784293
1991 07:49:45.786287 I2C: 02:2c: enabled 1
1992 07:49:45.787736 I2C: 03:50: enabled 1
1993 07:49:45.788340
1994 07:49:45.790395 PNP: 0c09.0: enabled 1
1995 07:49:45.792579 USB2 port 0: enabled 1
1996 07:49:45.794898 USB2 port 1: enabled 1
1997 07:49:45.795306
1998 07:49:45.797517 USB2 port 2: enabled 1
1999 07:49:45.799608 USB2 port 4: enabled 1
2000 07:49:45.801968 USB2 port 5: enabled 1
2001 07:49:45.804901 USB2 port 6: enabled 1
2002 07:49:45.806396 USB2 port 7: enabled 1
2003 07:49:45.806781
2004 07:49:45.808995 USB2 port 8: enabled 1
2005 07:49:45.811494 USB2 port 9: enabled 1
2006 07:49:45.813410 USB3 port 0: enabled 1
2007 07:49:45.813682
2008 07:49:45.815825 USB3 port 1: enabled 1
2009 07:49:45.816443
2010 07:49:45.818193 USB3 port 2: enabled 1
2011 07:49:45.820883 USB3 port 3: enabled 1
2012 07:49:45.821579
2013 07:49:45.823059 USB3 port 4: enabled 1
2014 07:49:45.825575 APIC: 03: enabled 1
2015 07:49:45.825851
2016 07:49:45.827562 APIC: 06: enabled 1
2017 07:49:45.829435 APIC: 01: enabled 1
2018 07:49:45.831007 APIC: 02: enabled 1
2019 07:49:45.831720
2020 07:49:45.833244 APIC: 07: enabled 1
2021 07:49:45.835535 APIC: 05: enabled 1
2022 07:49:45.835801
2023 07:49:45.838100 APIC: 04: enabled 1
2024 07:49:45.840028 PCI: 00:08.0: enabled 1
2025 07:49:45.840292
2026 07:49:45.842512 PCI: 00:14.2: enabled 1
2027 07:49:45.845000 PCI: 01:00.0: enabled 1
2028 07:49:45.846910 PCI: 02:00.0: enabled 1
2029 07:49:45.852021 Disabling ACPI via APMC:
2030 07:49:45.852292
2031 07:49:45.853949 done.
2032 07:49:45.854669
2033 07:49:45.859713 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
2034 07:49:45.862605 ELOG: NV offset 0x1bf0000 size 0x4000
2035 07:49:45.870958 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2036 07:49:45.877441 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:45 UTC
2037 07:49:45.882025 POST: Unexpected post code in previous boot: 0x55
2038 07:49:45.888829 ELOG: Event(A3) added with size 11 at 2022-11-25 07:49:45 UTC
2039 07:49:45.895030 ELOG: Event(A6) added with size 13 at 2022-11-25 07:49:45 UTC
2040 07:49:45.900880 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:45 UTC
2041 07:49:45.901165
2042 07:49:45.907267 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:45 UTC
2043 07:49:45.913295 ELOG: Event(9A) added with size 9 at 2022-11-25 07:49:45 UTC
2044 07:49:45.919722 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:45 UTC
2045 07:49:45.925903 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:45 UTC
2046 07:49:45.926400
2047 07:49:45.932133 BS: BS_DEV_INIT times (us): entry 0 run 469560 exit 78796
2048 07:49:45.932424
2049 07:49:45.938582 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:45 UTC
2050 07:49:45.946308 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
2051 07:49:45.952688 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:45 UTC
2052 07:49:45.956984 elog_add_boot_reason: Logged dev mode boot
2053 07:49:45.959422 Finalize devices...
2054 07:49:45.960732 PCI: 00:17.0 final
2055 07:49:45.961354
2056 07:49:45.963151 Devices finalized
2057 07:49:45.968154 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
2058 07:49:45.968432
2059 07:49:45.974087 BS: BS_POST_DEVICE times (us): entry 24771 run 5935 exit 5379
2060 07:49:45.974365
2061 07:49:45.979725 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
2062 07:49:45.988543 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
2063 07:49:45.992315 disable_unused_touchscreen: Disable ACPI0C50
2064 07:49:45.992765
2065 07:49:45.997241 disable_unused_touchscreen: Enable ELAN900C
2066 07:49:46.000048 CBFS @ 1d00000 size 300000
2067 07:49:46.006317 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
2068 07:49:46.009681 CBFS: Locating 'fallback/dsdt.aml'
2069 07:49:46.014087 CBFS: Found @ offset 10b200 size 4448
2070 07:49:46.016602 CBFS @ 1d00000 size 300000
2071 07:49:46.023114 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
2072 07:49:46.026012 CBFS: Locating 'fallback/slic'
2073 07:49:46.026306
2074 07:49:46.031250 CBFS: 'fallback/slic' not found.
2075 07:49:46.035489 ACPI: Writing ACPI tables at 89c0f000.
2076 07:49:46.036510 ACPI: * FACS
2077 07:49:46.036793
2078 07:49:46.038368 ACPI: * DSDT
2079 07:49:46.042470 Ramoops buffer: 0x100000@0x89b0e000.
2080 07:49:46.042765
2081 07:49:46.046645 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
2082 07:49:46.051878 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
2083 07:49:46.055621 ACPI: * FADT
2084 07:49:46.056381 SCI is IRQ9
2085 07:49:46.060501 ACPI: added table 1/32, length now 40
2086 07:49:46.060783
2087 07:49:46.062017 ACPI: * SSDT
2088 07:49:46.065723 Found 1 CPU(s) with 8 core(s) each.
2089 07:49:46.070138 Error: Could not locate 'wifi_sar' in VPD.
2090 07:49:46.074111 Error: failed from getting SAR limits!
2091 07:49:46.078377 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
2092 07:49:46.082552 dw_i2c: bad counts. hcnt = -14 lcnt = 30
2093 07:49:46.086177 dw_i2c: bad counts. hcnt = -20 lcnt = 40
2094 07:49:46.086460
2095 07:49:46.090527 dw_i2c: bad counts. hcnt = -18 lcnt = 48
2096 07:49:46.095240 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
2097 07:49:46.100820 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
2098 07:49:46.101109
2099 07:49:46.105312 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
2100 07:49:46.110319 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
2101 07:49:46.115520 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
2102 07:49:46.121930 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
2103 07:49:46.127187 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
2104 07:49:46.134006 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
2105 07:49:46.138411 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
2106 07:49:46.143072 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
2107 07:49:46.147090 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
2108 07:49:46.152620 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
2109 07:49:46.157689 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
2110 07:49:46.163128 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
2111 07:49:46.169283 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
2112 07:49:46.169955
2113 07:49:46.174650 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
2114 07:49:46.180923 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
2115 07:49:46.185548 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
2116 07:49:46.189271 ACPI: added table 2/32, length now 44
2117 07:49:46.189565
2118 07:49:46.190619 ACPI: * MCFG
2119 07:49:46.194811 ACPI: added table 3/32, length now 48
2120 07:49:46.195094
2121 07:49:46.196121 ACPI: * TPM2
2122 07:49:46.196858
2123 07:49:46.198908 TPM2 log created at 89afe000
2124 07:49:46.199198
2125 07:49:46.203410 ACPI: added table 4/32, length now 52
2126 07:49:46.204457 ACPI: * MADT
2127 07:49:46.205152
2128 07:49:46.206019 SCI is IRQ9
2129 07:49:46.210288 ACPI: added table 5/32, length now 56
2130 07:49:46.211524 current = 89c14bd0
2131 07:49:46.212262
2132 07:49:46.214078 ACPI: * IGD OpRegion
2133 07:49:46.216304 GMA: Found VBT in CBFS
2134 07:49:46.219112 GMA: Found valid VBT in CBFS
2135 07:49:46.219393
2136 07:49:46.222960 ACPI: added table 6/32, length now 60
2137 07:49:46.224545 ACPI: * HPET
2138 07:49:46.228311 ACPI: added table 7/32, length now 64
2139 07:49:46.228851
2140 07:49:46.230203 ACPI: done.
2141 07:49:46.233054 ACPI tables: 31872 bytes.
2142 07:49:46.235555 smbios_write_tables: 89afd000
2143 07:49:46.235831
2144 07:49:46.237615 recv_ec_data: 0x01
2145 07:49:46.240683 Create SMBIOS type 17
2146 07:49:46.243195 PCI: 00:14.3 (Intel WiFi)
2147 07:49:46.245330 SMBIOS tables: 708 bytes.
2148 07:49:46.249174 Writing table forward entry at 0x00000500
2149 07:49:46.249449
2150 07:49:46.255474 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
2151 07:49:46.259300 Writing coreboot table at 0x89c33000
2152 07:49:46.265294 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2153 07:49:46.265589
2154 07:49:46.269320 1. 0000000000001000-000000000009ffff: RAM
2155 07:49:46.274415 2. 00000000000a0000-00000000000fffff: RESERVED
2156 07:49:46.278668 3. 0000000000100000-0000000089afcfff: RAM
2157 07:49:46.284986 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
2158 07:49:46.290047 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
2159 07:49:46.295592 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
2160 07:49:46.299743 7. 000000008a000000-000000008f7fffff: RESERVED
2161 07:49:46.304393 8. 00000000e0000000-00000000efffffff: RESERVED
2162 07:49:46.304699
2163 07:49:46.309157 9. 00000000fc000000-00000000fc000fff: RESERVED
2164 07:49:46.313928 10. 00000000fe000000-00000000fe00ffff: RESERVED
2165 07:49:46.314317
2166 07:49:46.318774 11. 00000000fed10000-00000000fed17fff: RESERVED
2167 07:49:46.319059
2168 07:49:46.324048 12. 00000000fed80000-00000000fed83fff: RESERVED
2169 07:49:46.328154 13. 00000000feda0000-00000000feda1fff: RESERVED
2170 07:49:46.332614 14. 0000000100000000-000000026e7fffff: RAM
2171 07:49:46.337097 Graphics framebuffer located at 0xc0000000
2172 07:49:46.339586 Passing 6 GPIOs to payload:
2173 07:49:46.345795 NAME | PORT | POLARITY | VALUE
2174 07:49:46.350305 write protect | 0x000000dc | high | high
2175 07:49:46.355459 recovery | 0x000000d5 | low | high
2176 07:49:46.360902 lid | undefined | high | high
2177 07:49:46.365981 power | undefined | high | low
2178 07:49:46.366276
2179 07:49:46.371325 oprom | undefined | high | low
2180 07:49:46.376670 EC in RW | undefined | high | low
2181 07:49:46.378951 recv_ec_data: 0x01
2182 07:49:46.379234
2183 07:49:46.379902 SKU ID: 3
2184 07:49:46.382365 CBFS @ 1d00000 size 300000
2185 07:49:46.382643
2186 07:49:46.389471 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
2187 07:49:46.394808 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a344
2188 07:49:46.395101
2189 07:49:46.397696 coreboot table: 1484 bytes.
2190 07:49:46.401328 IMD ROOT 0. 89fff000 00001000
2191 07:49:46.401634
2192 07:49:46.405286 IMD SMALL 1. 89ffe000 00001000
2193 07:49:46.408443 FSP MEMORY 2. 89d0e000 002f0000
2194 07:49:46.411010 CONSOLE 3. 89cee000 00020000
2195 07:49:46.414299 TIME STAMP 4. 89ced000 00000910
2196 07:49:46.418086 VBOOT WORK 5. 89cea000 00003000
2197 07:49:46.421341 VBOOT 6. 89ce9000 00000c0c
2198 07:49:46.424392 MRC DATA 7. 89ce7000 000018f0
2199 07:49:46.427487 ROMSTG STCK 8. 89ce6000 00000400
2200 07:49:46.431427 AFTER CAR 9. 89cdc000 0000a000
2201 07:49:46.434909 RAMSTAGE 10. 89c80000 0005c000
2202 07:49:46.438008 REFCODE 11. 89c4b000 00035000
2203 07:49:46.441076 SMM BACKUP 12. 89c3b000 00010000
2204 07:49:46.441359
2205 07:49:46.443987 COREBOOT 13. 89c33000 00008000
2206 07:49:46.444266
2207 07:49:46.447971 ACPI 14. 89c0f000 00024000
2208 07:49:46.451047 ACPI GNVS 15. 89c0e000 00001000
2209 07:49:46.451332
2210 07:49:46.454359 RAMOOPS 16. 89b0e000 00100000
2211 07:49:46.454640
2212 07:49:46.457534 TPM2 TCGLOG17. 89afe000 00010000
2213 07:49:46.458190
2214 07:49:46.461014 SMBIOS 18. 89afd000 00000800
2215 07:49:46.462854 IMD small region:
2216 07:49:46.463443
2217 07:49:46.466033 IMD ROOT 0. 89ffec00 00000400
2218 07:49:46.466331
2219 07:49:46.469307 FSP RUNTIME 1. 89ffebe0 00000004
2220 07:49:46.469587
2221 07:49:46.473506 POWER STATE 2. 89ffeba0 00000040
2222 07:49:46.476691 ROMSTAGE 3. 89ffeb80 00000004
2223 07:49:46.476985
2224 07:49:46.479998 MEM INFO 4. 89ffe9c0 000001a9
2225 07:49:46.484136 VPD 5. 89ffe980 00000031
2226 07:49:46.487147 COREBOOTFWD 6. 89ffe940 00000028
2227 07:49:46.487433
2228 07:49:46.490338 MTRR: Physical address space:
2229 07:49:46.496635 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2230 07:49:46.502472 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2231 07:49:46.509002 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
2232 07:49:46.514839 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
2233 07:49:46.521394 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
2234 07:49:46.527266 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
2235 07:49:46.533819 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
2236 07:49:46.538496 MTRR: Fixed MSR 0x250 0x0606060606060606
2237 07:49:46.542209 MTRR: Fixed MSR 0x258 0x0606060606060606
2238 07:49:46.542494
2239 07:49:46.546190 MTRR: Fixed MSR 0x259 0x0000000000000000
2240 07:49:46.550094 MTRR: Fixed MSR 0x268 0x0606060606060606
2241 07:49:46.554264 MTRR: Fixed MSR 0x269 0x0606060606060606
2242 07:49:46.554560
2243 07:49:46.558070 MTRR: Fixed MSR 0x26a 0x0606060606060606
2244 07:49:46.558711
2245 07:49:46.562939 MTRR: Fixed MSR 0x26b 0x0606060606060606
2246 07:49:46.566293 MTRR: Fixed MSR 0x26c 0x0606060606060606
2247 07:49:46.570602 MTRR: Fixed MSR 0x26d 0x0606060606060606
2248 07:49:46.574432 MTRR: Fixed MSR 0x26e 0x0606060606060606
2249 07:49:46.578576 MTRR: Fixed MSR 0x26f 0x0606060606060606
2250 07:49:46.582203 call enable_fixed_mtrr()
2251 07:49:46.586243 CPU physical address size: 39 bits
2252 07:49:46.590389 MTRR: default type WB/UC MTRR counts: 7/7.
2253 07:49:46.593477 MTRR: UC selected as default type.
2254 07:49:46.599845 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2255 07:49:46.605470 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
2256 07:49:46.612065 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
2257 07:49:46.617927 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
2258 07:49:46.624217 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
2259 07:49:46.630911 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2260 07:49:46.637072 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2261 07:49:46.637860
2262 07:49:46.638155
2263 07:49:46.639576 MTRR check
2264 07:49:46.641238 Fixed MTRRs : Enabled
2265 07:49:46.641533
2266 07:49:46.643680 Variable MTRRs: Enabled
2267 07:49:46.643957
2268 07:49:46.648197 MTRR: Fixed MSR 0x250 0x0606060606060606
2269 07:49:46.652100 MTRR: Fixed MSR 0x258 0x0606060606060606
2270 07:49:46.656912 MTRR: Fixed MSR 0x259 0x0000000000000000
2271 07:49:46.660327 MTRR: Fixed MSR 0x268 0x0606060606060606
2272 07:49:46.664404 MTRR: Fixed MSR 0x269 0x0606060606060606
2273 07:49:46.664686
2274 07:49:46.668768 MTRR: Fixed MSR 0x26a 0x0606060606060606
2275 07:49:46.669462
2276 07:49:46.672726 MTRR: Fixed MSR 0x26b 0x0606060606060606
2277 07:49:46.676460 MTRR: Fixed MSR 0x26c 0x0606060606060606
2278 07:49:46.676751
2279 07:49:46.681287 MTRR: Fixed MSR 0x26d 0x0606060606060606
2280 07:49:46.685101 MTRR: Fixed MSR 0x26e 0x0606060606060606
2281 07:49:46.685388
2282 07:49:46.689058 MTRR: Fixed MSR 0x26f 0x0606060606060606
2283 07:49:46.695665 BS: BS_WRITE_TABLES times (us): entry 17195 run 490007 exit 157064
2284 07:49:46.698162 call enable_fixed_mtrr()
2285 07:49:46.698454
2286 07:49:46.701043 CBFS @ 1d00000 size 300000
2287 07:49:46.704895 CPU physical address size: 39 bits
2288 07:49:46.711495 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
2289 07:49:46.715426 MTRR: Fixed MSR 0x250 0x0606060606060606
2290 07:49:46.719659 MTRR: Fixed MSR 0x250 0x0606060606060606
2291 07:49:46.719947
2292 07:49:46.723268 MTRR: Fixed MSR 0x258 0x0606060606060606
2293 07:49:46.723553
2294 07:49:46.727544 MTRR: Fixed MSR 0x259 0x0000000000000000
2295 07:49:46.731345 MTRR: Fixed MSR 0x268 0x0606060606060606
2296 07:49:46.735515 MTRR: Fixed MSR 0x269 0x0606060606060606
2297 07:49:46.740030 MTRR: Fixed MSR 0x26a 0x0606060606060606
2298 07:49:46.743776 MTRR: Fixed MSR 0x26b 0x0606060606060606
2299 07:49:46.747787 MTRR: Fixed MSR 0x26c 0x0606060606060606
2300 07:49:46.751700 MTRR: Fixed MSR 0x26d 0x0606060606060606
2301 07:49:46.751990
2302 07:49:46.755874 MTRR: Fixed MSR 0x26e 0x0606060606060606
2303 07:49:46.756153
2304 07:49:46.760053 MTRR: Fixed MSR 0x26f 0x0606060606060606
2305 07:49:46.765167 MTRR: Fixed MSR 0x258 0x0606060606060606
2306 07:49:46.767070 call enable_fixed_mtrr()
2307 07:49:46.767347
2308 07:49:46.771497 MTRR: Fixed MSR 0x259 0x0000000000000000
2309 07:49:46.771783
2310 07:49:46.775232 MTRR: Fixed MSR 0x268 0x0606060606060606
2311 07:49:46.775829
2312 07:49:46.779189 MTRR: Fixed MSR 0x269 0x0606060606060606
2313 07:49:46.783594 MTRR: Fixed MSR 0x26a 0x0606060606060606
2314 07:49:46.787360 MTRR: Fixed MSR 0x26b 0x0606060606060606
2315 07:49:46.791793 MTRR: Fixed MSR 0x26c 0x0606060606060606
2316 07:49:46.796338 MTRR: Fixed MSR 0x26d 0x0606060606060606
2317 07:49:46.799521 MTRR: Fixed MSR 0x26e 0x0606060606060606
2318 07:49:46.804492 MTRR: Fixed MSR 0x26f 0x0606060606060606
2319 07:49:46.807898 CPU physical address size: 39 bits
2320 07:49:46.810825 call enable_fixed_mtrr()
2321 07:49:46.814800 MTRR: Fixed MSR 0x250 0x0606060606060606
2322 07:49:46.819057 MTRR: Fixed MSR 0x258 0x0606060606060606
2323 07:49:46.819345
2324 07:49:46.823571 MTRR: Fixed MSR 0x259 0x0000000000000000
2325 07:49:46.826664 MTRR: Fixed MSR 0x268 0x0606060606060606
2326 07:49:46.830865 MTRR: Fixed MSR 0x269 0x0606060606060606
2327 07:49:46.834865 MTRR: Fixed MSR 0x26a 0x0606060606060606
2328 07:49:46.838859 MTRR: Fixed MSR 0x26b 0x0606060606060606
2329 07:49:46.843074 MTRR: Fixed MSR 0x26c 0x0606060606060606
2330 07:49:46.847181 MTRR: Fixed MSR 0x26d 0x0606060606060606
2331 07:49:46.847470
2332 07:49:46.851315 MTRR: Fixed MSR 0x26e 0x0606060606060606
2333 07:49:46.856245 MTRR: Fixed MSR 0x26f 0x0606060606060606
2334 07:49:46.859957 MTRR: Fixed MSR 0x250 0x0606060606060606
2335 07:49:46.860584
2336 07:49:46.862084 call enable_fixed_mtrr()
2337 07:49:46.866061 MTRR: Fixed MSR 0x258 0x0606060606060606
2338 07:49:46.866345
2339 07:49:46.870204 MTRR: Fixed MSR 0x259 0x0000000000000000
2340 07:49:46.874567 MTRR: Fixed MSR 0x268 0x0606060606060606
2341 07:49:46.878349 MTRR: Fixed MSR 0x269 0x0606060606060606
2342 07:49:46.882802 MTRR: Fixed MSR 0x26a 0x0606060606060606
2343 07:49:46.886525 MTRR: Fixed MSR 0x26b 0x0606060606060606
2344 07:49:46.890774 MTRR: Fixed MSR 0x26c 0x0606060606060606
2345 07:49:46.895079 MTRR: Fixed MSR 0x26d 0x0606060606060606
2346 07:49:46.895726
2347 07:49:46.899441 MTRR: Fixed MSR 0x26e 0x0606060606060606
2348 07:49:46.903427 MTRR: Fixed MSR 0x26f 0x0606060606060606
2349 07:49:46.907153 CPU physical address size: 39 bits
2350 07:49:46.909715 call enable_fixed_mtrr()
2351 07:49:46.913437 CPU physical address size: 39 bits
2352 07:49:46.914098
2353 07:49:46.916386 CBFS: Locating 'fallback/payload'
2354 07:49:46.916666
2355 07:49:46.920073 CPU physical address size: 39 bits
2356 07:49:46.923909 CBFS: Found @ offset 1cf4c0 size 3a954
2357 07:49:46.928878 MTRR: Fixed MSR 0x250 0x0606060606060606
2358 07:49:46.932625 MTRR: Fixed MSR 0x250 0x0606060606060606
2359 07:49:46.936578 MTRR: Fixed MSR 0x258 0x0606060606060606
2360 07:49:46.940947 MTRR: Fixed MSR 0x259 0x0000000000000000
2361 07:49:46.944721 MTRR: Fixed MSR 0x268 0x0606060606060606
2362 07:49:46.948548 MTRR: Fixed MSR 0x269 0x0606060606060606
2363 07:49:46.953518 MTRR: Fixed MSR 0x26a 0x0606060606060606
2364 07:49:46.956446 MTRR: Fixed MSR 0x26b 0x0606060606060606
2365 07:49:46.960717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2366 07:49:46.964688 MTRR: Fixed MSR 0x26d 0x0606060606060606
2367 07:49:46.968987 MTRR: Fixed MSR 0x26e 0x0606060606060606
2368 07:49:46.973572 MTRR: Fixed MSR 0x26f 0x0606060606060606
2369 07:49:46.977185 MTRR: Fixed MSR 0x258 0x0606060606060606
2370 07:49:46.979859 call enable_fixed_mtrr()
2371 07:49:46.980157
2372 07:49:46.983817 MTRR: Fixed MSR 0x259 0x0000000000000000
2373 07:49:46.988001 MTRR: Fixed MSR 0x268 0x0606060606060606
2374 07:49:46.988315
2375 07:49:46.991961 MTRR: Fixed MSR 0x269 0x0606060606060606
2376 07:49:46.996221 MTRR: Fixed MSR 0x26a 0x0606060606060606
2377 07:49:47.001015 MTRR: Fixed MSR 0x26b 0x0606060606060606
2378 07:49:47.004123 MTRR: Fixed MSR 0x26c 0x0606060606060606
2379 07:49:47.004710
2380 07:49:47.008805 MTRR: Fixed MSR 0x26d 0x0606060606060606
2381 07:49:47.012585 MTRR: Fixed MSR 0x26e 0x0606060606060606
2382 07:49:47.016474 MTRR: Fixed MSR 0x26f 0x0606060606060606
2383 07:49:47.020298 CPU physical address size: 39 bits
2384 07:49:47.023587 call enable_fixed_mtrr()
2385 07:49:47.027624 Checking segment from ROM address 0xffecf4f8
2386 07:49:47.031483 CPU physical address size: 39 bits
2387 07:49:47.036078 Checking segment from ROM address 0xffecf514
2388 07:49:47.040033 Loading segment from ROM address 0xffecf4f8
2389 07:49:47.042662 code (compression=0)
2390 07:49:47.050843 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
2391 07:49:47.059723 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
2392 07:49:47.061518 it's not compressed!
2393 07:49:47.061807
2394 07:49:47.143099 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
2395 07:49:47.143416
2396 07:49:47.150261 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
2397 07:49:47.150551
2398 07:49:47.157750 Loading segment from ROM address 0xffecf514
2399 07:49:47.161407 Entry Point 0x30100018
2400 07:49:47.162322 Loaded segments
2401 07:49:47.172637 Finalizing chipset.
2402 07:49:47.173566 Finalizing SMM.
2403 07:49:47.179641 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466374 exit 11521
2404 07:49:47.180049
2405 07:49:47.183226 mp_park_aps done after 0 msecs.
2406 07:49:47.187266 Jumping to boot code at 30100018(89c33000)
2407 07:49:47.187553
2408 07:49:47.196336 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
2409 07:49:47.196623
2410 07:49:47.196697
2411 07:49:47.196762
2412 07:49:47.196824
2413 07:49:47.199690 Starting depthcharge on sarien...
2414 07:49:47.199779
2415 07:49:47.200518 end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
2416 07:49:47.200629 start: 2.2.4 bootloader-commands (timeout 00:04:33) [common]
2417 07:49:47.200715 Setting prompt string to ['sarien:']
2418 07:49:47.200796 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:33)
2419 07:49:47.207131 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2420 07:49:47.207393
2421 07:49:47.215328 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2422 07:49:47.215424
2423 07:49:47.223204 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2424 07:49:47.223286
2425 07:49:47.225191 BIOS MMAP details:
2426 07:49:47.225264
2427 07:49:47.227735 IFD Base Offset : 0x1000000
2428 07:49:47.227987
2429 07:49:47.230841 IFD End Offset : 0x2000000
2430 07:49:47.230936
2431 07:49:47.233474 MMAP Size : 0x1000000
2432 07:49:47.233737
2433 07:49:47.237062 MMAP Start : 0xff000000
2434 07:49:47.237143
2435 07:49:47.243700 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2436 07:49:47.243788
2437 07:49:47.251847 New NVMe Controller 0x3214e110 @ 00:1d:04
2438 07:49:47.251955
2439 07:49:47.256269 New NVMe Controller 0x3214e1d8 @ 00:1d:00
2440 07:49:47.256355
2441 07:49:47.262256 The GBB signature is at 0x30000014 and is: 24 47 42 42
2442 07:49:47.262341
2443 07:49:47.267964 Wipe memory regions:
2444 07:49:47.268056
2445 07:49:47.271673 [0x00000000001000, 0x000000000a0000)
2446 07:49:47.271760
2447 07:49:47.275522 [0x00000000100000, 0x00000030000000)
2448 07:49:47.275608
2449 07:49:47.361627 [0x00000032751910, 0x00000089afd000)
2450 07:49:47.361752
2451 07:49:47.515488 [0x00000100000000, 0x0000026e800000)
2452 07:49:47.515793
2453 07:49:48.528375 R8152: Initializing
2454 07:49:48.528509
2455 07:49:48.530253 Version 6 (ocp_data = 5c30)
2456 07:49:48.530506
2457 07:49:48.534302 R8152: Done initializing
2458 07:49:48.534387
2459 07:49:48.535714 Adding net device
2460 07:49:48.535984
2461 07:49:48.542003 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2462 07:49:48.542091
2463 07:49:48.542158
2464 07:49:48.542227
2465 07:49:48.543015 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2467 07:49:48.643731 sarien:tftpboot 192.168.201.1 8119437/tftp-deploy-dgheb1v5/kernel/bzImage 8119437/tftp-deploy-dgheb1v5/kernel/cmdline 8119437/tftp-deploy-dgheb1v5/ramdisk/ramdisk.cpio.gz
2468 07:49:48.643894 Setting prompt string to 'Starting kernel'
2469 07:49:48.643994 Setting prompt string to ['Starting kernel']
2470 07:49:48.644068 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2471 07:49:48.644150 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
2472 07:49:48.644983 tftpboot 192.168.201.1 8119437/tftp-deploy-dgheb1v5/kernel/bzImage 8119437/tftp-deploy-dgheb1v5/kernel/cmdline 8119437/tftp-deploy-dgheb1v5/ramdisk/ramdisk.cpio.gz
2473 07:49:48.645254
2474 07:49:48.645343
2475 07:49:48.647063 Waiting for link
2476 07:49:48.647145
2477 07:49:48.847268 done.
2478 07:49:48.847403
2479 07:49:48.849948 MAC: 00:24:32:30:79:bd
2480 07:49:48.850024
2481 07:49:48.852572 Sending DHCP discover... done.
2482 07:49:48.852831
2483 07:49:48.855788 Waiting for reply... done.
2484 07:49:48.855862
2485 07:49:48.860658 Sending DHCP request... done.
2486 07:49:48.860811
2487 07:49:48.862964 Waiting for reply... done.
2488 07:49:48.863054
2489 07:49:48.865942 My ip is 192.168.201.166
2490 07:49:48.866025
2491 07:49:48.869068 The DHCP server ip is 192.168.201.1
2492 07:49:48.869151
2493 07:49:48.874268 TFTP server IP predefined by user: 192.168.201.1
2494 07:49:48.874398
2495 07:49:48.880983 Bootfile predefined by user: 8119437/tftp-deploy-dgheb1v5/kernel/bzImage
2496 07:49:48.881589
2497 07:49:48.884465 Sending tftp read request... done.
2498 07:49:48.884739
2499 07:49:48.888177 Waiting for the transfer...
2500 07:49:48.888260
2501 07:49:49.414921 00000000 ################################################################
2502 07:49:49.415281
2503 07:49:49.948090 00080000 ################################################################
2504 07:49:49.948458
2505 07:49:50.473501 00100000 ################################################################
2506 07:49:50.474042
2507 07:49:50.990386 00180000 ################################################################
2508 07:49:50.990723
2509 07:49:51.529331 00200000 ################################################################
2510 07:49:51.529468
2511 07:49:52.079925 00280000 ################################################################
2512 07:49:52.080570
2513 07:49:52.602899 00300000 ################################################################
2514 07:49:52.603040
2515 07:49:53.120698 00380000 ################################################################
2516 07:49:53.121375
2517 07:49:53.634480 00400000 ################################################################
2518 07:49:53.635079
2519 07:49:54.159831 00480000 ################################################################
2520 07:49:54.160530
2521 07:49:54.683782 00500000 ################################################################
2522 07:49:54.684162
2523 07:49:55.203084 00580000 ################################################################
2524 07:49:55.203429
2525 07:49:55.725363 00600000 ################################################################
2526 07:49:55.725724
2527 07:49:56.034959 00680000 ####################################### done.
2528 07:49:56.035099
2529 07:49:56.038974 The bootfile was 7131024 bytes long.
2530 07:49:56.039671
2531 07:49:56.042856 Sending tftp read request... done.
2532 07:49:56.042956
2533 07:49:56.045824 Waiting for the transfer...
2534 07:49:56.045917
2535 07:49:56.565604 00000000 ################################################################
2536 07:49:56.565966
2537 07:49:57.094427 00080000 ################################################################
2538 07:49:57.095101
2539 07:49:57.612491 00100000 ################################################################
2540 07:49:57.612860
2541 07:49:58.137102 00180000 ################################################################
2542 07:49:58.137559
2543 07:49:58.659906 00200000 ################################################################
2544 07:49:58.660654
2545 07:49:59.183350 00280000 ################################################################
2546 07:49:59.183951
2547 07:49:59.705009 00300000 ################################################################
2548 07:49:59.705383
2549 07:50:00.217345 00380000 ################################################################
2550 07:50:00.217967
2551 07:50:00.741653 00400000 ################################################################
2552 07:50:00.742029
2553 07:50:01.263407 00480000 ################################################################
2554 07:50:01.263953
2555 07:50:01.779328 00500000 ################################################################
2556 07:50:01.779931
2557 07:50:02.291239 00580000 ################################################################
2558 07:50:02.291645
2559 07:50:02.800855 00600000 ################################################################
2560 07:50:02.801244
2561 07:50:03.331473 00680000 ################################################################
2562 07:50:03.331863
2563 07:50:03.839332 00700000 ################################################################
2564 07:50:03.839730
2565 07:50:04.377314 00780000 ################################################################
2566 07:50:04.377726
2567 07:50:04.540793 00800000 #################### done.
2568 07:50:04.540947
2569 07:50:04.544385 Sending tftp read request... done.
2570 07:50:04.544480
2571 07:50:04.547344 Waiting for the transfer...
2572 07:50:04.547722
2573 07:50:04.548757 00000000 # done.
2574 07:50:04.548837
2575 07:50:04.557644 Command line loaded dynamically from TFTP file: 8119437/tftp-deploy-dgheb1v5/kernel/cmdline
2576 07:50:04.557763
2577 07:50:04.574814 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2578 07:50:04.575154
2579 07:50:04.582564 Shutting down all USB controllers.
2580 07:50:04.582648
2581 07:50:04.585681 Removing current net device
2582 07:50:04.585765
2583 07:50:04.595201 EC: exit firmware mode
2584 07:50:04.595286
2585 07:50:04.597779 Finalizing coreboot
2586 07:50:04.597862
2587 07:50:04.602919 Exiting depthcharge with code 4 at timestamp: 25085742
2588 07:50:04.603492
2589 07:50:04.603838
2590 07:50:04.604975 Starting kernel ...
2591 07:50:04.605059
2592 07:50:04.605459 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2593 07:50:04.605570 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2594 07:50:04.605655 Setting prompt string to ['Linux version [0-9]']
2595 07:50:04.605744 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2596 07:50:04.605827 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2597 07:50:04.606036
2598 07:50:04.606151
2599 07:50:04.606411
2601 07:54:19.606503 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2603 07:54:19.608135 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2605 07:54:19.609415 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2608 07:54:19.611255 end: 2 depthcharge-action (duration 00:05:00) [common]
2610 07:54:19.611492 Cleaning after the job
2611 07:54:19.611575 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/ramdisk
2612 07:54:19.612209 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/kernel
2613 07:54:19.612747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119437/tftp-deploy-dgheb1v5/modules
2614 07:54:19.612928 start: 5.1 power-off (timeout 00:00:30) [common]
2615 07:54:19.613088 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
2616 07:54:19.633336 >> Command sent successfully.
2617 07:54:19.635438 Returned 0 in 0 seconds
2618 07:54:19.736602 end: 5.1 power-off (duration 00:00:00) [common]
2620 07:54:19.738232 start: 5.2 read-feedback (timeout 00:10:00) [common]
2621 07:54:19.739391 Listened to connection for namespace 'common' for up to 1s
2622 07:54:20.742947 Finalising connection for namespace 'common'
2623 07:54:20.743620 Disconnecting from shell: Finalise
2624 07:54:20.844764 end: 5.2 read-feedback (duration 00:00:01) [common]
2625 07:54:20.844934 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119437
2626 07:54:20.849775 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119437
2627 07:54:20.849906 JobError: Your job cannot terminate cleanly.