Boot log: lenovo-TPad-C13-Yoga-zork

    1 07:49:12.514224  lava-dispatcher, installed at version: 2022.10
    2 07:49:12.514416  start: 0 validate
    3 07:49:12.514546  Start time: 2022-11-25 07:49:12.514538+00:00 (UTC)
    4 07:49:12.514674  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:49:12.514804  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
    6 07:49:12.517611  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:49:12.517736  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:49:12.528123  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:49:12.528235  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 07:49:12.530799  validate duration: 0.02
   12 07:49:12.531030  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 07:49:12.531135  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 07:49:12.531227  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 07:49:12.531332  Not decompressing ramdisk as can be used compressed.
   16 07:49:12.531416  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
   17 07:49:12.531480  saving as /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/ramdisk/rootfs.cpio.gz
   18 07:49:12.531540  total size: 8415749 (8MB)
   19 07:49:12.553546  progress   0% (0MB)
   20 07:49:12.583805  progress   5% (0MB)
   21 07:49:12.616379  progress  10% (0MB)
   22 07:49:12.638761  progress  15% (1MB)
   23 07:49:12.664340  progress  20% (1MB)
   24 07:49:12.685254  progress  25% (2MB)
   25 07:49:12.712952  progress  30% (2MB)
   26 07:49:12.740783  progress  35% (2MB)
   27 07:49:12.762467  progress  40% (3MB)
   28 07:49:12.788342  progress  45% (3MB)
   29 07:49:12.814989  progress  50% (4MB)
   30 07:49:12.837554  progress  55% (4MB)
   31 07:49:12.862719  progress  60% (4MB)
   32 07:49:12.883544  progress  65% (5MB)
   33 07:49:12.919635  progress  70% (5MB)
   34 07:49:12.952993  progress  75% (6MB)
   35 07:49:12.981667  progress  80% (6MB)
   36 07:49:13.006166  progress  85% (6MB)
   37 07:49:13.033671  progress  90% (7MB)
   38 07:49:13.056724  progress  95% (7MB)
   39 07:49:13.083363  progress 100% (8MB)
   40 07:49:13.083647  8MB downloaded in 0.55s (14.54MB/s)
   41 07:49:13.083801  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 07:49:13.084050  end: 1.1 download-retry (duration 00:00:01) [common]
   44 07:49:13.084137  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 07:49:13.084224  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 07:49:13.084330  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 07:49:13.084399  saving as /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/kernel/bzImage
   48 07:49:13.084458  total size: 7131024 (6MB)
   49 07:49:13.084517  No compression specified
   50 07:49:13.140146  progress   0% (0MB)
   51 07:49:13.211727  progress   5% (0MB)
   52 07:49:13.257005  progress  10% (0MB)
   53 07:49:13.311169  progress  15% (1MB)
   54 07:49:13.348652  progress  20% (1MB)
   55 07:49:13.397638  progress  25% (1MB)
   56 07:49:13.443056  progress  30% (2MB)
   57 07:49:13.484875  progress  35% (2MB)
   58 07:49:13.531814  progress  40% (2MB)
   59 07:49:13.574667  progress  45% (3MB)
   60 07:49:13.612473  progress  50% (3MB)
   61 07:49:13.653474  progress  55% (3MB)
   62 07:49:13.691794  progress  60% (4MB)
   63 07:49:13.737013  progress  65% (4MB)
   64 07:49:13.774198  progress  70% (4MB)
   65 07:49:13.819384  progress  75% (5MB)
   66 07:49:13.859924  progress  80% (5MB)
   67 07:49:13.899076  progress  85% (5MB)
   68 07:49:13.938850  progress  90% (6MB)
   69 07:49:13.994833  progress  95% (6MB)
   70 07:49:14.036605  progress 100% (6MB)
   71 07:49:14.036892  6MB downloaded in 0.95s (7.14MB/s)
   72 07:49:14.037052  end: 1.2.1 http-download (duration 00:00:01) [common]
   74 07:49:14.037293  end: 1.2 download-retry (duration 00:00:01) [common]
   75 07:49:14.037391  start: 1.3 download-retry (timeout 00:09:58) [common]
   76 07:49:14.037488  start: 1.3.1 http-download (timeout 00:09:58) [common]
   77 07:49:14.037595  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 07:49:14.037662  saving as /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/modules/modules.tar
   79 07:49:14.037723  total size: 52060 (0MB)
   80 07:49:14.037786  Using unxz to decompress xz
   81 07:49:14.063116  progress  62% (0MB)
   82 07:49:14.068999  progress 100% (0MB)
   83 07:49:14.070493  0MB downloaded in 0.03s (1.52MB/s)
   84 07:49:14.070709  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 07:49:14.070973  end: 1.3 download-retry (duration 00:00:00) [common]
   87 07:49:14.071080  start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
   88 07:49:14.071175  start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
   89 07:49:14.071263  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 07:49:14.071346  start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
   91 07:49:14.071512  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf
   92 07:49:14.071629  makedir: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin
   93 07:49:14.071715  makedir: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/tests
   94 07:49:14.071824  makedir: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/results
   95 07:49:14.071942  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-add-keys
   96 07:49:14.072075  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-add-sources
   97 07:49:14.072192  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-background-process-start
   98 07:49:14.072305  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-background-process-stop
   99 07:49:14.072433  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-common-functions
  100 07:49:14.072542  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-echo-ipv4
  101 07:49:14.072652  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-install-packages
  102 07:49:14.072762  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-installed-packages
  103 07:49:14.072868  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-os-build
  104 07:49:14.072976  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-probe-channel
  105 07:49:14.073085  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-probe-ip
  106 07:49:14.073193  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-target-ip
  107 07:49:14.073300  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-target-mac
  108 07:49:14.073406  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-target-storage
  109 07:49:14.073563  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-case
  110 07:49:14.073672  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-event
  111 07:49:14.073793  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-feedback
  112 07:49:14.073905  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-raise
  113 07:49:14.074017  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-reference
  114 07:49:14.074124  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-runner
  115 07:49:14.074232  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-set
  116 07:49:14.074341  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-test-shell
  117 07:49:14.074497  Updating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-install-packages (oe)
  118 07:49:14.074617  Updating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/bin/lava-installed-packages (oe)
  119 07:49:14.074718  Creating /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/environment
  120 07:49:14.074806  LAVA metadata
  121 07:49:14.074878  - LAVA_JOB_ID=8119404
  122 07:49:14.074947  - LAVA_DISPATCHER_IP=192.168.201.1
  123 07:49:14.075049  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
  124 07:49:14.075115  skipped lava-vland-overlay
  125 07:49:14.075192  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 07:49:14.075276  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
  127 07:49:14.075340  skipped lava-multinode-overlay
  128 07:49:14.075413  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 07:49:14.075495  start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
  130 07:49:14.075568  Loading test definitions
  131 07:49:14.075667  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
  132 07:49:14.075743  Using /lava-8119404 at stage 0
  133 07:49:14.076007  uuid=8119404_1.4.2.3.1 testdef=None
  134 07:49:14.076096  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 07:49:14.076183  start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
  136 07:49:14.076714  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 07:49:14.076955  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
  139 07:49:14.077580  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 07:49:14.077824  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
  142 07:49:14.078359  runner path: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/0/tests/0_dmesg test_uuid 8119404_1.4.2.3.1
  143 07:49:14.078507  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 07:49:14.078744  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
  146 07:49:14.078823  Using /lava-8119404 at stage 1
  147 07:49:14.079073  uuid=8119404_1.4.2.3.5 testdef=None
  148 07:49:14.079162  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 07:49:14.079250  start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
  150 07:49:14.079691  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 07:49:14.079912  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
  153 07:49:14.080470  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 07:49:14.080703  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
  156 07:49:14.081301  runner path: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/1/tests/1_bootrr test_uuid 8119404_1.4.2.3.5
  157 07:49:14.081453  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 07:49:14.081664  Creating lava-test-runner.conf files
  160 07:49:14.081731  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/0 for stage 0
  161 07:49:14.081811  - 0_dmesg
  162 07:49:14.081886  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119404/lava-overlay-sqhsl4mf/lava-8119404/1 for stage 1
  163 07:49:14.081970  - 1_bootrr
  164 07:49:14.082059  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 07:49:14.082147  start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
  166 07:49:14.088308  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 07:49:14.088466  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
  168 07:49:14.088569  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 07:49:14.088657  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 07:49:14.088746  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
  171 07:49:14.271772  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 07:49:14.272104  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  173 07:49:14.272213  extracting modules file /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119404/extract-overlay-ramdisk-eyt9znov/ramdisk
  174 07:49:14.276493  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 07:49:14.276610  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  176 07:49:14.276707  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119404/compress-overlay-asdy89g1/overlay-1.4.2.4.tar.gz to ramdisk
  177 07:49:14.276781  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119404/compress-overlay-asdy89g1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119404/extract-overlay-ramdisk-eyt9znov/ramdisk
  178 07:49:14.280762  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 07:49:14.280880  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  180 07:49:14.281010  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 07:49:14.281122  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  182 07:49:14.281219  Building ramdisk /var/lib/lava/dispatcher/tmp/8119404/extract-overlay-ramdisk-eyt9znov/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119404/extract-overlay-ramdisk-eyt9znov/ramdisk
  183 07:49:14.343542  >> 48008 blocks

  184 07:49:15.088290  rename /var/lib/lava/dispatcher/tmp/8119404/extract-overlay-ramdisk-eyt9znov/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/ramdisk/ramdisk.cpio.gz
  185 07:49:15.088680  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 07:49:15.088811  start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
  187 07:49:15.088915  start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
  188 07:49:15.089014  No mkimage arch provided, not using FIT.
  189 07:49:15.089107  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 07:49:15.089192  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 07:49:15.089293  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 07:49:15.089384  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
  193 07:49:15.089475  No LXC device requested
  194 07:49:15.089564  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 07:49:15.089659  start: 1.6 deploy-device-env (timeout 00:09:57) [common]
  196 07:49:15.089749  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 07:49:15.089824  Checking files for TFTP limit of 4294967296 bytes.
  198 07:49:15.090232  end: 1 tftp-deploy (duration 00:00:03) [common]
  199 07:49:15.090349  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 07:49:15.090462  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 07:49:15.090596  substitutions:
  202 07:49:15.090666  - {DTB}: None
  203 07:49:15.090733  - {INITRD}: 8119404/tftp-deploy-heqw8oi3/ramdisk/ramdisk.cpio.gz
  204 07:49:15.090798  - {KERNEL}: 8119404/tftp-deploy-heqw8oi3/kernel/bzImage
  205 07:49:15.090859  - {LAVA_MAC}: None
  206 07:49:15.090915  - {PRESEED_CONFIG}: None
  207 07:49:15.090974  - {PRESEED_LOCAL}: None
  208 07:49:15.091032  - {RAMDISK}: 8119404/tftp-deploy-heqw8oi3/ramdisk/ramdisk.cpio.gz
  209 07:49:15.091090  - {ROOT_PART}: None
  210 07:49:15.091155  - {ROOT}: None
  211 07:49:15.091213  - {SERVER_IP}: 192.168.201.1
  212 07:49:15.091272  - {TEE}: None
  213 07:49:15.091331  Parsed boot commands:
  214 07:49:15.091388  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 07:49:15.091548  Parsed boot commands: tftpboot 192.168.201.1 8119404/tftp-deploy-heqw8oi3/kernel/bzImage 8119404/tftp-deploy-heqw8oi3/kernel/cmdline 8119404/tftp-deploy-heqw8oi3/ramdisk/ramdisk.cpio.gz
  216 07:49:15.091640  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 07:49:15.091732  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 07:49:15.091839  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 07:49:15.091929  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 07:49:15.092014  Not connected, no need to disconnect.
  221 07:49:15.092095  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 07:49:15.092188  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 07:49:15.092262  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost lenovo-TPad-C13-Yoga-zork-cbg-1'
  224 07:49:15.094760  Setting prompt string to ['lava-test: # ']
  225 07:49:15.095042  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 07:49:15.095148  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 07:49:15.095246  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 07:49:15.095341  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 07:49:15.095535  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=lenovo-TPad-C13-Yoga-zork-cbg-1' '--port=1' '--command=reboot'
  230 07:49:15.115145  >> Command sent successfully.

  231 07:49:15.117165  Returned 0 in 0 seconds
  232 07:49:15.217560  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 07:49:15.218154  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 07:49:15.218281  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 07:49:15.218369  Setting prompt string to 'Starting depthcharge on Morphius...'
  237 07:49:15.218448  Changing prompt to 'Starting depthcharge on Morphius...'
  238 07:49:15.218515  depthcharge-start: Wait for prompt Starting depthcharge on Morphius... (timeout 00:05:00)
  239 07:49:15.218804  [Enter `^Ec?' for help]
  240 07:49:23.105347  
  241 07:49:23.106015  
  242 07:49:23.111863  coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct  8 23:13:58 UTC 2020 bootblock starting (log level: 8)...
  243 07:49:23.115177  
  244 07:49:23.115608  Family_Model: 00820f01
  245 07:49:23.118565  PSP boot mode: Production
  246 07:49:23.121526  Silicon level: Pre-Production
  247 07:49:23.122024  PMxC0 STATUS: 0x800 BIT11 
  248 07:49:23.125197  I2C bus 3 version 0x3132322a
  249 07:49:23.128312  DW I2C bus 3 at 0xfedc5000 (400 KHz)
  250 07:49:23.134746  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
  251 07:49:23.138387  CBFS: Locating 'fallback/romstage'
  252 07:49:23.141872  CBFS: Found @ offset 80 size d124
  253 07:49:23.151142  BS: bootblock times (exec / console): total (unknown) / 36 ms
  254 07:49:23.151599  
  255 07:49:23.151945  
  256 07:49:23.160618  coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct  8 23:13:58 UTC 2020 romstage starting (log level: 8)...
  257 07:49:23.161052  POST: 0x41
  258 07:49:23.164187  POST: 0x42
  259 07:49:23.164569  Family_Model: 00820f01
  260 07:49:23.173901  GPIO Control Switch: 0xef000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000
  261 07:49:23.174336  POST: 0x43
  262 07:49:23.176896  Boot Count incremented to 4932
  263 07:49:23.180170  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
  264 07:49:23.183563  CBFS: Locating 'fspm.bin'
  265 07:49:23.186839  CBFS: Found @ offset 2fc80 size 1845e
  266 07:49:23.211689  Spec version: v2.0
  267 07:49:23.214967  Revision: 0.0.0, Build Number 1
  268 07:49:23.215089  Type: release/test
  269 07:49:23.221250  image ID: AMD_PCS0, base 0x20c0000 + 0x4b000
  270 07:49:23.224421  	Config region        0x46ce4 + 0x104
  271 07:49:23.224561  	Memory init offset   0x7b8
  272 07:49:23.227845  POST: 0x34
  273 07:49:23.227995  bootmode is set to: 0
  274 07:49:23.231024  POST: 0x36
  275 07:49:23.235106  Calling FspMemoryInit: 0x020c07b8
  276 07:49:23.235294  	0x02000dec: raminit_upd
  277 07:49:23.238618  	0x0204d1cc: &hob_list_ptr
  278 07:49:23.238825  POST: 0x92
  279 07:49:23.243766  POST: 0x98
  280 07:49:23.244107  CBMEM:
  281 07:49:23.247508  IMD: root @ 0xcb7ff000 254 entries.
  282 07:49:23.250578  IMD: root @ 0xcb7fec00 62 entries.
  283 07:49:23.253854  FMAP: area RO_VPD found @ 800000 (16384 bytes)
  284 07:49:23.257395  WARNING: RO_VPD is uninitialized or empty.
  285 07:49:23.260502  FMAP: area RW_VPD found @ 615000 (8192 bytes)
  286 07:49:23.264063  External stage cache:
  287 07:49:23.267695  IMD: root @ 0xcbfff000 254 entries.
  288 07:49:23.270519  IMD: root @ 0xcbffec00 62 entries.
  289 07:49:23.273925  FspMemoryInit returned 0x00000000
  290 07:49:23.277477  FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)
  291 07:49:23.280353  APOB RAM copy differs from flash
  292 07:49:23.286770  Copy APOB from RAM 0x0x02001000/0xa3a4 to flash 0x0/0x10000
  293 07:49:23.290169  spi_init: SPI BAR at 0xfec10000
  294 07:49:23.290254  Manufacturer: ef
  295 07:49:23.296512  SF: Detected ef 6018 with sector size 0x1000, total 0x1000000
  296 07:49:24.116187  SF: Successfully erased 65536 bytes @ 0x0
  297 07:49:24.317753  Updated APOB in flash
  298 07:49:24.317900  POST: 0x44
  299 07:49:24.324175  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
  300 07:49:24.327500  CBFS: Locating 'fallback/ramstage'
  301 07:49:24.331340  CBFS: Found @ offset f800 size 1bec6
  302 07:49:24.334497  Decompressing stage fallback/ramstage @ 0xca6b5fc0 (1119216 bytes)
  303 07:49:24.337670  
  304 07:49:24.372873  Loading module at 0xca6b6000 with entry 0xca6b6000. filesize: 0x405c0 memsize: 0x1113b0
  305 07:49:24.375924  Processing 4368 relocs. Offset value of 0xba6b6000
  306 07:49:24.382504  BS: romstage times (exec / console): total (unknown) / 155 ms
  307 07:49:24.382587  
  308 07:49:24.382657  
  309 07:49:24.392419  coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct  8 23:13:58 UTC 2020 ramstage starting (log level: 8)...
  310 07:49:24.392503  POST: 0x39
  311 07:49:24.395646  POST: 0x80
  312 07:49:24.395723  Normal boot
  313 07:49:24.395787  POST: 0x70
  314 07:49:24.402436  BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms
  315 07:49:24.402524  POST: 0x71
  316 07:49:24.405965  mainboard: EC init
  317 07:49:24.409360  Chrome EC: Set SMI mask to 0x0000000000000000
  318 07:49:24.412158  Chrome EC: UHEPI supported
  319 07:49:24.415685  Chrome EC: clear events_b mask to 0x0000000000000000
  320 07:49:24.422360  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
  321 07:49:24.429344  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000010001206
  322 07:49:24.432373  Chrome EC: Set WAKE mask to 0x0000000000000000
  323 07:49:24.435583  Board ID: 5
  324 07:49:24.444808  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
  325 07:49:24.448200  CBFS: Locating 'fsps.bin'
  326 07:49:24.451559  CBFS: Found @ offset 48fc0 size 10cbd
  327 07:49:24.469531  Spec version: v2.0
  328 07:49:24.472567  Revision: 0.0.0, Build Number 1
  329 07:49:24.472643  Type: release/test
  330 07:49:24.478847  image ID: AMD_PCS0, base 0xca683000 + 0x32000
  331 07:49:24.482235  	Config region        0x2ec14 + 0x152
  332 07:49:24.482324  	Silicon init offset  0x3c2
  333 07:49:24.485695  	Notify phase offset  0x3b8
  334 07:49:24.488720  Calling FspSiliconInit: 0xca6833c2
  335 07:49:24.492097  	0xca7073b0: upd
  336 07:49:24.492172  POST: 0x93
  337 07:49:24.722410  POST: 0x99
  338 07:49:24.725837  FspSiliconInit returned 0x00000000
  339 07:49:24.728492  I2C bus 2 version 0x3132322a
  340 07:49:24.731951  DW I2C bus 2 at 0xfedc4000 (400 KHz)
  341 07:49:24.735340  FMAP: area RW_ELOG found @ 610000 (4096 bytes)
  342 07:49:24.738811  spi_init: SPI BAR at 0xfec10000
  343 07:49:24.738883  Manufacturer: ef
  344 07:49:24.745035  SF: Detected ef 6018 with sector size 0x1000, total 0x1000000
  345 07:49:24.748436  ELOG: NV offset 0x610000 size 0x1000
  346 07:49:24.759678  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
  347 07:49:24.765884  ELOG: Event(17) added with size 13 at 2022-11-25 07:49:25 UTC
  348 07:49:24.772512  ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:25 UTC
  349 07:49:24.772585  PM1_STS: PWRBTN 
  350 07:49:24.778890  BS: BS_DEV_INIT_CHIPS run times (exec / console): 261 / 110 ms
  351 07:49:24.778967  POST: 0x72
  352 07:49:24.782336  Enumerating buses...
  353 07:49:24.785751  Show all devs... Before device enumeration.
  354 07:49:24.785823  Root Device: enabled 1
  355 07:49:24.789170  CPU_CLUSTER: 0: enabled 1
  356 07:49:24.792724  DOMAIN: 0000: enabled 1
  357 07:49:24.792793  GENERIC: 0.1: enabled 1
  358 07:49:24.795487  MMIO: fedc5000: enabled 1
  359 07:49:24.798906  MMIO: fedca000: enabled 1
  360 07:49:24.802288  MMIO: fedce000: enabled 0
  361 07:49:24.802364  MMIO: fedcf000: enabled 0
  362 07:49:24.805947  MMIO: fedc4000: enabled 1
  363 07:49:24.808685  APIC: 00: enabled 1
  364 07:49:24.808754  PCI: 00:00.0: enabled 1
  365 07:49:24.812244  PCI: 00:00.2: enabled 1
  366 07:49:24.815623  PCI: 00:01.0: enabled 1
  367 07:49:24.815697  PCI: 00:01.1: enabled 0
  368 07:49:24.818706  PCI: 00:01.2: enabled 1
  369 07:49:24.822057  PCI: 00:01.3: enabled 1
  370 07:49:24.822134  PCI: 00:01.4: enabled 0
  371 07:49:24.825346  PCI: 00:01.5: enabled 0
  372 07:49:24.825448  PCI: 00:01.6: enabled 0
  373 07:49:24.828747  PCI: 00:01.7: enabled 1
  374 07:49:24.832200  PCI: 00:08.0: enabled 1
  375 07:49:24.832273  PCI: 00:08.1: enabled 1
  376 07:49:24.835564  PCI: 00:08.2: enabled 0
  377 07:49:24.839131  PCI: 00:14.0: enabled 1
  378 07:49:24.839203  PCI: 00:14.3: enabled 1
  379 07:49:24.842662  PCI: 00:14.6: enabled 0
  380 07:49:24.845712  PCI: 00:18.0: enabled 1
  381 07:49:24.845782  PCI: 00:18.1: enabled 1
  382 07:49:24.849307  PCI: 00:18.2: enabled 1
  383 07:49:24.852374  PCI: 00:18.3: enabled 1
  384 07:49:24.852443  PCI: 00:18.4: enabled 1
  385 07:49:24.855826  PCI: 00:18.5: enabled 1
  386 07:49:24.858468  PCI: 00:18.6: enabled 1
  387 07:49:24.858536  I2C: 00:50: enabled 1
  388 07:49:24.861902  GENERIC: 0.0: enabled 1
  389 07:49:24.865319  I2C: 00:15: enabled 1
  390 07:49:24.865397  I2C: 00:2c: enabled 1
  391 07:49:24.868696  I2C: 00:5d: enabled 1
  392 07:49:24.868766  GENERIC: 0.0: enabled 1
  393 07:49:24.871818  PCI: 00:00.0: enabled 1
  394 07:49:24.875223  PCI: 00:00.1: enabled 1
  395 07:49:24.875292  PCI: 00:00.2: enabled 1
  396 07:49:24.878849  PCI: 00:00.3: enabled 1
  397 07:49:24.882295  PCI: 00:00.4: enabled 1
  398 07:49:24.882370  PCI: 00:00.5: enabled 1
  399 07:49:24.885165  PCI: 00:00.6: enabled 0
  400 07:49:24.888758  PCI: 00:00.7: enabled 1
  401 07:49:24.888830  PCI: 00:00.0: enabled 0
  402 07:49:24.891783  PNP: 0c09.0: enabled 1
  403 07:49:24.895186  USB0 port 0: enabled 1
  404 07:49:24.895257  USB0 port 0: enabled 1
  405 07:49:24.898723  GENERIC: 0.0: enabled 1
  406 07:49:24.898792  GENERIC: 0.0: enabled 1
  407 07:49:24.901927  
  408 07:49:24.901999  GENERIC: 1.0: enabled 1
  409 07:49:24.905020  GENERIC: 0.0: enabled 1
  410 07:49:24.905091  USB2 port 0: enabled 1
  411 07:49:24.908306  USB2 port 1: enabled 1
  412 07:49:24.911817  USB2 port 2: enabled 1
  413 07:49:24.911888  USB2 port 3: enabled 1
  414 07:49:24.915337  USB3 port 0: enabled 1
  415 07:49:24.918656  USB3 port 1: enabled 1
  416 07:49:24.918739  USB3 port 2: enabled 1
  417 07:49:24.921641  USB3 port 3: enabled 1
  418 07:49:24.921714  USB2 port 4: enabled 1
  419 07:49:24.925067  
  420 07:49:24.925139  USB2 port 5: enabled 1
  421 07:49:24.928595  USB2 port 0: enabled 1
  422 07:49:24.928667  USB2 port 1: enabled 1
  423 07:49:24.931832  USB3 port 0: enabled 1
  424 07:49:24.934912  I2C: 00:1a: enabled 1
  425 07:49:24.934985  Compare with tree...
  426 07:49:24.938164  Root Device: enabled 1
  427 07:49:24.941667   CPU_CLUSTER: 0: enabled 1
  428 07:49:24.941742    APIC: 00: enabled 1
  429 07:49:24.945186   DOMAIN: 0000: enabled 1
  430 07:49:24.948074    PCI: 00:00.0: enabled 1
  431 07:49:24.948149    PCI: 00:00.2: enabled 1
  432 07:49:24.951601    PCI: 00:01.0: enabled 1
  433 07:49:24.954955    PCI: 00:01.1: enabled 0
  434 07:49:24.955027    PCI: 00:01.2: enabled 1
  435 07:49:24.958032    PCI: 00:01.3: enabled 1
  436 07:49:24.961337    PCI: 00:01.4: enabled 0
  437 07:49:24.964632    PCI: 00:01.5: enabled 0
  438 07:49:24.964702    PCI: 00:01.6: enabled 0
  439 07:49:24.968286    PCI: 00:01.7: enabled 1
  440 07:49:24.971759    PCI: 00:08.0: enabled 1
  441 07:49:24.971830    PCI: 00:08.1: enabled 1
  442 07:49:24.974788     PCI: 00:00.0: enabled 1
  443 07:49:24.978155     PCI: 00:00.1: enabled 1
  444 07:49:24.981694     PCI: 00:00.2: enabled 1
  445 07:49:24.981768     PCI: 00:00.3: enabled 1
  446 07:49:24.984741      USB0 port 0: enabled 1
  447 07:49:24.988206       USB2 port 0: enabled 1
  448 07:49:24.991722       USB2 port 1: enabled 1
  449 07:49:24.991794       USB2 port 2: enabled 1
  450 07:49:24.995185       USB2 port 3: enabled 1
  451 07:49:24.998409       USB3 port 0: enabled 1
  452 07:49:25.001309       USB3 port 1: enabled 1
  453 07:49:25.001388       USB3 port 2: enabled 1
  454 07:49:25.004743       USB3 port 3: enabled 1
  455 07:49:25.008173       USB2 port 4: enabled 1
  456 07:49:25.011248       USB2 port 5: enabled 1
  457 07:49:25.011358     PCI: 00:00.4: enabled 1
  458 07:49:25.014821      USB0 port 0: enabled 1
  459 07:49:25.017571       USB2 port 0: enabled 1
  460 07:49:25.021193       USB2 port 1: enabled 1
  461 07:49:25.021278       USB3 port 0: enabled 1
  462 07:49:25.024790     PCI: 00:00.5: enabled 1
  463 07:49:25.027890      GENERIC: 0.0: enabled 1
  464 07:49:25.030844     PCI: 00:00.6: enabled 0
  465 07:49:25.030922     PCI: 00:00.7: enabled 1
  466 07:49:25.034830    PCI: 00:08.2: enabled 0
  467 07:49:25.037544     PCI: 00:00.0: enabled 0
  468 07:49:25.041055    PCI: 00:14.0: enabled 1
  469 07:49:25.041149    PCI: 00:14.3: enabled 1
  470 07:49:25.044400     PNP: 0c09.0: enabled 1
  471 07:49:25.047999      GENERIC: 0.0: enabled 1
  472 07:49:25.048085       I2C: 00:1a: enabled 1
  473 07:49:25.051162  
  474 07:49:25.051237      GENERIC: 1.0: enabled 1
  475 07:49:25.054336      GENERIC: 0.0: enabled 1
  476 07:49:25.057299    PCI: 00:14.6: enabled 0
  477 07:49:25.057377    PCI: 00:18.0: enabled 1
  478 07:49:25.060847    PCI: 00:18.1: enabled 1
  479 07:49:25.064140    PCI: 00:18.2: enabled 1
  480 07:49:25.067448    PCI: 00:18.3: enabled 1
  481 07:49:25.067612    PCI: 00:18.4: enabled 1
  482 07:49:25.070846    PCI: 00:18.5: enabled 1
  483 07:49:25.074446    PCI: 00:18.6: enabled 1
  484 07:49:25.074530   GENERIC: 0.1: enabled 1
  485 07:49:25.077283   MMIO: fedc5000: enabled 1
  486 07:49:25.080952    I2C: 00:50: enabled 1
  487 07:49:25.083846   MMIO: fedca000: enabled 1
  488 07:49:25.083919    GENERIC: 0.0: enabled 1
  489 07:49:25.087272   MMIO: fedce000: enabled 0
  490 07:49:25.090577   MMIO: fedcf000: enabled 0
  491 07:49:25.090654   MMIO: fedc4000: enabled 1
  492 07:49:25.094034    I2C: 00:15: enabled 1
  493 07:49:25.097078    I2C: 00:2c: enabled 1
  494 07:49:25.097230    I2C: 00:5d: enabled 1
  495 07:49:25.100388    GENERIC: 0.0: enabled 1
  496 07:49:25.103802  Mainboard Morphius Enable.
  497 07:49:25.107286  Root Device scanning...
  498 07:49:25.107360  scan_static_bus for Root Device
  499 07:49:25.110212  CPU_CLUSTER: 0 enabled
  500 07:49:25.113963  DOMAIN: 0000 enabled
  501 07:49:25.114038  GENERIC: 0.1 enabled
  502 07:49:25.117048  MMIO: fedc5000 enabled
  503 07:49:25.117122  MMIO: fedca000 enabled
  504 07:49:25.120540  MMIO: fedce000 disabled
  505 07:49:25.123897  MMIO: fedcf000 disabled
  506 07:49:25.123973  MMIO: fedc4000 enabled
  507 07:49:25.168374  DOMAIN: 0000 scanning...
  508 07:49:25.168467  PCI: pci_scan_bus for bus 00
  509 07:49:25.168932  POST: 0x24
  510 07:49:25.169003  PCI: 00:00.0 [1022/15d0] ops
  511 07:49:25.169324  PCI: 00:00.0 [1022/15d0] enabled
  512 07:49:25.169397  PCI: 00:00.2 [1022/0000] ops
  513 07:49:25.169892  PCI: 00:00.2 [1022/15d1] enabled
  514 07:49:25.169964  PCI: 00:01.0 [1022/1452] enabled
  515 07:49:25.170617  PCI: 00:01.2 [1022/15d3] bus ops
  516 07:49:25.170683  PCI: 00:01.2 [1022/15d3] enabled
  517 07:49:25.170930  PCI: 00:01.3 [1022/15d3] bus ops
  518 07:49:25.170995  PCI: 00:01.3 [1022/15d3] enabled
  519 07:49:25.171052  PCI: 00:01.7 [1022/15d3] bus ops
  520 07:49:25.171108  PCI: 00:01.7 [1022/15d3] enabled
  521 07:49:25.171846  PCI: 00:08.0 [1022/1452] enabled
  522 07:49:25.171910  PCI: 00:08.1 [1022/0000] bus ops
  523 07:49:25.213036  PCI: 00:08.1 [1022/15db] enabled
  524 07:49:25.213128  PCI: 00:14.0 [1022/790b] bus ops
  525 07:49:25.213382  PCI: 00:14.0 [1022/790b] enabled
  526 07:49:25.213461  PCI: 00:14.3 [1022/0000] bus ops
  527 07:49:25.213522  PCI: 00:14.3 [1022/790e] enabled
  528 07:49:25.213587  PCI: 00:18.0 [1022/0000] ops
  529 07:49:25.213838  PCI: 00:18.0 [1022/15e8] enabled
  530 07:49:25.213920  PCI: 00:18.1 [1022/0000] ops
  531 07:49:25.213992  PCI: 00:18.1 [1022/15e9] enabled
  532 07:49:25.214046  PCI: 00:18.2 [1022/0000] ops
  533 07:49:25.214101  PCI: 00:18.2 [1022/15ea] enabled
  534 07:49:25.214155  PCI: 00:18.3 [1022/0000] ops
  535 07:49:25.214392  PCI: 00:18.3 [1022/15eb] enabled
  536 07:49:25.214458  PCI: 00:18.4 [1022/0000] ops
  537 07:49:25.214695  PCI: 00:18.4 [1022/15ec] enabled
  538 07:49:25.214757  PCI: 00:18.5 [1022/0000] ops
  539 07:49:25.257893  PCI: 00:18.5 [1022/15ed] enabled
  540 07:49:25.257986  PCI: 00:18.6 [1022/0000] ops
  541 07:49:25.258243  PCI: 00:18.6 [1022/15ee] enabled
  542 07:49:25.258315  PCI: 00:18.7 [1022/15ef] enabled
  543 07:49:25.258377  POST: 0x25
  544 07:49:25.258436  PCI: Leftover static devices:
  545 07:49:25.258491  PCI: 00:01.1
  546 07:49:25.258734  PCI: 00:01.4
  547 07:49:25.258805  PCI: 00:01.5
  548 07:49:25.258871  PCI: 00:01.6
  549 07:49:25.258927  PCI: 00:08.2
  550 07:49:25.258981  PCI: 00:14.6
  551 07:49:25.259037  PCI: Check your devicetree.cb.
  552 07:49:25.259119  PCI: 00:01.2 scanning...
  553 07:49:25.259195  do_pci_scan_bridge for PCI: 00:01.2
  554 07:49:25.259250  PCI: pci_scan_bus for bus 01
  555 07:49:25.259303  POST: 0x24
  556 07:49:25.259356  PCI: 01:00.0 [8086/0000] ops
  557 07:49:25.259591  PCI: 01:00.0 [8086/2723] enabled
  558 07:49:25.259651  POST: 0x25
  559 07:49:25.259704  POST: 0x55
  560 07:49:25.303733  Enabling Common Clock Configuration
  561 07:49:25.303846  L1 Sub-State supported from root port 1
  562 07:49:25.304589  L1 Sub-State Support = 0xf
  563 07:49:25.304670  CommonModeRestoreTime = 0x1e
  564 07:49:25.304925  Power On Value = 0x9, Power On Scale = 0x0
  565 07:49:25.304992  ASPM: Enabled L1
  566 07:49:25.305240  PCIe: Max_Payload_Size adjusted to 128
  567 07:49:25.305306  scan_bus: bus PCI: 00:01.2 finished in 36 msecs
  568 07:49:25.305364  PCI: 00:01.3 scanning...
  569 07:49:25.305456  do_pci_scan_bridge for PCI: 00:01.3
  570 07:49:25.305697  PCI: pci_scan_bus for bus 02
  571 07:49:25.305760  POST: 0x24
  572 07:49:25.305994  PCI: 02:00.0 [17a0/9750] enabled
  573 07:49:25.306054  POST: 0x25
  574 07:49:25.306109  POST: 0x55
  575 07:49:25.306552  Enabling Common Clock Configuration
  576 07:49:25.306633  L1 Sub-State supported from root port 1
  577 07:49:25.321380  L1 Sub-State Support = 0xf
  578 07:49:25.321525  CommonModeRestoreTime = 0xff
  579 07:49:25.322058  Power On Value = 0x1f, Power On Scale = 0x2
  580 07:49:25.322139  ASPM: Enabled L1
  581 07:49:25.324782  PCIe: Max_Payload_Size adjusted to 128
  582 07:49:25.328414  scan_bus: bus PCI: 00:01.3 finished in 40 msecs
  583 07:49:25.331420  PCI: 00:01.7 scanning...
  584 07:49:25.334522  do_pci_scan_bridge for PCI: 00:01.7
  585 07:49:25.338013  PCI: pci_scan_bus for bus 03
  586 07:49:25.338096  POST: 0x24
  587 07:49:25.341331  PCI: 03:00.0 [1e0f/0001] enabled
  588 07:49:25.341420  POST: 0x25
  589 07:49:25.344873  POST: 0x55
  590 07:49:25.348431  Enabling Common Clock Configuration
  591 07:49:25.351224  PCIE CLK PM is not supported by endpoint
  592 07:49:25.355131  L1 Sub-State supported from root port 1
  593 07:49:25.357908  L1 Sub-State Support = 0x5
  594 07:49:25.357991  CommonModeRestoreTime = 0x3c
  595 07:49:25.365015  Power On Value = 0x5, Power On Scale = 0x0
  596 07:49:25.365102  ASPM: Enabled L1
  597 07:49:25.368372  PCIe: Max_Payload_Size adjusted to 256
  598 07:49:25.371270  scan_bus: bus PCI: 00:01.7 finished in 36 msecs
  599 07:49:25.375090  PCI: 00:08.1 scanning...
  600 07:49:25.377887  do_pci_scan_bridge for PCI: 00:08.1
  601 07:49:25.381526  PCI: pci_scan_bus for bus 04
  602 07:49:25.381608  POST: 0x24
  603 07:49:25.384553  PCI: 04:00.0 [1002/0000] ops
  604 07:49:25.387919  PCI: 04:00.0 [1002/15d8] enabled
  605 07:49:25.390913  PCI: 04:00.1 [1002/15de] enabled
  606 07:49:25.394405  PCI: 04:00.2 [1022/15df] enabled
  607 07:49:25.397815  PCI: 04:00.3 [1022/0000] bus ops
  608 07:49:25.397886  PCI: 04:00.3 [1022/15e5] enabled
  609 07:49:25.404673  PCI: Static device PCI: 04:00.4 not found, disabling it.
  610 07:49:25.407600  PCI: 04:00.5 [1022/15e2] bus ops
  611 07:49:25.411299  PCI: 04:00.5 [1022/15e2] enabled
  612 07:49:25.414669  PCI: 04:00.7 [1022/15e4] enabled
  613 07:49:25.414753  POST: 0x25
  614 07:49:25.417551  PCI: Leftover static devices:
  615 07:49:25.417634  PCI: 04:00.4
  616 07:49:25.420924  PCI: 04:00.6
  617 07:49:25.421007  PCI: Check your devicetree.cb.
  618 07:49:25.424336  PCI: 04:00.3 scanning...
  619 07:49:25.427694  scan_static_bus for PCI: 04:00.3
  620 07:49:25.427778  USB0 port 0 enabled
  621 07:49:25.430605  
  622 07:49:25.430689  USB0 port 0 scanning...
  623 07:49:25.434272  scan_static_bus for USB0 port 0
  624 07:49:25.437710  USB2 port 0 enabled
  625 07:49:25.437793  USB2 port 1 enabled
  626 07:49:25.440786  USB2 port 2 enabled
  627 07:49:25.440869  USB2 port 3 enabled
  628 07:49:25.444456  USB3 port 0 enabled
  629 07:49:25.444541  USB3 port 1 enabled
  630 07:49:25.447432  USB3 port 2 enabled
  631 07:49:25.447515  USB3 port 3 enabled
  632 07:49:25.450816  USB2 port 4 enabled
  633 07:49:25.453722  USB2 port 5 enabled
  634 07:49:25.453804  USB2 port 0 scanning...
  635 07:49:25.457638  scan_static_bus for USB2 port 0
  636 07:49:25.460503  scan_static_bus for USB2 port 0 done
  637 07:49:25.463985  scan_bus: bus USB2 port 0 finished in 6 msecs
  638 07:49:25.467269  USB2 port 1 scanning...
  639 07:49:25.470730  scan_static_bus for USB2 port 1
  640 07:49:25.473981  scan_static_bus for USB2 port 1 done
  641 07:49:25.476903  scan_bus: bus USB2 port 1 finished in 6 msecs
  642 07:49:25.480542  USB2 port 2 scanning...
  643 07:49:25.483867  scan_static_bus for USB2 port 2
  644 07:49:25.486896  scan_static_bus for USB2 port 2 done
  645 07:49:25.490285  scan_bus: bus USB2 port 2 finished in 6 msecs
  646 07:49:25.493644  USB2 port 3 scanning...
  647 07:49:25.493727  scan_static_bus for USB2 port 3
  648 07:49:25.497293  scan_static_bus for USB2 port 3 done
  649 07:49:25.503621  scan_bus: bus USB2 port 3 finished in 6 msecs
  650 07:49:25.503705  USB3 port 0 scanning...
  651 07:49:25.506806  scan_static_bus for USB3 port 0
  652 07:49:25.510141  scan_static_bus for USB3 port 0 done
  653 07:49:25.513906  scan_bus: bus USB3 port 0 finished in 6 msecs
  654 07:49:25.517175  USB3 port 1 scanning...
  655 07:49:25.519981  scan_static_bus for USB3 port 1
  656 07:49:25.523433  scan_static_bus for USB3 port 1 done
  657 07:49:25.526493  scan_bus: bus USB3 port 1 finished in 6 msecs
  658 07:49:25.530088  USB3 port 2 scanning...
  659 07:49:25.533173  scan_static_bus for USB3 port 2
  660 07:49:25.536472  scan_static_bus for USB3 port 2 done
  661 07:49:25.540047  scan_bus: bus USB3 port 2 finished in 6 msecs
  662 07:49:25.543429  USB3 port 3 scanning...
  663 07:49:25.546906  scan_static_bus for USB3 port 3
  664 07:49:25.549709  scan_static_bus for USB3 port 3 done
  665 07:49:25.553287  scan_bus: bus USB3 port 3 finished in 6 msecs
  666 07:49:25.553360  USB2 port 4 scanning...
  667 07:49:25.556619  scan_static_bus for USB2 port 4
  668 07:49:25.559989  scan_static_bus for USB2 port 4 done
  669 07:49:25.566649  scan_bus: bus USB2 port 4 finished in 6 msecs
  670 07:49:25.566730  USB2 port 5 scanning...
  671 07:49:25.569920  scan_static_bus for USB2 port 5
  672 07:49:25.573249  scan_static_bus for USB2 port 5 done
  673 07:49:25.576268  scan_bus: bus USB2 port 5 finished in 6 msecs
  674 07:49:25.579574  scan_static_bus for USB0 port 0 done
  675 07:49:25.586022  scan_bus: bus USB0 port 0 finished in 149 msecs
  676 07:49:25.589775  scan_static_bus for PCI: 04:00.3 done
  677 07:49:25.592809  scan_bus: bus PCI: 04:00.3 finished in 163 msecs
  678 07:49:25.596169  PCI: 04:00.5 scanning...
  679 07:49:25.599600  scan_static_bus for PCI: 04:00.5
  680 07:49:25.599679  GENERIC: 0.0 enabled
  681 07:49:25.602958  scan_static_bus for PCI: 04:00.5 done
  682 07:49:25.605910  scan_bus: bus PCI: 04:00.5 finished in 8 msecs
  683 07:49:25.609234  POST: 0x55
  684 07:49:25.612941  scan_bus: bus PCI: 00:08.1 finished in 233 msecs
  685 07:49:25.616383  PCI: 00:14.0 scanning...
  686 07:49:25.619197  scan_generic_bus for PCI: 00:14.0
  687 07:49:25.622867  scan_generic_bus for PCI: 00:14.0 done
  688 07:49:25.626301  scan_bus: bus PCI: 00:14.0 finished in 6 msecs
  689 07:49:25.629455  PCI: 00:14.3 scanning...
  690 07:49:25.632456  scan_static_bus for PCI: 00:14.3
  691 07:49:25.632527  PNP: 0c09.0 enabled
  692 07:49:25.635852  PNP: 0c09.0 scanning...
  693 07:49:25.639440  scan_static_bus for PNP: 0c09.0
  694 07:49:25.639511  GENERIC: 0.0 enabled
  695 07:49:25.642783  GENERIC: 1.0 enabled
  696 07:49:25.642854  GENERIC: 0.0 enabled
  697 07:49:25.645998  GENERIC: 0.0 scanning...
  698 07:49:25.649400  scan_static_bus for GENERIC: 0.0
  699 07:49:25.649477  I2C: 00:1a enabled
  700 07:49:25.655753  scan_static_bus for GENERIC: 0.0 done
  701 07:49:25.658722  scan_bus: bus GENERIC: 0.0 finished in 8 msecs
  702 07:49:25.658794  GENERIC: 1.0 scanning...
  703 07:49:25.662119  
  704 07:49:25.662196  scan_static_bus for GENERIC: 1.0
  705 07:49:25.665388  scan_static_bus for GENERIC: 1.0 done
  706 07:49:25.672369  scan_bus: bus GENERIC: 1.0 finished in 6 msecs
  707 07:49:25.672443  GENERIC: 0.0 scanning...
  708 07:49:25.675682  scan_static_bus for GENERIC: 0.0
  709 07:49:25.678695  scan_static_bus for GENERIC: 0.0 done
  710 07:49:25.685425  scan_bus: bus GENERIC: 0.0 finished in 6 msecs
  711 07:49:25.689169  scan_static_bus for PNP: 0c09.0 done
  712 07:49:25.691867  scan_bus: bus PNP: 0c09.0 finished in 52 msecs
  713 07:49:25.695410  scan_static_bus for PCI: 00:14.3 done
  714 07:49:25.699140  scan_bus: bus PCI: 00:14.3 finished in 66 msecs
  715 07:49:25.699218  POST: 0x55
  716 07:49:25.705353  scan_bus: bus DOMAIN: 0000 finished in 571 msecs
  717 07:49:25.708703  MMIO: fedc5000 scanning...
  718 07:49:25.711708  scan_generic_bus for MMIO: fedc5000
  719 07:49:25.714961  bus: MMIO: fedc5000[0]->I2C: 01:50 enabled
  720 07:49:25.718540  scan_generic_bus for MMIO: fedc5000 done
  721 07:49:25.721586  scan_bus: bus MMIO: fedc5000 finished in 10 msecs
  722 07:49:25.725030  MMIO: fedca000 scanning...
  723 07:49:25.728351  scan_static_bus for MMIO: fedca000
  724 07:49:25.728434  GENERIC: 0.0 enabled
  725 07:49:25.731810  scan_static_bus for MMIO: fedca000 done
  726 07:49:25.738182  scan_bus: bus MMIO: fedca000 finished in 8 msecs
  727 07:49:25.738270  MMIO: fedc4000 scanning...
  728 07:49:25.741807  
  729 07:49:25.741893  scan_generic_bus for MMIO: fedc4000
  730 07:49:25.745294  
  731 07:49:25.748472  bus: MMIO: fedc4000[0]->I2C: 02:15 enabled
  732 07:49:25.751395  bus: MMIO: fedc4000[0]->I2C: 02:2c enabled
  733 07:49:25.754762  bus: MMIO: fedc4000[0]->I2C: 02:5d enabled
  734 07:49:25.758118  bus: MMIO: fedc4000[0]->GENERIC: 0.0 enabled
  735 07:49:25.761102  scan_generic_bus for MMIO: fedc4000 done
  736 07:49:25.768147  scan_bus: bus MMIO: fedc4000 finished in 22 msecs
  737 07:49:25.771502  scan_static_bus for Root Device done
  738 07:49:25.774500  scan_bus: bus Root Device finished in 663 msecs
  739 07:49:25.774585  done
  740 07:49:25.781306  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 984 ms
  741 07:49:25.781392  POST: 0x73
  742 07:49:25.784823  found VGA at PCI: 04:00.0
  743 07:49:25.788162  Setting up VGA for PCI: 04:00.0
  744 07:49:25.791345  Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:08.1
  745 07:49:25.794212  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
  746 07:49:25.801094  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  747 07:49:25.801179  Allocating resources...
  748 07:49:25.804506  Reading resources...
  749 07:49:25.807543  Root Device read_resources bus 0 link: 0
  750 07:49:25.810835  CPU_CLUSTER: 0 read_resources bus 0 link: 0
  751 07:49:25.817728  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
  752 07:49:25.820859  DOMAIN: 0000 read_resources bus 0 link: 0
  753 07:49:25.824284  Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
  754 07:49:25.830993  PCI: 00:01.2 read_resources bus 1 link: 0
  755 07:49:25.834293  PCI: 00:01.2 read_resources bus 1 link: 0 done
  756 07:49:25.837920  PCI: 00:01.3 read_resources bus 2 link: 0
  757 07:49:25.848334  PCI: 00:01.3 read_resources bus 2 link: 0 done
  758 07:49:25.851222  PCI: 00:01.7 read_resources bus 3 link: 0
  759 07:49:25.854457  PCI: 00:01.7 read_resources bus 3 link: 0 done
  760 07:49:25.857834  PCI: 00:08.1 read_resources bus 4 link: 0
  761 07:49:25.861390  
  762 07:49:25.864644  PCI: 04:00.3 read_resources bus 0 link: 0
  763 07:49:25.867604  USB0 port 0 read_resources bus 0 link: 0
  764 07:49:25.871088  USB0 port 0 read_resources bus 0 link: 0 done
  765 07:49:25.874529  PCI: 04:00.3 read_resources bus 0 link: 0 done
  766 07:49:25.877702  
  767 07:49:25.881161  PCI: 04:00.5 read_resources bus 0 link: 0
  768 07:49:25.884593  PCI: 04:00.5 read_resources bus 0 link: 0 done
  769 07:49:25.888079  PCI: 00:08.1 read_resources bus 4 link: 0 done
  770 07:49:25.891092  ACPI GNVS at 0xca682000
  771 07:49:25.894625  PCI: 00:14.3 read_resources bus 0 link: 0
  772 07:49:25.897574  PNP: 0c09.0 read_resources bus 0 link: 0
  773 07:49:25.900947  GENERIC: 0.0 read_resources bus 0 link: 0
  774 07:49:25.907432  GENERIC: 0.0 read_resources bus 0 link: 0 done
  775 07:49:25.910861  PNP: 0c09.0 read_resources bus 0 link: 0 done
  776 07:49:25.914432  PCI: 00:14.3 read_resources bus 0 link: 0 done
  777 07:49:25.920470  DOMAIN: 0000 read_resources bus 0 link: 0 done
  778 07:49:25.923990  MMIO: fedc5000 read_resources bus 1 link: 0
  779 07:49:25.927381  MMIO: fedc5000 read_resources bus 1 link: 0 done
  780 07:49:25.930916  MMIO: fedca000 read_resources bus 0 link: 0
  781 07:49:25.937386  MMIO: fedca000 read_resources bus 0 link: 0 done
  782 07:49:25.940347  MMIO: fedc4000 read_resources bus 2 link: 0
  783 07:49:25.943814  MMIO: fedc4000 read_resources bus 2 link: 0 done
  784 07:49:25.947560  Root Device read_resources bus 0 link: 0 done
  785 07:49:25.950543  Done reading resources.
  786 07:49:25.957294  Show resources in subtree (Root Device)...After reading.
  787 07:49:25.960892   Root Device child on link 0 CPU_CLUSTER: 0
  788 07:49:25.963741    CPU_CLUSTER: 0 child on link 0 APIC: 00
  789 07:49:25.963826     APIC: 00
  790 07:49:25.967206    DOMAIN: 0000 child on link 0 PCI: 00:00.0
  791 07:49:25.977260    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  792 07:49:25.987085    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
  793 07:49:25.987171     PCI: 00:00.0
  794 07:49:25.993468     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
  795 07:49:26.003568     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
  796 07:49:26.010435     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
  797 07:49:26.020576     PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
  798 07:49:26.026830     PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
  799 07:49:26.030211  
  800 07:49:26.036911     PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
  801 07:49:26.046886     PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
  802 07:49:26.053085     PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
  803 07:49:26.063372     PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7
  804 07:49:26.073025     PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
  805 07:49:26.080115     PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
  806 07:49:26.089560     PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
  807 07:49:26.096422     PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
  808 07:49:26.106167     PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
  809 07:49:26.106253     PCI: 00:00.2
  810 07:49:26.109671  
  811 07:49:26.116023     PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
  812 07:49:26.116108     PCI: 00:01.0
  813 07:49:26.122748     PCI: 00:01.2 child on link 0 PCI: 01:00.0
  814 07:49:26.129513     PCI: 00:01.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
  815 07:49:26.139391     PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
  816 07:49:26.145987     PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
  817 07:49:26.149022      PCI: 01:00.0
  818 07:49:26.155749      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
  819 07:49:26.162695     PCI: 00:01.3 child on link 0 PCI: 02:00.0
  820 07:49:26.169518     PCI: 00:01.3 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
  821 07:49:26.179229     PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
  822 07:49:26.185565     PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
  823 07:49:26.188839      PCI: 02:00.0
  824 07:49:26.195873      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
  825 07:49:26.198868     PCI: 00:01.7 child on link 0 PCI: 03:00.0
  826 07:49:26.208784     PCI: 00:01.7 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
  827 07:49:26.215647     PCI: 00:01.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
  828 07:49:26.225544     PCI: 00:01.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
  829 07:49:26.225630      PCI: 03:00.0
  830 07:49:26.235354      PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
  831 07:49:26.235439     PCI: 00:08.0
  832 07:49:26.241718     PCI: 00:08.1 child on link 0 PCI: 04:00.0
  833 07:49:26.248759     PCI: 00:08.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
  834 07:49:26.258456     PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
  835 07:49:26.265141     PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
  836 07:49:26.268717      PCI: 04:00.0
  837 07:49:26.278377      PCI: 04:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
  838 07:49:26.284720      PCI: 04:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18
  839 07:49:26.294973      PCI: 04:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
  840 07:49:26.301364      PCI: 04:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 24
  841 07:49:26.304966      PCI: 04:00.1
  842 07:49:26.311476      PCI: 04:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
  843 07:49:26.314867      PCI: 04:00.2
  844 07:49:26.321279      PCI: 04:00.2 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
  845 07:49:26.331892      PCI: 04:00.2 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
  846 07:49:26.334441      PCI: 04:00.3 child on link 0 USB0 port 0
  847 07:49:26.344486      PCI: 04:00.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10
  848 07:49:26.347981       USB0 port 0 child on link 0 USB2 port 0
  849 07:49:26.348066        USB2 port 0
  850 07:49:26.350989        USB2 port 1
  851 07:49:26.351074        USB2 port 2
  852 07:49:26.354314        USB2 port 3
  853 07:49:26.354398        USB3 port 0
  854 07:49:26.357864        USB3 port 1
  855 07:49:26.357948        USB3 port 2
  856 07:49:26.361432        USB3 port 3
  857 07:49:26.361529        USB2 port 4
  858 07:49:26.364262        USB2 port 5
  859 07:49:26.367714      PCI: 04:00.5 child on link 0 GENERIC: 0.0
  860 07:49:26.377817      PCI: 04:00.5 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 10
  861 07:49:26.377901       GENERIC: 0.0
  862 07:49:26.380843      PCI: 04:00.7
  863 07:49:26.387500      PCI: 04:00.7 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
  864 07:49:26.397705      PCI: 04:00.7 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
  865 07:49:26.397792     PCI: 00:14.0
  866 07:49:26.400742     PCI: 00:14.3 child on link 0 PNP: 0c09.0
  867 07:49:26.410472     PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
  868 07:49:26.420936     PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
  869 07:49:26.427195     PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
  870 07:49:26.437125     PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
  871 07:49:26.444077     PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
  872 07:49:26.447378      PNP: 0c09.0 child on link 0 GENERIC: 0.0
  873 07:49:26.457375      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
  874 07:49:26.460122       GENERIC: 0.0 child on link 0 I2C: 00:1a
  875 07:49:26.460201        I2C: 00:1a
  876 07:49:26.464074       GENERIC: 1.0
  877 07:49:26.464148       GENERIC: 0.0
  878 07:49:26.467203     PCI: 00:18.0
  879 07:49:26.467281     PCI: 00:18.1
  880 07:49:26.470589     PCI: 00:18.2
  881 07:49:26.470661     PCI: 00:18.3
  882 07:49:26.474121     PCI: 00:18.4
  883 07:49:26.474193     PCI: 00:18.5
  884 07:49:26.474260     PCI: 00:18.6
  885 07:49:26.476934     PCI: 00:18.7
  886 07:49:26.477005    GENERIC: 0.1
  887 07:49:26.483927    MMIO: fedc5000 child on link 0 I2C: 01:50
  888 07:49:26.484007     I2C: 01:50
  889 07:49:26.486742    MMIO: fedca000 child on link 0 GENERIC: 0.0
  890 07:49:26.490094     GENERIC: 0.0
  891 07:49:26.490185    MMIO: fedce000
  892 07:49:26.493311    MMIO: fedcf000
  893 07:49:26.496934    MMIO: fedc4000 child on link 0 I2C: 02:15
  894 07:49:26.497019     I2C: 02:15
  895 07:49:26.500023     I2C: 02:2c
  896 07:49:26.500106     I2C: 02:5d
  897 07:49:26.500172     GENERIC: 0.0
  898 07:49:26.507007  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
  899 07:49:26.513380   PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff
  900 07:49:26.520381   PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff done
  901 07:49:26.526705   PCI: 00:01.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  902 07:49:26.530218    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
  903 07:49:26.533259   PCI: 00:01.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  904 07:49:26.536702  
  905 07:49:26.540061   PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  906 07:49:26.550160   PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  907 07:49:26.552802   PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff
  908 07:49:26.559772   PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff done
  909 07:49:26.566251   PCI: 00:01.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  910 07:49:26.569566    PCI: 02:00.0 10 *  [0x0 - 0xfff] mem
  911 07:49:26.576556   PCI: 00:01.3 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  912 07:49:26.582682   PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  913 07:49:26.589347   PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  914 07:49:26.592533   PCI: 00:01.7 io: size: 0 align: 12 gran: 12 limit: ffffffff
  915 07:49:26.599307   PCI: 00:01.7 io: size: 0 align: 12 gran: 12 limit: ffffffff done
  916 07:49:26.606325   PCI: 00:01.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  917 07:49:26.609143    PCI: 03:00.0 10 *  [0x0 - 0x3fff] mem
  918 07:49:26.616295   PCI: 00:01.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  919 07:49:26.622541   PCI: 00:01.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  920 07:49:26.629633   PCI: 00:01.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  921 07:49:26.632327   PCI: 00:08.1 io: size: 0 align: 12 gran: 12 limit: ffffffff
  922 07:49:26.636038    PCI: 04:00.0 20 *  [0x0 - 0xff] io
  923 07:49:26.642609   PCI: 00:08.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
  924 07:49:26.648974   PCI: 00:08.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  925 07:49:26.652369    PCI: 04:00.2 18 *  [0x0 - 0xfffff] mem
  926 07:49:26.655684    PCI: 04:00.3 10 *  [0x100000 - 0x1fffff] mem
  927 07:49:26.659371    PCI: 04:00.7 18 *  [0x200000 - 0x2fffff] mem
  928 07:49:26.665411    PCI: 04:00.0 24 *  [0x300000 - 0x37ffff] mem
  929 07:49:26.668798    PCI: 04:00.5 10 *  [0x380000 - 0x3bffff] mem
  930 07:49:26.672266    PCI: 04:00.1 10 *  [0x3c0000 - 0x3c3fff] mem
  931 07:49:26.675899    PCI: 04:00.2 24 *  [0x3c4000 - 0x3c5fff] mem
  932 07:49:26.682178    PCI: 04:00.7 24 *  [0x3c6000 - 0x3c7fff] mem
  933 07:49:26.688461   PCI: 00:08.1 mem: size: 400000 align: 20 gran: 20 limit: ffffffff done
  934 07:49:26.695261   PCI: 00:08.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  935 07:49:26.698630    PCI: 04:00.0 10 *  [0x0 - 0xfffffff] prefmem
  936 07:49:26.702011    PCI: 04:00.0 18 *  [0x10000000 - 0x101fffff] prefmem
  937 07:49:26.711937   PCI: 00:08.1 prefmem: size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done
  938 07:49:26.718289  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
  939 07:49:26.721870  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
  940 07:49:26.728049   update_constraints: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
  941 07:49:26.734605   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
  942 07:49:26.737944  
  943 07:49:26.738029   DOMAIN: 0000: Resource ranges:
  944 07:49:26.741763   * Base: 1000, Size: f000, Tag: 100
  945 07:49:26.748105    PCI: 00:08.1 1c *  [0x1000 - 0x1fff] limit: 1fff io
  946 07:49:26.754897  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
  947 07:49:26.758373  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff
  948 07:49:26.764920   update_constraints: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
  949 07:49:26.768251  
  950 07:49:26.774450   update_constraints: PCI: 00:00.0 01 base 000a0000 limit 000bffff mem (fixed)
  951 07:49:26.780888   update_constraints: PCI: 00:00.0 02 base 000c0000 limit 000fffff mem (fixed)
  952 07:49:26.787533   update_constraints: PCI: 00:00.0 03 base 00100000 limit 01ffffff mem (fixed)
  953 07:49:26.794530   update_constraints: PCI: 00:00.0 04 base 02000000 limit 021bffff mem (fixed)
  954 07:49:26.800855   update_constraints: PCI: 00:00.0 05 base 021c0000 limit cb7fffff mem (fixed)
  955 07:49:26.807689   update_constraints: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
  956 07:49:26.814143   update_constraints: PCI: 00:00.0 06 base cc000000 limit cfffffff mem (fixed)
  957 07:49:26.820815   update_constraints: PCI: 00:00.0 07 base 100000000 limit 12f33ffff mem (fixed)
  958 07:49:26.827592   update_constraints: PCI: 00:00.0 08 base 12f340000 limit 12fffffff mem (fixed)
  959 07:49:26.837299   update_constraints: PCI: 00:00.0 09 base cb800000 limit cbffffff mem (fixed)
  960 07:49:26.844226   update_constraints: PCI: 00:00.0 0a base cb7fe000 limit cb7fffff mem (fixed)
  961 07:49:26.850859   update_constraints: PCI: 00:00.0 0b base ca7fe000 limit cb7fdfff mem (fixed)
  962 07:49:26.857396   update_constraints: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)
  963 07:49:26.863938   update_constraints: PCI: 00:14.3 10000100 base ff000000 limit ffffffff mem (fixed)
  964 07:49:26.870613   update_constraints: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
  965 07:49:26.877028   update_constraints: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
  966 07:49:26.883396   update_constraints: PCI: 00:14.3 04 base fedc4000 limit fedc5fff mem (fixed)
  967 07:49:26.886875   DOMAIN: 0000: Resource ranges:
  968 07:49:26.890288   * Base: d0000000, Size: 28000000, Tag: 200
  969 07:49:26.896812   * Base: fc000000, Size: 2c00000, Tag: 200
  970 07:49:26.900217   * Base: fec02000, Size: e000, Tag: 200
  971 07:49:26.903636   * Base: fec11000, Size: 1b3000, Tag: 200
  972 07:49:26.907029   * Base: fedc6000, Size: 23a000, Tag: 200
  973 07:49:26.909974   * Base: 130000000, Size: fffed0000000, Tag: 100200
  974 07:49:26.916955    PCI: 00:08.1 24 *  [0xd0000000 - 0xe01fffff] limit: e01fffff prefmem
  975 07:49:26.923260    PCI: 00:08.1 20 *  [0xe0200000 - 0xe05fffff] limit: e05fffff mem
  976 07:49:26.930259    PCI: 00:01.2 20 *  [0xe0600000 - 0xe06fffff] limit: e06fffff mem
  977 07:49:26.933177    PCI: 00:01.3 20 *  [0xe0700000 - 0xe07fffff] limit: e07fffff mem
  978 07:49:26.936539  
  979 07:49:26.939951    PCI: 00:01.7 20 *  [0xe0800000 - 0xe08fffff] limit: e08fffff mem
  980 07:49:26.946758    PCI: 00:00.2 44 *  [0xe0900000 - 0xe097ffff] limit: e097ffff mem
  981 07:49:26.953093  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff done
  982 07:49:26.960181  PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff
  983 07:49:26.963054   PCI: 00:01.2: Resource ranges:
  984 07:49:26.966350   * Base: e0600000, Size: 100000, Tag: 200
  985 07:49:26.972900    PCI: 01:00.0 10 *  [0xe0600000 - 0xe0603fff] limit: e0603fff mem
  986 07:49:26.979881  PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff done
  987 07:49:26.986101  PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff
  988 07:49:26.989958   PCI: 00:01.3: Resource ranges:
  989 07:49:26.992851   * Base: e0700000, Size: 100000, Tag: 200
  990 07:49:26.999575    PCI: 02:00.0 10 *  [0xe0700000 - 0xe0700fff] limit: e0700fff mem
  991 07:49:27.009377  PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff done
  992 07:49:27.016320  PCI: 00:01.7 mem: base: e0800000 size: 100000 align: 20 gran: 20 limit: e08fffff
  993 07:49:27.019193   PCI: 00:01.7: Resource ranges:
  994 07:49:27.022954   * Base: e0800000, Size: 100000, Tag: 200
  995 07:49:27.025744    PCI: 03:00.0 10 *  [0xe0800000 - 0xe0803fff] limit: e0803fff mem
  996 07:49:27.029312  
  997 07:49:27.036159  PCI: 00:01.7 mem: base: e0800000 size: 100000 align: 20 gran: 20 limit: e08fffff done
  998 07:49:27.042465  PCI: 00:08.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff
  999 07:49:27.045551   PCI: 00:08.1: Resource ranges:
 1000 07:49:27.045635   * Base: 1000, Size: 1000, Tag: 100
 1001 07:49:27.048927  
 1002 07:49:27.052241    PCI: 04:00.0 20 *  [0x1000 - 0x10ff] limit: 10ff io
 1003 07:49:27.059324  PCI: 00:08.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done
 1004 07:49:27.065395  PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff
 1005 07:49:27.068950   PCI: 00:08.1: Resource ranges:
 1006 07:49:27.071991   * Base: d0000000, Size: 10200000, Tag: 1200
 1007 07:49:27.078744    PCI: 04:00.0 10 *  [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
 1008 07:49:27.085584    PCI: 04:00.0 18 *  [0xe0000000 - 0xe01fffff] limit: e01fffff prefmem
 1009 07:49:27.095480  PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff done
 1010 07:49:27.101876  PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff
 1011 07:49:27.105170   PCI: 00:08.1: Resource ranges:
 1012 07:49:27.108609   * Base: e0200000, Size: 400000, Tag: 200
 1013 07:49:27.115391    PCI: 04:00.2 18 *  [0xe0200000 - 0xe02fffff] limit: e02fffff mem
 1014 07:49:27.118586    PCI: 04:00.3 10 *  [0xe0300000 - 0xe03fffff] limit: e03fffff mem
 1015 07:49:27.125288    PCI: 04:00.7 18 *  [0xe0400000 - 0xe04fffff] limit: e04fffff mem
 1016 07:49:27.131732    PCI: 04:00.0 24 *  [0xe0500000 - 0xe057ffff] limit: e057ffff mem
 1017 07:49:27.138187    PCI: 04:00.5 10 *  [0xe0580000 - 0xe05bffff] limit: e05bffff mem
 1018 07:49:27.141527    PCI: 04:00.1 10 *  [0xe05c0000 - 0xe05c3fff] limit: e05c3fff mem
 1019 07:49:27.147868    PCI: 04:00.2 24 *  [0xe05c4000 - 0xe05c5fff] limit: e05c5fff mem
 1020 07:49:27.154908    PCI: 04:00.7 24 *  [0xe05c6000 - 0xe05c7fff] limit: e05c7fff mem
 1021 07:49:27.161205  PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff done
 1022 07:49:27.167936  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1023 07:49:27.171192  Root Device assign_resources, bus 0 link: 0
 1024 07:49:27.178055  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1025 07:49:27.180902  PCI: 00:00.0 missing set_resources
 1026 07:49:27.187856  PCI: 00:00.2 44 <- [0x00e0900000 - 0x00e097ffff] size 0x00080000 gran 0x13 mem
 1027 07:49:27.194130  PCI: 00:01.2 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 01 io
 1028 07:49:27.204422  PCI: 00:01.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1029 07:49:27.210855  PCI: 00:01.2 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 01 mem
 1030 07:49:27.214215  PCI: 00:01.2 assign_resources, bus 1 link: 0
 1031 07:49:27.220773  PCI: 01:00.0 10 <- [0x00e0600000 - 0x00e0603fff] size 0x00004000 gran 0x0e mem64
 1032 07:49:27.227689  PCI: 00:01.2 assign_resources, bus 1 link: 0
 1033 07:49:27.234324  PCI: 00:01.3 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 02 io
 1034 07:49:27.244220  PCI: 00:01.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
 1035 07:49:27.251084  PCI: 00:01.3 20 <- [0x00e0700000 - 0x00e07fffff] size 0x00100000 gran 0x14 bus 02 mem
 1036 07:49:27.253833  PCI: 00:01.3 assign_resources, bus 2 link: 0
 1037 07:49:27.266302  PCI: 02:00.0 10 <- [0x00e0700000 - 0x00e0700fff] size 0x00001000 gran 0x0c mem
 1038 07:49:27.273719  PCI: 00:01.3 assign_resources, bus 2 link: 0
 1039 07:49:27.280088  PCI: 00:01.7 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 03 io
 1040 07:49:27.289949  PCI: 00:01.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
 1041 07:49:27.296610  PCI: 00:01.7 20 <- [0x00e0800000 - 0x00e08fffff] size 0x00100000 gran 0x14 bus 03 mem
 1042 07:49:27.300124  PCI: 00:01.7 assign_resources, bus 3 link: 0
 1043 07:49:27.306394  PCI: 03:00.0 10 <- [0x00e0800000 - 0x00e0803fff] size 0x00004000 gran 0x0e mem64
 1044 07:49:27.313213  PCI: 00:01.7 assign_resources, bus 3 link: 0
 1045 07:49:27.319596  PCI: 00:08.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 04 io
 1046 07:49:27.326741  PCI: 00:08.1 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 04 prefmem
 1047 07:49:27.336579  PCI: 00:08.1 20 <- [0x00e0200000 - 0x00e05fffff] size 0x00400000 gran 0x14 bus 04 mem
 1048 07:49:27.339838  PCI: 00:08.1 assign_resources, bus 4 link: 0
 1049 07:49:27.346163  PCI: 04:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
 1050 07:49:27.352633  PCI: 04:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64
 1051 07:49:27.359585  PCI: 04:00.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
 1052 07:49:27.365758  PCI: 04:00.0 24 <- [0x00e0500000 - 0x00e057ffff] size 0x00080000 gran 0x13 mem
 1053 07:49:27.376127  PCI: 04:00.1 10 <- [0x00e05c0000 - 0x00e05c3fff] size 0x00004000 gran 0x0e mem
 1054 07:49:27.382658  PCI: 04:00.2 18 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 mem
 1055 07:49:27.388871  PCI: 04:00.2 24 <- [0x00e05c4000 - 0x00e05c5fff] size 0x00002000 gran 0x0d mem
 1056 07:49:27.395969  PCI: 04:00.3 10 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 mem64
 1057 07:49:27.399361  PCI: 04:00.3 assign_resources, bus 0 link: 0
 1058 07:49:27.402724  PCI: 04:00.3 assign_resources, bus 0 link: 0
 1059 07:49:27.408968  PCI: 04:00.5 10 <- [0x00e0580000 - 0x00e05bffff] size 0x00040000 gran 0x12 mem
 1060 07:49:27.412355  
 1061 07:49:27.415872  PCI: 04:00.5 assign_resources, bus 0 link: 0
 1062 07:49:27.419215  PCI: 04:00.5 assign_resources, bus 0 link: 0
 1063 07:49:27.425694  PCI: 04:00.7 18 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem
 1064 07:49:27.432048  PCI: 04:00.7 24 <- [0x00e05c6000 - 0x00e05c7fff] size 0x00002000 gran 0x0d mem
 1065 07:49:27.435370  PCI: 00:08.1 assign_resources, bus 4 link: 0
 1066 07:49:27.441843  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1067 07:49:27.445447  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1068 07:49:27.448594  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1069 07:49:27.452094  Root Device assign_resources, bus 0 link: 0
 1070 07:49:27.455679  Done setting resources.
 1071 07:49:27.462097  Show resources in subtree (Root Device)...After assigning values.
 1072 07:49:27.465579   Root Device child on link 0 CPU_CLUSTER: 0
 1073 07:49:27.468383    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1074 07:49:27.468467     APIC: 00
 1075 07:49:27.475586    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1076 07:49:27.481868    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1077 07:49:27.491582    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
 1078 07:49:27.491667     PCI: 00:00.0
 1079 07:49:27.501865     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
 1080 07:49:27.508473     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1081 07:49:27.515026     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
 1082 07:49:27.524911     PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
 1083 07:49:27.534879     PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
 1084 07:49:27.541526     PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
 1085 07:49:27.551184     PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
 1086 07:49:27.561269     PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
 1087 07:49:27.567629     PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7
 1088 07:49:27.577844     PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
 1089 07:49:27.584261     PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
 1090 07:49:27.594579     PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
 1091 07:49:27.601120     PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1092 07:49:27.604092  
 1093 07:49:27.610689     PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
 1094 07:49:27.614183     PCI: 00:00.2
 1095 07:49:27.620489     PCI: 00:00.2 resource base e0900000 size 80000 align 19 gran 19 limit e097ffff flags 60000200 index 44
 1096 07:49:27.624116     PCI: 00:01.0
 1097 07:49:27.627318     PCI: 00:01.2 child on link 0 PCI: 01:00.0
 1098 07:49:27.637474     PCI: 00:01.2 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
 1099 07:49:27.647306     PCI: 00:01.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1100 07:49:27.657122     PCI: 00:01.2 resource base e0600000 size 100000 align 20 gran 20 limit e06fffff flags 60080202 index 20
 1101 07:49:27.657200      PCI: 01:00.0
 1102 07:49:27.667198      PCI: 01:00.0 resource base e0600000 size 4000 align 14 gran 14 limit e0603fff flags 60000201 index 10
 1103 07:49:27.670925     PCI: 00:01.3 child on link 0 PCI: 02:00.0
 1104 07:49:27.680475     PCI: 00:01.3 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
 1105 07:49:27.690340     PCI: 00:01.3 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1106 07:49:27.700096     PCI: 00:01.3 resource base e0700000 size 100000 align 20 gran 20 limit e07fffff flags 60080202 index 20
 1107 07:49:27.700183      PCI: 02:00.0
 1108 07:49:27.709972      PCI: 02:00.0 resource base e0700000 size 1000 align 12 gran 12 limit e0700fff flags 60000200 index 10
 1109 07:49:27.713554     PCI: 00:01.7 child on link 0 PCI: 03:00.0
 1110 07:49:27.723047     PCI: 00:01.7 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
 1111 07:49:27.733390     PCI: 00:01.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1112 07:49:27.743335     PCI: 00:01.7 resource base e0800000 size 100000 align 20 gran 20 limit e08fffff flags 60080202 index 20
 1113 07:49:27.746807      PCI: 03:00.0
 1114 07:49:27.753140      PCI: 03:00.0 resource base e0800000 size 4000 align 14 gran 14 limit e0803fff flags 60000201 index 10
 1115 07:49:27.756650     PCI: 00:08.0
 1116 07:49:27.759989     PCI: 00:08.1 child on link 0 PCI: 04:00.0
 1117 07:49:27.769975     PCI: 00:08.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
 1118 07:49:27.776253     PCI: 00:08.1 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24
 1119 07:49:27.779703  
 1120 07:49:27.785998     PCI: 00:08.1 resource base e0200000 size 400000 align 20 gran 20 limit e05fffff flags 60080202 index 20
 1121 07:49:27.789289      PCI: 04:00.0
 1122 07:49:27.799298      PCI: 04:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10
 1123 07:49:27.809243      PCI: 04:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18
 1124 07:49:27.815651      PCI: 04:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 20
 1125 07:49:27.825727      PCI: 04:00.0 resource base e0500000 size 80000 align 19 gran 19 limit e057ffff flags 60000200 index 24
 1126 07:49:27.825808      PCI: 04:00.1
 1127 07:49:27.835548      PCI: 04:00.1 resource base e05c0000 size 4000 align 14 gran 14 limit e05c3fff flags 60000200 index 10
 1128 07:49:27.839161      PCI: 04:00.2
 1129 07:49:27.848929      PCI: 04:00.2 resource base e0200000 size 100000 align 20 gran 20 limit e02fffff flags 60000200 index 18
 1130 07:49:27.855345      PCI: 04:00.2 resource base e05c4000 size 2000 align 13 gran 13 limit e05c5fff flags 60000200 index 24
 1131 07:49:27.862219      PCI: 04:00.3 child on link 0 USB0 port 0
 1132 07:49:27.868707      PCI: 04:00.3 resource base e0300000 size 100000 align 20 gran 20 limit e03fffff flags 60000201 index 10
 1133 07:49:27.875577       USB0 port 0 child on link 0 USB2 port 0
 1134 07:49:27.875650        USB2 port 0
 1135 07:49:27.878527        USB2 port 1
 1136 07:49:27.878596        USB2 port 2
 1137 07:49:27.882081        USB2 port 3
 1138 07:49:27.882155        USB3 port 0
 1139 07:49:27.885330        USB3 port 1
 1140 07:49:27.885400        USB3 port 2
 1141 07:49:27.888333        USB3 port 3
 1142 07:49:27.888400        USB2 port 4
 1143 07:49:27.891883        USB2 port 5
 1144 07:49:27.895428      PCI: 04:00.5 child on link 0 GENERIC: 0.0
 1145 07:49:27.905082      PCI: 04:00.5 resource base e0580000 size 40000 align 18 gran 18 limit e05bffff flags 60000200 index 10
 1146 07:49:27.905162       GENERIC: 0.0
 1147 07:49:27.908549      PCI: 04:00.7
 1148 07:49:27.918288      PCI: 04:00.7 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60000200 index 18
 1149 07:49:27.925064      PCI: 04:00.7 resource base e05c6000 size 2000 align 13 gran 13 limit e05c7fff flags 60000200 index 24
 1150 07:49:27.928004     PCI: 00:14.0
 1151 07:49:27.931555     PCI: 00:14.3 child on link 0 PNP: 0c09.0
 1152 07:49:27.941314     PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
 1153 07:49:27.947773     PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
 1154 07:49:27.958129     PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
 1155 07:49:27.964391     PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
 1156 07:49:27.974082     PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
 1157 07:49:27.977567      PNP: 0c09.0 child on link 0 GENERIC: 0.0
 1158 07:49:27.987804      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1159 07:49:27.990875       GENERIC: 0.0 child on link 0 I2C: 00:1a
 1160 07:49:27.990953        I2C: 00:1a
 1161 07:49:27.994240       GENERIC: 1.0
 1162 07:49:27.994313       GENERIC: 0.0
 1163 07:49:27.997611     PCI: 00:18.0
 1164 07:49:27.997683     PCI: 00:18.1
 1165 07:49:28.001083     PCI: 00:18.2
 1166 07:49:28.001156     PCI: 00:18.3
 1167 07:49:28.004489     PCI: 00:18.4
 1168 07:49:28.004563     PCI: 00:18.5
 1169 07:49:28.004625     PCI: 00:18.6
 1170 07:49:28.007245     PCI: 00:18.7
 1171 07:49:28.007316    GENERIC: 0.1
 1172 07:49:28.010940    MMIO: fedc5000 child on link 0 I2C: 01:50
 1173 07:49:28.013889  
 1174 07:49:28.013965     I2C: 01:50
 1175 07:49:28.017489    MMIO: fedca000 child on link 0 GENERIC: 0.0
 1176 07:49:28.020843     GENERIC: 0.0
 1177 07:49:28.020919    MMIO: fedce000
 1178 07:49:28.024112    MMIO: fedcf000
 1179 07:49:28.027558    MMIO: fedc4000 child on link 0 I2C: 02:15
 1180 07:49:28.027631     I2C: 02:15
 1181 07:49:28.030966     I2C: 02:2c
 1182 07:49:28.031035     I2C: 02:5d
 1183 07:49:28.031098     GENERIC: 0.0
 1184 07:49:28.034348  Done allocating resources.
 1185 07:49:28.040777  BS: BS_DEV_RESOURCES run times (exec / console): 18 / 2231 ms
 1186 07:49:28.044082  0x00000020: notify_params->phase
 1187 07:49:28.044160  Calling FspNotify: 0xca6833b8
 1188 07:49:28.047248  
 1189 07:49:28.047316  	0xca6fff7c: notify_params
 1190 07:49:28.050609  POST: 0x94
 1191 07:49:28.062998  POST: 0x94
 1192 07:49:28.065949  FspNotify returned 0x00000000
 1193 07:49:28.069387  PCI_INTR tables: Writing registers C00/C01 for PCI IRQ routing:
 1194 07:49:28.072923  PCI_INTR_INDEX	name		     PIC mode	APIC mode
 1195 07:49:28.076435  
 1196 07:49:28.076504  0x00		INTA#                0x06	0x10
 1197 07:49:28.079252  
 1198 07:49:28.079319  0x01		INTB#                0x06	0x11
 1199 07:49:28.082757  
 1200 07:49:28.082847  0x02		INTC#                0x0E	0x12
 1201 07:49:28.086167  
 1202 07:49:28.086258  0x03		INTD#                0x0F	0x13
 1203 07:49:28.089639  
 1204 07:49:28.089814  0x04		INTE#                0x1F	0x1F
 1205 07:49:28.093122  
 1206 07:49:28.093276  0x05		INTF#/GENINT2        0x1F	0x1F
 1207 07:49:28.096129  
 1208 07:49:28.096298  0x06		INTG#                0x1F	0x1F
 1209 07:49:28.099897  
 1210 07:49:28.100074  0x07		INTH#                0x1F	0x1F
 1211 07:49:28.102782  
 1212 07:49:28.102966  0x08		Misc                 0xFA	0x00
 1213 07:49:28.106135  
 1214 07:49:28.106304  0x09		Misc0                0xF1	0x00
 1215 07:49:28.109473  
 1216 07:49:28.109614  0x0A		Misc1                0x00	0x00
 1217 07:49:28.113026  
 1218 07:49:28.113184  0x0B		Misc2                0x00	0x00
 1219 07:49:28.116072  
 1220 07:49:28.116207  0x0C		Ser IRQ INTA         0x1F	0x1F
 1221 07:49:28.119334  
 1222 07:49:28.119492  0x0D		Ser IRQ INTB         0x1F	0x1F
 1223 07:49:28.122698  
 1224 07:49:28.122897  0x0E		Ser IRQ INTC         0x1F	0x1F
 1225 07:49:28.126029  
 1226 07:49:28.126216  0x0F		Ser IRQ INTD         0x1F	0x1F
 1227 07:49:28.129661  
 1228 07:49:28.129873  0x10		SCI                  0x09	0x09
 1229 07:49:28.132805  
 1230 07:49:28.133074  0x11		SMBUS                0x1F	0x1F
 1231 07:49:28.136388  
 1232 07:49:28.136666  0x12		ASF                  0x1F	0x1F
 1233 07:49:28.139561  
 1234 07:49:28.139920  0x16		PerMon               0x1F	0x1F
 1235 07:49:28.142999  
 1236 07:49:28.146666  0x17		SD                   0x1F	0x1F
 1237 07:49:28.149682  0x1A		SDIO                 0x1F	0x1F
 1238 07:49:28.153109  0x20		CIR                  0x1F	0x1F
 1239 07:49:28.156485  0x21		GPIOa                0x1F	0x1F
 1240 07:49:28.159389  0x22		GPIOb                0x1F	0x1F
 1241 07:49:28.162687  0x23		GPIOc                0x1F	0x1F
 1242 07:49:28.166361  0x41		SATA                 0x1F	0x1F
 1243 07:49:28.168883  0x43		eMMC                 0x05	0x05
 1244 07:49:28.172310  0x50		GPP0                 0x1F	0x1F
 1245 07:49:28.175941  0x51		GPP1                 0x1F	0x1F
 1246 07:49:28.178872  0x52		GPP2                 0x1F	0x1F
 1247 07:49:28.182394  0x53		GPP3                 0x1F	0x1F
 1248 07:49:28.185761  0x62		GPIO                 0x07	0x07
 1249 07:49:28.188943  0x70		I2C0                 0x1F	0x1F
 1250 07:49:28.192648  0x71		I2C1                 0x1F	0x1F
 1251 07:49:28.195453  0x72		I2C2                 0x0A	0x0A
 1252 07:49:28.199004  0x73		I2C3                 0x0B	0x0B
 1253 07:49:28.201834  0x74		UART0                0x04	0x04
 1254 07:49:28.205740  0x75		UART1                0x03	0x03
 1255 07:49:28.208550  0x76		I2C4                 0x1F	0x1F
 1256 07:49:28.212077  0x77		I2C5                 0x1F	0x1F
 1257 07:49:28.215424  0x78		UART2                0x1F	0x1F
 1258 07:49:28.218890  0x79		UART3                0x1F	0x1F
 1259 07:49:28.221751  PCI_CFG IRQ: Write PCI config space IRQ assignments
 1260 07:49:28.225139  PCI IRQ: Found device 0:00.02 using PIN A
 1261 07:49:28.228426  PCI Devfn (0x2) not found in pirq_data table
 1262 07:49:28.235166  PCI IRQ: Found device 0:08.01 using PIN A
 1263 07:49:28.238820  	Found this device in pirq_data table entry 7
 1264 07:49:28.238902  	Orig INT_PIN	: 1 (PIN A)
 1265 07:49:28.241589  	PCI_INTR idx	: 0x00 (INTA#)
 1266 07:49:28.245036  	INT_LINE	: 0x6 (IRQ 6)
 1267 07:49:28.248715  PCI IRQ: Found device 4:00.00 using PIN A
 1268 07:49:28.251584  	With INT_PIN swizzled to PIN A
 1269 07:49:28.255091  	Attached to bridge device 0:08h.01h
 1270 07:49:28.258490  	Found this device in pirq_data table entry 7
 1271 07:49:28.261858  	Orig INT_PIN	: 1 (PIN A)
 1272 07:49:28.264698  	PCI_INTR idx	: 0x00 (INTA#)
 1273 07:49:28.264770  	INT_LINE	: 0x6 (IRQ 6)
 1274 07:49:28.268348  PCI IRQ: Found device 4:00.01 using PIN B
 1275 07:49:28.271910  	With INT_PIN swizzled to PIN B
 1276 07:49:28.274557  	Attached to bridge device 0:08h.01h
 1277 07:49:28.281228  	Found this device in pirq_data table entry 7
 1278 07:49:28.281304  	Orig INT_PIN	: 2 (PIN B)
 1279 07:49:28.284627  	PCI_INTR idx	: 0x01 (INTB#)
 1280 07:49:28.287903  	INT_LINE	: 0x6 (IRQ 6)
 1281 07:49:28.291535  PCI IRQ: Found device 4:00.02 using PIN C
 1282 07:49:28.294954  	With INT_PIN swizzled to PIN C
 1283 07:49:28.297805  	Attached to bridge device 0:08h.01h
 1284 07:49:28.301328  	Found this device in pirq_data table entry 7
 1285 07:49:28.304807  	Orig INT_PIN	: 3 (PIN C)
 1286 07:49:28.304882  	PCI_INTR idx	: 0x02 (INTC#)
 1287 07:49:28.308051  	INT_LINE	: 0xE (IRQ 14)
 1288 07:49:28.311678  PCI IRQ: Found device 4:00.03 using PIN D
 1289 07:49:28.314395  	With INT_PIN swizzled to PIN D
 1290 07:49:28.318065  	Attached to bridge device 0:08h.01h
 1291 07:49:28.321447  	Found this device in pirq_data table entry 7
 1292 07:49:28.324326  	Orig INT_PIN	: 4 (PIN D)
 1293 07:49:28.327912  	PCI_INTR idx	: 0x03 (INTD#)
 1294 07:49:28.331524  	INT_LINE	: 0xF (IRQ 15)
 1295 07:49:28.334846  PCI IRQ: Found device 4:00.05 using PIN B
 1296 07:49:28.337766  	With INT_PIN swizzled to PIN B
 1297 07:49:28.341172  	Attached to bridge device 0:08h.01h
 1298 07:49:28.344310  	Found this device in pirq_data table entry 7
 1299 07:49:28.344396  	Orig INT_PIN	: 2 (PIN B)
 1300 07:49:28.347737  	PCI_INTR idx	: 0x01 (INTB#)
 1301 07:49:28.351231  	INT_LINE	: 0x6 (IRQ 6)
 1302 07:49:28.354182  PCI IRQ: Found device 4:00.07 using PIN D
 1303 07:49:28.357736  	With INT_PIN swizzled to PIN D
 1304 07:49:28.361229  	Attached to bridge device 0:08h.01h
 1305 07:49:28.364557  	Found this device in pirq_data table entry 7
 1306 07:49:28.367313  	Orig INT_PIN	: 4 (PIN D)
 1307 07:49:28.370931  	PCI_INTR idx	: 0x03 (INTD#)
 1308 07:49:28.371017  	INT_LINE	: 0xF (IRQ 15)
 1309 07:49:28.377427  PCI IRQ: Found device 1:00.00 using PIN A
 1310 07:49:28.380865  	With INT_PIN swizzled to PIN A
 1311 07:49:28.384081  	Attached to bridge device 0:01h.02h
 1312 07:49:28.387247  	Found this device in pirq_data table entry 1
 1313 07:49:28.390591  	Orig INT_PIN	: 1 (PIN A)
 1314 07:49:28.390677  	PCI_INTR idx	: 0x00 (INTA#)
 1315 07:49:28.393727  	INT_LINE	: 0x6 (IRQ 6)
 1316 07:49:28.402757  PCI IRQ: Found device 2:00.00 using PIN A
 1317 07:49:28.406848  	With INT_PIN swizzled to PIN A
 1318 07:49:28.409661  	Attached to bridge device 0:01h.03h
 1319 07:49:28.419753  	Found this device in pirq_data table entry 2
 1320 07:49:28.423369  	Orig INT_PIN	: 1 (PIN A)
 1321 07:49:28.426946  	PCI_INTR idx	: 0x00 (INTA#)
 1322 07:49:28.429821  	INT_LINE	: 0x6 (IRQ 6)
 1323 07:49:28.433131  PCI IRQ: Found device 3:00.00 using PIN A
 1324 07:49:28.436677  	With INT_PIN swizzled to PIN A
 1325 07:49:28.439985  	Attached to bridge device 0:01h.07h
 1326 07:49:28.443475  	Found this device in pirq_data table entry 6
 1327 07:49:28.446539  	Orig INT_PIN	: 1 (PIN A)
 1328 07:49:28.446618  	PCI_INTR idx	: 0x00 (INTA#)
 1329 07:49:28.449916  	INT_LINE	: 0x6 (IRQ 6)
 1330 07:49:28.456574  PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
 1331 07:49:28.460096  BS: BS_DEV_ENABLE entry times (exec / console): 28 / 387 ms
 1332 07:49:28.462966  POST: 0x74
 1333 07:49:28.463038  Enabling resources...
 1334 07:49:28.466379  PCI: 00:00.0 cmd <- 00
 1335 07:49:28.469957  PCI: 00:00.2 subsystem <- 1022/1510
 1336 07:49:28.473100  PCI: 00:00.2 cmd <- 06
 1337 07:49:28.476175  PCI: 00:01.0 subsystem <- 1022/1510
 1338 07:49:28.476255  PCI: 00:01.0 cmd <- 00
 1339 07:49:28.479547  PCI: 00:01.2 bridge ctrl <- 0013
 1340 07:49:28.483085  PCI: 00:01.2 cmd <- 06
 1341 07:49:28.486123  PCI: 00:01.3 bridge ctrl <- 0013
 1342 07:49:28.486200  PCI: 00:01.3 cmd <- 06
 1343 07:49:28.489378  PCI: 00:01.7 bridge ctrl <- 0013
 1344 07:49:28.493205  PCI: 00:01.7 cmd <- 06
 1345 07:49:28.496319  PCI: 00:08.0 subsystem <- 1022/1510
 1346 07:49:28.496395  PCI: 00:08.0 cmd <- 00
 1347 07:49:28.499600  PCI: 00:08.1 bridge ctrl <- 001b
 1348 07:49:28.502655  PCI: 00:08.1 cmd <- 07
 1349 07:49:28.506656  PCI: 00:14.0 subsystem <- 1022/1510
 1350 07:49:28.509482  PCI: 00:14.0 cmd <- 403
 1351 07:49:28.512932  PCI: 00:14.3 subsystem <- 1022/1510
 1352 07:49:28.513015  PCI: 00:14.3 cmd <- 0f
 1353 07:49:28.516315  PCI: 00:18.7 cmd <- 00
 1354 07:49:28.519276  PCI: 01:00.0 cmd <- 02
 1355 07:49:28.523552  PCI: 02:00.0 cmd <- 06
 1356 07:49:28.529427  PCI: 03:00.0 cmd <- 02
 1357 07:49:28.532812  PCI: 04:00.0 subsystem <- 1022/1510
 1358 07:49:28.535864  PCI: 04:00.0 cmd <- 03
 1359 07:49:28.539144  PCI: 04:00.1 subsystem <- 1022/1510
 1360 07:49:28.539228  PCI: 04:00.1 cmd <- 02
 1361 07:49:28.542478  PCI: 04:00.2 subsystem <- 1022/1510
 1362 07:49:28.546090  PCI: 04:00.2 cmd <- 02
 1363 07:49:28.549575  PCI: 04:00.3 subsystem <- 1022/1510
 1364 07:49:28.552741  PCI: 04:00.3 cmd <- 02
 1365 07:49:28.556106  PCI: 04:00.5 subsystem <- 1022/1510
 1366 07:49:28.556189  PCI: 04:00.5 cmd <- 02
 1367 07:49:28.559228  PCI: 04:00.7 subsystem <- 1022/1510
 1368 07:49:28.562749  PCI: 04:00.7 cmd <- 02
 1369 07:49:28.562832  done.
 1370 07:49:28.568842  BS: BS_DEV_ENABLE run times (exec / console): 9 / 93 ms
 1371 07:49:28.568926  POST: 0x75
 1372 07:49:28.572439  Initializing devices...
 1373 07:49:28.572522  POST: 0x75
 1374 07:49:28.575918  CPU_CLUSTER: 0 init
 1375 07:49:28.576001  MTRR: Physical address space:
 1376 07:49:28.582209  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1377 07:49:28.588634  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1378 07:49:28.592053  0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
 1379 07:49:28.598672  0x00000000d0000000 - 0x00000000e0200000 size 0x10200000 type 1
 1380 07:49:28.605180  0x00000000e0200000 - 0x0000000100000000 size 0x1fe00000 type 0
 1381 07:49:28.609172  0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6
 1382 07:49:28.611872  
 1383 07:49:28.615263  MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
 1384 07:49:28.618745  MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
 1385 07:49:28.621914  MTRR: Fixed MSR 0x259 0x0000000000000000
 1386 07:49:28.625043  MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
 1387 07:49:28.628310  MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
 1388 07:49:28.631820  MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
 1389 07:49:28.635047  MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
 1390 07:49:28.638128  MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
 1391 07:49:28.641471  MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
 1392 07:49:28.648441  MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
 1393 07:49:28.651311  MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
 1394 07:49:28.651396  call enable_fixed_mtrr()
 1395 07:49:28.654722  CPU physical address size: 48 bits
 1396 07:49:28.661284  MTRR: default type WB/UC MTRR counts: 10/5.
 1397 07:49:28.661367  MTRR: UC selected as default type.
 1398 07:49:28.664970  
 1399 07:49:28.667698  MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
 1400 07:49:28.674790  MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
 1401 07:49:28.681022  MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
 1402 07:49:28.684649  MTRR: 3 base 0x00000000d0000000 mask 0x0000fffff0000000 type 1
 1403 07:49:28.691117  MTRR: 4 base 0x00000000e0000000 mask 0x0000ffffffe00000 type 1
 1404 07:49:28.691200  
 1405 07:49:28.691266  MTRR check
 1406 07:49:28.694154  Fixed MTRRs   : Enabled
 1407 07:49:28.697762  Variable MTRRs: Enabled
 1408 07:49:28.697850  
 1409 07:49:28.697915  POST: 0x93
 1410 07:49:28.701078  Setting up SMI for CPU
 1411 07:49:28.701162  Will perform SMM setup.
 1412 07:49:28.707452  CPU: AMD Ryzen 3 3250C 15W with Radeon Graphics     .
 1413 07:49:28.714010  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
 1414 07:49:28.717195  Processing 16 relocs. Offset value of 0x00030000
 1415 07:49:28.720678  Attempting to start 3 APs
 1416 07:49:28.723684  Waiting for 10ms after sending INIT.
 1417 07:49:28.739563  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
 1418 07:49:28.739648  done.
 1419 07:49:28.742385  AP: slot 2 apic_id 3.
 1420 07:49:28.742469  AP: slot 3 apic_id 1.
 1421 07:49:28.752243  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
 1422 07:49:28.755918  Processing 13 relocs. Offset value of 0x00038000
 1423 07:49:28.762147  SMM Module: stub loaded at 0x00038000. Will call 0xca6d2604(0x00000000)
 1424 07:49:28.765784  Installing permanent SMM handler to 0xcb800000
 1425 07:49:28.775731  Loading module at 0xcb810000 with entry 0xcb8114d2. filesize: 0x6b90 memsize: 0xd468
 1426 07:49:28.778884  Processing 425 relocs. Offset value of 0xcb810000
 1427 07:49:28.785466  Loading module at 0xcb808000 with entry 0xcb808000. filesize: 0x1b8 memsize: 0x1b8
 1428 07:49:28.789039  Processing 13 relocs. Offset value of 0xcb808000
 1429 07:49:28.795301  SMM Module: placing jmp sequence at 0xcb807e00 rel16 0x01fd
 1430 07:49:28.802251  SMM Module: placing jmp sequence at 0xcb807c00 rel16 0x03fd
 1431 07:49:28.805548  SMM Module: placing jmp sequence at 0xcb807a00 rel16 0x05fd
 1432 07:49:28.811868  SMM Module: stub loaded at 0xcb808000. Will call 0xcb8114d2(0x00000000)
 1433 07:49:28.818594  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb800000, cpu = 0
 1434 07:49:28.822018  Relocation complete.
 1435 07:49:28.828384  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffe00, cpu = 1
 1436 07:49:28.828470  Relocation complete.
 1437 07:49:28.835076  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffc00, cpu = 2
 1438 07:49:28.838458  Relocation complete.
 1439 07:49:28.845043  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffa00, cpu = 3
 1440 07:49:28.845128  Relocation complete.
 1441 07:49:28.848816  Initializing CPU #0
 1442 07:49:28.852024  CPU: vendor AMD device 820f01
 1443 07:49:28.854806  CPU: family 17, model 20, stepping 01
 1444 07:49:28.854891  Setting up local APIC...
 1445 07:49:28.858395   apic_id: 0x00 done.
 1446 07:49:28.861971  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1447 07:49:28.865013  CBFS: Locating 'cpu_microcode_blob.bin'
 1448 07:49:28.868288  CBFS: Found @ offset d200 size 2580
 1449 07:49:28.875712  microcode: patch id to apply = 0x08200103
 1450 07:49:28.878465  microcode: being updated to patch id = 0x08200103 succeeded
 1451 07:49:28.881949  CPU #0 initialized
 1452 07:49:28.882034  Initializing CPU #2
 1453 07:49:28.885615  Initializing CPU #3
 1454 07:49:28.885692  Initializing CPU #1
 1455 07:49:28.888549  CPU: vendor AMD device 820f01
 1456 07:49:28.891953  CPU: family 17, model 20, stepping 01
 1457 07:49:28.895452  CPU: vendor AMD device 820f01
 1458 07:49:28.898931  Setting up local APIC...
 1459 07:49:28.901763  CPU: vendor AMD device 820f01
 1460 07:49:28.901837   apic_id: 0x01 done.
 1461 07:49:28.905076  CPU: family 17, model 20, stepping 01
 1462 07:49:28.911552  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1463 07:49:28.911632  Setting up local APIC...
 1464 07:49:28.915090  CBFS: Locating 'cpu_microcode_blob.bin'
 1465 07:49:28.921778   apic_id: 0x03 CBFS: Found @ offset d200 size 2580
 1466 07:49:28.921859  done.
 1467 07:49:28.925318  CPU: family 17, model 20, stepping 01
 1468 07:49:28.928818  microcode: patch id to apply = 0x08200103
 1469 07:49:28.932196  Setting up local APIC...
 1470 07:49:28.935040  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1471 07:49:28.941752  microcode: being updated to patch id = 0x08200103 succeeded
 1472 07:49:28.944848  CBFS: Locating 'cpu_microcode_blob.bin'
 1473 07:49:28.948481   apic_id: 0x02 CBFS: Found @ offset d200 size 2580
 1474 07:49:28.948557  done.
 1475 07:49:28.951912  
 1476 07:49:28.954912  microcode: patch id to apply = 0x08200103
 1477 07:49:28.958489  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1478 07:49:28.961356  CPU #3 initialized
 1479 07:49:28.964914  CBFS: Locating 'cpu_microcode_blob.bin'
 1480 07:49:28.968373  microcode: being updated to patch id = 0x08200103 succeeded
 1481 07:49:28.971355  CBFS: Found @ offset d200 size 2580
 1482 07:49:28.974632  CPU #2 initialized
 1483 07:49:28.978184  microcode: patch id to apply = 0x08200103
 1484 07:49:28.984525  microcode: being updated to patch id = 0x08200103 succeeded
 1485 07:49:28.984605  CPU #1 initialized
 1486 07:49:28.987965  bsp_do_flight_plan done after 245 msecs.
 1487 07:49:28.988041  
 1488 07:49:28.988111  
 1489 07:49:28.997684  coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct  8 23:13:58 UTC 2020 smm starting (log level: 8)...
 1490 07:49:28.997769  
 1491 07:49:29.001112  SMI# #1
 1492 07:49:29.001184  spi_init: SPI BAR at 0xfec10000
 1493 07:49:29.004544  PSP: Notify SMM info... OK
 1494 07:49:29.007513  MTRR: TEMPORARY Physical address space:
 1495 07:49:29.014221  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1496 07:49:29.021094  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1497 07:49:29.024552  0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
 1498 07:49:29.030722  0x00000000d0000000 - 0x00000000ff000000 size 0x2f000000 type 0
 1499 07:49:29.037372  0x00000000ff000000 - 0x0000000100000000 size 0x01000000 type 5
 1500 07:49:29.040806  0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6
 1501 07:49:29.044255  MTRR: default type WB/UC MTRR counts: 7/5.
 1502 07:49:29.047427  MTRR: UC selected as default type.
 1503 07:49:29.054122  MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
 1504 07:49:29.060567  MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
 1505 07:49:29.064053  MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
 1506 07:49:29.067108  
 1507 07:49:29.070404  MTRR: 3 base 0x00000000ff000000 mask 0x0000ffffff000000 type 5
 1508 07:49:29.077294  MTRR: 4 base 0x0000000100000000 mask 0x0000ffffc0000000 type 6
 1509 07:49:29.080697  CPU_CLUSTER: 0 init finished in 501 msecs
 1510 07:49:29.080777  POST: 0x75
 1511 07:49:29.084148  POST: 0x75
 1512 07:49:29.084222  POST: 0x75
 1513 07:49:29.084284  POST: 0x75
 1514 07:49:29.087107  POST: 0x75
 1515 07:49:29.087179  POST: 0x75
 1516 07:49:29.087240  POST: 0x75
 1517 07:49:29.090345  POST: 0x75
 1518 07:49:29.090431  POST: 0x75
 1519 07:49:29.090510  POST: 0x75
 1520 07:49:29.094047  POST: 0x75
 1521 07:49:29.094120  POST: 0x75
 1522 07:49:29.094182  POST: 0x75
 1523 07:49:29.096777  POST: 0x75
 1524 07:49:29.096848  PCI: 00:01.0 init
 1525 07:49:29.100325  PCI: 00:01.0 init finished in 0 msecs
 1526 07:49:29.103760  POST: 0x75
 1527 07:49:29.103834  POST: 0x75
 1528 07:49:29.103931  POST: 0x75
 1529 07:49:29.107176  POST: 0x75
 1530 07:49:29.107248  PCI: 00:08.0 init
 1531 07:49:29.109917  PCI: 00:08.0 init finished in 0 msecs
 1532 07:49:29.109986  POST: 0x75
 1533 07:49:29.113372  POST: 0x75
 1534 07:49:29.113491  PCI: 00:14.0 init
 1535 07:49:29.116806  IOAPIC: Initializing IOAPIC at 0xfec00000
 1536 07:49:29.123367  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1537 07:49:29.123451  IOAPIC: ID = 0x08
 1538 07:49:29.126697  IOAPIC: Dumping registers
 1539 07:49:29.130264    reg 0x0000: 0x08000000
 1540 07:49:29.130348    reg 0x0001: 0x00178021
 1541 07:49:29.133471    reg 0x0002: 0x08000000
 1542 07:49:29.136503  IOAPIC: 24 interrupts
 1543 07:49:29.136589  IOAPIC: Enabling interrupts on FSB
 1544 07:49:29.139977  
 1545 07:49:29.143296  IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
 1546 07:49:29.146467  IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
 1547 07:49:29.152890  IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
 1548 07:49:29.156494  IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
 1549 07:49:29.159898  IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
 1550 07:49:29.166442  IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
 1551 07:49:29.169381  IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
 1552 07:49:29.172737  IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
 1553 07:49:29.179500  IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
 1554 07:49:29.182885  IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
 1555 07:49:29.189957  IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
 1556 07:49:29.192839  IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
 1557 07:49:29.195976  IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
 1558 07:49:29.202823  IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
 1559 07:49:29.205930  IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
 1560 07:49:29.209193  IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
 1561 07:49:29.215696  IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
 1562 07:49:29.219091  IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
 1563 07:49:29.222526  IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
 1564 07:49:29.226035  
 1565 07:49:29.229301  IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
 1566 07:49:29.232714  IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
 1567 07:49:29.239134  IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
 1568 07:49:29.242342  IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
 1569 07:49:29.245863  IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
 1570 07:49:29.249170  PCI: 00:14.0 init finished in 132 msecs
 1571 07:49:29.252528  POST: 0x75
 1572 07:49:29.252609  PCI: 00:14.3 init
 1573 07:49:29.252671  RTC Init
 1574 07:49:29.255876  
 1575 07:49:29.258780  PCI: 00:14.3 init finished in 0 msecs
 1576 07:49:29.258851  POST: 0x75
 1577 07:49:29.258912  POST: 0x75
 1578 07:49:29.262557  POST: 0x75
 1579 07:49:29.262625  POST: 0x75
 1580 07:49:29.262685  POST: 0x75
 1581 07:49:29.265948  POST: 0x75
 1582 07:49:29.266024  POST: 0x75
 1583 07:49:29.266083  POST: 0x75
 1584 07:49:29.268945  PCI: 00:18.7 init
 1585 07:49:29.272725  PCI: 00:18.7 init finished in 0 msecs
 1586 07:49:29.272805  POST: 0x75
 1587 07:49:29.275555  PCI: 01:00.0 init
 1588 07:49:29.279019  PCI: 01:00.0 init finished in 0 msecs
 1589 07:49:29.279105  POST: 0x75
 1590 07:49:29.282368  PCI: 02:00.0 init
 1591 07:49:29.285340  PCI: 02:00.0 init finished in 0 msecs
 1592 07:49:29.285447  POST: 0x75
 1593 07:49:29.285530  PCI: 03:00.0 init
 1594 07:49:29.288792  PCI: 03:00.0 init finished in 0 msecs
 1595 07:49:29.292508  POST: 0x75
 1596 07:49:29.292646  PCI: 04:00.0 init
 1597 07:49:29.298549  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1598 07:49:29.301923  CBFS: Locating 'pci1002,15d8,c4.rom'
 1599 07:49:29.305446  CBFS: 'pci1002,15d8,c4.rom' not found.
 1600 07:49:29.305600  Using RV2 VBIOS.
 1601 07:49:29.312448  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1602 07:49:29.315342  CBFS: Locating 'pci1002,15dd,c4.rom'
 1603 07:49:29.318811  CBFS: Found @ offset 67140 size d400
 1604 07:49:29.321707  In CBFS, ROM address for PCI: 04:00.0 = 0xff8dc188
 1605 07:49:29.328677  PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
 1606 07:49:29.332148  PCI ROM image, vendor ID 1002, device ID 15dd,
 1607 07:49:29.335344  PCI ROM image, Class Code 030000, Code Type 00
 1608 07:49:29.342291  Copying VGA ROM Image from 0xff8dc188 to 0xc0000, 0xd400 bytes
 1609 07:49:29.349029  Real mode stub @0x00000600: 889 bytes
 1610 07:49:29.352395  
 1611 07:49:29.352813  Calling Option ROM...
 1612 07:49:29.375974  ... Option ROM returned.
 1613 07:49:29.379107  VBE: Getting information about VESA mode 41d4
 1614 07:49:29.382731  VBE: resolution:  1920x1080@32
 1615 07:49:29.385561  VBE: framebuffer: 0xd0000000
 1616 07:49:29.388961  VBE: Setting VESA mode 41d4
 1617 07:49:29.406246  VGA Option ROM was run
 1618 07:49:29.409546  PCI: 04:00.0 init finished in 113 msecs
 1619 07:49:29.409682  POST: 0x75
 1620 07:49:29.413105  
 1621 07:49:29.413256  PCI: 04:00.1 init
 1622 07:49:29.416359  PCI: 04:00.1 init finished in 0 msecs
 1623 07:49:29.416442  POST: 0x75
 1624 07:49:29.419283  PCI: 04:00.2 init
 1625 07:49:29.422614  PCI: 04:00.2 init finished in 0 msecs
 1626 07:49:29.422697  POST: 0x75
 1627 07:49:29.425987  PCI: 04:00.3 init
 1628 07:49:29.429074  PCI: 04:00.3 init finished in 0 msecs
 1629 07:49:29.429155  POST: 0x75
 1630 07:49:29.432453  PCI: 04:00.5 init
 1631 07:49:29.435875  PCI: 04:00.5 init finished in 0 msecs
 1632 07:49:29.435959  POST: 0x75
 1633 07:49:29.436025  PCI: 04:00.7 init
 1634 07:49:29.439193  
 1635 07:49:29.442820  PCI: 04:00.7 init finished in 0 msecs
 1636 07:49:29.442904  POST: 0x75
 1637 07:49:29.442971  POST: 0x75
 1638 07:49:29.445720  POST: 0x75
 1639 07:49:29.445804  POST: 0x75
 1640 07:49:29.445870  POST: 0x75
 1641 07:49:29.449087  POST: 0x75
 1642 07:49:29.449171  POST: 0x75
 1643 07:49:29.449236  POST: 0x75
 1644 07:49:29.452428  POST: 0x75
 1645 07:49:29.452511  POST: 0x75
 1646 07:49:29.452577  POST: 0x75
 1647 07:49:29.455742  POST: 0x75
 1648 07:49:29.455826  POST: 0x75
 1649 07:49:29.455892  PNP: 0c09.0 init
 1650 07:49:29.463127  Google Chrome EC uptime: 8.059 seconds
 1651 07:49:29.466590  Google Chrome AP resets since EC boot: 0
 1652 07:49:29.469664  Google Chrome most recent AP reset causes:
 1653 07:49:29.476478  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1654 07:49:29.479536  PNP: 0c09.0 init finished in 17 msecs
 1655 07:49:29.479621  POST: 0x75
 1656 07:49:29.479687  POST: 0x75
 1657 07:49:29.483048  POST: 0x75
 1658 07:49:29.483131  POST: 0x75
 1659 07:49:29.483197  POST: 0x75
 1660 07:49:29.486107  POST: 0x75
 1661 07:49:29.486190  POST: 0x75
 1662 07:49:29.486257  POST: 0x75
 1663 07:49:29.489487  POST: 0x75
 1664 07:49:29.489571  POST: 0x75
 1665 07:49:29.489637  Devices initialized
 1666 07:49:29.493061  
 1667 07:49:29.493145  Show all devs... After init.
 1668 07:49:29.496128  Root Device: enabled 1
 1669 07:49:29.499622  CPU_CLUSTER: 0: enabled 1
 1670 07:49:29.499706  DOMAIN: 0000: enabled 1
 1671 07:49:29.502553  GENERIC: 0.1: enabled 1
 1672 07:49:29.505966  MMIO: fedc5000: enabled 1
 1673 07:49:29.506050  MMIO: fedca000: enabled 1
 1674 07:49:29.509341  MMIO: fedce000: enabled 0
 1675 07:49:29.512863  MMIO: fedcf000: enabled 0
 1676 07:49:29.512947  MMIO: fedc4000: enabled 1
 1677 07:49:29.515793  
 1678 07:49:29.515878  APIC: 00: enabled 1
 1679 07:49:29.519676  PCI: 00:00.0: enabled 1
 1680 07:49:29.519760  PCI: 00:00.2: enabled 1
 1681 07:49:29.522621  PCI: 00:01.0: enabled 1
 1682 07:49:29.526071  PCI: 00:01.1: enabled 0
 1683 07:49:29.526155  PCI: 00:01.2: enabled 1
 1684 07:49:29.529373  PCI: 00:01.3: enabled 1
 1685 07:49:29.532652  PCI: 00:01.4: enabled 0
 1686 07:49:29.532737  PCI: 00:01.5: enabled 0
 1687 07:49:29.535849  PCI: 00:01.6: enabled 0
 1688 07:49:29.539157  PCI: 00:01.7: enabled 1
 1689 07:49:29.539241  PCI: 00:08.0: enabled 1
 1690 07:49:29.542878  PCI: 00:08.1: enabled 1
 1691 07:49:29.546027  PCI: 00:08.2: enabled 0
 1692 07:49:29.546111  PCI: 00:14.0: enabled 1
 1693 07:49:29.549448  PCI: 00:14.3: enabled 1
 1694 07:49:29.552786  PCI: 00:14.6: enabled 0
 1695 07:49:29.552869  PCI: 00:18.0: enabled 1
 1696 07:49:29.555829  PCI: 00:18.1: enabled 1
 1697 07:49:29.559079  PCI: 00:18.2: enabled 1
 1698 07:49:29.559163  PCI: 00:18.3: enabled 1
 1699 07:49:29.562726  PCI: 00:18.4: enabled 1
 1700 07:49:29.565596  PCI: 00:18.5: enabled 1
 1701 07:49:29.565680  PCI: 00:18.6: enabled 1
 1702 07:49:29.569096  I2C: 01:50: enabled 1
 1703 07:49:29.569180  GENERIC: 0.0: enabled 1
 1704 07:49:29.572482  I2C: 02:15: enabled 1
 1705 07:49:29.575447  I2C: 02:2c: enabled 1
 1706 07:49:29.575530  I2C: 02:5d: enabled 1
 1707 07:49:29.579349  GENERIC: 0.0: enabled 1
 1708 07:49:29.582107  PCI: 04:00.0: enabled 1
 1709 07:49:29.582190  PCI: 04:00.1: enabled 1
 1710 07:49:29.585570  PCI: 04:00.2: enabled 1
 1711 07:49:29.588824  PCI: 04:00.3: enabled 1
 1712 07:49:29.588906  PCI: 04:00.4: enabled 0
 1713 07:49:29.591875  PCI: 04:00.5: enabled 1
 1714 07:49:29.595192  PCI: 04:00.6: enabled 0
 1715 07:49:29.595276  PCI: 04:00.7: enabled 1
 1716 07:49:29.598797  PCI: 00:00.0: enabled 0
 1717 07:49:29.598881  PNP: 0c09.0: enabled 1
 1718 07:49:29.602036  
 1719 07:49:29.602120  USB0 port 0: enabled 1
 1720 07:49:29.605660  USB0 port 0: enabled 1
 1721 07:49:29.605745  GENERIC: 0.0: enabled 1
 1722 07:49:29.608423  GENERIC: 0.0: enabled 1
 1723 07:49:29.611880  GENERIC: 1.0: enabled 1
 1724 07:49:29.611964  GENERIC: 0.0: enabled 1
 1725 07:49:29.615350  USB2 port 0: enabled 1
 1726 07:49:29.618718  USB2 port 1: enabled 1
 1727 07:49:29.618801  USB2 port 2: enabled 1
 1728 07:49:29.622462  USB2 port 3: enabled 1
 1729 07:49:29.625131  USB3 port 0: enabled 1
 1730 07:49:29.625214  USB3 port 1: enabled 1
 1731 07:49:29.628883  USB3 port 2: enabled 1
 1732 07:49:29.628967  USB3 port 3: enabled 1
 1733 07:49:29.631825  USB2 port 4: enabled 1
 1734 07:49:29.635438  USB2 port 5: enabled 1
 1735 07:49:29.635521  USB2 port 0: enabled 1
 1736 07:49:29.638640  USB2 port 1: enabled 1
 1737 07:49:29.642205  USB3 port 0: enabled 1
 1738 07:49:29.642288  I2C: 00:1a: enabled 1
 1739 07:49:29.645158  PCI: 00:18.7: enabled 1
 1740 07:49:29.648615  PCI: 01:00.0: enabled 1
 1741 07:49:29.648699  PCI: 02:00.0: enabled 1
 1742 07:49:29.651676  PCI: 03:00.0: enabled 1
 1743 07:49:29.651760  APIC: 02: enabled 1
 1744 07:49:29.655142  APIC: 03: enabled 1
 1745 07:49:29.655230  APIC: 01: enabled 1
 1746 07:49:29.658194  
 1747 07:49:29.661589  BS: BS_DEV_INIT run times (exec / console): 211 / 875 ms
 1748 07:49:29.665212  SCIMAP 56 maps to GPE 31 (active high, edge trigger)
 1749 07:49:29.671552  ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:29 UTC
 1750 07:49:29.677982  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1751 07:49:29.684515  ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:29 UTC
 1752 07:49:29.687894  elog_add_boot_reason: Logged dev mode boot
 1753 07:49:29.694548  BS: BS_POST_DEVICE entry times (exec / console): 0 / 26 ms
 1754 07:49:29.694633  POST: 0x76
 1755 07:49:29.694699  Finalize devices...
 1756 07:49:29.698121  
 1757 07:49:29.698204  Devices finalized
 1758 07:49:29.701149  BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms
 1759 07:49:29.704416  
 1760 07:49:29.707833  FMAP: area RW_NVRAM found @ 617000 (20480 bytes)
 1761 07:49:29.711298  BS: BS_POST_DEVICE exit times (exec / console): 1 / 4 ms
 1762 07:49:29.714342  POST: 0x77
 1763 07:49:29.717628  BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
 1764 07:49:29.721277  Saving dimm info for smbios type 17
 1765 07:49:29.724675  AMD_FSP_DMI_HOB found
 1766 07:49:29.727605  AGESA TYPE 17 DMI INFO:
 1767 07:49:29.727695    Handle: 1
 1768 07:49:29.731292    TotalWidth: 64
 1769 07:49:29.731375    DataWidth: 64
 1770 07:49:29.734281    MemorySize: 4096
 1771 07:49:29.734364    DeviceSet: 0
 1772 07:49:29.734429    Speed: 1600
 1773 07:49:29.737711    ManufacturerIdCode: 0
 1774 07:49:29.737794    Attributes: 1
 1775 07:49:29.740648    ExtSize: 0
 1776 07:49:29.740731    ConfigSpeed: 1200
 1777 07:49:29.743996    MemoryType: 0x1a
 1778 07:49:29.744080    FormFactor: 0xd
 1779 07:49:29.747489    DeviceLocator:   DIMM 0
 1780 07:49:29.750619    BankLocator: P0 CHANNEL A
 1781 07:49:29.754287    SerialNumber(8):  00000000
 1782 07:49:29.757506    PartNumber(0):                    
 1783 07:49:29.757585  CBMEM_ID_MEMINFO:
 1784 07:49:29.760859    dimm_size: 4096
 1785 07:49:29.760942    ddr_type: 0x1a
 1786 07:49:29.763891    ddr_frequency: 0
 1787 07:49:29.763975    rank_per_dimm: 1
 1788 07:49:29.767803    channel_num: 0
 1789 07:49:29.767886    dimm_num: 0
 1790 07:49:29.770712    bank_locator: 0
 1791 07:49:29.770795    mod_id: 0
 1792 07:49:29.770860    mod_type: 0x4
 1793 07:49:29.774321    bus_width: 3
 1794 07:49:29.774404    serial: 00000000
 1795 07:49:29.777284    module_part_number(20): MT40A512M16TB-062E:J
 1796 07:49:29.780696  
 1797 07:49:29.784196  BS: BS_WRITE_TABLES entry times (exec / console): 1 / 59 ms
 1798 07:49:29.784280  POST: 0x79
 1799 07:49:29.787296  POST: 0x9c
 1800 07:49:29.790652  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1801 07:49:29.793690  CBFS: Locating 'fallback/dsdt.aml'
 1802 07:49:29.797632  CBFS: Found @ offset 2be80 size 3d79
 1803 07:49:29.800673  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1804 07:49:29.804003  CBFS: Locating 'fallback/slic'
 1805 07:49:29.807054  CBFS: 'fallback/slic' not found.
 1806 07:49:29.810578  ACPI: Writing ACPI tables at ca646000.
 1807 07:49:29.813832  ACPI:    * FACS
 1808 07:49:29.813916  ACPI:    * DSDT
 1809 07:49:29.817255  Ramoops buffer: 0x100000@0xca546000.
 1810 07:49:29.820134  FMAP: area RO_VPD found @ 800000 (16384 bytes)
 1811 07:49:29.827024  FMAP: area RW_VPD found @ 615000 (8192 bytes)
 1812 07:49:29.830019  ACPI:    * FADT
 1813 07:49:29.830104  pm_base: 0x0400
 1814 07:49:29.833328  ACPI: added table 1/32, length now 40
 1815 07:49:29.833433  ACPI:     * SSDT
 1816 07:49:29.840005  PSS: 2600MHz power 3166 control 0x0 status 0x0
 1817 07:49:29.843414  PSS: 1700MHz power 1615 control 0x1 status 0x1
 1818 07:49:29.847077  PSS: 1400MHz power 1276 control 0x2 status 0x2
 1819 07:49:29.853168  PSS: 2600MHz power 3166 control 0x0 status 0x0
 1820 07:49:29.856450  PSS: 1700MHz power 1615 control 0x1 status 0x1
 1821 07:49:29.860110  PSS: 1400MHz power 1276 control 0x2 status 0x2
 1822 07:49:29.863546  PSS: 2600MHz power 3166 control 0x0 status 0x0
 1823 07:49:29.869972  PSS: 1700MHz power 1615 control 0x1 status 0x1
 1824 07:49:29.873338  PSS: 1400MHz power 1276 control 0x2 status 0x2
 1825 07:49:29.876961  PSS: 2600MHz power 3166 control 0x0 status 0x0
 1826 07:49:29.879883  PSS: 1700MHz power 1615 control 0x1 status 0x1
 1827 07:49:29.886783  PSS: 1400MHz power 1276 control 0x2 status 0x2
 1828 07:49:29.889596  \_SB.MAXM: Maxim Integrated 98357A Amplifier
 1829 07:49:29.892991  \_SB.I2C3.TPMI: I2C TPM at I2C: 01:50
 1830 07:49:29.896554  \_SB.FUR1.CRFP: Fingerprint Reader at GENERIC: 0.0
 1831 07:49:29.899889  \_SB.I2C2.D015: ELAN Touchpad at I2C: 02:15
 1832 07:49:29.906187  \_SB.I2C2.H02C: Synaptics Touchpad at I2C: 02:2c
 1833 07:49:29.909591  \_SB.I2C2.H05D: Goodix Touchscreen at I2C: 02:5d
 1834 07:49:29.912939  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1835 07:49:29.916402  CBFS: Locating 'pci1002,15d8,c4.rom'
 1836 07:49:29.919296  CBFS: 'pci1002,15d8,c4.rom' not found.
 1837 07:49:29.922790  Using RV2 VBIOS.
 1838 07:49:29.926279  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1839 07:49:29.929623  CBFS: Locating 'pci1002,15dd,c4.rom'
 1840 07:49:29.933147  CBFS: Found @ offset 67140 size d400
 1841 07:49:29.939550  In CBFS, ROM address for PCI: 04:00.0 = 0xff8dc188
 1842 07:49:29.945841  PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
 1843 07:49:29.949348  PCI ROM image, vendor ID 1002, device ID 15dd,
 1844 07:49:29.952649  PCI ROM image, Class Code 030000, Code Type 00
 1845 07:49:29.956168  xHCI SSDT generation
 1846 07:49:29.959060  xhci_fill_ssdt: Got GPE 31 for PCI: 04:00.3
 1847 07:49:29.962456  xHCI Supported Protocol:
 1848 07:49:29.965914    Major: 0x2, Minor: 0x0, Protocol: 'USB '
 1849 07:49:29.969057    Port Offset: 1, Port Count: 6
 1850 07:49:29.969132  xHCI Supported Protocol:
 1851 07:49:29.972332    Major: 0x3, Minor: 0x10, Protocol: 'USB '
 1852 07:49:29.975824    Port Offset: 7, Port Count: 1
 1853 07:49:29.979510  xHCI Supported Protocol:
 1854 07:49:29.982430    Major: 0x3, Minor: 0x10, Protocol: 'USB '
 1855 07:49:29.985916    Port Offset: 8, Port Count: 1
 1856 07:49:29.989479  xHCI Supported Protocol:
 1857 07:49:29.992273    Major: 0x3, Minor: 0x10, Protocol: 'USB '
 1858 07:49:29.995715    Port Offset: 9, Port Count: 1
 1859 07:49:29.995789  xHCI Supported Protocol:
 1860 07:49:30.002511    Major: 0x3, Minor: 0x10, Protocol: 'USB '
 1861 07:49:30.005455    Port Offset: 10, Port Count: 1
 1862 07:49:30.009099  EC returned error result code 1
 1863 07:49:30.012368  PS2K: Bad resp from EC. Vivaldi disabled!
 1864 07:49:30.019238  \_SB.PCI0.PBRA.ACPD.I2S0: I2S machine driver at GENERIC: 0.0
 1865 07:49:30.022497  \_SB.PCI0.LPCB.EC0.CREC.TUN0: Cros EC I2C Tunnel at GENERIC: 0.0
 1866 07:49:30.028947  \_SB.PCI0.LPCB.EC0.CREC.MSTH: Cros EC I2C Tunnel at GENERIC: 1.0
 1867 07:49:30.035631  \_SB.PCI0.LPCB.EC0.CREC.ECA0: Cros EC audio codec at GENERIC: 0.0
 1868 07:49:30.042043  \_SB.PCI0.PBRA.XHC0.RHUB.HS01: Left Type-C Port at USB2 port 0
 1869 07:49:30.045537  \_SB.PCI0.PBRA.XHC0.RHUB.HS02: Left Type-A Port at USB2 port 1
 1870 07:49:30.051712  \_SB.PCI0.PBRA.XHC0.RHUB.HS03: Right Type-A Port at USB2 port 2
 1871 07:49:30.058339  \_SB.PCI0.PBRA.XHC0.RHUB.HS04: Right Type-C Port at USB2 port 3
 1872 07:49:30.061755  \_SB.PCI0.PBRA.XHC0.RHUB.SS01: Left Type-C Port at USB3 port 0
 1873 07:49:30.068433  \_SB.PCI0.PBRA.XHC0.RHUB.SS02: Left Type-A Port at USB3 port 1
 1874 07:49:30.074832  \_SB.PCI0.PBRA.XHC0.RHUB.SS03: Right Type-A Port at USB3 port 2
 1875 07:49:30.078286  \_SB.PCI0.PBRA.XHC0.RHUB.SS04: Right Type-C Port at USB3 port 3
 1876 07:49:30.084729  \_SB.PCI0.PBRA.XHC0.RHUB.HS05: User-Facing Camera at USB2 port 4
 1877 07:49:30.091319  \_SB.PCI0.PBRA.XHC0.RHUB.HS06: Bluetooth at USB2 port 5
 1878 07:49:30.094719  \_SB.PCI0.LPCB.EC0.CREC.TUN0.RT58: Realtek RT5682 at I2C: 00:1a
 1879 07:49:30.101817  Error: Could not locate 'wifi_sar' in VPD.
 1880 07:49:30.104497  Checking CBFS for default SAR values
 1881 07:49:30.108052  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1882 07:49:30.111386  CBFS: Locating 'wifi_sar_defaults.hex'
 1883 07:49:30.114864  CBFS: Found @ offset 48140 size 77
 1884 07:49:30.118294  \_SB.PCI0.PBR1.WF00.WF00:  PCI: 01:00.0
 1885 07:49:30.121252  ACPI: added table 2/32, length now 44
 1886 07:49:30.121331  ACPI:    * MCFG
 1887 07:49:30.124666  ACPI: added table 3/32, length now 48
 1888 07:49:30.127672  ACPI:    * TPM2
 1889 07:49:30.131139  TPM2 log created at 0xca528000
 1890 07:49:30.134452  ACPI: added table 4/32, length now 52
 1891 07:49:30.134526  ACPI:    * MADT
 1892 07:49:30.137894  ACPI: added table 5/32, length now 56
 1893 07:49:30.140914  current = ca64c8a0
 1894 07:49:30.144462  Searching for AGESA FSP ACPI Tables
 1895 07:49:30.144538  ACPI:    * CRAT (AGESA).
 1896 07:49:30.147516  ACPI: added table 6/32, length now 60
 1897 07:49:30.151029  
 1898 07:49:30.151105  ACPI:    * ALIB (AGESA).
 1899 07:49:30.154342  ACPI: added table 7/32, length now 64
 1900 07:49:30.166127  ACPI: added table 8/32, length now 68
 1901 07:49:30.169382  
 1902 07:49:30.169492  ACPI:    * HPET
 1903 07:49:30.172668  ACPI: added table 9/32, length now 72
 1904 07:49:30.179553             Copying initialized VBIOS image from 0x000c0000
 1905 07:49:30.179638  ACPI:    * VFCT at ca652310
 1906 07:49:30.182617  ACPI: added table 10/32, length now 76
 1907 07:49:30.186020  ACPI: done.
 1908 07:49:30.186104  ACPI tables: 104320 bytes.
 1909 07:49:30.189753  smbios_write_tables: ca527000
 1910 07:49:30.193083  Create SMBIOS type 16
 1911 07:49:30.195891  Create SMBIOS type 17
 1912 07:49:30.195975  PCI: 01:00.0 (unknown)
 1913 07:49:30.199255  SMBIOS tables: 891 bytes.
 1914 07:49:30.202766  Writing table forward entry at 0x00000500
 1915 07:49:30.209682  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9577
 1916 07:49:30.212912  Writing coreboot table at 0xca66a000
 1917 07:49:30.215899   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1918 07:49:30.222691   1. 0000000000001000-000000000009ffff: RAM
 1919 07:49:30.225600   2. 00000000000a0000-00000000000fffff: RESERVED
 1920 07:49:30.229611   3. 0000000000100000-0000000001ffffff: RAM
 1921 07:49:30.232690   4. 0000000002000000-00000000021bffff: RESERVED
 1922 07:49:30.235872   5. 00000000021c0000-00000000ca526fff: RAM
 1923 07:49:30.242906   6. 00000000ca527000-00000000ca6b5fff: CONFIGURATION TABLES
 1924 07:49:30.245775   7. 00000000ca6b6000-00000000ca7c7fff: RAMSTAGE
 1925 07:49:30.252578   8. 00000000ca7c8000-00000000cb7fffff: CONFIGURATION TABLES
 1926 07:49:30.255919   9. 00000000cb800000-00000000cfffffff: RESERVED
 1927 07:49:30.259319  10. 00000000f8000000-00000000fbffffff: RESERVED
 1928 07:49:30.262194  
 1929 07:49:30.265574  11. 0000000100000000-000000012f33ffff: RAM
 1930 07:49:30.269020  12. 000000012f340000-000000012fffffff: RESERVED
 1931 07:49:30.272543  Passing 3 GPIOs to payload:
 1932 07:49:30.275424              NAME |       PORT | POLARITY |     VALUE
 1933 07:49:30.282419               lid |  undefined |     high |      high
 1934 07:49:30.285228             power |  undefined |     high |       low
 1935 07:49:30.288850          EC in RW | 0x00000082 |     high |      high
 1936 07:49:30.292229  Board ID: 5
 1937 07:49:30.292313  SKU ID: 1510014996
 1938 07:49:30.298702  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1939 07:49:30.301635  Wrote coreboot table at: 0xca66a000, 0x53c bytes, checksum f5ef
 1940 07:49:30.305099  coreboot table: 1364 bytes.
 1941 07:49:30.308509  IMD ROOT    0. 0xcb7ff000 0x00001000
 1942 07:49:30.311978  IMD SMALL   1. 0xcb7fe000 0x00001000
 1943 07:49:30.314845  FSP MEMORY  2. 0xca7fe000 0x01000000
 1944 07:49:30.318527  CONSOLE     3. 0xca7de000 0x00020000
 1945 07:49:30.321984  FMAP        4. 0xca7dd000 0x00000452
 1946 07:49:30.325270  TIME STAMP  5. 0xca7dc000 0x00000910
 1947 07:49:30.328809  VBOOT WORK  6. 0xca7c8000 0x00014000
 1948 07:49:30.331617  RAMSTAGE    7. 0xca6b5000 0x00113000
 1949 07:49:30.335246  REFCODE     8. 0xca683000 0x00032000
 1950 07:49:30.338602  ACPI GNVS   9. 0xca682000 0x00001000
 1951 07:49:30.341587  SMM BACKUP 10. 0xca672000 0x00010000
 1952 07:49:30.344861  COREBOOT   11. 0xca66a000 0x00008000
 1953 07:49:30.348422  ACPI       12. 0xca646000 0x00024000
 1954 07:49:30.351266  RAMOOPS    13. 0xca546000 0x00100000
 1955 07:49:30.354671  VGA ROM #0 14. 0xca538000 0x0000d400
 1956 07:49:30.358236  TPM2 TCGLOG15. 0xca528000 0x00010000
 1957 07:49:30.361664  SMBIOS     16. 0xca527000 0x00000800
 1958 07:49:30.364997  IMD small region:
 1959 07:49:30.367914    IMD ROOT    0. 0xcb7fec00 0x00000400
 1960 07:49:30.371229    FSP RUNTIME 1. 0xcb7febe0 0x00000004
 1961 07:49:30.374484    VPD         2. 0xcb7feb80 0x0000004c
 1962 07:49:30.377852    POWER STATE 3. 0xcb7feb40 0x00000030
 1963 07:49:30.381267    ROMSTAGE    4. 0xcb7feb20 0x00000004
 1964 07:49:30.384766    EARLY DRAM USAGE 5. 0xcb7feb00 0x00000008
 1965 07:49:30.387694    MEM INFO    6. 0xcb7fe920 0x000001e0
 1966 07:49:30.391114  Reset backlight GPIO
 1967 07:49:30.398172  BS: BS_WRITE_TABLES run times (exec / console): 13 / 592 ms
 1968 07:49:30.401756  Probing TPM I2C: done! DID_VID 0x00281ae0
 1969 07:49:30.401840  Locality already claimed
 1970 07:49:30.404424  cr50 TPM 2.0 (i2c 3:0x50 id 0x28)
 1971 07:49:30.407872  Checking cr50 for pending updates
 1972 07:49:30.419545  Reading cr50 TPM mode
 1973 07:49:30.433204  BS: BS_PAYLOAD_LOAD entry times (exec / console): 16 / 14 ms
 1974 07:49:30.433289  POST: 0x7a
 1975 07:49:30.439711  FMAP: area COREBOOT found @ 875000 (7909376 bytes)
 1976 07:49:30.443171  CBFS: Locating 'fallback/payload'
 1977 07:49:30.446608  CBFS: Found @ offset 51e680 size 4d114
 1978 07:49:30.450125  Checking segment from ROM address 0xffd936b8
 1979 07:49:30.453282  Checking segment from ROM address 0xffd936d4
 1980 07:49:30.456283  Loading segment from ROM address 0xffd936b8
 1981 07:49:30.459597    code (compression=0)
 1982 07:49:30.466388    New segment dstaddr 0x30000000 memsize 0x10651f0 srcaddr 0xffd936f0 filesize 0x4d0dc
 1983 07:49:30.476150  Loading Segment: addr: 0x30000000 memsz: 0x00000000010651f0 filesz: 0x000000000004d0dc
 1984 07:49:30.476235  it's not compressed!
 1985 07:49:30.510321  [ 0x30000000, 3004d0dc, 0x310651f0) <- ffd936f0
 1986 07:49:30.517027  Clearing Segment: addr: 0x000000003004d0dc memsz: 0x0000000001018114
 1987 07:49:30.523207  Loading segment from ROM address 0xffd936d4
 1988 07:49:30.523297    Entry Point 0x30000000
 1989 07:49:30.526590  Loaded segments
 1990 07:49:30.529977  BS: BS_PAYLOAD_LOAD run times (exec / console): 31 / 61 ms
 1991 07:49:30.533475  0x00000040: notify_params->phase
 1992 07:49:30.536373  Calling FspNotify: 0xca6833b8
 1993 07:49:30.539713  	0xca6fff6c: notify_params
 1994 07:49:30.539797  POST: 0x95
 1995 07:49:30.544438  POST: 0x95
 1996 07:49:30.547721  FspNotify returned 0x00000000
 1997 07:49:30.547806  0x000000f0: notify_params->phase
 1998 07:49:30.551399  
 1999 07:49:30.551483  Calling FspNotify: 0xca6833b8
 2000 07:49:30.554220  	0xca6fff7c: notify_params
 2001 07:49:30.554303  POST: 0x88
 2002 07:49:30.557686  POST: 0x89
 2003 07:49:30.561076  FspNotify returned 0x00000000
 2004 07:49:30.561161  Lock SMM configuration
 2005 07:49:30.561226  POST: 0xfe
 2006 07:49:30.567467  BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 29 ms
 2007 07:49:30.571091  PSP: Notify that POST is finishing... OK
 2008 07:49:30.577462  BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 4 ms
 2009 07:49:30.577565  POST: 0x7b
 2010 07:49:30.580760  mp_park_aps done after 0 msecs.
 2011 07:49:30.584458  Jumping to boot code at 0x30000000(0xca66a000)
 2012 07:49:30.587374  POST: 0xf8
 2013 07:49:30.594383  CPU0: stack: 0xca6ff000 - 0xca700000, lowest used address 0xca6ff92c, stack used: 1748 bytes
 2014 07:49:30.594467  
 2015 07:49:30.594534  
 2016 07:49:30.594596  
 2017 07:49:30.597230  Starting depthcharge on Morphius...
 2018 07:49:30.597335  
 2019 07:49:30.597675  end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
 2020 07:49:30.597782  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2021 07:49:30.597865  Setting prompt string to ['zork:']
 2022 07:49:30.597943  bootloader-commands: Wait for prompt ['zork:'] (timeout 00:04:44)
 2023 07:49:30.604241  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2024 07:49:30.604327  
 2025 07:49:30.614136  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2026 07:49:30.614221  
 2027 07:49:30.614287  new_rt5682_codec: chip = 0x1A
 2028 07:49:30.614351  
 2029 07:49:30.637069  Looking for NVMe Controller 0x300617a8 @ 00:01:07
 2030 07:49:30.637162  
 2031 07:49:30.637230  Wipe memory regions:
 2032 07:49:30.637293  
 2033 07:49:30.639688  	[0x00000000001000, 0x000000000a0000)
 2034 07:49:30.639768  
 2035 07:49:30.643375  	[0x00000000100000, 0x00000002000000)
 2036 07:49:30.643446  
 2037 07:49:30.651412  	[0x000000021c0000, 0x00000030000000)
 2038 07:49:30.654338  
 2039 07:49:30.764927  	[0x000000310651f0, 0x000000ca527000)
 2040 07:49:30.767745  
 2041 07:49:31.122040  	[0x00000100000000, 0x0000012f340000)
 2042 07:49:31.124993  
 2043 07:49:31.592228  R8152: Initializing
 2044 07:49:31.592507  
 2045 07:49:31.595500  Version 9 (ocp_data = 6010)
 2046 07:49:31.595735  
 2047 07:49:31.599396  R8152: Done initializing
 2048 07:49:31.599771  
 2049 07:49:31.600008  Adding net device
 2050 07:49:31.600220  
 2051 07:49:32.740143  [firmware-zork-13434.B-collabora] Jan 25 2022 09:17:46
 2052 07:49:32.740700  
 2053 07:49:32.741084  
 2054 07:49:32.741514  
 2055 07:49:32.742298  Setting prompt string to ['zork:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2057 07:49:32.844003  zork: tftpboot 192.168.201.1 8119404/tftp-deploy-heqw8oi3/kernel/bzImage 8119404/tftp-deploy-heqw8oi3/kernel/cmdline 8119404/tftp-deploy-heqw8oi3/ramdisk/ramdisk.cpio.gz
 2058 07:49:32.844726  Setting prompt string to 'Starting kernel'
 2059 07:49:32.845203  Setting prompt string to ['Starting kernel']
 2060 07:49:32.845656  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2061 07:49:32.846127  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 2062 07:49:32.849593  tftpboot 192.168.201.1 8119404/tftp-deploy-heqw8oi3/kernel/bzImage 83/kernel/cmdline 8119404/tftp-deploy-heqw8oi3/ramdisk/ramdisk.cpio.gz
 2063 07:49:32.850049  
 2064 07:49:32.850412  Waiting for link
 2065 07:49:32.850728  
 2066 07:49:33.051841  done.
 2067 07:49:33.052380  
 2068 07:49:33.052736  MAC: f4:f5:e8:50:eb:67
 2069 07:49:33.053083  
 2070 07:49:33.055242  Sending DHCP discover... done.
 2071 07:49:33.055687  
 2072 07:49:33.058101  Waiting for reply... done.
 2073 07:49:33.058537  
 2074 07:49:33.061578  Sending DHCP request... done.
 2075 07:49:33.062040  
 2076 07:49:33.066858  Waiting for reply... done.
 2077 07:49:33.067289  
 2078 07:49:33.067630  My ip is 192.168.201.18
 2079 07:49:33.067946  
 2080 07:49:33.069692  The DHCP server ip is 192.168.201.1
 2081 07:49:33.070127  
 2082 07:49:33.076090  TFTP server IP predefined by user: 192.168.201.1
 2083 07:49:33.076525  
 2084 07:49:33.083044  Bootfile predefined by user: 8119404/tftp-deploy-heqw8oi3/kernel/bzImage
 2085 07:49:33.083482  
 2086 07:49:33.086400  Sending tftp read request... done.
 2087 07:49:33.086832  
 2088 07:49:33.090183  Waiting for the transfer... 
 2089 07:49:33.090646  
 2090 07:49:33.399851  00000000 ################################################################
 2091 07:49:33.399998  
 2092 07:49:33.667766  00080000 ################################################################
 2093 07:49:33.667917  
 2094 07:49:33.905555  00100000 ################################################################
 2095 07:49:33.905704  
 2096 07:49:34.157870  00180000 ################################################################
 2097 07:49:34.158026  
 2098 07:49:34.414925  00200000 ################################################################
 2099 07:49:34.415070  
 2100 07:49:34.682228  00280000 ################################################################
 2101 07:49:34.682380  
 2102 07:49:34.936482  00300000 ################################################################
 2103 07:49:34.936624  
 2104 07:49:35.159127  00380000 ################################################################
 2105 07:49:35.159278  
 2107 07:54:14.598772  end: 2.2.4 bootloader-commands (duration 00:04:44) [common]
 2109 07:54:14.599853  depthcharge-retry failed: 1 of 1 attempts. 'bootloader-commands timed out after 284 seconds'
 2111 07:54:14.600685  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2114 07:54:14.602146  end: 2 depthcharge-action (duration 00:05:00) [common]
 2116 07:54:14.603336  Cleaning after the job
 2117 07:54:14.603772  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/ramdisk
 2118 07:54:14.606827  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/kernel
 2119 07:54:14.609407  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119404/tftp-deploy-heqw8oi3/modules
 2120 07:54:14.610393  start: 5.1 power-off (timeout 00:00:30) [common]
 2121 07:54:14.611267  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=lenovo-TPad-C13-Yoga-zork-cbg-1' '--port=1' '--command=off'
 2122 07:54:14.637637  >> Command sent successfully.

 2123 07:54:14.639467  Returned 0 in 0 seconds
 2124 07:54:14.740701  end: 5.1 power-off (duration 00:00:00) [common]
 2126 07:54:14.742540  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2127 07:54:14.743740  Listened to connection for namespace 'common' for up to 1s
 2128 07:54:15.748419  Finalising connection for namespace 'common'
 2129 07:54:15.749304  Disconnecting from shell: Finalise
 2130 07:54:15.749966  00400000 ##########################################################
 2131 07:54:15.851285  end: 5.2 read-feedback (duration 00:00:01) [common]
 2132 07:54:15.851452  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119404
 2133 07:54:15.856219  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119404
 2134 07:54:15.856361  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.