Boot log: asus-C436FA-Flip-hatch

    1 07:54:44.453017  lava-dispatcher, installed at version: 2022.10
    2 07:54:44.453232  start: 0 validate
    3 07:54:44.453385  Start time: 2022-11-25 07:54:44.453377+00:00 (UTC)
    4 07:54:44.453524  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:54:44.453669  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
    6 07:54:44.742527  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:54:44.742736  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:54:45.028421  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:54:45.029112  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
   10 07:54:45.317242  Using caching service: 'http://localhost/cache/?uri=%s'
   11 07:54:45.317503  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 07:54:45.613532  validate duration: 1.16
   14 07:54:45.614162  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 07:54:45.614275  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 07:54:45.614375  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 07:54:45.614483  Not decompressing ramdisk as can be used compressed.
   18 07:54:45.614578  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/initrd.cpio.gz
   19 07:54:45.614652  saving as /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/ramdisk/initrd.cpio.gz
   20 07:54:45.614721  total size: 5431606 (5MB)
   21 07:54:45.615937  progress   0% (0MB)
   22 07:54:45.617553  progress   5% (0MB)
   23 07:54:45.619049  progress  10% (0MB)
   24 07:54:45.620555  progress  15% (0MB)
   25 07:54:45.622188  progress  20% (1MB)
   26 07:54:45.623641  progress  25% (1MB)
   27 07:54:45.625076  progress  30% (1MB)
   28 07:54:45.626738  progress  35% (1MB)
   29 07:54:45.628206  progress  40% (2MB)
   30 07:54:45.629653  progress  45% (2MB)
   31 07:54:45.631101  progress  50% (2MB)
   32 07:54:45.632707  progress  55% (2MB)
   33 07:54:45.634144  progress  60% (3MB)
   34 07:54:45.635589  progress  65% (3MB)
   35 07:54:45.637195  progress  70% (3MB)
   36 07:54:45.638630  progress  75% (3MB)
   37 07:54:45.640071  progress  80% (4MB)
   38 07:54:45.641516  progress  85% (4MB)
   39 07:54:45.643141  progress  90% (4MB)
   40 07:54:45.644577  progress  95% (4MB)
   41 07:54:45.646036  progress 100% (5MB)
   42 07:54:45.646317  5MB downloaded in 0.03s (163.97MB/s)
   43 07:54:45.646489  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 07:54:45.646780  end: 1.1 download-retry (duration 00:00:00) [common]
   46 07:54:45.646882  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 07:54:45.646982  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 07:54:45.647101  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 07:54:45.647177  saving as /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/kernel/bzImage
   50 07:54:45.647246  total size: 7131024 (6MB)
   51 07:54:45.647315  No compression specified
   52 07:54:45.648457  progress   0% (0MB)
   53 07:54:45.650396  progress   5% (0MB)
   54 07:54:45.652429  progress  10% (0MB)
   55 07:54:45.654439  progress  15% (1MB)
   56 07:54:45.656463  progress  20% (1MB)
   57 07:54:45.658452  progress  25% (1MB)
   58 07:54:45.660429  progress  30% (2MB)
   59 07:54:45.662410  progress  35% (2MB)
   60 07:54:45.664408  progress  40% (2MB)
   61 07:54:45.666176  progress  45% (3MB)
   62 07:54:45.668115  progress  50% (3MB)
   63 07:54:45.670050  progress  55% (3MB)
   64 07:54:45.671989  progress  60% (4MB)
   65 07:54:45.673923  progress  65% (4MB)
   66 07:54:45.675850  progress  70% (4MB)
   67 07:54:45.677771  progress  75% (5MB)
   68 07:54:45.679715  progress  80% (5MB)
   69 07:54:45.681474  progress  85% (5MB)
   70 07:54:45.683404  progress  90% (6MB)
   71 07:54:45.685335  progress  95% (6MB)
   72 07:54:45.687311  progress 100% (6MB)
   73 07:54:45.687575  6MB downloaded in 0.04s (168.65MB/s)
   74 07:54:45.687739  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 07:54:45.688030  end: 1.2 download-retry (duration 00:00:00) [common]
   77 07:54:45.688131  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 07:54:45.688229  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 07:54:45.688350  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/full.rootfs.tar.xz
   80 07:54:45.688427  saving as /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/nfsrootfs/full.rootfs.tar
   81 07:54:45.688498  total size: 133303528 (127MB)
   82 07:54:45.688568  Using unxz to decompress xz
   83 07:54:45.692182  progress   0% (0MB)
   84 07:54:46.063576  progress   5% (6MB)
   85 07:54:46.460638  progress  10% (12MB)
   86 07:54:46.779349  progress  15% (19MB)
   87 07:54:47.004358  progress  20% (25MB)
   88 07:54:47.283929  progress  25% (31MB)
   89 07:54:47.661826  progress  30% (38MB)
   90 07:54:48.046294  progress  35% (44MB)
   91 07:54:48.484699  progress  40% (50MB)
   92 07:54:48.916909  progress  45% (57MB)
   93 07:54:49.326356  progress  50% (63MB)
   94 07:54:49.760802  progress  55% (69MB)
   95 07:54:50.162097  progress  60% (76MB)
   96 07:54:50.564628  progress  65% (82MB)
   97 07:54:50.964538  progress  70% (89MB)
   98 07:54:51.368110  progress  75% (95MB)
   99 07:54:51.853303  progress  80% (101MB)
  100 07:54:52.332966  progress  85% (108MB)
  101 07:54:52.639223  progress  90% (114MB)
  102 07:54:53.020817  progress  95% (120MB)
  103 07:54:53.460346  progress 100% (127MB)
  104 07:54:53.465717  127MB downloaded in 7.78s (16.35MB/s)
  105 07:54:53.465996  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 07:54:53.466291  end: 1.3 download-retry (duration 00:00:08) [common]
  108 07:54:53.466397  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 07:54:53.466497  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 07:54:53.466623  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 07:54:53.466704  saving as /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/modules/modules.tar
  112 07:54:53.466784  total size: 52060 (0MB)
  113 07:54:53.466857  Using unxz to decompress xz
  114 07:54:53.470283  progress  62% (0MB)
  115 07:54:53.470687  progress 100% (0MB)
  116 07:54:53.474287  0MB downloaded in 0.01s (6.62MB/s)
  117 07:54:53.474516  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 07:54:53.474814  end: 1.4 download-retry (duration 00:00:00) [common]
  120 07:54:53.474924  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 07:54:53.475030  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 07:54:54.842713  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119429/extract-nfsrootfs-vqv0iywb
  123 07:54:54.842955  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  124 07:54:54.843070  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  125 07:54:54.843219  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t
  126 07:54:54.843332  makedir: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin
  127 07:54:54.843428  makedir: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/tests
  128 07:54:54.843530  makedir: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/results
  129 07:54:54.843639  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-add-keys
  130 07:54:54.843786  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-add-sources
  131 07:54:54.843913  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-background-process-start
  132 07:54:54.844039  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-background-process-stop
  133 07:54:54.844163  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-common-functions
  134 07:54:54.844285  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-echo-ipv4
  135 07:54:54.844407  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-install-packages
  136 07:54:54.844527  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-installed-packages
  137 07:54:54.844645  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-os-build
  138 07:54:54.844765  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-probe-channel
  139 07:54:54.844886  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-probe-ip
  140 07:54:54.845005  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-target-ip
  141 07:54:54.845123  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-target-mac
  142 07:54:54.845242  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-target-storage
  143 07:54:54.845366  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-case
  144 07:54:54.845487  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-event
  145 07:54:54.845607  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-feedback
  146 07:54:54.845727  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-raise
  147 07:54:54.845845  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-reference
  148 07:54:54.845965  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-runner
  149 07:54:54.846084  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-set
  150 07:54:54.846202  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-test-shell
  151 07:54:54.846323  Updating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-install-packages (oe)
  152 07:54:54.846449  Updating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/bin/lava-installed-packages (oe)
  153 07:54:54.846556  Creating /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/environment
  154 07:54:54.846652  LAVA metadata
  155 07:54:54.846724  - LAVA_JOB_ID=8119429
  156 07:54:54.847114  - LAVA_DISPATCHER_IP=192.168.201.1
  157 07:54:54.847224  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  158 07:54:54.847297  skipped lava-vland-overlay
  159 07:54:54.847381  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 07:54:54.847470  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  161 07:54:54.847538  skipped lava-multinode-overlay
  162 07:54:54.847619  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 07:54:54.847708  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  164 07:54:54.847787  Loading test definitions
  165 07:54:54.847888  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  166 07:54:54.847968  Using /lava-8119429 at stage 0
  167 07:54:54.848255  uuid=8119429_1.5.2.3.1 testdef=None
  168 07:54:54.848355  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  169 07:54:54.848451  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  170 07:54:54.848968  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  172 07:54:54.849224  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  173 07:54:54.849852  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  175 07:54:54.850117  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  176 07:54:54.850714  runner path: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/0/tests/0_dmesg test_uuid 8119429_1.5.2.3.1
  177 07:54:54.850885  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  179 07:54:54.851148  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  180 07:54:54.851230  Using /lava-8119429 at stage 1
  181 07:54:54.851497  uuid=8119429_1.5.2.3.5 testdef=None
  182 07:54:54.851595  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  183 07:54:54.851692  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  184 07:54:54.852184  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  186 07:54:54.852435  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  187 07:54:54.853067  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  189 07:54:54.853332  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  190 07:54:54.853942  runner path: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/1/tests/1_bootrr test_uuid 8119429_1.5.2.3.5
  191 07:54:54.854098  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  193 07:54:54.854334  Creating lava-test-runner.conf files
  194 07:54:54.854404  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/0 for stage 0
  195 07:54:54.854494  - 0_dmesg
  196 07:54:54.854576  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119429/lava-overlay-h5lsjl9t/lava-8119429/1 for stage 1
  197 07:54:54.854665  - 1_bootrr
  198 07:54:54.854877  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  199 07:54:54.854976  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  200 07:54:54.860932  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  201 07:54:54.861047  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  202 07:54:54.861144  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  203 07:54:54.861241  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  204 07:54:54.861337  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  205 07:54:54.976452  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  206 07:54:54.976833  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  207 07:54:54.976960  extracting modules file /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119429/extract-nfsrootfs-vqv0iywb
  208 07:54:54.981385  extracting modules file /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119429/extract-overlay-ramdisk-5deddcm9/ramdisk
  209 07:54:54.985558  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  210 07:54:54.985683  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  211 07:54:54.985777  [common] Applying overlay to NFS
  212 07:54:54.985858  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119429/compress-overlay-a18p6_oo/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119429/extract-nfsrootfs-vqv0iywb
  213 07:54:54.989992  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  214 07:54:54.990117  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  215 07:54:54.990221  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  216 07:54:54.990325  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  217 07:54:54.990413  Building ramdisk /var/lib/lava/dispatcher/tmp/8119429/extract-overlay-ramdisk-5deddcm9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119429/extract-overlay-ramdisk-5deddcm9/ramdisk
  218 07:54:55.027151  >> 24546 blocks

  219 07:54:55.567441  rename /var/lib/lava/dispatcher/tmp/8119429/extract-overlay-ramdisk-5deddcm9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/ramdisk/ramdisk.cpio.gz
  220 07:54:55.567889  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  221 07:54:55.568023  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  222 07:54:55.568141  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  223 07:54:55.568248  No mkimage arch provided, not using FIT.
  224 07:54:55.568351  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  225 07:54:55.568446  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  226 07:54:55.568556  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  227 07:54:55.568662  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  228 07:54:55.568756  No LXC device requested
  229 07:54:55.568847  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  230 07:54:55.568945  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  231 07:54:55.569038  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  232 07:54:55.569115  Checking files for TFTP limit of 4294967296 bytes.
  233 07:54:55.569536  end: 1 tftp-deploy (duration 00:00:10) [common]
  234 07:54:55.569653  start: 2 depthcharge-action (timeout 00:05:00) [common]
  235 07:54:55.569759  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  236 07:54:55.569902  substitutions:
  237 07:54:55.569980  - {DTB}: None
  238 07:54:55.570052  - {INITRD}: 8119429/tftp-deploy-epqotmxw/ramdisk/ramdisk.cpio.gz
  239 07:54:55.570120  - {KERNEL}: 8119429/tftp-deploy-epqotmxw/kernel/bzImage
  240 07:54:55.570188  - {LAVA_MAC}: None
  241 07:54:55.570253  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119429/extract-nfsrootfs-vqv0iywb
  242 07:54:55.570320  - {NFS_SERVER_IP}: 192.168.201.1
  243 07:54:55.570385  - {PRESEED_CONFIG}: None
  244 07:54:55.570448  - {PRESEED_LOCAL}: None
  245 07:54:55.570511  - {RAMDISK}: 8119429/tftp-deploy-epqotmxw/ramdisk/ramdisk.cpio.gz
  246 07:54:55.570575  - {ROOT_PART}: None
  247 07:54:55.570637  - {ROOT}: None
  248 07:54:55.570703  - {SERVER_IP}: 192.168.201.1
  249 07:54:55.570774  - {TEE}: None
  250 07:54:55.570839  Parsed boot commands:
  251 07:54:55.570902  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  252 07:54:55.571075  Parsed boot commands: tftpboot 192.168.201.1 8119429/tftp-deploy-epqotmxw/kernel/bzImage 8119429/tftp-deploy-epqotmxw/kernel/cmdline 8119429/tftp-deploy-epqotmxw/ramdisk/ramdisk.cpio.gz
  253 07:54:55.571181  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  254 07:54:55.571283  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  255 07:54:55.571385  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  256 07:54:55.571482  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  257 07:54:55.571564  Not connected, no need to disconnect.
  258 07:54:55.571651  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  259 07:54:55.571745  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  260 07:54:55.571826  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  261 07:54:55.574827  Setting prompt string to ['lava-test: # ']
  262 07:54:55.575152  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  263 07:54:55.575270  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  264 07:54:55.575386  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  265 07:54:55.575490  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  266 07:54:55.575689  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  267 07:54:55.596903  >> Command sent successfully.

  268 07:54:55.599065  Returned 0 in 0 seconds
  269 07:54:55.699894  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  271 07:54:55.700259  end: 2.2.2 reset-device (duration 00:00:00) [common]
  272 07:54:55.700369  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  273 07:54:55.700471  Setting prompt string to 'Starting depthcharge on Helios...'
  274 07:54:55.700546  Changing prompt to 'Starting depthcharge on Helios...'
  275 07:54:55.700624  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  276 07:54:55.700926  [Enter `^Ec?' for help]
  277 07:55:02.113960  
  278 07:55:02.114561  
  279 07:55:02.124123  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  280 07:55:02.127537  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  281 07:55:02.134315  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  282 07:55:02.137652  CPU: AES supported, TXT NOT supported, VT supported
  283 07:55:02.144530  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  284 07:55:02.147850  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  285 07:55:02.154162  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  286 07:55:02.157598  VBOOT: Loading verstage.
  287 07:55:02.161047  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  288 07:55:02.167355  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  289 07:55:02.171075  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  290 07:55:02.174559  CBFS @ c08000 size 3f8000
  291 07:55:02.180510  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  292 07:55:02.184031  CBFS: Locating 'fallback/verstage'
  293 07:55:02.187502  CBFS: Found @ offset 10fb80 size 1072c
  294 07:55:02.191172  
  295 07:55:02.191713  
  296 07:55:02.200897  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  297 07:55:02.215328  Probing TPM: . done!
  298 07:55:02.218578  TPM ready after 0 ms
  299 07:55:02.222056  Connected to device vid:did:rid of 1ae0:0028:00
  300 07:55:02.232066  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  301 07:55:02.235649  Initialized TPM device CR50 revision 0
  302 07:55:02.278142  tlcl_send_startup: Startup return code is 0
  303 07:55:02.278693  TPM: setup succeeded
  304 07:55:02.291068  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  305 07:55:02.294882  Chrome EC: UHEPI supported
  306 07:55:02.297927  Phase 1
  307 07:55:02.301271  FMAP: area GBB found @ c05000 (12288 bytes)
  308 07:55:02.307672  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  309 07:55:02.308265  Phase 2
  310 07:55:02.310864  
  311 07:55:02.311360  Phase 3
  312 07:55:02.314316  FMAP: area GBB found @ c05000 (12288 bytes)
  313 07:55:02.320984  VB2:vb2_report_dev_firmware() This is developer signed firmware
  314 07:55:02.327807  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  315 07:55:02.331240  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  316 07:55:02.337524  VB2:vb2_verify_keyblock() Checking keyblock signature...
  317 07:55:02.353454  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  318 07:55:02.356752  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  319 07:55:02.363043  VB2:vb2_verify_fw_preamble() Verifying preamble.
  320 07:55:02.367685  Phase 4
  321 07:55:02.371024  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
  322 07:55:02.377606  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  323 07:55:02.556457  VB2:vb2_rsa_verify_digest() Digest check failed!
  324 07:55:02.559300  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  325 07:55:02.562760  
  326 07:55:02.562848  Saving nvdata
  327 07:55:02.566205  Reboot requested (10020007)
  328 07:55:02.569509  board_reset() called!
  329 07:55:02.569595  full_reset() called!
  330 07:55:07.080776  
  331 07:55:07.080939  
  332 07:55:07.090909  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  333 07:55:07.093705  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  334 07:55:07.100583  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  335 07:55:07.103961  CPU: AES supported, TXT NOT supported, VT supported
  336 07:55:07.110696  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  337 07:55:07.113630  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  338 07:55:07.120269  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  339 07:55:07.123679  VBOOT: Loading verstage.
  340 07:55:07.127089  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  341 07:55:07.134032  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  342 07:55:07.137194  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  343 07:55:07.140056  CBFS @ c08000 size 3f8000
  344 07:55:07.146731  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  345 07:55:07.150202  CBFS: Locating 'fallback/verstage'
  346 07:55:07.153639  CBFS: Found @ offset 10fb80 size 1072c
  347 07:55:07.157042  
  348 07:55:07.157138  
  349 07:55:07.167374  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  350 07:55:07.181323  Probing TPM: . done!
  351 07:55:07.184825  TPM ready after 0 ms
  352 07:55:07.188228  Connected to device vid:did:rid of 1ae0:0028:00
  353 07:55:07.198387  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  354 07:55:07.201823  Initialized TPM device CR50 revision 0
  355 07:55:07.244565  tlcl_send_startup: Startup return code is 0
  356 07:55:07.244692  TPM: setup succeeded
  357 07:55:07.257111  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  358 07:55:07.261300  Chrome EC: UHEPI supported
  359 07:55:07.264061  Phase 1
  360 07:55:07.267442  FMAP: area GBB found @ c05000 (12288 bytes)
  361 07:55:07.274443  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  362 07:55:07.280656  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  363 07:55:07.284080  Recovery requested (1009000e)
  364 07:55:07.289840  Saving nvdata
  365 07:55:07.295622  tlcl_extend: response is 0
  366 07:55:07.304671  tlcl_extend: response is 0
  367 07:55:07.311661  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  368 07:55:07.314990  CBFS @ c08000 size 3f8000
  369 07:55:07.321781  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  370 07:55:07.325214  CBFS: Locating 'fallback/romstage'
  371 07:55:07.328101  CBFS: Found @ offset 80 size 145fc
  372 07:55:07.331503  Accumulated console time in verstage 98 ms
  373 07:55:07.331599  
  374 07:55:07.331677  
  375 07:55:07.344948  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  376 07:55:07.351638  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  377 07:55:07.355109  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  378 07:55:07.357932  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  379 07:55:07.364788  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  380 07:55:07.368338  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  381 07:55:07.371660  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  382 07:55:07.374987  TCO_STS:   0000 0000
  383 07:55:07.377921  GEN_PMCON: e0015238 00000200
  384 07:55:07.381403  GBLRST_CAUSE: 00000000 00000000
  385 07:55:07.381502  prev_sleep_state 5
  386 07:55:07.384807  Boot Count incremented to 36528
  387 07:55:07.391615  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  388 07:55:07.394887  CBFS @ c08000 size 3f8000
  389 07:55:07.401164  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  390 07:55:07.401261  CBFS: Locating 'fspm.bin'
  391 07:55:07.404587  CBFS: Found @ offset 5ffc0 size 71000
  392 07:55:07.407969  
  393 07:55:07.411441  Chrome EC: UHEPI supported
  394 07:55:07.417718  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  395 07:55:07.421620  Probing TPM:  done!
  396 07:55:07.428387  Connected to device vid:did:rid of 1ae0:0028:00
  397 07:55:07.437869  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  398 07:55:07.444321  Initialized TPM device CR50 revision 0
  399 07:55:07.452831  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  400 07:55:07.459627  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  401 07:55:07.462960  MRC cache found, size 1948
  402 07:55:07.466417  bootmode is set to: 2
  403 07:55:07.469376  PRMRR disabled by config.
  404 07:55:07.469473  SPD INDEX = 1
  405 07:55:07.476217  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  406 07:55:07.479728  CBFS @ c08000 size 3f8000
  407 07:55:07.486156  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  408 07:55:07.486254  CBFS: Locating 'spd.bin'
  409 07:55:07.489600  CBFS: Found @ offset 5fb80 size 400
  410 07:55:07.492570  SPD: module type is LPDDR3
  411 07:55:07.496425  SPD: module part is 
  412 07:55:07.502665  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  413 07:55:07.506063  SPD: device width 4 bits, bus width 8 bits
  414 07:55:07.509526  SPD: module size is 4096 MB (per channel)
  415 07:55:07.512366  memory slot: 0 configuration done.
  416 07:55:07.515844  memory slot: 2 configuration done.
  417 07:55:07.567540  CBMEM:
  418 07:55:07.570833  IMD: root @ 99fff000 254 entries.
  419 07:55:07.573602  IMD: root @ 99ffec00 62 entries.
  420 07:55:07.577097  External stage cache:
  421 07:55:07.580511  IMD: root @ 9abff000 254 entries.
  422 07:55:07.583475  IMD: root @ 9abfec00 62 entries.
  423 07:55:07.586907  Chrome EC: clear events_b mask to 0x0000000020004000
  424 07:55:07.602740  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  425 07:55:07.616675  tlcl_write: response is 0
  426 07:55:07.625664  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  427 07:55:07.631931  MRC: TPM MRC hash updated successfully.
  428 07:55:07.632031  2 DIMMs found
  429 07:55:07.635462  SMM Memory Map
  430 07:55:07.638861  SMRAM       : 0x9a000000 0x1000000
  431 07:55:07.642260   Subregion 0: 0x9a000000 0xa00000
  432 07:55:07.645054   Subregion 1: 0x9aa00000 0x200000
  433 07:55:07.648386   Subregion 2: 0x9ac00000 0x400000
  434 07:55:07.651744  top_of_ram = 0x9a000000
  435 07:55:07.655181  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  436 07:55:07.661983  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  437 07:55:07.665062  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  438 07:55:07.672049  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  439 07:55:07.675508  CBFS @ c08000 size 3f8000
  440 07:55:07.678298  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  441 07:55:07.682148  CBFS: Locating 'fallback/postcar'
  442 07:55:07.684950  CBFS: Found @ offset 107000 size 4b44
  443 07:55:07.691882  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  444 07:55:07.703822  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  445 07:55:07.707334  Processing 180 relocs. Offset value of 0x97c0c000
  446 07:55:07.715980  Accumulated console time in romstage 286 ms
  447 07:55:07.716065  
  448 07:55:07.716139  
  449 07:55:07.725639  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  450 07:55:07.732393  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  451 07:55:07.735259  CBFS @ c08000 size 3f8000
  452 07:55:07.738741  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  453 07:55:07.742115  
  454 07:55:07.745089  CBFS: Locating 'fallback/ramstage'
  455 07:55:07.748470  CBFS: Found @ offset 43380 size 1b9e8
  456 07:55:07.755153  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  457 07:55:07.787483  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  458 07:55:07.790977  Processing 3976 relocs. Offset value of 0x98db0000
  459 07:55:07.797841  Accumulated console time in postcar 52 ms
  460 07:55:07.797933  
  461 07:55:07.798007  
  462 07:55:07.807354  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  463 07:55:07.814286  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  464 07:55:07.817252  WARNING: RO_VPD is uninitialized or empty.
  465 07:55:07.820625  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  466 07:55:07.827547  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  467 07:55:07.827649  Normal boot.
  468 07:55:07.834405  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  469 07:55:07.837220  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  470 07:55:07.840684  CBFS @ c08000 size 3f8000
  471 07:55:07.847390  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  472 07:55:07.850832  CBFS: Locating 'cpu_microcode_blob.bin'
  473 07:55:07.854244  CBFS: Found @ offset 14700 size 2ec00
  474 07:55:07.857508  microcode: sig=0x806ec pf=0x4 revision=0xc9
  475 07:55:07.860376  Skip microcode update
  476 07:55:07.863782  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  477 07:55:07.867191  
  478 07:55:07.867285  CBFS @ c08000 size 3f8000
  479 07:55:07.874006  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  480 07:55:07.876971  CBFS: Locating 'fsps.bin'
  481 07:55:07.880592  CBFS: Found @ offset d1fc0 size 35000
  482 07:55:07.906189  Detected 4 core, 8 thread CPU.
  483 07:55:07.908985  Setting up SMI for CPU
  484 07:55:07.912300  IED base = 0x9ac00000
  485 07:55:07.912388  IED size = 0x00400000
  486 07:55:07.915803  Will perform SMM setup.
  487 07:55:07.922175  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  488 07:55:07.928823  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  489 07:55:07.932164  Processing 16 relocs. Offset value of 0x00030000
  490 07:55:07.936160  Attempting to start 7 APs
  491 07:55:07.939570  Waiting for 10ms after sending INIT.
  492 07:55:07.955413  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
  493 07:55:07.955504  done.
  494 07:55:07.958730  AP: slot 6 apic_id 6.
  495 07:55:07.962267  AP: slot 7 apic_id 7.
  496 07:55:07.962358  AP: slot 1 apic_id 2.
  497 07:55:07.965552  AP: slot 3 apic_id 3.
  498 07:55:07.969075  AP: slot 4 apic_id 4.
  499 07:55:07.969165  AP: slot 5 apic_id 5.
  500 07:55:07.975284  Waiting for 2nd SIPI to complete...done.
  501 07:55:07.982335  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  502 07:55:07.985079  Processing 13 relocs. Offset value of 0x00038000
  503 07:55:07.988434  
  504 07:55:07.991939  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  505 07:55:07.998849  Installing SMM handler to 0x9a000000
  506 07:55:08.005056  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  507 07:55:08.008554  Processing 658 relocs. Offset value of 0x9a010000
  508 07:55:08.011955  
  509 07:55:08.018327  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  510 07:55:08.021733  Processing 13 relocs. Offset value of 0x9a008000
  511 07:55:08.028621  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  512 07:55:08.034829  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  513 07:55:08.041540  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  514 07:55:08.045094  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  515 07:55:08.051726  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  516 07:55:08.058050  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  517 07:55:08.061315  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  518 07:55:08.068253  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  519 07:55:08.071627  Clearing SMI status registers
  520 07:55:08.075089  SMI_STS: PM1 
  521 07:55:08.075187  PM1_STS: PWRBTN 
  522 07:55:08.078524  TCO_STS: SECOND_TO 
  523 07:55:08.081435  New SMBASE 0x9a000000
  524 07:55:08.084951  In relocation handler: CPU 0
  525 07:55:08.088363  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  526 07:55:08.091917  Writing SMRR. base = 0x9a000006, mask=0xff000800
  527 07:55:08.094720  Relocation complete.
  528 07:55:08.098185  New SMBASE 0x99fff800
  529 07:55:08.098282  In relocation handler: CPU 2
  530 07:55:08.101669  
  531 07:55:08.104577  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  532 07:55:08.108458  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 07:55:08.111314  Relocation complete.
  534 07:55:08.114689  New SMBASE 0x99fff400
  535 07:55:08.114793  In relocation handler: CPU 3
  536 07:55:08.121552  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  537 07:55:08.124410  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 07:55:08.127944  Relocation complete.
  539 07:55:08.128040  New SMBASE 0x99fffc00
  540 07:55:08.131324  
  541 07:55:08.131420  In relocation handler: CPU 1
  542 07:55:08.138178  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  543 07:55:08.141483  Writing SMRR. base = 0x9a000006, mask=0xff000800
  544 07:55:08.144956  Relocation complete.
  545 07:55:08.145052  New SMBASE 0x99ffe800
  546 07:55:08.147762  In relocation handler: CPU 6
  547 07:55:08.154554  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  548 07:55:08.157895  Writing SMRR. base = 0x9a000006, mask=0xff000800
  549 07:55:08.161196  Relocation complete.
  550 07:55:08.161288  New SMBASE 0x99ffe400
  551 07:55:08.164599  In relocation handler: CPU 7
  552 07:55:08.167841  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  553 07:55:08.171202  
  554 07:55:08.174587  Writing SMRR. base = 0x9a000006, mask=0xff000800
  555 07:55:08.178003  Relocation complete.
  556 07:55:08.178109  New SMBASE 0x99ffec00
  557 07:55:08.180800  In relocation handler: CPU 5
  558 07:55:08.184276  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  559 07:55:08.191124  Writing SMRR. base = 0x9a000006, mask=0xff000800
  560 07:55:08.193983  Relocation complete.
  561 07:55:08.194066  New SMBASE 0x99fff000
  562 07:55:08.197537  In relocation handler: CPU 4
  563 07:55:08.200964  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  564 07:55:08.207897  Writing SMRR. base = 0x9a000006, mask=0xff000800
  565 07:55:08.207989  Relocation complete.
  566 07:55:08.211148  
  567 07:55:08.211228  Initializing CPU #0
  568 07:55:08.213967  CPU: vendor Intel device 806ec
  569 07:55:08.217491  CPU: family 06, model 8e, stepping 0c
  570 07:55:08.220923  Clearing out pending MCEs
  571 07:55:08.223879  Setting up local APIC...
  572 07:55:08.223966   apic_id: 0x00 done.
  573 07:55:08.227300  
  574 07:55:08.227382  Turbo is available but hidden
  575 07:55:08.230864  Turbo is available and visible
  576 07:55:08.234249  VMX status: enabled
  577 07:55:08.237116  IA32_FEATURE_CONTROL status: locked
  578 07:55:08.240390  Skip microcode update
  579 07:55:08.240479  CPU #0 initialized
  580 07:55:08.243766  Initializing CPU #2
  581 07:55:08.247225  Initializing CPU #7
  582 07:55:08.247315  Initializing CPU #6
  583 07:55:08.250754  CPU: vendor Intel device 806ec
  584 07:55:08.254260  CPU: family 06, model 8e, stepping 0c
  585 07:55:08.257072  CPU: vendor Intel device 806ec
  586 07:55:08.260600  CPU: family 06, model 8e, stepping 0c
  587 07:55:08.263847  Clearing out pending MCEs
  588 07:55:08.267362  Clearing out pending MCEs
  589 07:55:08.270216  Initializing CPU #4
  590 07:55:08.270351  Initializing CPU #5
  591 07:55:08.273568  CPU: vendor Intel device 806ec
  592 07:55:08.276978  CPU: family 06, model 8e, stepping 0c
  593 07:55:08.280398  CPU: vendor Intel device 806ec
  594 07:55:08.283869  CPU: family 06, model 8e, stepping 0c
  595 07:55:08.287307  Clearing out pending MCEs
  596 07:55:08.290702  Clearing out pending MCEs
  597 07:55:08.293607  Setting up local APIC...
  598 07:55:08.297344  CPU: vendor Intel device 806ec
  599 07:55:08.300739  CPU: family 06, model 8e, stepping 0c
  600 07:55:08.303584  Clearing out pending MCEs
  601 07:55:08.303955  Initializing CPU #1
  602 07:55:08.307111  Initializing CPU #3
  603 07:55:08.310516  CPU: vendor Intel device 806ec
  604 07:55:08.313848  CPU: family 06, model 8e, stepping 0c
  605 07:55:08.317300  CPU: vendor Intel device 806ec
  606 07:55:08.320597  CPU: family 06, model 8e, stepping 0c
  607 07:55:08.323589  Clearing out pending MCEs
  608 07:55:08.327039  Clearing out pending MCEs
  609 07:55:08.327410  Setting up local APIC...
  610 07:55:08.330490  Setting up local APIC...
  611 07:55:08.333444   apic_id: 0x02 done.
  612 07:55:08.336875  Setting up local APIC...
  613 07:55:08.337143   apic_id: 0x04 done.
  614 07:55:08.340122  Setting up local APIC...
  615 07:55:08.343424  Setting up local APIC...
  616 07:55:08.343691   apic_id: 0x01 done.
  617 07:55:08.346840   apic_id: 0x05 done.
  618 07:55:08.349891  VMX status: enabled
  619 07:55:08.350158  VMX status: enabled
  620 07:55:08.353284  IA32_FEATURE_CONTROL status: locked
  621 07:55:08.356752  IA32_FEATURE_CONTROL status: locked
  622 07:55:08.360321  Skip microcode update
  623 07:55:08.363112  Skip microcode update
  624 07:55:08.363382  CPU #4 initialized
  625 07:55:08.366461  CPU #5 initialized
  626 07:55:08.369820  VMX status: enabled
  627 07:55:08.370090   apic_id: 0x07 done.
  628 07:55:08.373167  Setting up local APIC...
  629 07:55:08.376602  VMX status: enabled
  630 07:55:08.376872   apic_id: 0x03 done.
  631 07:55:08.380003  IA32_FEATURE_CONTROL status: locked
  632 07:55:08.383473  VMX status: enabled
  633 07:55:08.386489  Skip microcode update
  634 07:55:08.389853  IA32_FEATURE_CONTROL status: locked
  635 07:55:08.390195  CPU #1 initialized
  636 07:55:08.393186  Skip microcode update
  637 07:55:08.396780  IA32_FEATURE_CONTROL status: locked
  638 07:55:08.400278  CPU #3 initialized
  639 07:55:08.400820  Skip microcode update
  640 07:55:08.403214   apic_id: 0x06 done.
  641 07:55:08.406567  VMX status: enabled
  642 07:55:08.407076  VMX status: enabled
  643 07:55:08.409816  IA32_FEATURE_CONTROL status: locked
  644 07:55:08.413284  IA32_FEATURE_CONTROL status: locked
  645 07:55:08.416666  Skip microcode update
  646 07:55:08.420049  Skip microcode update
  647 07:55:08.420567  CPU #7 initialized
  648 07:55:08.423451  CPU #6 initialized
  649 07:55:08.423922  CPU #2 initialized
  650 07:55:08.427013  
  651 07:55:08.429818  bsp_do_flight_plan done after 452 msecs.
  652 07:55:08.433365  CPU: frequency set to 4200 MHz
  653 07:55:08.433909  Enabling SMIs.
  654 07:55:08.436749  Locking SMM.
  655 07:55:08.449989  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 07:55:08.453404  CBFS @ c08000 size 3f8000
  657 07:55:08.459521  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 07:55:08.459764  CBFS: Locating 'vbt.bin'
  659 07:55:08.462963  CBFS: Found @ offset 5f5c0 size 499
  660 07:55:08.469645  Found a VBT of 4608 bytes after decompression
  661 07:55:08.650626  Display FSP Version Info HOB
  662 07:55:08.654027  Reference Code - CPU = 9.0.1e.30
  663 07:55:08.657598  uCode Version = 0.0.0.ca
  664 07:55:08.660826  TXT ACM version = ff.ff.ff.ffff
  665 07:55:08.663668  Display FSP Version Info HOB
  666 07:55:08.667126  Reference Code - ME = 9.0.1e.30
  667 07:55:08.670615  MEBx version = 0.0.0.0
  668 07:55:08.673882  ME Firmware Version = Consumer SKU
  669 07:55:08.677303  Display FSP Version Info HOB
  670 07:55:08.680705  Reference Code - CML PCH = 9.0.1e.30
  671 07:55:08.684184  PCH-CRID Status = Disabled
  672 07:55:08.686887  PCH-CRID Original Value = ff.ff.ff.ffff
  673 07:55:08.690418  PCH-CRID New Value = ff.ff.ff.ffff
  674 07:55:08.693783  OPROM - RST - RAID = ff.ff.ff.ffff
  675 07:55:08.696804  ChipsetInit Base Version = ff.ff.ff.ffff
  676 07:55:08.700256  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 07:55:08.703756  Display FSP Version Info HOB
  678 07:55:08.710532  Reference Code - SA - System Agent = 9.0.1e.30
  679 07:55:08.713427  Reference Code - MRC = 0.7.1.6c
  680 07:55:08.714030  SA - PCIe Version = 9.0.1e.30
  681 07:55:08.716693  SA-CRID Status = Disabled
  682 07:55:08.720325  SA-CRID Original Value = 0.0.0.c
  683 07:55:08.723650  SA-CRID New Value = 0.0.0.c
  684 07:55:08.726519  OPROM - VBIOS = ff.ff.ff.ffff
  685 07:55:08.729780  RTC Init
  686 07:55:08.733491  Set power on after power failure.
  687 07:55:08.734024  Disabling Deep S3
  688 07:55:08.736847  Disabling Deep S3
  689 07:55:08.737358  Disabling Deep S4
  690 07:55:08.740320  Disabling Deep S4
  691 07:55:08.740875  Disabling Deep S5
  692 07:55:08.743333  
  693 07:55:08.743869  Disabling Deep S5
  694 07:55:08.749930  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
  695 07:55:08.750480  Enumerating buses...
  696 07:55:08.756652  Show all devs... Before device enumeration.
  697 07:55:08.757199  Root Device: enabled 1
  698 07:55:08.760085  
  699 07:55:08.760574  CPU_CLUSTER: 0: enabled 1
  700 07:55:08.763354  DOMAIN: 0000: enabled 1
  701 07:55:08.766336  APIC: 00: enabled 1
  702 07:55:08.767017  PCI: 00:00.0: enabled 1
  703 07:55:08.769735  PCI: 00:02.0: enabled 1
  704 07:55:08.772996  PCI: 00:04.0: enabled 0
  705 07:55:08.776511  PCI: 00:05.0: enabled 0
  706 07:55:08.776959  PCI: 00:12.0: enabled 1
  707 07:55:08.779754  PCI: 00:12.5: enabled 0
  708 07:55:08.783106  PCI: 00:12.6: enabled 0
  709 07:55:08.783556  PCI: 00:14.0: enabled 1
  710 07:55:08.786532  
  711 07:55:08.786880  PCI: 00:14.1: enabled 0
  712 07:55:08.789436  PCI: 00:14.3: enabled 1
  713 07:55:08.792872  PCI: 00:14.5: enabled 0
  714 07:55:08.793112  PCI: 00:15.0: enabled 1
  715 07:55:08.796214  PCI: 00:15.1: enabled 1
  716 07:55:08.799648  PCI: 00:15.2: enabled 0
  717 07:55:08.802405  PCI: 00:15.3: enabled 0
  718 07:55:08.802599  PCI: 00:16.0: enabled 1
  719 07:55:08.805666  PCI: 00:16.1: enabled 0
  720 07:55:08.809209  PCI: 00:16.2: enabled 0
  721 07:55:08.812569  PCI: 00:16.3: enabled 0
  722 07:55:08.812775  PCI: 00:16.4: enabled 0
  723 07:55:08.815965  PCI: 00:16.5: enabled 0
  724 07:55:08.819288  PCI: 00:17.0: enabled 1
  725 07:55:08.822114  PCI: 00:19.0: enabled 1
  726 07:55:08.822212  PCI: 00:19.1: enabled 0
  727 07:55:08.825463  PCI: 00:19.2: enabled 0
  728 07:55:08.828983  PCI: 00:1a.0: enabled 0
  729 07:55:08.829081  PCI: 00:1c.0: enabled 0
  730 07:55:08.832405  PCI: 00:1c.1: enabled 0
  731 07:55:08.835800  PCI: 00:1c.2: enabled 0
  732 07:55:08.838689  PCI: 00:1c.3: enabled 0
  733 07:55:08.838785  PCI: 00:1c.4: enabled 0
  734 07:55:08.842170  PCI: 00:1c.5: enabled 0
  735 07:55:08.845624  PCI: 00:1c.6: enabled 0
  736 07:55:08.848462  PCI: 00:1c.7: enabled 0
  737 07:55:08.848550  PCI: 00:1d.0: enabled 1
  738 07:55:08.852324  PCI: 00:1d.1: enabled 0
  739 07:55:08.855676  PCI: 00:1d.2: enabled 0
  740 07:55:08.859084  PCI: 00:1d.3: enabled 0
  741 07:55:08.859167  PCI: 00:1d.4: enabled 0
  742 07:55:08.862197  PCI: 00:1d.5: enabled 1
  743 07:55:08.865355  PCI: 00:1e.0: enabled 1
  744 07:55:08.865452  PCI: 00:1e.1: enabled 0
  745 07:55:08.868974  PCI: 00:1e.2: enabled 1
  746 07:55:08.872302  PCI: 00:1e.3: enabled 1
  747 07:55:08.875036  PCI: 00:1f.0: enabled 1
  748 07:55:08.875130  PCI: 00:1f.1: enabled 1
  749 07:55:08.878552  PCI: 00:1f.2: enabled 1
  750 07:55:08.881730  PCI: 00:1f.3: enabled 1
  751 07:55:08.885069  PCI: 00:1f.4: enabled 1
  752 07:55:08.885176  PCI: 00:1f.5: enabled 1
  753 07:55:08.888485  PCI: 00:1f.6: enabled 0
  754 07:55:08.891886  USB0 port 0: enabled 1
  755 07:55:08.891976  I2C: 00:15: enabled 1
  756 07:55:08.895325  I2C: 00:5d: enabled 1
  757 07:55:08.898307  GENERIC: 0.0: enabled 1
  758 07:55:08.901664  I2C: 00:1a: enabled 1
  759 07:55:08.901767  I2C: 00:38: enabled 1
  760 07:55:08.905010  I2C: 00:39: enabled 1
  761 07:55:08.908333  I2C: 00:3a: enabled 1
  762 07:55:08.908420  I2C: 00:3b: enabled 1
  763 07:55:08.911890  PCI: 00:00.0: enabled 1
  764 07:55:08.915452  SPI: 00: enabled 1
  765 07:55:08.915535  SPI: 01: enabled 1
  766 07:55:08.918205  PNP: 0c09.0: enabled 1
  767 07:55:08.921679  USB2 port 0: enabled 1
  768 07:55:08.921776  USB2 port 1: enabled 1
  769 07:55:08.925072  USB2 port 2: enabled 0
  770 07:55:08.928467  USB2 port 3: enabled 0
  771 07:55:08.928552  USB2 port 5: enabled 0
  772 07:55:08.931782  USB2 port 6: enabled 1
  773 07:55:08.935164  USB2 port 9: enabled 1
  774 07:55:08.935254  USB3 port 0: enabled 1
  775 07:55:08.938093  
  776 07:55:08.938185  USB3 port 1: enabled 1
  777 07:55:08.941516  USB3 port 2: enabled 1
  778 07:55:08.944987  USB3 port 3: enabled 1
  779 07:55:08.945086  USB3 port 4: enabled 0
  780 07:55:08.947897  APIC: 02: enabled 1
  781 07:55:08.951849  APIC: 01: enabled 1
  782 07:55:08.951932  APIC: 03: enabled 1
  783 07:55:08.954720  APIC: 04: enabled 1
  784 07:55:08.954813  APIC: 05: enabled 1
  785 07:55:08.958123  APIC: 06: enabled 1
  786 07:55:08.961553  APIC: 07: enabled 1
  787 07:55:08.961646  Compare with tree...
  788 07:55:08.965036  Root Device: enabled 1
  789 07:55:08.968276   CPU_CLUSTER: 0: enabled 1
  790 07:55:08.968364    APIC: 00: enabled 1
  791 07:55:08.971696    APIC: 02: enabled 1
  792 07:55:08.974555    APIC: 01: enabled 1
  793 07:55:08.974654    APIC: 03: enabled 1
  794 07:55:08.978043  
  795 07:55:08.978149    APIC: 04: enabled 1
  796 07:55:08.981306    APIC: 05: enabled 1
  797 07:55:08.981404    APIC: 06: enabled 1
  798 07:55:08.984679  
  799 07:55:08.984795    APIC: 07: enabled 1
  800 07:55:08.988119   DOMAIN: 0000: enabled 1
  801 07:55:08.991628    PCI: 00:00.0: enabled 1
  802 07:55:08.994943    PCI: 00:02.0: enabled 1
  803 07:55:08.995044    PCI: 00:04.0: enabled 0
  804 07:55:08.998065    PCI: 00:05.0: enabled 0
  805 07:55:09.001413    PCI: 00:12.0: enabled 1
  806 07:55:09.004895    PCI: 00:12.5: enabled 0
  807 07:55:09.004992    PCI: 00:12.6: enabled 0
  808 07:55:09.008211  
  809 07:55:09.008306    PCI: 00:14.0: enabled 1
  810 07:55:09.011678     USB0 port 0: enabled 1
  811 07:55:09.014421      USB2 port 0: enabled 1
  812 07:55:09.017927      USB2 port 1: enabled 1
  813 07:55:09.021269      USB2 port 2: enabled 0
  814 07:55:09.021367      USB2 port 3: enabled 0
  815 07:55:09.024804      USB2 port 5: enabled 0
  816 07:55:09.027547      USB2 port 6: enabled 1
  817 07:55:09.030826      USB2 port 9: enabled 1
  818 07:55:09.034343      USB3 port 0: enabled 1
  819 07:55:09.034439      USB3 port 1: enabled 1
  820 07:55:09.037752  
  821 07:55:09.037845      USB3 port 2: enabled 1
  822 07:55:09.041181      USB3 port 3: enabled 1
  823 07:55:09.044239      USB3 port 4: enabled 0
  824 07:55:09.047476    PCI: 00:14.1: enabled 0
  825 07:55:09.050905    PCI: 00:14.3: enabled 1
  826 07:55:09.051006    PCI: 00:14.5: enabled 0
  827 07:55:09.054478    PCI: 00:15.0: enabled 1
  828 07:55:09.057196     I2C: 00:15: enabled 1
  829 07:55:09.060551    PCI: 00:15.1: enabled 1
  830 07:55:09.060653     I2C: 00:5d: enabled 1
  831 07:55:09.064031     GENERIC: 0.0: enabled 1
  832 07:55:09.067414    PCI: 00:15.2: enabled 0
  833 07:55:09.070674    PCI: 00:15.3: enabled 0
  834 07:55:09.074146    PCI: 00:16.0: enabled 1
  835 07:55:09.074252    PCI: 00:16.1: enabled 0
  836 07:55:09.077476    PCI: 00:16.2: enabled 0
  837 07:55:09.080880    PCI: 00:16.3: enabled 0
  838 07:55:09.084243    PCI: 00:16.4: enabled 0
  839 07:55:09.087075    PCI: 00:16.5: enabled 0
  840 07:55:09.087161    PCI: 00:17.0: enabled 1
  841 07:55:09.090449    PCI: 00:19.0: enabled 1
  842 07:55:09.093969     I2C: 00:1a: enabled 1
  843 07:55:09.097375     I2C: 00:38: enabled 1
  844 07:55:09.100295     I2C: 00:39: enabled 1
  845 07:55:09.100378     I2C: 00:3a: enabled 1
  846 07:55:09.103781     I2C: 00:3b: enabled 1
  847 07:55:09.107197    PCI: 00:19.1: enabled 0
  848 07:55:09.110527    PCI: 00:19.2: enabled 0
  849 07:55:09.110613    PCI: 00:1a.0: enabled 0
  850 07:55:09.113459    PCI: 00:1c.0: enabled 0
  851 07:55:09.116935    PCI: 00:1c.1: enabled 0
  852 07:55:09.120463    PCI: 00:1c.2: enabled 0
  853 07:55:09.123825    PCI: 00:1c.3: enabled 0
  854 07:55:09.123925    PCI: 00:1c.4: enabled 0
  855 07:55:09.127151    PCI: 00:1c.5: enabled 0
  856 07:55:09.130127    PCI: 00:1c.6: enabled 0
  857 07:55:09.133487    PCI: 00:1c.7: enabled 0
  858 07:55:09.136846    PCI: 00:1d.0: enabled 1
  859 07:55:09.136931    PCI: 00:1d.1: enabled 0
  860 07:55:09.140181    PCI: 00:1d.2: enabled 0
  861 07:55:09.143132    PCI: 00:1d.3: enabled 0
  862 07:55:09.146477    PCI: 00:1d.4: enabled 0
  863 07:55:09.149961    PCI: 00:1d.5: enabled 1
  864 07:55:09.150056     PCI: 00:00.0: enabled 1
  865 07:55:09.153429    PCI: 00:1e.0: enabled 1
  866 07:55:09.156635    PCI: 00:1e.1: enabled 0
  867 07:55:09.160034    PCI: 00:1e.2: enabled 1
  868 07:55:09.160138     SPI: 00: enabled 1
  869 07:55:09.163390    PCI: 00:1e.3: enabled 1
  870 07:55:09.166868     SPI: 01: enabled 1
  871 07:55:09.169724    PCI: 00:1f.0: enabled 1
  872 07:55:09.173158     PNP: 0c09.0: enabled 1
  873 07:55:09.173241    PCI: 00:1f.1: enabled 1
  874 07:55:09.176625    PCI: 00:1f.2: enabled 1
  875 07:55:09.179621    PCI: 00:1f.3: enabled 1
  876 07:55:09.182895    PCI: 00:1f.4: enabled 1
  877 07:55:09.182983    PCI: 00:1f.5: enabled 1
  878 07:55:09.186382  
  879 07:55:09.186467    PCI: 00:1f.6: enabled 0
  880 07:55:09.189709  Root Device scanning...
  881 07:55:09.193141  scan_static_bus for Root Device
  882 07:55:09.196121  CPU_CLUSTER: 0 enabled
  883 07:55:09.196206  DOMAIN: 0000 enabled
  884 07:55:09.199388  DOMAIN: 0000 scanning...
  885 07:55:09.202870  PCI: pci_scan_bus for bus 00
  886 07:55:09.206374  PCI: 00:00.0 [8086/0000] ops
  887 07:55:09.209765  PCI: 00:00.0 [8086/9b61] enabled
  888 07:55:09.213098  PCI: 00:02.0 [8086/0000] bus ops
  889 07:55:09.216571  PCI: 00:02.0 [8086/9b41] enabled
  890 07:55:09.219679  PCI: 00:04.0 [8086/1903] disabled
  891 07:55:09.223000  PCI: 00:08.0 [8086/1911] enabled
  892 07:55:09.226531  PCI: 00:12.0 [8086/02f9] enabled
  893 07:55:09.229353  PCI: 00:14.0 [8086/0000] bus ops
  894 07:55:09.232697  PCI: 00:14.0 [8086/02ed] enabled
  895 07:55:09.236202  PCI: 00:14.2 [8086/02ef] enabled
  896 07:55:09.239515  PCI: 00:14.3 [8086/02f0] enabled
  897 07:55:09.242996  PCI: 00:15.0 [8086/0000] bus ops
  898 07:55:09.246506  PCI: 00:15.0 [8086/02e8] enabled
  899 07:55:09.249375  PCI: 00:15.1 [8086/0000] bus ops
  900 07:55:09.252862  PCI: 00:15.1 [8086/02e9] enabled
  901 07:55:09.256378  PCI: 00:16.0 [8086/0000] ops
  902 07:55:09.259319  PCI: 00:16.0 [8086/02e0] enabled
  903 07:55:09.262655  PCI: 00:17.0 [8086/0000] ops
  904 07:55:09.266088  PCI: 00:17.0 [8086/02d3] enabled
  905 07:55:09.269427  PCI: 00:19.0 [8086/0000] bus ops
  906 07:55:09.272854  PCI: 00:19.0 [8086/02c5] enabled
  907 07:55:09.276279  PCI: 00:1d.0 [8086/0000] bus ops
  908 07:55:09.279129  PCI: 00:1d.0 [8086/02b0] enabled
  909 07:55:09.285802  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  910 07:55:09.289287  PCI: 00:1e.0 [8086/0000] ops
  911 07:55:09.292623  PCI: 00:1e.0 [8086/02a8] enabled
  912 07:55:09.295952  PCI: 00:1e.2 [8086/0000] bus ops
  913 07:55:09.299397  PCI: 00:1e.2 [8086/02aa] enabled
  914 07:55:09.302765  PCI: 00:1e.3 [8086/0000] bus ops
  915 07:55:09.305696  PCI: 00:1e.3 [8086/02ab] enabled
  916 07:55:09.309258  PCI: 00:1f.0 [8086/0000] bus ops
  917 07:55:09.312562  PCI: 00:1f.0 [8086/0284] enabled
  918 07:55:09.315904  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  919 07:55:09.322285  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  920 07:55:09.325933  PCI: 00:1f.3 [8086/0000] bus ops
  921 07:55:09.328757  PCI: 00:1f.3 [8086/02c8] enabled
  922 07:55:09.332142  PCI: 00:1f.4 [8086/0000] bus ops
  923 07:55:09.335578  PCI: 00:1f.4 [8086/02a3] enabled
  924 07:55:09.339078  PCI: 00:1f.5 [8086/0000] bus ops
  925 07:55:09.341958  PCI: 00:1f.5 [8086/02a4] enabled
  926 07:55:09.345368  PCI: Leftover static devices:
  927 07:55:09.345464  PCI: 00:05.0
  928 07:55:09.348836  PCI: 00:12.5
  929 07:55:09.348931  PCI: 00:12.6
  930 07:55:09.352250  PCI: 00:14.1
  931 07:55:09.352348  PCI: 00:14.5
  932 07:55:09.352423  PCI: 00:15.2
  933 07:55:09.355714  PCI: 00:15.3
  934 07:55:09.355810  PCI: 00:16.1
  935 07:55:09.359099  PCI: 00:16.2
  936 07:55:09.359196  PCI: 00:16.3
  937 07:55:09.359271  PCI: 00:16.4
  938 07:55:09.361935  PCI: 00:16.5
  939 07:55:09.362031  PCI: 00:19.1
  940 07:55:09.365297  PCI: 00:19.2
  941 07:55:09.365393  PCI: 00:1a.0
  942 07:55:09.365469  PCI: 00:1c.0
  943 07:55:09.368649  PCI: 00:1c.1
  944 07:55:09.368746  PCI: 00:1c.2
  945 07:55:09.372252  PCI: 00:1c.3
  946 07:55:09.372348  PCI: 00:1c.4
  947 07:55:09.372423  PCI: 00:1c.5
  948 07:55:09.375598  
  949 07:55:09.375694  PCI: 00:1c.6
  950 07:55:09.375770  PCI: 00:1c.7
  951 07:55:09.379183  PCI: 00:1d.1
  952 07:55:09.379279  PCI: 00:1d.2
  953 07:55:09.381835  PCI: 00:1d.3
  954 07:55:09.381931  PCI: 00:1d.4
  955 07:55:09.382007  PCI: 00:1d.5
  956 07:55:09.385258  PCI: 00:1e.1
  957 07:55:09.385355  PCI: 00:1f.1
  958 07:55:09.388655  PCI: 00:1f.2
  959 07:55:09.388750  PCI: 00:1f.6
  960 07:55:09.392108  PCI: Check your devicetree.cb.
  961 07:55:09.395442  PCI: 00:02.0 scanning...
  962 07:55:09.398948  scan_generic_bus for PCI: 00:02.0
  963 07:55:09.401826  scan_generic_bus for PCI: 00:02.0 done
  964 07:55:09.408677  scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
  965 07:55:09.408775  PCI: 00:14.0 scanning...
  966 07:55:09.412223  scan_static_bus for PCI: 00:14.0
  967 07:55:09.415474  USB0 port 0 enabled
  968 07:55:09.418952  USB0 port 0 scanning...
  969 07:55:09.421803  scan_static_bus for USB0 port 0
  970 07:55:09.421899  USB2 port 0 enabled
  971 07:55:09.425295  
  972 07:55:09.425391  USB2 port 1 enabled
  973 07:55:09.428692  USB2 port 2 disabled
  974 07:55:09.428788  USB2 port 3 disabled
  975 07:55:09.432096  USB2 port 5 disabled
  976 07:55:09.435041  USB2 port 6 enabled
  977 07:55:09.435137  USB2 port 9 enabled
  978 07:55:09.438326  USB3 port 0 enabled
  979 07:55:09.441672  USB3 port 1 enabled
  980 07:55:09.441768  USB3 port 2 enabled
  981 07:55:09.445166  USB3 port 3 enabled
  982 07:55:09.445262  USB3 port 4 disabled
  983 07:55:09.448653  USB2 port 0 scanning...
  984 07:55:09.452085  scan_static_bus for USB2 port 0
  985 07:55:09.454916  scan_static_bus for USB2 port 0 done
  986 07:55:09.461903  scan_bus: scanning of bus USB2 port 0 took 9692 usecs
  987 07:55:09.465262  USB2 port 1 scanning...
  988 07:55:09.468095  scan_static_bus for USB2 port 1
  989 07:55:09.471383  scan_static_bus for USB2 port 1 done
  990 07:55:09.474857  scan_bus: scanning of bus USB2 port 1 took 9700 usecs
  991 07:55:09.478121  USB2 port 6 scanning...
  992 07:55:09.481778  scan_static_bus for USB2 port 6
  993 07:55:09.484967  scan_static_bus for USB2 port 6 done
  994 07:55:09.491745  scan_bus: scanning of bus USB2 port 6 took 9700 usecs
  995 07:55:09.494548  USB2 port 9 scanning...
  996 07:55:09.498507  scan_static_bus for USB2 port 9
  997 07:55:09.501372  scan_static_bus for USB2 port 9 done
  998 07:55:09.508484  scan_bus: scanning of bus USB2 port 9 took 9691 usecs
  999 07:55:09.508581  USB3 port 0 scanning...
 1000 07:55:09.511142  scan_static_bus for USB3 port 0
 1001 07:55:09.514656  scan_static_bus for USB3 port 0 done
 1002 07:55:09.521500  scan_bus: scanning of bus USB3 port 0 took 9699 usecs
 1003 07:55:09.524897  USB3 port 1 scanning...
 1004 07:55:09.527841  scan_static_bus for USB3 port 1
 1005 07:55:09.531227  scan_static_bus for USB3 port 1 done
 1006 07:55:09.537981  scan_bus: scanning of bus USB3 port 1 took 9702 usecs
 1007 07:55:09.538079  USB3 port 2 scanning...
 1008 07:55:09.541594  scan_static_bus for USB3 port 2
 1009 07:55:09.544430  scan_static_bus for USB3 port 2 done
 1010 07:55:09.551197  scan_bus: scanning of bus USB3 port 2 took 9695 usecs
 1011 07:55:09.554641  USB3 port 3 scanning...
 1012 07:55:09.557622  scan_static_bus for USB3 port 3
 1013 07:55:09.561532  scan_static_bus for USB3 port 3 done
 1014 07:55:09.567753  scan_bus: scanning of bus USB3 port 3 took 9702 usecs
 1015 07:55:09.571146  scan_static_bus for USB0 port 0 done
 1016 07:55:09.574450  scan_bus: scanning of bus USB0 port 0 took 155273 usecs
 1017 07:55:09.577955  scan_static_bus for PCI: 00:14.0 done
 1018 07:55:09.581223  
 1019 07:55:09.584761  scan_bus: scanning of bus PCI: 00:14.0 took 172893 usecs
 1020 07:55:09.587946  PCI: 00:15.0 scanning...
 1021 07:55:09.590797  scan_generic_bus for PCI: 00:15.0
 1022 07:55:09.594283  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1023 07:55:09.597655  scan_generic_bus for PCI: 00:15.0 done
 1024 07:55:09.601046  
 1025 07:55:09.604450  scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
 1026 07:55:09.607715  PCI: 00:15.1 scanning...
 1027 07:55:09.610646  scan_generic_bus for PCI: 00:15.1
 1028 07:55:09.614110  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1029 07:55:09.620878  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1030 07:55:09.624379  scan_generic_bus for PCI: 00:15.1 done
 1031 07:55:09.627623  scan_bus: scanning of bus PCI: 00:15.1 took 18594 usecs
 1032 07:55:09.631095  PCI: 00:19.0 scanning...
 1033 07:55:09.634474  scan_generic_bus for PCI: 00:19.0
 1034 07:55:09.640679  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1035 07:55:09.644101  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1036 07:55:09.647296  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1037 07:55:09.650725  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1038 07:55:09.654166  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1039 07:55:09.661141  scan_generic_bus for PCI: 00:19.0 done
 1040 07:55:09.664569  scan_bus: scanning of bus PCI: 00:19.0 took 30721 usecs
 1041 07:55:09.667299  PCI: 00:1d.0 scanning...
 1042 07:55:09.670664  do_pci_scan_bridge for PCI: 00:1d.0
 1043 07:55:09.673836  PCI: pci_scan_bus for bus 01
 1044 07:55:09.677412  PCI: 01:00.0 [1c5c/1327] enabled
 1045 07:55:09.680801  Enabling Common Clock Configuration
 1046 07:55:09.687328  L1 Sub-State supported from root port 29
 1047 07:55:09.687426  L1 Sub-State Support = 0xf
 1048 07:55:09.690662  CommonModeRestoreTime = 0x28
 1049 07:55:09.697429  Power On Value = 0x16, Power On Scale = 0x0
 1050 07:55:09.697526  ASPM: Enabled L1
 1051 07:55:09.704066  scan_bus: scanning of bus PCI: 00:1d.0 took 32766 usecs
 1052 07:55:09.707051  PCI: 00:1e.2 scanning...
 1053 07:55:09.710360  scan_generic_bus for PCI: 00:1e.2
 1054 07:55:09.713896  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1055 07:55:09.717337  scan_generic_bus for PCI: 00:1e.2 done
 1056 07:55:09.724060  scan_bus: scanning of bus PCI: 00:1e.2 took 13996 usecs
 1057 07:55:09.724165  PCI: 00:1e.3 scanning...
 1058 07:55:09.726899  scan_generic_bus for PCI: 00:1e.3
 1059 07:55:09.730380  
 1060 07:55:09.733927  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1061 07:55:09.737192  scan_generic_bus for PCI: 00:1e.3 done
 1062 07:55:09.740678  scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
 1063 07:55:09.743498  
 1064 07:55:09.743594  PCI: 00:1f.0 scanning...
 1065 07:55:09.746961  scan_static_bus for PCI: 00:1f.0
 1066 07:55:09.750227  PNP: 0c09.0 enabled
 1067 07:55:09.753688  scan_static_bus for PCI: 00:1f.0 done
 1068 07:55:09.760540  scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
 1069 07:55:09.763418  PCI: 00:1f.3 scanning...
 1070 07:55:09.766799  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
 1071 07:55:09.770191  PCI: 00:1f.4 scanning...
 1072 07:55:09.773555  scan_generic_bus for PCI: 00:1f.4
 1073 07:55:09.776917  scan_generic_bus for PCI: 00:1f.4 done
 1074 07:55:09.783721  scan_bus: scanning of bus PCI: 00:1f.4 took 10172 usecs
 1075 07:55:09.786515  PCI: 00:1f.5 scanning...
 1076 07:55:09.790067  scan_generic_bus for PCI: 00:1f.5
 1077 07:55:09.793460  scan_generic_bus for PCI: 00:1f.5 done
 1078 07:55:09.799772  scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
 1079 07:55:09.803218  scan_bus: scanning of bus DOMAIN: 0000 took 604725 usecs
 1080 07:55:09.806658  
 1081 07:55:09.810089  scan_static_bus for Root Device done
 1082 07:55:09.813589  scan_bus: scanning of bus Root Device took 624559 usecs
 1083 07:55:09.816472  done
 1084 07:55:09.816568  Chrome EC: UHEPI supported
 1085 07:55:09.823207  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1086 07:55:09.829971  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1087 07:55:09.836738  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1088 07:55:09.843582  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1089 07:55:09.846507  SPI flash protection: WPSW=0 SRP0=0
 1090 07:55:09.853185  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1091 07:55:09.856548  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
 1092 07:55:09.859957  found VGA at PCI: 00:02.0
 1093 07:55:09.863386  Setting up VGA for PCI: 00:02.0
 1094 07:55:09.866374  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1095 07:55:09.869717  
 1096 07:55:09.873137  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1097 07:55:09.876516  Allocating resources...
 1098 07:55:09.876613  Reading resources...
 1099 07:55:09.882710  Root Device read_resources bus 0 link: 0
 1100 07:55:09.886084  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1101 07:55:09.892854  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1102 07:55:09.896336  DOMAIN: 0000 read_resources bus 0 link: 0
 1103 07:55:09.902571  PCI: 00:14.0 read_resources bus 0 link: 0
 1104 07:55:09.905881  USB0 port 0 read_resources bus 0 link: 0
 1105 07:55:09.914450  USB0 port 0 read_resources bus 0 link: 0 done
 1106 07:55:09.917393  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1107 07:55:09.924943  PCI: 00:15.0 read_resources bus 1 link: 0
 1108 07:55:09.928310  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1109 07:55:09.934766  PCI: 00:15.1 read_resources bus 2 link: 0
 1110 07:55:09.938239  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1111 07:55:09.945533  PCI: 00:19.0 read_resources bus 3 link: 0
 1112 07:55:09.952311  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1113 07:55:09.955672  PCI: 00:1d.0 read_resources bus 1 link: 0
 1114 07:55:09.961976  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1115 07:55:09.965440  PCI: 00:1e.2 read_resources bus 4 link: 0
 1116 07:55:09.972085  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1117 07:55:09.975470  PCI: 00:1e.3 read_resources bus 5 link: 0
 1118 07:55:09.982208  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1119 07:55:09.985202  PCI: 00:1f.0 read_resources bus 0 link: 0
 1120 07:55:09.991792  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1121 07:55:09.998726  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1122 07:55:10.001634  Root Device read_resources bus 0 link: 0 done
 1123 07:55:10.004952  Done reading resources.
 1124 07:55:10.008323  Show resources in subtree (Root Device)...After reading.
 1125 07:55:10.015186   Root Device child on link 0 CPU_CLUSTER: 0
 1126 07:55:10.018086    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1127 07:55:10.018182     APIC: 00
 1128 07:55:10.021593     APIC: 02
 1129 07:55:10.021689     APIC: 01
 1130 07:55:10.025032     APIC: 03
 1131 07:55:10.025128     APIC: 04
 1132 07:55:10.025203     APIC: 05
 1133 07:55:10.028397     APIC: 06
 1134 07:55:10.028493     APIC: 07
 1135 07:55:10.031780    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1136 07:55:10.041612    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1137 07:55:10.097632    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1138 07:55:10.097762     PCI: 00:00.0
 1139 07:55:10.098784     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1140 07:55:10.099079     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1141 07:55:10.099354     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1142 07:55:10.099622     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1143 07:55:10.102715     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1144 07:55:10.109488     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1145 07:55:10.119148     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1146 07:55:10.129419     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1147 07:55:10.139169     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1148 07:55:10.145810     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1149 07:55:10.155698     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1150 07:55:10.165345     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1151 07:55:10.175839     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1152 07:55:10.185390     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1153 07:55:10.195643     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1154 07:55:10.201882     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1155 07:55:10.205272     PCI: 00:02.0
 1156 07:55:10.215338     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1157 07:55:10.225044     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1158 07:55:10.235227     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1159 07:55:10.235331     PCI: 00:04.0
 1160 07:55:10.238276     PCI: 00:08.0
 1161 07:55:10.248138     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1162 07:55:10.248237     PCI: 00:12.0
 1163 07:55:10.258478     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1164 07:55:10.264810     PCI: 00:14.0 child on link 0 USB0 port 0
 1165 07:55:10.274669     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1166 07:55:10.278277      USB0 port 0 child on link 0 USB2 port 0
 1167 07:55:10.278405       USB2 port 0
 1168 07:55:10.281486       USB2 port 1
 1169 07:55:10.281622       USB2 port 2
 1170 07:55:10.284783       USB2 port 3
 1171 07:55:10.288592       USB2 port 5
 1172 07:55:10.288746       USB2 port 6
 1173 07:55:10.291803       USB2 port 9
 1174 07:55:10.291977       USB3 port 0
 1175 07:55:10.295217       USB3 port 1
 1176 07:55:10.295392       USB3 port 2
 1177 07:55:10.298119       USB3 port 3
 1178 07:55:10.298321       USB3 port 4
 1179 07:55:10.301532     PCI: 00:14.2
 1180 07:55:10.311858     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1181 07:55:10.321443     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1182 07:55:10.321895     PCI: 00:14.3
 1183 07:55:10.331674     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1184 07:55:10.338138     PCI: 00:15.0 child on link 0 I2C: 01:15
 1185 07:55:10.347987     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1186 07:55:10.348557      I2C: 01:15
 1187 07:55:10.351379     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1188 07:55:10.361556     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1189 07:55:10.364412      I2C: 02:5d
 1190 07:55:10.364857      GENERIC: 0.0
 1191 07:55:10.367927     PCI: 00:16.0
 1192 07:55:10.377664     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1193 07:55:10.378113     PCI: 00:17.0
 1194 07:55:10.387805     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1195 07:55:10.397767     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1196 07:55:10.404030     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1197 07:55:10.414215     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1198 07:55:10.420401     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1199 07:55:10.430692     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1200 07:55:10.433607     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1201 07:55:10.443814     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1202 07:55:10.447324      I2C: 03:1a
 1203 07:55:10.447582      I2C: 03:38
 1204 07:55:10.450302      I2C: 03:39
 1205 07:55:10.450554      I2C: 03:3a
 1206 07:55:10.453551      I2C: 03:3b
 1207 07:55:10.457045     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1208 07:55:10.466706     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1209 07:55:10.476617     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1210 07:55:10.483423     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1211 07:55:10.486823      PCI: 01:00.0
 1212 07:55:10.496748      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1213 07:55:10.497248     PCI: 00:1e.0
 1214 07:55:10.509942     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1215 07:55:10.520039     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1216 07:55:10.523453     PCI: 00:1e.2 child on link 0 SPI: 00
 1217 07:55:10.533279     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1218 07:55:10.533803      SPI: 00
 1219 07:55:10.539542     PCI: 00:1e.3 child on link 0 SPI: 01
 1220 07:55:10.549742     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1221 07:55:10.550228      SPI: 01
 1222 07:55:10.553078     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1223 07:55:10.562896     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1224 07:55:10.572627     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1225 07:55:10.572832      PNP: 0c09.0
 1226 07:55:10.582916      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1227 07:55:10.583109     PCI: 00:1f.3
 1228 07:55:10.592404     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1229 07:55:10.602547     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1230 07:55:10.605878     PCI: 00:1f.4
 1231 07:55:10.615599     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1232 07:55:10.622552     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1233 07:55:10.625315     PCI: 00:1f.5
 1234 07:55:10.635656     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1235 07:55:10.642464  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1236 07:55:10.648666  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1237 07:55:10.655428  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1238 07:55:10.658800  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1239 07:55:10.662270  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1240 07:55:10.665101  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1241 07:55:10.668539  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1242 07:55:10.675472  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1243 07:55:10.682032  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1244 07:55:10.688340  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1245 07:55:10.698464  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1246 07:55:10.705217  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1247 07:55:10.708127  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1248 07:55:10.718241  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1249 07:55:10.721392  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1250 07:55:10.724767  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1251 07:55:10.731717  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1252 07:55:10.734547  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1253 07:55:10.741595  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1254 07:55:10.744843  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1255 07:55:10.751114  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1256 07:55:10.754697  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1257 07:55:10.761003  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1258 07:55:10.764312  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1259 07:55:10.771117  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1260 07:55:10.774554  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1261 07:55:10.781055  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1262 07:55:10.784339  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1263 07:55:10.787742  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1264 07:55:10.791154  
 1265 07:55:10.794550  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1266 07:55:10.797843  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1267 07:55:10.804173  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1268 07:55:10.807507  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1269 07:55:10.814530  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1270 07:55:10.817340  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1271 07:55:10.823914  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1272 07:55:10.827282  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1273 07:55:10.837578  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1274 07:55:10.840602  avoid_fixed_resources: DOMAIN: 0000
 1275 07:55:10.847473  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1276 07:55:10.850763  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1277 07:55:10.853697  
 1278 07:55:10.860531  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1279 07:55:10.867312  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1280 07:55:10.873595  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1281 07:55:10.884139  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1282 07:55:10.890445  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1283 07:55:10.896636  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1284 07:55:10.906817  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1285 07:55:10.913466  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1286 07:55:10.920302  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1287 07:55:10.926473  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1288 07:55:10.929805  Setting resources...
 1289 07:55:10.936847  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1290 07:55:10.940302  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1291 07:55:10.943274  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1292 07:55:10.949930  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1293 07:55:10.953442  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1294 07:55:10.959840  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1295 07:55:10.966226  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1296 07:55:10.969580  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1297 07:55:10.979716  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1298 07:55:10.982738  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1299 07:55:10.989445  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1300 07:55:10.992904  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1301 07:55:10.999650  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1302 07:55:11.002938  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1303 07:55:11.009301  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1304 07:55:11.012711  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1305 07:55:11.019121  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1306 07:55:11.022591  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1307 07:55:11.029224  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1308 07:55:11.032751  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1309 07:55:11.039008  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1310 07:55:11.042501  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1311 07:55:11.046133  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1312 07:55:11.052723  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1313 07:55:11.055798  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1314 07:55:11.062183  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1315 07:55:11.065537  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1316 07:55:11.072409  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1317 07:55:11.075246  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1318 07:55:11.082056  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1319 07:55:11.085576  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1320 07:55:11.091821  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1321 07:55:11.098596  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1322 07:55:11.105221  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1323 07:55:11.112175  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1324 07:55:11.121786  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1325 07:55:11.125187  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1326 07:55:11.131947  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1327 07:55:11.138190  Root Device assign_resources, bus 0 link: 0
 1328 07:55:11.141584  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1329 07:55:11.151844  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1330 07:55:11.158131  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1331 07:55:11.167973  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1332 07:55:11.174714  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1333 07:55:11.184554  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1334 07:55:11.191486  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1335 07:55:11.194885  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1336 07:55:11.201135  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1337 07:55:11.208015  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1338 07:55:11.217771  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1339 07:55:11.224722  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1340 07:55:11.234675  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1341 07:55:11.238174  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1342 07:55:11.244419  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1343 07:55:11.251512  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1344 07:55:11.254128  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1345 07:55:11.261134  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1346 07:55:11.267965  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1347 07:55:11.277613  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1348 07:55:11.284234  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1349 07:55:11.291128  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1350 07:55:11.300950  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1351 07:55:11.307594  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1352 07:55:11.313862  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1353 07:55:11.324206  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1354 07:55:11.327511  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1355 07:55:11.334373  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1356 07:55:11.340681  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1357 07:55:11.350683  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1358 07:55:11.360296  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1359 07:55:11.363810  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1360 07:55:11.370544  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1361 07:55:11.377456  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1362 07:55:11.383906  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1363 07:55:11.393872  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1364 07:55:11.397397  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1365 07:55:11.403747  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1366 07:55:11.410471  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1367 07:55:11.413791  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1368 07:55:11.417068  
 1369 07:55:11.420260  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1370 07:55:11.423224  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1371 07:55:11.430538  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1372 07:55:11.433836  LPC: Trying to open IO window from 800 size 1ff
 1373 07:55:11.443449  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1374 07:55:11.450265  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1375 07:55:11.460141  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1376 07:55:11.466703  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1377 07:55:11.473481  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1378 07:55:11.476555  Root Device assign_resources, bus 0 link: 0
 1379 07:55:11.479986  Done setting resources.
 1380 07:55:11.486709  Show resources in subtree (Root Device)...After assigning values.
 1381 07:55:11.489637   Root Device child on link 0 CPU_CLUSTER: 0
 1382 07:55:11.493172    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1383 07:55:11.496677     APIC: 00
 1384 07:55:11.496877     APIC: 02
 1385 07:55:11.497035     APIC: 01
 1386 07:55:11.500246     APIC: 03
 1387 07:55:11.500447     APIC: 04
 1388 07:55:11.503072     APIC: 05
 1389 07:55:11.503309     APIC: 06
 1390 07:55:11.503497     APIC: 07
 1391 07:55:11.509918    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1392 07:55:11.519387    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1393 07:55:11.529815    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1394 07:55:11.529915     PCI: 00:00.0
 1395 07:55:11.533047  
 1396 07:55:11.539228     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1397 07:55:11.549574     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1398 07:55:11.559385     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1399 07:55:11.568914     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1400 07:55:11.579091     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1401 07:55:11.589157     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1402 07:55:11.595655     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1403 07:55:11.605444     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1404 07:55:11.615603     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1405 07:55:11.625304     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1406 07:55:11.635056     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1407 07:55:11.641817     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1408 07:55:11.651581     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1409 07:55:11.661962     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1410 07:55:11.671787     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1411 07:55:11.681702     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1412 07:55:11.681801     PCI: 00:02.0
 1413 07:55:11.694727     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1414 07:55:11.704507     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1415 07:55:11.714688     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1416 07:55:11.714791     PCI: 00:04.0
 1417 07:55:11.718083     PCI: 00:08.0
 1418 07:55:11.727612     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1419 07:55:11.727717     PCI: 00:12.0
 1420 07:55:11.738063     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1421 07:55:11.744094     PCI: 00:14.0 child on link 0 USB0 port 0
 1422 07:55:11.754398     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1423 07:55:11.757817      USB0 port 0 child on link 0 USB2 port 0
 1424 07:55:11.760648       USB2 port 0
 1425 07:55:11.760744       USB2 port 1
 1426 07:55:11.764074       USB2 port 2
 1427 07:55:11.764162       USB2 port 3
 1428 07:55:11.767263       USB2 port 5
 1429 07:55:11.767352       USB2 port 6
 1430 07:55:11.770823       USB2 port 9
 1431 07:55:11.770913       USB3 port 0
 1432 07:55:11.774314       USB3 port 1
 1433 07:55:11.774404       USB3 port 2
 1434 07:55:11.777596       USB3 port 3
 1435 07:55:11.780513       USB3 port 4
 1436 07:55:11.780597     PCI: 00:14.2
 1437 07:55:11.790841     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1438 07:55:11.800652     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1439 07:55:11.804081     PCI: 00:14.3
 1440 07:55:11.813913     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1441 07:55:11.817185     PCI: 00:15.0 child on link 0 I2C: 01:15
 1442 07:55:11.827255     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1443 07:55:11.830013      I2C: 01:15
 1444 07:55:11.833603     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1445 07:55:11.843789     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1446 07:55:11.846671      I2C: 02:5d
 1447 07:55:11.846762      GENERIC: 0.0
 1448 07:55:11.850246     PCI: 00:16.0
 1449 07:55:11.859751     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1450 07:55:11.859848     PCI: 00:17.0
 1451 07:55:11.870016     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1452 07:55:11.883272     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1453 07:55:11.889467     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1454 07:55:11.899482     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1455 07:55:11.909349     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1456 07:55:11.919633     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1457 07:55:11.923059     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1458 07:55:11.932993     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1459 07:55:11.935942      I2C: 03:1a
 1460 07:55:11.936485      I2C: 03:38
 1461 07:55:11.939407      I2C: 03:39
 1462 07:55:11.939947      I2C: 03:3a
 1463 07:55:11.942770      I2C: 03:3b
 1464 07:55:11.945945     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1465 07:55:11.956101     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1466 07:55:11.965859     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1467 07:55:11.975868     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1468 07:55:11.979249      PCI: 01:00.0
 1469 07:55:11.988945      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1470 07:55:11.989263     PCI: 00:1e.0
 1471 07:55:12.001991     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1472 07:55:12.012350     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1473 07:55:12.015174     PCI: 00:1e.2 child on link 0 SPI: 00
 1474 07:55:12.025375     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1475 07:55:12.025474      SPI: 00
 1476 07:55:12.031872     PCI: 00:1e.3 child on link 0 SPI: 01
 1477 07:55:12.041648     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1478 07:55:12.041746      SPI: 01
 1479 07:55:12.044827     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1480 07:55:12.055291     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1481 07:55:12.065100     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1482 07:55:12.065198      PNP: 0c09.0
 1483 07:55:12.074777      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1484 07:55:12.074878     PCI: 00:1f.3
 1485 07:55:12.085036     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1486 07:55:12.097811     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1487 07:55:12.097911     PCI: 00:1f.4
 1488 07:55:12.108012     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1489 07:55:12.117805     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1490 07:55:12.117904     PCI: 00:1f.5
 1491 07:55:12.130725     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1492 07:55:12.130836  Done allocating resources.
 1493 07:55:12.137675  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1494 07:55:12.140610  Enabling resources...
 1495 07:55:12.144209  PCI: 00:00.0 subsystem <- 8086/9b61
 1496 07:55:12.147421  PCI: 00:00.0 cmd <- 06
 1497 07:55:12.150920  PCI: 00:02.0 subsystem <- 8086/9b41
 1498 07:55:12.154264  PCI: 00:02.0 cmd <- 03
 1499 07:55:12.157241  PCI: 00:08.0 cmd <- 06
 1500 07:55:12.160593  PCI: 00:12.0 subsystem <- 8086/02f9
 1501 07:55:12.164342  PCI: 00:12.0 cmd <- 02
 1502 07:55:12.167079  PCI: 00:14.0 subsystem <- 8086/02ed
 1503 07:55:12.167175  PCI: 00:14.0 cmd <- 02
 1504 07:55:12.171155  PCI: 00:14.2 cmd <- 02
 1505 07:55:12.173965  PCI: 00:14.3 subsystem <- 8086/02f0
 1506 07:55:12.177525  PCI: 00:14.3 cmd <- 02
 1507 07:55:12.181078  PCI: 00:15.0 subsystem <- 8086/02e8
 1508 07:55:12.183977  PCI: 00:15.0 cmd <- 02
 1509 07:55:12.187478  PCI: 00:15.1 subsystem <- 8086/02e9
 1510 07:55:12.191048  PCI: 00:15.1 cmd <- 02
 1511 07:55:12.193828  PCI: 00:16.0 subsystem <- 8086/02e0
 1512 07:55:12.197364  PCI: 00:16.0 cmd <- 02
 1513 07:55:12.200727  PCI: 00:17.0 subsystem <- 8086/02d3
 1514 07:55:12.203623  PCI: 00:17.0 cmd <- 03
 1515 07:55:12.207030  PCI: 00:19.0 subsystem <- 8086/02c5
 1516 07:55:12.210517  PCI: 00:19.0 cmd <- 02
 1517 07:55:12.213456  PCI: 00:1d.0 bridge ctrl <- 0013
 1518 07:55:12.216942  PCI: 00:1d.0 subsystem <- 8086/02b0
 1519 07:55:12.217037  PCI: 00:1d.0 cmd <- 06
 1520 07:55:12.220354  
 1521 07:55:12.223705  PCI: 00:1e.0 subsystem <- 8086/02a8
 1522 07:55:12.223802  PCI: 00:1e.0 cmd <- 06
 1523 07:55:12.230461  PCI: 00:1e.2 subsystem <- 8086/02aa
 1524 07:55:12.230562  PCI: 00:1e.2 cmd <- 06
 1525 07:55:12.233959  PCI: 00:1e.3 subsystem <- 8086/02ab
 1526 07:55:12.236689  PCI: 00:1e.3 cmd <- 02
 1527 07:55:12.239966  PCI: 00:1f.0 subsystem <- 8086/0284
 1528 07:55:12.243444  PCI: 00:1f.0 cmd <- 407
 1529 07:55:12.246798  PCI: 00:1f.3 subsystem <- 8086/02c8
 1530 07:55:12.250376  PCI: 00:1f.3 cmd <- 02
 1531 07:55:12.253157  PCI: 00:1f.4 subsystem <- 8086/02a3
 1532 07:55:12.256474  PCI: 00:1f.4 cmd <- 03
 1533 07:55:12.260107  PCI: 00:1f.5 subsystem <- 8086/02a4
 1534 07:55:12.263366  PCI: 00:1f.5 cmd <- 406
 1535 07:55:12.271583  PCI: 01:00.0 cmd <- 02
 1536 07:55:12.277076  done.
 1537 07:55:12.285531  ME: Version: 14.0.39.1367
 1538 07:55:12.291849  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
 1539 07:55:12.295307  Initializing devices...
 1540 07:55:12.295411  Root Device init ...
 1541 07:55:12.302096  Chrome EC: Set SMI mask to 0x0000000000000000
 1542 07:55:12.305000  Chrome EC: clear events_b mask to 0x0000000000000000
 1543 07:55:12.312125  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1544 07:55:12.318353  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1545 07:55:12.324622  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1546 07:55:12.327921  Chrome EC: Set WAKE mask to 0x0000000000000000
 1547 07:55:12.331275  Root Device init finished in 35168 usecs
 1548 07:55:12.334896  
 1549 07:55:12.334983  CPU_CLUSTER: 0 init ...
 1550 07:55:12.340977  CPU_CLUSTER: 0 init finished in 2438 usecs
 1551 07:55:12.346180  PCI: 00:00.0 init ...
 1552 07:55:12.349474  CPU TDP: 15 Watts
 1553 07:55:12.352411  CPU PL2 = 64 Watts
 1554 07:55:12.355745  PCI: 00:00.0 init finished in 7079 usecs
 1555 07:55:12.359233  PCI: 00:02.0 init ...
 1556 07:55:12.362567  PCI: 00:02.0 init finished in 2253 usecs
 1557 07:55:12.366056  PCI: 00:08.0 init ...
 1558 07:55:12.368963  PCI: 00:08.0 init finished in 2252 usecs
 1559 07:55:12.372359  PCI: 00:12.0 init ...
 1560 07:55:12.375842  PCI: 00:12.0 init finished in 2252 usecs
 1561 07:55:12.379363  PCI: 00:14.0 init ...
 1562 07:55:12.382613  PCI: 00:14.0 init finished in 2251 usecs
 1563 07:55:12.385552  PCI: 00:14.2 init ...
 1564 07:55:12.389022  PCI: 00:14.2 init finished in 2251 usecs
 1565 07:55:12.392459  PCI: 00:14.3 init ...
 1566 07:55:12.395943  PCI: 00:14.3 init finished in 2270 usecs
 1567 07:55:12.398706  PCI: 00:15.0 init ...
 1568 07:55:12.402362  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1569 07:55:12.405250  PCI: 00:15.0 init finished in 5991 usecs
 1570 07:55:12.408696  PCI: 00:15.1 init ...
 1571 07:55:12.412165  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1572 07:55:12.415537  PCI: 00:15.1 init finished in 5974 usecs
 1573 07:55:12.419059  
 1574 07:55:12.419155  PCI: 00:16.0 init ...
 1575 07:55:12.425339  PCI: 00:16.0 init finished in 2252 usecs
 1576 07:55:12.425436  PCI: 00:19.0 init ...
 1577 07:55:12.432150  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1578 07:55:12.435393  PCI: 00:19.0 init finished in 5976 usecs
 1579 07:55:12.438775  PCI: 00:1d.0 init ...
 1580 07:55:12.441720  Initializing PCH PCIe bridge.
 1581 07:55:12.445201  PCI: 00:1d.0 init finished in 5284 usecs
 1582 07:55:12.448669  PCI: 00:1f.0 init ...
 1583 07:55:12.452036  IOAPIC: Initializing IOAPIC at 0xfec00000
 1584 07:55:12.458133  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1585 07:55:12.458233  IOAPIC: ID = 0x02
 1586 07:55:12.461588  IOAPIC: Dumping registers
 1587 07:55:12.465089    reg 0x0000: 0x02000000
 1588 07:55:12.468376    reg 0x0001: 0x00770020
 1589 07:55:12.468473    reg 0x0002: 0x00000000
 1590 07:55:12.474690  PCI: 00:1f.0 init finished in 23549 usecs
 1591 07:55:12.478313  PCI: 00:1f.4 init ...
 1592 07:55:12.481625  PCI: 00:1f.4 init finished in 2262 usecs
 1593 07:55:12.491957  PCI: 01:00.0 init ...
 1594 07:55:12.495405  PCI: 01:00.0 init finished in 2243 usecs
 1595 07:55:12.499578  PNP: 0c09.0 init ...
 1596 07:55:12.502919  Google Chrome EC uptime: 11.042 seconds
 1597 07:55:12.509586  Google Chrome AP resets since EC boot: 0
 1598 07:55:12.513041  Google Chrome most recent AP reset causes:
 1599 07:55:12.519410  Google Chrome EC reset flags at last EC boot: reset-pin
 1600 07:55:12.522948  PNP: 0c09.0 init finished in 20571 usecs
 1601 07:55:12.526204  Devices initialized
 1602 07:55:12.526303  Show all devs... After init.
 1603 07:55:12.529348  
 1604 07:55:12.529441  Root Device: enabled 1
 1605 07:55:12.532799  CPU_CLUSTER: 0: enabled 1
 1606 07:55:12.536214  DOMAIN: 0000: enabled 1
 1607 07:55:12.536311  APIC: 00: enabled 1
 1608 07:55:12.539063  PCI: 00:00.0: enabled 1
 1609 07:55:12.542434  PCI: 00:02.0: enabled 1
 1610 07:55:12.546386  PCI: 00:04.0: enabled 0
 1611 07:55:12.546482  PCI: 00:05.0: enabled 0
 1612 07:55:12.549183  PCI: 00:12.0: enabled 1
 1613 07:55:12.552722  PCI: 00:12.5: enabled 0
 1614 07:55:12.552819  PCI: 00:12.6: enabled 0
 1615 07:55:12.556115  
 1616 07:55:12.556212  PCI: 00:14.0: enabled 1
 1617 07:55:12.558878  PCI: 00:14.1: enabled 0
 1618 07:55:12.562308  PCI: 00:14.3: enabled 1
 1619 07:55:12.562405  PCI: 00:14.5: enabled 0
 1620 07:55:12.565807  PCI: 00:15.0: enabled 1
 1621 07:55:12.569228  PCI: 00:15.1: enabled 1
 1622 07:55:12.572525  PCI: 00:15.2: enabled 0
 1623 07:55:12.572624  PCI: 00:15.3: enabled 0
 1624 07:55:12.575869  PCI: 00:16.0: enabled 1
 1625 07:55:12.578757  PCI: 00:16.1: enabled 0
 1626 07:55:12.582374  PCI: 00:16.2: enabled 0
 1627 07:55:12.582472  PCI: 00:16.3: enabled 0
 1628 07:55:12.585811  PCI: 00:16.4: enabled 0
 1629 07:55:12.589108  PCI: 00:16.5: enabled 0
 1630 07:55:12.592070  PCI: 00:17.0: enabled 1
 1631 07:55:12.592166  PCI: 00:19.0: enabled 1
 1632 07:55:12.595497  PCI: 00:19.1: enabled 0
 1633 07:55:12.599010  PCI: 00:19.2: enabled 0
 1634 07:55:12.599106  PCI: 00:1a.0: enabled 0
 1635 07:55:12.602429  PCI: 00:1c.0: enabled 0
 1636 07:55:12.605285  PCI: 00:1c.1: enabled 0
 1637 07:55:12.608761  PCI: 00:1c.2: enabled 0
 1638 07:55:12.608857  PCI: 00:1c.3: enabled 0
 1639 07:55:12.612210  PCI: 00:1c.4: enabled 0
 1640 07:55:12.615527  PCI: 00:1c.5: enabled 0
 1641 07:55:12.618459  PCI: 00:1c.6: enabled 0
 1642 07:55:12.618554  PCI: 00:1c.7: enabled 0
 1643 07:55:12.622090  PCI: 00:1d.0: enabled 1
 1644 07:55:12.625596  PCI: 00:1d.1: enabled 0
 1645 07:55:12.628852  PCI: 00:1d.2: enabled 0
 1646 07:55:12.628949  PCI: 00:1d.3: enabled 0
 1647 07:55:12.631751  PCI: 00:1d.4: enabled 0
 1648 07:55:12.635121  PCI: 00:1d.5: enabled 0
 1649 07:55:12.635217  PCI: 00:1e.0: enabled 1
 1650 07:55:12.638447  
 1651 07:55:12.638544  PCI: 00:1e.1: enabled 0
 1652 07:55:12.642091  PCI: 00:1e.2: enabled 1
 1653 07:55:12.645445  PCI: 00:1e.3: enabled 1
 1654 07:55:12.645541  PCI: 00:1f.0: enabled 1
 1655 07:55:12.648269  PCI: 00:1f.1: enabled 0
 1656 07:55:12.651763  PCI: 00:1f.2: enabled 0
 1657 07:55:12.655337  PCI: 00:1f.3: enabled 1
 1658 07:55:12.655445  PCI: 00:1f.4: enabled 1
 1659 07:55:12.658215  PCI: 00:1f.5: enabled 1
 1660 07:55:12.661471  PCI: 00:1f.6: enabled 0
 1661 07:55:12.664924  USB0 port 0: enabled 1
 1662 07:55:12.665013  I2C: 01:15: enabled 1
 1663 07:55:12.668413  I2C: 02:5d: enabled 1
 1664 07:55:12.671752  GENERIC: 0.0: enabled 1
 1665 07:55:12.671847  I2C: 03:1a: enabled 1
 1666 07:55:12.674722  I2C: 03:38: enabled 1
 1667 07:55:12.678208  I2C: 03:39: enabled 1
 1668 07:55:12.678298  I2C: 03:3a: enabled 1
 1669 07:55:12.681655  I2C: 03:3b: enabled 1
 1670 07:55:12.685059  PCI: 00:00.0: enabled 1
 1671 07:55:12.685155  SPI: 00: enabled 1
 1672 07:55:12.688101  SPI: 01: enabled 1
 1673 07:55:12.691443  PNP: 0c09.0: enabled 1
 1674 07:55:12.691544  USB2 port 0: enabled 1
 1675 07:55:12.694867  USB2 port 1: enabled 1
 1676 07:55:12.697787  USB2 port 2: enabled 0
 1677 07:55:12.697885  USB2 port 3: enabled 0
 1678 07:55:12.701387  
 1679 07:55:12.701483  USB2 port 5: enabled 0
 1680 07:55:12.704762  USB2 port 6: enabled 1
 1681 07:55:12.707657  USB2 port 9: enabled 1
 1682 07:55:12.707745  USB3 port 0: enabled 1
 1683 07:55:12.711084  USB3 port 1: enabled 1
 1684 07:55:12.714495  USB3 port 2: enabled 1
 1685 07:55:12.714589  USB3 port 3: enabled 1
 1686 07:55:12.718096  USB3 port 4: enabled 0
 1687 07:55:12.721073  APIC: 02: enabled 1
 1688 07:55:12.721168  APIC: 01: enabled 1
 1689 07:55:12.724524  APIC: 03: enabled 1
 1690 07:55:12.727437  APIC: 04: enabled 1
 1691 07:55:12.727538  APIC: 05: enabled 1
 1692 07:55:12.730844  APIC: 06: enabled 1
 1693 07:55:12.734176  APIC: 07: enabled 1
 1694 07:55:12.734273  PCI: 00:08.0: enabled 1
 1695 07:55:12.737582  PCI: 00:14.2: enabled 1
 1696 07:55:12.740877  PCI: 01:00.0: enabled 1
 1697 07:55:12.744371  Disabling ACPI via APMC:
 1698 07:55:12.747892  done.
 1699 07:55:12.751056  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1700 07:55:12.754251  ELOG: NV offset 0xaf0000 size 0x4000
 1701 07:55:12.761041  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1702 07:55:12.767591  ELOG: Event(17) added with size 13 at 2022-11-25 07:55:10 UTC
 1703 07:55:12.774384  ELOG: Event(92) added with size 9 at 2022-11-25 07:55:10 UTC
 1704 07:55:12.781288  ELOG: Event(93) added with size 9 at 2022-11-25 07:55:10 UTC
 1705 07:55:12.787836  ELOG: Event(9A) added with size 9 at 2022-11-25 07:55:11 UTC
 1706 07:55:12.794063  ELOG: Event(16) added with size 11 at 2022-11-25 07:55:11 UTC
 1707 07:55:12.797448  Erasing flash addr af0000 + 4 KiB
 1708 07:55:12.861219  ELOG: Event(9E) added with size 10 at 2022-11-25 07:55:11 UTC
 1709 07:55:12.867941  ELOG: Event(9F) added with size 14 at 2022-11-25 07:55:11 UTC
 1710 07:55:12.874244  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 56
 1711 07:55:12.880970  ELOG: Event(A1) added with size 10 at 2022-11-25 07:55:11 UTC
 1712 07:55:12.887799  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1713 07:55:12.894177  ELOG: Event(A0) added with size 9 at 2022-11-25 07:55:11 UTC
 1714 07:55:12.897551  elog_add_boot_reason: Logged dev mode boot
 1715 07:55:12.900516  
 1716 07:55:12.900608  Finalize devices...
 1717 07:55:12.903835  PCI: 00:17.0 final
 1718 07:55:12.903939  Devices finalized
 1719 07:55:12.910580  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1720 07:55:12.914072  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1721 07:55:12.917392  
 1722 07:55:12.920764  ME: HFSTS1                  : 0x90000245
 1723 07:55:12.923622  ME: HFSTS2                  : 0x3B850126
 1724 07:55:12.927116  ME: HFSTS3                  : 0x00000020
 1725 07:55:12.930495  ME: HFSTS4                  : 0x00004800
 1726 07:55:12.936794  ME: HFSTS5                  : 0x00000000
 1727 07:55:12.940145  ME: HFSTS6                  : 0x40400006
 1728 07:55:12.944006  ME: Manufacturing Mode      : NO
 1729 07:55:12.946894  ME: FW Partition Table      : OK
 1730 07:55:12.950281  ME: Bringup Loader Failure  : NO
 1731 07:55:12.953724  ME: Firmware Init Complete  : YES
 1732 07:55:12.957125  ME: Boot Options Present    : NO
 1733 07:55:12.960340  ME: Update In Progress      : NO
 1734 07:55:12.963733  ME: D0i3 Support            : YES
 1735 07:55:12.966553  ME: Low Power State Enabled : NO
 1736 07:55:12.969902  ME: CPU Replaced            : NO
 1737 07:55:12.973344  ME: CPU Replacement Valid   : YES
 1738 07:55:12.976807  ME: Current Working State   : 5
 1739 07:55:12.979677  ME: Current Operation State : 1
 1740 07:55:12.983201  ME: Current Operation Mode  : 0
 1741 07:55:12.986246  ME: Error Code              : 0
 1742 07:55:12.989615  ME: CPU Debug Disabled      : YES
 1743 07:55:12.993037  ME: TXT Support             : NO
 1744 07:55:12.999458  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1745 07:55:13.002909  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1746 07:55:13.006219  CBFS @ c08000 size 3f8000
 1747 07:55:13.012510  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1748 07:55:13.015909  CBFS: Locating 'fallback/dsdt.aml'
 1749 07:55:13.019382  CBFS: Found @ offset 10bb80 size 3fa5
 1750 07:55:13.026091  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1751 07:55:13.028953  CBFS @ c08000 size 3f8000
 1752 07:55:13.032437  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1753 07:55:13.035883  CBFS: Locating 'fallback/slic'
 1754 07:55:13.040319  CBFS: 'fallback/slic' not found.
 1755 07:55:13.046914  ACPI: Writing ACPI tables at 99b3e000.
 1756 07:55:13.047010  ACPI:    * FACS
 1757 07:55:13.050328  ACPI:    * DSDT
 1758 07:55:13.053715  Ramoops buffer: 0x100000@0x99a3d000.
 1759 07:55:13.057244  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1760 07:55:13.063322  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1761 07:55:13.066871  Google Chrome EC: version:
 1762 07:55:13.070013  	ro: helios_v2.0.2659-56403530b
 1763 07:55:13.073278  	rw: helios_v2.0.2849-c41de27e7d
 1764 07:55:13.073377    running image: 1
 1765 07:55:13.077812  ACPI:    * FADT
 1766 07:55:13.077912  SCI is IRQ9
 1767 07:55:13.081276  ACPI: added table 1/32, length now 40
 1768 07:55:13.084237  
 1769 07:55:13.084334  ACPI:     * SSDT
 1770 07:55:13.087550  Found 1 CPU(s) with 8 core(s) each.
 1771 07:55:13.090946  Error: Could not locate 'wifi_sar' in VPD.
 1772 07:55:13.097687  Checking CBFS for default SAR values
 1773 07:55:13.100636  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1774 07:55:13.104094  CBFS @ c08000 size 3f8000
 1775 07:55:13.110885  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1776 07:55:13.114372  CBFS: Locating 'wifi_sar_defaults.hex'
 1777 07:55:13.117224  CBFS: Found @ offset 5fac0 size 77
 1778 07:55:13.120669  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1779 07:55:13.124019  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1780 07:55:13.127562  
 1781 07:55:13.130497  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1782 07:55:13.137332  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1783 07:55:13.140705  failed to find key in VPD: dsm_calib_r0_0
 1784 07:55:13.150325  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1785 07:55:13.153709  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1786 07:55:13.157022  failed to find key in VPD: dsm_calib_r0_1
 1787 07:55:13.166830  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1788 07:55:13.173474  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1789 07:55:13.177034  failed to find key in VPD: dsm_calib_r0_2
 1790 07:55:13.186754  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1791 07:55:13.190322  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1792 07:55:13.196614  failed to find key in VPD: dsm_calib_r0_3
 1793 07:55:13.203426  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1794 07:55:13.210339  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1795 07:55:13.213094  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1796 07:55:13.216419  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1797 07:55:13.220584  EC returned error result code 1
 1798 07:55:13.224402  EC returned error result code 1
 1799 07:55:13.227798  EC returned error result code 1
 1800 07:55:13.234753  PS2K: Bad resp from EC. Vivaldi disabled!
 1801 07:55:13.238223  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1802 07:55:13.244358  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1803 07:55:13.250910  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1804 07:55:13.254379  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1805 07:55:13.261160  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1806 07:55:13.267919  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1807 07:55:13.274089  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1808 07:55:13.277505  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1809 07:55:13.284323  ACPI: added table 2/32, length now 44
 1810 07:55:13.284427  ACPI:    * MCFG
 1811 07:55:13.287253  ACPI: added table 3/32, length now 48
 1812 07:55:13.290612  ACPI:    * TPM2
 1813 07:55:13.294079  TPM2 log created at 99a2d000
 1814 07:55:13.297358  ACPI: added table 4/32, length now 52
 1815 07:55:13.297455  ACPI:    * MADT
 1816 07:55:13.300376  SCI is IRQ9
 1817 07:55:13.303744  ACPI: added table 5/32, length now 56
 1818 07:55:13.303836  current = 99b43ac0
 1819 07:55:13.307186  ACPI:    * DMAR
 1820 07:55:13.310610  ACPI: added table 6/32, length now 60
 1821 07:55:13.314088  ACPI:    * IGD OpRegion
 1822 07:55:13.314187  GMA: Found VBT in CBFS
 1823 07:55:13.317029  GMA: Found valid VBT in CBFS
 1824 07:55:13.320492  ACPI: added table 7/32, length now 64
 1825 07:55:13.324053  
 1826 07:55:13.324145  ACPI:    * HPET
 1827 07:55:13.326823  ACPI: added table 8/32, length now 68
 1828 07:55:13.330272  ACPI: done.
 1829 07:55:13.330361  ACPI tables: 31744 bytes.
 1830 07:55:13.333762  smbios_write_tables: 99a2c000
 1831 07:55:13.337305  EC returned error result code 3
 1832 07:55:13.340281  Couldn't obtain OEM name from CBI
 1833 07:55:13.343846  Create SMBIOS type 17
 1834 07:55:13.347138  PCI: 00:00.0 (Intel Cannonlake)
 1835 07:55:13.350532  PCI: 00:14.3 (Intel WiFi)
 1836 07:55:13.353955  SMBIOS tables: 939 bytes.
 1837 07:55:13.356884  Writing table forward entry at 0x00000500
 1838 07:55:13.363738  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1839 07:55:13.367129  Writing coreboot table at 0x99b62000
 1840 07:55:13.373476   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1841 07:55:13.376852   1. 0000000000001000-000000000009ffff: RAM
 1842 07:55:13.380438   2. 00000000000a0000-00000000000fffff: RESERVED
 1843 07:55:13.383276  
 1844 07:55:13.386692   3. 0000000000100000-0000000099a2bfff: RAM
 1845 07:55:13.393638   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1846 07:55:13.396448   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1847 07:55:13.403466   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1848 07:55:13.406868   7. 000000009a000000-000000009f7fffff: RESERVED
 1849 07:55:13.413201   8. 00000000e0000000-00000000efffffff: RESERVED
 1850 07:55:13.416472   9. 00000000fc000000-00000000fc000fff: RESERVED
 1851 07:55:13.422851  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1852 07:55:13.426314  11. 00000000fed10000-00000000fed17fff: RESERVED
 1853 07:55:13.429636  12. 00000000fed80000-00000000fed83fff: RESERVED
 1854 07:55:13.433107  
 1855 07:55:13.436117  13. 00000000fed90000-00000000fed91fff: RESERVED
 1856 07:55:13.439574  14. 00000000feda0000-00000000feda1fff: RESERVED
 1857 07:55:13.445832  15. 0000000100000000-000000045e7fffff: RAM
 1858 07:55:13.449199  Graphics framebuffer located at 0xc0000000
 1859 07:55:13.452665  Passing 5 GPIOs to payload:
 1860 07:55:13.455997              NAME |       PORT | POLARITY |     VALUE
 1861 07:55:13.462712     write protect |  undefined |     high |       low
 1862 07:55:13.469091               lid |  undefined |     high |      high
 1863 07:55:13.472400             power |  undefined |     high |       low
 1864 07:55:13.479233             oprom |  undefined |     high |       low
 1865 07:55:13.482484          EC in RW | 0x000000cb |     high |       low
 1866 07:55:13.485464  Board ID: 4
 1867 07:55:13.488787  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1868 07:55:13.492465  CBFS @ c08000 size 3f8000
 1869 07:55:13.498768  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1870 07:55:13.505312  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
 1871 07:55:13.508786  coreboot table: 1492 bytes.
 1872 07:55:13.512184  IMD ROOT    0. 99fff000 00001000
 1873 07:55:13.515527  IMD SMALL   1. 99ffe000 00001000
 1874 07:55:13.519010  FSP MEMORY  2. 99c4e000 003b0000
 1875 07:55:13.521818  CONSOLE     3. 99c2e000 00020000
 1876 07:55:13.525189  FMAP        4. 99c2d000 0000054e
 1877 07:55:13.528565  TIME STAMP  5. 99c2c000 00000910
 1878 07:55:13.531954  VBOOT WORK  6. 99c18000 00014000
 1879 07:55:13.534906  MRC DATA    7. 99c16000 00001958
 1880 07:55:13.538378  ROMSTG STCK 8. 99c15000 00001000
 1881 07:55:13.541879  AFTER CAR   9. 99c0b000 0000a000
 1882 07:55:13.545103  RAMSTAGE   10. 99baf000 0005c000
 1883 07:55:13.548539  REFCODE    11. 99b7a000 00035000
 1884 07:55:13.551894  SMM BACKUP 12. 99b6a000 00010000
 1885 07:55:13.555072  COREBOOT   13. 99b62000 00008000
 1886 07:55:13.558572  ACPI       14. 99b3e000 00024000
 1887 07:55:13.561553  ACPI GNVS  15. 99b3d000 00001000
 1888 07:55:13.564857  RAMOOPS    16. 99a3d000 00100000
 1889 07:55:13.568450  TPM2 TCGLOG17. 99a2d000 00010000
 1890 07:55:13.571737  SMBIOS     18. 99a2c000 00000800
 1891 07:55:13.571832  IMD small region:
 1892 07:55:13.574614    IMD ROOT    0. 99ffec00 00000400
 1893 07:55:13.578271    FSP RUNTIME 1. 99ffebe0 00000004
 1894 07:55:13.581490    EC HOSTEVENT 2. 99ffebc0 00000008
 1895 07:55:13.587829    POWER STATE 3. 99ffeb80 00000040
 1896 07:55:13.591204    ROMSTAGE    4. 99ffeb60 00000004
 1897 07:55:13.594776    MEM INFO    5. 99ffe9a0 000001b9
 1898 07:55:13.597728    VPD         6. 99ffe920 0000006c
 1899 07:55:13.601214  MTRR: Physical address space:
 1900 07:55:13.607536  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1901 07:55:13.611030  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1902 07:55:13.617447  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1903 07:55:13.624277  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1904 07:55:13.631074  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1905 07:55:13.637197  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1906 07:55:13.644177  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1907 07:55:13.647650  MTRR: Fixed MSR 0x250 0x0606060606060606
 1908 07:55:13.650821  MTRR: Fixed MSR 0x258 0x0606060606060606
 1909 07:55:13.657397  MTRR: Fixed MSR 0x259 0x0000000000000000
 1910 07:55:13.660735  MTRR: Fixed MSR 0x268 0x0606060606060606
 1911 07:55:13.663699  MTRR: Fixed MSR 0x269 0x0606060606060606
 1912 07:55:13.667020  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1913 07:55:13.673733  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1914 07:55:13.677276  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1915 07:55:13.680632  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1916 07:55:13.684005  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1917 07:55:13.687392  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1918 07:55:13.690267  
 1919 07:55:13.693542  call enable_fixed_mtrr()
 1920 07:55:13.696986  CPU physical address size: 39 bits
 1921 07:55:13.700434  MTRR: default type WB/UC MTRR counts: 6/8.
 1922 07:55:13.703406  MTRR: WB selected as default type.
 1923 07:55:13.710125  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1924 07:55:13.716632  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1925 07:55:13.723453  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1926 07:55:13.726689  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1927 07:55:13.729770  
 1928 07:55:13.733049  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1929 07:55:13.739796  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1930 07:55:13.743280  
 1931 07:55:13.743367  MTRR check
 1932 07:55:13.746634  Fixed MTRRs   : Enabled
 1933 07:55:13.746726  Variable MTRRs: Enabled
 1934 07:55:13.746810  
 1935 07:55:13.753551  MTRR: Fixed MSR 0x250 0x0606060606060606
 1936 07:55:13.756864  MTRR: Fixed MSR 0x258 0x0606060606060606
 1937 07:55:13.760099  MTRR: Fixed MSR 0x259 0x0000000000000000
 1938 07:55:13.762986  MTRR: Fixed MSR 0x268 0x0606060606060606
 1939 07:55:13.769813  MTRR: Fixed MSR 0x269 0x0606060606060606
 1940 07:55:13.773198  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1941 07:55:13.776759  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1942 07:55:13.779610  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1943 07:55:13.786496  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1944 07:55:13.789823  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1945 07:55:13.793305  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1946 07:55:13.799493  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1947 07:55:13.799593  call enable_fixed_mtrr()
 1948 07:55:13.806555  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1949 07:55:13.809732  CPU physical address size: 39 bits
 1950 07:55:13.812666  CBFS @ c08000 size 3f8000
 1951 07:55:13.819692  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1952 07:55:13.823082  CBFS: Locating 'fallback/payload'
 1953 07:55:13.825912  MTRR: Fixed MSR 0x250 0x0606060606060606
 1954 07:55:13.829393  MTRR: Fixed MSR 0x258 0x0606060606060606
 1955 07:55:13.832796  MTRR: Fixed MSR 0x259 0x0000000000000000
 1956 07:55:13.839229  MTRR: Fixed MSR 0x268 0x0606060606060606
 1957 07:55:13.842844  MTRR: Fixed MSR 0x269 0x0606060606060606
 1958 07:55:13.846248  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1959 07:55:13.849183  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1960 07:55:13.855864  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1961 07:55:13.859294  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1962 07:55:13.862699  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1963 07:55:13.865484  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1964 07:55:13.872708  MTRR: Fixed MSR 0x250 0x0606060606060606
 1965 07:55:13.872807  call enable_fixed_mtrr()
 1966 07:55:13.879073  MTRR: Fixed MSR 0x258 0x0606060606060606
 1967 07:55:13.882411  MTRR: Fixed MSR 0x259 0x0000000000000000
 1968 07:55:13.885892  MTRR: Fixed MSR 0x268 0x0606060606060606
 1969 07:55:13.889361  MTRR: Fixed MSR 0x269 0x0606060606060606
 1970 07:55:13.895675  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1971 07:55:13.899207  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1972 07:55:13.902614  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1973 07:55:13.905693  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1974 07:55:13.908934  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1975 07:55:13.915850  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1976 07:55:13.918716  CPU physical address size: 39 bits
 1977 07:55:13.922163  call enable_fixed_mtrr()
 1978 07:55:13.925511  MTRR: Fixed MSR 0x250 0x0606060606060606
 1979 07:55:13.929063  MTRR: Fixed MSR 0x258 0x0606060606060606
 1980 07:55:13.932456  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 07:55:13.938664  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 07:55:13.942255  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 07:55:13.945227  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 07:55:13.948613  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 07:55:13.955377  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 07:55:13.958675  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 07:55:13.962038  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 07:55:13.965293  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 07:55:13.971565  MTRR: Fixed MSR 0x250 0x0606060606060606
 1990 07:55:13.971657  call enable_fixed_mtrr()
 1991 07:55:13.978254  MTRR: Fixed MSR 0x258 0x0606060606060606
 1992 07:55:13.981660  MTRR: Fixed MSR 0x259 0x0000000000000000
 1993 07:55:13.985264  MTRR: Fixed MSR 0x268 0x0606060606060606
 1994 07:55:13.988145  MTRR: Fixed MSR 0x269 0x0606060606060606
 1995 07:55:13.994799  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1996 07:55:13.998332  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1997 07:55:14.001733  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1998 07:55:14.004524  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1999 07:55:14.011425  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2000 07:55:14.014769  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2001 07:55:14.017698  CPU physical address size: 39 bits
 2002 07:55:14.021117  call enable_fixed_mtrr()
 2003 07:55:14.024576  CBFS: Found @ offset 1c96c0 size 3f798
 2004 07:55:14.027761  MTRR: Fixed MSR 0x250 0x0606060606060606
 2005 07:55:14.031235  MTRR: Fixed MSR 0x250 0x0606060606060606
 2006 07:55:14.038101  Checking segment from ROM address 0xffdd16f8
 2007 07:55:14.041023  MTRR: Fixed MSR 0x258 0x0606060606060606
 2008 07:55:14.044470  MTRR: Fixed MSR 0x259 0x0000000000000000
 2009 07:55:14.050855  MTRR: Fixed MSR 0x268 0x0606060606060606
 2010 07:55:14.054190  MTRR: Fixed MSR 0x269 0x0606060606060606
 2011 07:55:14.057669  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2012 07:55:14.061037  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2013 07:55:14.064431  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2014 07:55:14.067756  
 2015 07:55:14.071046  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2016 07:55:14.073821  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2017 07:55:14.077282  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2018 07:55:14.084163  MTRR: Fixed MSR 0x258 0x0606060606060606
 2019 07:55:14.084258  call enable_fixed_mtrr()
 2020 07:55:14.090431  MTRR: Fixed MSR 0x259 0x0000000000000000
 2021 07:55:14.093799  MTRR: Fixed MSR 0x268 0x0606060606060606
 2022 07:55:14.097202  MTRR: Fixed MSR 0x269 0x0606060606060606
 2023 07:55:14.100702  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2024 07:55:14.103623  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2025 07:55:14.107016  
 2026 07:55:14.110641  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2027 07:55:14.113953  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2028 07:55:14.117193  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2029 07:55:14.120045  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2030 07:55:14.127015  CPU physical address size: 39 bits
 2031 07:55:14.127109  call enable_fixed_mtrr()
 2032 07:55:14.130590  
 2033 07:55:14.133368  CPU physical address size: 39 bits
 2034 07:55:14.136852  CPU physical address size: 39 bits
 2035 07:55:14.140061  CPU physical address size: 39 bits
 2036 07:55:14.143560  Checking segment from ROM address 0xffdd1714
 2037 07:55:14.147056  Loading segment from ROM address 0xffdd16f8
 2038 07:55:14.150003    code (compression=0)
 2039 07:55:14.159752    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 2040 07:55:14.166418  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 2041 07:55:14.169635  it's not compressed!
 2042 07:55:14.261479  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2043 07:55:14.268178  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2044 07:55:14.271491  Loading segment from ROM address 0xffdd1714
 2045 07:55:14.274911    Entry Point 0x30000000
 2046 07:55:14.277731  Loaded segments
 2047 07:55:14.283486  Finalizing chipset.
 2048 07:55:14.286954  Finalizing SMM.
 2049 07:55:14.290319  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2050 07:55:14.293789  mp_park_aps done after 0 msecs.
 2051 07:55:14.300451  Jumping to boot code at 30000000(99b62000)
 2052 07:55:14.306557  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2053 07:55:14.306651  
 2054 07:55:14.306729  
 2055 07:55:14.306810  
 2056 07:55:14.310327  Starting depthcharge on Helios...
 2057 07:55:14.310407  
 2058 07:55:14.310789  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2059 07:55:14.310905  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2060 07:55:14.311000  Setting prompt string to ['hatch:']
 2061 07:55:14.311089  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2062 07:55:14.319914  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2063 07:55:14.320008  
 2064 07:55:14.326688  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2065 07:55:14.326781  
 2066 07:55:14.333030  board_setup: Info: eMMC controller not present; skipping
 2067 07:55:14.333115  
 2068 07:55:14.336413  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2069 07:55:14.336493  
 2070 07:55:14.343300  board_setup: Info: SDHCI controller not present; skipping
 2071 07:55:14.343388  
 2072 07:55:14.349612  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2073 07:55:14.349699  
 2074 07:55:14.349775  Wipe memory regions:
 2075 07:55:14.349844  
 2076 07:55:14.353089  	[0x00000000001000, 0x000000000a0000)
 2077 07:55:14.353164  
 2078 07:55:14.356034  	[0x00000000100000, 0x00000030000000)
 2079 07:55:14.359393  
 2080 07:55:14.426221  	[0x00000030657430, 0x00000099a2c000)
 2081 07:55:14.426349  
 2082 07:55:14.575760  	[0x00000100000000, 0x0000045e800000)
 2083 07:55:14.575907  
 2084 07:55:16.031911  R8152: Initializing
 2085 07:55:16.032066  
 2086 07:55:16.035187  Version 9 (ocp_data = 6010)
 2087 07:55:16.035278  
 2088 07:55:16.039828  R8152: Done initializing
 2089 07:55:16.039914  
 2090 07:55:16.043172  Adding net device
 2091 07:55:16.043257  
 2092 07:55:16.526111  R8152: Initializing
 2093 07:55:16.526626  
 2094 07:55:16.529576  Version 6 (ocp_data = 5c30)
 2095 07:55:16.530014  
 2096 07:55:16.532238  R8152: Done initializing
 2097 07:55:16.532339  
 2098 07:55:16.535591  net_add_device: Attemp to include the same device
 2099 07:55:16.538883  
 2100 07:55:16.546289  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2101 07:55:16.546390  
 2102 07:55:16.546465  
 2103 07:55:16.546535  
 2104 07:55:16.546810  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2106 07:55:16.647596  hatch: tftpboot 192.168.201.1 8119429/tftp-deploy-epqotmxw/kernel/bzImage 8119429/tftp-deploy-epqotmxw/kernel/cmdline 8119429/tftp-deploy-epqotmxw/ramdisk/ramdisk.cpio.gz
 2107 07:55:16.647771  Setting prompt string to 'Starting kernel'
 2108 07:55:16.647853  Setting prompt string to ['Starting kernel']
 2109 07:55:16.647927  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2110 07:55:16.648012  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2111 07:55:16.652114  tftpboot 192.168.201.1 8119429/tftp-deploy-epqotmxw/kernel/bzImaoy-epqotmxw/kernel/cmdline 8119429/tftp-deploy-epqotmxw/ramdisk/ramdisk.cpio.gz
 2112 07:55:16.652214  
 2113 07:55:16.652288  Waiting for link
 2114 07:55:16.652358  
 2115 07:55:16.853012  done.
 2116 07:55:16.853168  
 2117 07:55:16.853273  MAC: 00:24:32:50:1a:59
 2118 07:55:16.853365  
 2119 07:55:16.856021  Sending DHCP discover... done.
 2120 07:55:16.856120  
 2121 07:55:16.859751  Waiting for reply... done.
 2122 07:55:16.859849  
 2123 07:55:16.863189  Sending DHCP request... done.
 2124 07:55:16.863290  
 2125 07:55:16.866138  Waiting for reply... done.
 2126 07:55:16.866237  
 2127 07:55:16.869586  My ip is 192.168.201.14
 2128 07:55:16.869682  
 2129 07:55:16.872914  The DHCP server ip is 192.168.201.1
 2130 07:55:16.873019  
 2131 07:55:16.876469  TFTP server IP predefined by user: 192.168.201.1
 2132 07:55:16.876555  
 2133 07:55:16.882665  Bootfile predefined by user: 8119429/tftp-deploy-epqotmxw/kernel/bzImage
 2134 07:55:16.882775  
 2135 07:55:16.886052  Sending tftp read request... done.
 2136 07:55:16.886146  
 2137 07:55:16.892325  Waiting for the transfer... 
 2138 07:55:16.892419  
 2139 07:55:17.400417  00000000 ################################################################
 2140 07:55:17.400565  
 2141 07:55:17.905807  00080000 ################################################################
 2142 07:55:17.905957  
 2143 07:55:18.425248  00100000 ################################################################
 2144 07:55:18.425403  
 2145 07:55:18.930319  00180000 ################################################################
 2146 07:55:18.930471  
 2147 07:55:19.441734  00200000 ################################################################
 2148 07:55:19.441890  
 2149 07:55:19.954512  00280000 ################################################################
 2150 07:55:19.954664  
 2151 07:55:20.500959  00300000 ################################################################
 2152 07:55:20.501123  
 2153 07:55:21.007832  00380000 ################################################################
 2154 07:55:21.007990  
 2155 07:55:21.524309  00400000 ################################################################
 2156 07:55:21.524466  
 2157 07:55:22.039278  00480000 ################################################################
 2158 07:55:22.039441  
 2159 07:55:22.545258  00500000 ################################################################
 2160 07:55:22.545414  
 2161 07:55:23.050344  00580000 ################################################################
 2162 07:55:23.050500  
 2163 07:55:23.556549  00600000 ################################################################
 2164 07:55:23.556697  
 2165 07:55:23.865066  00680000 ####################################### done.
 2166 07:55:23.865217  
 2167 07:55:23.867953  The bootfile was 7131024 bytes long.
 2168 07:55:23.868051  
 2169 07:55:23.871408  Sending tftp read request... done.
 2170 07:55:23.871505  
 2171 07:55:23.874662  Waiting for the transfer... 
 2172 07:55:23.874752  
 2173 07:55:24.395867  00000000 ################################################################
 2174 07:55:24.396042  
 2175 07:55:24.918336  00080000 ################################################################
 2176 07:55:24.918511  
 2177 07:55:25.432440  00100000 ################################################################
 2178 07:55:25.432608  
 2179 07:55:25.947255  00180000 ################################################################
 2180 07:55:25.947415  
 2181 07:55:26.471118  00200000 ################################################################
 2182 07:55:26.471305  
 2183 07:55:26.985029  00280000 ################################################################
 2184 07:55:26.985196  
 2185 07:55:27.527366  00300000 ################################################################
 2186 07:55:27.527521  
 2187 07:55:28.045387  00380000 ################################################################
 2188 07:55:28.045554  
 2189 07:55:28.565084  00400000 ################################################################
 2190 07:55:28.565238  
 2191 07:55:29.094083  00480000 ################################################################
 2192 07:55:29.094236  
 2193 07:55:29.347935  00500000 ################################ done.
 2194 07:55:29.348098  
 2195 07:55:29.351346  Sending tftp read request... done.
 2196 07:55:29.351440  
 2197 07:55:29.354751  Waiting for the transfer... 
 2198 07:55:29.354837  
 2199 07:55:29.354916  00000000 # done.
 2200 07:55:29.354994  
 2201 07:55:29.364979  Command line loaded dynamically from TFTP file: 8119429/tftp-deploy-epqotmxw/kernel/cmdline
 2202 07:55:29.365070  
 2203 07:55:29.390919  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119429/extract-nfsrootfs-vqv0iywb,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2204 07:55:29.391042  
 2205 07:55:29.397949  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2206 07:55:29.398047  
 2207 07:55:29.404843  Shutting down all USB controllers.
 2208 07:55:29.404940  
 2209 07:55:29.405016  Removing current net device
 2210 07:55:29.405097  
 2211 07:55:29.409427  Finalizing coreboot
 2212 07:55:29.409525  
 2213 07:55:29.415895  Exiting depthcharge with code 4 at timestamp: 22476160
 2214 07:55:29.415995  
 2215 07:55:29.416071  
 2216 07:55:29.416143  Starting kernel ...
 2217 07:55:29.416211  
 2218 07:55:29.416277  
 2219 07:55:29.416341  
 2220 07:55:29.416719  end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
 2221 07:55:29.416827  start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
 2222 07:55:29.416913  Setting prompt string to ['Linux version [0-9]']
 2223 07:55:29.416993  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2224 07:55:29.417072  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2226 07:59:55.417863  end: 2.2.5 auto-login-action (duration 00:04:26) [common]
 2228 07:59:55.419052  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
 2230 07:59:55.419916  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2233 07:59:55.421740  end: 2 depthcharge-action (duration 00:05:00) [common]
 2235 07:59:55.422275  Cleaning after the job
 2236 07:59:55.422368  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/ramdisk
 2237 07:59:55.422920  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/kernel
 2238 07:59:55.423487  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/nfsrootfs
 2239 07:59:55.458158  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119429/tftp-deploy-epqotmxw/modules
 2240 07:59:55.458498  start: 5.1 power-off (timeout 00:00:30) [common]
 2241 07:59:55.458707  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2242 07:59:55.479693  >> Command sent successfully.

 2243 07:59:55.481830  Returned 0 in 0 seconds
 2244 07:59:55.583040  end: 5.1 power-off (duration 00:00:00) [common]
 2246 07:59:55.584713  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2247 07:59:55.585922  Listened to connection for namespace 'common' for up to 1s
 2248 07:59:56.589545  Finalising connection for namespace 'common'
 2249 07:59:56.590263  Disconnecting from shell: Finalise
 2250 07:59:56.691854  end: 5.2 read-feedback (duration 00:00:01) [common]
 2251 07:59:56.692505  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119429
 2252 07:59:56.829009  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119429
 2253 07:59:56.829227  JobError: Your job cannot terminate cleanly.