Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:49:05.851761 lava-dispatcher, installed at version: 2022.10
2 07:49:05.851956 start: 0 validate
3 07:49:05.852089 Start time: 2022-11-25 07:49:05.852081+00:00 (UTC)
4 07:49:05.852219 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:49:05.852347 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:49:06.147928 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:49:06.148101 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:49:06.162356 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:49:06.162485 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:49:06.456949 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:49:06.457111 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:49:06.475472 validate duration: 0.62
14 07:49:06.475758 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:49:06.475867 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:49:06.475960 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:49:06.476065 Not decompressing ramdisk as can be used compressed.
18 07:49:06.476154 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/initrd.cpio.gz
19 07:49:06.476224 saving as /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/ramdisk/initrd.cpio.gz
20 07:49:06.476294 total size: 5431606 (5MB)
21 07:49:06.505552 progress 0% (0MB)
22 07:49:06.556699 progress 5% (0MB)
23 07:49:06.589159 progress 10% (0MB)
24 07:49:06.621083 progress 15% (0MB)
25 07:49:06.655308 progress 20% (1MB)
26 07:49:06.685545 progress 25% (1MB)
27 07:49:06.715757 progress 30% (1MB)
28 07:49:06.745125 progress 35% (1MB)
29 07:49:06.782925 progress 40% (2MB)
30 07:49:06.813278 progress 45% (2MB)
31 07:49:06.851618 progress 50% (2MB)
32 07:49:06.876327 progress 55% (2MB)
33 07:49:06.906260 progress 60% (3MB)
34 07:49:06.937702 progress 65% (3MB)
35 07:49:06.971830 progress 70% (3MB)
36 07:49:07.003932 progress 75% (3MB)
37 07:49:07.031334 progress 80% (4MB)
38 07:49:07.070808 progress 85% (4MB)
39 07:49:07.132808 progress 90% (4MB)
40 07:49:07.186233 progress 95% (4MB)
41 07:49:07.217592 progress 100% (5MB)
42 07:49:07.217906 5MB downloaded in 0.74s (6.98MB/s)
43 07:49:07.218068 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:49:07.218326 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:49:07.218418 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:49:07.218508 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:49:07.218617 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:49:07.218688 saving as /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/kernel/bzImage
50 07:49:07.218752 total size: 7131024 (6MB)
51 07:49:07.218816 No compression specified
52 07:49:07.230295 progress 0% (0MB)
53 07:49:07.261019 progress 5% (0MB)
54 07:49:07.294425 progress 10% (0MB)
55 07:49:07.327152 progress 15% (1MB)
56 07:49:07.350302 progress 20% (1MB)
57 07:49:07.368128 progress 25% (1MB)
58 07:49:07.380028 progress 30% (2MB)
59 07:49:07.394078 progress 35% (2MB)
60 07:49:07.406020 progress 40% (2MB)
61 07:49:07.418075 progress 45% (3MB)
62 07:49:07.430479 progress 50% (3MB)
63 07:49:07.443144 progress 55% (3MB)
64 07:49:07.455064 progress 60% (4MB)
65 07:49:07.467165 progress 65% (4MB)
66 07:49:07.479226 progress 70% (4MB)
67 07:49:07.490805 progress 75% (5MB)
68 07:49:07.503878 progress 80% (5MB)
69 07:49:07.514068 progress 85% (5MB)
70 07:49:07.527492 progress 90% (6MB)
71 07:49:07.538816 progress 95% (6MB)
72 07:49:07.550186 progress 100% (6MB)
73 07:49:07.550461 6MB downloaded in 0.33s (20.50MB/s)
74 07:49:07.550617 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:49:07.550860 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:49:07.550951 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:49:07.551040 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:49:07.551147 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/full.rootfs.tar.xz
80 07:49:07.551216 saving as /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/nfsrootfs/full.rootfs.tar
81 07:49:07.551279 total size: 133303528 (127MB)
82 07:49:07.551342 Using unxz to decompress xz
83 07:49:07.598114 progress 0% (0MB)
84 07:49:08.478314 progress 5% (6MB)
85 07:49:09.530807 progress 10% (12MB)
86 07:49:10.687546 progress 15% (19MB)
87 07:49:11.864614 progress 20% (25MB)
88 07:49:12.813209 progress 25% (31MB)
89 07:49:13.615453 progress 30% (38MB)
90 07:49:14.209011 progress 35% (44MB)
91 07:49:14.644597 progress 40% (50MB)
92 07:49:15.084532 progress 45% (57MB)
93 07:49:15.585083 progress 50% (63MB)
94 07:49:16.013505 progress 55% (69MB)
95 07:49:16.389641 progress 60% (76MB)
96 07:49:16.759747 progress 65% (82MB)
97 07:49:17.216808 progress 70% (89MB)
98 07:49:17.594866 progress 75% (95MB)
99 07:49:18.040789 progress 80% (101MB)
100 07:49:18.489872 progress 85% (108MB)
101 07:49:18.771267 progress 90% (114MB)
102 07:49:19.126804 progress 95% (120MB)
103 07:49:19.525548 progress 100% (127MB)
104 07:49:19.530424 127MB downloaded in 11.98s (10.61MB/s)
105 07:49:19.530696 end: 1.3.1 http-download (duration 00:00:12) [common]
107 07:49:19.530991 end: 1.3 download-retry (duration 00:00:12) [common]
108 07:49:19.531101 start: 1.4 download-retry (timeout 00:09:47) [common]
109 07:49:19.531208 start: 1.4.1 http-download (timeout 00:09:47) [common]
110 07:49:19.531340 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:49:19.531419 saving as /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/modules/modules.tar
112 07:49:19.531501 total size: 52060 (0MB)
113 07:49:19.531584 Using unxz to decompress xz
114 07:49:19.820506 progress 62% (0MB)
115 07:49:19.820963 progress 100% (0MB)
116 07:49:19.824293 0MB downloaded in 0.29s (0.17MB/s)
117 07:49:19.824543 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:49:19.824839 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:49:19.824952 start: 1.5 prepare-tftp-overlay (timeout 00:09:47) [common]
121 07:49:19.825067 start: 1.5.1 extract-nfsrootfs (timeout 00:09:47) [common]
122 07:49:21.069591 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119408/extract-nfsrootfs-u8xu9ydh
123 07:49:21.069802 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 07:49:21.069909 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
125 07:49:21.070050 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg
126 07:49:21.070155 makedir: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin
127 07:49:21.070243 makedir: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/tests
128 07:49:21.070330 makedir: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/results
129 07:49:21.070430 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-add-keys
130 07:49:21.070564 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-add-sources
131 07:49:21.070684 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-background-process-start
132 07:49:21.070803 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-background-process-stop
133 07:49:21.070919 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-common-functions
134 07:49:21.071034 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-echo-ipv4
135 07:49:21.071148 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-install-packages
136 07:49:21.071261 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-installed-packages
137 07:49:21.071374 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-os-build
138 07:49:21.071487 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-probe-channel
139 07:49:21.071600 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-probe-ip
140 07:49:21.071713 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-target-ip
141 07:49:21.071825 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-target-mac
142 07:49:21.071938 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-target-storage
143 07:49:21.072054 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-case
144 07:49:21.072169 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-event
145 07:49:21.072285 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-feedback
146 07:49:21.072399 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-raise
147 07:49:21.072512 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-reference
148 07:49:21.072624 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-runner
149 07:49:21.072737 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-set
150 07:49:21.072849 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-test-shell
151 07:49:21.072965 Updating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-install-packages (oe)
152 07:49:21.073083 Updating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/bin/lava-installed-packages (oe)
153 07:49:21.073183 Creating /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/environment
154 07:49:21.073273 LAVA metadata
155 07:49:21.073521 - LAVA_JOB_ID=8119408
156 07:49:21.073592 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:49:21.073700 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:45) [common]
158 07:49:21.073770 skipped lava-vland-overlay
159 07:49:21.073850 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:49:21.073937 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
161 07:49:21.074003 skipped lava-multinode-overlay
162 07:49:21.074080 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:49:21.074168 start: 1.5.2.3 test-definition (timeout 00:09:45) [common]
164 07:49:21.074244 Loading test definitions
165 07:49:21.074340 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:45) [common]
166 07:49:21.074415 Using /lava-8119408 at stage 0
167 07:49:21.074676 uuid=8119408_1.5.2.3.1 testdef=None
168 07:49:21.074770 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 07:49:21.074861 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
170 07:49:21.075337 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 07:49:21.075576 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
173 07:49:21.076151 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 07:49:21.076398 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
176 07:49:21.076942 runner path: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/0/tests/0_dmesg test_uuid 8119408_1.5.2.3.1
177 07:49:21.077090 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 07:49:21.077368 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:45) [common]
180 07:49:21.077448 Using /lava-8119408 at stage 1
181 07:49:21.077692 uuid=8119408_1.5.2.3.5 testdef=None
182 07:49:21.077785 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 07:49:21.077876 start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
184 07:49:21.078322 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 07:49:21.078553 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
187 07:49:21.079130 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 07:49:21.079374 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
190 07:49:21.079923 runner path: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/1/tests/1_bootrr test_uuid 8119408_1.5.2.3.5
191 07:49:21.080067 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 07:49:21.080285 Creating lava-test-runner.conf files
194 07:49:21.080354 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/0 for stage 0
195 07:49:21.080455 - 0_dmesg
196 07:49:21.080546 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119408/lava-overlay-q1dtmytg/lava-8119408/1 for stage 1
197 07:49:21.080632 - 1_bootrr
198 07:49:21.080754 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 07:49:21.080843 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
200 07:49:21.086549 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 07:49:21.086674 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:45) [common]
202 07:49:21.086769 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 07:49:21.086890 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 07:49:21.086995 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:45) [common]
205 07:49:21.188991 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 07:49:21.189363 start: 1.5.4 extract-modules (timeout 00:09:45) [common]
207 07:49:21.189489 extracting modules file /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119408/extract-nfsrootfs-u8xu9ydh
208 07:49:21.193495 extracting modules file /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119408/extract-overlay-ramdisk-d1h33rvo/ramdisk
209 07:49:21.197427 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 07:49:21.197549 start: 1.5.5 apply-overlay-tftp (timeout 00:09:45) [common]
211 07:49:21.197640 [common] Applying overlay to NFS
212 07:49:21.197716 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119408/compress-overlay-8wh4nqmp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119408/extract-nfsrootfs-u8xu9ydh
213 07:49:21.201631 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 07:49:21.201747 start: 1.5.6 configure-preseed-file (timeout 00:09:45) [common]
215 07:49:21.201843 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 07:49:21.201937 start: 1.5.7 compress-ramdisk (timeout 00:09:45) [common]
217 07:49:21.202020 Building ramdisk /var/lib/lava/dispatcher/tmp/8119408/extract-overlay-ramdisk-d1h33rvo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119408/extract-overlay-ramdisk-d1h33rvo/ramdisk
218 07:49:21.235007 >> 24546 blocks
219 07:49:21.742972 rename /var/lib/lava/dispatcher/tmp/8119408/extract-overlay-ramdisk-d1h33rvo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/ramdisk/ramdisk.cpio.gz
220 07:49:21.743374 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 07:49:21.743501 start: 1.5.8 prepare-kernel (timeout 00:09:45) [common]
222 07:49:21.743610 start: 1.5.8.1 prepare-fit (timeout 00:09:45) [common]
223 07:49:21.743718 No mkimage arch provided, not using FIT.
224 07:49:21.743811 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 07:49:21.743903 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 07:49:21.744009 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 07:49:21.744105 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:45) [common]
228 07:49:21.744186 No LXC device requested
229 07:49:21.744278 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 07:49:21.744373 start: 1.7 deploy-device-env (timeout 00:09:45) [common]
231 07:49:21.744461 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 07:49:21.744542 Checking files for TFTP limit of 4294967296 bytes.
233 07:49:21.744930 end: 1 tftp-deploy (duration 00:00:15) [common]
234 07:49:21.745040 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 07:49:21.745144 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 07:49:21.745275 substitutions:
237 07:49:21.745361 - {DTB}: None
238 07:49:21.745431 - {INITRD}: 8119408/tftp-deploy-8s00trru/ramdisk/ramdisk.cpio.gz
239 07:49:21.745496 - {KERNEL}: 8119408/tftp-deploy-8s00trru/kernel/bzImage
240 07:49:21.745558 - {LAVA_MAC}: None
241 07:49:21.745626 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119408/extract-nfsrootfs-u8xu9ydh
242 07:49:21.745688 - {NFS_SERVER_IP}: 192.168.201.1
243 07:49:21.745749 - {PRESEED_CONFIG}: None
244 07:49:21.745807 - {PRESEED_LOCAL}: None
245 07:49:21.745880 - {RAMDISK}: 8119408/tftp-deploy-8s00trru/ramdisk/ramdisk.cpio.gz
246 07:49:21.745950 - {ROOT_PART}: None
247 07:49:21.746009 - {ROOT}: None
248 07:49:21.746067 - {SERVER_IP}: 192.168.201.1
249 07:49:21.746125 - {TEE}: None
250 07:49:21.746190 Parsed boot commands:
251 07:49:21.746247 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 07:49:21.746402 Parsed boot commands: tftpboot 192.168.201.1 8119408/tftp-deploy-8s00trru/kernel/bzImage 8119408/tftp-deploy-8s00trru/kernel/cmdline 8119408/tftp-deploy-8s00trru/ramdisk/ramdisk.cpio.gz
253 07:49:21.746506 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 07:49:21.746599 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 07:49:21.746693 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 07:49:21.746790 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 07:49:21.746863 Not connected, no need to disconnect.
258 07:49:21.746944 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 07:49:21.747040 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 07:49:21.747115 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
261 07:49:21.749649 Setting prompt string to ['lava-test: # ']
262 07:49:21.749944 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 07:49:21.750064 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 07:49:21.750168 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 07:49:21.750265 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 07:49:21.750483 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
267 07:49:21.770340 >> Command sent successfully.
268 07:49:21.772287 Returned 0 in 0 seconds
269 07:49:21.873313 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 07:49:21.874413 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 07:49:21.874808 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 07:49:21.875159 Setting prompt string to 'Starting depthcharge on Voema...'
274 07:49:21.875420 Changing prompt to 'Starting depthcharge on Voema...'
275 07:49:21.875703 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 07:49:21.876630 [Enter `^Ec?' for help]
277 07:49:28.958406
278 07:49:28.958567
279 07:49:28.967840 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 07:49:28.971663 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 07:49:28.974872
282 07:49:28.978242 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
283 07:49:28.981268 CPU: AES supported, TXT NOT supported, VT supported
284 07:49:28.987723 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
285 07:49:28.994202 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
286 07:49:28.997601 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
287 07:49:29.000931 VBOOT: Loading verstage.
288 07:49:29.007377 FMAP: Found "FLASH" version 1.1 at 0x1804000.
289 07:49:29.010928 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 07:49:29.017306 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 07:49:29.024239 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 07:49:29.030672 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 07:49:29.034153
294 07:49:29.034242
295 07:49:29.043929 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 07:49:29.058922 Probing TPM: . done!
297 07:49:29.062102 TPM ready after 0 ms
298 07:49:29.065631 Connected to device vid:did:rid of 1ae0:0028:00
299 07:49:29.076635 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
300 07:49:29.083117 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 07:49:29.087345 Initialized TPM device CR50 revision 0
302 07:49:29.138207 tlcl_send_startup: Startup return code is 0
303 07:49:29.138328 TPM: setup succeeded
304 07:49:29.153668 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 07:49:29.167814 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 07:49:29.180579 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 07:49:29.190390 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 07:49:29.194377 Chrome EC: UHEPI supported
309 07:49:29.197682 Phase 1
310 07:49:29.200691 FMAP: area GBB found @ 1805000 (458752 bytes)
311 07:49:29.210805 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 07:49:29.217272 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 07:49:29.223817 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 07:49:29.230578 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 07:49:29.234094 Recovery requested (1009000e)
316 07:49:29.237302 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 07:49:29.243166
318 07:49:29.249058 tlcl_extend: response is 0
319 07:49:29.255658 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
320 07:49:29.265771 tlcl_extend: response is 0
321 07:49:29.272505 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
322 07:49:29.278793 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
323 07:49:29.285711 BS: verstage times (exec / console): total (unknown) / 142 ms
324 07:49:29.285797
325 07:49:29.285893
326 07:49:29.298751 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
327 07:49:29.305593 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
328 07:49:29.309035 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
329 07:49:29.312206 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
330 07:49:29.318677 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
331 07:49:29.321939 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
332 07:49:29.325507 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
333 07:49:29.328840 TCO_STS: 0000 0000
334 07:49:29.332033 GEN_PMCON: d0015038 00002200
335 07:49:29.334853 GBLRST_CAUSE: 00000000 00000000
336 07:49:29.338655 HPR_CAUSE0: 00000000
337 07:49:29.338743 prev_sleep_state 5
338 07:49:29.341625 Boot Count incremented to 12157
339 07:49:29.348278 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 07:49:29.354725 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 07:49:29.364712 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 07:49:29.371086 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
343 07:49:29.374406 Chrome EC: UHEPI supported
344 07:49:29.380835 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
345 07:49:29.392369 Probing TPM: done!
346 07:49:29.399069 Connected to device vid:did:rid of 1ae0:0028:00
347 07:49:29.409834 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
348 07:49:29.413298 Initialized TPM device CR50 revision 0
349 07:49:29.427574 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
350 07:49:29.434250 MRC: Hash idx 0x100b comparison successful.
351 07:49:29.438060 MRC cache found, size faa8
352 07:49:29.438152 bootmode is set to: 2
353 07:49:29.441046 SPD index = 0
354 07:49:29.447659 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 07:49:29.450584 SPD: module type is LPDDR4X
356 07:49:29.457259 SPD: module part number is MT53E512M64D4NW-046
357 07:49:29.460577 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
358 07:49:29.467637 SPD: device width 16 bits, bus width 16 bits
359 07:49:29.470656 SPD: module size is 1024 MB (per channel)
360 07:49:29.904420 CBMEM:
361 07:49:29.907024 IMD: root @ 0x76fff000 254 entries.
362 07:49:29.910309 IMD: root @ 0x76ffec00 62 entries.
363 07:49:29.913677 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
364 07:49:29.920382 FMAP: area RW_VPD found @ f35000 (8192 bytes)
365 07:49:29.923725 External stage cache:
366 07:49:29.926635 IMD: root @ 0x7b3ff000 254 entries.
367 07:49:29.930042 IMD: root @ 0x7b3fec00 62 entries.
368 07:49:29.945769 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
369 07:49:29.952521 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 07:49:29.959355 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
371 07:49:29.973085 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 07:49:29.979354 cse_lite: Skip switching to RW in the recovery path
373 07:49:29.979449 8 DIMMs found
374 07:49:29.979526 SMM Memory Map
375 07:49:29.982961 SMRAM : 0x7b000000 0x800000
376 07:49:29.986727 Subregion 0: 0x7b000000 0x200000
377 07:49:29.990204 Subregion 1: 0x7b200000 0x200000
378 07:49:29.993380 Subregion 2: 0x7b400000 0x400000
379 07:49:29.996625 top_of_ram = 0x77000000
380 07:49:30.003739 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 07:49:30.006777 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 07:49:30.013582 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
383 07:49:30.016698 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 07:49:30.026976 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
385 07:49:30.032995 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
386 07:49:30.043538 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
387 07:49:30.046814 Processing 211 relocs. Offset value of 0x74c0b000
388 07:49:30.055766 BS: romstage times (exec / console): total (unknown) / 277 ms
389 07:49:30.061927
390 07:49:30.062018
391 07:49:30.071711 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
392 07:49:30.074985 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 07:49:30.085448 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 07:49:30.091431 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 07:49:30.098507 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
396 07:49:30.104532 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
397 07:49:30.151781 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
398 07:49:30.158571 Processing 5008 relocs. Offset value of 0x75d98000
399 07:49:30.161878 BS: postcar times (exec / console): total (unknown) / 59 ms
400 07:49:30.165067
401 07:49:30.165158
402 07:49:30.174986 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
403 07:49:30.175095 Normal boot
404 07:49:30.178037 FW_CONFIG value is 0x804c02
405 07:49:30.181960 PCI: 00:07.0 disabled by fw_config
406 07:49:30.185701 PCI: 00:07.1 disabled by fw_config
407 07:49:30.188976 PCI: 00:0d.2 disabled by fw_config
408 07:49:30.191814 PCI: 00:1c.7 disabled by fw_config
409 07:49:30.198532 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 07:49:30.205176 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 07:49:30.208617 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 07:49:30.211638 GENERIC: 0.0 disabled by fw_config
413 07:49:30.215397 GENERIC: 1.0 disabled by fw_config
414 07:49:30.221687 fw_config match found: DB_USB=USB3_ACTIVE
415 07:49:30.225250 fw_config match found: DB_USB=USB3_ACTIVE
416 07:49:30.228300 fw_config match found: DB_USB=USB3_ACTIVE
417 07:49:30.234875 fw_config match found: DB_USB=USB3_ACTIVE
418 07:49:30.238696 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
419 07:49:30.244783 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
420 07:49:30.254799 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
421 07:49:30.261259 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
422 07:49:30.264919 microcode: sig=0x806c1 pf=0x80 revision=0x86
423 07:49:30.271565 microcode: Update skipped, already up-to-date
424 07:49:30.277716 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
425 07:49:30.305069 Detected 4 core, 8 thread CPU.
426 07:49:30.308542 Setting up SMI for CPU
427 07:49:30.312215 IED base = 0x7b400000
428 07:49:30.312305 IED size = 0x00400000
429 07:49:30.315280
430 07:49:30.315377 Will perform SMM setup.
431 07:49:30.321761 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
432 07:49:30.328935 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
433 07:49:30.334922 Processing 16 relocs. Offset value of 0x00030000
434 07:49:30.338580 Attempting to start 7 APs
435 07:49:30.341819 Waiting for 10ms after sending INIT.
436 07:49:30.357875 Waiting for 1st SIPI to complete...done.
437 07:49:30.357963 AP: slot 1 apic_id 1.
438 07:49:30.360982 AP: slot 7 apic_id 6.
439 07:49:30.364151 Waiting for 2nd SIPI to complete...done.
440 07:49:30.367396 AP: slot 3 apic_id 7.
441 07:49:30.370854 AP: slot 4 apic_id 5.
442 07:49:30.370942 AP: slot 5 apic_id 4.
443 07:49:30.373790 AP: slot 2 apic_id 3.
444 07:49:30.377330 AP: slot 6 apic_id 2.
445 07:49:30.383699 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
446 07:49:30.390650 Processing 13 relocs. Offset value of 0x00038000
447 07:49:30.393841 Unable to locate Global NVS
448 07:49:30.400368 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
449 07:49:30.404275 Installing permanent SMM handler to 0x7b000000
450 07:49:30.413548 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
451 07:49:30.417053 Processing 794 relocs. Offset value of 0x7b010000
452 07:49:30.426989 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
453 07:49:30.430125 Processing 13 relocs. Offset value of 0x7b008000
454 07:49:30.437014 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
455 07:49:30.443311 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
456 07:49:30.446786 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
457 07:49:30.450232
458 07:49:30.453687 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
459 07:49:30.460125 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
460 07:49:30.467084 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
461 07:49:30.473206 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
462 07:49:30.476858 Unable to locate Global NVS
463 07:49:30.483463 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
464 07:49:30.486485 Clearing SMI status registers
465 07:49:30.486579 SMI_STS: PM1
466 07:49:30.489889
467 07:49:30.490015 PM1_STS: PWRBTN
468 07:49:30.496473 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 07:49:30.499909 In relocation handler: CPU 0
470 07:49:30.503327 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 07:49:30.509678 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 07:49:30.513414 Relocation complete.
473 07:49:30.519731 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 07:49:30.522665 In relocation handler: CPU 1
475 07:49:30.526245 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 07:49:30.526334 Relocation complete.
477 07:49:30.529239
478 07:49:30.536049 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
479 07:49:30.539397 In relocation handler: CPU 6
480 07:49:30.542619 New SMBASE=0x7affe800 IEDBASE=0x7b400000
481 07:49:30.546090 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 07:49:30.549366 Relocation complete.
483 07:49:30.555717 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
484 07:49:30.559399 In relocation handler: CPU 2
485 07:49:30.562190 New SMBASE=0x7afff800 IEDBASE=0x7b400000
486 07:49:30.565939 Relocation complete.
487 07:49:30.572344 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 07:49:30.575836 In relocation handler: CPU 5
489 07:49:30.579255 New SMBASE=0x7affec00 IEDBASE=0x7b400000
490 07:49:30.585422 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 07:49:30.585511 Relocation complete.
492 07:49:30.595635 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
493 07:49:30.595739 In relocation handler: CPU 4
494 07:49:30.598776
495 07:49:30.602275 New SMBASE=0x7afff000 IEDBASE=0x7b400000
496 07:49:30.602364 Relocation complete.
497 07:49:30.611873 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
498 07:49:30.611961 In relocation handler: CPU 3
499 07:49:30.618711 New SMBASE=0x7afff400 IEDBASE=0x7b400000
500 07:49:30.618795 Relocation complete.
501 07:49:30.628702 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
502 07:49:30.628789 In relocation handler: CPU 7
503 07:49:30.635112 New SMBASE=0x7affe400 IEDBASE=0x7b400000
504 07:49:30.638417 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 07:49:30.641792 Relocation complete.
506 07:49:30.641869 Initializing CPU #0
507 07:49:30.645738 CPU: vendor Intel device 806c1
508 07:49:30.652630 CPU: family 06, model 8c, stepping 01
509 07:49:30.652723 Clearing out pending MCEs
510 07:49:30.656260 Setting up local APIC...
511 07:49:30.659936 apic_id: 0x00 done.
512 07:49:30.660029 Turbo is available but hidden
513 07:49:30.663304 Turbo is available and visible
514 07:49:30.670031 microcode: Update skipped, already up-to-date
515 07:49:30.670137 CPU #0 initialized
516 07:49:30.673072 Initializing CPU #2
517 07:49:30.676449 Initializing CPU #6
518 07:49:30.676535 Initializing CPU #5
519 07:49:30.679768 Initializing CPU #4
520 07:49:30.682861 CPU: vendor Intel device 806c1
521 07:49:30.686093 CPU: family 06, model 8c, stepping 01
522 07:49:30.689949 CPU: vendor Intel device 806c1
523 07:49:30.692833 CPU: family 06, model 8c, stepping 01
524 07:49:30.696411 Clearing out pending MCEs
525 07:49:30.699514 Clearing out pending MCEs
526 07:49:30.699596 Setting up local APIC...
527 07:49:30.702981 Initializing CPU #1
528 07:49:30.706352 Initializing CPU #7
529 07:49:30.706435 Initializing CPU #3
530 07:49:30.709427 CPU: vendor Intel device 806c1
531 07:49:30.712762 CPU: family 06, model 8c, stepping 01
532 07:49:30.715799 CPU: vendor Intel device 806c1
533 07:49:30.719316 CPU: family 06, model 8c, stepping 01
534 07:49:30.722746
535 07:49:30.722835 Clearing out pending MCEs
536 07:49:30.726118 Clearing out pending MCEs
537 07:49:30.729446 Setting up local APIC...
538 07:49:30.732528 CPU: vendor Intel device 806c1
539 07:49:30.735818 CPU: family 06, model 8c, stepping 01
540 07:49:30.739289 CPU: vendor Intel device 806c1
541 07:49:30.742240 CPU: family 06, model 8c, stepping 01
542 07:49:30.745499 Clearing out pending MCEs
543 07:49:30.749067 Clearing out pending MCEs
544 07:49:30.749151 Setting up local APIC...
545 07:49:30.752485 apic_id: 0x06 done.
546 07:49:30.755752 Setting up local APIC...
547 07:49:30.758819 CPU: vendor Intel device 806c1
548 07:49:30.762285 CPU: family 06, model 8c, stepping 01
549 07:49:30.765634 apic_id: 0x05 done.
550 07:49:30.765723 apic_id: 0x04 done.
551 07:49:30.772573 microcode: Update skipped, already up-to-date
552 07:49:30.775273 microcode: Update skipped, already up-to-date
553 07:49:30.778873 CPU #4 initialized
554 07:49:30.778973 CPU #5 initialized
555 07:49:30.781955 apic_id: 0x03 done.
556 07:49:30.785335 Setting up local APIC...
557 07:49:30.785423 Clearing out pending MCEs
558 07:49:30.788885 apic_id: 0x02 done.
559 07:49:30.791802 microcode: Update skipped, already up-to-date
560 07:49:30.798643 microcode: Update skipped, already up-to-date
561 07:49:30.798733 CPU #2 initialized
562 07:49:30.801569 CPU #6 initialized
563 07:49:30.804946 Setting up local APIC...
564 07:49:30.808640 microcode: Update skipped, already up-to-date
565 07:49:30.811979 Setting up local APIC...
566 07:49:30.814881 apic_id: 0x01 done.
567 07:49:30.814969 apic_id: 0x07 done.
568 07:49:30.818240 CPU #7 initialized
569 07:49:30.821956 microcode: Update skipped, already up-to-date
570 07:49:30.828106 microcode: Update skipped, already up-to-date
571 07:49:30.828195 CPU #3 initialized
572 07:49:30.831489 CPU #1 initialized
573 07:49:30.835007 bsp_do_flight_plan done after 466 msecs.
574 07:49:30.838483 CPU: frequency set to 4000 MHz
575 07:49:30.838565 Enabling SMIs.
576 07:49:30.844631 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
577 07:49:30.862266 SATAXPCIE1 indicates PCIe NVMe is present
578 07:49:30.865862 Probing TPM: done!
579 07:49:30.869235 Connected to device vid:did:rid of 1ae0:0028:00
580 07:49:30.879468 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
581 07:49:30.882593 Initialized TPM device CR50 revision 0
582 07:49:30.886087 Enabling S0i3.4
583 07:49:30.892721 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
584 07:49:30.896498 Found a VBT of 8704 bytes after decompression
585 07:49:30.902663 cse_lite: CSE RO boot. HybridStorageMode disabled
586 07:49:30.908901 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
587 07:49:30.984079 FSPS returned 0
588 07:49:30.987628 Executing Phase 1 of FspMultiPhaseSiInit
589 07:49:30.997288 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
590 07:49:31.000683 port C0 DISC req: usage 1 usb3 1 usb2 5
591 07:49:31.003976 Raw Buffer output 0 00000511
592 07:49:31.007463 Raw Buffer output 1 00000000
593 07:49:31.010934 pmc_send_ipc_cmd succeeded
594 07:49:31.017980 port C1 DISC req: usage 1 usb3 2 usb2 3
595 07:49:31.018079 Raw Buffer output 0 00000321
596 07:49:31.020838 Raw Buffer output 1 00000000
597 07:49:31.026053 pmc_send_ipc_cmd succeeded
598 07:49:31.030319 Detected 4 core, 8 thread CPU.
599 07:49:31.033848 Detected 4 core, 8 thread CPU.
600 07:49:31.267733 Display FSP Version Info HOB
601 07:49:31.271750 Reference Code - CPU = a.0.4c.31
602 07:49:31.274616 uCode Version = 0.0.0.86
603 07:49:31.277746 TXT ACM version = ff.ff.ff.ffff
604 07:49:31.281213 Reference Code - ME = a.0.4c.31
605 07:49:31.284454 MEBx version = 0.0.0.0
606 07:49:31.287994 ME Firmware Version = Consumer SKU
607 07:49:31.291022 Reference Code - PCH = a.0.4c.31
608 07:49:31.294705 PCH-CRID Status = Disabled
609 07:49:31.298015 PCH-CRID Original Value = ff.ff.ff.ffff
610 07:49:31.301032 PCH-CRID New Value = ff.ff.ff.ffff
611 07:49:31.304152 OPROM - RST - RAID = ff.ff.ff.ffff
612 07:49:31.307924 PCH Hsio Version = 4.0.0.0
613 07:49:31.310746 Reference Code - SA - System Agent = a.0.4c.31
614 07:49:31.314694 Reference Code - MRC = 2.0.0.1
615 07:49:31.317502 SA - PCIe Version = a.0.4c.31
616 07:49:31.320958 SA-CRID Status = Disabled
617 07:49:31.324662 SA-CRID Original Value = 0.0.0.1
618 07:49:31.327673 SA-CRID New Value = 0.0.0.1
619 07:49:31.331303 OPROM - VBIOS = ff.ff.ff.ffff
620 07:49:31.334291 IO Manageability Engine FW Version = 11.1.4.0
621 07:49:31.337390 PHY Build Version = 0.0.0.e0
622 07:49:31.341137 Thunderbolt(TM) FW Version = 0.0.0.0
623 07:49:31.347457 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
624 07:49:31.350849 ITSS IRQ Polarities Before:
625 07:49:31.350942 IPC0: 0xffffffff
626 07:49:31.354185 IPC1: 0xffffffff
627 07:49:31.354264 IPC2: 0xffffffff
628 07:49:31.357187 IPC3: 0xffffffff
629 07:49:31.360468 ITSS IRQ Polarities After:
630 07:49:31.360558 IPC0: 0xffffffff
631 07:49:31.363954 IPC1: 0xffffffff
632 07:49:31.364046 IPC2: 0xffffffff
633 07:49:31.366905 IPC3: 0xffffffff
634 07:49:31.370132 Found PCIe Root Port #9 at PCI: 00:1d.0.
635 07:49:31.383428 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
636 07:49:31.393786 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
637 07:49:31.406683 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
638 07:49:31.413552 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
639 07:49:31.416393 Enumerating buses...
640 07:49:31.419923 Show all devs... Before device enumeration.
641 07:49:31.423419 Root Device: enabled 1
642 07:49:31.423504 DOMAIN: 0000: enabled 1
643 07:49:31.426593 CPU_CLUSTER: 0: enabled 1
644 07:49:31.429817 PCI: 00:00.0: enabled 1
645 07:49:31.432829 PCI: 00:02.0: enabled 1
646 07:49:31.436529 PCI: 00:04.0: enabled 1
647 07:49:31.436620 PCI: 00:05.0: enabled 1
648 07:49:31.440017 PCI: 00:06.0: enabled 0
649 07:49:31.442631 PCI: 00:07.0: enabled 0
650 07:49:31.445952 PCI: 00:07.1: enabled 0
651 07:49:31.446040 PCI: 00:07.2: enabled 0
652 07:49:31.449311 PCI: 00:07.3: enabled 0
653 07:49:31.453140 PCI: 00:08.0: enabled 1
654 07:49:31.453231 PCI: 00:09.0: enabled 0
655 07:49:31.455997 PCI: 00:0a.0: enabled 0
656 07:49:31.459373 PCI: 00:0d.0: enabled 1
657 07:49:31.462554 PCI: 00:0d.1: enabled 0
658 07:49:31.462645 PCI: 00:0d.2: enabled 0
659 07:49:31.465888 PCI: 00:0d.3: enabled 0
660 07:49:31.469199 PCI: 00:0e.0: enabled 0
661 07:49:31.472592 PCI: 00:10.2: enabled 1
662 07:49:31.472682 PCI: 00:10.6: enabled 0
663 07:49:31.475794 PCI: 00:10.7: enabled 0
664 07:49:31.478985 PCI: 00:12.0: enabled 0
665 07:49:31.482185 PCI: 00:12.6: enabled 0
666 07:49:31.482274 PCI: 00:13.0: enabled 0
667 07:49:31.485539 PCI: 00:14.0: enabled 1
668 07:49:31.488709 PCI: 00:14.1: enabled 0
669 07:49:31.492311 PCI: 00:14.2: enabled 1
670 07:49:31.492404 PCI: 00:14.3: enabled 1
671 07:49:31.495455 PCI: 00:15.0: enabled 1
672 07:49:31.499029 PCI: 00:15.1: enabled 1
673 07:49:31.502248 PCI: 00:15.2: enabled 1
674 07:49:31.502337 PCI: 00:15.3: enabled 1
675 07:49:31.505378 PCI: 00:16.0: enabled 1
676 07:49:31.508736 PCI: 00:16.1: enabled 0
677 07:49:31.512055 PCI: 00:16.2: enabled 0
678 07:49:31.512147 PCI: 00:16.3: enabled 0
679 07:49:31.515850 PCI: 00:16.4: enabled 0
680 07:49:31.518524 PCI: 00:16.5: enabled 0
681 07:49:31.518614 PCI: 00:17.0: enabled 1
682 07:49:31.522455 PCI: 00:19.0: enabled 0
683 07:49:31.525343 PCI: 00:19.1: enabled 1
684 07:49:31.528431 PCI: 00:19.2: enabled 0
685 07:49:31.528522 PCI: 00:1c.0: enabled 1
686 07:49:31.531907 PCI: 00:1c.1: enabled 0
687 07:49:31.535293 PCI: 00:1c.2: enabled 0
688 07:49:31.538778 PCI: 00:1c.3: enabled 0
689 07:49:31.538869 PCI: 00:1c.4: enabled 0
690 07:49:31.542010 PCI: 00:1c.5: enabled 0
691 07:49:31.545007 PCI: 00:1c.6: enabled 1
692 07:49:31.548228 PCI: 00:1c.7: enabled 0
693 07:49:31.548310 PCI: 00:1d.0: enabled 1
694 07:49:31.551995 PCI: 00:1d.1: enabled 0
695 07:49:31.555216 PCI: 00:1d.2: enabled 1
696 07:49:31.558781 PCI: 00:1d.3: enabled 0
697 07:49:31.558867 PCI: 00:1e.0: enabled 1
698 07:49:31.561763 PCI: 00:1e.1: enabled 0
699 07:49:31.564918 PCI: 00:1e.2: enabled 1
700 07:49:31.568150 PCI: 00:1e.3: enabled 1
701 07:49:31.568240 PCI: 00:1f.0: enabled 1
702 07:49:31.571368 PCI: 00:1f.1: enabled 0
703 07:49:31.574687 PCI: 00:1f.2: enabled 1
704 07:49:31.574770 PCI: 00:1f.3: enabled 1
705 07:49:31.578348 PCI: 00:1f.4: enabled 0
706 07:49:31.581547 PCI: 00:1f.5: enabled 1
707 07:49:31.584876 PCI: 00:1f.6: enabled 0
708 07:49:31.584958 PCI: 00:1f.7: enabled 0
709 07:49:31.588084 APIC: 00: enabled 1
710 07:49:31.591671 GENERIC: 0.0: enabled 1
711 07:49:31.591766 GENERIC: 0.0: enabled 1
712 07:49:31.594571
713 07:49:31.594660 GENERIC: 1.0: enabled 1
714 07:49:31.598189 GENERIC: 0.0: enabled 1
715 07:49:31.601626 GENERIC: 1.0: enabled 1
716 07:49:31.601715 USB0 port 0: enabled 1
717 07:49:31.604453 GENERIC: 0.0: enabled 1
718 07:49:31.608125 USB0 port 0: enabled 1
719 07:49:31.611308 GENERIC: 0.0: enabled 1
720 07:49:31.611393 I2C: 00:1a: enabled 1
721 07:49:31.614354 I2C: 00:31: enabled 1
722 07:49:31.617807 I2C: 00:32: enabled 1
723 07:49:31.617897 I2C: 00:10: enabled 1
724 07:49:31.621092 I2C: 00:15: enabled 1
725 07:49:31.624559 GENERIC: 0.0: enabled 0
726 07:49:31.624642 GENERIC: 1.0: enabled 0
727 07:49:31.627738
728 07:49:31.627814 GENERIC: 0.0: enabled 1
729 07:49:31.631132 SPI: 00: enabled 1
730 07:49:31.631218 SPI: 00: enabled 1
731 07:49:31.634367 PNP: 0c09.0: enabled 1
732 07:49:31.637677 GENERIC: 0.0: enabled 1
733 07:49:31.640906 USB3 port 0: enabled 1
734 07:49:31.640991 USB3 port 1: enabled 1
735 07:49:31.644483 USB3 port 2: enabled 0
736 07:49:31.647890 USB3 port 3: enabled 0
737 07:49:31.647966 USB2 port 0: enabled 0
738 07:49:31.651177 USB2 port 1: enabled 1
739 07:49:31.654504 USB2 port 2: enabled 1
740 07:49:31.657555 USB2 port 3: enabled 0
741 07:49:31.657640 USB2 port 4: enabled 1
742 07:49:31.660803 USB2 port 5: enabled 0
743 07:49:31.664475 USB2 port 6: enabled 0
744 07:49:31.664558 USB2 port 7: enabled 0
745 07:49:31.667663 USB2 port 8: enabled 0
746 07:49:31.671039 USB2 port 9: enabled 0
747 07:49:31.671118 USB3 port 0: enabled 0
748 07:49:31.674161 USB3 port 1: enabled 1
749 07:49:31.677597 USB3 port 2: enabled 0
750 07:49:31.680975 USB3 port 3: enabled 0
751 07:49:31.681056 GENERIC: 0.0: enabled 1
752 07:49:31.684249 GENERIC: 1.0: enabled 1
753 07:49:31.687567 APIC: 01: enabled 1
754 07:49:31.687642 APIC: 03: enabled 1
755 07:49:31.690876 APIC: 07: enabled 1
756 07:49:31.694099 APIC: 05: enabled 1
757 07:49:31.694181 APIC: 04: enabled 1
758 07:49:31.697159 APIC: 02: enabled 1
759 07:49:31.697242 APIC: 06: enabled 1
760 07:49:31.700633 Compare with tree...
761 07:49:31.704140 Root Device: enabled 1
762 07:49:31.707386 DOMAIN: 0000: enabled 1
763 07:49:31.707477 PCI: 00:00.0: enabled 1
764 07:49:31.710450 PCI: 00:02.0: enabled 1
765 07:49:31.713786 PCI: 00:04.0: enabled 1
766 07:49:31.717232 GENERIC: 0.0: enabled 1
767 07:49:31.720436 PCI: 00:05.0: enabled 1
768 07:49:31.720516 PCI: 00:06.0: enabled 0
769 07:49:31.723502 PCI: 00:07.0: enabled 0
770 07:49:31.726791 GENERIC: 0.0: enabled 1
771 07:49:31.730258 PCI: 00:07.1: enabled 0
772 07:49:31.733533 GENERIC: 1.0: enabled 1
773 07:49:31.733612 PCI: 00:07.2: enabled 0
774 07:49:31.737185 GENERIC: 0.0: enabled 1
775 07:49:31.740483 PCI: 00:07.3: enabled 0
776 07:49:31.743741 GENERIC: 1.0: enabled 1
777 07:49:31.747134 PCI: 00:08.0: enabled 1
778 07:49:31.747240 PCI: 00:09.0: enabled 0
779 07:49:31.750165
780 07:49:31.750254 PCI: 00:0a.0: enabled 0
781 07:49:31.753577 PCI: 00:0d.0: enabled 1
782 07:49:31.756690 USB0 port 0: enabled 1
783 07:49:31.760225 USB3 port 0: enabled 1
784 07:49:31.763462 USB3 port 1: enabled 1
785 07:49:31.763545 USB3 port 2: enabled 0
786 07:49:31.766776 USB3 port 3: enabled 0
787 07:49:31.769924 PCI: 00:0d.1: enabled 0
788 07:49:31.774078 PCI: 00:0d.2: enabled 0
789 07:49:31.776842 GENERIC: 0.0: enabled 1
790 07:49:31.776928 PCI: 00:0d.3: enabled 0
791 07:49:31.780004 PCI: 00:0e.0: enabled 0
792 07:49:31.783573 PCI: 00:10.2: enabled 1
793 07:49:31.786672 PCI: 00:10.6: enabled 0
794 07:49:31.790079 PCI: 00:10.7: enabled 0
795 07:49:31.790162 PCI: 00:12.0: enabled 0
796 07:49:31.793436 PCI: 00:12.6: enabled 0
797 07:49:31.796260 PCI: 00:13.0: enabled 0
798 07:49:31.799743 PCI: 00:14.0: enabled 1
799 07:49:31.803177 USB0 port 0: enabled 1
800 07:49:31.803259 USB2 port 0: enabled 0
801 07:49:31.806210 USB2 port 1: enabled 1
802 07:49:31.809753 USB2 port 2: enabled 1
803 07:49:31.813042 USB2 port 3: enabled 0
804 07:49:31.816567 USB2 port 4: enabled 1
805 07:49:31.819790 USB2 port 5: enabled 0
806 07:49:31.819881 USB2 port 6: enabled 0
807 07:49:31.822849 USB2 port 7: enabled 0
808 07:49:31.826399 USB2 port 8: enabled 0
809 07:49:31.829896 USB2 port 9: enabled 0
810 07:49:31.832909 USB3 port 0: enabled 0
811 07:49:31.832986 USB3 port 1: enabled 1
812 07:49:31.836124
813 07:49:31.836209 USB3 port 2: enabled 0
814 07:49:31.839710 USB3 port 3: enabled 0
815 07:49:31.843072 PCI: 00:14.1: enabled 0
816 07:49:31.845991 PCI: 00:14.2: enabled 1
817 07:49:31.849329 PCI: 00:14.3: enabled 1
818 07:49:31.849414 GENERIC: 0.0: enabled 1
819 07:49:31.852809 PCI: 00:15.0: enabled 1
820 07:49:31.855862 I2C: 00:1a: enabled 1
821 07:49:31.859228 I2C: 00:31: enabled 1
822 07:49:31.859324 I2C: 00:32: enabled 1
823 07:49:31.862598 PCI: 00:15.1: enabled 1
824 07:49:31.866064 I2C: 00:10: enabled 1
825 07:49:31.869527 PCI: 00:15.2: enabled 1
826 07:49:31.873002 PCI: 00:15.3: enabled 1
827 07:49:31.873086 PCI: 00:16.0: enabled 1
828 07:49:31.876166 PCI: 00:16.1: enabled 0
829 07:49:31.879201 PCI: 00:16.2: enabled 0
830 07:49:31.882578 PCI: 00:16.3: enabled 0
831 07:49:31.885979 PCI: 00:16.4: enabled 0
832 07:49:31.886063 PCI: 00:16.5: enabled 0
833 07:49:31.889504 PCI: 00:17.0: enabled 1
834 07:49:31.892891 PCI: 00:19.0: enabled 0
835 07:49:31.895882 PCI: 00:19.1: enabled 1
836 07:49:31.899904 I2C: 00:15: enabled 1
837 07:49:31.899994 PCI: 00:19.2: enabled 0
838 07:49:31.903489 PCI: 00:1d.0: enabled 1
839 07:49:31.953225 GENERIC: 0.0: enabled 1
840 07:49:31.953354 PCI: 00:1e.0: enabled 1
841 07:49:31.953430 PCI: 00:1e.1: enabled 0
842 07:49:31.953751 PCI: 00:1e.2: enabled 1
843 07:49:31.953830 SPI: 00: enabled 1
844 07:49:31.954092 PCI: 00:1e.3: enabled 1
845 07:49:31.954166 SPI: 00: enabled 1
846 07:49:31.954229 PCI: 00:1f.0: enabled 1
847 07:49:31.954566 PNP: 0c09.0: enabled 1
848 07:49:31.954638 PCI: 00:1f.1: enabled 0
849 07:49:31.954957 PCI: 00:1f.2: enabled 1
850 07:49:31.955032 GENERIC: 0.0: enabled 1
851 07:49:31.955289 GENERIC: 0.0: enabled 1
852 07:49:31.955375 GENERIC: 1.0: enabled 1
853 07:49:31.955474 PCI: 00:1f.3: enabled 1
854 07:49:31.955736
855 07:49:31.955805 PCI: 00:1f.4: enabled 0
856 07:49:31.955873 PCI: 00:1f.5: enabled 1
857 07:49:31.955936 PCI: 00:1f.6: enabled 0
858 07:49:31.955995 PCI: 00:1f.7: enabled 0
859 07:49:31.986250 CPU_CLUSTER: 0: enabled 1
860 07:49:31.986351 APIC: 00: enabled 1
861 07:49:31.986424 APIC: 01: enabled 1
862 07:49:31.986692 APIC: 03: enabled 1
863 07:49:31.986766 APIC: 07: enabled 1
864 07:49:31.986830 APIC: 05: enabled 1
865 07:49:31.987085 APIC: 04: enabled 1
866 07:49:31.987158 APIC: 02: enabled 1
867 07:49:31.987223 APIC: 06: enabled 1
868 07:49:31.987478
869 07:49:31.987551 Root Device scanning...
870 07:49:31.987616 scan_static_bus for Root Device
871 07:49:31.987680 DOMAIN: 0000 enabled
872 07:49:31.987740 CPU_CLUSTER: 0 enabled
873 07:49:31.990397 DOMAIN: 0000 scanning...
874 07:49:31.990478 PCI: pci_scan_bus for bus 00
875 07:49:31.993844 PCI: 00:00.0 [8086/0000] ops
876 07:49:31.997247 PCI: 00:00.0 [8086/9a12] enabled
877 07:49:32.000044 PCI: 00:02.0 [8086/0000] bus ops
878 07:49:32.003543 PCI: 00:02.0 [8086/9a40] enabled
879 07:49:32.007119 PCI: 00:04.0 [8086/0000] bus ops
880 07:49:32.010290 PCI: 00:04.0 [8086/9a03] enabled
881 07:49:32.013555 PCI: 00:05.0 [8086/9a19] enabled
882 07:49:32.016798 PCI: 00:07.0 [0000/0000] hidden
883 07:49:32.020155 PCI: 00:08.0 [8086/9a11] enabled
884 07:49:32.023160 PCI: 00:0a.0 [8086/9a0d] disabled
885 07:49:32.026744 PCI: 00:0d.0 [8086/0000] bus ops
886 07:49:32.029693 PCI: 00:0d.0 [8086/9a13] enabled
887 07:49:32.033076 PCI: 00:14.0 [8086/0000] bus ops
888 07:49:32.036278 PCI: 00:14.0 [8086/a0ed] enabled
889 07:49:32.039807 PCI: 00:14.2 [8086/a0ef] enabled
890 07:49:32.042821 PCI: 00:14.3 [8086/0000] bus ops
891 07:49:32.046158 PCI: 00:14.3 [8086/a0f0] enabled
892 07:49:32.049530 PCI: 00:15.0 [8086/0000] bus ops
893 07:49:32.053021 PCI: 00:15.0 [8086/a0e8] enabled
894 07:49:32.056163 PCI: 00:15.1 [8086/0000] bus ops
895 07:49:32.059169 PCI: 00:15.1 [8086/a0e9] enabled
896 07:49:32.062800 PCI: 00:15.2 [8086/0000] bus ops
897 07:49:32.066280 PCI: 00:15.2 [8086/a0ea] enabled
898 07:49:32.069395 PCI: 00:15.3 [8086/0000] bus ops
899 07:49:32.072785 PCI: 00:15.3 [8086/a0eb] enabled
900 07:49:32.075738 PCI: 00:16.0 [8086/0000] ops
901 07:49:32.079095 PCI: 00:16.0 [8086/a0e0] enabled
902 07:49:32.085953 PCI: Static device PCI: 00:17.0 not found, disabling it.
903 07:49:32.088978 PCI: 00:19.0 [8086/0000] bus ops
904 07:49:32.092300 PCI: 00:19.0 [8086/a0c5] disabled
905 07:49:32.095597 PCI: 00:19.1 [8086/0000] bus ops
906 07:49:32.098674 PCI: 00:19.1 [8086/a0c6] enabled
907 07:49:32.102269 PCI: 00:1d.0 [8086/0000] bus ops
908 07:49:32.105281 PCI: 00:1d.0 [8086/a0b0] enabled
909 07:49:32.109116 PCI: 00:1e.0 [8086/0000] ops
910 07:49:32.112383 PCI: 00:1e.0 [8086/a0a8] enabled
911 07:49:32.115400 PCI: 00:1e.2 [8086/0000] bus ops
912 07:49:32.118520 PCI: 00:1e.2 [8086/a0aa] enabled
913 07:49:32.121700 PCI: 00:1e.3 [8086/0000] bus ops
914 07:49:32.124984 PCI: 00:1e.3 [8086/a0ab] enabled
915 07:49:32.128514 PCI: 00:1f.0 [8086/0000] bus ops
916 07:49:32.131945 PCI: 00:1f.0 [8086/a087] enabled
917 07:49:32.135086 RTC Init
918 07:49:32.138605 Set power on after power failure.
919 07:49:32.138691 Disabling Deep S3
920 07:49:32.141528 Disabling Deep S3
921 07:49:32.141613 Disabling Deep S4
922 07:49:32.144933 Disabling Deep S4
923 07:49:32.148083 Disabling Deep S5
924 07:49:32.148183 Disabling Deep S5
925 07:49:32.151578 PCI: 00:1f.2 [0000/0000] hidden
926 07:49:32.154780 PCI: 00:1f.3 [8086/0000] bus ops
927 07:49:32.158057 PCI: 00:1f.3 [8086/a0c8] enabled
928 07:49:32.161457 PCI: 00:1f.5 [8086/0000] bus ops
929 07:49:32.164643 PCI: 00:1f.5 [8086/a0a4] enabled
930 07:49:32.168079 PCI: Leftover static devices:
931 07:49:32.168166 PCI: 00:10.2
932 07:49:32.171403
933 07:49:32.171478 PCI: 00:10.6
934 07:49:32.171553 PCI: 00:10.7
935 07:49:32.174544 PCI: 00:06.0
936 07:49:32.174631 PCI: 00:07.1
937 07:49:32.178113 PCI: 00:07.2
938 07:49:32.178191 PCI: 00:07.3
939 07:49:32.178260 PCI: 00:09.0
940 07:49:32.181230 PCI: 00:0d.1
941 07:49:32.181306 PCI: 00:0d.2
942 07:49:32.184256 PCI: 00:0d.3
943 07:49:32.184403 PCI: 00:0e.0
944 07:49:32.187646 PCI: 00:12.0
945 07:49:32.187726 PCI: 00:12.6
946 07:49:32.187802 PCI: 00:13.0
947 07:49:32.191308 PCI: 00:14.1
948 07:49:32.191399 PCI: 00:16.1
949 07:49:32.194157 PCI: 00:16.2
950 07:49:32.194234 PCI: 00:16.3
951 07:49:32.194300 PCI: 00:16.4
952 07:49:32.197743 PCI: 00:16.5
953 07:49:32.197825 PCI: 00:17.0
954 07:49:32.200625 PCI: 00:19.2
955 07:49:32.200709 PCI: 00:1e.1
956 07:49:32.203883 PCI: 00:1f.1
957 07:49:32.203961 PCI: 00:1f.4
958 07:49:32.204026 PCI: 00:1f.6
959 07:49:32.207446 PCI: 00:1f.7
960 07:49:32.210606 PCI: Check your devicetree.cb.
961 07:49:32.210689 PCI: 00:02.0 scanning...
962 07:49:32.213781
963 07:49:32.217195 scan_generic_bus for PCI: 00:02.0
964 07:49:32.220110 scan_generic_bus for PCI: 00:02.0 done
965 07:49:32.223519 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
966 07:49:32.226912 PCI: 00:04.0 scanning...
967 07:49:32.230555 scan_generic_bus for PCI: 00:04.0
968 07:49:32.233571 GENERIC: 0.0 enabled
969 07:49:32.240357 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
970 07:49:32.243617 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
971 07:49:32.246830 PCI: 00:0d.0 scanning...
972 07:49:32.249988 scan_static_bus for PCI: 00:0d.0
973 07:49:32.253492 USB0 port 0 enabled
974 07:49:32.253583 USB0 port 0 scanning...
975 07:49:32.257075 scan_static_bus for USB0 port 0
976 07:49:32.259783 USB3 port 0 enabled
977 07:49:32.263224 USB3 port 1 enabled
978 07:49:32.263349 USB3 port 2 disabled
979 07:49:32.266739 USB3 port 3 disabled
980 07:49:32.269658 USB3 port 0 scanning...
981 07:49:32.273070 scan_static_bus for USB3 port 0
982 07:49:32.276477 scan_static_bus for USB3 port 0 done
983 07:49:32.280041 scan_bus: bus USB3 port 0 finished in 6 msecs
984 07:49:32.283002 USB3 port 1 scanning...
985 07:49:32.286381 scan_static_bus for USB3 port 1
986 07:49:32.289722 scan_static_bus for USB3 port 1 done
987 07:49:32.293091 scan_bus: bus USB3 port 1 finished in 6 msecs
988 07:49:32.296540
989 07:49:32.300035 scan_static_bus for USB0 port 0 done
990 07:49:32.302779 scan_bus: bus USB0 port 0 finished in 43 msecs
991 07:49:32.306345 scan_static_bus for PCI: 00:0d.0 done
992 07:49:32.312968 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
993 07:49:32.313068 PCI: 00:14.0 scanning...
994 07:49:32.316018 scan_static_bus for PCI: 00:14.0
995 07:49:32.319193
996 07:49:32.319281 USB0 port 0 enabled
997 07:49:32.322971 USB0 port 0 scanning...
998 07:49:32.325846 scan_static_bus for USB0 port 0
999 07:49:32.329476 USB2 port 0 disabled
1000 07:49:32.329562 USB2 port 1 enabled
1001 07:49:32.332739 USB2 port 2 enabled
1002 07:49:32.332824 USB2 port 3 disabled
1003 07:49:32.336261 USB2 port 4 enabled
1004 07:49:32.339464 USB2 port 5 disabled
1005 07:49:32.339549 USB2 port 6 disabled
1006 07:49:32.342702 USB2 port 7 disabled
1007 07:49:32.345843 USB2 port 8 disabled
1008 07:49:32.345928 USB2 port 9 disabled
1009 07:49:32.349217 USB3 port 0 disabled
1010 07:49:32.352916 USB3 port 1 enabled
1011 07:49:32.353002 USB3 port 2 disabled
1012 07:49:32.356161 USB3 port 3 disabled
1013 07:49:32.359015 USB2 port 1 scanning...
1014 07:49:32.362334 scan_static_bus for USB2 port 1
1015 07:49:32.365650 scan_static_bus for USB2 port 1 done
1016 07:49:32.369094 scan_bus: bus USB2 port 1 finished in 6 msecs
1017 07:49:32.372525 USB2 port 2 scanning...
1018 07:49:32.375487 scan_static_bus for USB2 port 2
1019 07:49:32.378876 scan_static_bus for USB2 port 2 done
1020 07:49:32.382184 scan_bus: bus USB2 port 2 finished in 6 msecs
1021 07:49:32.385376
1022 07:49:32.385466 USB2 port 4 scanning...
1023 07:49:32.389061 scan_static_bus for USB2 port 4
1024 07:49:32.392102 scan_static_bus for USB2 port 4 done
1025 07:49:32.398749 scan_bus: bus USB2 port 4 finished in 6 msecs
1026 07:49:32.398850 USB3 port 1 scanning...
1027 07:49:32.402029
1028 07:49:32.405295 scan_static_bus for USB3 port 1
1029 07:49:32.408757 scan_static_bus for USB3 port 1 done
1030 07:49:32.412133 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 07:49:32.415571 scan_static_bus for USB0 port 0 done
1032 07:49:32.421919 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 07:49:32.425199 scan_static_bus for PCI: 00:14.0 done
1034 07:49:32.428415 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1035 07:49:32.431939 PCI: 00:14.3 scanning...
1036 07:49:32.435249 scan_static_bus for PCI: 00:14.3
1037 07:49:32.438603 GENERIC: 0.0 enabled
1038 07:49:32.441865 scan_static_bus for PCI: 00:14.3 done
1039 07:49:32.445071 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 07:49:32.448140 PCI: 00:15.0 scanning...
1041 07:49:32.451740 scan_static_bus for PCI: 00:15.0
1042 07:49:32.454861 I2C: 00:1a enabled
1043 07:49:32.454941 I2C: 00:31 enabled
1044 07:49:32.458054 I2C: 00:32 enabled
1045 07:49:32.461639 scan_static_bus for PCI: 00:15.0 done
1046 07:49:32.468051 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1047 07:49:32.468179 PCI: 00:15.1 scanning...
1048 07:49:32.471566 scan_static_bus for PCI: 00:15.1
1049 07:49:32.474970 I2C: 00:10 enabled
1050 07:49:32.477776 scan_static_bus for PCI: 00:15.1 done
1051 07:49:32.485013 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 07:49:32.485188 PCI: 00:15.2 scanning...
1053 07:49:32.487949 scan_static_bus for PCI: 00:15.2
1054 07:49:32.491371 scan_static_bus for PCI: 00:15.2 done
1055 07:49:32.494916
1056 07:49:32.497898 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1057 07:49:32.501252 PCI: 00:15.3 scanning...
1058 07:49:32.504802 scan_static_bus for PCI: 00:15.3
1059 07:49:32.508172 scan_static_bus for PCI: 00:15.3 done
1060 07:49:32.511229 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1061 07:49:32.514367 PCI: 00:19.1 scanning...
1062 07:49:32.517788 scan_static_bus for PCI: 00:19.1
1063 07:49:32.521369 I2C: 00:15 enabled
1064 07:49:32.524537 scan_static_bus for PCI: 00:19.1 done
1065 07:49:32.527599 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1066 07:49:32.531126 PCI: 00:1d.0 scanning...
1067 07:49:32.534326 do_pci_scan_bridge for PCI: 00:1d.0
1068 07:49:32.538115 PCI: pci_scan_bus for bus 01
1069 07:49:32.541120 PCI: 01:00.0 [1c5c/174a] enabled
1070 07:49:32.544194 GENERIC: 0.0 enabled
1071 07:49:32.547441 Enabling Common Clock Configuration
1072 07:49:32.550860 L1 Sub-State supported from root port 29
1073 07:49:32.554270 L1 Sub-State Support = 0xf
1074 07:49:32.557827 CommonModeRestoreTime = 0x28
1075 07:49:32.560708 Power On Value = 0x16, Power On Scale = 0x0
1076 07:49:32.564273 ASPM: Enabled L1
1077 07:49:32.567225 PCIe: Max_Payload_Size adjusted to 128
1078 07:49:32.573987 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1079 07:49:32.574085 PCI: 00:1e.2 scanning...
1080 07:49:32.577401 scan_generic_bus for PCI: 00:1e.2
1081 07:49:32.580639 SPI: 00 enabled
1082 07:49:32.587512 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1083 07:49:32.590937 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1084 07:49:32.593919 PCI: 00:1e.3 scanning...
1085 07:49:32.597350 scan_generic_bus for PCI: 00:1e.3
1086 07:49:32.600660 SPI: 00 enabled
1087 07:49:32.603730 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1088 07:49:32.610504 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1089 07:49:32.613505 PCI: 00:1f.0 scanning...
1090 07:49:32.617018 scan_static_bus for PCI: 00:1f.0
1091 07:49:32.617096 PNP: 0c09.0 enabled
1092 07:49:32.620162 PNP: 0c09.0 scanning...
1093 07:49:32.623576 scan_static_bus for PNP: 0c09.0
1094 07:49:32.626934 scan_static_bus for PNP: 0c09.0 done
1095 07:49:32.633224 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1096 07:49:32.636838 scan_static_bus for PCI: 00:1f.0 done
1097 07:49:32.639982 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1098 07:49:32.643746 PCI: 00:1f.2 scanning...
1099 07:49:32.646662 scan_static_bus for PCI: 00:1f.2
1100 07:49:32.650188 GENERIC: 0.0 enabled
1101 07:49:32.650273 GENERIC: 0.0 scanning...
1102 07:49:32.654081 scan_static_bus for GENERIC: 0.0
1103 07:49:32.656627 GENERIC: 0.0 enabled
1104 07:49:32.660135 GENERIC: 1.0 enabled
1105 07:49:32.663603 scan_static_bus for GENERIC: 0.0 done
1106 07:49:32.666820 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1107 07:49:32.673045 scan_static_bus for PCI: 00:1f.2 done
1108 07:49:32.676869 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1109 07:49:32.679906 PCI: 00:1f.3 scanning...
1110 07:49:32.683184 scan_static_bus for PCI: 00:1f.3
1111 07:49:32.686153 scan_static_bus for PCI: 00:1f.3 done
1112 07:49:32.689685 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1113 07:49:32.692949 PCI: 00:1f.5 scanning...
1114 07:49:32.696594 scan_generic_bus for PCI: 00:1f.5
1115 07:49:32.702924 scan_generic_bus for PCI: 00:1f.5 done
1116 07:49:32.706230 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1117 07:49:32.709467 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1118 07:49:32.716010 scan_static_bus for Root Device done
1119 07:49:32.719084 scan_bus: bus Root Device finished in 736 msecs
1120 07:49:32.719167 done
1121 07:49:32.725759 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1122 07:49:32.729092 Chrome EC: UHEPI supported
1123 07:49:32.735769 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1124 07:49:32.742360 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1125 07:49:32.745742 SPI flash protection: WPSW=0 SRP0=0
1126 07:49:32.749460 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1127 07:49:32.755531 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1128 07:49:32.758688 found VGA at PCI: 00:02.0
1129 07:49:32.762197 Setting up VGA for PCI: 00:02.0
1130 07:49:32.769446 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1131 07:49:32.772255 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1132 07:49:32.775760 Allocating resources...
1133 07:49:32.775850 Reading resources...
1134 07:49:32.778846
1135 07:49:32.782100 Root Device read_resources bus 0 link: 0
1136 07:49:32.785537 DOMAIN: 0000 read_resources bus 0 link: 0
1137 07:49:32.791817 PCI: 00:04.0 read_resources bus 1 link: 0
1138 07:49:32.795185 PCI: 00:04.0 read_resources bus 1 link: 0 done
1139 07:49:32.801957 PCI: 00:0d.0 read_resources bus 0 link: 0
1140 07:49:32.804911 USB0 port 0 read_resources bus 0 link: 0
1141 07:49:32.811576 USB0 port 0 read_resources bus 0 link: 0 done
1142 07:49:32.814945 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1143 07:49:32.818309 PCI: 00:14.0 read_resources bus 0 link: 0
1144 07:49:32.821509
1145 07:49:32.824723 USB0 port 0 read_resources bus 0 link: 0
1146 07:49:32.831090 USB0 port 0 read_resources bus 0 link: 0 done
1147 07:49:32.834768 PCI: 00:14.0 read_resources bus 0 link: 0 done
1148 07:49:32.841325 PCI: 00:14.3 read_resources bus 0 link: 0
1149 07:49:32.844337 PCI: 00:14.3 read_resources bus 0 link: 0 done
1150 07:49:32.847904 PCI: 00:15.0 read_resources bus 0 link: 0
1151 07:49:32.851084
1152 07:49:32.854121 PCI: 00:15.0 read_resources bus 0 link: 0 done
1153 07:49:32.860764 PCI: 00:15.1 read_resources bus 0 link: 0
1154 07:49:32.864300 PCI: 00:15.1 read_resources bus 0 link: 0 done
1155 07:49:32.871044 PCI: 00:19.1 read_resources bus 0 link: 0
1156 07:49:32.874040 PCI: 00:19.1 read_resources bus 0 link: 0 done
1157 07:49:32.881026 PCI: 00:1d.0 read_resources bus 1 link: 0
1158 07:49:32.883974 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1159 07:49:32.891069 PCI: 00:1e.2 read_resources bus 2 link: 0
1160 07:49:32.894465 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1161 07:49:32.900905 PCI: 00:1e.3 read_resources bus 3 link: 0
1162 07:49:32.904369 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1163 07:49:32.910541 PCI: 00:1f.0 read_resources bus 0 link: 0
1164 07:49:32.914262 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1165 07:49:32.920819 PCI: 00:1f.2 read_resources bus 0 link: 0
1166 07:49:32.923792 GENERIC: 0.0 read_resources bus 0 link: 0
1167 07:49:32.930754 GENERIC: 0.0 read_resources bus 0 link: 0 done
1168 07:49:32.933492 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1169 07:49:32.940181 DOMAIN: 0000 read_resources bus 0 link: 0 done
1170 07:49:32.943508 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1171 07:49:32.950266 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1172 07:49:32.953565 Root Device read_resources bus 0 link: 0 done
1173 07:49:32.956618 Done reading resources.
1174 07:49:32.963641 Show resources in subtree (Root Device)...After reading.
1175 07:49:32.966515 Root Device child on link 0 DOMAIN: 0000
1176 07:49:32.969813 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1177 07:49:32.979948 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1178 07:49:32.989873 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1179 07:49:32.992979 PCI: 00:00.0
1180 07:49:32.999879 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1181 07:49:33.009417 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1182 07:49:33.019268 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1183 07:49:33.029335 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1184 07:49:33.039275 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1185 07:49:33.049295 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1186 07:49:33.059057 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1187 07:49:33.065697 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1188 07:49:33.075472 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1189 07:49:33.085631 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1190 07:49:33.095403 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1191 07:49:33.105562 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1192 07:49:33.115466 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1193 07:49:33.121720 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1194 07:49:33.131645 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1195 07:49:33.141643 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1196 07:49:33.151312 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1197 07:49:33.161436 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1198 07:49:33.171303 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1199 07:49:33.181340 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1200 07:49:33.181441 PCI: 00:02.0
1201 07:49:33.191099 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1202 07:49:33.201267 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1203 07:49:33.211304 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1204 07:49:33.214046 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1205 07:49:33.224092 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1206 07:49:33.227282 GENERIC: 0.0
1207 07:49:33.227369 PCI: 00:05.0
1208 07:49:33.237121 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1209 07:49:33.243723 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1210 07:49:33.243816 GENERIC: 0.0
1211 07:49:33.246928 PCI: 00:08.0
1212 07:49:33.256923 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 07:49:33.257030 PCI: 00:0a.0
1214 07:49:33.263545 PCI: 00:0d.0 child on link 0 USB0 port 0
1215 07:49:33.273578 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1216 07:49:33.277024 USB0 port 0 child on link 0 USB3 port 0
1217 07:49:33.280019 USB3 port 0
1218 07:49:33.280100 USB3 port 1
1219 07:49:33.283378 USB3 port 2
1220 07:49:33.283458 USB3 port 3
1221 07:49:33.290209 PCI: 00:14.0 child on link 0 USB0 port 0
1222 07:49:33.299889 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1223 07:49:33.303333 USB0 port 0 child on link 0 USB2 port 0
1224 07:49:33.307167 USB2 port 0
1225 07:49:33.307250 USB2 port 1
1226 07:49:33.309743 USB2 port 2
1227 07:49:33.309837 USB2 port 3
1228 07:49:33.313189 USB2 port 4
1229 07:49:33.313278 USB2 port 5
1230 07:49:33.316371 USB2 port 6
1231 07:49:33.316453 USB2 port 7
1232 07:49:33.319713 USB2 port 8
1233 07:49:33.319799 USB2 port 9
1234 07:49:33.323377 USB3 port 0
1235 07:49:33.323459 USB3 port 1
1236 07:49:33.326416 USB3 port 2
1237 07:49:33.329317 USB3 port 3
1238 07:49:33.329413 PCI: 00:14.2
1239 07:49:33.339643 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1240 07:49:33.349149 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1241 07:49:33.352986 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1242 07:49:33.362449 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 07:49:33.365722 GENERIC: 0.0
1244 07:49:33.369187 PCI: 00:15.0 child on link 0 I2C: 00:1a
1245 07:49:33.378905 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 07:49:33.382308 I2C: 00:1a
1247 07:49:33.382398 I2C: 00:31
1248 07:49:33.385623 I2C: 00:32
1249 07:49:33.388852 PCI: 00:15.1 child on link 0 I2C: 00:10
1250 07:49:33.399080 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 07:49:33.399171 I2C: 00:10
1252 07:49:33.402051
1253 07:49:33.402139 PCI: 00:15.2
1254 07:49:33.412057 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 07:49:33.415330 PCI: 00:15.3
1256 07:49:33.425514 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 07:49:33.425605 PCI: 00:16.0
1258 07:49:33.435250 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 07:49:33.438451 PCI: 00:19.0
1260 07:49:33.441738 PCI: 00:19.1 child on link 0 I2C: 00:15
1261 07:49:33.451821 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 07:49:33.451916 I2C: 00:15
1263 07:49:33.458371 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1264 07:49:33.464658 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1265 07:49:33.475037 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1266 07:49:33.484658 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1267 07:49:33.487845 GENERIC: 0.0
1268 07:49:33.487927 PCI: 01:00.0
1269 07:49:33.497974 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1270 07:49:33.507699 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1271 07:49:33.517471 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1272 07:49:33.517564 PCI: 00:1e.0
1273 07:49:33.530750 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1274 07:49:33.533980 PCI: 00:1e.2 child on link 0 SPI: 00
1275 07:49:33.543903 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1276 07:49:33.543993 SPI: 00
1277 07:49:33.550947 PCI: 00:1e.3 child on link 0 SPI: 00
1278 07:49:33.560456 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1279 07:49:33.560547 SPI: 00
1280 07:49:33.564291 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1281 07:49:33.573797 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1282 07:49:33.573890 PNP: 0c09.0
1283 07:49:33.583661 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1284 07:49:33.586855 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1285 07:49:33.596660 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1286 07:49:33.607044 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1287 07:49:33.609974 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1288 07:49:33.613699 GENERIC: 0.0
1289 07:49:33.617026 GENERIC: 1.0
1290 07:49:33.617119 PCI: 00:1f.3
1291 07:49:33.626467 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1292 07:49:33.636634 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1293 07:49:33.639792 PCI: 00:1f.5
1294 07:49:33.646482 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1295 07:49:33.653012 CPU_CLUSTER: 0 child on link 0 APIC: 00
1296 07:49:33.653106 APIC: 00
1297 07:49:33.656371 APIC: 01
1298 07:49:33.656456 APIC: 03
1299 07:49:33.656525 APIC: 07
1300 07:49:33.659683 APIC: 05
1301 07:49:33.659774 APIC: 04
1302 07:49:33.659848 APIC: 02
1303 07:49:33.662533 APIC: 06
1304 07:49:33.669366 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1305 07:49:33.675841 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1306 07:49:33.682538 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1307 07:49:33.689315 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1308 07:49:33.692367 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1309 07:49:33.695723 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1310 07:49:33.699255 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1311 07:49:33.709257 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1312 07:49:33.716378 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1313 07:49:33.722103 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1314 07:49:33.728925 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1315 07:49:33.735608 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1316 07:49:33.742020 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1317 07:49:33.745537
1318 07:49:33.752307 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1319 07:49:33.758637 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1320 07:49:33.762258 DOMAIN: 0000: Resource ranges:
1321 07:49:33.765443 * Base: 1000, Size: 800, Tag: 100
1322 07:49:33.768499 * Base: 1900, Size: e700, Tag: 100
1323 07:49:33.775013 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1324 07:49:33.782020 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1325 07:49:33.788411 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1326 07:49:33.795199 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1327 07:49:33.804884 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1328 07:49:33.811523 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1329 07:49:33.818211 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1330 07:49:33.828513 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1331 07:49:33.834963 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1332 07:49:33.841195 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1333 07:49:33.851333 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1334 07:49:33.857584 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1335 07:49:33.864309 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1336 07:49:33.874367 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1337 07:49:33.880732 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1338 07:49:33.887487 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1339 07:49:33.897679 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1340 07:49:33.903748 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1341 07:49:33.910532 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1342 07:49:33.920912 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1343 07:49:33.926877 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1344 07:49:33.933389 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1345 07:49:33.943737 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1346 07:49:33.950357 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1347 07:49:33.956583 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1348 07:49:33.959869 DOMAIN: 0000: Resource ranges:
1349 07:49:33.966615 * Base: 7fc00000, Size: 40400000, Tag: 200
1350 07:49:33.970026 * Base: d0000000, Size: 28000000, Tag: 200
1351 07:49:33.973180 * Base: fa000000, Size: 1000000, Tag: 200
1352 07:49:33.979752 * Base: fb001000, Size: 2fff000, Tag: 200
1353 07:49:33.983336 * Base: fe010000, Size: 2e000, Tag: 200
1354 07:49:33.986392 * Base: fe03f000, Size: d41000, Tag: 200
1355 07:49:33.989741 * Base: fed88000, Size: 8000, Tag: 200
1356 07:49:33.993067 * Base: fed93000, Size: d000, Tag: 200
1357 07:49:33.996032
1358 07:49:33.999630 * Base: feda2000, Size: 1e000, Tag: 200
1359 07:49:34.003046 * Base: fede0000, Size: 1220000, Tag: 200
1360 07:49:34.009617 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1361 07:49:34.016397 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1362 07:49:34.022759 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1363 07:49:34.029335 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1364 07:49:34.035723 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1365 07:49:34.042643 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1366 07:49:34.049102 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1367 07:49:34.055829 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1368 07:49:34.062271 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1369 07:49:34.068971 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1370 07:49:34.075512 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1371 07:49:34.082184 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1372 07:49:34.088697 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1373 07:49:34.095487 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1374 07:49:34.102289 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1375 07:49:34.108620 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1376 07:49:34.115164 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1377 07:49:34.121666 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1378 07:49:34.128525 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1379 07:49:34.134962 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1380 07:49:34.141876 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1381 07:49:34.148478 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1382 07:49:34.154924 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1383 07:49:34.161493 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1384 07:49:34.167913 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1385 07:49:34.171346
1386 07:49:34.171438 PCI: 00:1d.0: Resource ranges:
1387 07:49:34.178301 * Base: 7fc00000, Size: 100000, Tag: 200
1388 07:49:34.184534 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1389 07:49:34.191518 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1390 07:49:34.197949 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1391 07:49:34.204594 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1392 07:49:34.211276 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1393 07:49:34.214176
1394 07:49:34.217306 Root Device assign_resources, bus 0 link: 0
1395 07:49:34.220903 DOMAIN: 0000 assign_resources, bus 0 link: 0
1396 07:49:34.230729 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1397 07:49:34.237194 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1398 07:49:34.247230 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1399 07:49:34.254029 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1400 07:49:34.260753 PCI: 00:04.0 assign_resources, bus 1 link: 0
1401 07:49:34.263616 PCI: 00:04.0 assign_resources, bus 1 link: 0
1402 07:49:34.270591 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1403 07:49:34.280757 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1404 07:49:34.287086 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1405 07:49:34.293967 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1406 07:49:34.297081 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1407 07:49:34.306977 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1408 07:49:34.310199 PCI: 00:14.0 assign_resources, bus 0 link: 0
1409 07:49:34.316860 PCI: 00:14.0 assign_resources, bus 0 link: 0
1410 07:49:34.323242 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1411 07:49:34.329887 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1412 07:49:34.339958 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1413 07:49:34.343082 PCI: 00:14.3 assign_resources, bus 0 link: 0
1414 07:49:34.349939 PCI: 00:14.3 assign_resources, bus 0 link: 0
1415 07:49:34.356763 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1416 07:49:34.363057 PCI: 00:15.0 assign_resources, bus 0 link: 0
1417 07:49:34.366446 PCI: 00:15.0 assign_resources, bus 0 link: 0
1418 07:49:34.372751 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1419 07:49:34.376676
1420 07:49:34.379799 PCI: 00:15.1 assign_resources, bus 0 link: 0
1421 07:49:34.382910 PCI: 00:15.1 assign_resources, bus 0 link: 0
1422 07:49:34.392821 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1423 07:49:34.399286 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1424 07:49:34.409176 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1425 07:49:34.415776 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1426 07:49:34.422538 PCI: 00:19.1 assign_resources, bus 0 link: 0
1427 07:49:34.425766 PCI: 00:19.1 assign_resources, bus 0 link: 0
1428 07:49:34.435476 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1429 07:49:34.445435 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1430 07:49:34.452038 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1431 07:49:34.458776 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1432 07:49:34.465216 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1433 07:49:34.474918 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1434 07:49:34.481558 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1435 07:49:34.485008 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1436 07:49:34.495355 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1437 07:49:34.498635 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1438 07:49:34.504869 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1439 07:49:34.511984 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1440 07:49:34.518026 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1441 07:49:34.521257 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1442 07:49:34.524523 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1443 07:49:34.531695 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1444 07:49:34.535191 LPC: Trying to open IO window from 800 size 1ff
1445 07:49:34.545302 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1446 07:49:34.551475 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1447 07:49:34.561366 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1448 07:49:34.564696 DOMAIN: 0000 assign_resources, bus 0 link: 0
1449 07:49:34.571280 Root Device assign_resources, bus 0 link: 0
1450 07:49:34.571387 Done setting resources.
1451 07:49:34.578529 Show resources in subtree (Root Device)...After assigning values.
1452 07:49:34.584780 Root Device child on link 0 DOMAIN: 0000
1453 07:49:34.588456 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1454 07:49:34.597789 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1455 07:49:34.607753 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1456 07:49:34.607876 PCI: 00:00.0
1457 07:49:34.617970 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1458 07:49:34.627612 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1459 07:49:34.637957 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1460 07:49:34.647742 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1461 07:49:34.654056 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1462 07:49:34.664358 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1463 07:49:34.674003 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1464 07:49:34.683917 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1465 07:49:34.694182 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1466 07:49:34.700439 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1467 07:49:34.703820
1468 07:49:34.710433 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1469 07:49:34.720559 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1470 07:49:34.730775 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1471 07:49:34.740262 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1472 07:49:34.747009 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1473 07:49:34.757175 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1474 07:49:34.767000 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1475 07:49:34.776651 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1476 07:49:34.786557 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1477 07:49:34.796396 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1478 07:49:34.796499 PCI: 00:02.0
1479 07:49:34.799891
1480 07:49:34.810083 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1481 07:49:34.819684 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1482 07:49:34.829609 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1483 07:49:34.833205 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1484 07:49:34.842756 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1485 07:49:34.846319 GENERIC: 0.0
1486 07:49:34.846419 PCI: 00:05.0
1487 07:49:34.855879 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1488 07:49:34.859611
1489 07:49:34.862743 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1490 07:49:34.862832 GENERIC: 0.0
1491 07:49:34.866021 PCI: 00:08.0
1492 07:49:34.875806 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1493 07:49:34.879397 PCI: 00:0a.0
1494 07:49:34.883035 PCI: 00:0d.0 child on link 0 USB0 port 0
1495 07:49:34.892355 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1496 07:49:34.895637 USB0 port 0 child on link 0 USB3 port 0
1497 07:49:34.899010 USB3 port 0
1498 07:49:34.899159 USB3 port 1
1499 07:49:34.902459 USB3 port 2
1500 07:49:34.905595 USB3 port 3
1501 07:49:34.908727 PCI: 00:14.0 child on link 0 USB0 port 0
1502 07:49:34.918913 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1503 07:49:34.922126 USB0 port 0 child on link 0 USB2 port 0
1504 07:49:34.925619 USB2 port 0
1505 07:49:34.925704 USB2 port 1
1506 07:49:34.928444 USB2 port 2
1507 07:49:34.931913 USB2 port 3
1508 07:49:34.931995 USB2 port 4
1509 07:49:34.935572 USB2 port 5
1510 07:49:34.935656 USB2 port 6
1511 07:49:34.938280 USB2 port 7
1512 07:49:34.938360 USB2 port 8
1513 07:49:34.941864 USB2 port 9
1514 07:49:34.941956 USB3 port 0
1515 07:49:34.945054 USB3 port 1
1516 07:49:34.945141 USB3 port 2
1517 07:49:34.948314 USB3 port 3
1518 07:49:34.948402 PCI: 00:14.2
1519 07:49:34.958353 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1520 07:49:34.961724
1521 07:49:34.971441 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1522 07:49:34.974704 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1523 07:49:34.984765 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1524 07:49:34.988104 GENERIC: 0.0
1525 07:49:34.991585 PCI: 00:15.0 child on link 0 I2C: 00:1a
1526 07:49:35.001511 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1527 07:49:35.004555 I2C: 00:1a
1528 07:49:35.004642 I2C: 00:31
1529 07:49:35.004709 I2C: 00:32
1530 07:49:35.007983
1531 07:49:35.011293 PCI: 00:15.1 child on link 0 I2C: 00:10
1532 07:49:35.021542 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1533 07:49:35.021646 I2C: 00:10
1534 07:49:35.024386 PCI: 00:15.2
1535 07:49:35.034336 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1536 07:49:35.037639 PCI: 00:15.3
1537 07:49:35.047611 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1538 07:49:35.047732 PCI: 00:16.0
1539 07:49:35.057679 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1540 07:49:35.060925 PCI: 00:19.0
1541 07:49:35.064053 PCI: 00:19.1 child on link 0 I2C: 00:15
1542 07:49:35.074103 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1543 07:49:35.077876 I2C: 00:15
1544 07:49:35.080772 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1545 07:49:35.090578 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1546 07:49:35.100663 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1547 07:49:35.113573 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1548 07:49:35.113668 GENERIC: 0.0
1549 07:49:35.116725 PCI: 01:00.0
1550 07:49:35.126888 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1551 07:49:35.136996 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1552 07:49:35.147048 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1553 07:49:35.149959 PCI: 00:1e.0
1554 07:49:35.160042 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1555 07:49:35.162951 PCI: 00:1e.2 child on link 0 SPI: 00
1556 07:49:35.173144 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1557 07:49:35.176609 SPI: 00
1558 07:49:35.179510 PCI: 00:1e.3 child on link 0 SPI: 00
1559 07:49:35.189567 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1560 07:49:35.189659 SPI: 00
1561 07:49:35.196048 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1562 07:49:35.202916 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1563 07:49:35.206252 PNP: 0c09.0
1564 07:49:35.216018 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1565 07:49:35.219558 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1566 07:49:35.229374 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1567 07:49:35.239419 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1568 07:49:35.242516 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1569 07:49:35.245711 GENERIC: 0.0
1570 07:49:35.245800 GENERIC: 1.0
1571 07:49:35.249202 PCI: 00:1f.3
1572 07:49:35.258732 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1573 07:49:35.269227 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1574 07:49:35.269324 PCI: 00:1f.5
1575 07:49:35.281854 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1576 07:49:35.285276 CPU_CLUSTER: 0 child on link 0 APIC: 00
1577 07:49:35.285366 APIC: 00
1578 07:49:35.288572 APIC: 01
1579 07:49:35.288649 APIC: 03
1580 07:49:35.288714 APIC: 07
1581 07:49:35.292147 APIC: 05
1582 07:49:35.292222 APIC: 04
1583 07:49:35.295313 APIC: 02
1584 07:49:35.295387 APIC: 06
1585 07:49:35.299023 Done allocating resources.
1586 07:49:35.305244 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1587 07:49:35.308285 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1588 07:49:35.315054 Configure GPIOs for I2S audio on UP4.
1589 07:49:35.321405 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1590 07:49:35.321497 Enabling resources...
1591 07:49:35.324903
1592 07:49:35.328451 PCI: 00:00.0 subsystem <- 8086/9a12
1593 07:49:35.328536 PCI: 00:00.0 cmd <- 06
1594 07:49:35.334720 PCI: 00:02.0 subsystem <- 8086/9a40
1595 07:49:35.334807 PCI: 00:02.0 cmd <- 03
1596 07:49:35.337827 PCI: 00:04.0 subsystem <- 8086/9a03
1597 07:49:35.341207 PCI: 00:04.0 cmd <- 02
1598 07:49:35.344745 PCI: 00:05.0 subsystem <- 8086/9a19
1599 07:49:35.347805 PCI: 00:05.0 cmd <- 02
1600 07:49:35.351211 PCI: 00:08.0 subsystem <- 8086/9a11
1601 07:49:35.354166 PCI: 00:08.0 cmd <- 06
1602 07:49:35.357515 PCI: 00:0d.0 subsystem <- 8086/9a13
1603 07:49:35.360912 PCI: 00:0d.0 cmd <- 02
1604 07:49:35.364235 PCI: 00:14.0 subsystem <- 8086/a0ed
1605 07:49:35.367371 PCI: 00:14.0 cmd <- 02
1606 07:49:35.370666 PCI: 00:14.2 subsystem <- 8086/a0ef
1607 07:49:35.374260 PCI: 00:14.2 cmd <- 02
1608 07:49:35.377438 PCI: 00:14.3 subsystem <- 8086/a0f0
1609 07:49:35.377527 PCI: 00:14.3 cmd <- 02
1610 07:49:35.380676
1611 07:49:35.383776 PCI: 00:15.0 subsystem <- 8086/a0e8
1612 07:49:35.383861 PCI: 00:15.0 cmd <- 02
1613 07:49:35.390707 PCI: 00:15.1 subsystem <- 8086/a0e9
1614 07:49:35.390794 PCI: 00:15.1 cmd <- 02
1615 07:49:35.393990 PCI: 00:15.2 subsystem <- 8086/a0ea
1616 07:49:35.397317 PCI: 00:15.2 cmd <- 02
1617 07:49:35.400523 PCI: 00:15.3 subsystem <- 8086/a0eb
1618 07:49:35.403632 PCI: 00:15.3 cmd <- 02
1619 07:49:35.407553 PCI: 00:16.0 subsystem <- 8086/a0e0
1620 07:49:35.410366 PCI: 00:16.0 cmd <- 02
1621 07:49:35.414001 PCI: 00:19.1 subsystem <- 8086/a0c6
1622 07:49:35.416964 PCI: 00:19.1 cmd <- 02
1623 07:49:35.420377 PCI: 00:1d.0 bridge ctrl <- 0013
1624 07:49:35.423700 PCI: 00:1d.0 subsystem <- 8086/a0b0
1625 07:49:35.426609 PCI: 00:1d.0 cmd <- 06
1626 07:49:35.429982 PCI: 00:1e.0 subsystem <- 8086/a0a8
1627 07:49:35.433483 PCI: 00:1e.0 cmd <- 06
1628 07:49:35.436972 PCI: 00:1e.2 subsystem <- 8086/a0aa
1629 07:49:35.437066 PCI: 00:1e.2 cmd <- 06
1630 07:49:35.443587 PCI: 00:1e.3 subsystem <- 8086/a0ab
1631 07:49:35.443681 PCI: 00:1e.3 cmd <- 02
1632 07:49:35.447143 PCI: 00:1f.0 subsystem <- 8086/a087
1633 07:49:35.450213 PCI: 00:1f.0 cmd <- 407
1634 07:49:35.453770 PCI: 00:1f.3 subsystem <- 8086/a0c8
1635 07:49:35.456742 PCI: 00:1f.3 cmd <- 02
1636 07:49:35.460270 PCI: 00:1f.5 subsystem <- 8086/a0a4
1637 07:49:35.463291 PCI: 00:1f.5 cmd <- 406
1638 07:49:35.467739 PCI: 01:00.0 cmd <- 02
1639 07:49:35.472169 done.
1640 07:49:35.475273 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1641 07:49:35.478771 Initializing devices...
1642 07:49:35.481936 Root Device init
1643 07:49:35.485453 Chrome EC: Set SMI mask to 0x0000000000000000
1644 07:49:35.492016 Chrome EC: clear events_b mask to 0x0000000000000000
1645 07:49:35.498292 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1646 07:49:35.505168 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1647 07:49:35.511541 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1648 07:49:35.515097 Chrome EC: Set WAKE mask to 0x0000000000000000
1649 07:49:35.521903 fw_config match found: DB_USB=USB3_ACTIVE
1650 07:49:35.525229 Configure Right Type-C port orientation for retimer
1651 07:49:35.528672 Root Device init finished in 45 msecs
1652 07:49:35.532652 PCI: 00:00.0 init
1653 07:49:35.536197 CPU TDP = 9 Watts
1654 07:49:35.536292 CPU PL1 = 9 Watts
1655 07:49:35.539116 CPU PL2 = 40 Watts
1656 07:49:35.542616 CPU PL4 = 83 Watts
1657 07:49:35.545849 PCI: 00:00.0 init finished in 8 msecs
1658 07:49:35.545938 PCI: 00:02.0 init
1659 07:49:35.549268
1660 07:49:35.549359 GMA: Found VBT in CBFS
1661 07:49:35.552328 GMA: Found valid VBT in CBFS
1662 07:49:35.559183 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1663 07:49:35.565616 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1664 07:49:35.569372 PCI: 00:02.0 init finished in 18 msecs
1665 07:49:35.572341 PCI: 00:05.0 init
1666 07:49:35.575625 PCI: 00:05.0 init finished in 0 msecs
1667 07:49:35.579033 PCI: 00:08.0 init
1668 07:49:35.582027 PCI: 00:08.0 init finished in 0 msecs
1669 07:49:35.585548 PCI: 00:14.0 init
1670 07:49:35.588693 PCI: 00:14.0 init finished in 0 msecs
1671 07:49:35.591872 PCI: 00:14.2 init
1672 07:49:35.595148 PCI: 00:14.2 init finished in 0 msecs
1673 07:49:35.598498 PCI: 00:15.0 init
1674 07:49:35.602030 I2C bus 0 version 0x3230302a
1675 07:49:35.605454 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1676 07:49:35.608626 PCI: 00:15.0 init finished in 6 msecs
1677 07:49:35.611779 PCI: 00:15.1 init
1678 07:49:35.611859 I2C bus 1 version 0x3230302a
1679 07:49:35.618458 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1680 07:49:35.621538 PCI: 00:15.1 init finished in 6 msecs
1681 07:49:35.621620 PCI: 00:15.2 init
1682 07:49:35.625011 I2C bus 2 version 0x3230302a
1683 07:49:35.628044 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1684 07:49:35.634778 PCI: 00:15.2 init finished in 6 msecs
1685 07:49:35.634895 PCI: 00:15.3 init
1686 07:49:35.638326 I2C bus 3 version 0x3230302a
1687 07:49:35.641436 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1688 07:49:35.645014 PCI: 00:15.3 init finished in 6 msecs
1689 07:49:35.648046 PCI: 00:16.0 init
1690 07:49:35.651198 PCI: 00:16.0 init finished in 0 msecs
1691 07:49:35.654660 PCI: 00:19.1 init
1692 07:49:35.658035 I2C bus 5 version 0x3230302a
1693 07:49:35.661124 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1694 07:49:35.664506 PCI: 00:19.1 init finished in 6 msecs
1695 07:49:35.667949 PCI: 00:1d.0 init
1696 07:49:35.670890 Initializing PCH PCIe bridge.
1697 07:49:35.674593 PCI: 00:1d.0 init finished in 3 msecs
1698 07:49:35.677531 PCI: 00:1f.0 init
1699 07:49:35.680989 IOAPIC: Initializing IOAPIC at 0xfec00000
1700 07:49:35.687586 IOAPIC: Bootstrap Processor Local APIC = 0x00
1701 07:49:35.687676 IOAPIC: ID = 0x02
1702 07:49:35.690659 IOAPIC: Dumping registers
1703 07:49:35.694314 reg 0x0000: 0x02000000
1704 07:49:35.694404 reg 0x0001: 0x00770020
1705 07:49:35.697260 reg 0x0002: 0x00000000
1706 07:49:35.700539 PCI: 00:1f.0 init finished in 21 msecs
1707 07:49:35.704673 PCI: 00:1f.2 init
1708 07:49:35.707847 Disabling ACPI via APMC.
1709 07:49:35.711129 APMC done.
1710 07:49:35.714240 PCI: 00:1f.2 init finished in 5 msecs
1711 07:49:35.725172 PCI: 01:00.0 init
1712 07:49:35.728387 PCI: 01:00.0 init finished in 0 msecs
1713 07:49:35.732281 PNP: 0c09.0 init
1714 07:49:35.735163 Google Chrome EC uptime: 8.380 seconds
1715 07:49:35.741758 Google Chrome AP resets since EC boot: 1
1716 07:49:35.745259 Google Chrome most recent AP reset causes:
1717 07:49:35.748331 0.346: 32775 shutdown: entering G3
1718 07:49:35.755006 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1719 07:49:35.758452 PNP: 0c09.0 init finished in 22 msecs
1720 07:49:35.764122 Devices initialized
1721 07:49:35.767595 Show all devs... After init.
1722 07:49:35.770652 Root Device: enabled 1
1723 07:49:35.770770 DOMAIN: 0000: enabled 1
1724 07:49:35.774022 CPU_CLUSTER: 0: enabled 1
1725 07:49:35.777611 PCI: 00:00.0: enabled 1
1726 07:49:35.780564 PCI: 00:02.0: enabled 1
1727 07:49:35.780650 PCI: 00:04.0: enabled 1
1728 07:49:35.783926 PCI: 00:05.0: enabled 1
1729 07:49:35.787497 PCI: 00:06.0: enabled 0
1730 07:49:35.790440 PCI: 00:07.0: enabled 0
1731 07:49:35.790522 PCI: 00:07.1: enabled 0
1732 07:49:35.793871 PCI: 00:07.2: enabled 0
1733 07:49:35.797193 PCI: 00:07.3: enabled 0
1734 07:49:35.800598 PCI: 00:08.0: enabled 1
1735 07:49:35.800678 PCI: 00:09.0: enabled 0
1736 07:49:35.803955 PCI: 00:0a.0: enabled 0
1737 07:49:35.807187 PCI: 00:0d.0: enabled 1
1738 07:49:35.810420 PCI: 00:0d.1: enabled 0
1739 07:49:35.810502 PCI: 00:0d.2: enabled 0
1740 07:49:35.813837 PCI: 00:0d.3: enabled 0
1741 07:49:35.816915 PCI: 00:0e.0: enabled 0
1742 07:49:35.820415 PCI: 00:10.2: enabled 1
1743 07:49:35.820500 PCI: 00:10.6: enabled 0
1744 07:49:35.823441 PCI: 00:10.7: enabled 0
1745 07:49:35.826852 PCI: 00:12.0: enabled 0
1746 07:49:35.826933 PCI: 00:12.6: enabled 0
1747 07:49:35.830221
1748 07:49:35.830305 PCI: 00:13.0: enabled 0
1749 07:49:35.833748 PCI: 00:14.0: enabled 1
1750 07:49:35.836860 PCI: 00:14.1: enabled 0
1751 07:49:35.836938 PCI: 00:14.2: enabled 1
1752 07:49:35.839948 PCI: 00:14.3: enabled 1
1753 07:49:35.843371 PCI: 00:15.0: enabled 1
1754 07:49:35.846522 PCI: 00:15.1: enabled 1
1755 07:49:35.846603 PCI: 00:15.2: enabled 1
1756 07:49:35.850161 PCI: 00:15.3: enabled 1
1757 07:49:35.853245 PCI: 00:16.0: enabled 1
1758 07:49:35.856703 PCI: 00:16.1: enabled 0
1759 07:49:35.856783 PCI: 00:16.2: enabled 0
1760 07:49:35.859823 PCI: 00:16.3: enabled 0
1761 07:49:35.863297 PCI: 00:16.4: enabled 0
1762 07:49:35.866842 PCI: 00:16.5: enabled 0
1763 07:49:35.866920 PCI: 00:17.0: enabled 0
1764 07:49:35.869990 PCI: 00:19.0: enabled 0
1765 07:49:35.873301 PCI: 00:19.1: enabled 1
1766 07:49:35.873393 PCI: 00:19.2: enabled 0
1767 07:49:35.876352
1768 07:49:35.876427 PCI: 00:1c.0: enabled 1
1769 07:49:35.879644 PCI: 00:1c.1: enabled 0
1770 07:49:35.883183 PCI: 00:1c.2: enabled 0
1771 07:49:35.883268 PCI: 00:1c.3: enabled 0
1772 07:49:35.886512 PCI: 00:1c.4: enabled 0
1773 07:49:35.890004 PCI: 00:1c.5: enabled 0
1774 07:49:35.893062 PCI: 00:1c.6: enabled 1
1775 07:49:35.893147 PCI: 00:1c.7: enabled 0
1776 07:49:35.896363 PCI: 00:1d.0: enabled 1
1777 07:49:35.899605 PCI: 00:1d.1: enabled 0
1778 07:49:35.902910 PCI: 00:1d.2: enabled 1
1779 07:49:35.902996 PCI: 00:1d.3: enabled 0
1780 07:49:35.906296 PCI: 00:1e.0: enabled 1
1781 07:49:35.909774 PCI: 00:1e.1: enabled 0
1782 07:49:35.913226 PCI: 00:1e.2: enabled 1
1783 07:49:35.913313 PCI: 00:1e.3: enabled 1
1784 07:49:35.916514 PCI: 00:1f.0: enabled 1
1785 07:49:35.919419 PCI: 00:1f.1: enabled 0
1786 07:49:35.919507 PCI: 00:1f.2: enabled 1
1787 07:49:35.922915
1788 07:49:35.923022 PCI: 00:1f.3: enabled 1
1789 07:49:35.926004 PCI: 00:1f.4: enabled 0
1790 07:49:35.929413 PCI: 00:1f.5: enabled 1
1791 07:49:35.929497 PCI: 00:1f.6: enabled 0
1792 07:49:35.932920 PCI: 00:1f.7: enabled 0
1793 07:49:35.936067 APIC: 00: enabled 1
1794 07:49:35.939622 GENERIC: 0.0: enabled 1
1795 07:49:35.939704 GENERIC: 0.0: enabled 1
1796 07:49:35.942567 GENERIC: 1.0: enabled 1
1797 07:49:35.945933 GENERIC: 0.0: enabled 1
1798 07:49:35.946032 GENERIC: 1.0: enabled 1
1799 07:49:35.949094
1800 07:49:35.949176 USB0 port 0: enabled 1
1801 07:49:35.952751 GENERIC: 0.0: enabled 1
1802 07:49:35.955747 USB0 port 0: enabled 1
1803 07:49:35.955865 GENERIC: 0.0: enabled 1
1804 07:49:35.959347 I2C: 00:1a: enabled 1
1805 07:49:35.962337 I2C: 00:31: enabled 1
1806 07:49:35.962418 I2C: 00:32: enabled 1
1807 07:49:35.965989 I2C: 00:10: enabled 1
1808 07:49:35.969173 I2C: 00:15: enabled 1
1809 07:49:35.972698 GENERIC: 0.0: enabled 0
1810 07:49:35.972787 GENERIC: 1.0: enabled 0
1811 07:49:35.975464 GENERIC: 0.0: enabled 1
1812 07:49:35.979286 SPI: 00: enabled 1
1813 07:49:35.979411 SPI: 00: enabled 1
1814 07:49:35.982399 PNP: 0c09.0: enabled 1
1815 07:49:35.985565 GENERIC: 0.0: enabled 1
1816 07:49:35.985647 USB3 port 0: enabled 1
1817 07:49:35.989202 USB3 port 1: enabled 1
1818 07:49:35.992078 USB3 port 2: enabled 0
1819 07:49:35.992168 USB3 port 3: enabled 0
1820 07:49:35.995614
1821 07:49:35.995696 USB2 port 0: enabled 0
1822 07:49:35.999005 USB2 port 1: enabled 1
1823 07:49:36.002285 USB2 port 2: enabled 1
1824 07:49:36.002369 USB2 port 3: enabled 0
1825 07:49:36.005494 USB2 port 4: enabled 1
1826 07:49:36.008865 USB2 port 5: enabled 0
1827 07:49:36.008945 USB2 port 6: enabled 0
1828 07:49:36.012380 USB2 port 7: enabled 0
1829 07:49:36.015648 USB2 port 8: enabled 0
1830 07:49:36.019219 USB2 port 9: enabled 0
1831 07:49:36.019308 USB3 port 0: enabled 0
1832 07:49:36.022338 USB3 port 1: enabled 1
1833 07:49:36.025449 USB3 port 2: enabled 0
1834 07:49:36.025532 USB3 port 3: enabled 0
1835 07:49:36.028931 GENERIC: 0.0: enabled 1
1836 07:49:36.031929 GENERIC: 1.0: enabled 1
1837 07:49:36.032011 APIC: 01: enabled 1
1838 07:49:36.035531 APIC: 03: enabled 1
1839 07:49:36.038540 APIC: 07: enabled 1
1840 07:49:36.038658 APIC: 05: enabled 1
1841 07:49:36.041984 APIC: 04: enabled 1
1842 07:49:36.045411 APIC: 02: enabled 1
1843 07:49:36.045498 APIC: 06: enabled 1
1844 07:49:36.048343 PCI: 01:00.0: enabled 1
1845 07:49:36.055087 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1846 07:49:36.058633 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1847 07:49:36.061611 ELOG: NV offset 0xf30000 size 0x1000
1848 07:49:36.069173 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1849 07:49:36.075850 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:36 UTC
1850 07:49:36.082704 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:36 UTC
1851 07:49:36.089268 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:36 UTC
1852 07:49:36.095577 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:36 UTC
1853 07:49:36.102272 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:36 UTC
1854 07:49:36.108729 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1855 07:49:36.115710 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:36 UTC
1856 07:49:36.118825 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1857 07:49:36.125437 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1858 07:49:36.128965 Finalize devices...
1859 07:49:36.129047 Devices finalized
1860 07:49:36.135364 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1861 07:49:36.141840 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1862 07:49:36.145474 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1863 07:49:36.152015 ME: HFSTS1 : 0x80030055
1864 07:49:36.155099 ME: HFSTS2 : 0x30280116
1865 07:49:36.158596 ME: HFSTS3 : 0x00000050
1866 07:49:36.165298 ME: HFSTS4 : 0x00004000
1867 07:49:36.168720 ME: HFSTS5 : 0x00000000
1868 07:49:36.174978 ME: HFSTS6 : 0x00400006
1869 07:49:36.178468 ME: Manufacturing Mode : YES
1870 07:49:36.181517 ME: SPI Protection Mode Enabled : NO
1871 07:49:36.184699 ME: FW Partition Table : OK
1872 07:49:36.188268 ME: Bringup Loader Failure : NO
1873 07:49:36.191962 ME: Firmware Init Complete : NO
1874 07:49:36.195213 ME: Boot Options Present : NO
1875 07:49:36.198631 ME: Update In Progress : NO
1876 07:49:36.205089 ME: D0i3 Support : YES
1877 07:49:36.208371 ME: Low Power State Enabled : NO
1878 07:49:36.211332 ME: CPU Replaced : YES
1879 07:49:36.214877 ME: CPU Replacement Valid : YES
1880 07:49:36.218389 ME: Current Working State : 5
1881 07:49:36.221670 ME: Current Operation State : 1
1882 07:49:36.224810 ME: Current Operation Mode : 3
1883 07:49:36.228334 ME: Error Code : 0
1884 07:49:36.231328 ME: Enhanced Debug Mode : NO
1885 07:49:36.237906 ME: CPU Debug Disabled : YES
1886 07:49:36.241334 ME: TXT Support : NO
1887 07:49:36.247888 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1888 07:49:36.254464 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1889 07:49:36.257973 CBFS: 'fallback/slic' not found.
1890 07:49:36.261058 ACPI: Writing ACPI tables at 76b01000.
1891 07:49:36.264499 ACPI: * FACS
1892 07:49:36.264587 ACPI: * DSDT
1893 07:49:36.267709 Ramoops buffer: 0x100000@0x76a00000.
1894 07:49:36.274269 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1895 07:49:36.277859 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1896 07:49:36.281377 Google Chrome EC: version:
1897 07:49:36.284932 ro: voema_v2.0.7540-147f8d37d1
1898 07:49:36.288390 rw: voema_v2.0.7540-147f8d37d1
1899 07:49:36.291392 running image: 2
1900 07:49:36.298265 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1901 07:49:36.301418 ACPI: * FADT
1902 07:49:36.301506 SCI is IRQ9
1903 07:49:36.304731 ACPI: added table 1/32, length now 40
1904 07:49:36.308100 ACPI: * SSDT
1905 07:49:36.311347 Found 1 CPU(s) with 8 core(s) each.
1906 07:49:36.314790 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1907 07:49:36.321141 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1908 07:49:36.324539 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1909 07:49:36.328060 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1910 07:49:36.334255 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1911 07:49:36.340903 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1912 07:49:36.344174 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1913 07:49:36.351016 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1914 07:49:36.357497 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1915 07:49:36.361087 \_SB.PCI0.RP09: Added StorageD3Enable property
1916 07:49:36.364127 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1917 07:49:36.371005 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1918 07:49:36.377405 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1919 07:49:36.380400 PS2K: Passing 80 keymaps to kernel
1920 07:49:36.387124 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1921 07:49:36.393956 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1922 07:49:36.400422 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1923 07:49:36.407239 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1924 07:49:36.413891 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1925 07:49:36.420382 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1926 07:49:36.427092 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1927 07:49:36.433758 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1928 07:49:36.436825 ACPI: added table 2/32, length now 44
1929 07:49:36.436906 ACPI: * MCFG
1930 07:49:36.440238 ACPI: added table 3/32, length now 48
1931 07:49:36.443269 ACPI: * TPM2
1932 07:49:36.446839 TPM2 log created at 0x769f0000
1933 07:49:36.449833 ACPI: added table 4/32, length now 52
1934 07:49:36.449914 ACPI: * MADT
1935 07:49:36.453319 SCI is IRQ9
1936 07:49:36.456587 ACPI: added table 5/32, length now 56
1937 07:49:36.460036 current = 76b09850
1938 07:49:36.460117 ACPI: * DMAR
1939 07:49:36.463134 ACPI: added table 6/32, length now 60
1940 07:49:36.466705 ACPI: added table 7/32, length now 64
1941 07:49:36.469717 ACPI: * HPET
1942 07:49:36.472880 ACPI: added table 8/32, length now 68
1943 07:49:36.472977 ACPI: done.
1944 07:49:36.476512 ACPI tables: 35216 bytes.
1945 07:49:36.479438 smbios_write_tables: 769ef000
1946 07:49:36.483079 EC returned error result code 3
1947 07:49:36.486061 Couldn't obtain OEM name from CBI
1948 07:49:36.489576 Create SMBIOS type 16
1949 07:49:36.492694 Create SMBIOS type 17
1950 07:49:36.496297 GENERIC: 0.0 (WIFI Device)
1951 07:49:36.496382 SMBIOS tables: 1750 bytes.
1952 07:49:36.502973 Writing table forward entry at 0x00000500
1953 07:49:36.509248 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1954 07:49:36.512559 Writing coreboot table at 0x76b25000
1955 07:49:36.519273 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1956 07:49:36.522861 1. 0000000000001000-000000000009ffff: RAM
1957 07:49:36.526122 2. 00000000000a0000-00000000000fffff: RESERVED
1958 07:49:36.532759 3. 0000000000100000-00000000769eefff: RAM
1959 07:49:36.535878 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1960 07:49:36.542417 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1961 07:49:36.548917 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1962 07:49:36.552344 7. 0000000077000000-000000007fbfffff: RESERVED
1963 07:49:36.555936 8. 00000000c0000000-00000000cfffffff: RESERVED
1964 07:49:36.558934
1965 07:49:36.562446 9. 00000000f8000000-00000000f9ffffff: RESERVED
1966 07:49:36.565485 10. 00000000fb000000-00000000fb000fff: RESERVED
1967 07:49:36.572146 11. 00000000fe000000-00000000fe00ffff: RESERVED
1968 07:49:36.575242 12. 00000000fed80000-00000000fed87fff: RESERVED
1969 07:49:36.582005 13. 00000000fed90000-00000000fed92fff: RESERVED
1970 07:49:36.585487 14. 00000000feda0000-00000000feda1fff: RESERVED
1971 07:49:36.591851 15. 00000000fedc0000-00000000feddffff: RESERVED
1972 07:49:36.595368 16. 0000000100000000-00000002803fffff: RAM
1973 07:49:36.598518 Passing 4 GPIOs to payload:
1974 07:49:36.601971 NAME | PORT | POLARITY | VALUE
1975 07:49:36.608643 lid | undefined | high | high
1976 07:49:36.615318 power | undefined | high | low
1977 07:49:36.618316 oprom | undefined | high | low
1978 07:49:36.624928 EC in RW | 0x000000e5 | high | high
1979 07:49:36.631409 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 12ec
1980 07:49:36.634562 coreboot table: 1576 bytes.
1981 07:49:36.637966 IMD ROOT 0. 0x76fff000 0x00001000
1982 07:49:36.641083 IMD SMALL 1. 0x76ffe000 0x00001000
1983 07:49:36.644516 FSP MEMORY 2. 0x76c4e000 0x003b0000
1984 07:49:36.648027 VPD 3. 0x76c4d000 0x00000367
1985 07:49:36.651062 RO MCACHE 4. 0x76c4c000 0x00000fdc
1986 07:49:36.654392 CONSOLE 5. 0x76c2c000 0x00020000
1987 07:49:36.661070 FMAP 6. 0x76c2b000 0x00000578
1988 07:49:36.664572 TIME STAMP 7. 0x76c2a000 0x00000910
1989 07:49:36.667622 VBOOT WORK 8. 0x76c16000 0x00014000
1990 07:49:36.671165 ROMSTG STCK 9. 0x76c15000 0x00001000
1991 07:49:36.674261 AFTER CAR 10. 0x76c0a000 0x0000b000
1992 07:49:36.677690 RAMSTAGE 11. 0x76b97000 0x00073000
1993 07:49:36.680763 REFCODE 12. 0x76b42000 0x00055000
1994 07:49:36.684033 SMM BACKUP 13. 0x76b32000 0x00010000
1995 07:49:36.690617 4f444749 14. 0x76b30000 0x00002000
1996 07:49:36.694159 EXT VBT15. 0x76b2d000 0x0000219f
1997 07:49:36.697150 COREBOOT 16. 0x76b25000 0x00008000
1998 07:49:36.700482 ACPI 17. 0x76b01000 0x00024000
1999 07:49:36.704038 ACPI GNVS 18. 0x76b00000 0x00001000
2000 07:49:36.707462 RAMOOPS 19. 0x76a00000 0x00100000
2001 07:49:36.710469 TPM2 TCGLOG20. 0x769f0000 0x00010000
2002 07:49:36.713834 SMBIOS 21. 0x769ef000 0x00000800
2003 07:49:36.717219 IMD small region:
2004 07:49:36.720167 IMD ROOT 0. 0x76ffec00 0x00000400
2005 07:49:36.723671 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2006 07:49:36.730443 POWER STATE 2. 0x76ffeb80 0x00000044
2007 07:49:36.733599 ROMSTAGE 3. 0x76ffeb60 0x00000004
2008 07:49:36.737084 MEM INFO 4. 0x76ffe980 0x000001e0
2009 07:49:36.743627 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2010 07:49:36.747080 MTRR: Physical address space:
2011 07:49:36.749935 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2012 07:49:36.753514
2013 07:49:36.756974 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2014 07:49:36.763494 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2015 07:49:36.770014 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2016 07:49:36.776571 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2017 07:49:36.783351 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2018 07:49:36.789464 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2019 07:49:36.793158 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 07:49:36.796470 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 07:49:36.803082 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 07:49:36.806076 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 07:49:36.809443 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 07:49:36.812630 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 07:49:36.819459 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 07:49:36.822740 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 07:49:36.826104 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 07:49:36.829509 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 07:49:36.835836 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 07:49:36.839083 call enable_fixed_mtrr()
2031 07:49:36.842710 CPU physical address size: 39 bits
2032 07:49:36.845834 MTRR: default type WB/UC MTRR counts: 6/6.
2033 07:49:36.849082 MTRR: UC selected as default type.
2034 07:49:36.855877 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2035 07:49:36.862523 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2036 07:49:36.868945 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2037 07:49:36.875569 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2038 07:49:36.882011 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2039 07:49:36.885770 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2040 07:49:36.889996
2041 07:49:36.890079 MTRR check
2042 07:49:36.893515 Fixed MTRRs : Enabled
2043 07:49:36.893600 Variable MTRRs: Enabled
2044 07:49:36.893704
2045 07:49:36.900025 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 07:49:36.903606 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 07:49:36.906523 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 07:49:36.909984 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 07:49:36.916718 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 07:49:36.919647 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 07:49:36.923219 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 07:49:36.926558 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 07:49:36.932880 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 07:49:36.936440 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 07:49:36.939285 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 07:49:36.945924 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2057 07:49:36.949532 call enable_fixed_mtrr()
2058 07:49:36.952977 Checking cr50 for pending updates
2059 07:49:36.956987 CPU physical address size: 39 bits
2060 07:49:36.959961 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 07:49:36.963185 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 07:49:36.969779 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 07:49:36.973286 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 07:49:36.976474 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 07:49:36.980052 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 07:49:36.986636 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 07:49:36.990079 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 07:49:36.993059 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 07:49:36.996541 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 07:49:36.999631 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 07:49:37.006646 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 07:49:37.010128 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 07:49:37.016684 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 07:49:37.019471 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 07:49:37.022889 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 07:49:37.026091 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 07:49:37.029509 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 07:49:37.036417 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 07:49:37.039659 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 07:49:37.042837 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 07:49:37.046407 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 07:49:37.050345 call enable_fixed_mtrr()
2083 07:49:37.053906 call enable_fixed_mtrr()
2084 07:49:37.056990 MTRR: Fixed MSR 0x250 0x0606060606060606
2085 07:49:37.060435 MTRR: Fixed MSR 0x250 0x0606060606060606
2086 07:49:37.066929 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 07:49:37.070072 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 07:49:37.073485 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 07:49:37.077045 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 07:49:37.083652 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 07:49:37.087221 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 07:49:37.090149 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 07:49:37.093825 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 07:49:37.099965 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 07:49:37.103355 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 07:49:37.106818 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 07:49:37.109891 call enable_fixed_mtrr()
2098 07:49:37.113220 MTRR: Fixed MSR 0x259 0x0000000000000000
2099 07:49:37.119846 MTRR: Fixed MSR 0x268 0x0606060606060606
2100 07:49:37.123334 MTRR: Fixed MSR 0x269 0x0606060606060606
2101 07:49:37.126762 MTRR: Fixed MSR 0x26a 0x0606060606060606
2102 07:49:37.130276 MTRR: Fixed MSR 0x26b 0x0606060606060606
2103 07:49:37.136522 MTRR: Fixed MSR 0x26c 0x0606060606060606
2104 07:49:37.139926 MTRR: Fixed MSR 0x26d 0x0606060606060606
2105 07:49:37.143445 MTRR: Fixed MSR 0x26e 0x0606060606060606
2106 07:49:37.146585 MTRR: Fixed MSR 0x26f 0x0606060606060606
2107 07:49:37.150569 CPU physical address size: 39 bits
2108 07:49:37.156953 call enable_fixed_mtrr()
2109 07:49:37.160433 CPU physical address size: 39 bits
2110 07:49:37.163566 CPU physical address size: 39 bits
2111 07:49:37.166930 MTRR: Fixed MSR 0x250 0x0606060606060606
2112 07:49:37.173380 MTRR: Fixed MSR 0x250 0x0606060606060606
2113 07:49:37.176956 MTRR: Fixed MSR 0x258 0x0606060606060606
2114 07:49:37.180003 MTRR: Fixed MSR 0x259 0x0000000000000000
2115 07:49:37.183578 MTRR: Fixed MSR 0x268 0x0606060606060606
2116 07:49:37.186628 MTRR: Fixed MSR 0x269 0x0606060606060606
2117 07:49:37.193343 MTRR: Fixed MSR 0x26a 0x0606060606060606
2118 07:49:37.196928 MTRR: Fixed MSR 0x26b 0x0606060606060606
2119 07:49:37.200322 MTRR: Fixed MSR 0x26c 0x0606060606060606
2120 07:49:37.203606 MTRR: Fixed MSR 0x26d 0x0606060606060606
2121 07:49:37.210141 MTRR: Fixed MSR 0x26e 0x0606060606060606
2122 07:49:37.213616 MTRR: Fixed MSR 0x26f 0x0606060606060606
2123 07:49:37.216613 MTRR: Fixed MSR 0x258 0x0606060606060606
2124 07:49:37.220096 call enable_fixed_mtrr()
2125 07:49:37.223445 MTRR: Fixed MSR 0x259 0x0000000000000000
2126 07:49:37.230038 MTRR: Fixed MSR 0x268 0x0606060606060606
2127 07:49:37.233259 MTRR: Fixed MSR 0x269 0x0606060606060606
2128 07:49:37.236515 MTRR: Fixed MSR 0x26a 0x0606060606060606
2129 07:49:37.239854 MTRR: Fixed MSR 0x26b 0x0606060606060606
2130 07:49:37.246387 MTRR: Fixed MSR 0x26c 0x0606060606060606
2131 07:49:37.249494 MTRR: Fixed MSR 0x26d 0x0606060606060606
2132 07:49:37.253085 MTRR: Fixed MSR 0x26e 0x0606060606060606
2133 07:49:37.256121 MTRR: Fixed MSR 0x26f 0x0606060606060606
2134 07:49:37.260683 CPU physical address size: 39 bits
2135 07:49:37.266720 call enable_fixed_mtrr()
2136 07:49:37.270289 CPU physical address size: 39 bits
2137 07:49:37.273921 CPU physical address size: 39 bits
2138 07:49:37.274008 Reading cr50 TPM mode
2139 07:49:37.284584 BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 6 ms
2140 07:49:37.294782 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2141 07:49:37.298352 Checking segment from ROM address 0xffc02b38
2142 07:49:37.301399 Checking segment from ROM address 0xffc02b54
2143 07:49:37.307861 Loading segment from ROM address 0xffc02b38
2144 07:49:37.307945 code (compression=0)
2145 07:49:37.317921 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2146 07:49:37.327860 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2147 07:49:37.327950 it's not compressed!
2148 07:49:37.467443 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2149 07:49:37.474038 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2150 07:49:37.480667 Loading segment from ROM address 0xffc02b54
2151 07:49:37.480762 Entry Point 0x30000000
2152 07:49:37.483874
2153 07:49:37.483964 Loaded segments
2154 07:49:37.490522 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2155 07:49:37.533941 Finalizing chipset.
2156 07:49:37.536768 Finalizing SMM.
2157 07:49:37.536870 APMC done.
2158 07:49:37.543843 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2159 07:49:37.546834 mp_park_aps done after 0 msecs.
2160 07:49:37.550268 Jumping to boot code at 0x30000000(0x76b25000)
2161 07:49:37.559685 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2162 07:49:37.559773
2163 07:49:37.559842
2164 07:49:37.563267
2165 07:49:37.563353
2166 07:49:37.563688 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2167 07:49:37.563796 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2168 07:49:37.563935 Setting prompt string to ['volteer:']
2169 07:49:37.564019 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2170 07:49:37.566673 Starting depthcharge on Voema...
2171 07:49:37.566758
2172 07:49:37.572963 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2173 07:49:37.573060
2174 07:49:37.579971 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2175 07:49:37.580059
2176 07:49:37.586124 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2177 07:49:37.586210
2178 07:49:37.589547 Failed to find eMMC card reader
2179 07:49:37.589632
2180 07:49:37.592597 Wipe memory regions:
2181 07:49:37.592682
2182 07:49:37.596197 [0x00000000001000, 0x000000000a0000)
2183 07:49:37.596282
2184 07:49:37.599352 [0x00000000100000, 0x00000030000000)
2185 07:49:37.599436
2186 07:49:37.628532 [0x00000032662db0, 0x000000769ef000)
2187 07:49:37.628627
2188 07:49:37.667097 [0x00000100000000, 0x00000280400000)
2189 07:49:37.667193
2190 07:49:37.872461 ec_init: CrosEC protocol v3 supported (256, 256)
2191 07:49:37.872593
2192 07:49:37.879091 update_port_state: port C0 state: usb enable 1 mux conn 0
2193 07:49:37.879186
2194 07:49:37.889248 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2195 07:49:37.889355
2196 07:49:37.892361 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2197 07:49:37.892440
2198 07:49:37.899005 send_conn_disc_msg: pmc_send_cmd succeeded
2199 07:49:37.899082
2200 07:49:38.329260 R8152: Initializing
2201 07:49:38.329413
2202 07:49:38.332399 Version 6 (ocp_data = 5c30)
2203 07:49:38.332479
2204 07:49:38.335467 R8152: Done initializing
2205 07:49:38.335546
2206 07:49:38.338914 Adding net device
2207 07:49:38.338996
2208 07:49:38.644424 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2209 07:49:38.644570
2210 07:49:38.644648
2211 07:49:38.644713
2212 07:49:38.647588 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2214 07:49:38.748319 volteer: tftpboot 192.168.201.1 8119408/tftp-deploy-8s00trru/kernel/bzImage 8119408/tftp-deploy-8s00trru/kernel/cmdline 8119408/tftp-deploy-8s00trru/ramdisk/ramdisk.cpio.gz
2215 07:49:38.748471 Setting prompt string to 'Starting kernel'
2216 07:49:38.748549 Setting prompt string to ['Starting kernel']
2217 07:49:38.748615 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2218 07:49:38.748691 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2219 07:49:38.752899 tftpboot 192.168.201.1 8119408/tftp-deploy-8s00trru/kernel/bzImoy-8s00trru/kernel/cmdline 8119408/tftp-deploy-8s00trru/ramdisk/ramdisk.cpio.gz
2220 07:49:38.753020
2221 07:49:38.753087 Waiting for link
2222 07:49:38.753151
2223 07:49:38.955699 done.
2224 07:49:38.955837
2225 07:49:38.955909 MAC: 00:24:32:30:79:42
2226 07:49:38.955973
2227 07:49:38.959033 Sending DHCP discover... done.
2228 07:49:38.959121
2229 07:49:38.962044 Waiting for reply... done.
2230 07:49:38.962131
2231 07:49:38.965371 Sending DHCP request... done.
2232 07:49:38.965459
2233 07:49:38.968816 Waiting for reply... done.
2234 07:49:38.968903
2235 07:49:38.972276 My ip is 192.168.201.13
2236 07:49:38.972362
2237 07:49:38.975273 The DHCP server ip is 192.168.201.1
2238 07:49:38.975363
2239 07:49:38.981682 TFTP server IP predefined by user: 192.168.201.1
2240 07:49:38.981770
2241 07:49:38.988591 Bootfile predefined by user: 8119408/tftp-deploy-8s00trru/kernel/bzImage
2242 07:49:38.988674
2243 07:49:38.991639 Sending tftp read request... done.
2244 07:49:38.991757
2245 07:49:38.995074 Waiting for the transfer...
2246 07:49:38.995161
2247 07:49:39.551074 00000000 ################################################################
2248 07:49:39.551216
2249 07:49:40.103008 00080000 ################################################################
2250 07:49:40.103166
2251 07:49:40.643181 00100000 ################################################################
2252 07:49:40.643332
2253 07:49:41.179132 00180000 ################################################################
2254 07:49:41.179300
2255 07:49:41.722235 00200000 ################################################################
2256 07:49:41.722378
2257 07:49:42.265007 00280000 ################################################################
2258 07:49:42.265157
2259 07:49:42.824773 00300000 ################################################################
2260 07:49:42.824923
2261 07:49:43.389615 00380000 ################################################################
2262 07:49:43.389763
2263 07:49:43.935115 00400000 ################################################################
2264 07:49:43.935258
2265 07:49:44.486158 00480000 ################################################################
2266 07:49:44.486298
2267 07:49:45.049654 00500000 ################################################################
2268 07:49:45.049798
2269 07:49:45.611142 00580000 ################################################################
2270 07:49:45.611283
2271 07:49:46.171507 00600000 ################################################################
2272 07:49:46.172032
2273 07:49:46.579585 00680000 ####################################### done.
2274 07:49:46.580121
2275 07:49:46.582555 The bootfile was 7131024 bytes long.
2276 07:49:46.582996
2277 07:49:46.586240 Sending tftp read request... done.
2278 07:49:46.586829
2279 07:49:46.589071 Waiting for the transfer...
2280 07:49:46.589557
2281 07:49:47.252107 00000000 ################################################################
2282 07:49:47.252657
2283 07:49:47.919052 00080000 ################################################################
2284 07:49:47.919584
2285 07:49:48.507898 00100000 ################################################################
2286 07:49:48.508045
2287 07:49:49.063849 00180000 ################################################################
2288 07:49:49.063996
2289 07:49:49.611896 00200000 ################################################################
2290 07:49:49.612041
2291 07:49:50.156013 00280000 ################################################################
2292 07:49:50.156151
2293 07:49:50.738341 00300000 ################################################################
2294 07:49:50.738485
2295 07:49:51.309056 00380000 ################################################################
2296 07:49:51.309195
2297 07:49:51.941317 00400000 ################################################################
2298 07:49:51.941864
2299 07:49:52.619312 00480000 ################################################################
2300 07:49:52.619873
2301 07:49:52.953047 00500000 ################################ done.
2302 07:49:52.953289
2303 07:49:52.956520 Sending tftp read request... done.
2304 07:49:52.956734
2305 07:49:52.959797 Waiting for the transfer...
2306 07:49:52.960108
2307 07:49:52.960296 00000000 # done.
2308 07:49:52.960469
2309 07:49:52.970002 Command line loaded dynamically from TFTP file: 8119408/tftp-deploy-8s00trru/kernel/cmdline
2310 07:49:52.970428
2311 07:49:52.992798 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119408/extract-nfsrootfs-u8xu9ydh,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2312 07:49:52.993450
2313 07:49:53.000540 Shutting down all USB controllers.
2314 07:49:53.001137
2315 07:49:53.001570 Removing current net device
2316 07:49:53.001942
2317 07:49:53.003188 Finalizing coreboot
2318 07:49:53.003622
2319 07:49:53.009837 Exiting depthcharge with code 4 at timestamp: 24088707
2320 07:49:53.010355
2321 07:49:53.010758
2322 07:49:53.011127 Starting kernel ...
2323 07:49:53.011474
2324 07:49:53.011815
2325 07:49:53.013054 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2326 07:49:53.013648 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2327 07:49:53.014074 Setting prompt string to ['Linux version [0-9]']
2328 07:49:53.014579 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2329 07:49:53.014998 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2330 07:49:53.015959
2332 07:54:22.014467 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2334 07:54:22.015425 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2336 07:54:22.016167 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2339 07:54:22.017485 end: 2 depthcharge-action (duration 00:05:00) [common]
2341 07:54:22.018603 Cleaning after the job
2342 07:54:22.018999 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/ramdisk
2343 07:54:22.019997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/kernel
2344 07:54:22.020560 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/nfsrootfs
2345 07:54:22.052635 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119408/tftp-deploy-8s00trru/modules
2346 07:54:22.052960 start: 5.1 power-off (timeout 00:00:30) [common]
2347 07:54:22.053125 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2348 07:54:22.072109 >> Command sent successfully.
2349 07:54:22.074039 Returned 0 in 0 seconds
2350 07:54:22.175114 end: 5.1 power-off (duration 00:00:00) [common]
2352 07:54:22.176433 start: 5.2 read-feedback (timeout 00:10:00) [common]
2353 07:54:22.177448 Listened to connection for namespace 'common' for up to 1s
2354 07:54:23.181431 Finalising connection for namespace 'common'
2355 07:54:23.181625 Disconnecting from shell: Finalise
2356 07:54:23.282468 end: 5.2 read-feedback (duration 00:00:01) [common]
2357 07:54:23.282685 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119408
2358 07:54:23.375861 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119408
2359 07:54:23.376058 JobError: Your job cannot terminate cleanly.