Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:55:10.297079 lava-dispatcher, installed at version: 2022.10
2 07:55:10.297267 start: 0 validate
3 07:55:10.297394 Start time: 2022-11-25 07:55:10.297387+00:00 (UTC)
4 07:55:10.297517 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:55:10.297652 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:55:10.588541 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:55:10.589265 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:55:10.883504 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:55:10.884262 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:55:11.173706 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:55:11.174459 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:55:11.466299 validate duration: 1.17
14 07:55:11.467709 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:55:11.468278 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:55:11.468788 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:55:11.469340 Not decompressing ramdisk as can be used compressed.
18 07:55:11.469837 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 07:55:11.470305 saving as /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/ramdisk/initrd.cpio.gz
20 07:55:11.470676 total size: 5431719 (5MB)
21 07:55:11.477263 progress 0% (0MB)
22 07:55:11.487291 progress 5% (0MB)
23 07:55:11.494688 progress 10% (0MB)
24 07:55:11.499254 progress 15% (0MB)
25 07:55:11.503250 progress 20% (1MB)
26 07:55:11.506443 progress 25% (1MB)
27 07:55:11.508609 progress 30% (1MB)
28 07:55:11.510165 progress 35% (1MB)
29 07:55:11.513072 progress 40% (2MB)
30 07:55:11.518263 progress 45% (2MB)
31 07:55:11.522691 progress 50% (2MB)
32 07:55:11.527119 progress 55% (2MB)
33 07:55:11.531490 progress 60% (3MB)
34 07:55:11.536620 progress 65% (3MB)
35 07:55:11.541269 progress 70% (3MB)
36 07:55:11.546500 progress 75% (3MB)
37 07:55:11.549907 progress 80% (4MB)
38 07:55:11.555058 progress 85% (4MB)
39 07:55:11.559683 progress 90% (4MB)
40 07:55:11.563926 progress 95% (4MB)
41 07:55:11.568385 progress 100% (5MB)
42 07:55:11.568666 5MB downloaded in 0.10s (52.86MB/s)
43 07:55:11.568831 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:55:11.569082 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:55:11.569175 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:55:11.569265 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:55:11.569373 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:55:11.569442 saving as /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/kernel/bzImage
50 07:55:11.569504 total size: 7131024 (6MB)
51 07:55:11.569566 No compression specified
52 07:55:11.579616 progress 0% (0MB)
53 07:55:11.587094 progress 5% (0MB)
54 07:55:11.597105 progress 10% (0MB)
55 07:55:11.604894 progress 15% (1MB)
56 07:55:11.613274 progress 20% (1MB)
57 07:55:11.620910 progress 25% (1MB)
58 07:55:11.629385 progress 30% (2MB)
59 07:55:11.635702 progress 35% (2MB)
60 07:55:11.645428 progress 40% (2MB)
61 07:55:11.654933 progress 45% (3MB)
62 07:55:11.665065 progress 50% (3MB)
63 07:55:11.671603 progress 55% (3MB)
64 07:55:11.676356 progress 60% (4MB)
65 07:55:11.680558 progress 65% (4MB)
66 07:55:11.688497 progress 70% (4MB)
67 07:55:11.696676 progress 75% (5MB)
68 07:55:11.704892 progress 80% (5MB)
69 07:55:11.710619 progress 85% (5MB)
70 07:55:11.718798 progress 90% (6MB)
71 07:55:11.726805 progress 95% (6MB)
72 07:55:11.734638 progress 100% (6MB)
73 07:55:11.734948 6MB downloaded in 0.17s (41.11MB/s)
74 07:55:11.735155 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:55:11.735472 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:55:11.735587 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:55:11.735699 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:55:11.735830 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 07:55:11.735916 saving as /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/nfsrootfs/full.rootfs.tar
81 07:55:11.735997 total size: 207113456 (197MB)
82 07:55:11.736075 Using unxz to decompress xz
83 07:55:11.741045 progress 0% (0MB)
84 07:55:12.315144 progress 5% (9MB)
85 07:55:12.853750 progress 10% (19MB)
86 07:55:13.447579 progress 15% (29MB)
87 07:55:13.812379 progress 20% (39MB)
88 07:55:14.173147 progress 25% (49MB)
89 07:55:14.762552 progress 30% (59MB)
90 07:55:15.308097 progress 35% (69MB)
91 07:55:15.904418 progress 40% (79MB)
92 07:55:16.457700 progress 45% (88MB)
93 07:55:17.032971 progress 50% (98MB)
94 07:55:17.659880 progress 55% (108MB)
95 07:55:18.346720 progress 60% (118MB)
96 07:55:18.486979 progress 65% (128MB)
97 07:55:18.628513 progress 70% (138MB)
98 07:55:18.722967 progress 75% (148MB)
99 07:55:18.791232 progress 80% (158MB)
100 07:55:18.861600 progress 85% (167MB)
101 07:55:18.967064 progress 90% (177MB)
102 07:55:19.237999 progress 95% (187MB)
103 07:55:19.829589 progress 100% (197MB)
104 07:55:19.835409 197MB downloaded in 8.10s (24.39MB/s)
105 07:55:19.835687 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:55:19.835964 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:55:19.836063 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:55:19.836157 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:55:19.836278 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:55:19.836352 saving as /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/modules/modules.tar
112 07:55:19.836424 total size: 52060 (0MB)
113 07:55:19.836499 Using unxz to decompress xz
114 07:55:19.841675 progress 62% (0MB)
115 07:55:19.842057 progress 100% (0MB)
116 07:55:19.845329 0MB downloaded in 0.01s (5.58MB/s)
117 07:55:19.845556 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:55:19.845827 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:55:19.845929 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 07:55:19.846028 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 07:55:21.911294 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119448/extract-nfsrootfs-6693c83t
123 07:55:21.911498 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:55:21.911602 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 07:55:21.911737 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041
126 07:55:21.911837 makedir: /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin
127 07:55:21.911921 makedir: /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/tests
128 07:55:21.912001 makedir: /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/results
129 07:55:21.912099 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-add-keys
130 07:55:21.912230 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-add-sources
131 07:55:21.912347 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-background-process-start
132 07:55:21.912463 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-background-process-stop
133 07:55:21.912574 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-common-functions
134 07:55:21.912683 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-echo-ipv4
135 07:55:21.912792 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-install-packages
136 07:55:21.912900 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-installed-packages
137 07:55:21.913008 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-os-build
138 07:55:21.913115 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-probe-channel
139 07:55:21.913222 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-probe-ip
140 07:55:21.913329 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-target-ip
141 07:55:21.913434 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-target-mac
142 07:55:21.913541 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-target-storage
143 07:55:21.913651 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-case
144 07:55:21.913759 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-event
145 07:55:21.913867 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-feedback
146 07:55:21.913976 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-raise
147 07:55:21.914082 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-reference
148 07:55:21.914189 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-runner
149 07:55:21.914407 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-set
150 07:55:21.914515 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-test-shell
151 07:55:21.914624 Updating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-add-keys (debian)
152 07:55:21.914735 Updating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-add-sources (debian)
153 07:55:21.914846 Updating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-install-packages (debian)
154 07:55:21.914955 Updating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-installed-packages (debian)
155 07:55:21.915064 Updating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/bin/lava-os-build (debian)
156 07:55:21.915159 Creating /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/environment
157 07:55:21.915245 LAVA metadata
158 07:55:21.915310 - LAVA_JOB_ID=8119448
159 07:55:21.915372 - LAVA_DISPATCHER_IP=192.168.201.1
160 07:55:21.915468 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 07:55:21.915532 skipped lava-vland-overlay
162 07:55:21.915608 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 07:55:21.915688 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 07:55:21.915751 skipped lava-multinode-overlay
165 07:55:21.915824 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 07:55:21.915904 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 07:55:21.915974 Loading test definitions
168 07:55:21.916064 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 07:55:21.916134 Using /lava-8119448 at stage 0
170 07:55:21.916372 uuid=8119448_1.5.2.3.1 testdef=None
171 07:55:21.916462 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 07:55:21.916548 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 07:55:21.916958 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 07:55:21.917189 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 07:55:21.917668 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 07:55:21.917907 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 07:55:21.918368 runner path: /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/0/tests/0_timesync-off test_uuid 8119448_1.5.2.3.1
180 07:55:21.918513 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 07:55:21.918743 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 07:55:21.918817 Using /lava-8119448 at stage 0
184 07:55:21.918914 Fetching tests from https://github.com/kernelci/test-definitions.git
185 07:55:21.918993 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/0/tests/1_kselftest-alsa'
186 07:55:25.176427 Running '/usr/bin/git checkout kernelci.org
187 07:55:25.308774 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 07:55:25.309470 uuid=8119448_1.5.2.3.5 testdef=None
189 07:55:25.309632 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
191 07:55:25.309879 start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
192 07:55:25.310684 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 07:55:25.310925 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
195 07:55:25.311828 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 07:55:25.312078 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
198 07:55:25.313011 runner path: /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/0/tests/1_kselftest-alsa test_uuid 8119448_1.5.2.3.5
199 07:55:25.313103 BOARD='asus-C436FA-Flip-hatch'
200 07:55:25.313170 BRANCH='cip'
201 07:55:25.313284 SKIPFILE='skipfile-lkft.yaml'
202 07:55:25.313358 TESTPROG_URL='None'
203 07:55:25.313417 TST_CASENAME=''
204 07:55:25.313475 TST_CMDFILES='alsa'
205 07:55:25.313609 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 07:55:25.313853 Creating lava-test-runner.conf files
208 07:55:25.313927 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119448/lava-overlay-5k3zo041/lava-8119448/0 for stage 0
209 07:55:25.314019 - 0_timesync-off
210 07:55:25.314090 - 1_kselftest-alsa
211 07:55:25.314184 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
212 07:55:25.314335 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
213 07:55:33.051442 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
214 07:55:33.051607 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
215 07:55:33.051706 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 07:55:33.051808 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
217 07:55:33.051901 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
218 07:55:33.154011 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 07:55:33.154405 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
220 07:55:33.154523 extracting modules file /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119448/extract-nfsrootfs-6693c83t
221 07:55:33.158632 extracting modules file /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119448/extract-overlay-ramdisk-vyk44gz4/ramdisk
222 07:55:33.162438 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 07:55:33.162552 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
224 07:55:33.162643 [common] Applying overlay to NFS
225 07:55:33.162720 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119448/compress-overlay-s3gszazn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119448/extract-nfsrootfs-6693c83t
226 07:55:33.614568 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 07:55:33.614740 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
228 07:55:33.614838 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 07:55:33.614929 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
230 07:55:33.615010 Building ramdisk /var/lib/lava/dispatcher/tmp/8119448/extract-overlay-ramdisk-vyk44gz4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119448/extract-overlay-ramdisk-vyk44gz4/ramdisk
231 07:55:33.649545 >> 24546 blocks
232 07:55:34.115248 rename /var/lib/lava/dispatcher/tmp/8119448/extract-overlay-ramdisk-vyk44gz4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/ramdisk/ramdisk.cpio.gz
233 07:55:34.115664 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 07:55:34.115800 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
235 07:55:34.115944 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
236 07:55:34.116038 No mkimage arch provided, not using FIT.
237 07:55:34.116130 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 07:55:34.116213 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 07:55:34.116314 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
240 07:55:34.116409 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
241 07:55:34.116488 No LXC device requested
242 07:55:34.116572 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 07:55:34.116663 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
244 07:55:34.116744 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 07:55:34.116820 Checking files for TFTP limit of 4294967296 bytes.
246 07:55:34.117207 end: 1 tftp-deploy (duration 00:00:23) [common]
247 07:55:34.117312 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 07:55:34.117411 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 07:55:34.117542 substitutions:
250 07:55:34.117613 - {DTB}: None
251 07:55:34.117679 - {INITRD}: 8119448/tftp-deploy-z3lm33sz/ramdisk/ramdisk.cpio.gz
252 07:55:34.117741 - {KERNEL}: 8119448/tftp-deploy-z3lm33sz/kernel/bzImage
253 07:55:34.117800 - {LAVA_MAC}: None
254 07:55:34.117859 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119448/extract-nfsrootfs-6693c83t
255 07:55:34.117919 - {NFS_SERVER_IP}: 192.168.201.1
256 07:55:34.117976 - {PRESEED_CONFIG}: None
257 07:55:34.118034 - {PRESEED_LOCAL}: None
258 07:55:34.118090 - {RAMDISK}: 8119448/tftp-deploy-z3lm33sz/ramdisk/ramdisk.cpio.gz
259 07:55:34.118147 - {ROOT_PART}: None
260 07:55:34.118203 - {ROOT}: None
261 07:55:34.118305 - {SERVER_IP}: 192.168.201.1
262 07:55:34.118361 - {TEE}: None
263 07:55:34.118417 Parsed boot commands:
264 07:55:34.118472 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 07:55:34.118624 Parsed boot commands: tftpboot 192.168.201.1 8119448/tftp-deploy-z3lm33sz/kernel/bzImage 8119448/tftp-deploy-z3lm33sz/kernel/cmdline 8119448/tftp-deploy-z3lm33sz/ramdisk/ramdisk.cpio.gz
266 07:55:34.118714 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 07:55:34.118801 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 07:55:34.118897 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 07:55:34.118986 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 07:55:34.119056 Not connected, no need to disconnect.
271 07:55:34.119133 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 07:55:34.119212 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 07:55:34.119280 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
274 07:55:34.121979 Setting prompt string to ['lava-test: # ']
275 07:55:34.122319 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 07:55:34.122420 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 07:55:34.122516 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 07:55:34.122607 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 07:55:34.122795 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
280 07:55:34.141874 >> Command sent successfully.
281 07:55:34.143762 Returned 0 in 0 seconds
282 07:55:34.244868 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 07:55:34.246325 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 07:55:34.246783 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 07:55:34.247189 Setting prompt string to 'Starting depthcharge on Helios...'
287 07:55:34.247500 Changing prompt to 'Starting depthcharge on Helios...'
288 07:55:34.247851 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 07:55:34.248962 [Enter `^Ec?' for help]
290 07:55:41.514820
291 07:55:41.515479
292 07:55:41.524412 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 07:55:41.527841 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 07:55:41.534156 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 07:55:41.538004 CPU: AES supported, TXT NOT supported, VT supported
296 07:55:41.544180 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 07:55:41.547877 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 07:55:41.554633 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 07:55:41.557937 VBOOT: Loading verstage.
300 07:55:41.561064 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 07:55:41.567552 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 07:55:41.574378 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 07:55:41.574997 CBFS @ c08000 size 3f8000
304 07:55:41.581235 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 07:55:41.584132 CBFS: Locating 'fallback/verstage'
306 07:55:41.587546 CBFS: Found @ offset 10fb80 size 1072c
307 07:55:41.591287
308 07:55:41.591880
309 07:55:41.601635 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 07:55:41.615862 Probing TPM: . done!
311 07:55:41.619186 TPM ready after 0 ms
312 07:55:41.622696 Connected to device vid:did:rid of 1ae0:0028:00
313 07:55:41.632501 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 07:55:41.635848 Initialized TPM device CR50 revision 0
315 07:55:41.677726 tlcl_send_startup: Startup return code is 0
316 07:55:41.678361 TPM: setup succeeded
317 07:55:41.690311 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 07:55:41.693617 Chrome EC: UHEPI supported
319 07:55:41.697202 Phase 1
320 07:55:41.700074 FMAP: area GBB found @ c05000 (12288 bytes)
321 07:55:41.707037 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 07:55:41.710296 Phase 2
323 07:55:41.710898 Phase 3
324 07:55:41.713507 FMAP: area GBB found @ c05000 (12288 bytes)
325 07:55:41.720276 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 07:55:41.726503 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 07:55:41.729879 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 07:55:41.736616 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 07:55:41.752662 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 07:55:41.756063 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 07:55:41.762446 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 07:55:41.766725 Phase 4
333 07:55:41.769994 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 07:55:41.776606 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 07:55:41.779604
336 07:55:41.956269 VB2:vb2_rsa_verify_digest() Digest check failed!
337 07:55:41.962817 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 07:55:41.963403 Saving nvdata
339 07:55:41.966084 Reboot requested (10020007)
340 07:55:41.969469 board_reset() called!
341 07:55:41.970056 full_reset() called!
342 07:55:46.487860
343 07:55:46.488538
344 07:55:46.490846 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
345 07:55:46.497725 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
346 07:55:46.501174 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
347 07:55:46.505104 CPU: AES supported, TXT NOT supported, VT supported
348 07:55:46.512359 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
349 07:55:46.515959 PCH: device id 0284 (rev 00) is Cometlake-U Premium
350 07:55:46.522956 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
351 07:55:46.526690 VBOOT: Loading verstage.
352 07:55:46.530685 FMAP: Found "FLASH" version 1.1 at 0xc04000.
353 07:55:46.534101 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
354 07:55:46.541330 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 07:55:46.541822 CBFS @ c08000 size 3f8000
356 07:55:46.548474 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 07:55:46.551933 CBFS: Locating 'fallback/verstage'
358 07:55:46.555973 CBFS: Found @ offset 10fb80 size 1072c
359 07:55:46.556561
360 07:55:46.559129
361 07:55:46.559648
362 07:55:46.566371 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
363 07:55:46.583338 Probing TPM: . done!
364 07:55:46.586831 TPM ready after 0 ms
365 07:55:46.591447 Connected to device vid:did:rid of 1ae0:0028:00
366 07:55:46.602529 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
367 07:55:46.650998 Initialized TPM device CR50 revision 0
368 07:55:46.658852 tlcl_send_startup: Startup return code is 0
369 07:55:46.659348 TPM: setup succeeded
370 07:55:46.671771 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
371 07:55:46.675350 Chrome EC: UHEPI supported
372 07:55:46.678597 Phase 1
373 07:55:46.682013 FMAP: area GBB found @ c05000 (12288 bytes)
374 07:55:46.688914 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
375 07:55:46.695134 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
376 07:55:46.698367 Recovery requested (1009000e)
377 07:55:46.704365 Saving nvdata
378 07:55:46.710517 tlcl_extend: response is 0
379 07:55:46.719175 tlcl_extend: response is 0
380 07:55:46.726175 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 07:55:46.729395 CBFS @ c08000 size 3f8000
382 07:55:46.735791 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 07:55:46.739206 CBFS: Locating 'fallback/romstage'
384 07:55:46.743106 CBFS: Found @ offset 80 size 145fc
385 07:55:46.745804 Accumulated console time in verstage 98 ms
386 07:55:46.746324
387 07:55:46.746713
388 07:55:46.759161 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
389 07:55:46.766030 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
390 07:55:46.768878 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
391 07:55:46.772410 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
392 07:55:46.778683 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
393 07:55:46.781805 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
394 07:55:46.785831 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
395 07:55:46.788759 TCO_STS: 0000 0000
396 07:55:46.791679 GEN_PMCON: e0015238 00000200
397 07:55:46.795658 GBLRST_CAUSE: 00000000 00000000
398 07:55:46.796252 prev_sleep_state 5
399 07:55:46.799298 Boot Count incremented to 38898
400 07:55:46.806196 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 07:55:46.809214 CBFS @ c08000 size 3f8000
402 07:55:46.815717 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 07:55:46.816242 CBFS: Locating 'fspm.bin'
404 07:55:46.822375 CBFS: Found @ offset 5ffc0 size 71000
405 07:55:46.825723 Chrome EC: UHEPI supported
406 07:55:46.831885 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
407 07:55:46.835694 Probing TPM: done!
408 07:55:46.842523 Connected to device vid:did:rid of 1ae0:0028:00
409 07:55:46.852529 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
410 07:55:46.858420 Initialized TPM device CR50 revision 0
411 07:55:46.867217 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
412 07:55:46.873878 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
413 07:55:46.877124
414 07:55:46.877614 MRC cache found, size 1948
415 07:55:46.880352 bootmode is set to: 2
416 07:55:46.883367 PRMRR disabled by config.
417 07:55:46.887214 SPD INDEX = 1
418 07:55:46.890529 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
419 07:55:46.893826 CBFS @ c08000 size 3f8000
420 07:55:46.900517 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
421 07:55:46.901123 CBFS: Locating 'spd.bin'
422 07:55:46.903556 CBFS: Found @ offset 5fb80 size 400
423 07:55:46.906847
424 07:55:46.907451 SPD: module type is LPDDR3
425 07:55:46.909890 SPD: module part is
426 07:55:46.916629 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
427 07:55:46.919934 SPD: device width 4 bits, bus width 8 bits
428 07:55:46.922810 SPD: module size is 4096 MB (per channel)
429 07:55:46.926670 memory slot: 0 configuration done.
430 07:55:46.933051 memory slot: 2 configuration done.
431 07:55:46.981572 CBMEM:
432 07:55:46.984686 IMD: root @ 99fff000 254 entries.
433 07:55:46.988288 IMD: root @ 99ffec00 62 entries.
434 07:55:46.991462 External stage cache:
435 07:55:46.994459 IMD: root @ 9abff000 254 entries.
436 07:55:46.997998 IMD: root @ 9abfec00 62 entries.
437 07:55:47.004560 Chrome EC: clear events_b mask to 0x0000000020004000
438 07:55:47.017467 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
439 07:55:47.030729 tlcl_write: response is 0
440 07:55:47.039117 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
441 07:55:47.045967 MRC: TPM MRC hash updated successfully.
442 07:55:47.046608 2 DIMMs found
443 07:55:47.049712 SMM Memory Map
444 07:55:47.052510 SMRAM : 0x9a000000 0x1000000
445 07:55:47.055934 Subregion 0: 0x9a000000 0xa00000
446 07:55:47.059356 Subregion 1: 0x9aa00000 0x200000
447 07:55:47.062805 Subregion 2: 0x9ac00000 0x400000
448 07:55:47.065635 top_of_ram = 0x9a000000
449 07:55:47.068796 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
450 07:55:47.075821 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
451 07:55:47.078712 MTRR Range: Start=ff000000 End=0 (Size 1000000)
452 07:55:47.085422 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 07:55:47.089146 CBFS @ c08000 size 3f8000
454 07:55:47.091934 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 07:55:47.095196 CBFS: Locating 'fallback/postcar'
456 07:55:47.102157 CBFS: Found @ offset 107000 size 4b44
457 07:55:47.108474 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
458 07:55:47.118196 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
459 07:55:47.121613 Processing 180 relocs. Offset value of 0x97c0c000
460 07:55:47.129692 Accumulated console time in romstage 286 ms
461 07:55:47.130335
462 07:55:47.130837
463 07:55:47.139333 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
464 07:55:47.146209 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 07:55:47.149283 CBFS @ c08000 size 3f8000
466 07:55:47.155976 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 07:55:47.159162 CBFS: Locating 'fallback/ramstage'
468 07:55:47.162468 CBFS: Found @ offset 43380 size 1b9e8
469 07:55:47.168968 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
470 07:55:47.200977 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
471 07:55:47.204223 Processing 3976 relocs. Offset value of 0x98db0000
472 07:55:47.210976 Accumulated console time in postcar 52 ms
473 07:55:47.211466
474 07:55:47.211849
475 07:55:47.221352 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
476 07:55:47.228105 FMAP: area RO_VPD found @ c00000 (16384 bytes)
477 07:55:47.231150 WARNING: RO_VPD is uninitialized or empty.
478 07:55:47.234614 FMAP: area RW_VPD found @ af8000 (8192 bytes)
479 07:55:47.241094 FMAP: area RW_VPD found @ af8000 (8192 bytes)
480 07:55:47.241699 Normal boot.
481 07:55:47.247590 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
482 07:55:47.250910 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
483 07:55:47.254191 CBFS @ c08000 size 3f8000
484 07:55:47.260441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
485 07:55:47.264512 CBFS: Locating 'cpu_microcode_blob.bin'
486 07:55:47.267271 CBFS: Found @ offset 14700 size 2ec00
487 07:55:47.270505 microcode: sig=0x806ec pf=0x4 revision=0xc9
488 07:55:47.273569 Skip microcode update
489 07:55:47.279942 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
490 07:55:47.280436 CBFS @ c08000 size 3f8000
491 07:55:47.283835
492 07:55:47.286761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
493 07:55:47.290415 CBFS: Locating 'fsps.bin'
494 07:55:47.293182 CBFS: Found @ offset d1fc0 size 35000
495 07:55:47.319478 Detected 4 core, 8 thread CPU.
496 07:55:47.322917 Setting up SMI for CPU
497 07:55:47.326078 IED base = 0x9ac00000
498 07:55:47.326619 IED size = 0x00400000
499 07:55:47.329147 Will perform SMM setup.
500 07:55:47.335878 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
501 07:55:47.342501 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
502 07:55:47.346330 Processing 16 relocs. Offset value of 0x00030000
503 07:55:47.348830
504 07:55:47.349317 Attempting to start 7 APs
505 07:55:47.355722 Waiting for 10ms after sending INIT.
506 07:55:47.369420 Waiting for 1st SIPI to complete...done.
507 07:55:47.370021 AP: slot 2 apic_id 1.
508 07:55:47.376082 Waiting for 2nd SIPI to complete...done.
509 07:55:47.376671 AP: slot 3 apic_id 3.
510 07:55:47.378854 AP: slot 5 apic_id 2.
511 07:55:47.382768 AP: slot 7 apic_id 7.
512 07:55:47.383364 AP: slot 6 apic_id 6.
513 07:55:47.385795 AP: slot 1 apic_id 4.
514 07:55:47.389130 AP: slot 4 apic_id 5.
515 07:55:47.395293 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
516 07:55:47.402381 Processing 13 relocs. Offset value of 0x00038000
517 07:55:47.408621 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
518 07:55:47.411794 Installing SMM handler to 0x9a000000
519 07:55:47.418562 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
520 07:55:47.425117 Processing 658 relocs. Offset value of 0x9a010000
521 07:55:47.431764 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
522 07:55:47.435023 Processing 13 relocs. Offset value of 0x9a008000
523 07:55:47.441797 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
524 07:55:47.448507 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
525 07:55:47.454598 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
526 07:55:47.458010 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
527 07:55:47.464526 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
528 07:55:47.471731 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
529 07:55:47.477927 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
530 07:55:47.484508 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
531 07:55:47.487696 Clearing SMI status registers
532 07:55:47.488186 SMI_STS: PM1
533 07:55:47.491316 PM1_STS: PWRBTN
534 07:55:47.491910 TCO_STS: SECOND_TO
535 07:55:47.494166 New SMBASE 0x9a000000
536 07:55:47.497360 In relocation handler: CPU 0
537 07:55:47.501165 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
538 07:55:47.507716 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 07:55:47.508315 Relocation complete.
540 07:55:47.510853 New SMBASE 0x99fff800
541 07:55:47.513921 In relocation handler: CPU 2
542 07:55:47.517200 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
543 07:55:47.523615 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 07:55:47.524196 Relocation complete.
545 07:55:47.527091 New SMBASE 0x99ffec00
546 07:55:47.530126 In relocation handler: CPU 5
547 07:55:47.534059 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
548 07:55:47.540644 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 07:55:47.541241 Relocation complete.
550 07:55:47.543376 New SMBASE 0x99fff400
551 07:55:47.547220 In relocation handler: CPU 3
552 07:55:47.550349 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
553 07:55:47.556829 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 07:55:47.557426 Relocation complete.
555 07:55:47.560385 New SMBASE 0x99ffe800
556 07:55:47.563483 In relocation handler: CPU 6
557 07:55:47.566591 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
558 07:55:47.569830 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 07:55:47.573528
560 07:55:47.574123 Relocation complete.
561 07:55:47.576788 New SMBASE 0x99ffe400
562 07:55:47.579627 In relocation handler: CPU 7
563 07:55:47.582986 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
564 07:55:47.586767 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 07:55:47.589765 Relocation complete.
566 07:55:47.593252 New SMBASE 0x99fff000
567 07:55:47.596322 In relocation handler: CPU 4
568 07:55:47.599472 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
569 07:55:47.602756 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 07:55:47.606016 Relocation complete.
571 07:55:47.609890 New SMBASE 0x99fffc00
572 07:55:47.612554 In relocation handler: CPU 1
573 07:55:47.615730 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
574 07:55:47.618809 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 07:55:47.622286 Relocation complete.
576 07:55:47.625796 Initializing CPU #0
577 07:55:47.628927 CPU: vendor Intel device 806ec
578 07:55:47.632400 CPU: family 06, model 8e, stepping 0c
579 07:55:47.635459 Clearing out pending MCEs
580 07:55:47.636046 Setting up local APIC...
581 07:55:47.638835
582 07:55:47.639325 apic_id: 0x00 done.
583 07:55:47.642121 Turbo is available but hidden
584 07:55:47.645807 Turbo is available and visible
585 07:55:47.648909 VMX status: enabled
586 07:55:47.652166 IA32_FEATURE_CONTROL status: locked
587 07:55:47.652791 Skip microcode update
588 07:55:47.655462 CPU #0 initialized
589 07:55:47.658739 Initializing CPU #2
590 07:55:47.659326 Initializing CPU #3
591 07:55:47.662406 Initializing CPU #5
592 07:55:47.665273 CPU: vendor Intel device 806ec
593 07:55:47.668807 CPU: family 06, model 8e, stepping 0c
594 07:55:47.672029 CPU: vendor Intel device 806ec
595 07:55:47.675178 CPU: family 06, model 8e, stepping 0c
596 07:55:47.678605 Clearing out pending MCEs
597 07:55:47.681641 Clearing out pending MCEs
598 07:55:47.682128 Setting up local APIC...
599 07:55:47.685214 Initializing CPU #4
600 07:55:47.688118 Initializing CPU #1
601 07:55:47.691230 CPU: vendor Intel device 806ec
602 07:55:47.694774 CPU: family 06, model 8e, stepping 0c
603 07:55:47.698360 CPU: vendor Intel device 806ec
604 07:55:47.701020 CPU: family 06, model 8e, stepping 0c
605 07:55:47.704295 Clearing out pending MCEs
606 07:55:47.704720 Clearing out pending MCEs
607 07:55:47.708381
608 07:55:47.708971 Setting up local APIC...
609 07:55:47.711212 Initializing CPU #6
610 07:55:47.711703 Initializing CPU #7
611 07:55:47.714499
612 07:55:47.714991 CPU: vendor Intel device 806ec
613 07:55:47.721264 CPU: family 06, model 8e, stepping 0c
614 07:55:47.721754 Setting up local APIC...
615 07:55:47.724348 Clearing out pending MCEs
616 07:55:47.727934 CPU: vendor Intel device 806ec
617 07:55:47.730993 CPU: family 06, model 8e, stepping 0c
618 07:55:47.734830 Setting up local APIC...
619 07:55:47.737654 apic_id: 0x04 done.
620 07:55:47.738285 Setting up local APIC...
621 07:55:47.741290 CPU: vendor Intel device 806ec
622 07:55:47.747689 CPU: family 06, model 8e, stepping 0c
623 07:55:47.748280 Clearing out pending MCEs
624 07:55:47.751064 Clearing out pending MCEs
625 07:55:47.754119 apic_id: 0x06 done.
626 07:55:47.757554 Setting up local APIC...
627 07:55:47.758147 Setting up local APIC...
628 07:55:47.761298 apic_id: 0x02 done.
629 07:55:47.764203 apic_id: 0x03 done.
630 07:55:47.764803 VMX status: enabled
631 07:55:47.767527 VMX status: enabled
632 07:55:47.770658 IA32_FEATURE_CONTROL status: locked
633 07:55:47.774083 IA32_FEATURE_CONTROL status: locked
634 07:55:47.777278 Skip microcode update
635 07:55:47.777767 Skip microcode update
636 07:55:47.780388 CPU #5 initialized
637 07:55:47.783773 CPU #3 initialized
638 07:55:47.784262 apic_id: 0x01 done.
639 07:55:47.787268 apic_id: 0x05 done.
640 07:55:47.790124 VMX status: enabled
641 07:55:47.790634 VMX status: enabled
642 07:55:47.793813 IA32_FEATURE_CONTROL status: locked
643 07:55:47.797002 IA32_FEATURE_CONTROL status: locked
644 07:55:47.800508 Skip microcode update
645 07:55:47.803444 Skip microcode update
646 07:55:47.803935 CPU #1 initialized
647 07:55:47.807132 CPU #4 initialized
648 07:55:47.807754 VMX status: enabled
649 07:55:47.810269 apic_id: 0x07 done.
650 07:55:47.813182 IA32_FEATURE_CONTROL status: locked
651 07:55:47.816811 VMX status: enabled
652 07:55:47.817300 Skip microcode update
653 07:55:47.819966
654 07:55:47.820468 VMX status: enabled
655 07:55:47.823803 CPU #6 initialized
656 07:55:47.826691 IA32_FEATURE_CONTROL status: locked
657 07:55:47.830390 IA32_FEATURE_CONTROL status: locked
658 07:55:47.833255 Skip microcode update
659 07:55:47.833852 Skip microcode update
660 07:55:47.836589 CPU #7 initialized
661 07:55:47.837187 CPU #2 initialized
662 07:55:47.843507 bsp_do_flight_plan done after 465 msecs.
663 07:55:47.846517 CPU: frequency set to 4200 MHz
664 07:55:47.847013 Enabling SMIs.
665 07:55:47.849552 Locking SMM.
666 07:55:47.863919 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
667 07:55:47.866806 CBFS @ c08000 size 3f8000
668 07:55:47.873109 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
669 07:55:47.873728 CBFS: Locating 'vbt.bin'
670 07:55:47.879393 CBFS: Found @ offset 5f5c0 size 499
671 07:55:47.882926 Found a VBT of 4608 bytes after decompression
672 07:55:48.066725 Display FSP Version Info HOB
673 07:55:48.069867 Reference Code - CPU = 9.0.1e.30
674 07:55:48.073188 uCode Version = 0.0.0.ca
675 07:55:48.076413 TXT ACM version = ff.ff.ff.ffff
676 07:55:48.079291 Display FSP Version Info HOB
677 07:55:48.082738 Reference Code - ME = 9.0.1e.30
678 07:55:48.085987 MEBx version = 0.0.0.0
679 07:55:48.089386 ME Firmware Version = Consumer SKU
680 07:55:48.092403 Display FSP Version Info HOB
681 07:55:48.095892 Reference Code - CML PCH = 9.0.1e.30
682 07:55:48.099476 PCH-CRID Status = Disabled
683 07:55:48.102668 PCH-CRID Original Value = ff.ff.ff.ffff
684 07:55:48.106332 PCH-CRID New Value = ff.ff.ff.ffff
685 07:55:48.108772 OPROM - RST - RAID = ff.ff.ff.ffff
686 07:55:48.112237 ChipsetInit Base Version = ff.ff.ff.ffff
687 07:55:48.118988 ChipsetInit Oem Version = ff.ff.ff.ffff
688 07:55:48.119478 Display FSP Version Info HOB
689 07:55:48.125374 Reference Code - SA - System Agent = 9.0.1e.30
690 07:55:48.128372 Reference Code - MRC = 0.7.1.6c
691 07:55:48.131975 SA - PCIe Version = 9.0.1e.30
692 07:55:48.135026 SA-CRID Status = Disabled
693 07:55:48.138515 SA-CRID Original Value = 0.0.0.c
694 07:55:48.139138 SA-CRID New Value = 0.0.0.c
695 07:55:48.141935 OPROM - VBIOS = ff.ff.ff.ffff
696 07:55:48.145553 RTC Init
697 07:55:48.148538 Set power on after power failure.
698 07:55:48.149129 Disabling Deep S3
699 07:55:48.151832 Disabling Deep S3
700 07:55:48.155590 Disabling Deep S4
701 07:55:48.156174 Disabling Deep S4
702 07:55:48.158410 Disabling Deep S5
703 07:55:48.158897 Disabling Deep S5
704 07:55:48.165260 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
705 07:55:48.168411 Enumerating buses...
706 07:55:48.171271 Show all devs... Before device enumeration.
707 07:55:48.174326 Root Device: enabled 1
708 07:55:48.177535 CPU_CLUSTER: 0: enabled 1
709 07:55:48.178036 DOMAIN: 0000: enabled 1
710 07:55:48.181204 APIC: 00: enabled 1
711 07:55:48.184226 PCI: 00:00.0: enabled 1
712 07:55:48.184815 PCI: 00:02.0: enabled 1
713 07:55:48.187529
714 07:55:48.188037 PCI: 00:04.0: enabled 0
715 07:55:48.190889 PCI: 00:05.0: enabled 0
716 07:55:48.194306 PCI: 00:12.0: enabled 1
717 07:55:48.194789 PCI: 00:12.5: enabled 0
718 07:55:48.197303 PCI: 00:12.6: enabled 0
719 07:55:48.200545 PCI: 00:14.0: enabled 1
720 07:55:48.203891 PCI: 00:14.1: enabled 0
721 07:55:48.204484 PCI: 00:14.3: enabled 1
722 07:55:48.206947 PCI: 00:14.5: enabled 0
723 07:55:48.210369 PCI: 00:15.0: enabled 1
724 07:55:48.214050 PCI: 00:15.1: enabled 1
725 07:55:48.214772 PCI: 00:15.2: enabled 0
726 07:55:48.216935 PCI: 00:15.3: enabled 0
727 07:55:48.220792 PCI: 00:16.0: enabled 1
728 07:55:48.223862 PCI: 00:16.1: enabled 0
729 07:55:48.224457 PCI: 00:16.2: enabled 0
730 07:55:48.226894 PCI: 00:16.3: enabled 0
731 07:55:48.229849 PCI: 00:16.4: enabled 0
732 07:55:48.233124 PCI: 00:16.5: enabled 0
733 07:55:48.233626 PCI: 00:17.0: enabled 1
734 07:55:48.237017 PCI: 00:19.0: enabled 1
735 07:55:48.239848 PCI: 00:19.1: enabled 0
736 07:55:48.243020 PCI: 00:19.2: enabled 0
737 07:55:48.243512 PCI: 00:1a.0: enabled 0
738 07:55:48.246768 PCI: 00:1c.0: enabled 0
739 07:55:48.250180 PCI: 00:1c.1: enabled 0
740 07:55:48.253430 PCI: 00:1c.2: enabled 0
741 07:55:48.254038 PCI: 00:1c.3: enabled 0
742 07:55:48.256281 PCI: 00:1c.4: enabled 0
743 07:55:48.259841 PCI: 00:1c.5: enabled 0
744 07:55:48.262896 PCI: 00:1c.6: enabled 0
745 07:55:48.263496 PCI: 00:1c.7: enabled 0
746 07:55:48.265794 PCI: 00:1d.0: enabled 1
747 07:55:48.269745 PCI: 00:1d.1: enabled 0
748 07:55:48.273249 PCI: 00:1d.2: enabled 0
749 07:55:48.274012 PCI: 00:1d.3: enabled 0
750 07:55:48.276209 PCI: 00:1d.4: enabled 0
751 07:55:48.279083 PCI: 00:1d.5: enabled 1
752 07:55:48.282536 PCI: 00:1e.0: enabled 1
753 07:55:48.283134 PCI: 00:1e.1: enabled 0
754 07:55:48.285658 PCI: 00:1e.2: enabled 1
755 07:55:48.289170 PCI: 00:1e.3: enabled 1
756 07:55:48.289766 PCI: 00:1f.0: enabled 1
757 07:55:48.292330
758 07:55:48.293065 PCI: 00:1f.1: enabled 1
759 07:55:48.295448 PCI: 00:1f.2: enabled 1
760 07:55:48.298949 PCI: 00:1f.3: enabled 1
761 07:55:48.299441 PCI: 00:1f.4: enabled 1
762 07:55:48.302370 PCI: 00:1f.5: enabled 1
763 07:55:48.305490 PCI: 00:1f.6: enabled 0
764 07:55:48.308359 USB0 port 0: enabled 1
765 07:55:48.308856 I2C: 00:15: enabled 1
766 07:55:48.311832 I2C: 00:5d: enabled 1
767 07:55:48.315117 GENERIC: 0.0: enabled 1
768 07:55:48.315686 I2C: 00:1a: enabled 1
769 07:55:48.318588 I2C: 00:38: enabled 1
770 07:55:48.321447 I2C: 00:39: enabled 1
771 07:55:48.324863 I2C: 00:3a: enabled 1
772 07:55:48.325454 I2C: 00:3b: enabled 1
773 07:55:48.328683 PCI: 00:00.0: enabled 1
774 07:55:48.331495 SPI: 00: enabled 1
775 07:55:48.331979 SPI: 01: enabled 1
776 07:55:48.334677 PNP: 0c09.0: enabled 1
777 07:55:48.337889 USB2 port 0: enabled 1
778 07:55:48.338418 USB2 port 1: enabled 1
779 07:55:48.341284 USB2 port 2: enabled 0
780 07:55:48.344990 USB2 port 3: enabled 0
781 07:55:48.345589 USB2 port 5: enabled 0
782 07:55:48.347763 USB2 port 6: enabled 1
783 07:55:48.351271 USB2 port 9: enabled 1
784 07:55:48.354203 USB3 port 0: enabled 1
785 07:55:48.354730 USB3 port 1: enabled 1
786 07:55:48.357442 USB3 port 2: enabled 1
787 07:55:48.360578 USB3 port 3: enabled 1
788 07:55:48.361064 USB3 port 4: enabled 0
789 07:55:48.364541 APIC: 04: enabled 1
790 07:55:48.367216 APIC: 01: enabled 1
791 07:55:48.367731 APIC: 03: enabled 1
792 07:55:48.370456 APIC: 05: enabled 1
793 07:55:48.374180 APIC: 02: enabled 1
794 07:55:48.374805 APIC: 06: enabled 1
795 07:55:48.377165 APIC: 07: enabled 1
796 07:55:48.377747 Compare with tree...
797 07:55:48.380462
798 07:55:48.380977 Root Device: enabled 1
799 07:55:48.383914 CPU_CLUSTER: 0: enabled 1
800 07:55:48.386782 APIC: 00: enabled 1
801 07:55:48.387270 APIC: 04: enabled 1
802 07:55:48.389960 APIC: 01: enabled 1
803 07:55:48.393506 APIC: 03: enabled 1
804 07:55:48.393992 APIC: 05: enabled 1
805 07:55:48.396696
806 07:55:48.397306 APIC: 02: enabled 1
807 07:55:48.400453 APIC: 06: enabled 1
808 07:55:48.403316 APIC: 07: enabled 1
809 07:55:48.403804 DOMAIN: 0000: enabled 1
810 07:55:48.406525 PCI: 00:00.0: enabled 1
811 07:55:48.410029 PCI: 00:02.0: enabled 1
812 07:55:48.413045 PCI: 00:04.0: enabled 0
813 07:55:48.416195 PCI: 00:05.0: enabled 0
814 07:55:48.416700 PCI: 00:12.0: enabled 1
815 07:55:48.419655 PCI: 00:12.5: enabled 0
816 07:55:48.422760 PCI: 00:12.6: enabled 0
817 07:55:48.425929 PCI: 00:14.0: enabled 1
818 07:55:48.429390 USB0 port 0: enabled 1
819 07:55:48.429975 USB2 port 0: enabled 1
820 07:55:48.432476 USB2 port 1: enabled 1
821 07:55:48.435919 USB2 port 2: enabled 0
822 07:55:48.438973 USB2 port 3: enabled 0
823 07:55:48.442281 USB2 port 5: enabled 0
824 07:55:48.445988 USB2 port 6: enabled 1
825 07:55:48.446633 USB2 port 9: enabled 1
826 07:55:48.448838 USB3 port 0: enabled 1
827 07:55:48.452012 USB3 port 1: enabled 1
828 07:55:48.455244 USB3 port 2: enabled 1
829 07:55:48.458951 USB3 port 3: enabled 1
830 07:55:48.461907 USB3 port 4: enabled 0
831 07:55:48.462522 PCI: 00:14.1: enabled 0
832 07:55:48.465598 PCI: 00:14.3: enabled 1
833 07:55:48.468913 PCI: 00:14.5: enabled 0
834 07:55:48.471792 PCI: 00:15.0: enabled 1
835 07:55:48.475286 I2C: 00:15: enabled 1
836 07:55:48.475872 PCI: 00:15.1: enabled 1
837 07:55:48.478487 I2C: 00:5d: enabled 1
838 07:55:48.481736 GENERIC: 0.0: enabled 1
839 07:55:48.485055 PCI: 00:15.2: enabled 0
840 07:55:48.488048 PCI: 00:15.3: enabled 0
841 07:55:48.488637 PCI: 00:16.0: enabled 1
842 07:55:48.491055 PCI: 00:16.1: enabled 0
843 07:55:48.494579 PCI: 00:16.2: enabled 0
844 07:55:48.498016 PCI: 00:16.3: enabled 0
845 07:55:48.501021 PCI: 00:16.4: enabled 0
846 07:55:48.501506 PCI: 00:16.5: enabled 0
847 07:55:48.504490 PCI: 00:17.0: enabled 1
848 07:55:48.507955 PCI: 00:19.0: enabled 1
849 07:55:48.510729 I2C: 00:1a: enabled 1
850 07:55:48.514394 I2C: 00:38: enabled 1
851 07:55:48.514973 I2C: 00:39: enabled 1
852 07:55:48.517521 I2C: 00:3a: enabled 1
853 07:55:48.520956 I2C: 00:3b: enabled 1
854 07:55:48.524033 PCI: 00:19.1: enabled 0
855 07:55:48.527188 PCI: 00:19.2: enabled 0
856 07:55:48.527776 PCI: 00:1a.0: enabled 0
857 07:55:48.530522 PCI: 00:1c.0: enabled 0
858 07:55:48.533636 PCI: 00:1c.1: enabled 0
859 07:55:48.536766 PCI: 00:1c.2: enabled 0
860 07:55:48.539874 PCI: 00:1c.3: enabled 0
861 07:55:48.540364 PCI: 00:1c.4: enabled 0
862 07:55:48.543527 PCI: 00:1c.5: enabled 0
863 07:55:48.546671 PCI: 00:1c.6: enabled 0
864 07:55:48.550030 PCI: 00:1c.7: enabled 0
865 07:55:48.553535 PCI: 00:1d.0: enabled 1
866 07:55:48.554140 PCI: 00:1d.1: enabled 0
867 07:55:48.556624 PCI: 00:1d.2: enabled 0
868 07:55:48.560208 PCI: 00:1d.3: enabled 0
869 07:55:48.563155 PCI: 00:1d.4: enabled 0
870 07:55:48.566558 PCI: 00:1d.5: enabled 1
871 07:55:48.567156 PCI: 00:00.0: enabled 1
872 07:55:48.570278 PCI: 00:1e.0: enabled 1
873 07:55:48.573185 PCI: 00:1e.1: enabled 0
874 07:55:48.576364 PCI: 00:1e.2: enabled 1
875 07:55:48.576985 SPI: 00: enabled 1
876 07:55:48.579634 PCI: 00:1e.3: enabled 1
877 07:55:48.582949 SPI: 01: enabled 1
878 07:55:48.586335 PCI: 00:1f.0: enabled 1
879 07:55:48.589550 PNP: 0c09.0: enabled 1
880 07:55:48.590146 PCI: 00:1f.1: enabled 1
881 07:55:48.592613 PCI: 00:1f.2: enabled 1
882 07:55:48.596169 PCI: 00:1f.3: enabled 1
883 07:55:48.598793 PCI: 00:1f.4: enabled 1
884 07:55:48.602703 PCI: 00:1f.5: enabled 1
885 07:55:48.603302 PCI: 00:1f.6: enabled 0
886 07:55:48.606152 Root Device scanning...
887 07:55:48.608920 scan_static_bus for Root Device
888 07:55:48.612665 CPU_CLUSTER: 0 enabled
889 07:55:48.615486 DOMAIN: 0000 enabled
890 07:55:48.615975 DOMAIN: 0000 scanning...
891 07:55:48.618749 PCI: pci_scan_bus for bus 00
892 07:55:48.621928 PCI: 00:00.0 [8086/0000] ops
893 07:55:48.625600 PCI: 00:00.0 [8086/9b61] enabled
894 07:55:48.628508 PCI: 00:02.0 [8086/0000] bus ops
895 07:55:48.631594 PCI: 00:02.0 [8086/9b41] enabled
896 07:55:48.635369 PCI: 00:04.0 [8086/1903] disabled
897 07:55:48.638535 PCI: 00:08.0 [8086/1911] enabled
898 07:55:48.642160 PCI: 00:12.0 [8086/02f9] enabled
899 07:55:48.644638 PCI: 00:14.0 [8086/0000] bus ops
900 07:55:48.648371 PCI: 00:14.0 [8086/02ed] enabled
901 07:55:48.651519 PCI: 00:14.2 [8086/02ef] enabled
902 07:55:48.654836 PCI: 00:14.3 [8086/02f0] enabled
903 07:55:48.657797 PCI: 00:15.0 [8086/0000] bus ops
904 07:55:48.661526
905 07:55:48.662127 PCI: 00:15.0 [8086/02e8] enabled
906 07:55:48.664478
907 07:55:48.667943 PCI: 00:15.1 [8086/0000] bus ops
908 07:55:48.671021 PCI: 00:15.1 [8086/02e9] enabled
909 07:55:48.671510 PCI: 00:16.0 [8086/0000] ops
910 07:55:48.674405 PCI: 00:16.0 [8086/02e0] enabled
911 07:55:48.677591 PCI: 00:17.0 [8086/0000] ops
912 07:55:48.681641 PCI: 00:17.0 [8086/02d3] enabled
913 07:55:48.684324 PCI: 00:19.0 [8086/0000] bus ops
914 07:55:48.687131 PCI: 00:19.0 [8086/02c5] enabled
915 07:55:48.690837 PCI: 00:1d.0 [8086/0000] bus ops
916 07:55:48.694066 PCI: 00:1d.0 [8086/02b0] enabled
917 07:55:48.700730 PCI: Static device PCI: 00:1d.5 not found, disabling it.
918 07:55:48.704023 PCI: 00:1e.0 [8086/0000] ops
919 07:55:48.707227 PCI: 00:1e.0 [8086/02a8] enabled
920 07:55:48.710256 PCI: 00:1e.2 [8086/0000] bus ops
921 07:55:48.713345 PCI: 00:1e.2 [8086/02aa] enabled
922 07:55:48.716743 PCI: 00:1e.3 [8086/0000] bus ops
923 07:55:48.719747 PCI: 00:1e.3 [8086/02ab] enabled
924 07:55:48.723133 PCI: 00:1f.0 [8086/0000] bus ops
925 07:55:48.726699 PCI: 00:1f.0 [8086/0284] enabled
926 07:55:48.733281 PCI: Static device PCI: 00:1f.1 not found, disabling it.
927 07:55:48.739485 PCI: Static device PCI: 00:1f.2 not found, disabling it.
928 07:55:48.743139 PCI: 00:1f.3 [8086/0000] bus ops
929 07:55:48.746287 PCI: 00:1f.3 [8086/02c8] enabled
930 07:55:48.749435 PCI: 00:1f.4 [8086/0000] bus ops
931 07:55:48.752803 PCI: 00:1f.4 [8086/02a3] enabled
932 07:55:48.756168 PCI: 00:1f.5 [8086/0000] bus ops
933 07:55:48.759068 PCI: 00:1f.5 [8086/02a4] enabled
934 07:55:48.762834 PCI: Leftover static devices:
935 07:55:48.763432 PCI: 00:05.0
936 07:55:48.763931 PCI: 00:12.5
937 07:55:48.766524
938 07:55:48.767029 PCI: 00:12.6
939 07:55:48.767674 PCI: 00:14.1
940 07:55:48.769052 PCI: 00:14.5
941 07:55:48.769640 PCI: 00:15.2
942 07:55:48.772105 PCI: 00:15.3
943 07:55:48.772604 PCI: 00:16.1
944 07:55:48.773096 PCI: 00:16.2
945 07:55:48.775629 PCI: 00:16.3
946 07:55:48.776131 PCI: 00:16.4
947 07:55:48.778870 PCI: 00:16.5
948 07:55:48.779365 PCI: 00:19.1
949 07:55:48.781873 PCI: 00:19.2
950 07:55:48.782472 PCI: 00:1a.0
951 07:55:48.782968 PCI: 00:1c.0
952 07:55:48.785522 PCI: 00:1c.1
953 07:55:48.786300 PCI: 00:1c.2
954 07:55:48.788772 PCI: 00:1c.3
955 07:55:48.789366 PCI: 00:1c.4
956 07:55:48.789866 PCI: 00:1c.5
957 07:55:48.791620 PCI: 00:1c.6
958 07:55:48.792148 PCI: 00:1c.7
959 07:55:48.794880 PCI: 00:1d.1
960 07:55:48.795378 PCI: 00:1d.2
961 07:55:48.798800 PCI: 00:1d.3
962 07:55:48.799400 PCI: 00:1d.4
963 07:55:48.799908 PCI: 00:1d.5
964 07:55:48.801635 PCI: 00:1e.1
965 07:55:48.802205 PCI: 00:1f.1
966 07:55:48.804808 PCI: 00:1f.2
967 07:55:48.805404 PCI: 00:1f.6
968 07:55:48.808159 PCI: Check your devicetree.cb.
969 07:55:48.811522 PCI: 00:02.0 scanning...
970 07:55:48.814711 scan_generic_bus for PCI: 00:02.0
971 07:55:48.818054 scan_generic_bus for PCI: 00:02.0 done
972 07:55:48.824870 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
973 07:55:48.827853 PCI: 00:14.0 scanning...
974 07:55:48.830899 scan_static_bus for PCI: 00:14.0
975 07:55:48.831381 USB0 port 0 enabled
976 07:55:48.834339 USB0 port 0 scanning...
977 07:55:48.837724 scan_static_bus for USB0 port 0
978 07:55:48.841148 USB2 port 0 enabled
979 07:55:48.841633 USB2 port 1 enabled
980 07:55:48.844327 USB2 port 2 disabled
981 07:55:48.847674 USB2 port 3 disabled
982 07:55:48.848260 USB2 port 5 disabled
983 07:55:48.851091 USB2 port 6 enabled
984 07:55:48.854441 USB2 port 9 enabled
985 07:55:48.855023 USB3 port 0 enabled
986 07:55:48.857536 USB3 port 1 enabled
987 07:55:48.858143 USB3 port 2 enabled
988 07:55:48.860766 USB3 port 3 enabled
989 07:55:48.864156 USB3 port 4 disabled
990 07:55:48.864637 USB2 port 0 scanning...
991 07:55:48.867316 scan_static_bus for USB2 port 0
992 07:55:48.874210 scan_static_bus for USB2 port 0 done
993 07:55:48.877488 scan_bus: scanning of bus USB2 port 0 took 9698 usecs
994 07:55:48.880555 USB2 port 1 scanning...
995 07:55:48.883345 scan_static_bus for USB2 port 1
996 07:55:48.887068 scan_static_bus for USB2 port 1 done
997 07:55:48.893364 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
998 07:55:48.897028 USB2 port 6 scanning...
999 07:55:48.899704 scan_static_bus for USB2 port 6
1000 07:55:48.903486 scan_static_bus for USB2 port 6 done
1001 07:55:48.906288 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
1002 07:55:48.909609 USB2 port 9 scanning...
1003 07:55:48.913396 scan_static_bus for USB2 port 9
1004 07:55:48.916323 scan_static_bus for USB2 port 9 done
1005 07:55:48.923182 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
1006 07:55:48.926127 USB3 port 0 scanning...
1007 07:55:48.929029 scan_static_bus for USB3 port 0
1008 07:55:48.932749 scan_static_bus for USB3 port 0 done
1009 07:55:48.939353 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
1010 07:55:48.939862 USB3 port 1 scanning...
1011 07:55:48.942746 scan_static_bus for USB3 port 1
1012 07:55:48.945908 scan_static_bus for USB3 port 1 done
1013 07:55:48.949109
1014 07:55:48.952012 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
1015 07:55:48.955981 USB3 port 2 scanning...
1016 07:55:48.958804 scan_static_bus for USB3 port 2
1017 07:55:48.962312 scan_static_bus for USB3 port 2 done
1018 07:55:48.968806 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
1019 07:55:48.969303 USB3 port 3 scanning...
1020 07:55:48.972113
1021 07:55:48.975222 scan_static_bus for USB3 port 3
1022 07:55:48.978438 scan_static_bus for USB3 port 3 done
1023 07:55:48.981679 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
1024 07:55:48.985385 scan_static_bus for USB0 port 0 done
1025 07:55:48.988533
1026 07:55:48.991669 scan_bus: scanning of bus USB0 port 0 took 155326 usecs
1027 07:55:48.994619 scan_static_bus for PCI: 00:14.0 done
1028 07:55:49.001320 scan_bus: scanning of bus PCI: 00:14.0 took 172932 usecs
1029 07:55:49.004312 PCI: 00:15.0 scanning...
1030 07:55:49.007576 scan_generic_bus for PCI: 00:15.0
1031 07:55:49.011110 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1032 07:55:49.014133 scan_generic_bus for PCI: 00:15.0 done
1033 07:55:49.020500 scan_bus: scanning of bus PCI: 00:15.0 took 14315 usecs
1034 07:55:49.024120 PCI: 00:15.1 scanning...
1035 07:55:49.026967 scan_generic_bus for PCI: 00:15.1
1036 07:55:49.031147 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1037 07:55:49.037237 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1038 07:55:49.040351 scan_generic_bus for PCI: 00:15.1 done
1039 07:55:49.046813 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1040 07:55:49.047412 PCI: 00:19.0 scanning...
1041 07:55:49.050030 scan_generic_bus for PCI: 00:19.0
1042 07:55:49.056955 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1043 07:55:49.060195 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1044 07:55:49.062819 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1045 07:55:49.066673 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1046 07:55:49.072837 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1047 07:55:49.076394 scan_generic_bus for PCI: 00:19.0 done
1048 07:55:49.082777 scan_bus: scanning of bus PCI: 00:19.0 took 30737 usecs
1049 07:55:49.083372 PCI: 00:1d.0 scanning...
1050 07:55:49.088962 do_pci_scan_bridge for PCI: 00:1d.0
1051 07:55:49.089547 PCI: pci_scan_bus for bus 01
1052 07:55:49.092538 PCI: 01:00.0 [1c5c/1327] enabled
1053 07:55:49.099842 Enabling Common Clock Configuration
1054 07:55:49.102889 L1 Sub-State supported from root port 29
1055 07:55:49.105822 L1 Sub-State Support = 0xf
1056 07:55:49.109052 CommonModeRestoreTime = 0x28
1057 07:55:49.112682 Power On Value = 0x16, Power On Scale = 0x0
1058 07:55:49.113175 ASPM: Enabled L1
1059 07:55:49.118644 scan_bus: scanning of bus PCI: 00:1d.0 took 32774 usecs
1060 07:55:49.121849 PCI: 00:1e.2 scanning...
1061 07:55:49.125718 scan_generic_bus for PCI: 00:1e.2
1062 07:55:49.128654 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1063 07:55:49.131638 scan_generic_bus for PCI: 00:1e.2 done
1064 07:55:49.138681 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1065 07:55:49.141953 PCI: 00:1e.3 scanning...
1066 07:55:49.145343 scan_generic_bus for PCI: 00:1e.3
1067 07:55:49.148628 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1068 07:55:49.151373 scan_generic_bus for PCI: 00:1e.3 done
1069 07:55:49.158419 scan_bus: scanning of bus PCI: 00:1e.3 took 13994 usecs
1070 07:55:49.161409 PCI: 00:1f.0 scanning...
1071 07:55:49.164588 scan_static_bus for PCI: 00:1f.0
1072 07:55:49.167926 PNP: 0c09.0 enabled
1073 07:55:49.171380 scan_static_bus for PCI: 00:1f.0 done
1074 07:55:49.174109 scan_bus: scanning of bus PCI: 00:1f.0 took 12041 usecs
1075 07:55:49.177779
1076 07:55:49.178436 PCI: 00:1f.3 scanning...
1077 07:55:49.184359 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1078 07:55:49.187386 PCI: 00:1f.4 scanning...
1079 07:55:49.190615 scan_generic_bus for PCI: 00:1f.4
1080 07:55:49.194030 scan_generic_bus for PCI: 00:1f.4 done
1081 07:55:49.200495 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1082 07:55:49.203392 PCI: 00:1f.5 scanning...
1083 07:55:49.207087 scan_generic_bus for PCI: 00:1f.5
1084 07:55:49.210330 scan_generic_bus for PCI: 00:1f.5 done
1085 07:55:49.217160 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1086 07:55:49.219958 scan_bus: scanning of bus DOMAIN: 0000 took 604805 usecs
1087 07:55:49.226369 scan_static_bus for Root Device done
1088 07:55:49.229873 scan_bus: scanning of bus Root Device took 624672 usecs
1089 07:55:49.230402 done
1090 07:55:49.233225
1091 07:55:49.233713 Chrome EC: UHEPI supported
1092 07:55:49.236446
1093 07:55:49.239406 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1094 07:55:49.246412 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1095 07:55:49.252608 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1096 07:55:49.259317 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1097 07:55:49.262585 SPI flash protection: WPSW=0 SRP0=0
1098 07:55:49.268991 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1099 07:55:49.272141 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1100 07:55:49.275473 found VGA at PCI: 00:02.0
1101 07:55:49.279006 Setting up VGA for PCI: 00:02.0
1102 07:55:49.285381 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1103 07:55:49.288469 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1104 07:55:49.291679 Allocating resources...
1105 07:55:49.295175 Reading resources...
1106 07:55:49.298370 Root Device read_resources bus 0 link: 0
1107 07:55:49.301717 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1108 07:55:49.308410 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1109 07:55:49.311587 DOMAIN: 0000 read_resources bus 0 link: 0
1110 07:55:49.319184 PCI: 00:14.0 read_resources bus 0 link: 0
1111 07:55:49.322339 USB0 port 0 read_resources bus 0 link: 0
1112 07:55:49.331070 USB0 port 0 read_resources bus 0 link: 0 done
1113 07:55:49.333938 PCI: 00:14.0 read_resources bus 0 link: 0 done
1114 07:55:49.341266 PCI: 00:15.0 read_resources bus 1 link: 0
1115 07:55:49.344693 PCI: 00:15.0 read_resources bus 1 link: 0 done
1116 07:55:49.351138 PCI: 00:15.1 read_resources bus 2 link: 0
1117 07:55:49.354905 PCI: 00:15.1 read_resources bus 2 link: 0 done
1118 07:55:49.362338 PCI: 00:19.0 read_resources bus 3 link: 0
1119 07:55:49.368723 PCI: 00:19.0 read_resources bus 3 link: 0 done
1120 07:55:49.371939 PCI: 00:1d.0 read_resources bus 1 link: 0
1121 07:55:49.378326 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1122 07:55:49.381567 PCI: 00:1e.2 read_resources bus 4 link: 0
1123 07:55:49.388182 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1124 07:55:49.391405 PCI: 00:1e.3 read_resources bus 5 link: 0
1125 07:55:49.398248 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1126 07:55:49.401528 PCI: 00:1f.0 read_resources bus 0 link: 0
1127 07:55:49.407929 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1128 07:55:49.414593 DOMAIN: 0000 read_resources bus 0 link: 0 done
1129 07:55:49.418130 Root Device read_resources bus 0 link: 0 done
1130 07:55:49.420899 Done reading resources.
1131 07:55:49.427698 Show resources in subtree (Root Device)...After reading.
1132 07:55:49.430711 Root Device child on link 0 CPU_CLUSTER: 0
1133 07:55:49.434286 CPU_CLUSTER: 0 child on link 0 APIC: 00
1134 07:55:49.437057 APIC: 00
1135 07:55:49.437556 APIC: 04
1136 07:55:49.440528 APIC: 01
1137 07:55:49.441031 APIC: 03
1138 07:55:49.441546 APIC: 05
1139 07:55:49.443965 APIC: 02
1140 07:55:49.444464 APIC: 06
1141 07:55:49.444957 APIC: 07
1142 07:55:49.450412 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1143 07:55:49.503539 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1144 07:55:49.504199 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1145 07:55:49.504762 PCI: 00:00.0
1146 07:55:49.505704 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1147 07:55:49.506179 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1148 07:55:49.506716 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1149 07:55:49.552994 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1150 07:55:49.553617 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1151 07:55:49.554547 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1152 07:55:49.554980 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1153 07:55:49.555454 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1154 07:55:49.555920 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1155 07:55:49.603529 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1156 07:55:49.604592 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1157 07:55:49.605037 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1158 07:55:49.605526 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1159 07:55:49.606451 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1160 07:55:49.616958 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1161 07:55:49.619757 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1162 07:55:49.622743 PCI: 00:02.0
1163 07:55:49.632610 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1164 07:55:49.642300 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1165 07:55:49.652636 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1166 07:55:49.653241 PCI: 00:04.0
1167 07:55:49.655822 PCI: 00:08.0
1168 07:55:49.665236 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:55:49.665826 PCI: 00:12.0
1170 07:55:49.675445 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 07:55:49.678114 PCI: 00:14.0 child on link 0 USB0 port 0
1172 07:55:49.682115
1173 07:55:49.691160 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1174 07:55:49.694758 USB0 port 0 child on link 0 USB2 port 0
1175 07:55:49.695343 USB2 port 0
1176 07:55:49.698300 USB2 port 1
1177 07:55:49.698917 USB2 port 2
1178 07:55:49.701082
1179 07:55:49.701573 USB2 port 3
1180 07:55:49.705183 USB2 port 5
1181 07:55:49.705670 USB2 port 6
1182 07:55:49.707950 USB2 port 9
1183 07:55:49.708438 USB3 port 0
1184 07:55:49.711255 USB3 port 1
1185 07:55:49.711742 USB3 port 2
1186 07:55:49.714453 USB3 port 3
1187 07:55:49.714942 USB3 port 4
1188 07:55:49.717715 PCI: 00:14.2
1189 07:55:49.727086 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1190 07:55:49.737432 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 07:55:49.738038 PCI: 00:14.3
1192 07:55:49.746980 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1193 07:55:49.753172 PCI: 00:15.0 child on link 0 I2C: 01:15
1194 07:55:49.763173 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 07:55:49.763661 I2C: 01:15
1196 07:55:49.769973 PCI: 00:15.1 child on link 0 I2C: 02:5d
1197 07:55:49.779583 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 07:55:49.780078 I2C: 02:5d
1199 07:55:49.783002 GENERIC: 0.0
1200 07:55:49.783484 PCI: 00:16.0
1201 07:55:49.792676 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 07:55:49.795742 PCI: 00:17.0
1203 07:55:49.802555 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1204 07:55:49.805590
1205 07:55:49.812245 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1206 07:55:49.822271 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1207 07:55:49.828488 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1208 07:55:49.838642 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1209 07:55:49.848411 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1210 07:55:49.851559 PCI: 00:19.0 child on link 0 I2C: 03:1a
1211 07:55:49.861004 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 07:55:49.861492 I2C: 03:1a
1213 07:55:49.864486 I2C: 03:38
1214 07:55:49.865078 I2C: 03:39
1215 07:55:49.867523 I2C: 03:3a
1216 07:55:49.868109 I2C: 03:3b
1217 07:55:49.874131 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1218 07:55:49.881227 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1219 07:55:49.890762 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1220 07:55:49.900050 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1221 07:55:49.903419 PCI: 01:00.0
1222 07:55:49.913240 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 07:55:49.913819 PCI: 00:1e.0
1224 07:55:49.926578 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 07:55:49.936363 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1226 07:55:49.939443 PCI: 00:1e.2 child on link 0 SPI: 00
1227 07:55:49.949214 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 07:55:49.949793 SPI: 00
1229 07:55:49.955690 PCI: 00:1e.3 child on link 0 SPI: 01
1230 07:55:49.965823 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 07:55:49.966450 SPI: 01
1232 07:55:49.968797 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1233 07:55:49.978907 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1234 07:55:49.988584 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1235 07:55:49.989172 PNP: 0c09.0
1236 07:55:49.998081 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1237 07:55:49.998706 PCI: 00:1f.3
1238 07:55:50.007849 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 07:55:50.020990 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1240 07:55:50.021483 PCI: 00:1f.4
1241 07:55:50.030984 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1242 07:55:50.040688 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1243 07:55:50.041288 PCI: 00:1f.5
1244 07:55:50.050524 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 07:55:50.057194 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1246 07:55:50.063883 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1247 07:55:50.070263 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1248 07:55:50.073876 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1249 07:55:50.076925 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1250 07:55:50.080082 PCI: 00:17.0 18 * [0x60 - 0x67] io
1251 07:55:50.083923 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1252 07:55:50.086722
1253 07:55:50.092898 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1254 07:55:50.099444 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1255 07:55:50.106436 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1256 07:55:50.116203 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1257 07:55:50.122282 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1258 07:55:50.125368 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 07:55:50.132163 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1260 07:55:50.138388 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1261 07:55:50.141850 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1262 07:55:50.148448 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1263 07:55:50.151822 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1264 07:55:50.157880 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1265 07:55:50.161441 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1266 07:55:50.167908 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1267 07:55:50.171163 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1268 07:55:50.177718 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1269 07:55:50.181176 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1270 07:55:50.187161 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1271 07:55:50.190769 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1272 07:55:50.197642 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1273 07:55:50.200391 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1274 07:55:50.206788 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1275 07:55:50.210094 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1276 07:55:50.216832 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1277 07:55:50.219847 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1278 07:55:50.226183 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1279 07:55:50.229817 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1280 07:55:50.236062 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1281 07:55:50.239263 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1282 07:55:50.245909 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1283 07:55:50.253012 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1284 07:55:50.256015 avoid_fixed_resources: DOMAIN: 0000
1285 07:55:50.262703 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1286 07:55:50.269107 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1287 07:55:50.276085 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1288 07:55:50.285271 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1289 07:55:50.292333 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1290 07:55:50.299040 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1291 07:55:50.308446 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1292 07:55:50.315141 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1293 07:55:50.321098 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1294 07:55:50.331269 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1295 07:55:50.337614 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1296 07:55:50.343928 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1297 07:55:50.347674 Setting resources...
1298 07:55:50.354297 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1299 07:55:50.357339 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1300 07:55:50.360797 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1301 07:55:50.363733 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1302 07:55:50.367126 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1303 07:55:50.370454
1304 07:55:50.373629 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1305 07:55:50.380390 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1306 07:55:50.386490 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1307 07:55:50.396832 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1308 07:55:50.399764 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1309 07:55:50.406358 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1310 07:55:50.409680 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1311 07:55:50.416505 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1312 07:55:50.419572 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1313 07:55:50.425927 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1314 07:55:50.429008 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1315 07:55:50.436041 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1316 07:55:50.439133 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1317 07:55:50.445521 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1318 07:55:50.448920 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1319 07:55:50.455297 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1320 07:55:50.458552 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1321 07:55:50.465030 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1322 07:55:50.468174 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1323 07:55:50.475150 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1324 07:55:50.478267 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1325 07:55:50.485094 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1326 07:55:50.487949 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1327 07:55:50.490990 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1328 07:55:50.494392
1329 07:55:50.497912 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1330 07:55:50.500706 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1331 07:55:50.507329 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1332 07:55:50.514344 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1333 07:55:50.523941 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1334 07:55:50.530276 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1335 07:55:50.537183 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1336 07:55:50.543266 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1337 07:55:50.550128 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1338 07:55:50.553642 Root Device assign_resources, bus 0 link: 0
1339 07:55:50.560041 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 07:55:50.566075 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1341 07:55:50.576311 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1342 07:55:50.582516 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1343 07:55:50.592258 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1344 07:55:50.599094 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1345 07:55:50.608588 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1346 07:55:50.611863 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 07:55:50.618184 PCI: 00:14.0 assign_resources, bus 0 link: 0
1348 07:55:50.624858 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1349 07:55:50.634357 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1350 07:55:50.641468 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1351 07:55:50.650959 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1352 07:55:50.654680 PCI: 00:15.0 assign_resources, bus 1 link: 0
1353 07:55:50.657577 PCI: 00:15.0 assign_resources, bus 1 link: 0
1354 07:55:50.667653 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1355 07:55:50.671522 PCI: 00:15.1 assign_resources, bus 2 link: 0
1356 07:55:50.677929 PCI: 00:15.1 assign_resources, bus 2 link: 0
1357 07:55:50.683917 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1358 07:55:50.694143 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1359 07:55:50.700032 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1360 07:55:50.710195 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1361 07:55:50.716329 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1362 07:55:50.723146 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1363 07:55:50.732668 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1364 07:55:50.739706 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1365 07:55:50.746059 PCI: 00:19.0 assign_resources, bus 3 link: 0
1366 07:55:50.749097 PCI: 00:19.0 assign_resources, bus 3 link: 0
1367 07:55:50.759009 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1368 07:55:50.765753 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 07:55:50.775712 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1370 07:55:50.778531 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 07:55:50.788506 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1372 07:55:50.791758 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1373 07:55:50.801751 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1374 07:55:50.807997 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1375 07:55:50.815057 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1376 07:55:50.818050 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1377 07:55:50.827812 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1378 07:55:50.830674 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1379 07:55:50.837290 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1380 07:55:50.840770 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1381 07:55:50.847594 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 07:55:50.850779 LPC: Trying to open IO window from 800 size 1ff
1383 07:55:50.859889 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1384 07:55:50.866542 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1385 07:55:50.876721 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1386 07:55:50.882906 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1387 07:55:50.889833 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 07:55:50.892753 Root Device assign_resources, bus 0 link: 0
1389 07:55:50.895984 Done setting resources.
1390 07:55:50.902672 Show resources in subtree (Root Device)...After assigning values.
1391 07:55:50.905720 Root Device child on link 0 CPU_CLUSTER: 0
1392 07:55:50.909274 CPU_CLUSTER: 0 child on link 0 APIC: 00
1393 07:55:50.912170 APIC: 00
1394 07:55:50.912650 APIC: 04
1395 07:55:50.915558 APIC: 01
1396 07:55:50.916050 APIC: 03
1397 07:55:50.916455 APIC: 05
1398 07:55:50.919254 APIC: 02
1399 07:55:50.919831 APIC: 06
1400 07:55:50.922425 APIC: 07
1401 07:55:50.925606 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1402 07:55:50.934956 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1403 07:55:50.944713 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1404 07:55:50.947985 PCI: 00:00.0
1405 07:55:50.957868 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1406 07:55:50.964523 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1407 07:55:50.968239
1408 07:55:50.974377 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1409 07:55:50.984515 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1410 07:55:50.994357 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1411 07:55:51.003809 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1412 07:55:51.013484 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1413 07:55:51.023769 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1414 07:55:51.029678 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1415 07:55:51.032991
1416 07:55:51.039410 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1417 07:55:51.049606 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1418 07:55:51.059189 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1419 07:55:51.069619 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1420 07:55:51.079132 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1421 07:55:51.088898 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1422 07:55:51.098456 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1423 07:55:51.099051 PCI: 00:02.0
1424 07:55:51.108223 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1425 07:55:51.121160 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1426 07:55:51.127793 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1427 07:55:51.130904 PCI: 00:04.0
1428 07:55:51.131391 PCI: 00:08.0
1429 07:55:51.144133 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1430 07:55:51.144740 PCI: 00:12.0
1431 07:55:51.154151 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1432 07:55:51.160700 PCI: 00:14.0 child on link 0 USB0 port 0
1433 07:55:51.169924 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1434 07:55:51.173571 USB0 port 0 child on link 0 USB2 port 0
1435 07:55:51.176528 USB2 port 0
1436 07:55:51.177045 USB2 port 1
1437 07:55:51.180078 USB2 port 2
1438 07:55:51.180567 USB2 port 3
1439 07:55:51.183523 USB2 port 5
1440 07:55:51.184009 USB2 port 6
1441 07:55:51.186808 USB2 port 9
1442 07:55:51.187378 USB3 port 0
1443 07:55:51.189937 USB3 port 1
1444 07:55:51.190457 USB3 port 2
1445 07:55:51.193022
1446 07:55:51.193508 USB3 port 3
1447 07:55:51.197050 USB3 port 4
1448 07:55:51.197646 PCI: 00:14.2
1449 07:55:51.205924 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1450 07:55:51.216275 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1451 07:55:51.219063 PCI: 00:14.3
1452 07:55:51.229096 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1453 07:55:51.232241 PCI: 00:15.0 child on link 0 I2C: 01:15
1454 07:55:51.242597 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1455 07:55:51.245276 I2C: 01:15
1456 07:55:51.249222 PCI: 00:15.1 child on link 0 I2C: 02:5d
1457 07:55:51.258839 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1458 07:55:51.261861 I2C: 02:5d
1459 07:55:51.262379 GENERIC: 0.0
1460 07:55:51.264965 PCI: 00:16.0
1461 07:55:51.275178 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1462 07:55:51.277944 PCI: 00:17.0
1463 07:55:51.287922 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1464 07:55:51.297697 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1465 07:55:51.307383 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1466 07:55:51.314158 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1467 07:55:51.323725 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1468 07:55:51.333549 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1469 07:55:51.339913 PCI: 00:19.0 child on link 0 I2C: 03:1a
1470 07:55:51.349610 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1471 07:55:51.350100 I2C: 03:1a
1472 07:55:51.353145 I2C: 03:38
1473 07:55:51.353628 I2C: 03:39
1474 07:55:51.356106 I2C: 03:3a
1475 07:55:51.356590 I2C: 03:3b
1476 07:55:51.362804 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1477 07:55:51.369643 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1478 07:55:51.379269 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1479 07:55:51.382709
1480 07:55:51.391937 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1481 07:55:51.392469 PCI: 01:00.0
1482 07:55:51.402285 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1483 07:55:51.405670 PCI: 00:1e.0
1484 07:55:51.414853 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1485 07:55:51.425448 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1486 07:55:51.428234
1487 07:55:51.431077 PCI: 00:1e.2 child on link 0 SPI: 00
1488 07:55:51.441241 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1489 07:55:51.441769 SPI: 00
1490 07:55:51.444329 PCI: 00:1e.3 child on link 0 SPI: 01
1491 07:55:51.447551
1492 07:55:51.457872 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1493 07:55:51.458509 SPI: 01
1494 07:55:51.460921 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1495 07:55:51.470564 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1496 07:55:51.480246 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1497 07:55:51.480826 PNP: 0c09.0
1498 07:55:51.490122 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 07:55:51.490734 PCI: 00:1f.3
1500 07:55:51.503262 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1501 07:55:51.513063 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1502 07:55:51.513649 PCI: 00:1f.4
1503 07:55:51.523126 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1504 07:55:51.532710 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1505 07:55:51.536858 PCI: 00:1f.5
1506 07:55:51.545658 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1507 07:55:51.549185 Done allocating resources.
1508 07:55:51.552588 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1509 07:55:51.555473 Enabling resources...
1510 07:55:51.559195 PCI: 00:00.0 subsystem <- 8086/9b61
1511 07:55:51.562141
1512 07:55:51.562655 PCI: 00:00.0 cmd <- 06
1513 07:55:51.565977 PCI: 00:02.0 subsystem <- 8086/9b41
1514 07:55:51.569069 PCI: 00:02.0 cmd <- 03
1515 07:55:51.571840 PCI: 00:08.0 cmd <- 06
1516 07:55:51.575458 PCI: 00:12.0 subsystem <- 8086/02f9
1517 07:55:51.578703 PCI: 00:12.0 cmd <- 02
1518 07:55:51.582179 PCI: 00:14.0 subsystem <- 8086/02ed
1519 07:55:51.584941 PCI: 00:14.0 cmd <- 02
1520 07:55:51.588547 PCI: 00:14.2 cmd <- 02
1521 07:55:51.592444 PCI: 00:14.3 subsystem <- 8086/02f0
1522 07:55:51.594905 PCI: 00:14.3 cmd <- 02
1523 07:55:51.598148 PCI: 00:15.0 subsystem <- 8086/02e8
1524 07:55:51.598685 PCI: 00:15.0 cmd <- 02
1525 07:55:51.604739 PCI: 00:15.1 subsystem <- 8086/02e9
1526 07:55:51.605316 PCI: 00:15.1 cmd <- 02
1527 07:55:51.608578 PCI: 00:16.0 subsystem <- 8086/02e0
1528 07:55:51.611773
1529 07:55:51.612366 PCI: 00:16.0 cmd <- 02
1530 07:55:51.614482 PCI: 00:17.0 subsystem <- 8086/02d3
1531 07:55:51.617955 PCI: 00:17.0 cmd <- 03
1532 07:55:51.621661 PCI: 00:19.0 subsystem <- 8086/02c5
1533 07:55:51.624722 PCI: 00:19.0 cmd <- 02
1534 07:55:51.627956 PCI: 00:1d.0 bridge ctrl <- 0013
1535 07:55:51.630778 PCI: 00:1d.0 subsystem <- 8086/02b0
1536 07:55:51.634382 PCI: 00:1d.0 cmd <- 06
1537 07:55:51.637262 PCI: 00:1e.0 subsystem <- 8086/02a8
1538 07:55:51.640922 PCI: 00:1e.0 cmd <- 06
1539 07:55:51.643803 PCI: 00:1e.2 subsystem <- 8086/02aa
1540 07:55:51.647089 PCI: 00:1e.2 cmd <- 06
1541 07:55:51.650618 PCI: 00:1e.3 subsystem <- 8086/02ab
1542 07:55:51.653902 PCI: 00:1e.3 cmd <- 02
1543 07:55:51.657191 PCI: 00:1f.0 subsystem <- 8086/0284
1544 07:55:51.660576 PCI: 00:1f.0 cmd <- 407
1545 07:55:51.663612 PCI: 00:1f.3 subsystem <- 8086/02c8
1546 07:55:51.666815 PCI: 00:1f.3 cmd <- 02
1547 07:55:51.670424 PCI: 00:1f.4 subsystem <- 8086/02a3
1548 07:55:51.673519 PCI: 00:1f.4 cmd <- 03
1549 07:55:51.676576 PCI: 00:1f.5 subsystem <- 8086/02a4
1550 07:55:51.680287 PCI: 00:1f.5 cmd <- 406
1551 07:55:51.687099 PCI: 01:00.0 cmd <- 02
1552 07:55:51.692173 done.
1553 07:55:51.704560 ME: Version: 14.0.39.1367
1554 07:55:51.710870 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1555 07:55:51.714138 Initializing devices...
1556 07:55:51.714651 Root Device init ...
1557 07:55:51.720940 Chrome EC: Set SMI mask to 0x0000000000000000
1558 07:55:51.724492 Chrome EC: clear events_b mask to 0x0000000000000000
1559 07:55:51.727591
1560 07:55:51.730633 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1561 07:55:51.737578 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1562 07:55:51.743955 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1563 07:55:51.746837 Chrome EC: Set WAKE mask to 0x0000000000000000
1564 07:55:51.753417 Root Device init finished in 35181 usecs
1565 07:55:51.756686 CPU_CLUSTER: 0 init ...
1566 07:55:51.759683 CPU_CLUSTER: 0 init finished in 2448 usecs
1567 07:55:51.765339 PCI: 00:00.0 init ...
1568 07:55:51.768485 CPU TDP: 15 Watts
1569 07:55:51.771776 CPU PL2 = 64 Watts
1570 07:55:51.775640 PCI: 00:00.0 init finished in 7074 usecs
1571 07:55:51.778324 PCI: 00:02.0 init ...
1572 07:55:51.781819 PCI: 00:02.0 init finished in 2254 usecs
1573 07:55:51.785139 PCI: 00:08.0 init ...
1574 07:55:51.788051 PCI: 00:08.0 init finished in 2254 usecs
1575 07:55:51.791223 PCI: 00:12.0 init ...
1576 07:55:51.794973 PCI: 00:12.0 init finished in 2254 usecs
1577 07:55:51.797778 PCI: 00:14.0 init ...
1578 07:55:51.801362 PCI: 00:14.0 init finished in 2253 usecs
1579 07:55:51.804595 PCI: 00:14.2 init ...
1580 07:55:51.807932 PCI: 00:14.2 init finished in 2253 usecs
1581 07:55:51.811056 PCI: 00:14.3 init ...
1582 07:55:51.814664 PCI: 00:14.3 init finished in 2269 usecs
1583 07:55:51.817901 PCI: 00:15.0 init ...
1584 07:55:51.821271 DW I2C bus 0 at 0xd121f000 (400 KHz)
1585 07:55:51.827760 PCI: 00:15.0 init finished in 5985 usecs
1586 07:55:51.828349 PCI: 00:15.1 init ...
1587 07:55:51.833993 DW I2C bus 1 at 0xd1220000 (400 KHz)
1588 07:55:51.837592 PCI: 00:15.1 init finished in 5978 usecs
1589 07:55:51.840890 PCI: 00:16.0 init ...
1590 07:55:51.844353 PCI: 00:16.0 init finished in 2253 usecs
1591 07:55:51.847070 PCI: 00:19.0 init ...
1592 07:55:51.850301 DW I2C bus 4 at 0xd1222000 (400 KHz)
1593 07:55:51.853240 PCI: 00:19.0 init finished in 5978 usecs
1594 07:55:51.856739 PCI: 00:1d.0 init ...
1595 07:55:51.859802 Initializing PCH PCIe bridge.
1596 07:55:51.862818 PCI: 00:1d.0 init finished in 5288 usecs
1597 07:55:51.867701 PCI: 00:1f.0 init ...
1598 07:55:51.870756 IOAPIC: Initializing IOAPIC at 0xfec00000
1599 07:55:51.876659 IOAPIC: Bootstrap Processor Local APIC = 0x00
1600 07:55:51.877247 IOAPIC: ID = 0x02
1601 07:55:51.880703 IOAPIC: Dumping registers
1602 07:55:51.883557 reg 0x0000: 0x02000000
1603 07:55:51.886801 reg 0x0001: 0x00770020
1604 07:55:51.889920 reg 0x0002: 0x00000000
1605 07:55:51.893010 PCI: 00:1f.0 init finished in 23553 usecs
1606 07:55:51.896762 PCI: 00:1f.4 init ...
1607 07:55:51.899581 PCI: 00:1f.4 init finished in 2262 usecs
1608 07:55:51.912031 PCI: 01:00.0 init ...
1609 07:55:51.914992 PCI: 01:00.0 init finished in 2253 usecs
1610 07:55:51.919355 PNP: 0c09.0 init ...
1611 07:55:51.922540 Google Chrome EC uptime: 11.063 seconds
1612 07:55:51.928644 Google Chrome AP resets since EC boot: 0
1613 07:55:51.932792 Google Chrome most recent AP reset causes:
1614 07:55:51.938506 Google Chrome EC reset flags at last EC boot: reset-pin
1615 07:55:51.941528 PNP: 0c09.0 init finished in 20582 usecs
1616 07:55:51.945022 Devices initialized
1617 07:55:51.948185 Show all devs... After init.
1618 07:55:51.948676 Root Device: enabled 1
1619 07:55:51.951531 CPU_CLUSTER: 0: enabled 1
1620 07:55:51.954751 DOMAIN: 0000: enabled 1
1621 07:55:51.958460 APIC: 00: enabled 1
1622 07:55:51.958963 PCI: 00:00.0: enabled 1
1623 07:55:51.961353 PCI: 00:02.0: enabled 1
1624 07:55:51.964620 PCI: 00:04.0: enabled 0
1625 07:55:51.965112 PCI: 00:05.0: enabled 0
1626 07:55:51.967806
1627 07:55:51.968295 PCI: 00:12.0: enabled 1
1628 07:55:51.971218 PCI: 00:12.5: enabled 0
1629 07:55:51.974761 PCI: 00:12.6: enabled 0
1630 07:55:51.975358 PCI: 00:14.0: enabled 1
1631 07:55:51.977635
1632 07:55:51.978193 PCI: 00:14.1: enabled 0
1633 07:55:51.980638 PCI: 00:14.3: enabled 1
1634 07:55:51.984146 PCI: 00:14.5: enabled 0
1635 07:55:51.984645 PCI: 00:15.0: enabled 1
1636 07:55:51.987284
1637 07:55:51.987777 PCI: 00:15.1: enabled 1
1638 07:55:51.990919 PCI: 00:15.2: enabled 0
1639 07:55:51.993778 PCI: 00:15.3: enabled 0
1640 07:55:51.994310 PCI: 00:16.0: enabled 1
1641 07:55:51.997258 PCI: 00:16.1: enabled 0
1642 07:55:52.000667 PCI: 00:16.2: enabled 0
1643 07:55:52.003974 PCI: 00:16.3: enabled 0
1644 07:55:52.004462 PCI: 00:16.4: enabled 0
1645 07:55:52.007122 PCI: 00:16.5: enabled 0
1646 07:55:52.010020 PCI: 00:17.0: enabled 1
1647 07:55:52.013834 PCI: 00:19.0: enabled 1
1648 07:55:52.014467 PCI: 00:19.1: enabled 0
1649 07:55:52.017120 PCI: 00:19.2: enabled 0
1650 07:55:52.020021 PCI: 00:1a.0: enabled 0
1651 07:55:52.023317 PCI: 00:1c.0: enabled 0
1652 07:55:52.023807 PCI: 00:1c.1: enabled 0
1653 07:55:52.026619 PCI: 00:1c.2: enabled 0
1654 07:55:52.030428 PCI: 00:1c.3: enabled 0
1655 07:55:52.033221 PCI: 00:1c.4: enabled 0
1656 07:55:52.033708 PCI: 00:1c.5: enabled 0
1657 07:55:52.036235 PCI: 00:1c.6: enabled 0
1658 07:55:52.039568 PCI: 00:1c.7: enabled 0
1659 07:55:52.043038 PCI: 00:1d.0: enabled 1
1660 07:55:52.043626 PCI: 00:1d.1: enabled 0
1661 07:55:52.046022 PCI: 00:1d.2: enabled 0
1662 07:55:52.049406 PCI: 00:1d.3: enabled 0
1663 07:55:52.052992 PCI: 00:1d.4: enabled 0
1664 07:55:52.053583 PCI: 00:1d.5: enabled 0
1665 07:55:52.056139 PCI: 00:1e.0: enabled 1
1666 07:55:52.059080 PCI: 00:1e.1: enabled 0
1667 07:55:52.062994 PCI: 00:1e.2: enabled 1
1668 07:55:52.063592 PCI: 00:1e.3: enabled 1
1669 07:55:52.066024 PCI: 00:1f.0: enabled 1
1670 07:55:52.069035 PCI: 00:1f.1: enabled 0
1671 07:55:52.072326 PCI: 00:1f.2: enabled 0
1672 07:55:52.072817 PCI: 00:1f.3: enabled 1
1673 07:55:52.075304 PCI: 00:1f.4: enabled 1
1674 07:55:52.079177 PCI: 00:1f.5: enabled 1
1675 07:55:52.082327 PCI: 00:1f.6: enabled 0
1676 07:55:52.082930 USB0 port 0: enabled 1
1677 07:55:52.085341 I2C: 01:15: enabled 1
1678 07:55:52.088425 I2C: 02:5d: enabled 1
1679 07:55:52.088909 GENERIC: 0.0: enabled 1
1680 07:55:52.091574 I2C: 03:1a: enabled 1
1681 07:55:52.094789 I2C: 03:38: enabled 1
1682 07:55:52.095273 I2C: 03:39: enabled 1
1683 07:55:52.098296
1684 07:55:52.098941 I2C: 03:3a: enabled 1
1685 07:55:52.101500 I2C: 03:3b: enabled 1
1686 07:55:52.105044 PCI: 00:00.0: enabled 1
1687 07:55:52.105644 SPI: 00: enabled 1
1688 07:55:52.108530 SPI: 01: enabled 1
1689 07:55:52.111221 PNP: 0c09.0: enabled 1
1690 07:55:52.111705 USB2 port 0: enabled 1
1691 07:55:52.114816 USB2 port 1: enabled 1
1692 07:55:52.118045 USB2 port 2: enabled 0
1693 07:55:52.118679 USB2 port 3: enabled 0
1694 07:55:52.121142 USB2 port 5: enabled 0
1695 07:55:52.124117 USB2 port 6: enabled 1
1696 07:55:52.127472 USB2 port 9: enabled 1
1697 07:55:52.128060 USB3 port 0: enabled 1
1698 07:55:52.131150 USB3 port 1: enabled 1
1699 07:55:52.133972 USB3 port 2: enabled 1
1700 07:55:52.134525 USB3 port 3: enabled 1
1701 07:55:52.137173 USB3 port 4: enabled 0
1702 07:55:52.140401 APIC: 04: enabled 1
1703 07:55:52.140930 APIC: 01: enabled 1
1704 07:55:52.143448 APIC: 03: enabled 1
1705 07:55:52.147233 APIC: 05: enabled 1
1706 07:55:52.147715 APIC: 02: enabled 1
1707 07:55:52.150563 APIC: 06: enabled 1
1708 07:55:52.153418 APIC: 07: enabled 1
1709 07:55:52.153998 PCI: 00:08.0: enabled 1
1710 07:55:52.157317 PCI: 00:14.2: enabled 1
1711 07:55:52.160423 PCI: 01:00.0: enabled 1
1712 07:55:52.163558 Disabling ACPI via APMC:
1713 07:55:52.166563 done.
1714 07:55:52.169887 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1715 07:55:52.173441 ELOG: NV offset 0xaf0000 size 0x4000
1716 07:55:52.180459 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1717 07:55:52.187551 ELOG: Event(17) added with size 13 at 2022-11-25 07:55:50 UTC
1718 07:55:52.194127 POST: Unexpected post code in previous boot: 0x25
1719 07:55:52.200083 ELOG: Event(A3) added with size 11 at 2022-11-25 07:55:50 UTC
1720 07:55:52.207191 ELOG: Event(A6) added with size 13 at 2022-11-25 07:55:50 UTC
1721 07:55:52.213584 ELOG: Event(92) added with size 9 at 2022-11-25 07:55:50 UTC
1722 07:55:52.220357 ELOG: Event(93) added with size 9 at 2022-11-25 07:55:50 UTC
1723 07:55:52.226581 ELOG: Event(9A) added with size 9 at 2022-11-25 07:55:50 UTC
1724 07:55:52.229825 ELOG: Event(9E) added with size 10 at 2022-11-25 07:55:50 UTC
1725 07:55:52.232678
1726 07:55:52.235876 ELOG: Event(9F) added with size 14 at 2022-11-25 07:55:50 UTC
1727 07:55:52.242503 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1728 07:55:52.249260 ELOG: Event(A1) added with size 10 at 2022-11-25 07:55:50 UTC
1729 07:55:52.259070 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1730 07:55:52.262304 ELOG: Event(A0) added with size 9 at 2022-11-25 07:55:50 UTC
1731 07:55:52.268619 elog_add_boot_reason: Logged dev mode boot
1732 07:55:52.269206 Finalize devices...
1733 07:55:52.272180 PCI: 00:17.0 final
1734 07:55:52.274832 Devices finalized
1735 07:55:52.278322 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1736 07:55:52.285551 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1737 07:55:52.288747 ME: HFSTS1 : 0x90000245
1738 07:55:52.291498 ME: HFSTS2 : 0x3B850126
1739 07:55:52.298051 ME: HFSTS3 : 0x00000020
1740 07:55:52.301617 ME: HFSTS4 : 0x00004800
1741 07:55:52.304439 ME: HFSTS5 : 0x00000000
1742 07:55:52.307790 ME: HFSTS6 : 0x40400006
1743 07:55:52.311472 ME: Manufacturing Mode : NO
1744 07:55:52.314489 ME: FW Partition Table : OK
1745 07:55:52.317930 ME: Bringup Loader Failure : NO
1746 07:55:52.321023 ME: Firmware Init Complete : YES
1747 07:55:52.324696 ME: Boot Options Present : NO
1748 07:55:52.327687 ME: Update In Progress : NO
1749 07:55:52.331176 ME: D0i3 Support : YES
1750 07:55:52.333765
1751 07:55:52.337121 ME: Low Power State Enabled : NO
1752 07:55:52.340681 ME: CPU Replaced : NO
1753 07:55:52.343806 ME: CPU Replacement Valid : YES
1754 07:55:52.346979 ME: Current Working State : 5
1755 07:55:52.350124 ME: Current Operation State : 1
1756 07:55:52.353336 ME: Current Operation Mode : 0
1757 07:55:52.357108 ME: Error Code : 0
1758 07:55:52.360123 ME: CPU Debug Disabled : YES
1759 07:55:52.363003 ME: TXT Support : NO
1760 07:55:52.366463 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1761 07:55:52.373384 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1762 07:55:52.376426 CBFS @ c08000 size 3f8000
1763 07:55:52.379653 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1764 07:55:52.386154 CBFS: Locating 'fallback/dsdt.aml'
1765 07:55:52.389196 CBFS: Found @ offset 10bb80 size 3fa5
1766 07:55:52.392947 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1767 07:55:52.395583 CBFS @ c08000 size 3f8000
1768 07:55:52.402598 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1769 07:55:52.405513 CBFS: Locating 'fallback/slic'
1770 07:55:52.409468 CBFS: 'fallback/slic' not found.
1771 07:55:52.412292
1772 07:55:52.415929 ACPI: Writing ACPI tables at 99b3e000.
1773 07:55:52.416465 ACPI: * FACS
1774 07:55:52.418945 ACPI: * DSDT
1775 07:55:52.422799 Ramoops buffer: 0x100000@0x99a3d000.
1776 07:55:52.426074 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1777 07:55:52.432118 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1778 07:55:52.435539 Google Chrome EC: version:
1779 07:55:52.438699 ro: helios_v2.0.2659-56403530b
1780 07:55:52.441671 rw: helios_v2.0.2849-c41de27e7d
1781 07:55:52.442160 running image: 1
1782 07:55:52.446828 ACPI: * FADT
1783 07:55:52.447427 SCI is IRQ9
1784 07:55:52.453423 ACPI: added table 1/32, length now 40
1785 07:55:52.454020 ACPI: * SSDT
1786 07:55:52.456343 Found 1 CPU(s) with 8 core(s) each.
1787 07:55:52.459807 Error: Could not locate 'wifi_sar' in VPD.
1788 07:55:52.462662
1789 07:55:52.466477 Checking CBFS for default SAR values
1790 07:55:52.469610 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1791 07:55:52.472683 CBFS @ c08000 size 3f8000
1792 07:55:52.479688 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1793 07:55:52.482323 CBFS: Locating 'wifi_sar_defaults.hex'
1794 07:55:52.485915 CBFS: Found @ offset 5fac0 size 77
1795 07:55:52.489443 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1796 07:55:52.495876 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1797 07:55:52.498575 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1798 07:55:52.505430 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1799 07:55:52.508420 failed to find key in VPD: dsm_calib_r0_0
1800 07:55:52.518667 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1801 07:55:52.524895 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1802 07:55:52.528580 failed to find key in VPD: dsm_calib_r0_1
1803 07:55:52.534641 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1804 07:55:52.537879
1805 07:55:52.541250 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1806 07:55:52.544631 failed to find key in VPD: dsm_calib_r0_2
1807 07:55:52.554594 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1808 07:55:52.561006 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1809 07:55:52.563860 failed to find key in VPD: dsm_calib_r0_3
1810 07:55:52.573801 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1811 07:55:52.577110 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1812 07:55:52.583906 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1813 07:55:52.587195 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1814 07:55:52.590436 EC returned error result code 1
1815 07:55:52.593872 EC returned error result code 1
1816 07:55:52.596758 EC returned error result code 1
1817 07:55:52.603729 PS2K: Bad resp from EC. Vivaldi disabled!
1818 07:55:52.607160 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1819 07:55:52.610337
1820 07:55:52.613452 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1821 07:55:52.619561 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1822 07:55:52.622918 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1823 07:55:52.629525 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1824 07:55:52.635894 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1825 07:55:52.642344 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1826 07:55:52.649198 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1827 07:55:52.652408 ACPI: added table 2/32, length now 44
1828 07:55:52.652901 ACPI: * MCFG
1829 07:55:52.655786 ACPI: added table 3/32, length now 48
1830 07:55:52.658820 ACPI: * TPM2
1831 07:55:52.662762 TPM2 log created at 99a2d000
1832 07:55:52.665187 ACPI: added table 4/32, length now 52
1833 07:55:52.668960 ACPI: * MADT
1834 07:55:52.669452 SCI is IRQ9
1835 07:55:52.671998 ACPI: added table 5/32, length now 56
1836 07:55:52.675219 current = 99b43ac0
1837 07:55:52.675710 ACPI: * DMAR
1838 07:55:52.678555 ACPI: added table 6/32, length now 60
1839 07:55:52.682137 ACPI: * IGD OpRegion
1840 07:55:52.684812 GMA: Found VBT in CBFS
1841 07:55:52.688603 GMA: Found valid VBT in CBFS
1842 07:55:52.691369 ACPI: added table 7/32, length now 64
1843 07:55:52.691922 ACPI: * HPET
1844 07:55:52.698416 ACPI: added table 8/32, length now 68
1845 07:55:52.699037 ACPI: done.
1846 07:55:52.702113 ACPI tables: 31744 bytes.
1847 07:55:52.704504 smbios_write_tables: 99a2c000
1848 07:55:52.707945 EC returned error result code 3
1849 07:55:52.711435 Couldn't obtain OEM name from CBI
1850 07:55:52.714844 Create SMBIOS type 17
1851 07:55:52.717864 PCI: 00:00.0 (Intel Cannonlake)
1852 07:55:52.718393 PCI: 00:14.3 (Intel WiFi)
1853 07:55:52.720934 SMBIOS tables: 939 bytes.
1854 07:55:52.727353 Writing table forward entry at 0x00000500
1855 07:55:52.731088 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1856 07:55:52.737160 Writing coreboot table at 0x99b62000
1857 07:55:52.740351 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1858 07:55:52.747267 1. 0000000000001000-000000000009ffff: RAM
1859 07:55:52.750441 2. 00000000000a0000-00000000000fffff: RESERVED
1860 07:55:52.754006 3. 0000000000100000-0000000099a2bfff: RAM
1861 07:55:52.760699 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1862 07:55:52.766876 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1863 07:55:52.773399 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1864 07:55:52.776719 7. 000000009a000000-000000009f7fffff: RESERVED
1865 07:55:52.779703 8. 00000000e0000000-00000000efffffff: RESERVED
1866 07:55:52.786426 9. 00000000fc000000-00000000fc000fff: RESERVED
1867 07:55:52.789865 10. 00000000fe000000-00000000fe00ffff: RESERVED
1868 07:55:52.796399 11. 00000000fed10000-00000000fed17fff: RESERVED
1869 07:55:52.799179 12. 00000000fed80000-00000000fed83fff: RESERVED
1870 07:55:52.806170 13. 00000000fed90000-00000000fed91fff: RESERVED
1871 07:55:52.809639 14. 00000000feda0000-00000000feda1fff: RESERVED
1872 07:55:52.812770 15. 0000000100000000-000000045e7fffff: RAM
1873 07:55:52.815530
1874 07:55:52.819518 Graphics framebuffer located at 0xc0000000
1875 07:55:52.822264 Passing 5 GPIOs to payload:
1876 07:55:52.825797 NAME | PORT | POLARITY | VALUE
1877 07:55:52.832206 write protect | undefined | high | low
1878 07:55:52.838919 lid | undefined | high | high
1879 07:55:52.842092 power | undefined | high | low
1880 07:55:52.848407 oprom | undefined | high | low
1881 07:55:52.851519 EC in RW | 0x000000cb | high | low
1882 07:55:52.854908 Board ID: 4
1883 07:55:52.858446 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1884 07:55:52.861441 CBFS @ c08000 size 3f8000
1885 07:55:52.867877 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1886 07:55:52.874993 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1887 07:55:52.878275 coreboot table: 1492 bytes.
1888 07:55:52.881471 IMD ROOT 0. 99fff000 00001000
1889 07:55:52.884756 IMD SMALL 1. 99ffe000 00001000
1890 07:55:52.887730 FSP MEMORY 2. 99c4e000 003b0000
1891 07:55:52.890815 CONSOLE 3. 99c2e000 00020000
1892 07:55:52.894101 FMAP 4. 99c2d000 0000054e
1893 07:55:52.897435 TIME STAMP 5. 99c2c000 00000910
1894 07:55:52.900835 VBOOT WORK 6. 99c18000 00014000
1895 07:55:52.903743 MRC DATA 7. 99c16000 00001958
1896 07:55:52.907281 ROMSTG STCK 8. 99c15000 00001000
1897 07:55:52.911264 AFTER CAR 9. 99c0b000 0000a000
1898 07:55:52.913831 RAMSTAGE 10. 99baf000 0005c000
1899 07:55:52.916733 REFCODE 11. 99b7a000 00035000
1900 07:55:52.920258 SMM BACKUP 12. 99b6a000 00010000
1901 07:55:52.923795 COREBOOT 13. 99b62000 00008000
1902 07:55:52.926714 ACPI 14. 99b3e000 00024000
1903 07:55:52.929880 ACPI GNVS 15. 99b3d000 00001000
1904 07:55:52.932965 RAMOOPS 16. 99a3d000 00100000
1905 07:55:52.936655 TPM2 TCGLOG17. 99a2d000 00010000
1906 07:55:52.939373 SMBIOS 18. 99a2c000 00000800
1907 07:55:52.943112 IMD small region:
1908 07:55:52.946101 IMD ROOT 0. 99ffec00 00000400
1909 07:55:52.949949 FSP RUNTIME 1. 99ffebe0 00000004
1910 07:55:52.952956 EC HOSTEVENT 2. 99ffebc0 00000008
1911 07:55:52.956336 POWER STATE 3. 99ffeb80 00000040
1912 07:55:52.959414 ROMSTAGE 4. 99ffeb60 00000004
1913 07:55:52.962901 MEM INFO 5. 99ffe9a0 000001b9
1914 07:55:52.965992 VPD 6. 99ffe920 0000006c
1915 07:55:52.969086 MTRR: Physical address space:
1916 07:55:52.975913 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1917 07:55:52.981974 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1918 07:55:52.988668 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1919 07:55:52.995002 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1920 07:55:53.001705 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1921 07:55:53.008261 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1922 07:55:53.011322 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1923 07:55:53.014914
1924 07:55:53.017766 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 07:55:53.021115 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 07:55:53.024151 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 07:55:53.031129 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 07:55:53.034029 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 07:55:53.037472 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 07:55:53.040458 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 07:55:53.047413 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 07:55:53.050484 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 07:55:53.053812 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 07:55:53.057591 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 07:55:53.061077 call enable_fixed_mtrr()
1936 07:55:53.063887 CPU physical address size: 39 bits
1937 07:55:53.070744 MTRR: default type WB/UC MTRR counts: 6/8.
1938 07:55:53.073501 MTRR: WB selected as default type.
1939 07:55:53.080303 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1940 07:55:53.083660 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1941 07:55:53.086561
1942 07:55:53.090522 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1943 07:55:53.096420 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1944 07:55:53.102946 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1945 07:55:53.109863 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1946 07:55:53.116198 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 07:55:53.119436 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 07:55:53.122424 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 07:55:53.125887 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 07:55:53.132341 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 07:55:53.136035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 07:55:53.138926 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 07:55:53.142082 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 07:55:53.148986 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 07:55:53.152428 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 07:55:53.155369 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 07:55:53.155961
1958 07:55:53.158939 MTRR check
1959 07:55:53.159428 call enable_fixed_mtrr()
1960 07:55:53.162130 Fixed MTRRs : Enabled
1961 07:55:53.165011 Variable MTRRs: Enabled
1962 07:55:53.165505
1963 07:55:53.168460 CPU physical address size: 39 bits
1964 07:55:53.174979 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1965 07:55:53.178400 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 07:55:53.181464 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 07:55:53.188166 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 07:55:53.191436 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 07:55:53.194704 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 07:55:53.197765 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 07:55:53.203974 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 07:55:53.207720 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 07:55:53.210903 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 07:55:53.213940 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 07:55:53.220300 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 07:55:53.224155 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 07:55:53.227436 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 07:55:53.230309 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 07:55:53.234002
1980 07:55:53.236806 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 07:55:53.240417 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 07:55:53.243578 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 07:55:53.249683 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 07:55:53.253701 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 07:55:53.256783 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 07:55:53.259971 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 07:55:53.262872 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 07:55:53.266405
1989 07:55:53.266915 call enable_fixed_mtrr()
1990 07:55:53.269737 call enable_fixed_mtrr()
1991 07:55:53.276004 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1992 07:55:53.279894 CPU physical address size: 39 bits
1993 07:55:53.282871 CPU physical address size: 39 bits
1994 07:55:53.286326 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 07:55:53.289069 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 07:55:53.295535 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 07:55:53.299351 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 07:55:53.302641 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 07:55:53.305658 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 07:55:53.312358 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 07:55:53.315137 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 07:55:53.318631 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 07:55:53.321877 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 07:55:53.325194
2005 07:55:53.328090 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 07:55:53.331559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 07:55:53.334912 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 07:55:53.338357 call enable_fixed_mtrr()
2009 07:55:53.341335 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 07:55:53.347831 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 07:55:53.350805 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 07:55:53.354285 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 07:55:53.358065 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 07:55:53.364194 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 07:55:53.367385 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 07:55:53.370534 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 07:55:53.374040 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 07:55:53.380477 CPU physical address size: 39 bits
2019 07:55:53.381095 call enable_fixed_mtrr()
2020 07:55:53.383695 CBFS @ c08000 size 3f8000
2021 07:55:53.390572 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2022 07:55:53.393591 CBFS: Locating 'fallback/payload'
2023 07:55:53.396709 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 07:55:53.403125 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 07:55:53.406718 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 07:55:53.410203 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 07:55:53.413185 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 07:55:53.419722 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 07:55:53.422963 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 07:55:53.425765 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 07:55:53.429527 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 07:55:53.435845 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 07:55:53.439339 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 07:55:53.442058 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 07:55:53.445260 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 07:55:53.448655
2037 07:55:53.449142 call enable_fixed_mtrr()
2038 07:55:53.455404 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 07:55:53.458600 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 07:55:53.462275 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 07:55:53.465127 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 07:55:53.472309 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 07:55:53.475106 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 07:55:53.478148 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 07:55:53.481735 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 07:55:53.488280 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 07:55:53.491549 CPU physical address size: 39 bits
2048 07:55:53.494330 call enable_fixed_mtrr()
2049 07:55:53.497636 CBFS: Found @ offset 1c96c0 size 3f798
2050 07:55:53.501025 CPU physical address size: 39 bits
2051 07:55:53.504310 CPU physical address size: 39 bits
2052 07:55:53.507499 Checking segment from ROM address 0xffdd16f8
2053 07:55:53.514466 Checking segment from ROM address 0xffdd1714
2054 07:55:53.517781 Loading segment from ROM address 0xffdd16f8
2055 07:55:53.520906 code (compression=0)
2056 07:55:53.527298 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2057 07:55:53.536768 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2058 07:55:53.540201 it's not compressed!
2059 07:55:53.631281 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2060 07:55:53.637538 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2061 07:55:53.640641 Loading segment from ROM address 0xffdd1714
2062 07:55:53.643955
2063 07:55:53.644444 Entry Point 0x30000000
2064 07:55:53.647145 Loaded segments
2065 07:55:53.653641 Finalizing chipset.
2066 07:55:53.656650 Finalizing SMM.
2067 07:55:53.660099 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2068 07:55:53.663051 mp_park_aps done after 0 msecs.
2069 07:55:53.670280 Jumping to boot code at 30000000(99b62000)
2070 07:55:53.676208 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2071 07:55:53.676777
2072 07:55:53.677163
2073 07:55:53.677517
2074 07:55:53.679594 Starting depthcharge on Helios...
2075 07:55:53.680197
2076 07:55:53.681301 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2077 07:55:53.681899 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2078 07:55:53.682488 Setting prompt string to ['hatch:']
2079 07:55:53.682945 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2080 07:55:53.689280 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2081 07:55:53.689905
2082 07:55:53.695388 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2083 07:55:53.695990
2084 07:55:53.702267 board_setup: Info: eMMC controller not present; skipping
2085 07:55:53.702857
2086 07:55:53.705369 New NVMe Controller 0x30053ac0 @ 00:1d:00
2087 07:55:53.705862
2088 07:55:53.711622 board_setup: Info: SDHCI controller not present; skipping
2089 07:55:53.712138
2090 07:55:53.718441 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2091 07:55:53.719067
2092 07:55:53.719463 Wipe memory regions:
2093 07:55:53.722358
2094 07:55:53.725076 [0x00000000001000, 0x000000000a0000)
2095 07:55:53.725588
2096 07:55:53.728168 [0x00000000100000, 0x00000030000000)
2097 07:55:53.728779
2098 07:55:53.794320 [0x00000030657430, 0x00000099a2c000)
2099 07:55:53.794913
2100 07:55:53.934945 [0x00000100000000, 0x0000045e800000)
2101 07:55:53.935562
2102 07:55:55.316980 R8152: Initializing
2103 07:55:55.317587
2104 07:55:55.320462 Version 9 (ocp_data = 6010)
2105 07:55:55.321055
2106 07:55:55.324611 R8152: Done initializing
2107 07:55:55.325209
2108 07:55:55.327896 Adding net device
2109 07:55:55.328488
2110 07:55:55.932047 R8152: Initializing
2111 07:55:55.932648
2112 07:55:55.935033 Version 6 (ocp_data = 5c30)
2113 07:55:55.935512
2114 07:55:55.938094 R8152: Done initializing
2115 07:55:55.938176
2116 07:55:55.945029 net_add_device: Attemp to include the same device
2117 07:55:55.945204
2118 07:55:55.951721 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2119 07:55:55.951901
2120 07:55:55.951988
2121 07:55:55.952059
2122 07:55:55.952360 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 07:55:56.053338 hatch: tftpboot 192.168.201.1 8119448/tftp-deploy-z3lm33sz/kernel/bzImage 8119448/tftp-deploy-z3lm33sz/kernel/cmdline 8119448/tftp-deploy-z3lm33sz/ramdisk/ramdisk.cpio.gz
2125 07:55:56.054065 Setting prompt string to 'Starting kernel'
2126 07:55:56.054551 Setting prompt string to ['Starting kernel']
2127 07:55:56.054937 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 07:55:56.055331 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2129 07:55:56.058850 tftpboot 192.168.201.1 8119448/tftp-deploy-z3lm33sz/kernel/bzImoy-z3lm33sz/kernel/cmdline 8119448/tftp-deploy-z3lm33sz/ramdisk/ramdisk.cpio.gz
2130 07:55:56.058929
2131 07:55:56.058994 Waiting for link
2132 07:55:56.059053
2133 07:55:56.259935 done.
2134 07:55:56.260532
2135 07:55:56.260942 MAC: 00:24:32:30:7f:7f
2136 07:55:56.261378
2137 07:55:56.263097 Sending DHCP discover... done.
2138 07:55:56.263592
2139 07:55:56.266327 Waiting for reply... done.
2140 07:55:56.266818
2141 07:55:56.269779 Sending DHCP request... done.
2142 07:55:56.270297
2143 07:55:56.277004 Waiting for reply... done.
2144 07:55:56.277496
2145 07:55:56.277880 My ip is 192.168.201.15
2146 07:55:56.278279
2147 07:55:56.280651 The DHCP server ip is 192.168.201.1
2148 07:55:56.283729
2149 07:55:56.286909 TFTP server IP predefined by user: 192.168.201.1
2150 07:55:56.287408
2151 07:55:56.293582 Bootfile predefined by user: 8119448/tftp-deploy-z3lm33sz/kernel/bzImage
2152 07:55:56.294284
2153 07:55:56.296665 Sending tftp read request... done.
2154 07:55:56.297155
2155 07:55:56.303757 Waiting for the transfer...
2156 07:55:56.304251
2157 07:55:56.965437 00000000 ################################################################
2158 07:55:56.966053
2159 07:55:57.620636 00080000 ################################################################
2160 07:55:57.621299
2161 07:55:58.185972 00100000 ################################################################
2162 07:55:58.186146
2163 07:55:58.845383 00180000 ################################################################
2164 07:55:58.845990
2165 07:55:59.511836 00200000 ################################################################
2166 07:55:59.512433
2167 07:56:00.180329 00280000 ################################################################
2168 07:56:00.180925
2169 07:56:00.858536 00300000 ################################################################
2170 07:56:00.859139
2171 07:56:01.539500 00380000 ################################################################
2172 07:56:01.540100
2173 07:56:02.219734 00400000 ################################################################
2174 07:56:02.220327
2175 07:56:02.896643 00480000 ################################################################
2176 07:56:02.897274
2177 07:56:03.571891 00500000 ################################################################
2178 07:56:03.572486
2179 07:56:04.249133 00580000 ################################################################
2180 07:56:04.249746
2181 07:56:04.907424 00600000 ################################################################
2182 07:56:04.907995
2183 07:56:05.314883 00680000 ####################################### done.
2184 07:56:05.315475
2185 07:56:05.318805 The bootfile was 7131024 bytes long.
2186 07:56:05.319301
2187 07:56:05.321809 Sending tftp read request... done.
2188 07:56:05.322344
2189 07:56:05.324900 Waiting for the transfer...
2190 07:56:05.325414
2191 07:56:06.003793 00000000 ################################################################
2192 07:56:06.004407
2193 07:56:06.688710 00080000 ################################################################
2194 07:56:06.689365
2195 07:56:07.369177 00100000 ################################################################
2196 07:56:07.369770
2197 07:56:08.041693 00180000 ################################################################
2198 07:56:08.042372
2199 07:56:08.719280 00200000 ################################################################
2200 07:56:08.719895
2201 07:56:09.393866 00280000 ################################################################
2202 07:56:09.394512
2203 07:56:10.077142 00300000 ################################################################
2204 07:56:10.077792
2205 07:56:10.756620 00380000 ################################################################
2206 07:56:10.757239
2207 07:56:11.445612 00400000 ################################################################
2208 07:56:11.446248
2209 07:56:12.132589 00480000 ################################################################
2210 07:56:12.133186
2211 07:56:12.464933 00500000 ################################ done.
2212 07:56:12.465565
2213 07:56:12.467769 Sending tftp read request... done.
2214 07:56:12.468264
2215 07:56:12.471017 Waiting for the transfer...
2216 07:56:12.471509
2217 07:56:12.471961 00000000 # done.
2218 07:56:12.472348
2219 07:56:12.481646 Command line loaded dynamically from TFTP file: 8119448/tftp-deploy-z3lm33sz/kernel/cmdline
2220 07:56:12.482279
2221 07:56:12.503871 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119448/extract-nfsrootfs-6693c83t,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2222 07:56:12.504492
2223 07:56:12.510438 ec_init(0): CrosEC protocol v3 supported (256, 256)
2224 07:56:12.511020
2225 07:56:12.518439 Shutting down all USB controllers.
2226 07:56:12.519016
2227 07:56:12.519401 Removing current net device
2228 07:56:12.519757
2229 07:56:12.526264 Finalizing coreboot
2230 07:56:12.526875
2231 07:56:12.532514 Exiting depthcharge with code 4 at timestamp: 26212922
2232 07:56:12.533036
2233 07:56:12.533457
2234 07:56:12.533816 Starting kernel ...
2235 07:56:12.534162
2236 07:56:12.534550
2237 07:56:12.534882
2238 07:56:12.536109 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2239 07:56:12.536649 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2240 07:56:12.537071 Setting prompt string to ['Linux version [0-9]']
2241 07:56:12.537492 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2242 07:56:12.537950 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2244 08:00:34.536901 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2246 08:00:34.537149 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2248 08:00:34.537307 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2251 08:00:34.537578 end: 2 depthcharge-action (duration 00:05:00) [common]
2253 08:00:34.537879 Cleaning after the job
2254 08:00:34.537963 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/ramdisk
2255 08:00:34.538495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/kernel
2256 08:00:34.539091 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/nfsrootfs
2257 08:00:34.577955 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119448/tftp-deploy-z3lm33sz/modules
2258 08:00:34.578301 start: 4.1 power-off (timeout 00:00:30) [common]
2259 08:00:34.578477 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2260 08:00:34.597665 >> Command sent successfully.
2261 08:00:34.599600 Returned 0 in 0 seconds
2262 08:00:34.700401 end: 4.1 power-off (duration 00:00:00) [common]
2264 08:00:34.700738 start: 4.2 read-feedback (timeout 00:10:00) [common]
2265 08:00:34.700979 Listened to connection for namespace 'common' for up to 1s
2266 08:00:35.561723 Listened to connection for namespace 'common' for up to 1s
2267 08:00:35.565211 Listened to connection for namespace 'common' for up to 1s
2268 08:00:35.568604 Listened to connection for namespace 'common' for up to 1s
2269 08:00:35.571766 Listened to connection for namespace 'common' for up to 1s
2270 08:00:35.575488 Listened to connection for namespace 'common' for up to 1s
2271 08:00:35.578287 Listened to connection for namespace 'common' for up to 1s
2272 08:00:35.582032 Listened to connection for namespace 'common' for up to 1s
2273 08:00:35.584662 Listened to connection for namespace 'common' for up to 1s
2274 08:00:35.587965 Listened to connection for namespace 'common' for up to 1s
2275 08:00:35.591559 Listened to connection for namespace 'common' for up to 1s
2276 08:00:35.594580 Listened to connection for namespace 'common' for up to 1s
2277 08:00:35.597852 Listened to connection for namespace 'common' for up to 1s
2278 08:00:35.601034 Listened to connection for namespace 'common' for up to 1s
2279 08:00:35.604545 Listened to connection for namespace 'common' for up to 1s
2280 08:00:35.607794 Listened to connection for namespace 'common' for up to 1s
2281 08:00:35.611249 Listened to connection for namespace 'common' for up to 1s
2282 08:00:35.614512 Listened to connection for namespace 'common' for up to 1s
2283 08:00:35.617703 Listened to connection for namespace 'common' for up to 1s
2284 08:00:35.620722 Listened to connection for namespace 'common' for up to 1s
2285 08:00:35.624000 Listened to connection for namespace 'common' for up to 1s
2286 08:00:35.627204 Listened to connection for namespace 'common' for up to 1s
2287 08:00:35.630769 Listened to connection for namespace 'common' for up to 1s
2288 08:00:35.634036 Listened to connection for namespace 'common' for up to 1s
2289 08:00:35.637468 Listened to connection for namespace 'common' for up to 1s
2290 08:00:35.640412 Listened to connection for namespace 'common' for up to 1s
2291 08:00:35.643860 Listened to connection for namespace 'common' for up to 1s
2292 08:00:35.647099 Listened to connection for namespace 'common' for up to 1s
2293 08:00:35.650167 Listened to connection for namespace 'common' for up to 1s
2294 08:00:35.653743 Listened to connection for namespace 'common' for up to 1s
2295 08:00:35.657087 Listened to connection for namespace 'common' for up to 1s
2296 08:00:35.660472 Listened to connection for namespace 'common' for up to 1s
2297 08:00:35.663565 Listened to connection for namespace 'common' for up to 1s
2298 08:00:35.666684 Listened to connection for namespace 'common' for up to 1s
2299 08:00:35.670343 Listened to connection for namespace 'common' for up to 1s
2300 08:00:35.673248 Listened to connection for namespace 'common' for up to 1s
2301 08:00:35.676953 Listened to connection for namespace 'common' for up to 1s
2302 08:00:35.680031 Listened to connection for namespace 'common' for up to 1s
2303 08:00:35.683513 Listened to connection for namespace 'common' for up to 1s
2304 08:00:35.686291 Listened to connection for namespace 'common' for up to 1s
2305 08:00:35.689639 Listened to connection for namespace 'common' for up to 1s
2306 08:00:35.693301 Listened to connection for namespace 'common' for up to 1s
2307 08:00:35.696400 Listened to connection for namespace 'common' for up to 1s
2308 08:00:35.699509 Listened to connection for namespace 'common' for up to 1s
2309 08:00:35.700969 Finalising connection for namespace 'common'
2310 08:00:35.701080 Disconnecting from shell: Finalise
2311 08:00:35.701158
2312 08:00:35.801911 end: 4.2 read-feedback (duration 00:00:01) [common]
2313 08:00:35.802078 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119448
2314 08:00:35.968659 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119448
2315 08:00:35.968849 JobError: Your job cannot terminate cleanly.