Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:48:58.163673 lava-dispatcher, installed at version: 2022.10
2 07:48:58.163870 start: 0 validate
3 07:48:58.164010 Start time: 2022-11-25 07:48:58.164002+00:00 (UTC)
4 07:48:58.164138 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:48:58.164278 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:48:58.464363 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:48:58.464563 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:48:58.478600 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:48:58.478781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:48:58.494801 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:48:58.494987 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:48:58.513692 validate duration: 0.35
14 07:48:58.514014 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:48:58.514131 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:48:58.514232 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:48:58.514341 Not decompressing ramdisk as can be used compressed.
18 07:48:58.514432 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 07:48:58.514504 saving as /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/ramdisk/initrd.cpio.gz
20 07:48:58.514573 total size: 5431719 (5MB)
21 07:48:58.550527 progress 0% (0MB)
22 07:48:58.586954 progress 5% (0MB)
23 07:48:58.611938 progress 10% (0MB)
24 07:48:58.647594 progress 15% (0MB)
25 07:48:58.692667 progress 20% (1MB)
26 07:48:58.726392 progress 25% (1MB)
27 07:48:58.767435 progress 30% (1MB)
28 07:48:58.799953 progress 35% (1MB)
29 07:48:58.836608 progress 40% (2MB)
30 07:48:58.871924 progress 45% (2MB)
31 07:48:58.904863 progress 50% (2MB)
32 07:48:58.950033 progress 55% (2MB)
33 07:48:58.982837 progress 60% (3MB)
34 07:48:59.008750 progress 65% (3MB)
35 07:48:59.050265 progress 70% (3MB)
36 07:48:59.085770 progress 75% (3MB)
37 07:48:59.124982 progress 80% (4MB)
38 07:48:59.164752 progress 85% (4MB)
39 07:48:59.208042 progress 90% (4MB)
40 07:48:59.250727 progress 95% (4MB)
41 07:48:59.290378 progress 100% (5MB)
42 07:48:59.291709 5MB downloaded in 0.78s (6.67MB/s)
43 07:48:59.292444 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:48:59.293666 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:48:59.294152 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:48:59.294602 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:48:59.295098 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:48:59.295444 saving as /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/kernel/bzImage
50 07:48:59.295763 total size: 7131024 (6MB)
51 07:48:59.296077 No compression specified
52 07:48:59.326603 progress 0% (0MB)
53 07:48:59.386130 progress 5% (0MB)
54 07:48:59.429356 progress 10% (0MB)
55 07:48:59.470499 progress 15% (1MB)
56 07:48:59.511842 progress 20% (1MB)
57 07:48:59.553720 progress 25% (1MB)
58 07:48:59.594690 progress 30% (2MB)
59 07:48:59.629234 progress 35% (2MB)
60 07:48:59.660171 progress 40% (2MB)
61 07:48:59.680446 progress 45% (3MB)
62 07:48:59.714624 progress 50% (3MB)
63 07:48:59.736005 progress 55% (3MB)
64 07:48:59.759775 progress 60% (4MB)
65 07:48:59.791980 progress 65% (4MB)
66 07:48:59.813469 progress 70% (4MB)
67 07:48:59.840215 progress 75% (5MB)
68 07:48:59.856191 progress 80% (5MB)
69 07:48:59.892235 progress 85% (5MB)
70 07:48:59.916279 progress 90% (6MB)
71 07:48:59.943038 progress 95% (6MB)
72 07:48:59.969367 progress 100% (6MB)
73 07:48:59.970592 6MB downloaded in 0.67s (10.08MB/s)
74 07:48:59.971307 end: 1.2.1 http-download (duration 00:00:01) [common]
76 07:48:59.972517 end: 1.2 download-retry (duration 00:00:01) [common]
77 07:48:59.973045 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:48:59.973616 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:48:59.974168 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 07:48:59.974522 saving as /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/nfsrootfs/full.rootfs.tar
81 07:48:59.974848 total size: 207113456 (197MB)
82 07:48:59.975169 Using unxz to decompress xz
83 07:49:00.037540 progress 0% (0MB)
84 07:49:01.719392 progress 5% (9MB)
85 07:49:03.066232 progress 10% (19MB)
86 07:49:04.056697 progress 15% (29MB)
87 07:49:05.074730 progress 20% (39MB)
88 07:49:05.615690 progress 25% (49MB)
89 07:49:06.287403 progress 30% (59MB)
90 07:49:07.543724 progress 35% (69MB)
91 07:49:09.162674 progress 40% (79MB)
92 07:49:10.937268 progress 45% (88MB)
93 07:49:12.642310 progress 50% (98MB)
94 07:49:13.815466 progress 55% (108MB)
95 07:49:14.719674 progress 60% (118MB)
96 07:49:15.630643 progress 65% (128MB)
97 07:49:16.519141 progress 70% (138MB)
98 07:49:17.429173 progress 75% (148MB)
99 07:49:18.337558 progress 80% (158MB)
100 07:49:19.109184 progress 85% (167MB)
101 07:49:19.514517 progress 90% (177MB)
102 07:49:19.993073 progress 95% (187MB)
103 07:49:20.656174 progress 100% (197MB)
104 07:49:20.662628 197MB downloaded in 20.69s (9.55MB/s)
105 07:49:20.662908 end: 1.3.1 http-download (duration 00:00:21) [common]
107 07:49:20.663202 end: 1.3 download-retry (duration 00:00:21) [common]
108 07:49:20.663305 start: 1.4 download-retry (timeout 00:09:38) [common]
109 07:49:20.663404 start: 1.4.1 http-download (timeout 00:09:38) [common]
110 07:49:20.663536 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:49:20.663616 saving as /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/modules/modules.tar
112 07:49:20.663685 total size: 52060 (0MB)
113 07:49:20.663755 Using unxz to decompress xz
114 07:49:20.675439 progress 62% (0MB)
115 07:49:20.678504 progress 100% (0MB)
116 07:49:20.680126 0MB downloaded in 0.02s (3.02MB/s)
117 07:49:20.680380 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:49:20.680675 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:49:20.680781 start: 1.5 prepare-tftp-overlay (timeout 00:09:38) [common]
121 07:49:20.680890 start: 1.5.1 extract-nfsrootfs (timeout 00:09:38) [common]
122 07:49:22.926573 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119380/extract-nfsrootfs-zn6c9fcn
123 07:49:22.926797 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:49:22.926915 start: 1.5.2 lava-overlay (timeout 00:09:36) [common]
125 07:49:22.927071 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw
126 07:49:22.927186 makedir: /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin
127 07:49:22.927282 makedir: /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/tests
128 07:49:22.927377 makedir: /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/results
129 07:49:22.927491 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-add-keys
130 07:49:22.927641 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-add-sources
131 07:49:22.927779 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-background-process-start
132 07:49:22.927908 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-background-process-stop
133 07:49:22.928037 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-common-functions
134 07:49:22.928164 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-echo-ipv4
135 07:49:22.928291 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-install-packages
136 07:49:22.928416 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-installed-packages
137 07:49:22.928539 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-os-build
138 07:49:22.928666 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-probe-channel
139 07:49:22.928793 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-probe-ip
140 07:49:22.928915 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-target-ip
141 07:49:22.929041 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-target-mac
142 07:49:22.929164 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-target-storage
143 07:49:22.929297 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-case
144 07:49:22.929425 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-event
145 07:49:22.929550 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-feedback
146 07:49:22.929676 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-raise
147 07:49:22.929809 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-reference
148 07:49:22.930109 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-runner
149 07:49:22.930240 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-set
150 07:49:22.930365 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-test-shell
151 07:49:22.930498 Updating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-add-keys (debian)
152 07:49:22.930628 Updating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-add-sources (debian)
153 07:49:22.930761 Updating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-install-packages (debian)
154 07:49:22.930890 Updating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-installed-packages (debian)
155 07:49:22.931019 Updating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/bin/lava-os-build (debian)
156 07:49:22.931132 Creating /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/environment
157 07:49:22.931235 LAVA metadata
158 07:49:22.931315 - LAVA_JOB_ID=8119380
159 07:49:22.931389 - LAVA_DISPATCHER_IP=192.168.201.1
160 07:49:22.931500 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:36) [common]
161 07:49:22.931577 skipped lava-vland-overlay
162 07:49:22.931667 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 07:49:22.931762 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:36) [common]
164 07:49:22.931833 skipped lava-multinode-overlay
165 07:49:22.931921 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 07:49:22.932013 start: 1.5.2.3 test-definition (timeout 00:09:36) [common]
167 07:49:22.932094 Loading test definitions
168 07:49:22.932199 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:36) [common]
169 07:49:22.932284 Using /lava-8119380 at stage 0
170 07:49:22.932543 uuid=8119380_1.5.2.3.1 testdef=None
171 07:49:22.932644 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 07:49:22.932744 start: 1.5.2.3.2 test-overlay (timeout 00:09:36) [common]
173 07:49:22.933216 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 07:49:22.933486 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:36) [common]
176 07:49:22.934049 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 07:49:22.934323 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:36) [common]
179 07:49:22.934844 runner path: /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/0/tests/0_timesync-off test_uuid 8119380_1.5.2.3.1
180 07:49:22.935012 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 07:49:22.935282 start: 1.5.2.3.5 git-repo-action (timeout 00:09:36) [common]
183 07:49:22.935366 Using /lava-8119380 at stage 0
184 07:49:22.935480 Fetching tests from https://github.com/kernelci/test-definitions.git
185 07:49:22.935572 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/0/tests/1_kselftest-alsa'
186 07:49:28.101847 Running '/usr/bin/git checkout kernelci.org
187 07:49:28.200236 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 07:49:28.200992 uuid=8119380_1.5.2.3.5 testdef=None
189 07:49:28.201174 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
191 07:49:28.201457 start: 1.5.2.3.6 test-overlay (timeout 00:09:30) [common]
192 07:49:28.202284 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 07:49:28.202564 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:30) [common]
195 07:49:28.203587 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 07:49:28.203887 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:30) [common]
198 07:49:28.204968 runner path: /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/0/tests/1_kselftest-alsa test_uuid 8119380_1.5.2.3.5
199 07:49:28.205072 BOARD='asus-cx9400-volteer'
200 07:49:28.205148 BRANCH='cip'
201 07:49:28.205219 SKIPFILE='skipfile-lkft.yaml'
202 07:49:28.205287 TESTPROG_URL='None'
203 07:49:28.205355 TST_CASENAME=''
204 07:49:28.205420 TST_CMDFILES='alsa'
205 07:49:28.205571 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 07:49:28.205872 Creating lava-test-runner.conf files
208 07:49:28.205959 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119380/lava-overlay-1350mcsw/lava-8119380/0 for stage 0
209 07:49:28.206059 - 0_timesync-off
210 07:49:28.206138 - 1_kselftest-alsa
211 07:49:28.206243 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
212 07:49:28.206347 start: 1.5.2.4 compress-overlay (timeout 00:09:30) [common]
213 07:49:36.522159 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
214 07:49:36.522327 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:22) [common]
215 07:49:36.522435 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 07:49:36.522548 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
217 07:49:36.522655 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:22) [common]
218 07:49:36.637997 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 07:49:36.638367 start: 1.5.4 extract-modules (timeout 00:09:22) [common]
220 07:49:36.638494 extracting modules file /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119380/extract-nfsrootfs-zn6c9fcn
221 07:49:36.643252 extracting modules file /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119380/extract-overlay-ramdisk-uc4zr8dt/ramdisk
222 07:49:36.647678 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 07:49:36.647809 start: 1.5.5 apply-overlay-tftp (timeout 00:09:22) [common]
224 07:49:36.647909 [common] Applying overlay to NFS
225 07:49:36.647995 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119380/compress-overlay-78omb6t_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119380/extract-nfsrootfs-zn6c9fcn
226 07:49:37.159036 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
227 07:49:37.159204 start: 1.5.6 configure-preseed-file (timeout 00:09:21) [common]
228 07:49:37.159311 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 07:49:37.159418 start: 1.5.7 compress-ramdisk (timeout 00:09:21) [common]
230 07:49:37.159514 Building ramdisk /var/lib/lava/dispatcher/tmp/8119380/extract-overlay-ramdisk-uc4zr8dt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119380/extract-overlay-ramdisk-uc4zr8dt/ramdisk
231 07:49:37.196168 >> 24546 blocks
232 07:49:37.740151 rename /var/lib/lava/dispatcher/tmp/8119380/extract-overlay-ramdisk-uc4zr8dt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/ramdisk/ramdisk.cpio.gz
233 07:49:37.740584 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 07:49:37.740719 start: 1.5.8 prepare-kernel (timeout 00:09:21) [common]
235 07:49:37.740837 start: 1.5.8.1 prepare-fit (timeout 00:09:21) [common]
236 07:49:37.740940 No mkimage arch provided, not using FIT.
237 07:49:37.741040 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 07:49:37.741137 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 07:49:37.741250 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
240 07:49:37.741360 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:21) [common]
241 07:49:37.741447 No LXC device requested
242 07:49:37.741541 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 07:49:37.741644 start: 1.7 deploy-device-env (timeout 00:09:21) [common]
244 07:49:37.741747 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 07:49:37.741863 Checking files for TFTP limit of 4294967296 bytes.
246 07:49:37.742316 end: 1 tftp-deploy (duration 00:00:39) [common]
247 07:49:37.742435 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 07:49:37.742544 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 07:49:37.742684 substitutions:
250 07:49:37.742762 - {DTB}: None
251 07:49:37.742835 - {INITRD}: 8119380/tftp-deploy-1bttgsgy/ramdisk/ramdisk.cpio.gz
252 07:49:37.742915 - {KERNEL}: 8119380/tftp-deploy-1bttgsgy/kernel/bzImage
253 07:49:37.742984 - {LAVA_MAC}: None
254 07:49:37.743051 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119380/extract-nfsrootfs-zn6c9fcn
255 07:49:37.743118 - {NFS_SERVER_IP}: 192.168.201.1
256 07:49:37.743183 - {PRESEED_CONFIG}: None
257 07:49:37.743251 - {PRESEED_LOCAL}: None
258 07:49:37.743315 - {RAMDISK}: 8119380/tftp-deploy-1bttgsgy/ramdisk/ramdisk.cpio.gz
259 07:49:37.743380 - {ROOT_PART}: None
260 07:49:37.743444 - {ROOT}: None
261 07:49:37.743508 - {SERVER_IP}: 192.168.201.1
262 07:49:37.743572 - {TEE}: None
263 07:49:37.743637 Parsed boot commands:
264 07:49:37.743700 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 07:49:37.743872 Parsed boot commands: tftpboot 192.168.201.1 8119380/tftp-deploy-1bttgsgy/kernel/bzImage 8119380/tftp-deploy-1bttgsgy/kernel/cmdline 8119380/tftp-deploy-1bttgsgy/ramdisk/ramdisk.cpio.gz
266 07:49:37.743980 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 07:49:37.744082 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 07:49:37.744190 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 07:49:37.744289 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 07:49:37.744372 Not connected, no need to disconnect.
271 07:49:37.744460 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 07:49:37.744555 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 07:49:37.744632 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
274 07:49:37.747578 Setting prompt string to ['lava-test: # ']
275 07:49:37.747898 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 07:49:37.748018 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 07:49:37.748132 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 07:49:37.748237 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 07:49:37.748432 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
280 07:49:37.769427 >> Command sent successfully.
281 07:49:37.771519 Returned 0 in 0 seconds
282 07:49:37.872346 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 07:49:37.872699 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 07:49:37.872815 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 07:49:37.872916 Setting prompt string to 'Starting depthcharge on Voema...'
287 07:49:37.872995 Changing prompt to 'Starting depthcharge on Voema...'
288 07:49:37.873076 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 07:49:37.873370 [Enter `^Ec?' for help]
290 07:49:45.007872
291 07:49:45.008038
292 07:49:45.017586 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 07:49:45.020907 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
294 07:49:45.027365 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 07:49:45.031060 CPU: AES supported, TXT NOT supported, VT supported
296 07:49:45.038318 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 07:49:45.041107 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 07:49:45.048218 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 07:49:45.051669 VBOOT: Loading verstage.
300 07:49:45.054829 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 07:49:45.061534 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 07:49:45.064575 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 07:49:45.074737 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 07:49:45.081254 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 07:49:45.081351
306 07:49:45.081428
307 07:49:45.094388 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 07:49:45.108403 Probing TPM: . done!
309 07:49:45.111716 TPM ready after 0 ms
310 07:49:45.115296 Connected to device vid:did:rid of 1ae0:0028:00
311 07:49:45.126176 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
312 07:49:45.132874 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 07:49:45.136372 Initialized TPM device CR50 revision 0
314 07:49:45.194845 tlcl_send_startup: Startup return code is 0
315 07:49:45.194967 TPM: setup succeeded
316 07:49:45.210174 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 07:49:45.224294 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 07:49:45.236983 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 07:49:45.246749 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 07:49:45.250858 Chrome EC: UHEPI supported
321 07:49:45.253634 Phase 1
322 07:49:45.257537 FMAP: area GBB found @ 1805000 (458752 bytes)
323 07:49:45.263888 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 07:49:45.267420
325 07:49:45.273607 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
326 07:49:45.280687 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
327 07:49:45.287299 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
328 07:49:45.290673 Recovery requested (1009000e)
329 07:49:45.293893 TPM: Extending digest for VBOOT: boot mode into PCR 0
330 07:49:45.305171 tlcl_extend: response is 0
331 07:49:45.311517 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
332 07:49:45.321485 tlcl_extend: response is 0
333 07:49:45.328452 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
334 07:49:45.334760 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
335 07:49:45.341415 BS: verstage times (exec / console): total (unknown) / 142 ms
336 07:49:45.341502
337 07:49:45.341593
338 07:49:45.354494 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
339 07:49:45.361583 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
340 07:49:45.364461 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
341 07:49:45.368008 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
342 07:49:45.374555 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
343 07:49:45.377912 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
344 07:49:45.381253 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
345 07:49:45.384475 TCO_STS: 0000 0000
346 07:49:45.388174 GEN_PMCON: d0015038 00002200
347 07:49:45.391234 GBLRST_CAUSE: 00000000 00000000
348 07:49:45.391329 HPR_CAUSE0: 00000000
349 07:49:45.394615
350 07:49:45.394710 prev_sleep_state 5
351 07:49:45.398336 Boot Count incremented to 10266
352 07:49:45.404364 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
353 07:49:45.411489 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
354 07:49:45.421342 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
355 07:49:45.427728 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
356 07:49:45.431190 Chrome EC: UHEPI supported
357 07:49:45.437511 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
358 07:49:45.448683 Probing TPM: done!
359 07:49:45.455259 Connected to device vid:did:rid of 1ae0:0028:00
360 07:49:45.464943 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
361 07:49:45.468435 Initialized TPM device CR50 revision 0
362 07:49:45.483205 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
363 07:49:45.490200 MRC: Hash idx 0x100b comparison successful.
364 07:49:45.493488 MRC cache found, size faa8
365 07:49:45.493584 bootmode is set to: 2
366 07:49:45.496776 SPD index = 2
367 07:49:45.503377 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
368 07:49:45.506503 SPD: module type is LPDDR4X
369 07:49:45.509872 SPD: module part number is MT53D1G64D4NW-046
370 07:49:45.516400 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
371 07:49:45.519647 SPD: device width 16 bits, bus width 16 bits
372 07:49:45.526489 SPD: module size is 2048 MB (per channel)
373 07:49:45.956063 CBMEM:
374 07:49:45.959295 IMD: root @ 0x76fff000 254 entries.
375 07:49:45.962771 IMD: root @ 0x76ffec00 62 entries.
376 07:49:45.966179 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
377 07:49:45.972674 FMAP: area RW_VPD found @ f35000 (8192 bytes)
378 07:49:45.975756 External stage cache:
379 07:49:45.979139 IMD: root @ 0x7b3ff000 254 entries.
380 07:49:45.982685 IMD: root @ 0x7b3fec00 62 entries.
381 07:49:45.997311 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
382 07:49:46.004017 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
383 07:49:46.010861 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
384 07:49:46.024469 MRC: 'RECOVERY_MRC_CACHE' does not need update.
385 07:49:46.030881 cse_lite: Skip switching to RW in the recovery path
386 07:49:46.030975 8 DIMMs found
387 07:49:46.031051 SMM Memory Map
388 07:49:46.037589 SMRAM : 0x7b000000 0x800000
389 07:49:46.040796 Subregion 0: 0x7b000000 0x200000
390 07:49:46.044012 Subregion 1: 0x7b200000 0x200000
391 07:49:46.047967 Subregion 2: 0x7b400000 0x400000
392 07:49:46.048061 top_of_ram = 0x77000000
393 07:49:46.054282 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
394 07:49:46.060831 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
395 07:49:46.064063 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
396 07:49:46.070579 MTRR Range: Start=ff000000 End=0 (Size 1000000)
397 07:49:46.077579 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
398 07:49:46.083914 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
399 07:49:46.094049 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
400 07:49:46.097675 Processing 211 relocs. Offset value of 0x74c0b000
401 07:49:46.100461
402 07:49:46.107442 BS: romstage times (exec / console): total (unknown) / 277 ms
403 07:49:46.112908
404 07:49:46.113006
405 07:49:46.123007 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
406 07:49:46.126125 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
407 07:49:46.136065 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
408 07:49:46.142694 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
409 07:49:46.149518 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
410 07:49:46.155724 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
411 07:49:46.199925 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
412 07:49:46.206120 Processing 5008 relocs. Offset value of 0x75d98000
413 07:49:46.209823 BS: postcar times (exec / console): total (unknown) / 59 ms
414 07:49:46.213116
415 07:49:46.213210
416 07:49:46.222576 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
417 07:49:46.222674 Normal boot
418 07:49:46.226271 FW_CONFIG value is 0x804c02
419 07:49:46.229756 PCI: 00:07.0 disabled by fw_config
420 07:49:46.232835 PCI: 00:07.1 disabled by fw_config
421 07:49:46.236119 PCI: 00:0d.2 disabled by fw_config
422 07:49:46.242828 PCI: 00:1c.7 disabled by fw_config
423 07:49:46.246333 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
424 07:49:46.252598 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
425 07:49:46.255974 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
426 07:49:46.262292 GENERIC: 0.0 disabled by fw_config
427 07:49:46.265741 GENERIC: 1.0 disabled by fw_config
428 07:49:46.269508 fw_config match found: DB_USB=USB3_ACTIVE
429 07:49:46.272474 fw_config match found: DB_USB=USB3_ACTIVE
430 07:49:46.275885 fw_config match found: DB_USB=USB3_ACTIVE
431 07:49:46.282299 fw_config match found: DB_USB=USB3_ACTIVE
432 07:49:46.286091 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
433 07:49:46.292339 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
434 07:49:46.302254 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
435 07:49:46.308847 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
436 07:49:46.312115 microcode: sig=0x806c1 pf=0x80 revision=0x86
437 07:49:46.319098 microcode: Update skipped, already up-to-date
438 07:49:46.325479 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
439 07:49:46.353398 Detected 4 core, 8 thread CPU.
440 07:49:46.356650 Setting up SMI for CPU
441 07:49:46.359697 IED base = 0x7b400000
442 07:49:46.359792 IED size = 0x00400000
443 07:49:46.363375 Will perform SMM setup.
444 07:49:46.370188 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
445 07:49:46.376367 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
446 07:49:46.382924 Processing 16 relocs. Offset value of 0x00030000
447 07:49:46.386714 Attempting to start 7 APs
448 07:49:46.389894 Waiting for 10ms after sending INIT.
449 07:49:46.405666 Waiting for 1st SIPI to complete...done.
450 07:49:46.405762 AP: slot 1 apic_id 1.
451 07:49:46.412076 Waiting for 2nd SIPI to complete...done.
452 07:49:46.412172 AP: slot 6 apic_id 2.
453 07:49:46.415296 AP: slot 3 apic_id 3.
454 07:49:46.418638 AP: slot 2 apic_id 7.
455 07:49:46.418734 AP: slot 5 apic_id 6.
456 07:49:46.421887 AP: slot 7 apic_id 5.
457 07:49:46.424986 AP: slot 4 apic_id 4.
458 07:49:46.431713 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
459 07:49:46.438463 Processing 13 relocs. Offset value of 0x00038000
460 07:49:46.438558 Unable to locate Global NVS
461 07:49:46.441634
462 07:49:46.448584 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
463 07:49:46.451775 Installing permanent SMM handler to 0x7b000000
464 07:49:46.461427 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
465 07:49:46.464894 Processing 794 relocs. Offset value of 0x7b010000
466 07:49:46.474780 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
467 07:49:46.478629 Processing 13 relocs. Offset value of 0x7b008000
468 07:49:46.485164 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
469 07:49:46.491338 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
470 07:49:46.495005 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
471 07:49:46.501359 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
472 07:49:46.508242 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
473 07:49:46.514929 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
474 07:49:46.521398 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
475 07:49:46.521493 Unable to locate Global NVS
476 07:49:46.531330 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
477 07:49:46.534387 Clearing SMI status registers
478 07:49:46.534482 SMI_STS: PM1
479 07:49:46.537983 PM1_STS: PWRBTN
480 07:49:46.544419 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
481 07:49:46.547785 In relocation handler: CPU 0
482 07:49:46.551069 New SMBASE=0x7b000000 IEDBASE=0x7b400000
483 07:49:46.557759 Writing SMRR. base = 0x7b000006, mask=0xff800c00
484 07:49:46.557858 Relocation complete.
485 07:49:46.567694 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
486 07:49:46.567791 In relocation handler: CPU 1
487 07:49:46.574009 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
488 07:49:46.574104 Relocation complete.
489 07:49:46.584026 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
490 07:49:46.584122 In relocation handler: CPU 6
491 07:49:46.590681 New SMBASE=0x7affe800 IEDBASE=0x7b400000
492 07:49:46.594231 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 07:49:46.597326 Relocation complete.
494 07:49:46.604269 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
495 07:49:46.607380 In relocation handler: CPU 3
496 07:49:46.610653 New SMBASE=0x7afff400 IEDBASE=0x7b400000
497 07:49:46.613867 Relocation complete.
498 07:49:46.620545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
499 07:49:46.624404 In relocation handler: CPU 2
500 07:49:46.627214 New SMBASE=0x7afff800 IEDBASE=0x7b400000
501 07:49:46.630348 Relocation complete.
502 07:49:46.636975 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
503 07:49:46.640854 In relocation handler: CPU 5
504 07:49:46.643689 New SMBASE=0x7affec00 IEDBASE=0x7b400000
505 07:49:46.650616 Writing SMRR. base = 0x7b000006, mask=0xff800c00
506 07:49:46.650726 Relocation complete.
507 07:49:46.657284 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
508 07:49:46.660500 In relocation handler: CPU 7
509 07:49:46.663901 New SMBASE=0x7affe400 IEDBASE=0x7b400000
510 07:49:46.667179 Relocation complete.
511 07:49:46.673560 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
512 07:49:46.677461 In relocation handler: CPU 4
513 07:49:46.680324 New SMBASE=0x7afff000 IEDBASE=0x7b400000
514 07:49:46.687050 Writing SMRR. base = 0x7b000006, mask=0xff800c00
515 07:49:46.690315 Relocation complete.
516 07:49:46.690410 Initializing CPU #0
517 07:49:46.693677 CPU: vendor Intel device 806c1
518 07:49:46.697294 CPU: family 06, model 8c, stepping 01
519 07:49:46.700094 Clearing out pending MCEs
520 07:49:46.703374 Setting up local APIC...
521 07:49:46.706821 apic_id: 0x00 done.
522 07:49:46.706917 Turbo is available but hidden
523 07:49:46.710084
524 07:49:46.710180 Turbo is available and visible
525 07:49:46.716715 microcode: Update skipped, already up-to-date
526 07:49:46.720783 CPU #0 initialized
527 07:49:46.720877 Initializing CPU #1
528 07:49:46.723344 Initializing CPU #3
529 07:49:46.723439 Initializing CPU #6
530 07:49:46.726828 CPU: vendor Intel device 806c1
531 07:49:46.730112 CPU: family 06, model 8c, stepping 01
532 07:49:46.733366 CPU: vendor Intel device 806c1
533 07:49:46.739811 CPU: family 06, model 8c, stepping 01
534 07:49:46.739907 Initializing CPU #5
535 07:49:46.743175 Initializing CPU #2
536 07:49:46.746646 CPU: vendor Intel device 806c1
537 07:49:46.749849 CPU: family 06, model 8c, stepping 01
538 07:49:46.753525 CPU: vendor Intel device 806c1
539 07:49:46.756634 CPU: family 06, model 8c, stepping 01
540 07:49:46.759766 Clearing out pending MCEs
541 07:49:46.763249 Clearing out pending MCEs
542 07:49:46.763345 Setting up local APIC...
543 07:49:46.766810 Initializing CPU #4
544 07:49:46.770144 Setting up local APIC...
545 07:49:46.770239 Clearing out pending MCEs
546 07:49:46.773906
547 07:49:46.774002 Clearing out pending MCEs
548 07:49:46.777178 Setting up local APIC...
549 07:49:46.780636 CPU: vendor Intel device 806c1
550 07:49:46.784270 CPU: family 06, model 8c, stepping 01
551 07:49:46.787090 CPU: vendor Intel device 806c1
552 07:49:46.790697 CPU: family 06, model 8c, stepping 01
553 07:49:46.793785 Clearing out pending MCEs
554 07:49:46.793883 Initializing CPU #7
555 07:49:46.797277 apic_id: 0x07 done.
556 07:49:46.800700 apic_id: 0x06 done.
557 07:49:46.804023 microcode: Update skipped, already up-to-date
558 07:49:46.810759 microcode: Update skipped, already up-to-date
559 07:49:46.810855 CPU #2 initialized
560 07:49:46.813471 CPU #5 initialized
561 07:49:46.813567 Setting up local APIC...
562 07:49:46.816857 apic_id: 0x02 done.
563 07:49:46.820240 Setting up local APIC...
564 07:49:46.823684 microcode: Update skipped, already up-to-date
565 07:49:46.826887 apic_id: 0x03 done.
566 07:49:46.826983 CPU #6 initialized
567 07:49:46.830481
568 07:49:46.833571 microcode: Update skipped, already up-to-date
569 07:49:46.836702 Clearing out pending MCEs
570 07:49:46.839942 CPU: vendor Intel device 806c1
571 07:49:46.843473 CPU: family 06, model 8c, stepping 01
572 07:49:46.846939 Setting up local APIC...
573 07:49:46.847034 apic_id: 0x01 done.
574 07:49:46.850157 Clearing out pending MCEs
575 07:49:46.853480 apic_id: 0x04 done.
576 07:49:46.853578 Setting up local APIC...
577 07:49:46.856476 CPU #3 initialized
578 07:49:46.859632 microcode: Update skipped, already up-to-date
579 07:49:46.866583 microcode: Update skipped, already up-to-date
580 07:49:46.866680 apic_id: 0x05 done.
581 07:49:46.869992 CPU #4 initialized
582 07:49:46.873446 microcode: Update skipped, already up-to-date
583 07:49:46.876569 CPU #1 initialized
584 07:49:46.879629 CPU #7 initialized
585 07:49:46.883471 bsp_do_flight_plan done after 467 msecs.
586 07:49:46.886686 CPU: frequency set to 4400 MHz
587 07:49:46.886782 Enabling SMIs.
588 07:49:46.892756 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
589 07:49:46.909830 SATAXPCIE1 indicates PCIe NVMe is present
590 07:49:46.912921 Probing TPM: done!
591 07:49:46.916278 Connected to device vid:did:rid of 1ae0:0028:00
592 07:49:46.927103 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
593 07:49:46.930233 Initialized TPM device CR50 revision 0
594 07:49:46.933631 Enabling S0i3.4
595 07:49:46.939834 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 07:49:46.943339 Found a VBT of 8704 bytes after decompression
597 07:49:46.950198 cse_lite: CSE RO boot. HybridStorageMode disabled
598 07:49:46.956790 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 07:49:47.032142 FSPS returned 0
600 07:49:47.035642 Executing Phase 1 of FspMultiPhaseSiInit
601 07:49:47.045421 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 07:49:47.048635 port C0 DISC req: usage 1 usb3 1 usb2 5
603 07:49:47.052065 Raw Buffer output 0 00000511
604 07:49:47.055325 Raw Buffer output 1 00000000
605 07:49:47.059111 pmc_send_ipc_cmd succeeded
606 07:49:47.062490 port C1 DISC req: usage 1 usb3 2 usb2 3
607 07:49:47.065393
608 07:49:47.065481 Raw Buffer output 0 00000321
609 07:49:47.069180 Raw Buffer output 1 00000000
610 07:49:47.072826 pmc_send_ipc_cmd succeeded
611 07:49:47.077858 Detected 4 core, 8 thread CPU.
612 07:49:47.081056 Detected 4 core, 8 thread CPU.
613 07:49:47.281443 Display FSP Version Info HOB
614 07:49:47.284840 Reference Code - CPU = a.0.4c.31
615 07:49:47.288831 uCode Version = 0.0.0.86
616 07:49:47.291777 TXT ACM version = ff.ff.ff.ffff
617 07:49:47.294641 Reference Code - ME = a.0.4c.31
618 07:49:47.298534 MEBx version = 0.0.0.0
619 07:49:47.301690 ME Firmware Version = Consumer SKU
620 07:49:47.305230 Reference Code - PCH = a.0.4c.31
621 07:49:47.308201 PCH-CRID Status = Disabled
622 07:49:47.311719 PCH-CRID Original Value = ff.ff.ff.ffff
623 07:49:47.315082 PCH-CRID New Value = ff.ff.ff.ffff
624 07:49:47.317882 OPROM - RST - RAID = ff.ff.ff.ffff
625 07:49:47.321711 PCH Hsio Version = 4.0.0.0
626 07:49:47.324768 Reference Code - SA - System Agent = a.0.4c.31
627 07:49:47.328195 Reference Code - MRC = 2.0.0.1
628 07:49:47.331366 SA - PCIe Version = a.0.4c.31
629 07:49:47.334966 SA-CRID Status = Disabled
630 07:49:47.338268 SA-CRID Original Value = 0.0.0.1
631 07:49:47.341285 SA-CRID New Value = 0.0.0.1
632 07:49:47.344732 OPROM - VBIOS = ff.ff.ff.ffff
633 07:49:47.348176 IO Manageability Engine FW Version = 11.1.4.0
634 07:49:47.351225 PHY Build Version = 0.0.0.e0
635 07:49:47.354891 Thunderbolt(TM) FW Version = 0.0.0.0
636 07:49:47.362500 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
637 07:49:47.362598 ITSS IRQ Polarities Before:
638 07:49:47.365774 IPC0: 0xffffffff
639 07:49:47.365869 IPC1: 0xffffffff
640 07:49:47.369220 IPC2: 0xffffffff
641 07:49:47.369315 IPC3: 0xffffffff
642 07:49:47.372404 ITSS IRQ Polarities After:
643 07:49:47.375591 IPC0: 0xffffffff
644 07:49:47.375686 IPC1: 0xffffffff
645 07:49:47.379016 IPC2: 0xffffffff
646 07:49:47.379111 IPC3: 0xffffffff
647 07:49:47.385857 Found PCIe Root Port #9 at PCI: 00:1d.0.
648 07:49:47.396150 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
649 07:49:47.409339 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
650 07:49:47.418780 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
651 07:49:47.422040
652 07:49:47.425158 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
653 07:49:47.429025 Enumerating buses...
654 07:49:47.432335 Show all devs... Before device enumeration.
655 07:49:47.435517 Root Device: enabled 1
656 07:49:47.438816 DOMAIN: 0000: enabled 1
657 07:49:47.441872 CPU_CLUSTER: 0: enabled 1
658 07:49:47.441979 PCI: 00:00.0: enabled 1
659 07:49:47.445195 PCI: 00:02.0: enabled 1
660 07:49:47.448780 PCI: 00:04.0: enabled 1
661 07:49:47.451713 PCI: 00:05.0: enabled 1
662 07:49:47.451809 PCI: 00:06.0: enabled 0
663 07:49:47.455365 PCI: 00:07.0: enabled 0
664 07:49:47.458816 PCI: 00:07.1: enabled 0
665 07:49:47.461781 PCI: 00:07.2: enabled 0
666 07:49:47.461878 PCI: 00:07.3: enabled 0
667 07:49:47.465175 PCI: 00:08.0: enabled 1
668 07:49:47.468723 PCI: 00:09.0: enabled 0
669 07:49:47.471834 PCI: 00:0a.0: enabled 0
670 07:49:47.471931 PCI: 00:0d.0: enabled 1
671 07:49:47.475283 PCI: 00:0d.1: enabled 0
672 07:49:47.478710 PCI: 00:0d.2: enabled 0
673 07:49:47.478806 PCI: 00:0d.3: enabled 0
674 07:49:47.482122 PCI: 00:0e.0: enabled 0
675 07:49:47.485587 PCI: 00:10.2: enabled 1
676 07:49:47.488594 PCI: 00:10.6: enabled 0
677 07:49:47.488690 PCI: 00:10.7: enabled 0
678 07:49:47.491881 PCI: 00:12.0: enabled 0
679 07:49:47.495213 PCI: 00:12.6: enabled 0
680 07:49:47.498495 PCI: 00:13.0: enabled 0
681 07:49:47.498590 PCI: 00:14.0: enabled 1
682 07:49:47.501646 PCI: 00:14.1: enabled 0
683 07:49:47.505128 PCI: 00:14.2: enabled 1
684 07:49:47.508073 PCI: 00:14.3: enabled 1
685 07:49:47.508168 PCI: 00:15.0: enabled 1
686 07:49:47.511358 PCI: 00:15.1: enabled 1
687 07:49:47.514736 PCI: 00:15.2: enabled 1
688 07:49:47.518206 PCI: 00:15.3: enabled 1
689 07:49:47.518303 PCI: 00:16.0: enabled 1
690 07:49:47.521584 PCI: 00:16.1: enabled 0
691 07:49:47.524869 PCI: 00:16.2: enabled 0
692 07:49:47.524966 PCI: 00:16.3: enabled 0
693 07:49:47.528229 PCI: 00:16.4: enabled 0
694 07:49:47.531533 PCI: 00:16.5: enabled 0
695 07:49:47.534847 PCI: 00:17.0: enabled 1
696 07:49:47.534944 PCI: 00:19.0: enabled 0
697 07:49:47.538295 PCI: 00:19.1: enabled 1
698 07:49:47.541540 PCI: 00:19.2: enabled 0
699 07:49:47.544622 PCI: 00:1c.0: enabled 1
700 07:49:47.544718 PCI: 00:1c.1: enabled 0
701 07:49:47.548071 PCI: 00:1c.2: enabled 0
702 07:49:47.551190 PCI: 00:1c.3: enabled 0
703 07:49:47.554799 PCI: 00:1c.4: enabled 0
704 07:49:47.554896 PCI: 00:1c.5: enabled 0
705 07:49:47.558036 PCI: 00:1c.6: enabled 1
706 07:49:47.561434 PCI: 00:1c.7: enabled 0
707 07:49:47.561528 PCI: 00:1d.0: enabled 1
708 07:49:47.564779
709 07:49:47.564875 PCI: 00:1d.1: enabled 0
710 07:49:47.567968 PCI: 00:1d.2: enabled 1
711 07:49:47.571322 PCI: 00:1d.3: enabled 0
712 07:49:47.571424 PCI: 00:1e.0: enabled 1
713 07:49:47.574897 PCI: 00:1e.1: enabled 0
714 07:49:47.578078 PCI: 00:1e.2: enabled 1
715 07:49:47.581126 PCI: 00:1e.3: enabled 1
716 07:49:47.581221 PCI: 00:1f.0: enabled 1
717 07:49:47.584570 PCI: 00:1f.1: enabled 0
718 07:49:47.587868 PCI: 00:1f.2: enabled 1
719 07:49:47.591192 PCI: 00:1f.3: enabled 1
720 07:49:47.591286 PCI: 00:1f.4: enabled 0
721 07:49:47.594553 PCI: 00:1f.5: enabled 1
722 07:49:47.597625 PCI: 00:1f.6: enabled 0
723 07:49:47.600947 PCI: 00:1f.7: enabled 0
724 07:49:47.601042 APIC: 00: enabled 1
725 07:49:47.604391 GENERIC: 0.0: enabled 1
726 07:49:47.608158 GENERIC: 0.0: enabled 1
727 07:49:47.608253 GENERIC: 1.0: enabled 1
728 07:49:47.611144 GENERIC: 0.0: enabled 1
729 07:49:47.614689 GENERIC: 1.0: enabled 1
730 07:49:47.617748 USB0 port 0: enabled 1
731 07:49:47.617843 GENERIC: 0.0: enabled 1
732 07:49:47.620972 USB0 port 0: enabled 1
733 07:49:47.624316 GENERIC: 0.0: enabled 1
734 07:49:47.624411 I2C: 00:1a: enabled 1
735 07:49:47.627593 I2C: 00:31: enabled 1
736 07:49:47.630756 I2C: 00:32: enabled 1
737 07:49:47.630851 I2C: 00:10: enabled 1
738 07:49:47.634090 I2C: 00:15: enabled 1
739 07:49:47.637476 GENERIC: 0.0: enabled 0
740 07:49:47.641194 GENERIC: 1.0: enabled 0
741 07:49:47.641289 GENERIC: 0.0: enabled 1
742 07:49:47.644421 SPI: 00: enabled 1
743 07:49:47.644515 SPI: 00: enabled 1
744 07:49:47.647633
745 07:49:47.647728 PNP: 0c09.0: enabled 1
746 07:49:47.651098 GENERIC: 0.0: enabled 1
747 07:49:47.654237 USB3 port 0: enabled 1
748 07:49:47.654331 USB3 port 1: enabled 1
749 07:49:47.657371 USB3 port 2: enabled 0
750 07:49:47.661299 USB3 port 3: enabled 0
751 07:49:47.661393 USB2 port 0: enabled 0
752 07:49:47.664051 USB2 port 1: enabled 1
753 07:49:47.667655 USB2 port 2: enabled 1
754 07:49:47.671098 USB2 port 3: enabled 0
755 07:49:47.671192 USB2 port 4: enabled 1
756 07:49:47.674474 USB2 port 5: enabled 0
757 07:49:47.677676 USB2 port 6: enabled 0
758 07:49:47.677770 USB2 port 7: enabled 0
759 07:49:47.680759 USB2 port 8: enabled 0
760 07:49:47.683920 USB2 port 9: enabled 0
761 07:49:47.687904 USB3 port 0: enabled 0
762 07:49:47.687997 USB3 port 1: enabled 1
763 07:49:47.691057 USB3 port 2: enabled 0
764 07:49:47.694107 USB3 port 3: enabled 0
765 07:49:47.694201 GENERIC: 0.0: enabled 1
766 07:49:47.697404 GENERIC: 1.0: enabled 1
767 07:49:47.700464 APIC: 01: enabled 1
768 07:49:47.700558 APIC: 07: enabled 1
769 07:49:47.704232 APIC: 03: enabled 1
770 07:49:47.707108 APIC: 04: enabled 1
771 07:49:47.707202 APIC: 06: enabled 1
772 07:49:47.710411 APIC: 02: enabled 1
773 07:49:47.710505 APIC: 05: enabled 1
774 07:49:47.713760 Compare with tree...
775 07:49:47.717448 Root Device: enabled 1
776 07:49:47.720632 DOMAIN: 0000: enabled 1
777 07:49:47.720726 PCI: 00:00.0: enabled 1
778 07:49:47.723648 PCI: 00:02.0: enabled 1
779 07:49:47.727222 PCI: 00:04.0: enabled 1
780 07:49:47.730796 GENERIC: 0.0: enabled 1
781 07:49:47.733739 PCI: 00:05.0: enabled 1
782 07:49:47.733835 PCI: 00:06.0: enabled 0
783 07:49:47.737002 PCI: 00:07.0: enabled 0
784 07:49:47.740258 GENERIC: 0.0: enabled 1
785 07:49:47.743658 PCI: 00:07.1: enabled 0
786 07:49:47.746847 GENERIC: 1.0: enabled 1
787 07:49:47.746943 PCI: 00:07.2: enabled 0
788 07:49:47.750846 GENERIC: 0.0: enabled 1
789 07:49:47.753973 PCI: 00:07.3: enabled 0
790 07:49:47.757301 GENERIC: 1.0: enabled 1
791 07:49:47.760837 PCI: 00:08.0: enabled 1
792 07:49:47.760933 PCI: 00:09.0: enabled 0
793 07:49:47.763967 PCI: 00:0a.0: enabled 0
794 07:49:47.767173 PCI: 00:0d.0: enabled 1
795 07:49:47.770165 USB0 port 0: enabled 1
796 07:49:47.773456 USB3 port 0: enabled 1
797 07:49:47.773552 USB3 port 1: enabled 1
798 07:49:47.776723 USB3 port 2: enabled 0
799 07:49:47.780047 USB3 port 3: enabled 0
800 07:49:47.783771 PCI: 00:0d.1: enabled 0
801 07:49:47.787233 PCI: 00:0d.2: enabled 0
802 07:49:47.790076 GENERIC: 0.0: enabled 1
803 07:49:47.790172 PCI: 00:0d.3: enabled 0
804 07:49:47.793869 PCI: 00:0e.0: enabled 0
805 07:49:47.797088 PCI: 00:10.2: enabled 1
806 07:49:47.800054 PCI: 00:10.6: enabled 0
807 07:49:47.800150 PCI: 00:10.7: enabled 0
808 07:49:47.803538
809 07:49:47.803634 PCI: 00:12.0: enabled 0
810 07:49:47.806897 PCI: 00:12.6: enabled 0
811 07:49:47.810404 PCI: 00:13.0: enabled 0
812 07:49:47.813531 PCI: 00:14.0: enabled 1
813 07:49:47.813627 USB0 port 0: enabled 1
814 07:49:47.816768 USB2 port 0: enabled 0
815 07:49:47.819908 USB2 port 1: enabled 1
816 07:49:47.823672 USB2 port 2: enabled 1
817 07:49:47.826687 USB2 port 3: enabled 0
818 07:49:47.829961 USB2 port 4: enabled 1
819 07:49:47.830057 USB2 port 5: enabled 0
820 07:49:47.833111 USB2 port 6: enabled 0
821 07:49:47.837158 USB2 port 7: enabled 0
822 07:49:47.839936 USB2 port 8: enabled 0
823 07:49:47.843230 USB2 port 9: enabled 0
824 07:49:47.846478 USB3 port 0: enabled 0
825 07:49:47.846573 USB3 port 1: enabled 1
826 07:49:47.849822 USB3 port 2: enabled 0
827 07:49:47.853118 USB3 port 3: enabled 0
828 07:49:47.856772 PCI: 00:14.1: enabled 0
829 07:49:47.860113 PCI: 00:14.2: enabled 1
830 07:49:47.860208 PCI: 00:14.3: enabled 1
831 07:49:47.863078 GENERIC: 0.0: enabled 1
832 07:49:47.866831 PCI: 00:15.0: enabled 1
833 07:49:47.869905 I2C: 00:1a: enabled 1
834 07:49:47.873116 I2C: 00:31: enabled 1
835 07:49:47.873214 I2C: 00:32: enabled 1
836 07:49:47.876300 PCI: 00:15.1: enabled 1
837 07:49:47.880376 I2C: 00:10: enabled 1
838 07:49:47.883417 PCI: 00:15.2: enabled 1
839 07:49:47.883514 PCI: 00:15.3: enabled 1
840 07:49:47.886522 PCI: 00:16.0: enabled 1
841 07:49:47.889663 PCI: 00:16.1: enabled 0
842 07:49:47.893039 PCI: 00:16.2: enabled 0
843 07:49:47.896570 PCI: 00:16.3: enabled 0
844 07:49:47.896666 PCI: 00:16.4: enabled 0
845 07:49:47.899542 PCI: 00:16.5: enabled 0
846 07:49:47.902877 PCI: 00:17.0: enabled 1
847 07:49:47.906306 PCI: 00:19.0: enabled 0
848 07:49:47.909703 PCI: 00:19.1: enabled 1
849 07:49:47.909805 I2C: 00:15: enabled 1
850 07:49:47.913105 PCI: 00:19.2: enabled 0
851 07:49:47.916489 PCI: 00:1d.0: enabled 1
852 07:49:47.919658 GENERIC: 0.0: enabled 1
853 07:49:47.922948 PCI: 00:1e.0: enabled 1
854 07:49:47.923082 PCI: 00:1e.1: enabled 0
855 07:49:47.926567 PCI: 00:1e.2: enabled 1
856 07:49:47.929866 SPI: 00: enabled 1
857 07:49:47.933078 PCI: 00:1e.3: enabled 1
858 07:49:47.933170 SPI: 00: enabled 1
859 07:49:47.936235 PCI: 00:1f.0: enabled 1
860 07:49:47.939596 PNP: 0c09.0: enabled 1
861 07:49:47.942823 PCI: 00:1f.1: enabled 0
862 07:49:47.942917 PCI: 00:1f.2: enabled 1
863 07:49:47.946361 GENERIC: 0.0: enabled 1
864 07:49:47.949505 GENERIC: 0.0: enabled 1
865 07:49:47.952837 GENERIC: 1.0: enabled 1
866 07:49:47.956042 PCI: 00:1f.3: enabled 1
867 07:49:47.959679 PCI: 00:1f.4: enabled 0
868 07:49:47.959773 PCI: 00:1f.5: enabled 1
869 07:49:47.962697 PCI: 00:1f.6: enabled 0
870 07:49:47.966220 PCI: 00:1f.7: enabled 0
871 07:49:47.969360 CPU_CLUSTER: 0: enabled 1
872 07:49:47.969453 APIC: 00: enabled 1
873 07:49:47.972556 APIC: 01: enabled 1
874 07:49:48.024338 APIC: 07: enabled 1
875 07:49:48.024444 APIC: 03: enabled 1
876 07:49:48.024520 APIC: 04: enabled 1
877 07:49:48.024909 APIC: 06: enabled 1
878 07:49:48.025004 APIC: 02: enabled 1
879 07:49:48.025080 APIC: 05: enabled 1
880 07:49:48.025506 Root Device scanning...
881 07:49:48.025601 scan_static_bus for Root Device
882 07:49:48.026024 DOMAIN: 0000 enabled
883 07:49:48.026120 CPU_CLUSTER: 0 enabled
884 07:49:48.026196 DOMAIN: 0000 scanning...
885 07:49:48.026742
886 07:49:48.026840 PCI: pci_scan_bus for bus 00
887 07:49:48.026916 PCI: 00:00.0 [8086/0000] ops
888 07:49:48.027180 PCI: 00:00.0 [8086/9a12] enabled
889 07:49:48.027258 PCI: 00:02.0 [8086/0000] bus ops
890 07:49:48.027326 PCI: 00:02.0 [8086/9a40] enabled
891 07:49:48.027780 PCI: 00:04.0 [8086/0000] bus ops
892 07:49:48.027875 PCI: 00:04.0 [8086/9a03] enabled
893 07:49:48.067811 PCI: 00:05.0 [8086/9a19] enabled
894 07:49:48.067918 PCI: 00:07.0 [0000/0000] hidden
895 07:49:48.068191 PCI: 00:08.0 [8086/9a11] enabled
896 07:49:48.068270 PCI: 00:0a.0 [8086/9a0d] disabled
897 07:49:48.068340 PCI: 00:0d.0 [8086/0000] bus ops
898 07:49:48.068407 PCI: 00:0d.0 [8086/9a13] enabled
899 07:49:48.068663 PCI: 00:14.0 [8086/0000] bus ops
900 07:49:48.068735 PCI: 00:14.0 [8086/a0ed] enabled
901 07:49:48.068800 PCI: 00:14.2 [8086/a0ef] enabled
902 07:49:48.068864 PCI: 00:14.3 [8086/0000] bus ops
903 07:49:48.069116 PCI: 00:14.3 [8086/a0f0] enabled
904 07:49:48.069186 PCI: 00:15.0 [8086/0000] bus ops
905 07:49:48.071758 PCI: 00:15.0 [8086/a0e8] enabled
906 07:49:48.075000 PCI: 00:15.1 [8086/0000] bus ops
907 07:49:48.075095 PCI: 00:15.1 [8086/a0e9] enabled
908 07:49:48.078326 PCI: 00:15.2 [8086/0000] bus ops
909 07:49:48.081415 PCI: 00:15.2 [8086/a0ea] enabled
910 07:49:48.084636 PCI: 00:15.3 [8086/0000] bus ops
911 07:49:48.088258 PCI: 00:15.3 [8086/a0eb] enabled
912 07:49:48.091352 PCI: 00:16.0 [8086/0000] ops
913 07:49:48.094553 PCI: 00:16.0 [8086/a0e0] enabled
914 07:49:48.098274 PCI: Static device PCI: 00:17.0 not found, disabling it.
915 07:49:48.101380 PCI: 00:19.0 [8086/0000] bus ops
916 07:49:48.104629 PCI: 00:19.0 [8086/a0c5] disabled
917 07:49:48.107903 PCI: 00:19.1 [8086/0000] bus ops
918 07:49:48.111270 PCI: 00:19.1 [8086/a0c6] enabled
919 07:49:48.114653 PCI: 00:1d.0 [8086/0000] bus ops
920 07:49:48.117884 PCI: 00:1d.0 [8086/a0b0] enabled
921 07:49:48.121161 PCI: 00:1e.0 [8086/0000] ops
922 07:49:48.124806 PCI: 00:1e.0 [8086/a0a8] enabled
923 07:49:48.127894 PCI: 00:1e.2 [8086/0000] bus ops
924 07:49:48.131175 PCI: 00:1e.2 [8086/a0aa] enabled
925 07:49:48.134685 PCI: 00:1e.3 [8086/0000] bus ops
926 07:49:48.137910 PCI: 00:1e.3 [8086/a0ab] enabled
927 07:49:48.141129 PCI: 00:1f.0 [8086/0000] bus ops
928 07:49:48.144494 PCI: 00:1f.0 [8086/a087] enabled
929 07:49:48.147640 RTC Init
930 07:49:48.150812 Set power on after power failure.
931 07:49:48.150915 Disabling Deep S3
932 07:49:48.154116 Disabling Deep S3
933 07:49:48.154211 Disabling Deep S4
934 07:49:48.157510 Disabling Deep S4
935 07:49:48.160915 Disabling Deep S5
936 07:49:48.161010 Disabling Deep S5
937 07:49:48.164495 PCI: 00:1f.2 [0000/0000] hidden
938 07:49:48.167570 PCI: 00:1f.3 [8086/0000] bus ops
939 07:49:48.170964 PCI: 00:1f.3 [8086/a0c8] enabled
940 07:49:48.174432 PCI: 00:1f.5 [8086/0000] bus ops
941 07:49:48.177540 PCI: 00:1f.5 [8086/a0a4] enabled
942 07:49:48.180879 PCI: Leftover static devices:
943 07:49:48.180974 PCI: 00:10.2
944 07:49:48.184601 PCI: 00:10.6
945 07:49:48.184696 PCI: 00:10.7
946 07:49:48.187287 PCI: 00:06.0
947 07:49:48.187391 PCI: 00:07.1
948 07:49:48.190550 PCI: 00:07.2
949 07:49:48.190630 PCI: 00:07.3
950 07:49:48.190706 PCI: 00:09.0
951 07:49:48.193995 PCI: 00:0d.1
952 07:49:48.194078 PCI: 00:0d.2
953 07:49:48.197665 PCI: 00:0d.3
954 07:49:48.197743 PCI: 00:0e.0
955 07:49:48.197817 PCI: 00:12.0
956 07:49:48.200850 PCI: 00:12.6
957 07:49:48.200940 PCI: 00:13.0
958 07:49:48.204034 PCI: 00:14.1
959 07:49:48.204119 PCI: 00:16.1
960 07:49:48.204188 PCI: 00:16.2
961 07:49:48.207415 PCI: 00:16.3
962 07:49:48.207502 PCI: 00:16.4
963 07:49:48.211052 PCI: 00:16.5
964 07:49:48.211130 PCI: 00:17.0
965 07:49:48.213757 PCI: 00:19.2
966 07:49:48.213838 PCI: 00:1e.1
967 07:49:48.213913 PCI: 00:1f.1
968 07:49:48.217197 PCI: 00:1f.4
969 07:49:48.217276 PCI: 00:1f.6
970 07:49:48.220594 PCI: 00:1f.7
971 07:49:48.223892 PCI: Check your devicetree.cb.
972 07:49:48.223977 PCI: 00:02.0 scanning...
973 07:49:48.227269 scan_generic_bus for PCI: 00:02.0
974 07:49:48.233728 scan_generic_bus for PCI: 00:02.0 done
975 07:49:48.237157 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
976 07:49:48.240399 PCI: 00:04.0 scanning...
977 07:49:48.243634 scan_generic_bus for PCI: 00:04.0
978 07:49:48.247092 GENERIC: 0.0 enabled
979 07:49:48.250317 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
980 07:49:48.257248 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
981 07:49:48.260521 PCI: 00:0d.0 scanning...
982 07:49:48.263682 scan_static_bus for PCI: 00:0d.0
983 07:49:48.263771 USB0 port 0 enabled
984 07:49:48.266942 USB0 port 0 scanning...
985 07:49:48.270319 scan_static_bus for USB0 port 0
986 07:49:48.274005 USB3 port 0 enabled
987 07:49:48.274095 USB3 port 1 enabled
988 07:49:48.277126 USB3 port 2 disabled
989 07:49:48.280053 USB3 port 3 disabled
990 07:49:48.280134 USB3 port 0 scanning...
991 07:49:48.283581 scan_static_bus for USB3 port 0
992 07:49:48.286850 scan_static_bus for USB3 port 0 done
993 07:49:48.289823
994 07:49:48.293631 scan_bus: bus USB3 port 0 finished in 6 msecs
995 07:49:48.296879 USB3 port 1 scanning...
996 07:49:48.300216 scan_static_bus for USB3 port 1
997 07:49:48.303322 scan_static_bus for USB3 port 1 done
998 07:49:48.306583 scan_bus: bus USB3 port 1 finished in 6 msecs
999 07:49:48.309832 scan_static_bus for USB0 port 0 done
1000 07:49:48.316866 scan_bus: bus USB0 port 0 finished in 43 msecs
1001 07:49:48.320339 scan_static_bus for PCI: 00:0d.0 done
1002 07:49:48.323031 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1003 07:49:48.326526 PCI: 00:14.0 scanning...
1004 07:49:48.330048 scan_static_bus for PCI: 00:14.0
1005 07:49:48.333138 USB0 port 0 enabled
1006 07:49:48.333219 USB0 port 0 scanning...
1007 07:49:48.336278
1008 07:49:48.339900 scan_static_bus for USB0 port 0
1009 07:49:48.339980 USB2 port 0 disabled
1010 07:49:48.343149 USB2 port 1 enabled
1011 07:49:48.343231 USB2 port 2 enabled
1012 07:49:48.346270 USB2 port 3 disabled
1013 07:49:48.349853 USB2 port 4 enabled
1014 07:49:48.349948 USB2 port 5 disabled
1015 07:49:48.353417 USB2 port 6 disabled
1016 07:49:48.355995 USB2 port 7 disabled
1017 07:49:48.356091 USB2 port 8 disabled
1018 07:49:48.359569 USB2 port 9 disabled
1019 07:49:48.363212 USB3 port 0 disabled
1020 07:49:48.363296 USB3 port 1 enabled
1021 07:49:48.366451 USB3 port 2 disabled
1022 07:49:48.366537 USB3 port 3 disabled
1023 07:49:48.370078
1024 07:49:48.370167 USB2 port 1 scanning...
1025 07:49:48.372834 scan_static_bus for USB2 port 1
1026 07:49:48.376527 scan_static_bus for USB2 port 1 done
1027 07:49:48.382752 scan_bus: bus USB2 port 1 finished in 6 msecs
1028 07:49:48.386028 USB2 port 2 scanning...
1029 07:49:48.389496 scan_static_bus for USB2 port 2
1030 07:49:48.392758 scan_static_bus for USB2 port 2 done
1031 07:49:48.396020 scan_bus: bus USB2 port 2 finished in 6 msecs
1032 07:49:48.399246 USB2 port 4 scanning...
1033 07:49:48.402844 scan_static_bus for USB2 port 4
1034 07:49:48.406220 scan_static_bus for USB2 port 4 done
1035 07:49:48.409393 scan_bus: bus USB2 port 4 finished in 6 msecs
1036 07:49:48.412469 USB3 port 1 scanning...
1037 07:49:48.415727 scan_static_bus for USB3 port 1
1038 07:49:48.419076 scan_static_bus for USB3 port 1 done
1039 07:49:48.426031 scan_bus: bus USB3 port 1 finished in 6 msecs
1040 07:49:48.429290 scan_static_bus for USB0 port 0 done
1041 07:49:48.432357 scan_bus: bus USB0 port 0 finished in 93 msecs
1042 07:49:48.435565 scan_static_bus for PCI: 00:14.0 done
1043 07:49:48.442286 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1044 07:49:48.445597 PCI: 00:14.3 scanning...
1045 07:49:48.448866 scan_static_bus for PCI: 00:14.3
1046 07:49:48.448952 GENERIC: 0.0 enabled
1047 07:49:48.452154 scan_static_bus for PCI: 00:14.3 done
1048 07:49:48.458805 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1049 07:49:48.462159 PCI: 00:15.0 scanning...
1050 07:49:48.465872 scan_static_bus for PCI: 00:15.0
1051 07:49:48.465982 I2C: 00:1a enabled
1052 07:49:48.468925 I2C: 00:31 enabled
1053 07:49:48.469020 I2C: 00:32 enabled
1054 07:49:48.472316
1055 07:49:48.475641 scan_static_bus for PCI: 00:15.0 done
1056 07:49:48.479327 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1057 07:49:48.481943 PCI: 00:15.1 scanning...
1058 07:49:48.485709 scan_static_bus for PCI: 00:15.1
1059 07:49:48.488906 I2C: 00:10 enabled
1060 07:49:48.492067 scan_static_bus for PCI: 00:15.1 done
1061 07:49:48.495420 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1062 07:49:48.498713 PCI: 00:15.2 scanning...
1063 07:49:48.502181 scan_static_bus for PCI: 00:15.2
1064 07:49:48.505310 scan_static_bus for PCI: 00:15.2 done
1065 07:49:48.508628 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1066 07:49:48.511796
1067 07:49:48.511891 PCI: 00:15.3 scanning...
1068 07:49:48.515113 scan_static_bus for PCI: 00:15.3
1069 07:49:48.518316 scan_static_bus for PCI: 00:15.3 done
1070 07:49:48.521705
1071 07:49:48.525183 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1072 07:49:48.528483 PCI: 00:19.1 scanning...
1073 07:49:48.531699 scan_static_bus for PCI: 00:19.1
1074 07:49:48.531794 I2C: 00:15 enabled
1075 07:49:48.535228 scan_static_bus for PCI: 00:19.1 done
1076 07:49:48.538070
1077 07:49:48.541704 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1078 07:49:48.544972 PCI: 00:1d.0 scanning...
1079 07:49:48.548174 do_pci_scan_bridge for PCI: 00:1d.0
1080 07:49:48.551475 PCI: pci_scan_bus for bus 01
1081 07:49:48.554946 PCI: 01:00.0 [15b7/5009] enabled
1082 07:49:48.555041 GENERIC: 0.0 enabled
1083 07:49:48.561395 Enabling Common Clock Configuration
1084 07:49:48.564852 L1 Sub-State supported from root port 29
1085 07:49:48.568045 L1 Sub-State Support = 0x5
1086 07:49:48.571433 CommonModeRestoreTime = 0x28
1087 07:49:48.574674 Power On Value = 0x16, Power On Scale = 0x0
1088 07:49:48.574770 ASPM: Enabled L1
1089 07:49:48.581211 PCIe: Max_Payload_Size adjusted to 128
1090 07:49:48.584484 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1091 07:49:48.587585 PCI: 00:1e.2 scanning...
1092 07:49:48.591264 scan_generic_bus for PCI: 00:1e.2
1093 07:49:48.591360 SPI: 00 enabled
1094 07:49:48.597668 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1095 07:49:48.604823 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1096 07:49:48.604920 PCI: 00:1e.3 scanning...
1097 07:49:48.608120 scan_generic_bus for PCI: 00:1e.3
1098 07:49:48.611920 SPI: 00 enabled
1099 07:49:48.618233 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1100 07:49:48.621858 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1101 07:49:48.625033 PCI: 00:1f.0 scanning...
1102 07:49:48.628235 scan_static_bus for PCI: 00:1f.0
1103 07:49:48.631615 PNP: 0c09.0 enabled
1104 07:49:48.631711 PNP: 0c09.0 scanning...
1105 07:49:48.634855 scan_static_bus for PNP: 0c09.0
1106 07:49:48.641645 scan_static_bus for PNP: 0c09.0 done
1107 07:49:48.645031 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1108 07:49:48.647925 scan_static_bus for PCI: 00:1f.0 done
1109 07:49:48.654765 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1110 07:49:48.654862 PCI: 00:1f.2 scanning...
1111 07:49:48.657769 scan_static_bus for PCI: 00:1f.2
1112 07:49:48.661099 GENERIC: 0.0 enabled
1113 07:49:48.664829 GENERIC: 0.0 scanning...
1114 07:49:48.668025 scan_static_bus for GENERIC: 0.0
1115 07:49:48.671186 GENERIC: 0.0 enabled
1116 07:49:48.671282 GENERIC: 1.0 enabled
1117 07:49:48.674643 scan_static_bus for GENERIC: 0.0 done
1118 07:49:48.681559 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1119 07:49:48.684629 scan_static_bus for PCI: 00:1f.2 done
1120 07:49:48.687912 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1121 07:49:48.691369 PCI: 00:1f.3 scanning...
1122 07:49:48.694546 scan_static_bus for PCI: 00:1f.3
1123 07:49:48.697813 scan_static_bus for PCI: 00:1f.3 done
1124 07:49:48.704292 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1125 07:49:48.708022 PCI: 00:1f.5 scanning...
1126 07:49:48.710931 scan_generic_bus for PCI: 00:1f.5
1127 07:49:48.714301 scan_generic_bus for PCI: 00:1f.5 done
1128 07:49:48.717750 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1129 07:49:48.724024 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1130 07:49:48.727863 scan_static_bus for Root Device done
1131 07:49:48.730482 scan_bus: bus Root Device finished in 736 msecs
1132 07:49:48.733933 done
1133 07:49:48.737205 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1134 07:49:48.741137 Chrome EC: UHEPI supported
1135 07:49:48.748081 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1136 07:49:48.754963 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1137 07:49:48.758415 SPI flash protection: WPSW=0 SRP0=1
1138 07:49:48.764923 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1139 07:49:48.768183 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1140 07:49:48.771597 found VGA at PCI: 00:02.0
1141 07:49:48.774881 Setting up VGA for PCI: 00:02.0
1142 07:49:48.781429 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1143 07:49:48.784556 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1144 07:49:48.787801 Allocating resources...
1145 07:49:48.791480 Reading resources...
1146 07:49:48.794898 Root Device read_resources bus 0 link: 0
1147 07:49:48.797699 DOMAIN: 0000 read_resources bus 0 link: 0
1148 07:49:48.804223 PCI: 00:04.0 read_resources bus 1 link: 0
1149 07:49:48.807851 PCI: 00:04.0 read_resources bus 1 link: 0 done
1150 07:49:48.814598 PCI: 00:0d.0 read_resources bus 0 link: 0
1151 07:49:48.818050 USB0 port 0 read_resources bus 0 link: 0
1152 07:49:48.824259 USB0 port 0 read_resources bus 0 link: 0 done
1153 07:49:48.827962 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1154 07:49:48.834151 PCI: 00:14.0 read_resources bus 0 link: 0
1155 07:49:48.837374 USB0 port 0 read_resources bus 0 link: 0
1156 07:49:48.844600 USB0 port 0 read_resources bus 0 link: 0 done
1157 07:49:48.847350 PCI: 00:14.0 read_resources bus 0 link: 0 done
1158 07:49:48.854124 PCI: 00:14.3 read_resources bus 0 link: 0
1159 07:49:48.857481 PCI: 00:14.3 read_resources bus 0 link: 0 done
1160 07:49:48.860390 PCI: 00:15.0 read_resources bus 0 link: 0
1161 07:49:48.867975 PCI: 00:15.0 read_resources bus 0 link: 0 done
1162 07:49:48.871364 PCI: 00:15.1 read_resources bus 0 link: 0
1163 07:49:48.877839 PCI: 00:15.1 read_resources bus 0 link: 0 done
1164 07:49:48.881388 PCI: 00:19.1 read_resources bus 0 link: 0
1165 07:49:48.888493 PCI: 00:19.1 read_resources bus 0 link: 0 done
1166 07:49:48.891820 PCI: 00:1d.0 read_resources bus 1 link: 0
1167 07:49:48.898093 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1168 07:49:48.901215 PCI: 00:1e.2 read_resources bus 2 link: 0
1169 07:49:48.908391 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1170 07:49:48.911794 PCI: 00:1e.3 read_resources bus 3 link: 0
1171 07:49:48.918244 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1172 07:49:48.921393 PCI: 00:1f.0 read_resources bus 0 link: 0
1173 07:49:48.927893 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1174 07:49:48.931214 PCI: 00:1f.2 read_resources bus 0 link: 0
1175 07:49:48.934700 GENERIC: 0.0 read_resources bus 0 link: 0
1176 07:49:48.941955 GENERIC: 0.0 read_resources bus 0 link: 0 done
1177 07:49:48.945131 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1178 07:49:48.952549 DOMAIN: 0000 read_resources bus 0 link: 0 done
1179 07:49:48.955784 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1180 07:49:48.961888 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1181 07:49:48.965678 Root Device read_resources bus 0 link: 0 done
1182 07:49:48.968499 Done reading resources.
1183 07:49:48.975770 Show resources in subtree (Root Device)...After reading.
1184 07:49:48.978609 Root Device child on link 0 DOMAIN: 0000
1185 07:49:48.982335 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1186 07:49:48.992078 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1187 07:49:49.001677 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1188 07:49:49.005014 PCI: 00:00.0
1189 07:49:49.015005 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1190 07:49:49.021829 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1191 07:49:49.031615 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1192 07:49:49.041763 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1193 07:49:49.051351 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1194 07:49:49.061715 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1195 07:49:49.071442 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1196 07:49:49.077872 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1197 07:49:49.088209 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1198 07:49:49.098232 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1199 07:49:49.108036 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1200 07:49:49.117954 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1201 07:49:49.124329 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1202 07:49:49.128061
1203 07:49:49.134708 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1204 07:49:49.144609 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1205 07:49:49.154763 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1206 07:49:49.164495 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1207 07:49:49.174018 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1208 07:49:49.183873 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1209 07:49:49.190409 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1210 07:49:49.194108
1211 07:49:49.194204 PCI: 00:02.0
1212 07:49:49.203843 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1213 07:49:49.213840 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1214 07:49:49.223578 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1215 07:49:49.227141 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1216 07:49:49.237007 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1217 07:49:49.240167 GENERIC: 0.0
1218 07:49:49.240263 PCI: 00:05.0
1219 07:49:49.250635 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1220 07:49:49.256660 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1221 07:49:49.256756 GENERIC: 0.0
1222 07:49:49.260115 PCI: 00:08.0
1223 07:49:49.270015 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 07:49:49.270113 PCI: 00:0a.0
1225 07:49:49.276687 PCI: 00:0d.0 child on link 0 USB0 port 0
1226 07:49:49.286379 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1227 07:49:49.290088 USB0 port 0 child on link 0 USB3 port 0
1228 07:49:49.290185 USB3 port 0
1229 07:49:49.293395 USB3 port 1
1230 07:49:49.293491 USB3 port 2
1231 07:49:49.296769
1232 07:49:49.296866 USB3 port 3
1233 07:49:49.299641 PCI: 00:14.0 child on link 0 USB0 port 0
1234 07:49:49.309696 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1235 07:49:49.316601 USB0 port 0 child on link 0 USB2 port 0
1236 07:49:49.316697 USB2 port 0
1237 07:49:49.319843 USB2 port 1
1238 07:49:49.319939 USB2 port 2
1239 07:49:49.322976 USB2 port 3
1240 07:49:49.323072 USB2 port 4
1241 07:49:49.326323 USB2 port 5
1242 07:49:49.326419 USB2 port 6
1243 07:49:49.329857 USB2 port 7
1244 07:49:49.333029 USB2 port 8
1245 07:49:49.333125 USB2 port 9
1246 07:49:49.336282 USB3 port 0
1247 07:49:49.336378 USB3 port 1
1248 07:49:49.339823 USB3 port 2
1249 07:49:49.339918 USB3 port 3
1250 07:49:49.342940 PCI: 00:14.2
1251 07:49:49.353194 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1252 07:49:49.362730 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1253 07:49:49.365759 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1254 07:49:49.376265 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1255 07:49:49.379100 GENERIC: 0.0
1256 07:49:49.382374 PCI: 00:15.0 child on link 0 I2C: 00:1a
1257 07:49:49.392875 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 07:49:49.392971 I2C: 00:1a
1259 07:49:49.395912 I2C: 00:31
1260 07:49:49.396008 I2C: 00:32
1261 07:49:49.402374 PCI: 00:15.1 child on link 0 I2C: 00:10
1262 07:49:49.412195 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 07:49:49.412293 I2C: 00:10
1264 07:49:49.415748 PCI: 00:15.2
1265 07:49:49.425548 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 07:49:49.425645 PCI: 00:15.3
1267 07:49:49.435215 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1268 07:49:49.438941 PCI: 00:16.0
1269 07:49:49.448977 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1270 07:49:49.449076 PCI: 00:19.0
1271 07:49:49.452167 PCI: 00:19.1 child on link 0 I2C: 00:15
1272 07:49:49.461851 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1273 07:49:49.465183 I2C: 00:15
1274 07:49:49.468857 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1275 07:49:49.478758 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1276 07:49:49.488554 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1277 07:49:49.498594 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1278 07:49:49.498732 GENERIC: 0.0
1279 07:49:49.501696 PCI: 01:00.0
1280 07:49:49.511707 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1281 07:49:49.521655 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1282 07:49:49.521753 PCI: 00:1e.0
1283 07:49:49.535326 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1284 07:49:49.538418 PCI: 00:1e.2 child on link 0 SPI: 00
1285 07:49:49.547958 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1286 07:49:49.548055 SPI: 00
1287 07:49:49.551566 PCI: 00:1e.3 child on link 0 SPI: 00
1288 07:49:49.561048 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1289 07:49:49.564779 SPI: 00
1290 07:49:49.568027 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1291 07:49:49.578083 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1292 07:49:49.578181 PNP: 0c09.0
1293 07:49:49.588065 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1294 07:49:49.591164 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1295 07:49:49.600815 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1296 07:49:49.611056 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1297 07:49:49.614385 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1298 07:49:49.617443 GENERIC: 0.0
1299 07:49:49.617539 GENERIC: 1.0
1300 07:49:49.620817 PCI: 00:1f.3
1301 07:49:49.630491 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1302 07:49:49.640987 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1303 07:49:49.641085 PCI: 00:1f.5
1304 07:49:49.650556 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1305 07:49:49.654336 CPU_CLUSTER: 0 child on link 0 APIC: 00
1306 07:49:49.657158 APIC: 00
1307 07:49:49.657253 APIC: 01
1308 07:49:49.660707 APIC: 07
1309 07:49:49.660803 APIC: 03
1310 07:49:49.660879 APIC: 04
1311 07:49:49.664238 APIC: 06
1312 07:49:49.664334 APIC: 02
1313 07:49:49.667043 APIC: 05
1314 07:49:49.673515 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1315 07:49:49.680682 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1316 07:49:49.683929 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1317 07:49:49.686755
1318 07:49:49.690148 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1319 07:49:49.696692 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1320 07:49:49.699845 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1321 07:49:49.707089 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1322 07:49:49.713471 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1323 07:49:49.723079 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1324 07:49:49.729959 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1325 07:49:49.736282 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1326 07:49:49.742832 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1327 07:49:49.749817 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1328 07:49:49.759969 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1329 07:49:49.760066 DOMAIN: 0000: Resource ranges:
1330 07:49:49.763192
1331 07:49:49.766164 * Base: 1000, Size: 800, Tag: 100
1332 07:49:49.769540 * Base: 1900, Size: e700, Tag: 100
1333 07:49:49.772893 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1334 07:49:49.779378 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1335 07:49:49.786088 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1336 07:49:49.796142 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1337 07:49:49.803052 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1338 07:49:49.809482 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1339 07:49:49.819143 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1340 07:49:49.826316 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1341 07:49:49.832604 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1342 07:49:49.842790 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1343 07:49:49.849245 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1344 07:49:49.855493 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1345 07:49:49.865653 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1346 07:49:49.872328 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1347 07:49:49.878825 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1348 07:49:49.888845 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1349 07:49:49.895330 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1350 07:49:49.901936 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1351 07:49:49.908694 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1352 07:49:49.912413
1353 07:49:49.918638 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1354 07:49:49.925446 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1355 07:49:49.935175 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1356 07:49:49.942171 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1357 07:49:49.948683 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1358 07:49:49.955346 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1359 07:49:49.958370
1360 07:49:49.958466 DOMAIN: 0000: Resource ranges:
1361 07:49:49.965067 * Base: 7fc00000, Size: 40400000, Tag: 200
1362 07:49:49.968570 * Base: d0000000, Size: 28000000, Tag: 200
1363 07:49:49.971694 * Base: fa000000, Size: 1000000, Tag: 200
1364 07:49:49.978552 * Base: fb001000, Size: 2fff000, Tag: 200
1365 07:49:49.981794 * Base: fe010000, Size: 2e000, Tag: 200
1366 07:49:49.985188 * Base: fe03f000, Size: d41000, Tag: 200
1367 07:49:49.988579 * Base: fed88000, Size: 8000, Tag: 200
1368 07:49:49.995178 * Base: fed93000, Size: d000, Tag: 200
1369 07:49:49.998618 * Base: feda2000, Size: 1e000, Tag: 200
1370 07:49:50.001555 * Base: fede0000, Size: 1220000, Tag: 200
1371 07:49:50.008089 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1372 07:49:50.014793 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1373 07:49:50.021350 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1374 07:49:50.028178 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1375 07:49:50.034973 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1376 07:49:50.041801 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1377 07:49:50.048008 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1378 07:49:50.054699 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1379 07:49:50.061371 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1380 07:49:50.067691 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1381 07:49:50.074433 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1382 07:49:50.081130 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1383 07:49:50.087880 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1384 07:49:50.094279 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1385 07:49:50.100998 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1386 07:49:50.107563 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1387 07:49:50.114381 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1388 07:49:50.120924 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1389 07:49:50.127589 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1390 07:49:50.134294 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1391 07:49:50.140838 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1392 07:49:50.147305 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1393 07:49:50.154238 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1394 07:49:50.160650 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1395 07:49:50.167899 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1396 07:49:50.170638 PCI: 00:1d.0: Resource ranges:
1397 07:49:50.177543 * Base: 7fc00000, Size: 100000, Tag: 200
1398 07:49:50.183981 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1399 07:49:50.190540 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1400 07:49:50.198562 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1401 07:49:50.204325 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1402 07:49:50.210559 Root Device assign_resources, bus 0 link: 0
1403 07:49:50.213814 DOMAIN: 0000 assign_resources, bus 0 link: 0
1404 07:49:50.223627 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1405 07:49:50.230128 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1406 07:49:50.236929 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1407 07:49:50.240338
1408 07:49:50.247146 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1409 07:49:50.249815 PCI: 00:04.0 assign_resources, bus 1 link: 0
1410 07:49:50.256987 PCI: 00:04.0 assign_resources, bus 1 link: 0
1411 07:49:50.263382 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1412 07:49:50.273169 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1413 07:49:50.279606 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1414 07:49:50.286278 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1415 07:49:50.289860 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1416 07:49:50.299768 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1417 07:49:50.303223 PCI: 00:14.0 assign_resources, bus 0 link: 0
1418 07:49:50.306496 PCI: 00:14.0 assign_resources, bus 0 link: 0
1419 07:49:50.316762 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1420 07:49:50.322576 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1421 07:49:50.333102 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1422 07:49:50.336304 PCI: 00:14.3 assign_resources, bus 0 link: 0
1423 07:49:50.343018 PCI: 00:14.3 assign_resources, bus 0 link: 0
1424 07:49:50.349158 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1425 07:49:50.352242 PCI: 00:15.0 assign_resources, bus 0 link: 0
1426 07:49:50.359235 PCI: 00:15.0 assign_resources, bus 0 link: 0
1427 07:49:50.365858 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1428 07:49:50.372121 PCI: 00:15.1 assign_resources, bus 0 link: 0
1429 07:49:50.375683 PCI: 00:15.1 assign_resources, bus 0 link: 0
1430 07:49:50.385860 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1431 07:49:50.391905 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1432 07:49:50.402252 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1433 07:49:50.408853 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1434 07:49:50.412346 PCI: 00:19.1 assign_resources, bus 0 link: 0
1435 07:49:50.418659 PCI: 00:19.1 assign_resources, bus 0 link: 0
1436 07:49:50.425646 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1437 07:49:50.435355 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1438 07:49:50.445500 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1439 07:49:50.448540 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1440 07:49:50.458728 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1441 07:49:50.465056 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1442 07:49:50.471659 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1443 07:49:50.478230 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1444 07:49:50.484755 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1445 07:49:50.488220 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1446 07:49:50.498471 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1447 07:49:50.501815 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1448 07:49:50.504714 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1449 07:49:50.511748 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1450 07:49:50.514719 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1451 07:49:50.521733 LPC: Trying to open IO window from 800 size 1ff
1452 07:49:50.527879 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1453 07:49:50.537887 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1454 07:49:50.544558 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1455 07:49:50.550952 DOMAIN: 0000 assign_resources, bus 0 link: 0
1456 07:49:50.554752 Root Device assign_resources, bus 0 link: 0
1457 07:49:50.557980 Done setting resources.
1458 07:49:50.564529 Show resources in subtree (Root Device)...After assigning values.
1459 07:49:50.567817 Root Device child on link 0 DOMAIN: 0000
1460 07:49:50.571211 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1461 07:49:50.581201 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1462 07:49:50.590953 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1463 07:49:50.591048 PCI: 00:00.0
1464 07:49:50.594439
1465 07:49:50.600726 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1466 07:49:50.610845 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1467 07:49:50.620607 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1468 07:49:50.630879 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1469 07:49:50.640500 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1470 07:49:50.650599 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1471 07:49:50.657190 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1472 07:49:50.667210 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1473 07:49:50.677422 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1474 07:49:50.686970 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1475 07:49:50.696858 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1476 07:49:50.706940 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1477 07:49:50.713522 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1478 07:49:50.723419 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1479 07:49:50.733656 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1480 07:49:50.743211 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1481 07:49:50.753376 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1482 07:49:50.763283 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1483 07:49:50.770185 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1484 07:49:50.779651 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1485 07:49:50.783296 PCI: 00:02.0
1486 07:49:50.793449 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1487 07:49:50.803166 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1488 07:49:50.813253 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1489 07:49:50.816535 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1490 07:49:50.829984 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1491 07:49:50.830081 GENERIC: 0.0
1492 07:49:50.832788 PCI: 00:05.0
1493 07:49:50.842823 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1494 07:49:50.846052 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1495 07:49:50.849343 GENERIC: 0.0
1496 07:49:50.849437 PCI: 00:08.0
1497 07:49:50.859551 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1498 07:49:50.862812 PCI: 00:0a.0
1499 07:49:50.865909 PCI: 00:0d.0 child on link 0 USB0 port 0
1500 07:49:50.876026 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1501 07:49:50.882639 USB0 port 0 child on link 0 USB3 port 0
1502 07:49:50.882728 USB3 port 0
1503 07:49:50.885681 USB3 port 1
1504 07:49:50.885760 USB3 port 2
1505 07:49:50.889311 USB3 port 3
1506 07:49:50.892629 PCI: 00:14.0 child on link 0 USB0 port 0
1507 07:49:50.902178 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1508 07:49:50.908980 USB0 port 0 child on link 0 USB2 port 0
1509 07:49:50.909080 USB2 port 0
1510 07:49:50.912157 USB2 port 1
1511 07:49:50.912239 USB2 port 2
1512 07:49:50.915310 USB2 port 3
1513 07:49:50.915390 USB2 port 4
1514 07:49:50.918945 USB2 port 5
1515 07:49:50.919029 USB2 port 6
1516 07:49:50.922370 USB2 port 7
1517 07:49:50.922472 USB2 port 8
1518 07:49:50.925736 USB2 port 9
1519 07:49:50.925830 USB3 port 0
1520 07:49:50.929150 USB3 port 1
1521 07:49:50.929244 USB3 port 2
1522 07:49:50.932454 USB3 port 3
1523 07:49:50.932548 PCI: 00:14.2
1524 07:49:50.935537
1525 07:49:50.945552 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1526 07:49:50.955159 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1527 07:49:50.958564 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1528 07:49:50.969070 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1529 07:49:50.971678 GENERIC: 0.0
1530 07:49:50.975498 PCI: 00:15.0 child on link 0 I2C: 00:1a
1531 07:49:50.985243 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1532 07:49:50.988602 I2C: 00:1a
1533 07:49:50.988697 I2C: 00:31
1534 07:49:50.991689 I2C: 00:32
1535 07:49:50.995223 PCI: 00:15.1 child on link 0 I2C: 00:10
1536 07:49:51.005682 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1537 07:49:51.005779 I2C: 00:10
1538 07:49:51.008510 PCI: 00:15.2
1539 07:49:51.018401 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1540 07:49:51.021714 PCI: 00:15.3
1541 07:49:51.031896 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1542 07:49:51.031992 PCI: 00:16.0
1543 07:49:51.041680 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1544 07:49:51.045015 PCI: 00:19.0
1545 07:49:51.048112 PCI: 00:19.1 child on link 0 I2C: 00:15
1546 07:49:51.058443 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1547 07:49:51.061507 I2C: 00:15
1548 07:49:51.065025 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1549 07:49:51.075219 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1550 07:49:51.084774 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1551 07:49:51.098038 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1552 07:49:51.098137 GENERIC: 0.0
1553 07:49:51.101117 PCI: 01:00.0
1554 07:49:51.111260 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1555 07:49:51.121232 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1556 07:49:51.121329 PCI: 00:1e.0
1557 07:49:51.134347 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1558 07:49:51.137643 PCI: 00:1e.2 child on link 0 SPI: 00
1559 07:49:51.147579 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1560 07:49:51.147675 SPI: 00
1561 07:49:51.154392 PCI: 00:1e.3 child on link 0 SPI: 00
1562 07:49:51.164205 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1563 07:49:51.164303 SPI: 00
1564 07:49:51.167825 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1565 07:49:51.177403 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1566 07:49:51.180821 PNP: 0c09.0
1567 07:49:51.187836 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1568 07:49:51.194414 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1569 07:49:51.200834 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1570 07:49:51.210611 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1571 07:49:51.217644 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1572 07:49:51.217742 GENERIC: 0.0
1573 07:49:51.220930 GENERIC: 1.0
1574 07:49:51.221028 PCI: 00:1f.3
1575 07:49:51.230990 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1576 07:49:51.240420 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1577 07:49:51.243906 PCI: 00:1f.5
1578 07:49:51.254084 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1579 07:49:51.257364 CPU_CLUSTER: 0 child on link 0 APIC: 00
1580 07:49:51.260401 APIC: 00
1581 07:49:51.260499 APIC: 01
1582 07:49:51.263707 APIC: 07
1583 07:49:51.263803 APIC: 03
1584 07:49:51.263879 APIC: 04
1585 07:49:51.267215 APIC: 06
1586 07:49:51.267310 APIC: 02
1587 07:49:51.267389 APIC: 05
1588 07:49:51.270368 Done allocating resources.
1589 07:49:51.276743 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1590 07:49:51.283740 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1591 07:49:51.286533 Configure GPIOs for I2S audio on UP4.
1592 07:49:51.294013 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1593 07:49:51.296800 Enabling resources...
1594 07:49:51.300344 PCI: 00:00.0 subsystem <- 8086/9a12
1595 07:49:51.303388 PCI: 00:00.0 cmd <- 06
1596 07:49:51.306637 PCI: 00:02.0 subsystem <- 8086/9a40
1597 07:49:51.310285 PCI: 00:02.0 cmd <- 03
1598 07:49:51.313588 PCI: 00:04.0 subsystem <- 8086/9a03
1599 07:49:51.316851 PCI: 00:04.0 cmd <- 02
1600 07:49:51.320096 PCI: 00:05.0 subsystem <- 8086/9a19
1601 07:49:51.320193 PCI: 00:05.0 cmd <- 02
1602 07:49:51.326747 PCI: 00:08.0 subsystem <- 8086/9a11
1603 07:49:51.326843 PCI: 00:08.0 cmd <- 06
1604 07:49:51.330096 PCI: 00:0d.0 subsystem <- 8086/9a13
1605 07:49:51.333106 PCI: 00:0d.0 cmd <- 02
1606 07:49:51.336535 PCI: 00:14.0 subsystem <- 8086/a0ed
1607 07:49:51.339725 PCI: 00:14.0 cmd <- 02
1608 07:49:51.343127 PCI: 00:14.2 subsystem <- 8086/a0ef
1609 07:49:51.346608 PCI: 00:14.2 cmd <- 02
1610 07:49:51.349738 PCI: 00:14.3 subsystem <- 8086/a0f0
1611 07:49:51.353402 PCI: 00:14.3 cmd <- 02
1612 07:49:51.356540 PCI: 00:15.0 subsystem <- 8086/a0e8
1613 07:49:51.359765 PCI: 00:15.0 cmd <- 02
1614 07:49:51.363125 PCI: 00:15.1 subsystem <- 8086/a0e9
1615 07:49:51.366212 PCI: 00:15.1 cmd <- 02
1616 07:49:51.369770 PCI: 00:15.2 subsystem <- 8086/a0ea
1617 07:49:51.369866 PCI: 00:15.2 cmd <- 02
1618 07:49:51.376379 PCI: 00:15.3 subsystem <- 8086/a0eb
1619 07:49:51.376469 PCI: 00:15.3 cmd <- 02
1620 07:49:51.379861 PCI: 00:16.0 subsystem <- 8086/a0e0
1621 07:49:51.383077 PCI: 00:16.0 cmd <- 02
1622 07:49:51.386490 PCI: 00:19.1 subsystem <- 8086/a0c6
1623 07:49:51.389433 PCI: 00:19.1 cmd <- 02
1624 07:49:51.392923 PCI: 00:1d.0 bridge ctrl <- 0013
1625 07:49:51.396215 PCI: 00:1d.0 subsystem <- 8086/a0b0
1626 07:49:51.399349 PCI: 00:1d.0 cmd <- 06
1627 07:49:51.402750 PCI: 00:1e.0 subsystem <- 8086/a0a8
1628 07:49:51.406163 PCI: 00:1e.0 cmd <- 06
1629 07:49:51.409507 PCI: 00:1e.2 subsystem <- 8086/a0aa
1630 07:49:51.412833 PCI: 00:1e.2 cmd <- 06
1631 07:49:51.415999 PCI: 00:1e.3 subsystem <- 8086/a0ab
1632 07:49:51.419331 PCI: 00:1e.3 cmd <- 02
1633 07:49:51.422562 PCI: 00:1f.0 subsystem <- 8086/a087
1634 07:49:51.422656 PCI: 00:1f.0 cmd <- 407
1635 07:49:51.429345 PCI: 00:1f.3 subsystem <- 8086/a0c8
1636 07:49:51.429440 PCI: 00:1f.3 cmd <- 02
1637 07:49:51.432702 PCI: 00:1f.5 subsystem <- 8086/a0a4
1638 07:49:51.435898 PCI: 00:1f.5 cmd <- 406
1639 07:49:51.440669 PCI: 01:00.0 cmd <- 02
1640 07:49:51.445245 done.
1641 07:49:51.448752 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1642 07:49:51.451680 Initializing devices...
1643 07:49:51.454999 Root Device init
1644 07:49:51.458349 Chrome EC: Set SMI mask to 0x0000000000000000
1645 07:49:51.465212 Chrome EC: clear events_b mask to 0x0000000000000000
1646 07:49:51.471555 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1647 07:49:51.475120 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1648 07:49:51.481478 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1649 07:49:51.488054 Chrome EC: Set WAKE mask to 0x0000000000000000
1650 07:49:51.491543 fw_config match found: DB_USB=USB3_ACTIVE
1651 07:49:51.498135 Configure Right Type-C port orientation for retimer
1652 07:49:51.501356 Root Device init finished in 43 msecs
1653 07:49:51.504840 PCI: 00:00.0 init
1654 07:49:51.508345 CPU TDP = 9 Watts
1655 07:49:51.508438 CPU PL1 = 9 Watts
1656 07:49:51.511498 CPU PL2 = 40 Watts
1657 07:49:51.511593 CPU PL4 = 83 Watts
1658 07:49:51.517908 PCI: 00:00.0 init finished in 8 msecs
1659 07:49:51.518004 PCI: 00:02.0 init
1660 07:49:51.521172 GMA: Found VBT in CBFS
1661 07:49:51.525016 GMA: Found valid VBT in CBFS
1662 07:49:51.531121 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1663 07:49:51.537796 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1664 07:49:51.541162 PCI: 00:02.0 init finished in 18 msecs
1665 07:49:51.544325 PCI: 00:05.0 init
1666 07:49:51.547746 PCI: 00:05.0 init finished in 0 msecs
1667 07:49:51.551027 PCI: 00:08.0 init
1668 07:49:51.554378 PCI: 00:08.0 init finished in 0 msecs
1669 07:49:51.557731 PCI: 00:14.0 init
1670 07:49:51.560981 PCI: 00:14.0 init finished in 0 msecs
1671 07:49:51.561076 PCI: 00:14.2 init
1672 07:49:51.567550 PCI: 00:14.2 init finished in 0 msecs
1673 07:49:51.567645 PCI: 00:15.0 init
1674 07:49:51.570876 I2C bus 0 version 0x3230302a
1675 07:49:51.574257 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1676 07:49:51.580727 PCI: 00:15.0 init finished in 6 msecs
1677 07:49:51.580822 PCI: 00:15.1 init
1678 07:49:51.584344 I2C bus 1 version 0x3230302a
1679 07:49:51.587761 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1680 07:49:51.590604 PCI: 00:15.1 init finished in 6 msecs
1681 07:49:51.594297 PCI: 00:15.2 init
1682 07:49:51.597363 I2C bus 2 version 0x3230302a
1683 07:49:51.600643 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1684 07:49:51.604072 PCI: 00:15.2 init finished in 6 msecs
1685 07:49:51.607430 PCI: 00:15.3 init
1686 07:49:51.610739 I2C bus 3 version 0x3230302a
1687 07:49:51.614115 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1688 07:49:51.617427 PCI: 00:15.3 init finished in 6 msecs
1689 07:49:51.620525 PCI: 00:16.0 init
1690 07:49:51.624011 PCI: 00:16.0 init finished in 0 msecs
1691 07:49:51.627306 PCI: 00:19.1 init
1692 07:49:51.627401 I2C bus 5 version 0x3230302a
1693 07:49:51.633878 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1694 07:49:51.637228 PCI: 00:19.1 init finished in 6 msecs
1695 07:49:51.637323 PCI: 00:1d.0 init
1696 07:49:51.640427 Initializing PCH PCIe bridge.
1697 07:49:51.643923 PCI: 00:1d.0 init finished in 3 msecs
1698 07:49:51.647904 PCI: 00:1f.0 init
1699 07:49:51.651712 IOAPIC: Initializing IOAPIC at 0xfec00000
1700 07:49:51.657941 IOAPIC: Bootstrap Processor Local APIC = 0x00
1701 07:49:51.658036 IOAPIC: ID = 0x02
1702 07:49:51.661702 IOAPIC: Dumping registers
1703 07:49:51.664669 reg 0x0000: 0x02000000
1704 07:49:51.668098 reg 0x0001: 0x00770020
1705 07:49:51.668194 reg 0x0002: 0x00000000
1706 07:49:51.674557 PCI: 00:1f.0 init finished in 21 msecs
1707 07:49:51.674652 PCI: 00:1f.2 init
1708 07:49:51.677697 Disabling ACPI via APMC.
1709 07:49:51.681154 APMC done.
1710 07:49:51.684643 PCI: 00:1f.2 init finished in 5 msecs
1711 07:49:51.695820 PCI: 01:00.0 init
1712 07:49:51.698895 PCI: 01:00.0 init finished in 0 msecs
1713 07:49:51.702147 PNP: 0c09.0 init
1714 07:49:51.705616 Google Chrome EC uptime: 8.258 seconds
1715 07:49:51.712337 Google Chrome AP resets since EC boot: 1
1716 07:49:51.715703 Google Chrome most recent AP reset causes:
1717 07:49:51.718659 0.451: 32775 shutdown: entering G3
1718 07:49:51.725645 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1719 07:49:51.728981 PNP: 0c09.0 init finished in 22 msecs
1720 07:49:51.734575 Devices initialized
1721 07:49:51.737508 Show all devs... After init.
1722 07:49:51.740753 Root Device: enabled 1
1723 07:49:51.740848 DOMAIN: 0000: enabled 1
1724 07:49:51.744729 CPU_CLUSTER: 0: enabled 1
1725 07:49:51.747272 PCI: 00:00.0: enabled 1
1726 07:49:51.750779 PCI: 00:02.0: enabled 1
1727 07:49:51.750874 PCI: 00:04.0: enabled 1
1728 07:49:51.754113 PCI: 00:05.0: enabled 1
1729 07:49:51.758117 PCI: 00:06.0: enabled 0
1730 07:49:51.761044 PCI: 00:07.0: enabled 0
1731 07:49:51.761139 PCI: 00:07.1: enabled 0
1732 07:49:51.764260 PCI: 00:07.2: enabled 0
1733 07:49:51.767609 PCI: 00:07.3: enabled 0
1734 07:49:51.770993 PCI: 00:08.0: enabled 1
1735 07:49:51.771087 PCI: 00:09.0: enabled 0
1736 07:49:51.774074 PCI: 00:0a.0: enabled 0
1737 07:49:51.777372 PCI: 00:0d.0: enabled 1
1738 07:49:51.777468 PCI: 00:0d.1: enabled 0
1739 07:49:51.780885
1740 07:49:51.780980 PCI: 00:0d.2: enabled 0
1741 07:49:51.783912 PCI: 00:0d.3: enabled 0
1742 07:49:51.787345 PCI: 00:0e.0: enabled 0
1743 07:49:51.787439 PCI: 00:10.2: enabled 1
1744 07:49:51.790491 PCI: 00:10.6: enabled 0
1745 07:49:51.793976 PCI: 00:10.7: enabled 0
1746 07:49:51.797302 PCI: 00:12.0: enabled 0
1747 07:49:51.797397 PCI: 00:12.6: enabled 0
1748 07:49:51.800590 PCI: 00:13.0: enabled 0
1749 07:49:51.803863 PCI: 00:14.0: enabled 1
1750 07:49:51.807328 PCI: 00:14.1: enabled 0
1751 07:49:51.807423 PCI: 00:14.2: enabled 1
1752 07:49:51.810568 PCI: 00:14.3: enabled 1
1753 07:49:51.813985 PCI: 00:15.0: enabled 1
1754 07:49:51.817316 PCI: 00:15.1: enabled 1
1755 07:49:51.817411 PCI: 00:15.2: enabled 1
1756 07:49:51.820336 PCI: 00:15.3: enabled 1
1757 07:49:51.823906 PCI: 00:16.0: enabled 1
1758 07:49:51.824001 PCI: 00:16.1: enabled 0
1759 07:49:51.826946 PCI: 00:16.2: enabled 0
1760 07:49:51.830548 PCI: 00:16.3: enabled 0
1761 07:49:51.833698 PCI: 00:16.4: enabled 0
1762 07:49:51.833793 PCI: 00:16.5: enabled 0
1763 07:49:51.837115 PCI: 00:17.0: enabled 0
1764 07:49:51.840309 PCI: 00:19.0: enabled 0
1765 07:49:51.843750 PCI: 00:19.1: enabled 1
1766 07:49:51.843844 PCI: 00:19.2: enabled 0
1767 07:49:51.846994 PCI: 00:1c.0: enabled 1
1768 07:49:51.850672 PCI: 00:1c.1: enabled 0
1769 07:49:51.853789 PCI: 00:1c.2: enabled 0
1770 07:49:51.853884 PCI: 00:1c.3: enabled 0
1771 07:49:51.857100 PCI: 00:1c.4: enabled 0
1772 07:49:51.860520 PCI: 00:1c.5: enabled 0
1773 07:49:51.860616 PCI: 00:1c.6: enabled 1
1774 07:49:51.863885
1775 07:49:51.863980 PCI: 00:1c.7: enabled 0
1776 07:49:51.867024 PCI: 00:1d.0: enabled 1
1777 07:49:51.870245 PCI: 00:1d.1: enabled 0
1778 07:49:51.870340 PCI: 00:1d.2: enabled 1
1779 07:49:51.873713 PCI: 00:1d.3: enabled 0
1780 07:49:51.877148 PCI: 00:1e.0: enabled 1
1781 07:49:51.880535 PCI: 00:1e.1: enabled 0
1782 07:49:51.880629 PCI: 00:1e.2: enabled 1
1783 07:49:51.883284 PCI: 00:1e.3: enabled 1
1784 07:49:51.886771 PCI: 00:1f.0: enabled 1
1785 07:49:51.890261 PCI: 00:1f.1: enabled 0
1786 07:49:51.890355 PCI: 00:1f.2: enabled 1
1787 07:49:51.893732 PCI: 00:1f.3: enabled 1
1788 07:49:51.896621 PCI: 00:1f.4: enabled 0
1789 07:49:51.900170 PCI: 00:1f.5: enabled 1
1790 07:49:51.900270 PCI: 00:1f.6: enabled 0
1791 07:49:51.903401 PCI: 00:1f.7: enabled 0
1792 07:49:51.906906 APIC: 00: enabled 1
1793 07:49:51.907000 GENERIC: 0.0: enabled 1
1794 07:49:51.910343 GENERIC: 0.0: enabled 1
1795 07:49:51.913142 GENERIC: 1.0: enabled 1
1796 07:49:51.916614 GENERIC: 0.0: enabled 1
1797 07:49:51.916709 GENERIC: 1.0: enabled 1
1798 07:49:51.919967 USB0 port 0: enabled 1
1799 07:49:51.923300 GENERIC: 0.0: enabled 1
1800 07:49:51.923395 USB0 port 0: enabled 1
1801 07:49:51.926566 GENERIC: 0.0: enabled 1
1802 07:49:51.930196 I2C: 00:1a: enabled 1
1803 07:49:51.933597 I2C: 00:31: enabled 1
1804 07:49:51.933692 I2C: 00:32: enabled 1
1805 07:49:51.936911 I2C: 00:10: enabled 1
1806 07:49:51.940096 I2C: 00:15: enabled 1
1807 07:49:51.940191 GENERIC: 0.0: enabled 0
1808 07:49:51.943449 GENERIC: 1.0: enabled 0
1809 07:49:51.946432 GENERIC: 0.0: enabled 1
1810 07:49:51.946527 SPI: 00: enabled 1
1811 07:49:51.950207 SPI: 00: enabled 1
1812 07:49:51.953292 PNP: 0c09.0: enabled 1
1813 07:49:51.953387 GENERIC: 0.0: enabled 1
1814 07:49:51.956572 USB3 port 0: enabled 1
1815 07:49:51.959768 USB3 port 1: enabled 1
1816 07:49:51.963453 USB3 port 2: enabled 0
1817 07:49:51.963547 USB3 port 3: enabled 0
1818 07:49:51.966603 USB2 port 0: enabled 0
1819 07:49:51.969834 USB2 port 1: enabled 1
1820 07:49:51.969936 USB2 port 2: enabled 1
1821 07:49:51.973803 USB2 port 3: enabled 0
1822 07:49:51.976620 USB2 port 4: enabled 1
1823 07:49:51.976716 USB2 port 5: enabled 0
1824 07:49:51.979911 USB2 port 6: enabled 0
1825 07:49:51.983127 USB2 port 7: enabled 0
1826 07:49:51.986248 USB2 port 8: enabled 0
1827 07:49:51.986343 USB2 port 9: enabled 0
1828 07:49:51.989929 USB3 port 0: enabled 0
1829 07:49:51.993167 USB3 port 1: enabled 1
1830 07:49:51.993269 USB3 port 2: enabled 0
1831 07:49:51.996315 USB3 port 3: enabled 0
1832 07:49:51.999807 GENERIC: 0.0: enabled 1
1833 07:49:52.003089 GENERIC: 1.0: enabled 1
1834 07:49:52.003184 APIC: 01: enabled 1
1835 07:49:52.006197 APIC: 07: enabled 1
1836 07:49:52.006292 APIC: 03: enabled 1
1837 07:49:52.009579 APIC: 04: enabled 1
1838 07:49:52.012857 APIC: 06: enabled 1
1839 07:49:52.012953 APIC: 02: enabled 1
1840 07:49:52.016501 APIC: 05: enabled 1
1841 07:49:52.019692 PCI: 01:00.0: enabled 1
1842 07:49:52.022874 BS: BS_DEV_INIT run times (exec / console): 28 / 540 ms
1843 07:49:52.029640 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1844 07:49:52.033091 ELOG: NV offset 0xf30000 size 0x1000
1845 07:49:52.039574 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1846 07:49:52.046232 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:51 UTC
1847 07:49:52.052689 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:51 UTC
1848 07:49:52.059130 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:51 UTC
1849 07:49:52.066017 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:51 UTC
1850 07:49:52.072154 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:51 UTC
1851 07:49:52.079187 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1852 07:49:52.082504 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:51 UTC
1853 07:49:52.085665
1854 07:49:52.092375 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1855 07:49:52.098868 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:51 UTC
1856 07:49:52.102044 elog_add_boot_reason: Logged dev mode boot
1857 07:49:52.108964 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1858 07:49:52.109058 Finalize devices...
1859 07:49:52.112399 Devices finalized
1860 07:49:52.118690 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1861 07:49:52.122045 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1862 07:49:52.128464 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1863 07:49:52.132210 ME: HFSTS1 : 0x80030055
1864 07:49:52.138324 ME: HFSTS2 : 0x30280116
1865 07:49:52.142236 ME: HFSTS3 : 0x00000050
1866 07:49:52.145038 ME: HFSTS4 : 0x00004000
1867 07:49:52.152122 ME: HFSTS5 : 0x00000000
1868 07:49:52.155461 ME: HFSTS6 : 0x40400006
1869 07:49:52.158336 ME: Manufacturing Mode : YES
1870 07:49:52.161875 ME: SPI Protection Mode Enabled : NO
1871 07:49:52.168286 ME: FW Partition Table : OK
1872 07:49:52.171737 ME: Bringup Loader Failure : NO
1873 07:49:52.175373 ME: Firmware Init Complete : NO
1874 07:49:52.178163 ME: Boot Options Present : NO
1875 07:49:52.181715 ME: Update In Progress : NO
1876 07:49:52.185257 ME: D0i3 Support : YES
1877 07:49:52.188661 ME: Low Power State Enabled : NO
1878 07:49:52.191522 ME: CPU Replaced : YES
1879 07:49:52.198652 ME: CPU Replacement Valid : YES
1880 07:49:52.201829 ME: Current Working State : 5
1881 07:49:52.204832 ME: Current Operation State : 1
1882 07:49:52.208711 ME: Current Operation Mode : 3
1883 07:49:52.211710 ME: Error Code : 0
1884 07:49:52.214930 ME: Enhanced Debug Mode : NO
1885 07:49:52.217937 ME: CPU Debug Disabled : YES
1886 07:49:52.221584 ME: TXT Support : NO
1887 07:49:52.228287 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1888 07:49:52.234412 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1889 07:49:52.237844 CBFS: 'fallback/slic' not found.
1890 07:49:52.244535 ACPI: Writing ACPI tables at 76b01000.
1891 07:49:52.244631 ACPI: * FACS
1892 07:49:52.247768 ACPI: * DSDT
1893 07:49:52.251512 Ramoops buffer: 0x100000@0x76a00000.
1894 07:49:52.254474 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1895 07:49:52.260884 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1896 07:49:52.264838 Google Chrome EC: version:
1897 07:49:52.267727 ro: voema_v2.0.10114-a447f03e46
1898 07:49:52.270932 rw: voema_v2.0.10114-a447f03e46
1899 07:49:52.271028 running image: 2
1900 07:49:52.277566 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1901 07:49:52.282749 ACPI: * FADT
1902 07:49:52.282844 SCI is IRQ9
1903 07:49:52.285752 ACPI: added table 1/32, length now 40
1904 07:49:52.288843
1905 07:49:52.288938 ACPI: * SSDT
1906 07:49:52.292347 Found 1 CPU(s) with 8 core(s) each.
1907 07:49:52.299169 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1908 07:49:52.302501 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1909 07:49:52.305140 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1910 07:49:52.308678 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1911 07:49:52.315096 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1912 07:49:52.322178 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1913 07:49:52.324956 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1914 07:49:52.331847 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1915 07:49:52.338689 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1916 07:49:52.341972 \_SB.PCI0.RP09: Added StorageD3Enable property
1917 07:49:52.348608 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1918 07:49:52.351838 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1919 07:49:52.358442 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1920 07:49:52.361492 PS2K: Passing 80 keymaps to kernel
1921 07:49:52.368368 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1922 07:49:52.375223 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1923 07:49:52.381781 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1924 07:49:52.388486 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1925 07:49:52.394857 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1926 07:49:52.401307 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1927 07:49:52.408271 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1928 07:49:52.414917 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1929 07:49:52.417813 ACPI: added table 2/32, length now 44
1930 07:49:52.417915 ACPI: * MCFG
1931 07:49:52.424632 ACPI: added table 3/32, length now 48
1932 07:49:52.424731 ACPI: * TPM2
1933 07:49:52.428315 TPM2 log created at 0x769f0000
1934 07:49:52.431360 ACPI: added table 4/32, length now 52
1935 07:49:52.434725 ACPI: * MADT
1936 07:49:52.434819 SCI is IRQ9
1937 07:49:52.437939 ACPI: added table 5/32, length now 56
1938 07:49:52.441215 current = 76b09850
1939 07:49:52.441309 ACPI: * DMAR
1940 07:49:52.444676 ACPI: added table 6/32, length now 60
1941 07:49:52.447901
1942 07:49:52.451179 ACPI: added table 7/32, length now 64
1943 07:49:52.451273 ACPI: * HPET
1944 07:49:52.454269 ACPI: added table 8/32, length now 68
1945 07:49:52.457463 ACPI: done.
1946 07:49:52.457557 ACPI tables: 35216 bytes.
1947 07:49:52.461201 smbios_write_tables: 769ef000
1948 07:49:52.464646 EC returned error result code 3
1949 07:49:52.467613 Couldn't obtain OEM name from CBI
1950 07:49:52.472247 Create SMBIOS type 16
1951 07:49:52.475659 Create SMBIOS type 17
1952 07:49:52.479393 GENERIC: 0.0 (WIFI Device)
1953 07:49:52.479489 SMBIOS tables: 1734 bytes.
1954 07:49:52.485662 Writing table forward entry at 0x00000500
1955 07:49:52.492552 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1956 07:49:52.495685 Writing coreboot table at 0x76b25000
1957 07:49:52.502618 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1958 07:49:52.505500 1. 0000000000001000-000000000009ffff: RAM
1959 07:49:52.508948 2. 00000000000a0000-00000000000fffff: RESERVED
1960 07:49:52.515590 3. 0000000000100000-00000000769eefff: RAM
1961 07:49:52.518978 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1962 07:49:52.525248 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1963 07:49:52.532226 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1964 07:49:52.535316 7. 0000000077000000-000000007fbfffff: RESERVED
1965 07:49:52.538748 8. 00000000c0000000-00000000cfffffff: RESERVED
1966 07:49:52.545636 9. 00000000f8000000-00000000f9ffffff: RESERVED
1967 07:49:52.548503 10. 00000000fb000000-00000000fb000fff: RESERVED
1968 07:49:52.555108 11. 00000000fe000000-00000000fe00ffff: RESERVED
1969 07:49:52.558919 12. 00000000fed80000-00000000fed87fff: RESERVED
1970 07:49:52.565247 13. 00000000fed90000-00000000fed92fff: RESERVED
1971 07:49:52.568979 14. 00000000feda0000-00000000feda1fff: RESERVED
1972 07:49:52.575342 15. 00000000fedc0000-00000000feddffff: RESERVED
1973 07:49:52.578543 16. 0000000100000000-00000004803fffff: RAM
1974 07:49:52.581704 Passing 4 GPIOs to payload:
1975 07:49:52.585516 NAME | PORT | POLARITY | VALUE
1976 07:49:52.591788 lid | undefined | high | high
1977 07:49:52.595413 power | undefined | high | low
1978 07:49:52.601774 oprom | undefined | high | low
1979 07:49:52.608740 EC in RW | 0x000000e5 | high | high
1980 07:49:52.615126 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1981 07:49:52.615224 coreboot table: 1576 bytes.
1982 07:49:52.621757 IMD ROOT 0. 0x76fff000 0x00001000
1983 07:49:52.625130 IMD SMALL 1. 0x76ffe000 0x00001000
1984 07:49:52.628386 FSP MEMORY 2. 0x76c4e000 0x003b0000
1985 07:49:52.631822 VPD 3. 0x76c4d000 0x00000367
1986 07:49:52.635065 RO MCACHE 4. 0x76c4c000 0x00000fdc
1987 07:49:52.638672 CONSOLE 5. 0x76c2c000 0x00020000
1988 07:49:52.641890 FMAP 6. 0x76c2b000 0x00000578
1989 07:49:52.645337 TIME STAMP 7. 0x76c2a000 0x00000910
1990 07:49:52.651893 VBOOT WORK 8. 0x76c16000 0x00014000
1991 07:49:52.654814 ROMSTG STCK 9. 0x76c15000 0x00001000
1992 07:49:52.658102 AFTER CAR 10. 0x76c0a000 0x0000b000
1993 07:49:52.661444 RAMSTAGE 11. 0x76b97000 0x00073000
1994 07:49:52.665080 REFCODE 12. 0x76b42000 0x00055000
1995 07:49:52.668574 SMM BACKUP 13. 0x76b32000 0x00010000
1996 07:49:52.671322 4f444749 14. 0x76b30000 0x00002000
1997 07:49:52.675158 EXT VBT15. 0x76b2d000 0x0000219f
1998 07:49:52.678342 COREBOOT 16. 0x76b25000 0x00008000
1999 07:49:52.681397 ACPI 17. 0x76b01000 0x00024000
2000 07:49:52.685108
2001 07:49:52.688091 ACPI GNVS 18. 0x76b00000 0x00001000
2002 07:49:52.691346 RAMOOPS 19. 0x76a00000 0x00100000
2003 07:49:52.694642 TPM2 TCGLOG20. 0x769f0000 0x00010000
2004 07:49:52.698427 SMBIOS 21. 0x769ef000 0x00000800
2005 07:49:52.701279 IMD small region:
2006 07:49:52.705032 IMD ROOT 0. 0x76ffec00 0x00000400
2007 07:49:52.707761 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2008 07:49:52.711182 POWER STATE 2. 0x76ffeb80 0x00000044
2009 07:49:52.714838 ROMSTAGE 3. 0x76ffeb60 0x00000004
2010 07:49:52.718128 MEM INFO 4. 0x76ffe980 0x000001e0
2011 07:49:52.721573
2012 07:49:52.724720 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
2013 07:49:52.727834 MTRR: Physical address space:
2014 07:49:52.734597 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2015 07:49:52.740935 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2016 07:49:52.747559 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2017 07:49:52.754414 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2018 07:49:52.760756 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2019 07:49:52.764408 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2020 07:49:52.767509
2021 07:49:52.770813 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2022 07:49:52.777519 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 07:49:52.780909 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 07:49:52.784469 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 07:49:52.787382 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 07:49:52.794512 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 07:49:52.797332 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 07:49:52.800523 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 07:49:52.803911 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 07:49:52.810867 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 07:49:52.814208 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 07:49:52.817281 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 07:49:52.821247 call enable_fixed_mtrr()
2034 07:49:52.824783 CPU physical address size: 39 bits
2035 07:49:52.831412 MTRR: default type WB/UC MTRR counts: 6/7.
2036 07:49:52.834934 MTRR: WB selected as default type.
2037 07:49:52.841357 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2038 07:49:52.844631 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2039 07:49:52.851412 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2040 07:49:52.858081 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2041 07:49:52.864474 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2042 07:49:52.871312 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2043 07:49:52.878562 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 07:49:52.881828 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 07:49:52.884892 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 07:49:52.888196 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 07:49:52.894719 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 07:49:52.898032 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 07:49:52.901766 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 07:49:52.904795 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 07:49:52.911980 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 07:49:52.914850 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 07:49:52.918162 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 07:49:52.921910 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 07:49:52.927895 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 07:49:52.931417 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 07:49:52.934906 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 07:49:52.938041 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 07:49:52.941474 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 07:49:52.947960 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 07:49:52.951628 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 07:49:52.954823 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 07:49:52.957944 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 07:49:52.964598 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 07:49:52.971051 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 07:49:52.971145 call enable_fixed_mtrr()
2067 07:49:52.977835 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 07:49:52.981247 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 07:49:52.984377 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 07:49:52.988007 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 07:49:52.991122 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 07:49:52.997788 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 07:49:53.001161 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 07:49:53.004352 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 07:49:53.007567 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 07:49:53.014810 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 07:49:53.017818 CPU physical address size: 39 bits
2078 07:49:53.022861 call enable_fixed_mtrr()
2079 07:49:53.022956
2080 07:49:53.026471 MTRR check
2081 07:49:53.029218 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 07:49:53.032602 MTRR: Fixed MSR 0x250 0x0606060606060606
2083 07:49:53.036157 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 07:49:53.042613 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 07:49:53.046047 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 07:49:53.049462 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 07:49:53.052788 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 07:49:53.056133 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 07:49:53.062864 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 07:49:53.066020 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 07:49:53.069321 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 07:49:53.072438 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 07:49:53.081318 MTRR: Fixed MSR 0x258 0x0606060606060606
2094 07:49:53.081415 call enable_fixed_mtrr()
2095 07:49:53.088091 MTRR: Fixed MSR 0x259 0x0000000000000000
2096 07:49:53.091448 MTRR: Fixed MSR 0x268 0x0606060606060606
2097 07:49:53.094421 MTRR: Fixed MSR 0x269 0x0606060606060606
2098 07:49:53.097830 MTRR: Fixed MSR 0x26a 0x0606060606060606
2099 07:49:53.104556 MTRR: Fixed MSR 0x26b 0x0606060606060606
2100 07:49:53.107674 MTRR: Fixed MSR 0x26c 0x0606060606060606
2101 07:49:53.111382 MTRR: Fixed MSR 0x26d 0x0606060606060606
2102 07:49:53.114668 MTRR: Fixed MSR 0x26e 0x0606060606060606
2103 07:49:53.121006 MTRR: Fixed MSR 0x26f 0x0606060606060606
2104 07:49:53.124576 CPU physical address size: 39 bits
2105 07:49:53.129334 call enable_fixed_mtrr()
2106 07:49:53.133277 MTRR: Fixed MSR 0x250 0x0606060606060606
2107 07:49:53.138978 MTRR: Fixed MSR 0x250 0x0606060606060606
2108 07:49:53.142271 MTRR: Fixed MSR 0x258 0x0606060606060606
2109 07:49:53.145844 MTRR: Fixed MSR 0x259 0x0000000000000000
2110 07:49:53.149263 MTRR: Fixed MSR 0x268 0x0606060606060606
2111 07:49:53.156086 MTRR: Fixed MSR 0x269 0x0606060606060606
2112 07:49:53.159387 MTRR: Fixed MSR 0x26a 0x0606060606060606
2113 07:49:53.162432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2114 07:49:53.165810 MTRR: Fixed MSR 0x26c 0x0606060606060606
2115 07:49:53.172424 MTRR: Fixed MSR 0x26d 0x0606060606060606
2116 07:49:53.175625 MTRR: Fixed MSR 0x26e 0x0606060606060606
2117 07:49:53.179431 MTRR: Fixed MSR 0x26f 0x0606060606060606
2118 07:49:53.187073 MTRR: Fixed MSR 0x258 0x0606060606060606
2119 07:49:53.187356 call enable_fixed_mtrr()
2120 07:49:53.193674 MTRR: Fixed MSR 0x259 0x0000000000000000
2121 07:49:53.196934 MTRR: Fixed MSR 0x268 0x0606060606060606
2122 07:49:53.200087 MTRR: Fixed MSR 0x269 0x0606060606060606
2123 07:49:53.203905 MTRR: Fixed MSR 0x26a 0x0606060606060606
2124 07:49:53.210149 MTRR: Fixed MSR 0x26b 0x0606060606060606
2125 07:49:53.213313 MTRR: Fixed MSR 0x26c 0x0606060606060606
2126 07:49:53.216719 MTRR: Fixed MSR 0x26d 0x0606060606060606
2127 07:49:53.220264 MTRR: Fixed MSR 0x26e 0x0606060606060606
2128 07:49:53.226993 MTRR: Fixed MSR 0x26f 0x0606060606060606
2129 07:49:53.230147 CPU physical address size: 39 bits
2130 07:49:53.230581 call enable_fixed_mtrr()
2131 07:49:53.237027 Fixed MTRRs : CPU physical address size: 39 bits
2132 07:49:53.240487 Enabled
2133 07:49:53.244067 CPU physical address size: 39 bits
2134 07:49:53.244521 Variable MTRRs: Enabled
2135 07:49:53.247227
2136 07:49:53.247666 call enable_fixed_mtrr()
2137 07:49:53.250679 CPU physical address size: 39 bits
2138 07:49:53.255688 CPU physical address size: 39 bits
2139 07:49:53.262279 BS: BS_WRITE_TABLES exit times (exec / console): 368 / 152 ms
2140 07:49:53.265509 Checking cr50 for pending updates
2141 07:49:53.273942 Reading cr50 TPM mode
2142 07:49:53.284449 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2143 07:49:53.293924 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2144 07:49:53.297245 Checking segment from ROM address 0xffc02b38
2145 07:49:53.300893 Checking segment from ROM address 0xffc02b54
2146 07:49:53.307445 Loading segment from ROM address 0xffc02b38
2147 07:49:53.307893 code (compression=0)
2148 07:49:53.316944 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2149 07:49:53.323747 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2150 07:49:53.326893 it's not compressed!
2151 07:49:53.476681 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2152 07:49:53.483532 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2153 07:49:53.490120 Loading segment from ROM address 0xffc02b54
2154 07:49:53.494020 Entry Point 0x30000000
2155 07:49:53.494490 Loaded segments
2156 07:49:53.500636 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2157 07:49:53.545959 Finalizing chipset.
2158 07:49:53.549422 Finalizing SMM.
2159 07:49:53.549868 APMC done.
2160 07:49:53.555675 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2161 07:49:53.558906 mp_park_aps done after 0 msecs.
2162 07:49:53.562149 Jumping to boot code at 0x30000000(0x76b25000)
2163 07:49:53.572111 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2164 07:49:53.572560
2165 07:49:53.573006
2166 07:49:53.575403
2167 07:49:53.575854 Starting depthcharge on Voema...
2168 07:49:53.576947 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2169 07:49:53.577524 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2170 07:49:53.578011 Setting prompt string to ['volteer:']
2171 07:49:53.578513 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2172 07:49:53.579359
2173 07:49:53.585574 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2174 07:49:53.586063
2175 07:49:53.592022 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2176 07:49:53.592624
2177 07:49:53.597960 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2178 07:49:53.598068
2179 07:49:53.601393 Failed to find eMMC card reader
2180 07:49:53.601491
2181 07:49:53.604788 Wipe memory regions:
2182 07:49:53.604885
2183 07:49:53.608171 [0x00000000001000, 0x000000000a0000)
2184 07:49:53.608269
2185 07:49:53.611656 [0x00000000100000, 0x00000030000000)
2186 07:49:53.611753
2187 07:49:53.653952 [0x00000032662db0, 0x000000769ef000)
2188 07:49:53.654052
2189 07:49:53.711137 [0x00000100000000, 0x00000480400000)
2190 07:49:53.711248
2191 07:49:54.398707 ec_init: CrosEC protocol v3 supported (256, 256)
2192 07:49:54.399248
2193 07:49:54.829453 R8152: Initializing
2194 07:49:54.830023
2195 07:49:54.832641 Version 6 (ocp_data = 5c30)
2196 07:49:54.833091
2197 07:49:54.835847 R8152: Done initializing
2198 07:49:54.836292
2199 07:49:54.839265 Adding net device
2200 07:49:54.839715
2201 07:49:55.143779 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2202 07:49:55.144294
2203 07:49:55.144752
2204 07:49:55.145177
2205 07:49:55.147662 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2207 07:49:55.249361 volteer: tftpboot 192.168.201.1 8119380/tftp-deploy-1bttgsgy/kernel/bzImage 8119380/tftp-deploy-1bttgsgy/kernel/cmdline 8119380/tftp-deploy-1bttgsgy/ramdisk/ramdisk.cpio.gz
2208 07:49:55.249955 Setting prompt string to 'Starting kernel'
2209 07:49:55.250408 Setting prompt string to ['Starting kernel']
2210 07:49:55.250850 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2211 07:49:55.251325 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2212 07:49:55.255171 tftpboot 192.168.201.1 8119380/tftp-deploy-1bttgsgy/kernel/bzImoy-1bttgsgy/kernel/cmdline 8119380/tftp-deploy-1bttgsgy/ramdisk/ramdisk.cpio.gz
2213 07:49:55.255638
2214 07:49:55.256094 Waiting for link
2215 07:49:55.256449
2216 07:49:55.458256 done.
2217 07:49:55.458796
2218 07:49:55.459159 MAC: 00:24:32:30:77:d1
2219 07:49:55.459594
2220 07:49:55.461544 Sending DHCP discover... done.
2221 07:49:55.462027
2222 07:49:55.464658 Waiting for reply... done.
2223 07:49:55.465217
2224 07:49:55.468225 Sending DHCP request... done.
2225 07:49:55.468665
2226 07:49:55.471303 Waiting for reply... done.
2227 07:49:55.471758
2228 07:49:55.474799 My ip is 192.168.201.13
2229 07:49:55.475235
2230 07:49:55.478077 The DHCP server ip is 192.168.201.1
2231 07:49:55.478518
2232 07:49:55.481311 TFTP server IP predefined by user: 192.168.201.1
2233 07:49:55.481750
2234 07:49:55.487624 Bootfile predefined by user: 8119380/tftp-deploy-1bttgsgy/kernel/bzImage
2235 07:49:55.488075
2236 07:49:55.491071 Sending tftp read request... done.
2237 07:49:55.491527
2238 07:49:55.498826 Waiting for the transfer...
2239 07:49:55.499280
2240 07:49:56.168410 00000000 ################################################################
2241 07:49:56.168637
2242 07:49:56.789766 00080000 ################################################################
2243 07:49:56.789936
2244 07:49:57.406465 00100000 ################################################################
2245 07:49:57.406627
2246 07:49:58.011194 00180000 ################################################################
2247 07:49:58.011733
2248 07:49:58.625810 00200000 ################################################################
2249 07:49:58.625983
2250 07:49:59.264209 00280000 ################################################################
2251 07:49:59.264743
2252 07:49:59.910973 00300000 ################################################################
2253 07:49:59.911225
2254 07:50:00.587858 00380000 ################################################################
2255 07:50:00.588402
2256 07:50:01.277812 00400000 ################################################################
2257 07:50:01.278219
2258 07:50:01.890646 00480000 ################################################################
2259 07:50:01.890838
2260 07:50:02.532698 00500000 ################################################################
2261 07:50:02.533272
2262 07:50:03.230167 00580000 ################################################################
2263 07:50:03.230703
2264 07:50:03.948003 00600000 ################################################################
2265 07:50:03.948588
2266 07:50:04.370255 00680000 ####################################### done.
2267 07:50:04.370820
2268 07:50:04.373815 The bootfile was 7131024 bytes long.
2269 07:50:04.374455
2270 07:50:04.377178 Sending tftp read request... done.
2271 07:50:04.377795
2272 07:50:04.379799 Waiting for the transfer...
2273 07:50:04.380238
2274 07:50:05.113560 00000000 ################################################################
2275 07:50:05.114124
2276 07:50:05.808704 00080000 ################################################################
2277 07:50:05.809297
2278 07:50:06.514975 00100000 ################################################################
2279 07:50:06.515554
2280 07:50:07.206195 00180000 ################################################################
2281 07:50:07.206725
2282 07:50:07.815963 00200000 ################################################################
2283 07:50:07.816114
2284 07:50:08.402070 00280000 ################################################################
2285 07:50:08.402244
2286 07:50:08.972765 00300000 ################################################################
2287 07:50:08.972920
2288 07:50:09.543010 00380000 ################################################################
2289 07:50:09.543557
2290 07:50:10.110382 00400000 ################################################################
2291 07:50:10.110549
2292 07:50:10.657819 00480000 ################################################################
2293 07:50:10.658004
2294 07:50:10.936134 00500000 ################################ done.
2295 07:50:10.936303
2296 07:50:10.939132 Sending tftp read request... done.
2297 07:50:10.939229
2298 07:50:10.942373 Waiting for the transfer...
2299 07:50:10.942470
2300 07:50:10.942546 00000000 # done.
2301 07:50:10.942619
2302 07:50:10.952711 Command line loaded dynamically from TFTP file: 8119380/tftp-deploy-1bttgsgy/kernel/cmdline
2303 07:50:10.952807
2304 07:50:10.975652 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119380/extract-nfsrootfs-zn6c9fcn,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2305 07:50:10.975830
2306 07:50:10.983270 Shutting down all USB controllers.
2307 07:50:10.983447
2308 07:50:10.983583 Removing current net device
2309 07:50:10.983740
2310 07:50:10.986896 Finalizing coreboot
2311 07:50:10.987087
2312 07:50:10.993439 Exiting depthcharge with code 4 at timestamp: 26012077
2313 07:50:10.993682
2314 07:50:10.993869
2315 07:50:10.994092 Starting kernel ...
2316 07:50:10.994270
2317 07:50:10.994437
2318 07:50:10.994600
2319 07:50:10.995381 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2320 07:50:10.995721 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2321 07:50:10.996009 Setting prompt string to ['Linux version [0-9]']
2322 07:50:10.996260 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2323 07:50:10.996502 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2325 07:54:37.996206 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2327 07:54:37.996548 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2329 07:54:37.996813 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2332 07:54:37.997254 end: 2 depthcharge-action (duration 00:05:00) [common]
2334 07:54:37.997623 Cleaning after the job
2335 07:54:37.997797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/ramdisk
2336 07:54:37.998492 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/kernel
2337 07:54:37.999284 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/nfsrootfs
2338 07:54:38.041271 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119380/tftp-deploy-1bttgsgy/modules
2339 07:54:38.041605 start: 4.1 power-off (timeout 00:00:30) [common]
2340 07:54:38.041789 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2341 07:54:38.062729 >> Command sent successfully.
2342 07:54:38.064691 Returned 0 in 0 seconds
2343 07:54:38.165852 end: 4.1 power-off (duration 00:00:00) [common]
2345 07:54:38.167354 start: 4.2 read-feedback (timeout 00:10:00) [common]
2346 07:54:38.168427 Listened to connection for namespace 'common' for up to 1s
2347 07:54:39.173327 Finalising connection for namespace 'common'
2348 07:54:39.174013 Disconnecting from shell: Finalise
2349 07:54:39.275607 end: 4.2 read-feedback (duration 00:00:01) [common]
2350 07:54:39.276208 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119380
2351 07:54:39.459440 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119380
2352 07:54:39.459643 JobError: Your job cannot terminate cleanly.