Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:55:16.316605 lava-dispatcher, installed at version: 2022.10
2 07:55:16.316787 start: 0 validate
3 07:55:16.316915 Start time: 2022-11-25 07:55:16.316908+00:00 (UTC)
4 07:55:16.317035 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:55:16.317169 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:55:16.320428 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:55:16.320550 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:55:16.322379 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:55:16.322487 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:55:16.324398 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:55:16.324514 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:55:16.327706 validate duration: 0.01
14 07:55:16.327942 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:55:16.328049 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:55:16.328138 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:55:16.328235 Not decompressing ramdisk as can be used compressed.
18 07:55:16.328318 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 07:55:16.328381 saving as /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/ramdisk/initrd.cpio.gz
20 07:55:16.328441 total size: 5431719 (5MB)
21 07:55:16.331221 progress 0% (0MB)
22 07:55:16.333677 progress 5% (0MB)
23 07:55:16.335977 progress 10% (0MB)
24 07:55:16.338286 progress 15% (0MB)
25 07:55:16.340744 progress 20% (1MB)
26 07:55:16.342859 progress 25% (1MB)
27 07:55:16.345167 progress 30% (1MB)
28 07:55:16.347662 progress 35% (1MB)
29 07:55:16.349959 progress 40% (2MB)
30 07:55:16.352263 progress 45% (2MB)
31 07:55:16.354382 progress 50% (2MB)
32 07:55:16.356872 progress 55% (2MB)
33 07:55:16.359207 progress 60% (3MB)
34 07:55:16.361512 progress 65% (3MB)
35 07:55:16.363975 progress 70% (3MB)
36 07:55:16.366130 progress 75% (3MB)
37 07:55:16.368732 progress 80% (4MB)
38 07:55:16.370932 progress 85% (4MB)
39 07:55:16.373339 progress 90% (4MB)
40 07:55:16.375518 progress 95% (4MB)
41 07:55:16.377840 progress 100% (5MB)
42 07:55:16.378145 5MB downloaded in 0.05s (104.23MB/s)
43 07:55:16.378307 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:55:16.378554 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:55:16.378641 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:55:16.378729 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:55:16.378834 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:55:16.378904 saving as /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/kernel/bzImage
50 07:55:16.378964 total size: 7131024 (6MB)
51 07:55:16.379024 No compression specified
52 07:55:16.381118 progress 0% (0MB)
53 07:55:16.384552 progress 5% (0MB)
54 07:55:16.387409 progress 10% (0MB)
55 07:55:16.390358 progress 15% (1MB)
56 07:55:16.393436 progress 20% (1MB)
57 07:55:16.396862 progress 25% (1MB)
58 07:55:16.399574 progress 30% (2MB)
59 07:55:16.402641 progress 35% (2MB)
60 07:55:16.405926 progress 40% (2MB)
61 07:55:16.408586 progress 45% (3MB)
62 07:55:16.411658 progress 50% (3MB)
63 07:55:16.414747 progress 55% (3MB)
64 07:55:16.417793 progress 60% (4MB)
65 07:55:16.420897 progress 65% (4MB)
66 07:55:16.423920 progress 70% (4MB)
67 07:55:16.427104 progress 75% (5MB)
68 07:55:16.430106 progress 80% (5MB)
69 07:55:16.433140 progress 85% (5MB)
70 07:55:16.436055 progress 90% (6MB)
71 07:55:16.439147 progress 95% (6MB)
72 07:55:16.442000 progress 100% (6MB)
73 07:55:16.442246 6MB downloaded in 0.06s (107.48MB/s)
74 07:55:16.442401 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:55:16.442643 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:55:16.442734 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:55:16.442823 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:55:16.442931 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 07:55:16.442999 saving as /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/nfsrootfs/full.rootfs.tar
81 07:55:16.443060 total size: 207113456 (197MB)
82 07:55:16.443122 Using unxz to decompress xz
83 07:55:16.447660 progress 0% (0MB)
84 07:55:17.006849 progress 5% (9MB)
85 07:55:17.539479 progress 10% (19MB)
86 07:55:18.129729 progress 15% (29MB)
87 07:55:18.492521 progress 20% (39MB)
88 07:55:18.853110 progress 25% (49MB)
89 07:55:19.439626 progress 30% (59MB)
90 07:55:19.985156 progress 35% (69MB)
91 07:55:20.579057 progress 40% (79MB)
92 07:55:21.131652 progress 45% (88MB)
93 07:55:21.704479 progress 50% (98MB)
94 07:55:22.324673 progress 55% (108MB)
95 07:55:22.999057 progress 60% (118MB)
96 07:55:23.137113 progress 65% (128MB)
97 07:55:23.278315 progress 70% (138MB)
98 07:55:23.371815 progress 75% (148MB)
99 07:55:23.439270 progress 80% (158MB)
100 07:55:23.509283 progress 85% (167MB)
101 07:55:23.614225 progress 90% (177MB)
102 07:55:23.876206 progress 95% (187MB)
103 07:55:24.457647 progress 100% (197MB)
104 07:55:24.463522 197MB downloaded in 8.02s (24.63MB/s)
105 07:55:24.463779 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:55:24.464042 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:55:24.464136 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:55:24.464229 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:55:24.464350 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:55:24.464422 saving as /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/modules/modules.tar
112 07:55:24.464485 total size: 52060 (0MB)
113 07:55:24.464547 Using unxz to decompress xz
114 07:55:24.761432 progress 62% (0MB)
115 07:55:24.763483 progress 100% (0MB)
116 07:55:24.767897 0MB downloaded in 0.30s (0.16MB/s)
117 07:55:24.768148 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:55:24.768427 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:55:24.768529 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 07:55:24.768632 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 07:55:26.823492 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119432/extract-nfsrootfs-nca_8bdl
123 07:55:26.823700 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:55:26.823800 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 07:55:26.823935 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6
126 07:55:26.824034 makedir: /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin
127 07:55:26.824117 makedir: /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/tests
128 07:55:26.824200 makedir: /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/results
129 07:55:26.824297 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-add-keys
130 07:55:26.824427 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-add-sources
131 07:55:26.824543 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-background-process-start
132 07:55:26.824654 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-background-process-stop
133 07:55:26.824762 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-common-functions
134 07:55:26.824868 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-echo-ipv4
135 07:55:26.824977 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-install-packages
136 07:55:26.825083 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-installed-packages
137 07:55:26.825190 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-os-build
138 07:55:26.825296 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-probe-channel
139 07:55:26.825402 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-probe-ip
140 07:55:26.825507 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-target-ip
141 07:55:26.825613 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-target-mac
142 07:55:26.825718 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-target-storage
143 07:55:26.825826 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-case
144 07:55:26.825934 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-event
145 07:55:26.826039 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-feedback
146 07:55:26.826208 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-raise
147 07:55:26.826313 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-reference
148 07:55:26.826418 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-runner
149 07:55:26.826525 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-set
150 07:55:26.826629 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-test-shell
151 07:55:26.826738 Updating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-add-keys (debian)
152 07:55:26.826849 Updating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-add-sources (debian)
153 07:55:26.826958 Updating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-install-packages (debian)
154 07:55:26.827066 Updating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-installed-packages (debian)
155 07:55:26.827172 Updating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/bin/lava-os-build (debian)
156 07:55:26.827266 Creating /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/environment
157 07:55:26.827349 LAVA metadata
158 07:55:26.827414 - LAVA_JOB_ID=8119432
159 07:55:26.827475 - LAVA_DISPATCHER_IP=192.168.201.1
160 07:55:26.827569 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 07:55:26.827633 skipped lava-vland-overlay
162 07:55:26.827707 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 07:55:26.827786 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 07:55:26.827846 skipped lava-multinode-overlay
165 07:55:26.827917 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 07:55:26.827994 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 07:55:26.828062 Loading test definitions
168 07:55:26.828154 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 07:55:26.828223 Using /lava-8119432 at stage 0
170 07:55:26.828449 uuid=8119432_1.5.2.3.1 testdef=None
171 07:55:26.828536 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 07:55:26.828619 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 07:55:26.829036 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 07:55:26.829266 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 07:55:26.829747 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 07:55:26.829981 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 07:55:26.830491 runner path: /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/0/tests/0_timesync-off test_uuid 8119432_1.5.2.3.1
180 07:55:26.830635 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 07:55:26.830863 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 07:55:26.830935 Using /lava-8119432 at stage 0
184 07:55:26.831030 Fetching tests from https://github.com/kernelci/test-definitions.git
185 07:55:26.831108 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/0/tests/1_kselftest-futex'
186 07:55:30.980265 Running '/usr/bin/git checkout kernelci.org
187 07:55:31.122540 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
188 07:55:31.123242 uuid=8119432_1.5.2.3.5 testdef=None
189 07:55:31.123402 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
191 07:55:31.123654 start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
192 07:55:31.124368 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 07:55:31.124612 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
195 07:55:31.125517 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 07:55:31.125766 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
198 07:55:31.126744 runner path: /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/0/tests/1_kselftest-futex test_uuid 8119432_1.5.2.3.5
199 07:55:31.126835 BOARD='asus-C436FA-Flip-hatch'
200 07:55:31.126904 BRANCH='cip'
201 07:55:31.126966 SKIPFILE='skipfile-lkft.yaml'
202 07:55:31.127025 TESTPROG_URL='None'
203 07:55:31.127084 TST_CASENAME=''
204 07:55:31.127141 TST_CMDFILES='futex'
205 07:55:31.127274 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 07:55:31.127489 Creating lava-test-runner.conf files
208 07:55:31.127561 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119432/lava-overlay-lk0786c6/lava-8119432/0 for stage 0
209 07:55:31.127647 - 0_timesync-off
210 07:55:31.127720 - 1_kselftest-futex
211 07:55:31.127823 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
212 07:55:31.127915 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
213 07:55:38.464356 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 07:55:38.464517 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
215 07:55:38.464611 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 07:55:38.464712 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
217 07:55:38.464803 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
218 07:55:38.566924 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 07:55:38.567277 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
220 07:55:38.567391 extracting modules file /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119432/extract-nfsrootfs-nca_8bdl
221 07:55:38.571466 extracting modules file /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119432/extract-overlay-ramdisk-58lepb7e/ramdisk
222 07:55:38.575285 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 07:55:38.575426 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
224 07:55:38.575512 [common] Applying overlay to NFS
225 07:55:38.575587 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119432/compress-overlay-x7jq1ru2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119432/extract-nfsrootfs-nca_8bdl
226 07:55:39.033453 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 07:55:39.033623 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
228 07:55:39.033720 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 07:55:39.033812 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
230 07:55:39.033896 Building ramdisk /var/lib/lava/dispatcher/tmp/8119432/extract-overlay-ramdisk-58lepb7e/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119432/extract-overlay-ramdisk-58lepb7e/ramdisk
231 07:55:39.067765 >> 24546 blocks
232 07:55:39.537781 rename /var/lib/lava/dispatcher/tmp/8119432/extract-overlay-ramdisk-58lepb7e/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/ramdisk/ramdisk.cpio.gz
233 07:55:39.538239 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 07:55:39.538368 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
235 07:55:39.538471 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
236 07:55:39.538565 No mkimage arch provided, not using FIT.
237 07:55:39.538682 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 07:55:39.538767 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 07:55:39.538867 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
240 07:55:39.538963 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
241 07:55:39.539041 No LXC device requested
242 07:55:39.539127 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 07:55:39.539215 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
244 07:55:39.539296 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 07:55:39.539366 Checking files for TFTP limit of 4294967296 bytes.
246 07:55:39.539736 end: 1 tftp-deploy (duration 00:00:23) [common]
247 07:55:39.539839 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 07:55:39.539930 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 07:55:39.540063 substitutions:
250 07:55:39.540132 - {DTB}: None
251 07:55:39.540196 - {INITRD}: 8119432/tftp-deploy-pzuhjkqu/ramdisk/ramdisk.cpio.gz
252 07:55:39.540256 - {KERNEL}: 8119432/tftp-deploy-pzuhjkqu/kernel/bzImage
253 07:55:39.540315 - {LAVA_MAC}: None
254 07:55:39.540373 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119432/extract-nfsrootfs-nca_8bdl
255 07:55:39.540431 - {NFS_SERVER_IP}: 192.168.201.1
256 07:55:39.540488 - {PRESEED_CONFIG}: None
257 07:55:39.540570 - {PRESEED_LOCAL}: None
258 07:55:39.540627 - {RAMDISK}: 8119432/tftp-deploy-pzuhjkqu/ramdisk/ramdisk.cpio.gz
259 07:55:39.540696 - {ROOT_PART}: None
260 07:55:39.540752 - {ROOT}: None
261 07:55:39.540807 - {SERVER_IP}: 192.168.201.1
262 07:55:39.540862 - {TEE}: None
263 07:55:39.540918 Parsed boot commands:
264 07:55:39.540972 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 07:55:39.541122 Parsed boot commands: tftpboot 192.168.201.1 8119432/tftp-deploy-pzuhjkqu/kernel/bzImage 8119432/tftp-deploy-pzuhjkqu/kernel/cmdline 8119432/tftp-deploy-pzuhjkqu/ramdisk/ramdisk.cpio.gz
266 07:55:39.541214 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 07:55:39.541302 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 07:55:39.541397 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 07:55:39.541489 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 07:55:39.541558 Not connected, no need to disconnect.
271 07:55:39.541633 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 07:55:39.541713 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 07:55:39.541782 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
274 07:55:39.544587 Setting prompt string to ['lava-test: # ']
275 07:55:39.544912 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 07:55:39.545016 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 07:55:39.545115 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 07:55:39.545207 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 07:55:39.545380 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
280 07:55:39.564699 >> Command sent successfully.
281 07:55:39.566744 Returned 0 in 0 seconds
282 07:55:39.667963 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 07:55:39.669378 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 07:55:39.669890 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 07:55:39.670370 Setting prompt string to 'Starting depthcharge on Helios...'
287 07:55:39.670728 Changing prompt to 'Starting depthcharge on Helios...'
288 07:55:39.671087 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 07:55:39.672319 [Enter `^Ec?' for help]
290 07:55:45.897636
291 07:55:45.898349
292 07:55:45.907703 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 07:55:45.911128 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 07:55:45.917601 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 07:55:45.920252 CPU: AES supported, TXT NOT supported, VT supported
296 07:55:45.927372 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 07:55:45.930843 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 07:55:45.937107 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 07:55:45.940374 VBOOT: Loading verstage.
300 07:55:45.943602 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 07:55:45.950263 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 07:55:45.953877 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 07:55:45.957038 CBFS @ c08000 size 3f8000
304 07:55:45.963686 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 07:55:45.967040 CBFS: Locating 'fallback/verstage'
306 07:55:45.969778 CBFS: Found @ offset 10fb80 size 1072c
307 07:55:45.974215
308 07:55:45.974792
309 07:55:45.984269 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 07:55:45.998750 Probing TPM: . done!
311 07:55:46.001702 TPM ready after 0 ms
312 07:55:46.004925 Connected to device vid:did:rid of 1ae0:0028:00
313 07:55:46.015709 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 07:55:46.018463 Initialized TPM device CR50 revision 0
315 07:55:46.059860 tlcl_send_startup: Startup return code is 0
316 07:55:46.060469 TPM: setup succeeded
317 07:55:46.072433 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 07:55:46.076277 Chrome EC: UHEPI supported
319 07:55:46.079714 Phase 1
320 07:55:46.083264 FMAP: area GBB found @ c05000 (12288 bytes)
321 07:55:46.089483 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 07:55:46.092643 Phase 2
323 07:55:46.093220 Phase 3
324 07:55:46.095724 FMAP: area GBB found @ c05000 (12288 bytes)
325 07:55:46.102249 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 07:55:46.108875 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
327 07:55:46.111993 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 07:55:46.118687 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 07:55:46.134960 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 07:55:46.138267 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 07:55:46.145250 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 07:55:46.149236 Phase 4
333 07:55:46.152698 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
334 07:55:46.159336 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 07:55:46.162041
336 07:55:46.338731 VB2:vb2_rsa_verify_digest() Digest check failed!
337 07:55:46.342185 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 07:55:46.345781
339 07:55:46.346410 Saving nvdata
340 07:55:46.348930 Reboot requested (10020007)
341 07:55:46.352036 board_reset() called!
342 07:55:46.352520 full_reset() called!
343 07:55:50.864143
344 07:55:50.864801
345 07:55:50.873419 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
346 07:55:50.877453 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
347 07:55:50.883446 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
348 07:55:50.886998 CPU: AES supported, TXT NOT supported, VT supported
349 07:55:50.893530 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
350 07:55:50.896885 PCH: device id 0284 (rev 00) is Cometlake-U Premium
351 07:55:50.903554 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
352 07:55:50.906888 VBOOT: Loading verstage.
353 07:55:50.910214 FMAP: Found "FLASH" version 1.1 at 0xc04000.
354 07:55:50.916551 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
355 07:55:50.923146 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 07:55:50.923729 CBFS @ c08000 size 3f8000
357 07:55:50.930003 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 07:55:50.933479 CBFS: Locating 'fallback/verstage'
359 07:55:50.936124 CBFS: Found @ offset 10fb80 size 1072c
360 07:55:50.940573
361 07:55:50.941154
362 07:55:50.950453 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
363 07:55:50.964791 Probing TPM: . done!
364 07:55:50.967903 TPM ready after 0 ms
365 07:55:50.971692 Connected to device vid:did:rid of 1ae0:0028:00
366 07:55:50.981956 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
367 07:55:50.985259 Initialized TPM device CR50 revision 0
368 07:55:51.026421 tlcl_send_startup: Startup return code is 0
369 07:55:51.026998 TPM: setup succeeded
370 07:55:51.039417 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
371 07:55:51.043280 Chrome EC: UHEPI supported
372 07:55:51.046102 Phase 1
373 07:55:51.049209 FMAP: area GBB found @ c05000 (12288 bytes)
374 07:55:51.055830 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
375 07:55:51.062306 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
376 07:55:51.065466 Recovery requested (1009000e)
377 07:55:51.072278 Saving nvdata
378 07:55:51.077871 tlcl_extend: response is 0
379 07:55:51.086242 tlcl_extend: response is 0
380 07:55:51.093882 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 07:55:51.096426 CBFS @ c08000 size 3f8000
382 07:55:51.103200 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 07:55:51.106649 CBFS: Locating 'fallback/romstage'
384 07:55:51.110143 CBFS: Found @ offset 80 size 145fc
385 07:55:51.113343 Accumulated console time in verstage 99 ms
386 07:55:51.113825
387 07:55:51.114250
388 07:55:51.116592
389 07:55:51.126580 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
390 07:55:51.133138 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
391 07:55:51.135963 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
392 07:55:51.139320 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
393 07:55:51.146164 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
394 07:55:51.149478 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
395 07:55:51.152680 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
396 07:55:51.155908 TCO_STS: 0000 0000
397 07:55:51.158970 GEN_PMCON: e0015238 00000200
398 07:55:51.162345 GBLRST_CAUSE: 00000000 00000000
399 07:55:51.162833 prev_sleep_state 5
400 07:55:51.165916
401 07:55:51.169234 Boot Count incremented to 38300
402 07:55:51.172218 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 07:55:51.175869 CBFS @ c08000 size 3f8000
404 07:55:51.182133 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 07:55:51.185179 CBFS: Locating 'fspm.bin'
406 07:55:51.188578 CBFS: Found @ offset 5ffc0 size 71000
407 07:55:51.191704 Chrome EC: UHEPI supported
408 07:55:51.198443 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
409 07:55:51.203241 Probing TPM: done!
410 07:55:51.209656 Connected to device vid:did:rid of 1ae0:0028:00
411 07:55:51.219865 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
412 07:55:51.225719 Initialized TPM device CR50 revision 0
413 07:55:51.234974 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 07:55:51.242098 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
415 07:55:51.244923 MRC cache found, size 1948
416 07:55:51.247828 bootmode is set to: 2
417 07:55:51.251406 PRMRR disabled by config.
418 07:55:51.254724 SPD INDEX = 1
419 07:55:51.258206 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
420 07:55:51.261365 CBFS @ c08000 size 3f8000
421 07:55:51.267598 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
422 07:55:51.268182 CBFS: Locating 'spd.bin'
423 07:55:51.270846 CBFS: Found @ offset 5fb80 size 400
424 07:55:51.274262 SPD: module type is LPDDR3
425 07:55:51.277567 SPD: module part is
426 07:55:51.284143 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
427 07:55:51.287097 SPD: device width 4 bits, bus width 8 bits
428 07:55:51.290993 SPD: module size is 4096 MB (per channel)
429 07:55:51.293604 memory slot: 0 configuration done.
430 07:55:51.297129 memory slot: 2 configuration done.
431 07:55:51.300670
432 07:55:51.349075 CBMEM:
433 07:55:51.352401 IMD: root @ 99fff000 254 entries.
434 07:55:51.355509 IMD: root @ 99ffec00 62 entries.
435 07:55:51.358869 External stage cache:
436 07:55:51.361883 IMD: root @ 9abff000 254 entries.
437 07:55:51.365589 IMD: root @ 9abfec00 62 entries.
438 07:55:51.372404 Chrome EC: clear events_b mask to 0x0000000020004000
439 07:55:51.384877 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 07:55:51.397555 tlcl_write: response is 0
441 07:55:51.406966 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 07:55:51.413748 MRC: TPM MRC hash updated successfully.
443 07:55:51.414262 2 DIMMs found
444 07:55:51.416640 SMM Memory Map
445 07:55:51.419797 SMRAM : 0x9a000000 0x1000000
446 07:55:51.423317 Subregion 0: 0x9a000000 0xa00000
447 07:55:51.426486 Subregion 1: 0x9aa00000 0x200000
448 07:55:51.429970 Subregion 2: 0x9ac00000 0x400000
449 07:55:51.433064 top_of_ram = 0x9a000000
450 07:55:51.436764 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
451 07:55:51.443568 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
452 07:55:51.446375 MTRR Range: Start=ff000000 End=0 (Size 1000000)
453 07:55:51.453365 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 07:55:51.456453 CBFS @ c08000 size 3f8000
455 07:55:51.459667 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 07:55:51.462722 CBFS: Locating 'fallback/postcar'
457 07:55:51.466460
458 07:55:51.469088 CBFS: Found @ offset 107000 size 4b44
459 07:55:51.475861 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
460 07:55:51.485592 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
461 07:55:51.488982 Processing 180 relocs. Offset value of 0x97c0c000
462 07:55:51.497560 Accumulated console time in romstage 286 ms
463 07:55:51.498043
464 07:55:51.498535
465 07:55:51.508217 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
466 07:55:51.514363 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
467 07:55:51.517546 CBFS @ c08000 size 3f8000
468 07:55:51.520726 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
469 07:55:51.523902
470 07:55:51.527634 CBFS: Locating 'fallback/ramstage'
471 07:55:51.530599 CBFS: Found @ offset 43380 size 1b9e8
472 07:55:51.537285 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 07:55:51.569343 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 07:55:51.572886 Processing 3976 relocs. Offset value of 0x98db0000
475 07:55:51.579024 Accumulated console time in postcar 52 ms
476 07:55:51.579596
477 07:55:51.579971
478 07:55:51.589016 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 07:55:51.595615 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 07:55:51.599486 WARNING: RO_VPD is uninitialized or empty.
481 07:55:51.602535 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 07:55:51.609217 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 07:55:51.609808 Normal boot.
484 07:55:51.615342 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 07:55:51.618836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 07:55:51.621739 CBFS @ c08000 size 3f8000
487 07:55:51.629287 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 07:55:51.632031 CBFS: Locating 'cpu_microcode_blob.bin'
489 07:55:51.635350 CBFS: Found @ offset 14700 size 2ec00
490 07:55:51.638944 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 07:55:51.641866 Skip microcode update
492 07:55:51.648381 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 07:55:51.648971 CBFS @ c08000 size 3f8000
494 07:55:51.654831 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 07:55:51.658304 CBFS: Locating 'fsps.bin'
496 07:55:51.661812 CBFS: Found @ offset d1fc0 size 35000
497 07:55:51.687697 Detected 4 core, 8 thread CPU.
498 07:55:51.690891 Setting up SMI for CPU
499 07:55:51.694159 IED base = 0x9ac00000
500 07:55:51.694753 IED size = 0x00400000
501 07:55:51.697586 Will perform SMM setup.
502 07:55:51.704042 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 07:55:51.711130 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 07:55:51.717004 Processing 16 relocs. Offset value of 0x00030000
505 07:55:51.717658 Attempting to start 7 APs
506 07:55:51.723827 Waiting for 10ms after sending INIT.
507 07:55:51.737413 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
508 07:55:51.737995 done.
509 07:55:51.740611 AP: slot 1 apic_id 3.
510 07:55:51.743606 AP: slot 3 apic_id 2.
511 07:55:51.744091 AP: slot 6 apic_id 7.
512 07:55:51.747253 AP: slot 7 apic_id 6.
513 07:55:51.750718 Waiting for 2nd SIPI to complete...done.
514 07:55:51.754038 AP: slot 5 apic_id 5.
515 07:55:51.757322 AP: slot 4 apic_id 4.
516 07:55:51.763658 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 07:55:51.770446 Processing 13 relocs. Offset value of 0x00038000
518 07:55:51.777104 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 07:55:51.780111 Installing SMM handler to 0x9a000000
520 07:55:51.786734 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 07:55:51.792998 Processing 658 relocs. Offset value of 0x9a010000
522 07:55:51.799696 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 07:55:51.802737 Processing 13 relocs. Offset value of 0x9a008000
524 07:55:51.809387 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 07:55:51.816241 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 07:55:51.822721 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 07:55:51.826015 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 07:55:51.832453 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 07:55:51.839307 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 07:55:51.845842 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 07:55:51.852201 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 07:55:51.855422 Clearing SMI status registers
533 07:55:51.855895 SMI_STS: PM1
534 07:55:51.858979 PM1_STS: PWRBTN
535 07:55:51.859452 TCO_STS: SECOND_TO
536 07:55:51.861895 New SMBASE 0x9a000000
537 07:55:51.866247 In relocation handler: CPU 0
538 07:55:51.868491 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 07:55:51.875292 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 07:55:51.875882 Relocation complete.
541 07:55:51.878489 New SMBASE 0x99fff800
542 07:55:51.881844 In relocation handler: CPU 2
543 07:55:51.885172 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 07:55:51.891793 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 07:55:51.892280 Relocation complete.
546 07:55:51.895166 New SMBASE 0x99ffe400
547 07:55:51.898314 In relocation handler: CPU 7
548 07:55:51.901859 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
549 07:55:51.908548 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 07:55:51.909124 Relocation complete.
551 07:55:51.911955 New SMBASE 0x99ffe800
552 07:55:51.914789 In relocation handler: CPU 6
553 07:55:51.918698 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
554 07:55:51.924720 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 07:55:51.925202 Relocation complete.
556 07:55:51.927849 New SMBASE 0x99fff000
557 07:55:51.931375 In relocation handler: CPU 4
558 07:55:51.934682 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 07:55:51.941266 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 07:55:51.941854 Relocation complete.
561 07:55:51.944426 New SMBASE 0x99ffec00
562 07:55:51.947761 In relocation handler: CPU 5
563 07:55:51.951084 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
564 07:55:51.957406 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 07:55:51.958035 Relocation complete.
566 07:55:51.961118 New SMBASE 0x99fff400
567 07:55:51.963889 In relocation handler: CPU 3
568 07:55:51.967467 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
569 07:55:51.973671 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 07:55:51.974184 Relocation complete.
571 07:55:51.977406 New SMBASE 0x99fffc00
572 07:55:51.980544 In relocation handler: CPU 1
573 07:55:51.984269 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
574 07:55:51.987144 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 07:55:51.990293
576 07:55:51.990831 Relocation complete.
577 07:55:51.994169 Initializing CPU #0
578 07:55:51.997673 CPU: vendor Intel device 806ec
579 07:55:52.000326 CPU: family 06, model 8e, stepping 0c
580 07:55:52.003495 Clearing out pending MCEs
581 07:55:52.006718 Setting up local APIC...
582 07:55:52.007199 apic_id: 0x00 done.
583 07:55:52.009933 Turbo is available but hidden
584 07:55:52.013486 Turbo is available and visible
585 07:55:52.016527 VMX status: enabled
586 07:55:52.019863 IA32_FEATURE_CONTROL status: locked
587 07:55:52.020349 Skip microcode update
588 07:55:52.023314
589 07:55:52.023798 CPU #0 initialized
590 07:55:52.026347 Initializing CPU #2
591 07:55:52.026828 Initializing CPU #7
592 07:55:52.029889 Initializing CPU #5
593 07:55:52.033533 Initializing CPU #4
594 07:55:52.036804 CPU: vendor Intel device 806ec
595 07:55:52.039475 CPU: family 06, model 8e, stepping 0c
596 07:55:52.042802 CPU: vendor Intel device 806ec
597 07:55:52.046166 CPU: family 06, model 8e, stepping 0c
598 07:55:52.049429 Clearing out pending MCEs
599 07:55:52.049936 Clearing out pending MCEs
600 07:55:52.052611 Setting up local APIC...
601 07:55:52.055989 Initializing CPU #1
602 07:55:52.056474 Initializing CPU #3
603 07:55:52.059362 CPU: vendor Intel device 806ec
604 07:55:52.066220 CPU: family 06, model 8e, stepping 0c
605 07:55:52.066818 CPU: vendor Intel device 806ec
606 07:55:52.069313
607 07:55:52.072704 CPU: family 06, model 8e, stepping 0c
608 07:55:52.073315 Clearing out pending MCEs
609 07:55:52.075643 Clearing out pending MCEs
610 07:55:52.079236 Setting up local APIC...
611 07:55:52.082589 CPU: vendor Intel device 806ec
612 07:55:52.085432 CPU: family 06, model 8e, stepping 0c
613 07:55:52.088816 Initializing CPU #6
614 07:55:52.092148 Clearing out pending MCEs
615 07:55:52.092651 CPU: vendor Intel device 806ec
616 07:55:52.095686
617 07:55:52.099238 CPU: family 06, model 8e, stepping 0c
618 07:55:52.099825 Setting up local APIC...
619 07:55:52.102139 Setting up local APIC...
620 07:55:52.105684 apic_id: 0x03 done.
621 07:55:52.108798 Setting up local APIC...
622 07:55:52.112215 CPU: vendor Intel device 806ec
623 07:55:52.115192 CPU: family 06, model 8e, stepping 0c
624 07:55:52.115672 Clearing out pending MCEs
625 07:55:52.119002
626 07:55:52.119582 apic_id: 0x04 done.
627 07:55:52.122317 apic_id: 0x05 done.
628 07:55:52.122907 VMX status: enabled
629 07:55:52.125477 VMX status: enabled
630 07:55:52.128374 IA32_FEATURE_CONTROL status: locked
631 07:55:52.131859 IA32_FEATURE_CONTROL status: locked
632 07:55:52.135294 Skip microcode update
633 07:55:52.138756 Skip microcode update
634 07:55:52.139360 CPU #4 initialized
635 07:55:52.141868 CPU #5 initialized
636 07:55:52.145206 Clearing out pending MCEs
637 07:55:52.145855 apic_id: 0x06 done.
638 07:55:52.148008 Setting up local APIC...
639 07:55:52.151564 Setting up local APIC...
640 07:55:52.152049 apic_id: 0x07 done.
641 07:55:52.155009 VMX status: enabled
642 07:55:52.157830 VMX status: enabled
643 07:55:52.161507 IA32_FEATURE_CONTROL status: locked
644 07:55:52.165136 IA32_FEATURE_CONTROL status: locked
645 07:55:52.168341 Skip microcode update
646 07:55:52.168929 Skip microcode update
647 07:55:52.171374 CPU #7 initialized
648 07:55:52.171857 CPU #6 initialized
649 07:55:52.174557 apic_id: 0x02 done.
650 07:55:52.178123 VMX status: enabled
651 07:55:52.178734 VMX status: enabled
652 07:55:52.180980 IA32_FEATURE_CONTROL status: locked
653 07:55:52.184577 IA32_FEATURE_CONTROL status: locked
654 07:55:52.187559 Skip microcode update
655 07:55:52.191182 apic_id: 0x01 done.
656 07:55:52.191668 Skip microcode update
657 07:55:52.194196 CPU #1 initialized
658 07:55:52.198210 CPU #3 initialized
659 07:55:52.198690 VMX status: enabled
660 07:55:52.200614 IA32_FEATURE_CONTROL status: locked
661 07:55:52.204285 Skip microcode update
662 07:55:52.207538 CPU #2 initialized
663 07:55:52.210708 bsp_do_flight_plan done after 457 msecs.
664 07:55:52.214077 CPU: frequency set to 4200 MHz
665 07:55:52.214664 Enabling SMIs.
666 07:55:52.217240 Locking SMM.
667 07:55:52.231689 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
668 07:55:52.234904 CBFS @ c08000 size 3f8000
669 07:55:52.242032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
670 07:55:52.242646 CBFS: Locating 'vbt.bin'
671 07:55:52.245364 CBFS: Found @ offset 5f5c0 size 499
672 07:55:52.248280
673 07:55:52.251698 Found a VBT of 4608 bytes after decompression
674 07:55:52.436333 Display FSP Version Info HOB
675 07:55:52.439677 Reference Code - CPU = 9.0.1e.30
676 07:55:52.442532 uCode Version = 0.0.0.ca
677 07:55:52.445905 TXT ACM version = ff.ff.ff.ffff
678 07:55:52.449303 Display FSP Version Info HOB
679 07:55:52.452557 Reference Code - ME = 9.0.1e.30
680 07:55:52.455293 MEBx version = 0.0.0.0
681 07:55:52.459076 ME Firmware Version = Consumer SKU
682 07:55:52.462126 Display FSP Version Info HOB
683 07:55:52.465175 Reference Code - CML PCH = 9.0.1e.30
684 07:55:52.468820 PCH-CRID Status = Disabled
685 07:55:52.471988 PCH-CRID Original Value = ff.ff.ff.ffff
686 07:55:52.475515 PCH-CRID New Value = ff.ff.ff.ffff
687 07:55:52.478680 OPROM - RST - RAID = ff.ff.ff.ffff
688 07:55:52.481894 ChipsetInit Base Version = ff.ff.ff.ffff
689 07:55:52.488370 ChipsetInit Oem Version = ff.ff.ff.ffff
690 07:55:52.488928 Display FSP Version Info HOB
691 07:55:52.494560 Reference Code - SA - System Agent = 9.0.1e.30
692 07:55:52.497690 Reference Code - MRC = 0.7.1.6c
693 07:55:52.501130 SA - PCIe Version = 9.0.1e.30
694 07:55:52.504168 SA-CRID Status = Disabled
695 07:55:52.507649 SA-CRID Original Value = 0.0.0.c
696 07:55:52.510964 SA-CRID New Value = 0.0.0.c
697 07:55:52.511445 OPROM - VBIOS = ff.ff.ff.ffff
698 07:55:52.514862 RTC Init
699 07:55:52.518039 Set power on after power failure.
700 07:55:52.518555 Disabling Deep S3
701 07:55:52.521129 Disabling Deep S3
702 07:55:52.524852 Disabling Deep S4
703 07:55:52.525332 Disabling Deep S4
704 07:55:52.528248 Disabling Deep S5
705 07:55:52.528825 Disabling Deep S5
706 07:55:52.534418 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
707 07:55:52.538034 Enumerating buses...
708 07:55:52.540804 Show all devs... Before device enumeration.
709 07:55:52.544411 Root Device: enabled 1
710 07:55:52.547291 CPU_CLUSTER: 0: enabled 1
711 07:55:52.547770 DOMAIN: 0000: enabled 1
712 07:55:52.550819 APIC: 00: enabled 1
713 07:55:52.553987 PCI: 00:00.0: enabled 1
714 07:55:52.554598 PCI: 00:02.0: enabled 1
715 07:55:52.557922 PCI: 00:04.0: enabled 0
716 07:55:52.561036 PCI: 00:05.0: enabled 0
717 07:55:52.563766 PCI: 00:12.0: enabled 1
718 07:55:52.564246 PCI: 00:12.5: enabled 0
719 07:55:52.567280 PCI: 00:12.6: enabled 0
720 07:55:52.570125 PCI: 00:14.0: enabled 1
721 07:55:52.573645 PCI: 00:14.1: enabled 0
722 07:55:52.574258 PCI: 00:14.3: enabled 1
723 07:55:52.577097 PCI: 00:14.5: enabled 0
724 07:55:52.580077 PCI: 00:15.0: enabled 1
725 07:55:52.583621 PCI: 00:15.1: enabled 1
726 07:55:52.584103 PCI: 00:15.2: enabled 0
727 07:55:52.586504 PCI: 00:15.3: enabled 0
728 07:55:52.590101 PCI: 00:16.0: enabled 1
729 07:55:52.593135 PCI: 00:16.1: enabled 0
730 07:55:52.593611 PCI: 00:16.2: enabled 0
731 07:55:52.596740 PCI: 00:16.3: enabled 0
732 07:55:52.599661 PCI: 00:16.4: enabled 0
733 07:55:52.603043 PCI: 00:16.5: enabled 0
734 07:55:52.603532 PCI: 00:17.0: enabled 1
735 07:55:52.606575 PCI: 00:19.0: enabled 1
736 07:55:52.609461 PCI: 00:19.1: enabled 0
737 07:55:52.612981 PCI: 00:19.2: enabled 0
738 07:55:52.613460 PCI: 00:1a.0: enabled 0
739 07:55:52.616069 PCI: 00:1c.0: enabled 0
740 07:55:52.619467 PCI: 00:1c.1: enabled 0
741 07:55:52.622934 PCI: 00:1c.2: enabled 0
742 07:55:52.623412 PCI: 00:1c.3: enabled 0
743 07:55:52.625986 PCI: 00:1c.4: enabled 0
744 07:55:52.629699 PCI: 00:1c.5: enabled 0
745 07:55:52.630322 PCI: 00:1c.6: enabled 0
746 07:55:52.632567
747 07:55:52.633142 PCI: 00:1c.7: enabled 0
748 07:55:52.636105 PCI: 00:1d.0: enabled 1
749 07:55:52.639410 PCI: 00:1d.1: enabled 0
750 07:55:52.639992 PCI: 00:1d.2: enabled 0
751 07:55:52.642324
752 07:55:52.642806 PCI: 00:1d.3: enabled 0
753 07:55:52.645813 PCI: 00:1d.4: enabled 0
754 07:55:52.648758 PCI: 00:1d.5: enabled 1
755 07:55:52.649270 PCI: 00:1e.0: enabled 1
756 07:55:52.652311 PCI: 00:1e.1: enabled 0
757 07:55:52.655849 PCI: 00:1e.2: enabled 1
758 07:55:52.658634 PCI: 00:1e.3: enabled 1
759 07:55:52.659120 PCI: 00:1f.0: enabled 1
760 07:55:52.662289 PCI: 00:1f.1: enabled 1
761 07:55:52.665164 PCI: 00:1f.2: enabled 1
762 07:55:52.668859 PCI: 00:1f.3: enabled 1
763 07:55:52.669438 PCI: 00:1f.4: enabled 1
764 07:55:52.671493 PCI: 00:1f.5: enabled 1
765 07:55:52.674686 PCI: 00:1f.6: enabled 0
766 07:55:52.678539 USB0 port 0: enabled 1
767 07:55:52.679122 I2C: 00:15: enabled 1
768 07:55:52.681521 I2C: 00:5d: enabled 1
769 07:55:52.684470 GENERIC: 0.0: enabled 1
770 07:55:52.684954 I2C: 00:1a: enabled 1
771 07:55:52.687791 I2C: 00:38: enabled 1
772 07:55:52.691195 I2C: 00:39: enabled 1
773 07:55:52.691673 I2C: 00:3a: enabled 1
774 07:55:52.694726
775 07:55:52.695207 I2C: 00:3b: enabled 1
776 07:55:52.697896 PCI: 00:00.0: enabled 1
777 07:55:52.701058 SPI: 00: enabled 1
778 07:55:52.701648 SPI: 01: enabled 1
779 07:55:52.704318 PNP: 0c09.0: enabled 1
780 07:55:52.707429 USB2 port 0: enabled 1
781 07:55:52.707911 USB2 port 1: enabled 1
782 07:55:52.710856 USB2 port 2: enabled 0
783 07:55:52.714458 USB2 port 3: enabled 0
784 07:55:52.714940 USB2 port 5: enabled 0
785 07:55:52.717450 USB2 port 6: enabled 1
786 07:55:52.720691 USB2 port 9: enabled 1
787 07:55:52.723879 USB3 port 0: enabled 1
788 07:55:52.724355 USB3 port 1: enabled 1
789 07:55:52.727333 USB3 port 2: enabled 1
790 07:55:52.730761 USB3 port 3: enabled 1
791 07:55:52.731336 USB3 port 4: enabled 0
792 07:55:52.733744 APIC: 03: enabled 1
793 07:55:52.737711 APIC: 01: enabled 1
794 07:55:52.738325 APIC: 02: enabled 1
795 07:55:52.740277 APIC: 04: enabled 1
796 07:55:52.743961 APIC: 05: enabled 1
797 07:55:52.744545 APIC: 07: enabled 1
798 07:55:52.746432 APIC: 06: enabled 1
799 07:55:52.746933 Compare with tree...
800 07:55:52.750166 Root Device: enabled 1
801 07:55:52.753867 CPU_CLUSTER: 0: enabled 1
802 07:55:52.756333 APIC: 00: enabled 1
803 07:55:52.756817 APIC: 03: enabled 1
804 07:55:52.759821 APIC: 01: enabled 1
805 07:55:52.763287 APIC: 02: enabled 1
806 07:55:52.763866 APIC: 04: enabled 1
807 07:55:52.766450 APIC: 05: enabled 1
808 07:55:52.769451 APIC: 07: enabled 1
809 07:55:52.769936 APIC: 06: enabled 1
810 07:55:52.772590
811 07:55:52.773071 DOMAIN: 0000: enabled 1
812 07:55:52.776251 PCI: 00:00.0: enabled 1
813 07:55:52.779568 PCI: 00:02.0: enabled 1
814 07:55:52.782812 PCI: 00:04.0: enabled 0
815 07:55:52.783321 PCI: 00:05.0: enabled 0
816 07:55:52.785931 PCI: 00:12.0: enabled 1
817 07:55:52.789506 PCI: 00:12.5: enabled 0
818 07:55:52.792413 PCI: 00:12.6: enabled 0
819 07:55:52.795470 PCI: 00:14.0: enabled 1
820 07:55:52.795951 USB0 port 0: enabled 1
821 07:55:52.798926
822 07:55:52.799406 USB2 port 0: enabled 1
823 07:55:52.802178 USB2 port 1: enabled 1
824 07:55:52.805356 USB2 port 2: enabled 0
825 07:55:52.809474 USB2 port 3: enabled 0
826 07:55:52.812085 USB2 port 5: enabled 0
827 07:55:52.812565 USB2 port 6: enabled 1
828 07:55:52.815340
829 07:55:52.815817 USB2 port 9: enabled 1
830 07:55:52.818398 USB3 port 0: enabled 1
831 07:55:52.821826 USB3 port 1: enabled 1
832 07:55:52.824946 USB3 port 2: enabled 1
833 07:55:52.828243 USB3 port 3: enabled 1
834 07:55:52.832354 USB3 port 4: enabled 0
835 07:55:52.832936 PCI: 00:14.1: enabled 0
836 07:55:52.835518 PCI: 00:14.3: enabled 1
837 07:55:52.838761 PCI: 00:14.5: enabled 0
838 07:55:52.841677 PCI: 00:15.0: enabled 1
839 07:55:52.842283 I2C: 00:15: enabled 1
840 07:55:52.844863
841 07:55:52.845449 PCI: 00:15.1: enabled 1
842 07:55:52.847881 I2C: 00:5d: enabled 1
843 07:55:52.851641 GENERIC: 0.0: enabled 1
844 07:55:52.854366 PCI: 00:15.2: enabled 0
845 07:55:52.854849 PCI: 00:15.3: enabled 0
846 07:55:52.857945
847 07:55:52.858543 PCI: 00:16.0: enabled 1
848 07:55:52.861345 PCI: 00:16.1: enabled 0
849 07:55:52.864394 PCI: 00:16.2: enabled 0
850 07:55:52.867831 PCI: 00:16.3: enabled 0
851 07:55:52.868415 PCI: 00:16.4: enabled 0
852 07:55:52.871107
853 07:55:52.871691 PCI: 00:16.5: enabled 0
854 07:55:52.874317 PCI: 00:17.0: enabled 1
855 07:55:52.877850 PCI: 00:19.0: enabled 1
856 07:55:52.880808 I2C: 00:1a: enabled 1
857 07:55:52.881289 I2C: 00:38: enabled 1
858 07:55:52.884393 I2C: 00:39: enabled 1
859 07:55:52.887415 I2C: 00:3a: enabled 1
860 07:55:52.890581 I2C: 00:3b: enabled 1
861 07:55:52.893744 PCI: 00:19.1: enabled 0
862 07:55:52.894259 PCI: 00:19.2: enabled 0
863 07:55:52.896928 PCI: 00:1a.0: enabled 0
864 07:55:52.900191 PCI: 00:1c.0: enabled 0
865 07:55:52.904239 PCI: 00:1c.1: enabled 0
866 07:55:52.907125 PCI: 00:1c.2: enabled 0
867 07:55:52.907606 PCI: 00:1c.3: enabled 0
868 07:55:52.909991 PCI: 00:1c.4: enabled 0
869 07:55:52.913483 PCI: 00:1c.5: enabled 0
870 07:55:52.916534 PCI: 00:1c.6: enabled 0
871 07:55:52.920525 PCI: 00:1c.7: enabled 0
872 07:55:52.921005 PCI: 00:1d.0: enabled 1
873 07:55:52.923383 PCI: 00:1d.1: enabled 0
874 07:55:52.926564 PCI: 00:1d.2: enabled 0
875 07:55:52.930216 PCI: 00:1d.3: enabled 0
876 07:55:52.933196 PCI: 00:1d.4: enabled 0
877 07:55:52.933681 PCI: 00:1d.5: enabled 1
878 07:55:52.936501 PCI: 00:00.0: enabled 1
879 07:55:52.939852 PCI: 00:1e.0: enabled 1
880 07:55:52.943023 PCI: 00:1e.1: enabled 0
881 07:55:52.946255 PCI: 00:1e.2: enabled 1
882 07:55:52.946735 SPI: 00: enabled 1
883 07:55:52.949336 PCI: 00:1e.3: enabled 1
884 07:55:52.953020 SPI: 01: enabled 1
885 07:55:52.956243 PCI: 00:1f.0: enabled 1
886 07:55:52.956722 PNP: 0c09.0: enabled 1
887 07:55:52.959261 PCI: 00:1f.1: enabled 1
888 07:55:52.962420 PCI: 00:1f.2: enabled 1
889 07:55:52.965718 PCI: 00:1f.3: enabled 1
890 07:55:52.969175 PCI: 00:1f.4: enabled 1
891 07:55:52.969756 PCI: 00:1f.5: enabled 1
892 07:55:52.972334 PCI: 00:1f.6: enabled 0
893 07:55:52.975908 Root Device scanning...
894 07:55:52.978615 scan_static_bus for Root Device
895 07:55:52.982467 CPU_CLUSTER: 0 enabled
896 07:55:52.983066 DOMAIN: 0000 enabled
897 07:55:52.985425 DOMAIN: 0000 scanning...
898 07:55:52.988693 PCI: pci_scan_bus for bus 00
899 07:55:52.991920 PCI: 00:00.0 [8086/0000] ops
900 07:55:52.995066 PCI: 00:00.0 [8086/9b61] enabled
901 07:55:52.998525 PCI: 00:02.0 [8086/0000] bus ops
902 07:55:53.001756 PCI: 00:02.0 [8086/9b41] enabled
903 07:55:53.004956 PCI: 00:04.0 [8086/1903] disabled
904 07:55:53.008373 PCI: 00:08.0 [8086/1911] enabled
905 07:55:53.012006 PCI: 00:12.0 [8086/02f9] enabled
906 07:55:53.014994 PCI: 00:14.0 [8086/0000] bus ops
907 07:55:53.018369 PCI: 00:14.0 [8086/02ed] enabled
908 07:55:53.021345 PCI: 00:14.2 [8086/02ef] enabled
909 07:55:53.024743 PCI: 00:14.3 [8086/02f0] enabled
910 07:55:53.028022 PCI: 00:15.0 [8086/0000] bus ops
911 07:55:53.031376 PCI: 00:15.0 [8086/02e8] enabled
912 07:55:53.034652 PCI: 00:15.1 [8086/0000] bus ops
913 07:55:53.038026 PCI: 00:15.1 [8086/02e9] enabled
914 07:55:53.041304 PCI: 00:16.0 [8086/0000] ops
915 07:55:53.044290 PCI: 00:16.0 [8086/02e0] enabled
916 07:55:53.047750 PCI: 00:17.0 [8086/0000] ops
917 07:55:53.050948 PCI: 00:17.0 [8086/02d3] enabled
918 07:55:53.053893 PCI: 00:19.0 [8086/0000] bus ops
919 07:55:53.057546 PCI: 00:19.0 [8086/02c5] enabled
920 07:55:53.060561 PCI: 00:1d.0 [8086/0000] bus ops
921 07:55:53.064263 PCI: 00:1d.0 [8086/02b0] enabled
922 07:55:53.070732 PCI: Static device PCI: 00:1d.5 not found, disabling it.
923 07:55:53.073886 PCI: 00:1e.0 [8086/0000] ops
924 07:55:53.077085 PCI: 00:1e.0 [8086/02a8] enabled
925 07:55:53.080016 PCI: 00:1e.2 [8086/0000] bus ops
926 07:55:53.083918 PCI: 00:1e.2 [8086/02aa] enabled
927 07:55:53.086719 PCI: 00:1e.3 [8086/0000] bus ops
928 07:55:53.090078 PCI: 00:1e.3 [8086/02ab] enabled
929 07:55:53.093363 PCI: 00:1f.0 [8086/0000] bus ops
930 07:55:53.096662 PCI: 00:1f.0 [8086/0284] enabled
931 07:55:53.102997 PCI: Static device PCI: 00:1f.1 not found, disabling it.
932 07:55:53.109808 PCI: Static device PCI: 00:1f.2 not found, disabling it.
933 07:55:53.113103 PCI: 00:1f.3 [8086/0000] bus ops
934 07:55:53.116167 PCI: 00:1f.3 [8086/02c8] enabled
935 07:55:53.119295 PCI: 00:1f.4 [8086/0000] bus ops
936 07:55:53.122431 PCI: 00:1f.4 [8086/02a3] enabled
937 07:55:53.125931 PCI: 00:1f.5 [8086/0000] bus ops
938 07:55:53.129294 PCI: 00:1f.5 [8086/02a4] enabled
939 07:55:53.132366 PCI: Leftover static devices:
940 07:55:53.132846 PCI: 00:05.0
941 07:55:53.133220 PCI: 00:12.5
942 07:55:53.135843 PCI: 00:12.6
943 07:55:53.136322 PCI: 00:14.1
944 07:55:53.138786 PCI: 00:14.5
945 07:55:53.139270 PCI: 00:15.2
946 07:55:53.142311 PCI: 00:15.3
947 07:55:53.142883 PCI: 00:16.1
948 07:55:53.143263 PCI: 00:16.2
949 07:55:53.145677 PCI: 00:16.3
950 07:55:53.146294 PCI: 00:16.4
951 07:55:53.148910 PCI: 00:16.5
952 07:55:53.149486 PCI: 00:19.1
953 07:55:53.149863 PCI: 00:19.2
954 07:55:53.151854 PCI: 00:1a.0
955 07:55:53.152379 PCI: 00:1c.0
956 07:55:53.155029 PCI: 00:1c.1
957 07:55:53.155513 PCI: 00:1c.2
958 07:55:53.158966 PCI: 00:1c.3
959 07:55:53.159448 PCI: 00:1c.4
960 07:55:53.159820 PCI: 00:1c.5
961 07:55:53.161873 PCI: 00:1c.6
962 07:55:53.162433 PCI: 00:1c.7
963 07:55:53.164710 PCI: 00:1d.1
964 07:55:53.165195 PCI: 00:1d.2
965 07:55:53.165569 PCI: 00:1d.3
966 07:55:53.168190 PCI: 00:1d.4
967 07:55:53.168776 PCI: 00:1d.5
968 07:55:53.171205 PCI: 00:1e.1
969 07:55:53.171737 PCI: 00:1f.1
970 07:55:53.174721 PCI: 00:1f.2
971 07:55:53.175206 PCI: 00:1f.6
972 07:55:53.178321 PCI: Check your devicetree.cb.
973 07:55:53.181558 PCI: 00:02.0 scanning...
974 07:55:53.184242 scan_generic_bus for PCI: 00:02.0
975 07:55:53.187507 scan_generic_bus for PCI: 00:02.0 done
976 07:55:53.194248 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
977 07:55:53.197685 PCI: 00:14.0 scanning...
978 07:55:53.200698 scan_static_bus for PCI: 00:14.0
979 07:55:53.201186 USB0 port 0 enabled
980 07:55:53.204165 USB0 port 0 scanning...
981 07:55:53.207185 scan_static_bus for USB0 port 0
982 07:55:53.210686 USB2 port 0 enabled
983 07:55:53.211263 USB2 port 1 enabled
984 07:55:53.213826 USB2 port 2 disabled
985 07:55:53.217059 USB2 port 3 disabled
986 07:55:53.217649 USB2 port 5 disabled
987 07:55:53.220064 USB2 port 6 enabled
988 07:55:53.223498 USB2 port 9 enabled
989 07:55:53.223983 USB3 port 0 enabled
990 07:55:53.226781 USB3 port 1 enabled
991 07:55:53.227260 USB3 port 2 enabled
992 07:55:53.229896 USB3 port 3 enabled
993 07:55:53.232811 USB3 port 4 disabled
994 07:55:53.232897 USB2 port 0 scanning...
995 07:55:53.236267
996 07:55:53.239298 scan_static_bus for USB2 port 0
997 07:55:53.243210 scan_static_bus for USB2 port 0 done
998 07:55:53.246488 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
999 07:55:53.249229 USB2 port 1 scanning...
1000 07:55:53.252507 scan_static_bus for USB2 port 1
1001 07:55:53.255739 scan_static_bus for USB2 port 1 done
1002 07:55:53.262641 scan_bus: scanning of bus USB2 port 1 took 9697 usecs
1003 07:55:53.265363 USB2 port 6 scanning...
1004 07:55:53.269181 scan_static_bus for USB2 port 6
1005 07:55:53.271988 scan_static_bus for USB2 port 6 done
1006 07:55:53.278662 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
1007 07:55:53.278903 USB2 port 9 scanning...
1008 07:55:53.282194 scan_static_bus for USB2 port 9
1009 07:55:53.288897 scan_static_bus for USB2 port 9 done
1010 07:55:53.292053 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
1011 07:55:53.295204 USB3 port 0 scanning...
1012 07:55:53.298283 scan_static_bus for USB3 port 0
1013 07:55:53.301810 scan_static_bus for USB3 port 0 done
1014 07:55:53.308340 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
1015 07:55:53.308914 USB3 port 1 scanning...
1016 07:55:53.312542 scan_static_bus for USB3 port 1
1017 07:55:53.318456 scan_static_bus for USB3 port 1 done
1018 07:55:53.321941 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
1019 07:55:53.325011 USB3 port 2 scanning...
1020 07:55:53.328210 scan_static_bus for USB3 port 2
1021 07:55:53.331602 scan_static_bus for USB3 port 2 done
1022 07:55:53.338110 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
1023 07:55:53.340966 USB3 port 3 scanning...
1024 07:55:53.344890 scan_static_bus for USB3 port 3
1025 07:55:53.347958 scan_static_bus for USB3 port 3 done
1026 07:55:53.351104 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
1027 07:55:53.357620 scan_static_bus for USB0 port 0 done
1028 07:55:53.360613 scan_bus: scanning of bus USB0 port 0 took 155312 usecs
1029 07:55:53.363763 scan_static_bus for PCI: 00:14.0 done
1030 07:55:53.370722 scan_bus: scanning of bus PCI: 00:14.0 took 172925 usecs
1031 07:55:53.373803 PCI: 00:15.0 scanning...
1032 07:55:53.376916 scan_generic_bus for PCI: 00:15.0
1033 07:55:53.380401 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1034 07:55:53.383915 scan_generic_bus for PCI: 00:15.0 done
1035 07:55:53.389938 scan_bus: scanning of bus PCI: 00:15.0 took 14290 usecs
1036 07:55:53.393502 PCI: 00:15.1 scanning...
1037 07:55:53.396664 scan_generic_bus for PCI: 00:15.1
1038 07:55:53.399983 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1039 07:55:53.406653 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1040 07:55:53.409568 scan_generic_bus for PCI: 00:15.1 done
1041 07:55:53.416381 scan_bus: scanning of bus PCI: 00:15.1 took 18586 usecs
1042 07:55:53.416692 PCI: 00:19.0 scanning...
1043 07:55:53.419519 scan_generic_bus for PCI: 00:19.0
1044 07:55:53.426211 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1045 07:55:53.429410 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1046 07:55:53.432800 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1047 07:55:53.436407 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1048 07:55:53.442855 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1049 07:55:53.446007 scan_generic_bus for PCI: 00:19.0 done
1050 07:55:53.452665 scan_bus: scanning of bus PCI: 00:19.0 took 30694 usecs
1051 07:55:53.453148 PCI: 00:1d.0 scanning...
1052 07:55:53.456122 do_pci_scan_bridge for PCI: 00:1d.0
1053 07:55:53.459451
1054 07:55:53.460030 PCI: pci_scan_bus for bus 01
1055 07:55:53.462332 PCI: 01:00.0 [1c5c/1327] enabled
1056 07:55:53.468921 Enabling Common Clock Configuration
1057 07:55:53.472299 L1 Sub-State supported from root port 29
1058 07:55:53.475574 L1 Sub-State Support = 0xf
1059 07:55:53.478675 CommonModeRestoreTime = 0x28
1060 07:55:53.482375 Power On Value = 0x16, Power On Scale = 0x0
1061 07:55:53.482953 ASPM: Enabled L1
1062 07:55:53.489014 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1063 07:55:53.492497 PCI: 00:1e.2 scanning...
1064 07:55:53.495140 scan_generic_bus for PCI: 00:1e.2
1065 07:55:53.498453 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1066 07:55:53.501914 scan_generic_bus for PCI: 00:1e.2 done
1067 07:55:53.508518 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1068 07:55:53.511612 PCI: 00:1e.3 scanning...
1069 07:55:53.514855 scan_generic_bus for PCI: 00:1e.3
1070 07:55:53.518205 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1071 07:55:53.521535 scan_generic_bus for PCI: 00:1e.3 done
1072 07:55:53.527803 scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
1073 07:55:53.531267 PCI: 00:1f.0 scanning...
1074 07:55:53.534652 scan_static_bus for PCI: 00:1f.0
1075 07:55:53.537660 PNP: 0c09.0 enabled
1076 07:55:53.541238 scan_static_bus for PCI: 00:1f.0 done
1077 07:55:53.544199 scan_bus: scanning of bus PCI: 00:1f.0 took 12036 usecs
1078 07:55:53.547326 PCI: 00:1f.3 scanning...
1079 07:55:53.554210 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1080 07:55:53.557771 PCI: 00:1f.4 scanning...
1081 07:55:53.560560 scan_generic_bus for PCI: 00:1f.4
1082 07:55:53.564231 scan_generic_bus for PCI: 00:1f.4 done
1083 07:55:53.570506 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1084 07:55:53.571105 PCI: 00:1f.5 scanning...
1085 07:55:53.573514
1086 07:55:53.576761 scan_generic_bus for PCI: 00:1f.5
1087 07:55:53.580341 scan_generic_bus for PCI: 00:1f.5 done
1088 07:55:53.586549 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1089 07:55:53.589934 scan_bus: scanning of bus DOMAIN: 0000 took 604760 usecs
1090 07:55:53.593277 scan_static_bus for Root Device done
1091 07:55:53.599485 scan_bus: scanning of bus Root Device took 624636 usecs
1092 07:55:53.599964 done
1093 07:55:53.603392 Chrome EC: UHEPI supported
1094 07:55:53.609764 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1095 07:55:53.615910 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1096 07:55:53.622847 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1097 07:55:53.629093 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1098 07:55:53.632184 SPI flash protection: WPSW=0 SRP0=0
1099 07:55:53.639279 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1100 07:55:53.641997 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1101 07:55:53.645684 found VGA at PCI: 00:02.0
1102 07:55:53.648563 Setting up VGA for PCI: 00:02.0
1103 07:55:53.655561 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1104 07:55:53.658849 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1105 07:55:53.662092 Allocating resources...
1106 07:55:53.662685 Reading resources...
1107 07:55:53.668266 Root Device read_resources bus 0 link: 0
1108 07:55:53.671738 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1109 07:55:53.678830 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1110 07:55:53.681435 DOMAIN: 0000 read_resources bus 0 link: 0
1111 07:55:53.688327 PCI: 00:14.0 read_resources bus 0 link: 0
1112 07:55:53.691713 USB0 port 0 read_resources bus 0 link: 0
1113 07:55:53.699796 USB0 port 0 read_resources bus 0 link: 0 done
1114 07:55:53.703603 PCI: 00:14.0 read_resources bus 0 link: 0 done
1115 07:55:53.710867 PCI: 00:15.0 read_resources bus 1 link: 0
1116 07:55:53.713885 PCI: 00:15.0 read_resources bus 1 link: 0 done
1117 07:55:53.720433 PCI: 00:15.1 read_resources bus 2 link: 0
1118 07:55:53.723965 PCI: 00:15.1 read_resources bus 2 link: 0 done
1119 07:55:53.731269 PCI: 00:19.0 read_resources bus 3 link: 0
1120 07:55:53.738325 PCI: 00:19.0 read_resources bus 3 link: 0 done
1121 07:55:53.741937 PCI: 00:1d.0 read_resources bus 1 link: 0
1122 07:55:53.747689 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1123 07:55:53.750858 PCI: 00:1e.2 read_resources bus 4 link: 0
1124 07:55:53.757653 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1125 07:55:53.760755 PCI: 00:1e.3 read_resources bus 5 link: 0
1126 07:55:53.767569 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1127 07:55:53.770922 PCI: 00:1f.0 read_resources bus 0 link: 0
1128 07:55:53.777566 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1129 07:55:53.783788 DOMAIN: 0000 read_resources bus 0 link: 0 done
1130 07:55:53.787218 Root Device read_resources bus 0 link: 0 done
1131 07:55:53.789982 Done reading resources.
1132 07:55:53.796613 Show resources in subtree (Root Device)...After reading.
1133 07:55:53.799946 Root Device child on link 0 CPU_CLUSTER: 0
1134 07:55:53.803851 CPU_CLUSTER: 0 child on link 0 APIC: 00
1135 07:55:53.806607 APIC: 00
1136 07:55:53.807091 APIC: 03
1137 07:55:53.807467 APIC: 01
1138 07:55:53.810028
1139 07:55:53.810649 APIC: 02
1140 07:55:53.811033 APIC: 04
1141 07:55:53.813551 APIC: 05
1142 07:55:53.814199 APIC: 07
1143 07:55:53.814588 APIC: 06
1144 07:55:53.866490 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 07:55:53.867076 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 07:55:53.867886 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1147 07:55:53.868284 PCI: 00:00.0
1148 07:55:53.868710 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 07:55:53.869079 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 07:55:53.914300 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 07:55:53.914877 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 07:55:53.915664 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 07:55:53.916060 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 07:55:53.916420 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 07:55:53.918223 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 07:55:53.924813 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 07:55:53.931574 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1158 07:55:53.941473 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1159 07:55:53.951000 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1160 07:55:53.961169 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1161 07:55:53.971051 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1162 07:55:53.980549 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1163 07:55:53.990216 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1164 07:55:53.990790 PCI: 00:02.0
1165 07:55:54.000446 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1166 07:55:54.013305 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1167 07:55:54.019567 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1168 07:55:54.022817 PCI: 00:04.0
1169 07:55:54.023301 PCI: 00:08.0
1170 07:55:54.032792 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 07:55:54.036262 PCI: 00:12.0
1172 07:55:54.045999 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 07:55:54.049020 PCI: 00:14.0 child on link 0 USB0 port 0
1174 07:55:54.059211 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 07:55:54.062141 USB0 port 0 child on link 0 USB2 port 0
1176 07:55:54.066129 USB2 port 0
1177 07:55:54.066711 USB2 port 1
1178 07:55:54.068998
1179 07:55:54.069571 USB2 port 2
1180 07:55:54.072428 USB2 port 3
1181 07:55:54.073009 USB2 port 5
1182 07:55:54.075790 USB2 port 6
1183 07:55:54.076378 USB2 port 9
1184 07:55:54.078740 USB3 port 0
1185 07:55:54.079336 USB3 port 1
1186 07:55:54.081835 USB3 port 2
1187 07:55:54.082358 USB3 port 3
1188 07:55:54.085155 USB3 port 4
1189 07:55:54.085652 PCI: 00:14.2
1190 07:55:54.095201 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1191 07:55:54.105180 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 07:55:54.108132 PCI: 00:14.3
1193 07:55:54.117651 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 07:55:54.121367 PCI: 00:15.0 child on link 0 I2C: 01:15
1195 07:55:54.130876 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 07:55:54.134572 I2C: 01:15
1197 07:55:54.137509 PCI: 00:15.1 child on link 0 I2C: 02:5d
1198 07:55:54.147493 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 07:55:54.150169 I2C: 02:5d
1200 07:55:54.150658 GENERIC: 0.0
1201 07:55:54.153723 PCI: 00:16.0
1202 07:55:54.163296 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 07:55:54.163879 PCI: 00:17.0
1204 07:55:54.173359 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1205 07:55:54.183118 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1206 07:55:54.189842 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1207 07:55:54.199560 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1208 07:55:54.205999 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1209 07:55:54.215925 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1210 07:55:54.219040 PCI: 00:19.0 child on link 0 I2C: 03:1a
1211 07:55:54.228872 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 07:55:54.232325
1213 07:55:54.232928 I2C: 03:1a
1214 07:55:54.233324 I2C: 03:38
1215 07:55:54.235077 I2C: 03:39
1216 07:55:54.235561 I2C: 03:3a
1217 07:55:54.238890 I2C: 03:3b
1218 07:55:54.242242 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1219 07:55:54.251879 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1220 07:55:54.261655 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1221 07:55:54.271340 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1222 07:55:54.271930 PCI: 01:00.0
1223 07:55:54.281042 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 07:55:54.284253 PCI: 00:1e.0
1225 07:55:54.293922 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1226 07:55:54.304133 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1227 07:55:54.307318 PCI: 00:1e.2 child on link 0 SPI: 00
1228 07:55:54.316874 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 07:55:54.320587 SPI: 00
1230 07:55:54.323141 PCI: 00:1e.3 child on link 0 SPI: 01
1231 07:55:54.333168 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 07:55:54.336824 SPI: 01
1233 07:55:54.339938 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1234 07:55:54.349271 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1235 07:55:54.356254 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1236 07:55:54.359048 PNP: 0c09.0
1237 07:55:54.365783 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1238 07:55:54.369369 PCI: 00:1f.3
1239 07:55:54.378968 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1240 07:55:54.388760 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1241 07:55:54.391882 PCI: 00:1f.4
1242 07:55:54.398778 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1243 07:55:54.408801 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1244 07:55:54.411840 PCI: 00:1f.5
1245 07:55:54.421555 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 07:55:54.427949 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1247 07:55:54.434810 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1248 07:55:54.441536 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1249 07:55:54.444602 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1250 07:55:54.447947 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1251 07:55:54.450846 PCI: 00:17.0 18 * [0x60 - 0x67] io
1252 07:55:54.454243 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1253 07:55:54.460712 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1254 07:55:54.467600 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1255 07:55:54.476963 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1256 07:55:54.483683 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1257 07:55:54.490245 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1258 07:55:54.493201 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 07:55:54.503333 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1260 07:55:54.506446 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1261 07:55:54.513117 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1262 07:55:54.516245 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1263 07:55:54.522782 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1264 07:55:54.526207 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1265 07:55:54.532372 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1266 07:55:54.535648 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1267 07:55:54.542421 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1268 07:55:54.545406 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1269 07:55:54.552434 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1270 07:55:54.555092 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1271 07:55:54.561893 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1272 07:55:54.565393 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1273 07:55:54.571286 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1274 07:55:54.574944 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1275 07:55:54.581507 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1276 07:55:54.584316 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1277 07:55:54.590860 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1278 07:55:54.594249 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1279 07:55:54.601031 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1280 07:55:54.604071 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1281 07:55:54.610704 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1282 07:55:54.614114 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1283 07:55:54.624040 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1284 07:55:54.627110 avoid_fixed_resources: DOMAIN: 0000
1285 07:55:54.633533 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1286 07:55:54.636967 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1287 07:55:54.646945 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1288 07:55:54.653331 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1289 07:55:54.659452 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1290 07:55:54.669529 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1291 07:55:54.676051 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1292 07:55:54.682573 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1293 07:55:54.692056 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1294 07:55:54.699281 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1295 07:55:54.705389 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1296 07:55:54.715391 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1297 07:55:54.715953 Setting resources...
1298 07:55:54.721822 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1299 07:55:54.724986 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1300 07:55:54.731346 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1301 07:55:54.734939 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1302 07:55:54.738255 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1303 07:55:54.744803 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1304 07:55:54.750812 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1305 07:55:54.758279 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1306 07:55:54.764184 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1307 07:55:54.771168 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1308 07:55:54.774143 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1309 07:55:54.780784 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1310 07:55:54.783687 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1311 07:55:54.790839 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1312 07:55:54.794152 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1313 07:55:54.799818 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1314 07:55:54.803703 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1315 07:55:54.809971 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1316 07:55:54.813206 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1317 07:55:54.819904 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1318 07:55:54.822882 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1319 07:55:54.829738 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1320 07:55:54.833108 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1321 07:55:54.839087 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1322 07:55:54.842892 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1323 07:55:54.846413 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1324 07:55:54.848901
1325 07:55:54.852413 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1326 07:55:54.855563 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1327 07:55:54.858958
1328 07:55:54.862137 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1329 07:55:54.865572 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1330 07:55:54.871909 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1331 07:55:54.875610 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1332 07:55:54.884949 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1333 07:55:54.891705 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1334 07:55:54.897850 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1335 07:55:54.907585 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1336 07:55:54.910973 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1337 07:55:54.917673 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1338 07:55:54.924210 Root Device assign_resources, bus 0 link: 0
1339 07:55:54.928107 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 07:55:54.937276 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1341 07:55:54.944003 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1342 07:55:54.954316 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1343 07:55:54.960501 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1344 07:55:54.969640 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1345 07:55:54.976537 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1346 07:55:54.982780 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 07:55:54.986148 PCI: 00:14.0 assign_resources, bus 0 link: 0
1348 07:55:54.996095 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1349 07:55:55.002319 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1350 07:55:55.012588 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1351 07:55:55.019271 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1352 07:55:55.022723 PCI: 00:15.0 assign_resources, bus 1 link: 0
1353 07:55:55.029269 PCI: 00:15.0 assign_resources, bus 1 link: 0
1354 07:55:55.035531 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1355 07:55:55.042173 PCI: 00:15.1 assign_resources, bus 2 link: 0
1356 07:55:55.045656 PCI: 00:15.1 assign_resources, bus 2 link: 0
1357 07:55:55.055572 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1358 07:55:55.062380 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1359 07:55:55.071698 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1360 07:55:55.078113 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1361 07:55:55.084477 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1362 07:55:55.094281 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1363 07:55:55.100692 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1364 07:55:55.111008 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1365 07:55:55.114209 PCI: 00:19.0 assign_resources, bus 3 link: 0
1366 07:55:55.117292 PCI: 00:19.0 assign_resources, bus 3 link: 0
1367 07:55:55.127088 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1368 07:55:55.137436 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 07:55:55.143506 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1370 07:55:55.150302 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 07:55:55.156843 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1372 07:55:55.163355 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1373 07:55:55.169676 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1374 07:55:55.179715 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1375 07:55:55.182964 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1376 07:55:55.189064 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1377 07:55:55.195898 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1378 07:55:55.198990 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1379 07:55:55.202113
1380 07:55:55.206016 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1381 07:55:55.209376 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 07:55:55.215847 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 07:55:55.219273 LPC: Trying to open IO window from 800 size 1ff
1384 07:55:55.229376 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1385 07:55:55.235833 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1386 07:55:55.245614 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1387 07:55:55.251973 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1388 07:55:55.258250 DOMAIN: 0000 assign_resources, bus 0 link: 0
1389 07:55:55.262197 Root Device assign_resources, bus 0 link: 0
1390 07:55:55.265001 Done setting resources.
1391 07:55:55.271605 Show resources in subtree (Root Device)...After assigning values.
1392 07:55:55.275026 Root Device child on link 0 CPU_CLUSTER: 0
1393 07:55:55.281398 CPU_CLUSTER: 0 child on link 0 APIC: 00
1394 07:55:55.281973 APIC: 00
1395 07:55:55.282381 APIC: 03
1396 07:55:55.285072 APIC: 01
1397 07:55:55.285663 APIC: 02
1398 07:55:55.287778 APIC: 04
1399 07:55:55.288260 APIC: 05
1400 07:55:55.288637 APIC: 07
1401 07:55:55.291109 APIC: 06
1402 07:55:55.294395 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1403 07:55:55.304383 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1404 07:55:55.314286 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1405 07:55:55.317752 PCI: 00:00.0
1406 07:55:55.327649 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1407 07:55:55.337334 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1408 07:55:55.346626 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1409 07:55:55.352744 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1410 07:55:55.356638
1411 07:55:55.362982 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1412 07:55:55.372797 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1413 07:55:55.382106 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1414 07:55:55.392315 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1415 07:55:55.401878 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1416 07:55:55.411654 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1417 07:55:55.418257 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1418 07:55:55.428270 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1419 07:55:55.437814 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1420 07:55:55.447888 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1421 07:55:55.457174 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1422 07:55:55.467534 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1423 07:55:55.468133 PCI: 00:02.0
1424 07:55:55.470595
1425 07:55:55.480002 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1426 07:55:55.489690 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1427 07:55:55.499366 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1428 07:55:55.500021 PCI: 00:04.0
1429 07:55:55.502865 PCI: 00:08.0
1430 07:55:55.512690 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1431 07:55:55.513287 PCI: 00:12.0
1432 07:55:55.516084
1433 07:55:55.526250 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1434 07:55:55.529494 PCI: 00:14.0 child on link 0 USB0 port 0
1435 07:55:55.539247 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1436 07:55:55.545943 USB0 port 0 child on link 0 USB2 port 0
1437 07:55:55.546545 USB2 port 0
1438 07:55:55.549073 USB2 port 1
1439 07:55:55.549656 USB2 port 2
1440 07:55:55.552085 USB2 port 3
1441 07:55:55.552669 USB2 port 5
1442 07:55:55.554857 USB2 port 6
1443 07:55:55.555346 USB2 port 9
1444 07:55:55.558152 USB3 port 0
1445 07:55:55.558735 USB3 port 1
1446 07:55:55.561719 USB3 port 2
1447 07:55:55.562236 USB3 port 3
1448 07:55:55.565036 USB3 port 4
1449 07:55:55.568586 PCI: 00:14.2
1450 07:55:55.578012 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1451 07:55:55.587606 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1452 07:55:55.588278 PCI: 00:14.3
1453 07:55:55.600559 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1454 07:55:55.603888 PCI: 00:15.0 child on link 0 I2C: 01:15
1455 07:55:55.613793 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1456 07:55:55.614414 I2C: 01:15
1457 07:55:55.620870 PCI: 00:15.1 child on link 0 I2C: 02:5d
1458 07:55:55.630168 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1459 07:55:55.630737 I2C: 02:5d
1460 07:55:55.633440 GENERIC: 0.0
1461 07:55:55.633918 PCI: 00:16.0
1462 07:55:55.636450
1463 07:55:55.645931 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1464 07:55:55.646022 PCI: 00:17.0
1465 07:55:55.655649 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1466 07:55:55.665652 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1467 07:55:55.675194 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1468 07:55:55.685594 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1469 07:55:55.695034 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1470 07:55:55.704751 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1471 07:55:55.707811 PCI: 00:19.0 child on link 0 I2C: 03:1a
1472 07:55:55.717599 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1473 07:55:55.721919 I2C: 03:1a
1474 07:55:55.722537 I2C: 03:38
1475 07:55:55.724190 I2C: 03:39
1476 07:55:55.724666 I2C: 03:3a
1477 07:55:55.727656 I2C: 03:3b
1478 07:55:55.731160 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1479 07:55:55.740991 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1480 07:55:55.750682 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1481 07:55:55.760207 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1482 07:55:55.763562 PCI: 01:00.0
1483 07:55:55.773635 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1484 07:55:55.777214 PCI: 00:1e.0
1485 07:55:55.786315 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1486 07:55:55.796566 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1487 07:55:55.799641 PCI: 00:1e.2 child on link 0 SPI: 00
1488 07:55:55.809085 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1489 07:55:55.812673
1490 07:55:55.813248 SPI: 00
1491 07:55:55.815508 PCI: 00:1e.3 child on link 0 SPI: 01
1492 07:55:55.825776 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1493 07:55:55.829132 SPI: 01
1494 07:55:55.832005 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1495 07:55:55.842339 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1496 07:55:55.848302 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1497 07:55:55.851817 PNP: 0c09.0
1498 07:55:55.861664 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 07:55:55.862289 PCI: 00:1f.3
1500 07:55:55.871281 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1501 07:55:55.881123 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1502 07:55:55.884429
1503 07:55:55.885013 PCI: 00:1f.4
1504 07:55:55.894324 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1505 07:55:55.903743 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1506 07:55:55.904350 PCI: 00:1f.5
1507 07:55:55.916913 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1508 07:55:55.917506 Done allocating resources.
1509 07:55:55.923210 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1510 07:55:55.926743 Enabling resources...
1511 07:55:55.929673 PCI: 00:00.0 subsystem <- 8086/9b61
1512 07:55:55.933179 PCI: 00:00.0 cmd <- 06
1513 07:55:55.936380 PCI: 00:02.0 subsystem <- 8086/9b41
1514 07:55:55.939844 PCI: 00:02.0 cmd <- 03
1515 07:55:55.942786 PCI: 00:08.0 cmd <- 06
1516 07:55:55.946315 PCI: 00:12.0 subsystem <- 8086/02f9
1517 07:55:55.949569 PCI: 00:12.0 cmd <- 02
1518 07:55:55.952443 PCI: 00:14.0 subsystem <- 8086/02ed
1519 07:55:55.956092 PCI: 00:14.0 cmd <- 02
1520 07:55:55.956678 PCI: 00:14.2 cmd <- 02
1521 07:55:55.962680 PCI: 00:14.3 subsystem <- 8086/02f0
1522 07:55:55.963280 PCI: 00:14.3 cmd <- 02
1523 07:55:55.965783 PCI: 00:15.0 subsystem <- 8086/02e8
1524 07:55:55.969253
1525 07:55:55.969842 PCI: 00:15.0 cmd <- 02
1526 07:55:55.972523 PCI: 00:15.1 subsystem <- 8086/02e9
1527 07:55:55.975933 PCI: 00:15.1 cmd <- 02
1528 07:55:55.978719 PCI: 00:16.0 subsystem <- 8086/02e0
1529 07:55:55.982700 PCI: 00:16.0 cmd <- 02
1530 07:55:55.985477 PCI: 00:17.0 subsystem <- 8086/02d3
1531 07:55:55.988627 PCI: 00:17.0 cmd <- 03
1532 07:55:55.992429 PCI: 00:19.0 subsystem <- 8086/02c5
1533 07:55:55.994975 PCI: 00:19.0 cmd <- 02
1534 07:55:55.998458 PCI: 00:1d.0 bridge ctrl <- 0013
1535 07:55:56.001694 PCI: 00:1d.0 subsystem <- 8086/02b0
1536 07:55:56.004894 PCI: 00:1d.0 cmd <- 06
1537 07:55:56.008606 PCI: 00:1e.0 subsystem <- 8086/02a8
1538 07:55:56.011653 PCI: 00:1e.0 cmd <- 06
1539 07:55:56.015334 PCI: 00:1e.2 subsystem <- 8086/02aa
1540 07:55:56.017838 PCI: 00:1e.2 cmd <- 06
1541 07:55:56.021561 PCI: 00:1e.3 subsystem <- 8086/02ab
1542 07:55:56.024732 PCI: 00:1e.3 cmd <- 02
1543 07:55:56.028097 PCI: 00:1f.0 subsystem <- 8086/0284
1544 07:55:56.030998 PCI: 00:1f.0 cmd <- 407
1545 07:55:56.034403 PCI: 00:1f.3 subsystem <- 8086/02c8
1546 07:55:56.034889 PCI: 00:1f.3 cmd <- 02
1547 07:55:56.041402 PCI: 00:1f.4 subsystem <- 8086/02a3
1548 07:55:56.041997 PCI: 00:1f.4 cmd <- 03
1549 07:55:56.047523 PCI: 00:1f.5 subsystem <- 8086/02a4
1550 07:55:56.048119 PCI: 00:1f.5 cmd <- 406
1551 07:55:56.057617 PCI: 01:00.0 cmd <- 02
1552 07:55:56.063053 done.
1553 07:55:56.076624 ME: Version: 14.0.39.1367
1554 07:55:56.083043 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1555 07:55:56.086225 Initializing devices...
1556 07:55:56.086813 Root Device init ...
1557 07:55:56.093348 Chrome EC: Set SMI mask to 0x0000000000000000
1558 07:55:56.095811 Chrome EC: clear events_b mask to 0x0000000000000000
1559 07:55:56.099036
1560 07:55:56.102598 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1561 07:55:56.108708 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1562 07:55:56.115867 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1563 07:55:56.118522 Chrome EC: Set WAKE mask to 0x0000000000000000
1564 07:55:56.125318 Root Device init finished in 35181 usecs
1565 07:55:56.129032 CPU_CLUSTER: 0 init ...
1566 07:55:56.131856 CPU_CLUSTER: 0 init finished in 2448 usecs
1567 07:55:56.137126 PCI: 00:00.0 init ...
1568 07:55:56.140734 CPU TDP: 15 Watts
1569 07:55:56.144249 CPU PL2 = 64 Watts
1570 07:55:56.146940 PCI: 00:00.0 init finished in 7083 usecs
1571 07:55:56.149958 PCI: 00:02.0 init ...
1572 07:55:56.153288 PCI: 00:02.0 init finished in 2246 usecs
1573 07:55:56.156779 PCI: 00:08.0 init ...
1574 07:55:56.159994 PCI: 00:08.0 init finished in 2253 usecs
1575 07:55:56.163371 PCI: 00:12.0 init ...
1576 07:55:56.166668 PCI: 00:12.0 init finished in 2253 usecs
1577 07:55:56.169819 PCI: 00:14.0 init ...
1578 07:55:56.173406 PCI: 00:14.0 init finished in 2254 usecs
1579 07:55:56.176366 PCI: 00:14.2 init ...
1580 07:55:56.179935 PCI: 00:14.2 init finished in 2255 usecs
1581 07:55:56.182885 PCI: 00:14.3 init ...
1582 07:55:56.186336 PCI: 00:14.3 init finished in 2270 usecs
1583 07:55:56.189506 PCI: 00:15.0 init ...
1584 07:55:56.192792 DW I2C bus 0 at 0xd121f000 (400 KHz)
1585 07:55:56.198958 PCI: 00:15.0 init finished in 5981 usecs
1586 07:55:56.199442 PCI: 00:15.1 init ...
1587 07:55:56.202416 DW I2C bus 1 at 0xd1220000 (400 KHz)
1588 07:55:56.205647
1589 07:55:56.209046 PCI: 00:15.1 init finished in 5980 usecs
1590 07:55:56.212839 PCI: 00:16.0 init ...
1591 07:55:56.215994 PCI: 00:16.0 init finished in 2246 usecs
1592 07:55:56.218886 PCI: 00:19.0 init ...
1593 07:55:56.222646 DW I2C bus 4 at 0xd1222000 (400 KHz)
1594 07:55:56.225730 PCI: 00:19.0 init finished in 5981 usecs
1595 07:55:56.228932 PCI: 00:1d.0 init ...
1596 07:55:56.232056 Initializing PCH PCIe bridge.
1597 07:55:56.234813 PCI: 00:1d.0 init finished in 5286 usecs
1598 07:55:56.238720 PCI: 00:1f.0 init ...
1599 07:55:56.242225 IOAPIC: Initializing IOAPIC at 0xfec00000
1600 07:55:56.248692 IOAPIC: Bootstrap Processor Local APIC = 0x00
1601 07:55:56.249285 IOAPIC: ID = 0x02
1602 07:55:56.252270 IOAPIC: Dumping registers
1603 07:55:56.255535 reg 0x0000: 0x02000000
1604 07:55:56.258393 reg 0x0001: 0x00770020
1605 07:55:56.261865 reg 0x0002: 0x00000000
1606 07:55:56.265108 PCI: 00:1f.0 init finished in 23557 usecs
1607 07:55:56.267922 PCI: 00:1f.4 init ...
1608 07:55:56.270724 PCI: 00:1f.4 init finished in 2264 usecs
1609 07:55:56.282826 PCI: 01:00.0 init ...
1610 07:55:56.285947 PCI: 01:00.0 init finished in 2253 usecs
1611 07:55:56.290324 PNP: 0c09.0 init ...
1612 07:55:56.293593 Google Chrome EC uptime: 11.144 seconds
1613 07:55:56.300652 Google Chrome AP resets since EC boot: 0
1614 07:55:56.303669 Google Chrome most recent AP reset causes:
1615 07:55:56.309789 Google Chrome EC reset flags at last EC boot: reset-pin
1616 07:55:56.313673 PNP: 0c09.0 init finished in 20612 usecs
1617 07:55:56.316481 Devices initialized
1618 07:55:56.319610 Show all devs... After init.
1619 07:55:56.319699 Root Device: enabled 1
1620 07:55:56.322877 CPU_CLUSTER: 0: enabled 1
1621 07:55:56.326670 DOMAIN: 0000: enabled 1
1622 07:55:56.326757 APIC: 00: enabled 1
1623 07:55:56.329729 PCI: 00:00.0: enabled 1
1624 07:55:56.333019 PCI: 00:02.0: enabled 1
1625 07:55:56.336015 PCI: 00:04.0: enabled 0
1626 07:55:56.336105 PCI: 00:05.0: enabled 0
1627 07:55:56.339716 PCI: 00:12.0: enabled 1
1628 07:55:56.342873 PCI: 00:12.5: enabled 0
1629 07:55:56.345920 PCI: 00:12.6: enabled 0
1630 07:55:56.346007 PCI: 00:14.0: enabled 1
1631 07:55:56.349575 PCI: 00:14.1: enabled 0
1632 07:55:56.352577 PCI: 00:14.3: enabled 1
1633 07:55:56.356011 PCI: 00:14.5: enabled 0
1634 07:55:56.356100 PCI: 00:15.0: enabled 1
1635 07:55:56.359298 PCI: 00:15.1: enabled 1
1636 07:55:56.362400 PCI: 00:15.2: enabled 0
1637 07:55:56.365887 PCI: 00:15.3: enabled 0
1638 07:55:56.365976 PCI: 00:16.0: enabled 1
1639 07:55:56.369167 PCI: 00:16.1: enabled 0
1640 07:55:56.372547 PCI: 00:16.2: enabled 0
1641 07:55:56.375323 PCI: 00:16.3: enabled 0
1642 07:55:56.375420 PCI: 00:16.4: enabled 0
1643 07:55:56.378903 PCI: 00:16.5: enabled 0
1644 07:55:56.382208 PCI: 00:17.0: enabled 1
1645 07:55:56.385082 PCI: 00:19.0: enabled 1
1646 07:55:56.385169 PCI: 00:19.1: enabled 0
1647 07:55:56.388492 PCI: 00:19.2: enabled 0
1648 07:55:56.391926 PCI: 00:1a.0: enabled 0
1649 07:55:56.395047 PCI: 00:1c.0: enabled 0
1650 07:55:56.395138 PCI: 00:1c.1: enabled 0
1651 07:55:56.398375 PCI: 00:1c.2: enabled 0
1652 07:55:56.401451 PCI: 00:1c.3: enabled 0
1653 07:55:56.404606 PCI: 00:1c.4: enabled 0
1654 07:55:56.404705 PCI: 00:1c.5: enabled 0
1655 07:55:56.408319 PCI: 00:1c.6: enabled 0
1656 07:55:56.411635 PCI: 00:1c.7: enabled 0
1657 07:55:56.415110 PCI: 00:1d.0: enabled 1
1658 07:55:56.415211 PCI: 00:1d.1: enabled 0
1659 07:55:56.417883 PCI: 00:1d.2: enabled 0
1660 07:55:56.421070 PCI: 00:1d.3: enabled 0
1661 07:55:56.421159 PCI: 00:1d.4: enabled 0
1662 07:55:56.424383
1663 07:55:56.424469 PCI: 00:1d.5: enabled 0
1664 07:55:56.427768 PCI: 00:1e.0: enabled 1
1665 07:55:56.430851 PCI: 00:1e.1: enabled 0
1666 07:55:56.430937 PCI: 00:1e.2: enabled 1
1667 07:55:56.434020
1668 07:55:56.434126 PCI: 00:1e.3: enabled 1
1669 07:55:56.437421 PCI: 00:1f.0: enabled 1
1670 07:55:56.440798 PCI: 00:1f.1: enabled 0
1671 07:55:56.440882 PCI: 00:1f.2: enabled 0
1672 07:55:56.443924
1673 07:55:56.444009 PCI: 00:1f.3: enabled 1
1674 07:55:56.447399 PCI: 00:1f.4: enabled 1
1675 07:55:56.450556 PCI: 00:1f.5: enabled 1
1676 07:55:56.450640 PCI: 00:1f.6: enabled 0
1677 07:55:56.453843 USB0 port 0: enabled 1
1678 07:55:56.457149 I2C: 01:15: enabled 1
1679 07:55:56.460360 I2C: 02:5d: enabled 1
1680 07:55:56.460445 GENERIC: 0.0: enabled 1
1681 07:55:56.463335 I2C: 03:1a: enabled 1
1682 07:55:56.466876 I2C: 03:38: enabled 1
1683 07:55:56.466969 I2C: 03:39: enabled 1
1684 07:55:56.470525 I2C: 03:3a: enabled 1
1685 07:55:56.473112 I2C: 03:3b: enabled 1
1686 07:55:56.473196 PCI: 00:00.0: enabled 1
1687 07:55:56.477345 SPI: 00: enabled 1
1688 07:55:56.480249 SPI: 01: enabled 1
1689 07:55:56.480385 PNP: 0c09.0: enabled 1
1690 07:55:56.483318 USB2 port 0: enabled 1
1691 07:55:56.486465 USB2 port 1: enabled 1
1692 07:55:56.489716 USB2 port 2: enabled 0
1693 07:55:56.489855 USB2 port 3: enabled 0
1694 07:55:56.493363 USB2 port 5: enabled 0
1695 07:55:56.496517 USB2 port 6: enabled 1
1696 07:55:56.496681 USB2 port 9: enabled 1
1697 07:55:56.499505 USB3 port 0: enabled 1
1698 07:55:56.502906 USB3 port 1: enabled 1
1699 07:55:56.506159 USB3 port 2: enabled 1
1700 07:55:56.506250 USB3 port 3: enabled 1
1701 07:55:56.509256 USB3 port 4: enabled 0
1702 07:55:56.512842 APIC: 03: enabled 1
1703 07:55:56.513022 APIC: 01: enabled 1
1704 07:55:56.516040 APIC: 02: enabled 1
1705 07:55:56.516233 APIC: 04: enabled 1
1706 07:55:56.519599
1707 07:55:56.519766 APIC: 05: enabled 1
1708 07:55:56.522853 APIC: 07: enabled 1
1709 07:55:56.523028 APIC: 06: enabled 1
1710 07:55:56.525950 PCI: 00:08.0: enabled 1
1711 07:55:56.529117 PCI: 00:14.2: enabled 1
1712 07:55:56.532632 PCI: 01:00.0: enabled 1
1713 07:55:56.535411 Disabling ACPI via APMC:
1714 07:55:56.535576 done.
1715 07:55:56.542138 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1716 07:55:56.545389 ELOG: NV offset 0xaf0000 size 0x4000
1717 07:55:56.552236 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1718 07:55:56.559410 ELOG: Event(17) added with size 13 at 2022-11-25 07:55:56 UTC
1719 07:55:56.565850 ELOG: Event(92) added with size 9 at 2022-11-25 07:55:56 UTC
1720 07:55:56.572308 ELOG: Event(93) added with size 9 at 2022-11-25 07:55:56 UTC
1721 07:55:56.578756 ELOG: Event(9A) added with size 9 at 2022-11-25 07:55:56 UTC
1722 07:55:56.585605 ELOG: Event(9E) added with size 10 at 2022-11-25 07:55:56 UTC
1723 07:55:56.591478 ELOG: Event(9F) added with size 14 at 2022-11-25 07:55:56 UTC
1724 07:55:56.598128 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1725 07:55:56.604821 ELOG: Event(A1) added with size 10 at 2022-11-25 07:55:56 UTC
1726 07:55:56.611295 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1727 07:55:56.618086 ELOG: Event(A0) added with size 9 at 2022-11-25 07:55:56 UTC
1728 07:55:56.620771 elog_add_boot_reason: Logged dev mode boot
1729 07:55:56.624809 Finalize devices...
1730 07:55:56.627528 PCI: 00:17.0 final
1731 07:55:56.628008 Devices finalized
1732 07:55:56.633914 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1733 07:55:56.637127 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1734 07:55:56.643964 ME: HFSTS1 : 0x90000245
1735 07:55:56.647349 ME: HFSTS2 : 0x3B850126
1736 07:55:56.650588 ME: HFSTS3 : 0x00000020
1737 07:55:56.654122 ME: HFSTS4 : 0x00004800
1738 07:55:56.660310 ME: HFSTS5 : 0x00000000
1739 07:55:56.663185 ME: HFSTS6 : 0x40400006
1740 07:55:56.666717 ME: Manufacturing Mode : NO
1741 07:55:56.670105 ME: FW Partition Table : OK
1742 07:55:56.672855 ME: Bringup Loader Failure : NO
1743 07:55:56.676400 ME: Firmware Init Complete : YES
1744 07:55:56.679730 ME: Boot Options Present : NO
1745 07:55:56.682826 ME: Update In Progress : NO
1746 07:55:56.686428 ME: D0i3 Support : YES
1747 07:55:56.689768 ME: Low Power State Enabled : NO
1748 07:55:56.692877 ME: CPU Replaced : NO
1749 07:55:56.696267 ME: CPU Replacement Valid : YES
1750 07:55:56.698968 ME: Current Working State : 5
1751 07:55:56.702286 ME: Current Operation State : 1
1752 07:55:56.705735 ME: Current Operation Mode : 0
1753 07:55:56.708996 ME: Error Code : 0
1754 07:55:56.712251 ME: CPU Debug Disabled : YES
1755 07:55:56.715665 ME: TXT Support : NO
1756 07:55:56.721894 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1757 07:55:56.728614 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1758 07:55:56.729196 CBFS @ c08000 size 3f8000
1759 07:55:56.735021 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1760 07:55:56.738154 CBFS: Locating 'fallback/dsdt.aml'
1761 07:55:56.741726 CBFS: Found @ offset 10bb80 size 3fa5
1762 07:55:56.748007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1763 07:55:56.751458 CBFS @ c08000 size 3f8000
1764 07:55:56.758092 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1765 07:55:56.761273 CBFS: Locating 'fallback/slic'
1766 07:55:56.765113 CBFS: 'fallback/slic' not found.
1767 07:55:56.767428 ACPI: Writing ACPI tables at 99b3e000.
1768 07:55:56.770760 ACPI: * FACS
1769 07:55:56.771239 ACPI: * DSDT
1770 07:55:56.777869 Ramoops buffer: 0x100000@0x99a3d000.
1771 07:55:56.781092 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1772 07:55:56.784224 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1773 07:55:56.787874 Google Chrome EC: version:
1774 07:55:56.791030 ro: helios_v2.0.2659-56403530b
1775 07:55:56.794514 rw: helios_v2.0.2849-c41de27e7d
1776 07:55:56.797598 running image: 1
1777 07:55:56.800662 ACPI: * FADT
1778 07:55:56.801147 SCI is IRQ9
1779 07:55:56.807749 ACPI: added table 1/32, length now 40
1780 07:55:56.808274 ACPI: * SSDT
1781 07:55:56.810702 Found 1 CPU(s) with 8 core(s) each.
1782 07:55:56.817161 Error: Could not locate 'wifi_sar' in VPD.
1783 07:55:56.820112 Checking CBFS for default SAR values
1784 07:55:56.823592 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1785 07:55:56.826607 CBFS @ c08000 size 3f8000
1786 07:55:56.833423 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1787 07:55:56.836770 CBFS: Locating 'wifi_sar_defaults.hex'
1788 07:55:56.840481 CBFS: Found @ offset 5fac0 size 77
1789 07:55:56.842920 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1790 07:55:56.849775 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1791 07:55:56.853072 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1792 07:55:56.859728 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1793 07:55:56.862801 failed to find key in VPD: dsm_calib_r0_0
1794 07:55:56.872993 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1795 07:55:56.879230 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1796 07:55:56.882720 failed to find key in VPD: dsm_calib_r0_1
1797 07:55:56.888958 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1798 07:55:56.892000
1799 07:55:56.895355 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1800 07:55:56.898906 failed to find key in VPD: dsm_calib_r0_2
1801 07:55:56.908432 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1802 07:55:56.915608 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1803 07:55:56.918244 failed to find key in VPD: dsm_calib_r0_3
1804 07:55:56.927763 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1805 07:55:56.931185 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1806 07:55:56.937949 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1807 07:55:56.941795 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1808 07:55:56.945002 EC returned error result code 1
1809 07:55:56.947907 EC returned error result code 1
1810 07:55:56.951352 EC returned error result code 1
1811 07:55:56.957779 PS2K: Bad resp from EC. Vivaldi disabled!
1812 07:55:56.964482 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1813 07:55:56.967621 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1814 07:55:56.973919 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1815 07:55:56.977085 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1816 07:55:56.983677 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1817 07:55:56.989866 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1818 07:55:56.996559 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1819 07:55:57.003236 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1820 07:55:57.006186 ACPI: added table 2/32, length now 44
1821 07:55:57.006689 ACPI: * MCFG
1822 07:55:57.013347 ACPI: added table 3/32, length now 48
1823 07:55:57.013933 ACPI: * TPM2
1824 07:55:57.016221 TPM2 log created at 99a2d000
1825 07:55:57.019588 ACPI: added table 4/32, length now 52
1826 07:55:57.023020 ACPI: * MADT
1827 07:55:57.023639 SCI is IRQ9
1828 07:55:57.025638 ACPI: added table 5/32, length now 56
1829 07:55:57.029001 current = 99b43ac0
1830 07:55:57.029473 ACPI: * DMAR
1831 07:55:57.032719 ACPI: added table 6/32, length now 60
1832 07:55:57.035840 ACPI: * IGD OpRegion
1833 07:55:57.038780 GMA: Found VBT in CBFS
1834 07:55:57.042635 GMA: Found valid VBT in CBFS
1835 07:55:57.045503 ACPI: added table 7/32, length now 64
1836 07:55:57.045981 ACPI: * HPET
1837 07:55:57.052146 ACPI: added table 8/32, length now 68
1838 07:55:57.052715 ACPI: done.
1839 07:55:57.055221 ACPI tables: 31744 bytes.
1840 07:55:57.058687 smbios_write_tables: 99a2c000
1841 07:55:57.062092 EC returned error result code 3
1842 07:55:57.065196 Couldn't obtain OEM name from CBI
1843 07:55:57.068632 Create SMBIOS type 17
1844 07:55:57.071967 PCI: 00:00.0 (Intel Cannonlake)
1845 07:55:57.072453 PCI: 00:14.3 (Intel WiFi)
1846 07:55:57.075034
1847 07:55:57.075625 SMBIOS tables: 939 bytes.
1848 07:55:57.081511 Writing table forward entry at 0x00000500
1849 07:55:57.084880 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1850 07:55:57.091462 Writing coreboot table at 0x99b62000
1851 07:55:57.094791 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1852 07:55:57.101357 1. 0000000000001000-000000000009ffff: RAM
1853 07:55:57.104449 2. 00000000000a0000-00000000000fffff: RESERVED
1854 07:55:57.110896 3. 0000000000100000-0000000099a2bfff: RAM
1855 07:55:57.114114 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1856 07:55:57.120828 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1857 07:55:57.127344 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1858 07:55:57.130698 7. 000000009a000000-000000009f7fffff: RESERVED
1859 07:55:57.134274 8. 00000000e0000000-00000000efffffff: RESERVED
1860 07:55:57.140345 9. 00000000fc000000-00000000fc000fff: RESERVED
1861 07:55:57.144043 10. 00000000fe000000-00000000fe00ffff: RESERVED
1862 07:55:57.150313 11. 00000000fed10000-00000000fed17fff: RESERVED
1863 07:55:57.153427 12. 00000000fed80000-00000000fed83fff: RESERVED
1864 07:55:57.159808 13. 00000000fed90000-00000000fed91fff: RESERVED
1865 07:55:57.163225 14. 00000000feda0000-00000000feda1fff: RESERVED
1866 07:55:57.169983 15. 0000000100000000-000000045e7fffff: RAM
1867 07:55:57.173344 Graphics framebuffer located at 0xc0000000
1868 07:55:57.176379 Passing 5 GPIOs to payload:
1869 07:55:57.179605 NAME | PORT | POLARITY | VALUE
1870 07:55:57.186364 write protect | undefined | high | low
1871 07:55:57.192641 lid | undefined | high | high
1872 07:55:57.195690 power | undefined | high | low
1873 07:55:57.202576 oprom | undefined | high | low
1874 07:55:57.205856 EC in RW | 0x000000cb | high | low
1875 07:55:57.208900 Board ID: 4
1876 07:55:57.212007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1877 07:55:57.215238 CBFS @ c08000 size 3f8000
1878 07:55:57.222189 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1879 07:55:57.228279 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1880 07:55:57.232123 coreboot table: 1492 bytes.
1881 07:55:57.234754 IMD ROOT 0. 99fff000 00001000
1882 07:55:57.238255 IMD SMALL 1. 99ffe000 00001000
1883 07:55:57.241618 FSP MEMORY 2. 99c4e000 003b0000
1884 07:55:57.245180 CONSOLE 3. 99c2e000 00020000
1885 07:55:57.248090 FMAP 4. 99c2d000 0000054e
1886 07:55:57.251146 TIME STAMP 5. 99c2c000 00000910
1887 07:55:57.254474 VBOOT WORK 6. 99c18000 00014000
1888 07:55:57.258149 MRC DATA 7. 99c16000 00001958
1889 07:55:57.261640 ROMSTG STCK 8. 99c15000 00001000
1890 07:55:57.264710 AFTER CAR 9. 99c0b000 0000a000
1891 07:55:57.267731 RAMSTAGE 10. 99baf000 0005c000
1892 07:55:57.271191 REFCODE 11. 99b7a000 00035000
1893 07:55:57.274468 SMM BACKUP 12. 99b6a000 00010000
1894 07:55:57.277938 COREBOOT 13. 99b62000 00008000
1895 07:55:57.281088 ACPI 14. 99b3e000 00024000
1896 07:55:57.283888 ACPI GNVS 15. 99b3d000 00001000
1897 07:55:57.287467 RAMOOPS 16. 99a3d000 00100000
1898 07:55:57.290874 TPM2 TCGLOG17. 99a2d000 00010000
1899 07:55:57.293943 SMBIOS 18. 99a2c000 00000800
1900 07:55:57.296959 IMD small region:
1901 07:55:57.300298 IMD ROOT 0. 99ffec00 00000400
1902 07:55:57.303599 FSP RUNTIME 1. 99ffebe0 00000004
1903 07:55:57.306728 EC HOSTEVENT 2. 99ffebc0 00000008
1904 07:55:57.310169 POWER STATE 3. 99ffeb80 00000040
1905 07:55:57.313468 ROMSTAGE 4. 99ffeb60 00000004
1906 07:55:57.316665 MEM INFO 5. 99ffe9a0 000001b9
1907 07:55:57.319769 VPD 6. 99ffe920 0000006c
1908 07:55:57.323565 MTRR: Physical address space:
1909 07:55:57.329539 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1910 07:55:57.336464 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1911 07:55:57.342983 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1912 07:55:57.349369 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1913 07:55:57.355686 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1914 07:55:57.362252 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1915 07:55:57.369278 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1916 07:55:57.371782 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 07:55:57.375458 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 07:55:57.378553 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 07:55:57.385386 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 07:55:57.388542 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 07:55:57.391575 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 07:55:57.394706 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 07:55:57.401567 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 07:55:57.404964 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 07:55:57.407907 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 07:55:57.411480 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 07:55:57.414901 call enable_fixed_mtrr()
1928 07:55:57.418293 CPU physical address size: 39 bits
1929 07:55:57.425032 MTRR: default type WB/UC MTRR counts: 6/8.
1930 07:55:57.428000 MTRR: WB selected as default type.
1931 07:55:57.434640 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1932 07:55:57.441216 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1933 07:55:57.444507 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1934 07:55:57.450850 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1935 07:55:57.457568 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1936 07:55:57.463681 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1937 07:55:57.469988 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 07:55:57.473656 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 07:55:57.476768 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 07:55:57.480301 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 07:55:57.486544 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 07:55:57.489838 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 07:55:57.492944 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 07:55:57.496782 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 07:55:57.500222
1946 07:55:57.503458 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 07:55:57.506426 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 07:55:57.509361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 07:55:57.509836
1950 07:55:57.512624 MTRR check
1951 07:55:57.513099 Fixed MTRRs : Enabled
1952 07:55:57.516159
1953 07:55:57.516783 Variable MTRRs: Enabled
1954 07:55:57.517281
1955 07:55:57.519302 call enable_fixed_mtrr()
1956 07:55:57.526138 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1957 07:55:57.529280 CPU physical address size: 39 bits
1958 07:55:57.532670 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1959 07:55:57.535898 CBFS @ c08000 size 3f8000
1960 07:55:57.542266 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1961 07:55:57.545894 CBFS: Locating 'fallback/payload'
1962 07:55:57.548840 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 07:55:57.555556 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 07:55:57.558772 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 07:55:57.562308 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 07:55:57.565784 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 07:55:57.569107 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 07:55:57.571794
1969 07:55:57.575116 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 07:55:57.578533 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 07:55:57.581660 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 07:55:57.588575 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 07:55:57.591643 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 07:55:57.594997 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 07:55:57.598099 call enable_fixed_mtrr()
1976 07:55:57.601186 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 07:55:57.604386 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 07:55:57.610954 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 07:55:57.614337 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 07:55:57.617480 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 07:55:57.621244 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 07:55:57.627098 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 07:55:57.630756 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 07:55:57.633649 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 07:55:57.637097 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 07:55:57.643358 CPU physical address size: 39 bits
1987 07:55:57.646600 call enable_fixed_mtrr()
1988 07:55:57.649968 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 07:55:57.653320 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 07:55:57.656336 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 07:55:57.663292 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 07:55:57.666215 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 07:55:57.669469 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 07:55:57.672725 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 07:55:57.679437 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 07:55:57.682503 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 07:55:57.685646 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 07:55:57.688982 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 07:55:57.695101 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 07:55:57.698605 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 07:55:57.701952 call enable_fixed_mtrr()
2002 07:55:57.705258 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 07:55:57.708337 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 07:55:57.711655 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 07:55:57.718411 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 07:55:57.721362 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 07:55:57.724397 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 07:55:57.727712 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 07:55:57.734387 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 07:55:57.737661 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 07:55:57.740623 CPU physical address size: 39 bits
2012 07:55:57.744340 call enable_fixed_mtrr()
2013 07:55:57.747670 CBFS: Found @ offset 1c96c0 size 3f798
2014 07:55:57.750459 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 07:55:57.753944
2016 07:55:57.756970 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 07:55:57.760505 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 07:55:57.763619 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 07:55:57.766920 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 07:55:57.770344
2021 07:55:57.773222 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 07:55:57.776479 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 07:55:57.779785 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 07:55:57.786263 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 07:55:57.789936 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 07:55:57.793186 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 07:55:57.796508 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 07:55:57.803126 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 07:55:57.806650 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 07:55:57.810100 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 07:55:57.813404 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 07:55:57.819409 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 07:55:57.822668 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 07:55:57.825655 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 07:55:57.829015 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 07:55:57.836045 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 07:55:57.839498 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 07:55:57.842538 call enable_fixed_mtrr()
2039 07:55:57.842632 call enable_fixed_mtrr()
2040 07:55:57.849079 Checking segment from ROM address 0xffdd16f8
2041 07:55:57.851879 CPU physical address size: 39 bits
2042 07:55:57.855010 CPU physical address size: 39 bits
2043 07:55:57.858409 CPU physical address size: 39 bits
2044 07:55:57.864919 Checking segment from ROM address 0xffdd1714
2045 07:55:57.868217 CPU physical address size: 39 bits
2046 07:55:57.871644 Loading segment from ROM address 0xffdd16f8
2047 07:55:57.875179 code (compression=0)
2048 07:55:57.881355 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2049 07:55:57.891229 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2050 07:55:57.894600 it's not compressed!
2051 07:55:57.985396 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2052 07:55:57.992021 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2053 07:55:57.998175 Loading segment from ROM address 0xffdd1714
2054 07:55:57.998263 Entry Point 0x30000000
2055 07:55:58.001351 Loaded segments
2056 07:55:58.007653 Finalizing chipset.
2057 07:55:58.010603 Finalizing SMM.
2058 07:55:58.014199 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2059 07:55:58.017469 mp_park_aps done after 0 msecs.
2060 07:55:58.023679 Jumping to boot code at 30000000(99b62000)
2061 07:55:58.030453 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2062 07:55:58.030545
2063 07:55:58.030664
2064 07:55:58.030757
2065 07:55:58.033549 Starting depthcharge on Helios...
2066 07:55:58.033654
2067 07:55:58.034074 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2068 07:55:58.034211 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2069 07:55:58.034331 Setting prompt string to ['hatch:']
2070 07:55:58.034416 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2071 07:55:58.043357 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2072 07:55:58.043464
2073 07:55:58.049737 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2074 07:55:58.049824
2075 07:55:58.056295 board_setup: Info: eMMC controller not present; skipping
2076 07:55:58.056398
2077 07:55:58.059791 New NVMe Controller 0x30053ac0 @ 00:1d:00
2078 07:55:58.059878
2079 07:55:58.065832 board_setup: Info: SDHCI controller not present; skipping
2080 07:55:58.065937
2081 07:55:58.072538 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2082 07:55:58.072624
2083 07:55:58.072707 Wipe memory regions:
2084 07:55:58.072813
2085 07:55:58.079208 [0x00000000001000, 0x000000000a0000)
2086 07:55:58.079296
2087 07:55:58.082613 [0x00000000100000, 0x00000030000000)
2088 07:55:58.082735
2089 07:55:58.146563 [0x00000030657430, 0x00000099a2c000)
2090 07:55:58.146756
2091 07:55:58.278215 [0x00000100000000, 0x0000045e800000)
2092 07:55:58.278389
2093 07:56:00.196770 R8152: Initializing
2094 07:56:00.196931
2095 07:56:00.199786 Version 6 (ocp_data = 5c30)
2096 07:56:00.199874
2097 07:56:00.202894 R8152: Done initializing
2098 07:56:00.202979
2099 07:56:00.206613 Adding net device
2100 07:56:00.206697
2101 07:56:00.212975 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2102 07:56:00.213066
2103 07:56:00.213133
2104 07:56:00.213194
2105 07:56:00.213463 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2107 07:56:00.314217 hatch: tftpboot 192.168.201.1 8119432/tftp-deploy-pzuhjkqu/kernel/bzImage 8119432/tftp-deploy-pzuhjkqu/kernel/cmdline 8119432/tftp-deploy-pzuhjkqu/ramdisk/ramdisk.cpio.gz
2108 07:56:00.314399 Setting prompt string to 'Starting kernel'
2109 07:56:00.314475 Setting prompt string to ['Starting kernel']
2110 07:56:00.314543 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 07:56:00.314620 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2112 07:56:00.318888 tftpboot 192.168.201.1 8119432/tftp-deploy-pzuhjkqu/kernel/bzImoy-pzuhjkqu/kernel/cmdline 8119432/tftp-deploy-pzuhjkqu/ramdisk/ramdisk.cpio.gz
2113 07:56:00.318979
2114 07:56:00.319045 Waiting for link
2115 07:56:00.319106
2116 07:56:00.519837 done.
2117 07:56:00.519994
2118 07:56:00.520081 MAC: 00:24:32:50:21:91
2119 07:56:00.520144
2120 07:56:00.523131 Sending DHCP discover... done.
2121 07:56:00.523218
2122 07:56:00.526501 Waiting for reply... done.
2123 07:56:00.526586
2124 07:56:00.529432 Sending DHCP request... done.
2125 07:56:00.529535
2126 07:56:00.532685 Waiting for reply... done.
2127 07:56:00.532770
2128 07:56:00.536785 My ip is 192.168.201.14
2129 07:56:00.536869
2130 07:56:00.539437 The DHCP server ip is 192.168.201.1
2131 07:56:00.539522
2132 07:56:00.546369 TFTP server IP predefined by user: 192.168.201.1
2133 07:56:00.546455
2134 07:56:00.552846 Bootfile predefined by user: 8119432/tftp-deploy-pzuhjkqu/kernel/bzImage
2135 07:56:00.552960
2136 07:56:00.555963 Sending tftp read request... done.
2137 07:56:00.556047
2138 07:56:00.559290 Waiting for the transfer...
2139 07:56:00.559398
2140 07:56:01.120219 00000000 ################################################################
2141 07:56:01.120376
2142 07:56:01.695277 00080000 ################################################################
2143 07:56:01.695434
2144 07:56:02.268149 00100000 ################################################################
2145 07:56:02.268309
2146 07:56:02.854082 00180000 ################################################################
2147 07:56:02.854252
2148 07:56:03.430007 00200000 ################################################################
2149 07:56:03.430201
2150 07:56:04.007317 00280000 ################################################################
2151 07:56:04.007470
2152 07:56:04.581452 00300000 ################################################################
2153 07:56:04.581603
2154 07:56:05.156381 00380000 ################################################################
2155 07:56:05.156535
2156 07:56:05.732308 00400000 ################################################################
2157 07:56:05.732456
2158 07:56:06.303340 00480000 ################################################################
2159 07:56:06.303494
2160 07:56:06.889452 00500000 ################################################################
2161 07:56:06.889604
2162 07:56:07.468026 00580000 ################################################################
2163 07:56:07.468191
2164 07:56:08.063028 00600000 ################################################################
2165 07:56:08.063286
2166 07:56:08.468531 00680000 ####################################### done.
2167 07:56:08.469056
2168 07:56:08.471764 The bootfile was 7131024 bytes long.
2169 07:56:08.472305
2170 07:56:08.474679 Sending tftp read request... done.
2171 07:56:08.475087
2172 07:56:08.478149 Waiting for the transfer...
2173 07:56:08.478558
2174 07:56:09.096088 00000000 ################################################################
2175 07:56:09.096239
2176 07:56:09.716054 00080000 ################################################################
2177 07:56:09.716358
2178 07:56:10.303889 00100000 ################################################################
2179 07:56:10.304087
2180 07:56:10.947699 00180000 ################################################################
2181 07:56:10.948236
2182 07:56:11.585944 00200000 ################################################################
2183 07:56:11.586510
2184 07:56:12.237158 00280000 ################################################################
2185 07:56:12.237879
2186 07:56:12.845243 00300000 ################################################################
2187 07:56:12.845397
2188 07:56:13.401370 00380000 ################################################################
2189 07:56:13.401522
2190 07:56:13.967879 00400000 ################################################################
2191 07:56:13.968041
2192 07:56:14.535030 00480000 ################################################################
2193 07:56:14.535191
2194 07:56:14.812721 00500000 ################################ done.
2195 07:56:14.812872
2196 07:56:14.815950 Sending tftp read request... done.
2197 07:56:14.816036
2198 07:56:14.819316 Waiting for the transfer...
2199 07:56:14.819400
2200 07:56:14.819465 00000000 # done.
2201 07:56:14.819527
2202 07:56:14.829024 Command line loaded dynamically from TFTP file: 8119432/tftp-deploy-pzuhjkqu/kernel/cmdline
2203 07:56:14.829109
2204 07:56:14.855129 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119432/extract-nfsrootfs-nca_8bdl,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2205 07:56:14.855220
2206 07:56:14.861631 ec_init(0): CrosEC protocol v3 supported (256, 256)
2207 07:56:14.861716
2208 07:56:14.869057 Shutting down all USB controllers.
2209 07:56:14.869141
2210 07:56:14.872967 Removing current net device
2211 07:56:14.873050
2212 07:56:14.876955 Finalizing coreboot
2213 07:56:14.877039
2214 07:56:14.883389 Exiting depthcharge with code 4 at timestamp: 24170867
2215 07:56:14.883475
2216 07:56:14.883541
2217 07:56:14.883600 Starting kernel ...
2218 07:56:14.883659
2219 07:56:14.883715
2220 07:56:14.883770
2221 07:56:14.884155 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2222 07:56:14.884252 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2223 07:56:14.884327 Setting prompt string to ['Linux version [0-9]']
2224 07:56:14.884399 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2225 07:56:14.884468 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2227 08:00:39.885247 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2229 08:00:39.886675 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2231 08:00:39.887577 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2234 08:00:39.889029 end: 2 depthcharge-action (duration 00:05:00) [common]
2236 08:00:39.890300 Cleaning after the job
2237 08:00:39.890765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/ramdisk
2238 08:00:39.893261 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/kernel
2239 08:00:39.895953 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/nfsrootfs
2240 08:00:39.966978 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119432/tftp-deploy-pzuhjkqu/modules
2241 08:00:39.967294 start: 4.1 power-off (timeout 00:00:30) [common]
2242 08:00:39.967456 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2243 08:00:39.986703 >> Command sent successfully.
2244 08:00:39.988723 Returned 0 in 0 seconds
2245 08:00:40.089977 end: 4.1 power-off (duration 00:00:00) [common]
2247 08:00:40.091799 start: 4.2 read-feedback (timeout 00:10:00) [common]
2248 08:00:40.092978 Listened to connection for namespace 'common' for up to 1s
2249 08:00:40.956011 Listened to connection for namespace 'common' for up to 1s
2250 08:00:40.959114 Listened to connection for namespace 'common' for up to 1s
2251 08:00:40.962360 Listened to connection for namespace 'common' for up to 1s
2252 08:00:40.965742 Listened to connection for namespace 'common' for up to 1s
2253 08:00:40.969312 Listened to connection for namespace 'common' for up to 1s
2254 08:00:40.972640 Listened to connection for namespace 'common' for up to 1s
2255 08:00:40.975741 Listened to connection for namespace 'common' for up to 1s
2256 08:00:40.978889 Listened to connection for namespace 'common' for up to 1s
2257 08:00:40.982544 Listened to connection for namespace 'common' for up to 1s
2258 08:00:40.985824 Listened to connection for namespace 'common' for up to 1s
2259 08:00:40.989369 Listened to connection for namespace 'common' for up to 1s
2260 08:00:40.992467 Listened to connection for namespace 'common' for up to 1s
2261 08:00:40.995785 Listened to connection for namespace 'common' for up to 1s
2262 08:00:40.999220 Listened to connection for namespace 'common' for up to 1s
2263 08:00:41.002269 Listened to connection for namespace 'common' for up to 1s
2264 08:00:41.005735 Listened to connection for namespace 'common' for up to 1s
2265 08:00:41.008575 Listened to connection for namespace 'common' for up to 1s
2266 08:00:41.012107 Listened to connection for namespace 'common' for up to 1s
2267 08:00:41.015983 Listened to connection for namespace 'common' for up to 1s
2268 08:00:41.018995 Listened to connection for namespace 'common' for up to 1s
2269 08:00:41.022399 Listened to connection for namespace 'common' for up to 1s
2270 08:00:41.025407 Listened to connection for namespace 'common' for up to 1s
2271 08:00:41.028839 Listened to connection for namespace 'common' for up to 1s
2272 08:00:41.032138 Listened to connection for namespace 'common' for up to 1s
2273 08:00:41.035455 Listened to connection for namespace 'common' for up to 1s
2274 08:00:41.038633 Listened to connection for namespace 'common' for up to 1s
2275 08:00:41.042245 Listened to connection for namespace 'common' for up to 1s
2276 08:00:41.045183 Listened to connection for namespace 'common' for up to 1s
2277 08:00:41.048754 Listened to connection for namespace 'common' for up to 1s
2278 08:00:41.051855 Listened to connection for namespace 'common' for up to 1s
2279 08:00:41.054961 Listened to connection for namespace 'common' for up to 1s
2280 08:00:41.058884 Listened to connection for namespace 'common' for up to 1s
2281 08:00:41.062032 Listened to connection for namespace 'common' for up to 1s
2282 08:00:41.064824 Listened to connection for namespace 'common' for up to 1s
2283 08:00:41.068336 Listened to connection for namespace 'common' for up to 1s
2284 08:00:41.072057 Listened to connection for namespace 'common' for up to 1s
2285 08:00:41.074565 Listened to connection for namespace 'common' for up to 1s
2286 08:00:41.078344 Listened to connection for namespace 'common' for up to 1s
2287 08:00:41.081870 Listened to connection for namespace 'common' for up to 1s
2288 08:00:41.085247 Listened to connection for namespace 'common' for up to 1s
2289 08:00:41.088441 Listened to connection for namespace 'common' for up to 1s
2290 08:00:41.091084 Listened to connection for namespace 'common' for up to 1s
2291 08:00:41.092682 Finalising connection for namespace 'common'
2292 08:00:41.093281 Disconnecting from shell: Finalise
2293 08:00:41.093714
2294 08:00:41.195270 end: 4.2 read-feedback (duration 00:00:01) [common]
2295 08:00:41.195899 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119432
2296 08:00:41.402698 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119432
2297 08:00:41.402897 JobError: Your job cannot terminate cleanly.