Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:54:22.131156 lava-dispatcher, installed at version: 2022.10
2 07:54:22.131359 start: 0 validate
3 07:54:22.131492 Start time: 2022-11-25 07:54:22.131486+00:00 (UTC)
4 07:54:22.131623 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:54:22.131752 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:54:22.418297 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:54:22.419004 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:54:22.707082 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:54:22.707854 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:54:22.996409 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:54:22.997259 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:54:23.292158 validate duration: 1.16
14 07:54:23.292503 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:54:23.292615 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:54:23.292707 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:54:23.292856 Not decompressing ramdisk as can be used compressed.
18 07:54:23.292946 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 07:54:23.293017 saving as /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/ramdisk/initrd.cpio.gz
20 07:54:23.293081 total size: 5431719 (5MB)
21 07:54:23.294172 progress 0% (0MB)
22 07:54:23.295642 progress 5% (0MB)
23 07:54:23.296976 progress 10% (0MB)
24 07:54:23.298407 progress 15% (0MB)
25 07:54:23.299973 progress 20% (1MB)
26 07:54:23.301414 progress 25% (1MB)
27 07:54:23.302811 progress 30% (1MB)
28 07:54:23.304419 progress 35% (1MB)
29 07:54:23.305847 progress 40% (2MB)
30 07:54:23.307255 progress 45% (2MB)
31 07:54:23.308711 progress 50% (2MB)
32 07:54:23.310321 progress 55% (2MB)
33 07:54:23.311738 progress 60% (3MB)
34 07:54:23.313134 progress 65% (3MB)
35 07:54:23.314695 progress 70% (3MB)
36 07:54:23.316117 progress 75% (3MB)
37 07:54:23.317552 progress 80% (4MB)
38 07:54:23.318959 progress 85% (4MB)
39 07:54:23.320516 progress 90% (4MB)
40 07:54:23.321940 progress 95% (4MB)
41 07:54:23.323342 progress 100% (5MB)
42 07:54:23.323602 5MB downloaded in 0.03s (169.75MB/s)
43 07:54:23.323749 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:54:23.323997 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:54:23.324086 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:54:23.324184 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:54:23.324289 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:54:23.324357 saving as /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/kernel/bzImage
50 07:54:23.324419 total size: 7131024 (6MB)
51 07:54:23.324481 No compression specified
52 07:54:23.325583 progress 0% (0MB)
53 07:54:23.327369 progress 5% (0MB)
54 07:54:23.329255 progress 10% (0MB)
55 07:54:23.331094 progress 15% (1MB)
56 07:54:23.332931 progress 20% (1MB)
57 07:54:23.334812 progress 25% (1MB)
58 07:54:23.336670 progress 30% (2MB)
59 07:54:23.338512 progress 35% (2MB)
60 07:54:23.340284 progress 40% (2MB)
61 07:54:23.341964 progress 45% (3MB)
62 07:54:23.343739 progress 50% (3MB)
63 07:54:23.345525 progress 55% (3MB)
64 07:54:23.347256 progress 60% (4MB)
65 07:54:23.349024 progress 65% (4MB)
66 07:54:23.350789 progress 70% (4MB)
67 07:54:23.352591 progress 75% (5MB)
68 07:54:23.354374 progress 80% (5MB)
69 07:54:23.355973 progress 85% (5MB)
70 07:54:23.357748 progress 90% (6MB)
71 07:54:23.359507 progress 95% (6MB)
72 07:54:23.361324 progress 100% (6MB)
73 07:54:23.361559 6MB downloaded in 0.04s (183.14MB/s)
74 07:54:23.361707 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:54:23.361957 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:54:23.362049 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:54:23.362138 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:54:23.362242 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 07:54:23.362311 saving as /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/nfsrootfs/full.rootfs.tar
81 07:54:23.362374 total size: 207113456 (197MB)
82 07:54:23.362435 Using unxz to decompress xz
83 07:54:23.365606 progress 0% (0MB)
84 07:54:23.924408 progress 5% (9MB)
85 07:54:24.462039 progress 10% (19MB)
86 07:54:25.051590 progress 15% (29MB)
87 07:54:25.419965 progress 20% (39MB)
88 07:54:25.787519 progress 25% (49MB)
89 07:54:26.388441 progress 30% (59MB)
90 07:54:26.943988 progress 35% (69MB)
91 07:54:27.540367 progress 40% (79MB)
92 07:54:28.099259 progress 45% (88MB)
93 07:54:28.675006 progress 50% (98MB)
94 07:54:29.301091 progress 55% (108MB)
95 07:54:29.984330 progress 60% (118MB)
96 07:54:30.123193 progress 65% (128MB)
97 07:54:30.264738 progress 70% (138MB)
98 07:54:30.358548 progress 75% (148MB)
99 07:54:30.426621 progress 80% (158MB)
100 07:54:30.497839 progress 85% (167MB)
101 07:54:30.603086 progress 90% (177MB)
102 07:54:30.880555 progress 95% (187MB)
103 07:54:31.472906 progress 100% (197MB)
104 07:54:31.478723 197MB downloaded in 8.12s (24.34MB/s)
105 07:54:31.478977 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:54:31.479248 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:54:31.479346 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:54:31.479440 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:54:31.479557 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:54:31.479631 saving as /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/modules/modules.tar
112 07:54:31.479695 total size: 52060 (0MB)
113 07:54:31.479761 Using unxz to decompress xz
114 07:54:31.482842 progress 62% (0MB)
115 07:54:31.483218 progress 100% (0MB)
116 07:54:31.486450 0MB downloaded in 0.01s (7.36MB/s)
117 07:54:31.486669 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:54:31.486933 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:54:31.487033 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 07:54:31.487130 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 07:54:33.551113 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119428/extract-nfsrootfs-3_0lzdoj
123 07:54:33.551328 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:54:33.551435 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 07:54:33.551576 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w
126 07:54:33.551679 makedir: /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin
127 07:54:33.551764 makedir: /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/tests
128 07:54:33.551846 makedir: /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/results
129 07:54:33.551944 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-add-keys
130 07:54:33.552075 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-add-sources
131 07:54:33.552189 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-background-process-start
132 07:54:33.552302 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-background-process-stop
133 07:54:33.552413 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-common-functions
134 07:54:33.552524 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-echo-ipv4
135 07:54:33.552635 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-install-packages
136 07:54:33.552862 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-installed-packages
137 07:54:33.552981 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-os-build
138 07:54:33.553092 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-probe-channel
139 07:54:33.553202 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-probe-ip
140 07:54:33.553311 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-target-ip
141 07:54:33.553418 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-target-mac
142 07:54:33.553527 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-target-storage
143 07:54:33.553637 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-case
144 07:54:33.553747 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-event
145 07:54:33.553855 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-feedback
146 07:54:33.553964 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-raise
147 07:54:33.554070 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-reference
148 07:54:33.554179 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-runner
149 07:54:33.554288 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-set
150 07:54:33.554397 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-test-shell
151 07:54:33.554508 Updating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-add-keys (debian)
152 07:54:33.554619 Updating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-add-sources (debian)
153 07:54:33.554729 Updating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-install-packages (debian)
154 07:54:33.554839 Updating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-installed-packages (debian)
155 07:54:33.554949 Updating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/bin/lava-os-build (debian)
156 07:54:33.555043 Creating /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/environment
157 07:54:33.555128 LAVA metadata
158 07:54:33.555194 - LAVA_JOB_ID=8119428
159 07:54:33.555257 - LAVA_DISPATCHER_IP=192.168.201.1
160 07:54:33.555356 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 07:54:33.555421 skipped lava-vland-overlay
162 07:54:33.555497 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 07:54:33.555577 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 07:54:33.555639 skipped lava-multinode-overlay
165 07:54:33.555713 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 07:54:33.555793 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 07:54:33.555866 Loading test definitions
168 07:54:33.555956 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 07:54:33.556025 Using /lava-8119428 at stage 0
170 07:54:33.556257 uuid=8119428_1.5.2.3.1 testdef=None
171 07:54:33.556346 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 07:54:33.556433 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 07:54:33.556923 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 07:54:33.557158 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 07:54:33.557645 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 07:54:33.557886 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 07:54:33.558347 runner path: /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/0/tests/0_timesync-off test_uuid 8119428_1.5.2.3.1
180 07:54:33.558498 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 07:54:33.558732 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 07:54:33.558808 Using /lava-8119428 at stage 0
184 07:54:33.558904 Fetching tests from https://github.com/kernelci/test-definitions.git
185 07:54:33.558985 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/0/tests/1_kselftest-rtc'
186 07:54:37.299132 Running '/usr/bin/git checkout kernelci.org
187 07:54:37.441386 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
188 07:54:37.442077 uuid=8119428_1.5.2.3.5 testdef=None
189 07:54:37.442238 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
191 07:54:37.442490 start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
192 07:54:37.443210 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 07:54:37.443454 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
195 07:54:37.444392 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 07:54:37.444649 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
198 07:54:37.445654 runner path: /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/0/tests/1_kselftest-rtc test_uuid 8119428_1.5.2.3.5
199 07:54:37.445746 BOARD='asus-C436FA-Flip-hatch'
200 07:54:37.445815 BRANCH='cip'
201 07:54:37.445879 SKIPFILE='skipfile-lkft.yaml'
202 07:54:37.445939 TESTPROG_URL='None'
203 07:54:37.445999 TST_CASENAME=''
204 07:54:37.446059 TST_CMDFILES='rtc'
205 07:54:37.446194 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 07:54:37.446412 Creating lava-test-runner.conf files
208 07:54:37.446480 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119428/lava-overlay-afzy171w/lava-8119428/0 for stage 0
209 07:54:37.446567 - 0_timesync-off
210 07:54:37.446637 - 1_kselftest-rtc
211 07:54:37.446730 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
212 07:54:37.446819 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
213 07:54:44.863213 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 07:54:44.863377 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
215 07:54:44.863476 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 07:54:44.863581 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
217 07:54:44.863675 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
218 07:54:44.967535 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 07:54:44.967896 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
220 07:54:44.968019 extracting modules file /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119428/extract-nfsrootfs-3_0lzdoj
221 07:54:44.972200 extracting modules file /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119428/extract-overlay-ramdisk-orfgzlzn/ramdisk
222 07:54:44.976159 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 07:54:44.976292 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
224 07:54:44.976385 [common] Applying overlay to NFS
225 07:54:44.976457 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119428/compress-overlay-csuu7bg_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119428/extract-nfsrootfs-3_0lzdoj
226 07:54:45.445265 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 07:54:45.445442 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
228 07:54:45.445545 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 07:54:45.445638 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
230 07:54:45.445721 Building ramdisk /var/lib/lava/dispatcher/tmp/8119428/extract-overlay-ramdisk-orfgzlzn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119428/extract-overlay-ramdisk-orfgzlzn/ramdisk
231 07:54:45.479793 >> 24546 blocks
232 07:54:45.957412 rename /var/lib/lava/dispatcher/tmp/8119428/extract-overlay-ramdisk-orfgzlzn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/ramdisk/ramdisk.cpio.gz
233 07:54:45.957814 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 07:54:45.957940 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
235 07:54:45.958041 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
236 07:54:45.958136 No mkimage arch provided, not using FIT.
237 07:54:45.958226 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 07:54:45.958311 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 07:54:45.958412 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
240 07:54:45.958532 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
241 07:54:45.958614 No LXC device requested
242 07:54:45.958699 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 07:54:45.958789 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
244 07:54:45.958870 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 07:54:45.958942 Checking files for TFTP limit of 4294967296 bytes.
246 07:54:45.959324 end: 1 tftp-deploy (duration 00:00:23) [common]
247 07:54:45.959425 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 07:54:45.959520 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 07:54:45.959650 substitutions:
250 07:54:45.959718 - {DTB}: None
251 07:54:45.959783 - {INITRD}: 8119428/tftp-deploy-wrhcvjxw/ramdisk/ramdisk.cpio.gz
252 07:54:45.959845 - {KERNEL}: 8119428/tftp-deploy-wrhcvjxw/kernel/bzImage
253 07:54:45.959905 - {LAVA_MAC}: None
254 07:54:45.959963 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119428/extract-nfsrootfs-3_0lzdoj
255 07:54:45.960030 - {NFS_SERVER_IP}: 192.168.201.1
256 07:54:45.960088 - {PRESEED_CONFIG}: None
257 07:54:45.960145 - {PRESEED_LOCAL}: None
258 07:54:45.960203 - {RAMDISK}: 8119428/tftp-deploy-wrhcvjxw/ramdisk/ramdisk.cpio.gz
259 07:54:45.960260 - {ROOT_PART}: None
260 07:54:45.960315 - {ROOT}: None
261 07:54:45.960371 - {SERVER_IP}: 192.168.201.1
262 07:54:45.960427 - {TEE}: None
263 07:54:45.960512 Parsed boot commands:
264 07:54:45.960594 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 07:54:45.960766 Parsed boot commands: tftpboot 192.168.201.1 8119428/tftp-deploy-wrhcvjxw/kernel/bzImage 8119428/tftp-deploy-wrhcvjxw/kernel/cmdline 8119428/tftp-deploy-wrhcvjxw/ramdisk/ramdisk.cpio.gz
266 07:54:45.960862 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 07:54:45.960950 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 07:54:45.961042 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 07:54:45.961133 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 07:54:45.961207 Not connected, no need to disconnect.
271 07:54:45.961284 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 07:54:45.961368 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 07:54:45.961436 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
274 07:54:45.964158 Setting prompt string to ['lava-test: # ']
275 07:54:45.964461 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 07:54:45.964565 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 07:54:45.964664 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 07:54:45.964794 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 07:54:45.964986 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 07:54:45.984569 >> Command sent successfully.
281 07:54:45.986690 Returned 0 in 0 seconds
282 07:54:46.087504 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 07:54:46.087833 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 07:54:46.087930 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 07:54:46.088015 Setting prompt string to 'Starting depthcharge on Helios...'
287 07:54:46.088080 Changing prompt to 'Starting depthcharge on Helios...'
288 07:54:46.088149 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 07:54:46.088422 [Enter `^Ec?' for help]
290 07:54:52.594116
291 07:54:52.594311
292 07:54:52.604004 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 07:54:52.607319 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 07:54:52.614420 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 07:54:52.617664 CPU: AES supported, TXT NOT supported, VT supported
296 07:54:52.624867 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 07:54:52.627326 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 07:54:52.634382 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 07:54:52.637570 VBOOT: Loading verstage.
300 07:54:52.640657 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 07:54:52.647372 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 07:54:52.650675 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 07:54:52.654087
304 07:54:52.654636 CBFS @ c08000 size 3f8000
305 07:54:52.661067 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 07:54:52.664369 CBFS: Locating 'fallback/verstage'
307 07:54:52.667458 CBFS: Found @ offset 10fb80 size 1072c
308 07:54:52.671403
309 07:54:52.671949
310 07:54:52.681417 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 07:54:52.696113 Probing TPM: . done!
312 07:54:52.698964 TPM ready after 0 ms
313 07:54:52.702524 Connected to device vid:did:rid of 1ae0:0028:00
314 07:54:52.712411 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 07:54:52.715586 Initialized TPM device CR50 revision 0
316 07:54:52.756718 tlcl_send_startup: Startup return code is 0
317 07:54:52.756993 TPM: setup succeeded
318 07:54:52.769345 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 07:54:52.773160 Chrome EC: UHEPI supported
320 07:54:52.776345 Phase 1
321 07:54:52.779687 FMAP: area GBB found @ c05000 (12288 bytes)
322 07:54:52.786048 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 07:54:52.789110 Phase 2
324 07:54:52.789199 Phase 3
325 07:54:52.792997 FMAP: area GBB found @ c05000 (12288 bytes)
326 07:54:52.799258 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 07:54:52.805395 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 07:54:52.809277 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
329 07:54:52.815706 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 07:54:52.831678 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 07:54:52.835006 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
332 07:54:52.841408 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 07:54:52.846119 Phase 4
334 07:54:52.849165 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
335 07:54:52.855895 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 07:54:52.858907
337 07:54:53.035973 VB2:vb2_rsa_verify_digest() Digest check failed!
338 07:54:53.042166 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
339 07:54:53.042715 Saving nvdata
340 07:54:53.045546 Reboot requested (10020007)
341 07:54:53.049072 board_reset() called!
342 07:54:53.049638 full_reset() called!
343 07:54:57.562072
344 07:54:57.562674
345 07:54:57.571691 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
346 07:54:57.575596 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
347 07:54:57.582008 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
348 07:54:57.585719 CPU: AES supported, TXT NOT supported, VT supported
349 07:54:57.592045 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
350 07:54:57.595246 PCH: device id 0284 (rev 00) is Cometlake-U Premium
351 07:54:57.601666 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
352 07:54:57.605006 VBOOT: Loading verstage.
353 07:54:57.608196 FMAP: Found "FLASH" version 1.1 at 0xc04000.
354 07:54:57.614637 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
355 07:54:57.621635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 07:54:57.622256 CBFS @ c08000 size 3f8000
357 07:54:57.628233 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 07:54:57.631230 CBFS: Locating 'fallback/verstage'
359 07:54:57.634651 CBFS: Found @ offset 10fb80 size 1072c
360 07:54:57.638952
361 07:54:57.639434
362 07:54:57.648413 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
363 07:54:57.663260 Probing TPM: . done!
364 07:54:57.666266 TPM ready after 0 ms
365 07:54:57.669522 Connected to device vid:did:rid of 1ae0:0028:00
366 07:54:57.680182 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
367 07:54:57.683223 Initialized TPM device CR50 revision 0
368 07:54:57.724577 tlcl_send_startup: Startup return code is 0
369 07:54:57.725202 TPM: setup succeeded
370 07:54:57.736994 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
371 07:54:57.740993 Chrome EC: UHEPI supported
372 07:54:57.744157 Phase 1
373 07:54:57.747446 FMAP: area GBB found @ c05000 (12288 bytes)
374 07:54:57.753737 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
375 07:54:57.760612 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
376 07:54:57.763820 Recovery requested (1009000e)
377 07:54:57.769329 Saving nvdata
378 07:54:57.775768 tlcl_extend: response is 0
379 07:54:57.784140 tlcl_extend: response is 0
380 07:54:57.791136 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 07:54:57.794449 CBFS @ c08000 size 3f8000
382 07:54:57.800920 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 07:54:57.804154 CBFS: Locating 'fallback/romstage'
384 07:54:57.807398 CBFS: Found @ offset 80 size 145fc
385 07:54:57.810563 Accumulated console time in verstage 98 ms
386 07:54:57.810693
387 07:54:57.810795
388 07:54:57.823997 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
389 07:54:57.830562 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
390 07:54:57.834287 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
391 07:54:57.837504 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
392 07:54:57.844028 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
393 07:54:57.847159 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
394 07:54:57.850454 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
395 07:54:57.853761 TCO_STS: 0000 0000
396 07:54:57.856900 GEN_PMCON: e0015238 00000200
397 07:54:57.860170 GBLRST_CAUSE: 00000000 00000000
398 07:54:57.860267 prev_sleep_state 5
399 07:54:57.864045 Boot Count incremented to 39066
400 07:54:57.871167 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 07:54:57.874313 CBFS @ c08000 size 3f8000
402 07:54:57.881036 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 07:54:57.881126 CBFS: Locating 'fspm.bin'
404 07:54:57.887469 CBFS: Found @ offset 5ffc0 size 71000
405 07:54:57.890591 Chrome EC: UHEPI supported
406 07:54:57.897292 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
407 07:54:57.901092 Probing TPM: done!
408 07:54:57.907743 Connected to device vid:did:rid of 1ae0:0028:00
409 07:54:57.917637 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
410 07:54:57.923475 Initialized TPM device CR50 revision 0
411 07:54:57.932720 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
412 07:54:57.938651 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
413 07:54:57.942359 MRC cache found, size 1948
414 07:54:57.945805 bootmode is set to: 2
415 07:54:57.949028 PRMRR disabled by config.
416 07:54:57.949225 SPD INDEX = 1
417 07:54:57.952215
418 07:54:57.955607 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
419 07:54:57.958783 CBFS @ c08000 size 3f8000
420 07:54:57.965609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
421 07:54:57.965931 CBFS: Locating 'spd.bin'
422 07:54:57.968673 CBFS: Found @ offset 5fb80 size 400
423 07:54:57.971936 SPD: module type is LPDDR3
424 07:54:57.975806 SPD: module part is
425 07:54:57.982249 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
426 07:54:57.985397 SPD: device width 4 bits, bus width 8 bits
427 07:54:57.988542 SPD: module size is 4096 MB (per channel)
428 07:54:57.991894 memory slot: 0 configuration done.
429 07:54:57.995119 memory slot: 2 configuration done.
430 07:54:57.998085
431 07:54:58.047255 CBMEM:
432 07:54:58.050348 IMD: root @ 99fff000 254 entries.
433 07:54:58.053443 IMD: root @ 99ffec00 62 entries.
434 07:54:58.057134 External stage cache:
435 07:54:58.060013 IMD: root @ 9abff000 254 entries.
436 07:54:58.063135 IMD: root @ 9abfec00 62 entries.
437 07:54:58.066208 Chrome EC: clear events_b mask to 0x0000000020004000
438 07:54:58.069625
439 07:54:58.082381 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 07:54:58.095503 tlcl_write: response is 0
441 07:54:58.104551 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 07:54:58.111310 MRC: TPM MRC hash updated successfully.
443 07:54:58.111758 2 DIMMs found
444 07:54:58.114415 SMM Memory Map
445 07:54:58.117621 SMRAM : 0x9a000000 0x1000000
446 07:54:58.121146 Subregion 0: 0x9a000000 0xa00000
447 07:54:58.124312 Subregion 1: 0x9aa00000 0x200000
448 07:54:58.127461 Subregion 2: 0x9ac00000 0x400000
449 07:54:58.131233 top_of_ram = 0x9a000000
450 07:54:58.134139 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
451 07:54:58.140568 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
452 07:54:58.143975 MTRR Range: Start=ff000000 End=0 (Size 1000000)
453 07:54:58.151143 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 07:54:58.154431 CBFS @ c08000 size 3f8000
455 07:54:58.156923 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 07:54:58.160661 CBFS: Locating 'fallback/postcar'
457 07:54:58.163855
458 07:54:58.167163 CBFS: Found @ offset 107000 size 4b44
459 07:54:58.173788 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
460 07:54:58.183961 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
461 07:54:58.187148 Processing 180 relocs. Offset value of 0x97c0c000
462 07:54:58.195269 Accumulated console time in romstage 286 ms
463 07:54:58.195756
464 07:54:58.196112
465 07:54:58.205161 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
466 07:54:58.211869 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
467 07:54:58.215037 CBFS @ c08000 size 3f8000
468 07:54:58.221490 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
469 07:54:58.225649 CBFS: Locating 'fallback/ramstage'
470 07:54:58.228552 CBFS: Found @ offset 43380 size 1b9e8
471 07:54:58.235003 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
472 07:54:58.266887 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
473 07:54:58.270677 Processing 3976 relocs. Offset value of 0x98db0000
474 07:54:58.277074 Accumulated console time in postcar 52 ms
475 07:54:58.277559
476 07:54:58.277935
477 07:54:58.286924 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
478 07:54:58.293694 FMAP: area RO_VPD found @ c00000 (16384 bytes)
479 07:54:58.296847 WARNING: RO_VPD is uninitialized or empty.
480 07:54:58.300097 FMAP: area RW_VPD found @ af8000 (8192 bytes)
481 07:54:58.306500 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 07:54:58.307094 Normal boot.
483 07:54:58.313116 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
484 07:54:58.316340 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
485 07:54:58.319571 CBFS @ c08000 size 3f8000
486 07:54:58.326705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
487 07:54:58.329901 CBFS: Locating 'cpu_microcode_blob.bin'
488 07:54:58.332914 CBFS: Found @ offset 14700 size 2ec00
489 07:54:58.336112 microcode: sig=0x806ec pf=0x4 revision=0xc9
490 07:54:58.339834 Skip microcode update
491 07:54:58.346337 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
492 07:54:58.346911 CBFS @ c08000 size 3f8000
493 07:54:58.352613 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
494 07:54:58.356837 CBFS: Locating 'fsps.bin'
495 07:54:58.359580 CBFS: Found @ offset d1fc0 size 35000
496 07:54:58.384748 Detected 4 core, 8 thread CPU.
497 07:54:58.388166 Setting up SMI for CPU
498 07:54:58.391434 IED base = 0x9ac00000
499 07:54:58.391520 IED size = 0x00400000
500 07:54:58.394509 Will perform SMM setup.
501 07:54:58.401317 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
502 07:54:58.407712 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
503 07:54:58.410963 Processing 16 relocs. Offset value of 0x00030000
504 07:54:58.414364
505 07:54:58.414450 Attempting to start 7 APs
506 07:54:58.420945 Waiting for 10ms after sending INIT.
507 07:54:58.434417 Waiting for 1st SIPI to complete...done.
508 07:54:58.434514 AP: slot 6 apic_id 6.
509 07:54:58.437872 AP: slot 3 apic_id 7.
510 07:54:58.441185 Waiting for 2nd SIPI to complete...done.
511 07:54:58.444148 AP: slot 4 apic_id 1.
512 07:54:58.447938 AP: slot 5 apic_id 4.
513 07:54:58.448026 AP: slot 2 apic_id 5.
514 07:54:58.451362 AP: slot 1 apic_id 3.
515 07:54:58.454575 AP: slot 7 apic_id 2.
516 07:54:58.460615 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 07:54:58.467601 Processing 13 relocs. Offset value of 0x00038000
518 07:54:58.474031 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 07:54:58.477378 Installing SMM handler to 0x9a000000
520 07:54:58.484166 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 07:54:58.490558 Processing 658 relocs. Offset value of 0x9a010000
522 07:54:58.497258 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 07:54:58.500529 Processing 13 relocs. Offset value of 0x9a008000
524 07:54:58.507183 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 07:54:58.513785 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 07:54:58.520506 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 07:54:58.523930 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 07:54:58.530388 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 07:54:58.536494 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 07:54:58.543478 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 07:54:58.549990 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 07:54:58.553022 Clearing SMI status registers
533 07:54:58.553157 SMI_STS: PM1
534 07:54:58.556366 PM1_STS: PWRBTN
535 07:54:58.556828 TCO_STS: SECOND_TO
536 07:54:58.559771 New SMBASE 0x9a000000
537 07:54:58.563605 In relocation handler: CPU 0
538 07:54:58.566949 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 07:54:58.573291 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 07:54:58.573735 Relocation complete.
541 07:54:58.576299 New SMBASE 0x99fff000
542 07:54:58.580412 In relocation handler: CPU 4
543 07:54:58.582684 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
544 07:54:58.589347 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 07:54:58.589793 Relocation complete.
546 07:54:58.593157 New SMBASE 0x99ffec00
547 07:54:58.596201 In relocation handler: CPU 5
548 07:54:58.599398 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
549 07:54:58.606145 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 07:54:58.606630 Relocation complete.
551 07:54:58.609021 New SMBASE 0x99fffc00
552 07:54:58.612241 In relocation handler: CPU 1
553 07:54:58.615413 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 07:54:58.618853 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 07:54:58.622425
556 07:54:58.622872 Relocation complete.
557 07:54:58.625804 New SMBASE 0x99ffe400
558 07:54:58.628819 In relocation handler: CPU 7
559 07:54:58.632657 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
560 07:54:58.635912 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 07:54:58.639275 Relocation complete.
562 07:54:58.642508 New SMBASE 0x99fff800
563 07:54:58.645855 In relocation handler: CPU 2
564 07:54:58.648924 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
565 07:54:58.652143 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 07:54:58.655606 Relocation complete.
567 07:54:58.659042 New SMBASE 0x99fff400
568 07:54:58.662221 In relocation handler: CPU 3
569 07:54:58.665697 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
570 07:54:58.668870 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 07:54:58.671908 Relocation complete.
572 07:54:58.674964 New SMBASE 0x99ffe800
573 07:54:58.678274 In relocation handler: CPU 6
574 07:54:58.682037 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
575 07:54:58.685218 Writing SMRR. base = 0x9a000006, mask=0xff000800
576 07:54:58.688366 Relocation complete.
577 07:54:58.691578 Initializing CPU #0
578 07:54:58.694618 CPU: vendor Intel device 806ec
579 07:54:58.697888 CPU: family 06, model 8e, stepping 0c
580 07:54:58.701451 Clearing out pending MCEs
581 07:54:58.701950 Setting up local APIC...
582 07:54:58.704678 apic_id: 0x00 done.
583 07:54:58.707793 Turbo is available but hidden
584 07:54:58.711044 Turbo is available and visible
585 07:54:58.714650 VMX status: enabled
586 07:54:58.717823 IA32_FEATURE_CONTROL status: locked
587 07:54:58.718263 Skip microcode update
588 07:54:58.721248 CPU #0 initialized
589 07:54:58.724614 Initializing CPU #4
590 07:54:58.725094 Initializing CPU #3
591 07:54:58.727766 Initializing CPU #6
592 07:54:58.731194 CPU: vendor Intel device 806ec
593 07:54:58.734433 CPU: family 06, model 8e, stepping 0c
594 07:54:58.737436 CPU: vendor Intel device 806ec
595 07:54:58.740881 CPU: family 06, model 8e, stepping 0c
596 07:54:58.743785 Clearing out pending MCEs
597 07:54:58.747886 Clearing out pending MCEs
598 07:54:58.748339 Setting up local APIC...
599 07:54:58.751038 Initializing CPU #7
600 07:54:58.753773 Initializing CPU #1
601 07:54:58.757745 CPU: vendor Intel device 806ec
602 07:54:58.760314 CPU: family 06, model 8e, stepping 0c
603 07:54:58.764108 CPU: vendor Intel device 806ec
604 07:54:58.766851 CPU: family 06, model 8e, stepping 0c
605 07:54:58.770700 Clearing out pending MCEs
606 07:54:58.771144 Clearing out pending MCEs
607 07:54:58.773825 Setting up local APIC...
608 07:54:58.776966 CPU: vendor Intel device 806ec
609 07:54:58.780646 CPU: family 06, model 8e, stepping 0c
610 07:54:58.783992 Clearing out pending MCEs
611 07:54:58.787275 Initializing CPU #5
612 07:54:58.787822 apic_id: 0x03 done.
613 07:54:58.790659 Setting up local APIC...
614 07:54:58.794014 CPU: vendor Intel device 806ec
615 07:54:58.797046 CPU: family 06, model 8e, stepping 0c
616 07:54:58.800609 Initializing CPU #2
617 07:54:58.803401 Clearing out pending MCEs
618 07:54:58.806555 CPU: vendor Intel device 806ec
619 07:54:58.810507 CPU: family 06, model 8e, stepping 0c
620 07:54:58.810976 Setting up local APIC...
621 07:54:58.813682
622 07:54:58.814141 apic_id: 0x02 done.
623 07:54:58.816897 VMX status: enabled
624 07:54:58.817330 VMX status: enabled
625 07:54:58.820277 IA32_FEATURE_CONTROL status: locked
626 07:54:58.827008 IA32_FEATURE_CONTROL status: locked
627 07:54:58.827548 Skip microcode update
628 07:54:58.830511 Skip microcode update
629 07:54:58.831049 CPU #1 initialized
630 07:54:58.833537
631 07:54:58.834132 CPU #7 initialized
632 07:54:58.836639 Setting up local APIC...
633 07:54:58.837124 apic_id: 0x04 done.
634 07:54:58.839867
635 07:54:58.840362 Clearing out pending MCEs
636 07:54:58.843082 VMX status: enabled
637 07:54:58.846348 Setting up local APIC...
638 07:54:58.846783 apic_id: 0x01 done.
639 07:54:58.849654 apic_id: 0x05 done.
640 07:54:58.853303 IA32_FEATURE_CONTROL status: locked
641 07:54:58.856370 VMX status: enabled
642 07:54:58.856882 Skip microcode update
643 07:54:58.859606 IA32_FEATURE_CONTROL status: locked
644 07:54:58.862889 CPU #5 initialized
645 07:54:58.866146 Skip microcode update
646 07:54:58.866584 VMX status: enabled
647 07:54:58.869439 CPU #2 initialized
648 07:54:58.872847 apic_id: 0x06 done.
649 07:54:58.873391 Setting up local APIC...
650 07:54:58.876138 IA32_FEATURE_CONTROL status: locked
651 07:54:58.879654 apic_id: 0x07 done.
652 07:54:58.882657 VMX status: enabled
653 07:54:58.883106 VMX status: enabled
654 07:54:58.886039 IA32_FEATURE_CONTROL status: locked
655 07:54:58.892642 IA32_FEATURE_CONTROL status: locked
656 07:54:58.893292 Skip microcode update
657 07:54:58.896107 Skip microcode update
658 07:54:58.896642 CPU #6 initialized
659 07:54:58.899252
660 07:54:58.899747 CPU #3 initialized
661 07:54:58.902396 Skip microcode update
662 07:54:58.902889 CPU #4 initialized
663 07:54:58.909095 bsp_do_flight_plan done after 463 msecs.
664 07:54:58.912216 CPU: frequency set to 4200 MHz
665 07:54:58.912711 Enabling SMIs.
666 07:54:58.915530 Locking SMM.
667 07:54:58.929166 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
668 07:54:58.932583 CBFS @ c08000 size 3f8000
669 07:54:58.939195 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
670 07:54:58.939815 CBFS: Locating 'vbt.bin'
671 07:54:58.942494 CBFS: Found @ offset 5f5c0 size 499
672 07:54:58.948787 Found a VBT of 4608 bytes after decompression
673 07:54:59.128680 Display FSP Version Info HOB
674 07:54:59.131743 Reference Code - CPU = 9.0.1e.30
675 07:54:59.135230 uCode Version = 0.0.0.ca
676 07:54:59.138467 TXT ACM version = ff.ff.ff.ffff
677 07:54:59.141712 Display FSP Version Info HOB
678 07:54:59.144870 Reference Code - ME = 9.0.1e.30
679 07:54:59.148882 MEBx version = 0.0.0.0
680 07:54:59.152001 ME Firmware Version = Consumer SKU
681 07:54:59.155144 Display FSP Version Info HOB
682 07:54:59.158494 Reference Code - CML PCH = 9.0.1e.30
683 07:54:59.161630 PCH-CRID Status = Disabled
684 07:54:59.164776 PCH-CRID Original Value = ff.ff.ff.ffff
685 07:54:59.168053 PCH-CRID New Value = ff.ff.ff.ffff
686 07:54:59.171277 OPROM - RST - RAID = ff.ff.ff.ffff
687 07:54:59.174661 ChipsetInit Base Version = ff.ff.ff.ffff
688 07:54:59.177829 ChipsetInit Oem Version = ff.ff.ff.ffff
689 07:54:59.181126 Display FSP Version Info HOB
690 07:54:59.187675 Reference Code - SA - System Agent = 9.0.1e.30
691 07:54:59.190785 Reference Code - MRC = 0.7.1.6c
692 07:54:59.194057 SA - PCIe Version = 9.0.1e.30
693 07:54:59.194536 SA-CRID Status = Disabled
694 07:54:59.197196
695 07:54:59.200699 SA-CRID Original Value = 0.0.0.c
696 07:54:59.201141 SA-CRID New Value = 0.0.0.c
697 07:54:59.204710 OPROM - VBIOS = ff.ff.ff.ffff
698 07:54:59.207750 RTC Init
699 07:54:59.211126 Set power on after power failure.
700 07:54:59.211561 Disabling Deep S3
701 07:54:59.214196 Disabling Deep S3
702 07:54:59.217634 Disabling Deep S4
703 07:54:59.218072 Disabling Deep S4
704 07:54:59.220793 Disabling Deep S5
705 07:54:59.221229 Disabling Deep S5
706 07:54:59.227259 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 190 exit 1
707 07:54:59.230654 Enumerating buses...
708 07:54:59.233997 Show all devs... Before device enumeration.
709 07:54:59.237438 Root Device: enabled 1
710 07:54:59.240697 CPU_CLUSTER: 0: enabled 1
711 07:54:59.241225 DOMAIN: 0000: enabled 1
712 07:54:59.243959 APIC: 00: enabled 1
713 07:54:59.247145 PCI: 00:00.0: enabled 1
714 07:54:59.247606 PCI: 00:02.0: enabled 1
715 07:54:59.250395 PCI: 00:04.0: enabled 0
716 07:54:59.253688 PCI: 00:05.0: enabled 0
717 07:54:59.256725 PCI: 00:12.0: enabled 1
718 07:54:59.257153 PCI: 00:12.5: enabled 0
719 07:54:59.260070 PCI: 00:12.6: enabled 0
720 07:54:59.263146 PCI: 00:14.0: enabled 1
721 07:54:59.266990 PCI: 00:14.1: enabled 0
722 07:54:59.267434 PCI: 00:14.3: enabled 1
723 07:54:59.269688 PCI: 00:14.5: enabled 0
724 07:54:59.273292 PCI: 00:15.0: enabled 1
725 07:54:59.276637 PCI: 00:15.1: enabled 1
726 07:54:59.277136 PCI: 00:15.2: enabled 0
727 07:54:59.279974 PCI: 00:15.3: enabled 0
728 07:54:59.282699 PCI: 00:16.0: enabled 1
729 07:54:59.286547 PCI: 00:16.1: enabled 0
730 07:54:59.286995 PCI: 00:16.2: enabled 0
731 07:54:59.289680 PCI: 00:16.3: enabled 0
732 07:54:59.292813 PCI: 00:16.4: enabled 0
733 07:54:59.296124 PCI: 00:16.5: enabled 0
734 07:54:59.296704 PCI: 00:17.0: enabled 1
735 07:54:59.299412 PCI: 00:19.0: enabled 1
736 07:54:59.302694 PCI: 00:19.1: enabled 0
737 07:54:59.303142 PCI: 00:19.2: enabled 0
738 07:54:59.305835
739 07:54:59.306286 PCI: 00:1a.0: enabled 0
740 07:54:59.308978 PCI: 00:1c.0: enabled 0
741 07:54:59.312439 PCI: 00:1c.1: enabled 0
742 07:54:59.312920 PCI: 00:1c.2: enabled 0
743 07:54:59.315524 PCI: 00:1c.3: enabled 0
744 07:54:59.319224 PCI: 00:1c.4: enabled 0
745 07:54:59.322415 PCI: 00:1c.5: enabled 0
746 07:54:59.322872 PCI: 00:1c.6: enabled 0
747 07:54:59.325654 PCI: 00:1c.7: enabled 0
748 07:54:59.328430 PCI: 00:1d.0: enabled 1
749 07:54:59.331935 PCI: 00:1d.1: enabled 0
750 07:54:59.332327 PCI: 00:1d.2: enabled 0
751 07:54:59.335226 PCI: 00:1d.3: enabled 0
752 07:54:59.338353 PCI: 00:1d.4: enabled 0
753 07:54:59.341695 PCI: 00:1d.5: enabled 1
754 07:54:59.342141 PCI: 00:1e.0: enabled 1
755 07:54:59.344981 PCI: 00:1e.1: enabled 0
756 07:54:59.348264 PCI: 00:1e.2: enabled 1
757 07:54:59.351529 PCI: 00:1e.3: enabled 1
758 07:54:59.351972 PCI: 00:1f.0: enabled 1
759 07:54:59.354842 PCI: 00:1f.1: enabled 1
760 07:54:59.357968 PCI: 00:1f.2: enabled 1
761 07:54:59.361211 PCI: 00:1f.3: enabled 1
762 07:54:59.361656 PCI: 00:1f.4: enabled 1
763 07:54:59.364557 PCI: 00:1f.5: enabled 1
764 07:54:59.368480 PCI: 00:1f.6: enabled 0
765 07:54:59.371189 USB0 port 0: enabled 1
766 07:54:59.371760 I2C: 00:15: enabled 1
767 07:54:59.374338 I2C: 00:5d: enabled 1
768 07:54:59.377624 GENERIC: 0.0: enabled 1
769 07:54:59.378072 I2C: 00:1a: enabled 1
770 07:54:59.381042 I2C: 00:38: enabled 1
771 07:54:59.384601 I2C: 00:39: enabled 1
772 07:54:59.385085 I2C: 00:3a: enabled 1
773 07:54:59.387152 I2C: 00:3b: enabled 1
774 07:54:59.390442 PCI: 00:00.0: enabled 1
775 07:54:59.390905 SPI: 00: enabled 1
776 07:54:59.393847 SPI: 01: enabled 1
777 07:54:59.397174 PNP: 0c09.0: enabled 1
778 07:54:59.397617 USB2 port 0: enabled 1
779 07:54:59.400328 USB2 port 1: enabled 1
780 07:54:59.403485 USB2 port 2: enabled 0
781 07:54:59.406892 USB2 port 3: enabled 0
782 07:54:59.407423 USB2 port 5: enabled 0
783 07:54:59.410215 USB2 port 6: enabled 1
784 07:54:59.413934 USB2 port 9: enabled 1
785 07:54:59.414381 USB3 port 0: enabled 1
786 07:54:59.416656 USB3 port 1: enabled 1
787 07:54:59.420505 USB3 port 2: enabled 1
788 07:54:59.423663 USB3 port 3: enabled 1
789 07:54:59.424179 USB3 port 4: enabled 0
790 07:54:59.426333 APIC: 03: enabled 1
791 07:54:59.429788 APIC: 05: enabled 1
792 07:54:59.430258 APIC: 07: enabled 1
793 07:54:59.433439 APIC: 01: enabled 1
794 07:54:59.433962 APIC: 04: enabled 1
795 07:54:59.436342 APIC: 06: enabled 1
796 07:54:59.439754 APIC: 02: enabled 1
797 07:54:59.440236 Compare with tree...
798 07:54:59.443096 Root Device: enabled 1
799 07:54:59.446470 CPU_CLUSTER: 0: enabled 1
800 07:54:59.450281 APIC: 00: enabled 1
801 07:54:59.450801 APIC: 03: enabled 1
802 07:54:59.453396 APIC: 05: enabled 1
803 07:54:59.456062 APIC: 07: enabled 1
804 07:54:59.456561 APIC: 01: enabled 1
805 07:54:59.459706 APIC: 04: enabled 1
806 07:54:59.463076 APIC: 06: enabled 1
807 07:54:59.463519 APIC: 02: enabled 1
808 07:54:59.466177 DOMAIN: 0000: enabled 1
809 07:54:59.469355 PCI: 00:00.0: enabled 1
810 07:54:59.472672 PCI: 00:02.0: enabled 1
811 07:54:59.473175 PCI: 00:04.0: enabled 0
812 07:54:59.475888 PCI: 00:05.0: enabled 0
813 07:54:59.479217 PCI: 00:12.0: enabled 1
814 07:54:59.482475 PCI: 00:12.5: enabled 0
815 07:54:59.485610 PCI: 00:12.6: enabled 0
816 07:54:59.486046 PCI: 00:14.0: enabled 1
817 07:54:59.488870 USB0 port 0: enabled 1
818 07:54:59.492210 USB2 port 0: enabled 1
819 07:54:59.495974 USB2 port 1: enabled 1
820 07:54:59.499339 USB2 port 2: enabled 0
821 07:54:59.502757 USB2 port 3: enabled 0
822 07:54:59.503253 USB2 port 5: enabled 0
823 07:54:59.505200 USB2 port 6: enabled 1
824 07:54:59.509170 USB2 port 9: enabled 1
825 07:54:59.511871 USB3 port 0: enabled 1
826 07:54:59.515499 USB3 port 1: enabled 1
827 07:54:59.518702 USB3 port 2: enabled 1
828 07:54:59.518790 USB3 port 3: enabled 1
829 07:54:59.521922 USB3 port 4: enabled 0
830 07:54:59.524853 PCI: 00:14.1: enabled 0
831 07:54:59.528400 PCI: 00:14.3: enabled 1
832 07:54:59.531767 PCI: 00:14.5: enabled 0
833 07:54:59.531861 PCI: 00:15.0: enabled 1
834 07:54:59.534415 I2C: 00:15: enabled 1
835 07:54:59.538221 PCI: 00:15.1: enabled 1
836 07:54:59.540955 I2C: 00:5d: enabled 1
837 07:54:59.544332 GENERIC: 0.0: enabled 1
838 07:54:59.544414 PCI: 00:15.2: enabled 0
839 07:54:59.547630 PCI: 00:15.3: enabled 0
840 07:54:59.550916 PCI: 00:16.0: enabled 1
841 07:54:59.554075 PCI: 00:16.1: enabled 0
842 07:54:59.557362 PCI: 00:16.2: enabled 0
843 07:54:59.557442 PCI: 00:16.3: enabled 0
844 07:54:59.560635 PCI: 00:16.4: enabled 0
845 07:54:59.564019 PCI: 00:16.5: enabled 0
846 07:54:59.567085 PCI: 00:17.0: enabled 1
847 07:54:59.570882 PCI: 00:19.0: enabled 1
848 07:54:59.570959 I2C: 00:1a: enabled 1
849 07:54:59.573682 I2C: 00:38: enabled 1
850 07:54:59.577108 I2C: 00:39: enabled 1
851 07:54:59.580293 I2C: 00:3a: enabled 1
852 07:54:59.583862 I2C: 00:3b: enabled 1
853 07:54:59.584344 PCI: 00:19.1: enabled 0
854 07:54:59.587178 PCI: 00:19.2: enabled 0
855 07:54:59.590333 PCI: 00:1a.0: enabled 0
856 07:54:59.593604 PCI: 00:1c.0: enabled 0
857 07:54:59.597291 PCI: 00:1c.1: enabled 0
858 07:54:59.597742 PCI: 00:1c.2: enabled 0
859 07:54:59.600559 PCI: 00:1c.3: enabled 0
860 07:54:59.603592 PCI: 00:1c.4: enabled 0
861 07:54:59.607105 PCI: 00:1c.5: enabled 0
862 07:54:59.610428 PCI: 00:1c.6: enabled 0
863 07:54:59.610875 PCI: 00:1c.7: enabled 0
864 07:54:59.613515 PCI: 00:1d.0: enabled 1
865 07:54:59.616806 PCI: 00:1d.1: enabled 0
866 07:54:59.619991 PCI: 00:1d.2: enabled 0
867 07:54:59.623092 PCI: 00:1d.3: enabled 0
868 07:54:59.623538 PCI: 00:1d.4: enabled 0
869 07:54:59.626316 PCI: 00:1d.5: enabled 1
870 07:54:59.629595 PCI: 00:00.0: enabled 1
871 07:54:59.632975 PCI: 00:1e.0: enabled 1
872 07:54:59.636320 PCI: 00:1e.1: enabled 0
873 07:54:59.636994 PCI: 00:1e.2: enabled 1
874 07:54:59.639432 SPI: 00: enabled 1
875 07:54:59.642751 PCI: 00:1e.3: enabled 1
876 07:54:59.645851 SPI: 01: enabled 1
877 07:54:59.646367 PCI: 00:1f.0: enabled 1
878 07:54:59.649349 PNP: 0c09.0: enabled 1
879 07:54:59.652664 PCI: 00:1f.1: enabled 1
880 07:54:59.655735 PCI: 00:1f.2: enabled 1
881 07:54:59.658940 PCI: 00:1f.3: enabled 1
882 07:54:59.659492 PCI: 00:1f.4: enabled 1
883 07:54:59.662415 PCI: 00:1f.5: enabled 1
884 07:54:59.665651 PCI: 00:1f.6: enabled 0
885 07:54:59.668684 Root Device scanning...
886 07:54:59.672090 scan_static_bus for Root Device
887 07:54:59.675265 CPU_CLUSTER: 0 enabled
888 07:54:59.675727 DOMAIN: 0000 enabled
889 07:54:59.678484 DOMAIN: 0000 scanning...
890 07:54:59.682389 PCI: pci_scan_bus for bus 00
891 07:54:59.685568 PCI: 00:00.0 [8086/0000] ops
892 07:54:59.688843 PCI: 00:00.0 [8086/9b61] enabled
893 07:54:59.691503 PCI: 00:02.0 [8086/0000] bus ops
894 07:54:59.694712 PCI: 00:02.0 [8086/9b41] enabled
895 07:54:59.698569 PCI: 00:04.0 [8086/1903] disabled
896 07:54:59.701528 PCI: 00:08.0 [8086/1911] enabled
897 07:54:59.704862 PCI: 00:12.0 [8086/02f9] enabled
898 07:54:59.708145 PCI: 00:14.0 [8086/0000] bus ops
899 07:54:59.711405 PCI: 00:14.0 [8086/02ed] enabled
900 07:54:59.714513 PCI: 00:14.2 [8086/02ef] enabled
901 07:54:59.718370 PCI: 00:14.3 [8086/02f0] enabled
902 07:54:59.721446 PCI: 00:15.0 [8086/0000] bus ops
903 07:54:59.724855 PCI: 00:15.0 [8086/02e8] enabled
904 07:54:59.728244 PCI: 00:15.1 [8086/0000] bus ops
905 07:54:59.731286 PCI: 00:15.1 [8086/02e9] enabled
906 07:54:59.734721 PCI: 00:16.0 [8086/0000] ops
907 07:54:59.737416 PCI: 00:16.0 [8086/02e0] enabled
908 07:54:59.740619 PCI: 00:17.0 [8086/0000] ops
909 07:54:59.744090 PCI: 00:17.0 [8086/02d3] enabled
910 07:54:59.747372 PCI: 00:19.0 [8086/0000] bus ops
911 07:54:59.750667 PCI: 00:19.0 [8086/02c5] enabled
912 07:54:59.753838 PCI: 00:1d.0 [8086/0000] bus ops
913 07:54:59.757223 PCI: 00:1d.0 [8086/02b0] enabled
914 07:54:59.763680 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 07:54:59.767053 PCI: 00:1e.0 [8086/0000] ops
916 07:54:59.770245 PCI: 00:1e.0 [8086/02a8] enabled
917 07:54:59.773442 PCI: 00:1e.2 [8086/0000] bus ops
918 07:54:59.776787 PCI: 00:1e.2 [8086/02aa] enabled
919 07:54:59.780193 PCI: 00:1e.3 [8086/0000] bus ops
920 07:54:59.783462 PCI: 00:1e.3 [8086/02ab] enabled
921 07:54:59.786707 PCI: 00:1f.0 [8086/0000] bus ops
922 07:54:59.789925 PCI: 00:1f.0 [8086/0284] enabled
923 07:54:59.796431 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 07:54:59.799883 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 07:54:59.803100 PCI: 00:1f.3 [8086/0000] bus ops
926 07:54:59.806427 PCI: 00:1f.3 [8086/02c8] enabled
927 07:54:59.809529 PCI: 00:1f.4 [8086/0000] bus ops
928 07:54:59.812839 PCI: 00:1f.4 [8086/02a3] enabled
929 07:54:59.816191 PCI: 00:1f.5 [8086/0000] bus ops
930 07:54:59.819625 PCI: 00:1f.5 [8086/02a4] enabled
931 07:54:59.822663 PCI: Leftover static devices:
932 07:54:59.826069 PCI: 00:05.0
933 07:54:59.826515 PCI: 00:12.5
934 07:54:59.829333 PCI: 00:12.6
935 07:54:59.829778 PCI: 00:14.1
936 07:54:59.830125 PCI: 00:14.5
937 07:54:59.832919 PCI: 00:15.2
938 07:54:59.833462 PCI: 00:15.3
939 07:54:59.835752 PCI: 00:16.1
940 07:54:59.836200 PCI: 00:16.2
941 07:54:59.836549 PCI: 00:16.3
942 07:54:59.838823
943 07:54:59.839423 PCI: 00:16.4
944 07:54:59.839813 PCI: 00:16.5
945 07:54:59.842218 PCI: 00:19.1
946 07:54:59.842705 PCI: 00:19.2
947 07:54:59.845517 PCI: 00:1a.0
948 07:54:59.845975 PCI: 00:1c.0
949 07:54:59.846322 PCI: 00:1c.1
950 07:54:59.848923 PCI: 00:1c.2
951 07:54:59.849381 PCI: 00:1c.3
952 07:54:59.852324 PCI: 00:1c.4
953 07:54:59.852821 PCI: 00:1c.5
954 07:54:59.853185 PCI: 00:1c.6
955 07:54:59.855104
956 07:54:59.855546 PCI: 00:1c.7
957 07:54:59.855892 PCI: 00:1d.1
958 07:54:59.859128 PCI: 00:1d.2
959 07:54:59.859569 PCI: 00:1d.3
960 07:54:59.862148 PCI: 00:1d.4
961 07:54:59.862620 PCI: 00:1d.5
962 07:54:59.862973 PCI: 00:1e.1
963 07:54:59.864793 PCI: 00:1f.1
964 07:54:59.865237 PCI: 00:1f.2
965 07:54:59.868643 PCI: 00:1f.6
966 07:54:59.871883 PCI: Check your devicetree.cb.
967 07:54:59.872437 PCI: 00:02.0 scanning...
968 07:54:59.875225 scan_generic_bus for PCI: 00:02.0
969 07:54:59.878409
970 07:54:59.881602 scan_generic_bus for PCI: 00:02.0 done
971 07:54:59.884915 scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
972 07:54:59.888038 PCI: 00:14.0 scanning...
973 07:54:59.891259 scan_static_bus for PCI: 00:14.0
974 07:54:59.894567 USB0 port 0 enabled
975 07:54:59.897880 USB0 port 0 scanning...
976 07:54:59.901011 scan_static_bus for USB0 port 0
977 07:54:59.901457 USB2 port 0 enabled
978 07:54:59.904359 USB2 port 1 enabled
979 07:54:59.907441 USB2 port 2 disabled
980 07:54:59.907879 USB2 port 3 disabled
981 07:54:59.911272 USB2 port 5 disabled
982 07:54:59.914562 USB2 port 6 enabled
983 07:54:59.915013 USB2 port 9 enabled
984 07:54:59.917604 USB3 port 0 enabled
985 07:54:59.918048 USB3 port 1 enabled
986 07:54:59.921012 USB3 port 2 enabled
987 07:54:59.924298 USB3 port 3 enabled
988 07:54:59.924927 USB3 port 4 disabled
989 07:54:59.927667 USB2 port 0 scanning...
990 07:54:59.930830 scan_static_bus for USB2 port 0
991 07:54:59.934121 scan_static_bus for USB2 port 0 done
992 07:54:59.940706 scan_bus: scanning of bus USB2 port 0 took 9694 usecs
993 07:54:59.943458 USB2 port 1 scanning...
994 07:54:59.947485 scan_static_bus for USB2 port 1
995 07:54:59.950245 scan_static_bus for USB2 port 1 done
996 07:54:59.953512 scan_bus: scanning of bus USB2 port 1 took 9687 usecs
997 07:54:59.956833 USB2 port 6 scanning...
998 07:54:59.960139 scan_static_bus for USB2 port 6
999 07:54:59.963948 scan_static_bus for USB2 port 6 done
1000 07:54:59.970432 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
1001 07:54:59.973684 USB2 port 9 scanning...
1002 07:54:59.977014 scan_static_bus for USB2 port 9
1003 07:54:59.980118 scan_static_bus for USB2 port 9 done
1004 07:54:59.986266 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
1005 07:54:59.986717 USB3 port 0 scanning...
1006 07:54:59.989559 scan_static_bus for USB3 port 0
1007 07:54:59.996850 scan_static_bus for USB3 port 0 done
1008 07:54:59.999869 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
1009 07:55:00.003034 USB3 port 1 scanning...
1010 07:55:00.006182 scan_static_bus for USB3 port 1
1011 07:55:00.009588 scan_static_bus for USB3 port 1 done
1012 07:55:00.016057 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
1013 07:55:00.016510 USB3 port 2 scanning...
1014 07:55:00.019592 scan_static_bus for USB3 port 2
1015 07:55:00.026144 scan_static_bus for USB3 port 2 done
1016 07:55:00.029079 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
1017 07:55:00.032834 USB3 port 3 scanning...
1018 07:55:00.036138 scan_static_bus for USB3 port 3
1019 07:55:00.039379 scan_static_bus for USB3 port 3 done
1020 07:55:00.045797 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1021 07:55:00.049059 scan_static_bus for USB0 port 0 done
1022 07:55:00.055725 scan_bus: scanning of bus USB0 port 0 took 155276 usecs
1023 07:55:00.058475 scan_static_bus for PCI: 00:14.0 done
1024 07:55:00.065450 scan_bus: scanning of bus PCI: 00:14.0 took 172887 usecs
1025 07:55:00.065900 PCI: 00:15.0 scanning...
1026 07:55:00.068789 scan_generic_bus for PCI: 00:15.0
1027 07:55:00.075165 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1028 07:55:00.078556 scan_generic_bus for PCI: 00:15.0 done
1029 07:55:00.084921 scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs
1030 07:55:00.085378 PCI: 00:15.1 scanning...
1031 07:55:00.088063 scan_generic_bus for PCI: 00:15.1
1032 07:55:00.094805 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1033 07:55:00.098010 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1034 07:55:00.101183 scan_generic_bus for PCI: 00:15.1 done
1035 07:55:00.107978 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
1036 07:55:00.110964 PCI: 00:19.0 scanning...
1037 07:55:00.114192 scan_generic_bus for PCI: 00:19.0
1038 07:55:00.117536 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1039 07:55:00.120777 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1040 07:55:00.127023 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1041 07:55:00.130994 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1042 07:55:00.134285 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1043 07:55:00.136975 scan_generic_bus for PCI: 00:19.0 done
1044 07:55:00.143483 scan_bus: scanning of bus PCI: 00:19.0 took 30722 usecs
1045 07:55:00.146926 PCI: 00:1d.0 scanning...
1046 07:55:00.150337 do_pci_scan_bridge for PCI: 00:1d.0
1047 07:55:00.153374 PCI: pci_scan_bus for bus 01
1048 07:55:00.156598 PCI: 01:00.0 [1c5c/1327] enabled
1049 07:55:00.160093 Enabling Common Clock Configuration
1050 07:55:00.163279 L1 Sub-State supported from root port 29
1051 07:55:00.166418 L1 Sub-State Support = 0xf
1052 07:55:00.170621 CommonModeRestoreTime = 0x28
1053 07:55:00.173798 Power On Value = 0x16, Power On Scale = 0x0
1054 07:55:00.176810 ASPM: Enabled L1
1055 07:55:00.180013 scan_bus: scanning of bus PCI: 00:1d.0 took 32787 usecs
1056 07:55:00.183240
1057 07:55:00.183504 PCI: 00:1e.2 scanning...
1058 07:55:00.186402 scan_generic_bus for PCI: 00:1e.2
1059 07:55:00.193071 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1060 07:55:00.196640 scan_generic_bus for PCI: 00:1e.2 done
1061 07:55:00.200425 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1062 07:55:00.202979 PCI: 00:1e.3 scanning...
1063 07:55:00.207112 scan_generic_bus for PCI: 00:1e.3
1064 07:55:00.210082 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1065 07:55:00.213099
1066 07:55:00.216303 scan_generic_bus for PCI: 00:1e.3 done
1067 07:55:00.219431 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1068 07:55:00.222550 PCI: 00:1f.0 scanning...
1069 07:55:00.226013 scan_static_bus for PCI: 00:1f.0
1070 07:55:00.229590 PNP: 0c09.0 enabled
1071 07:55:00.232838 scan_static_bus for PCI: 00:1f.0 done
1072 07:55:00.239312 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1073 07:55:00.242337 PCI: 00:1f.3 scanning...
1074 07:55:00.245531 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1075 07:55:00.249045 PCI: 00:1f.4 scanning...
1076 07:55:00.252139 scan_generic_bus for PCI: 00:1f.4
1077 07:55:00.255463 scan_generic_bus for PCI: 00:1f.4 done
1078 07:55:00.262125 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1079 07:55:00.265236 PCI: 00:1f.5 scanning...
1080 07:55:00.268791 scan_generic_bus for PCI: 00:1f.5
1081 07:55:00.271788 scan_generic_bus for PCI: 00:1f.5 done
1082 07:55:00.278249 scan_bus: scanning of bus PCI: 00:1f.5 took 10177 usecs
1083 07:55:00.284861 scan_bus: scanning of bus DOMAIN: 0000 took 604894 usecs
1084 07:55:00.287868 scan_static_bus for Root Device done
1085 07:55:00.291578 scan_bus: scanning of bus Root Device took 624745 usecs
1086 07:55:00.294975
1087 07:55:00.295509 done
1088 07:55:00.298254 Chrome EC: UHEPI supported
1089 07:55:00.304663 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1090 07:55:00.307385 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1091 07:55:00.314461 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1092 07:55:00.321664 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1093 07:55:00.324809 SPI flash protection: WPSW=0 SRP0=1
1094 07:55:00.331878 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1095 07:55:00.335084 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1096 07:55:00.338248 found VGA at PCI: 00:02.0
1097 07:55:00.341400 Setting up VGA for PCI: 00:02.0
1098 07:55:00.347793 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1099 07:55:00.351035 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1100 07:55:00.354230 Allocating resources...
1101 07:55:00.357285 Reading resources...
1102 07:55:00.361334 Root Device read_resources bus 0 link: 0
1103 07:55:00.363909 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1104 07:55:00.371225 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1105 07:55:00.373807 DOMAIN: 0000 read_resources bus 0 link: 0
1106 07:55:00.382277 PCI: 00:14.0 read_resources bus 0 link: 0
1107 07:55:00.385366 USB0 port 0 read_resources bus 0 link: 0
1108 07:55:00.393248 USB0 port 0 read_resources bus 0 link: 0 done
1109 07:55:00.396764 PCI: 00:14.0 read_resources bus 0 link: 0 done
1110 07:55:00.404238 PCI: 00:15.0 read_resources bus 1 link: 0
1111 07:55:00.407662 PCI: 00:15.0 read_resources bus 1 link: 0 done
1112 07:55:00.413958 PCI: 00:15.1 read_resources bus 2 link: 0
1113 07:55:00.416977 PCI: 00:15.1 read_resources bus 2 link: 0 done
1114 07:55:00.424857 PCI: 00:19.0 read_resources bus 3 link: 0
1115 07:55:00.431316 PCI: 00:19.0 read_resources bus 3 link: 0 done
1116 07:55:00.434603 PCI: 00:1d.0 read_resources bus 1 link: 0
1117 07:55:00.440534 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1118 07:55:00.443854 PCI: 00:1e.2 read_resources bus 4 link: 0
1119 07:55:00.450244 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1120 07:55:00.453541 PCI: 00:1e.3 read_resources bus 5 link: 0
1121 07:55:00.460262 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1122 07:55:00.463742 PCI: 00:1f.0 read_resources bus 0 link: 0
1123 07:55:00.470126 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1124 07:55:00.476603 DOMAIN: 0000 read_resources bus 0 link: 0 done
1125 07:55:00.479859 Root Device read_resources bus 0 link: 0 done
1126 07:55:00.483366 Done reading resources.
1127 07:55:00.489643 Show resources in subtree (Root Device)...After reading.
1128 07:55:00.492893 Root Device child on link 0 CPU_CLUSTER: 0
1129 07:55:00.496651 CPU_CLUSTER: 0 child on link 0 APIC: 00
1130 07:55:00.500139 APIC: 00
1131 07:55:00.500492 APIC: 03
1132 07:55:00.500694 APIC: 05
1133 07:55:00.503261
1134 07:55:00.503512 APIC: 07
1135 07:55:00.503711 APIC: 01
1136 07:55:00.506829 APIC: 04
1137 07:55:00.507279 APIC: 06
1138 07:55:00.507580 APIC: 02
1139 07:55:00.513047 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1140 07:55:00.522593 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1141 07:55:00.576198 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1142 07:55:00.576876 PCI: 00:00.0
1143 07:55:00.577704 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1144 07:55:00.578122 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1145 07:55:00.578502 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1146 07:55:00.579244 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1147 07:55:00.625580 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1148 07:55:00.626659 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1149 07:55:00.627110 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1150 07:55:00.627502 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1151 07:55:00.627860 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1152 07:55:00.628580 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1153 07:55:00.636580 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1154 07:55:00.646041 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1155 07:55:00.656364 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1156 07:55:00.666433 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1157 07:55:00.672798 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1158 07:55:00.682536 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1159 07:55:00.685458 PCI: 00:02.0
1160 07:55:00.695798 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 07:55:00.705265 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1162 07:55:00.712105 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1163 07:55:00.715047 PCI: 00:04.0
1164 07:55:00.715543 PCI: 00:08.0
1165 07:55:00.725104 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 07:55:00.728142
1167 07:55:00.728628 PCI: 00:12.0
1168 07:55:00.738308 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:55:00.741561 PCI: 00:14.0 child on link 0 USB0 port 0
1170 07:55:00.751279 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1171 07:55:00.757538 USB0 port 0 child on link 0 USB2 port 0
1172 07:55:00.758050 USB2 port 0
1173 07:55:00.760936 USB2 port 1
1174 07:55:00.761427 USB2 port 2
1175 07:55:00.764213 USB2 port 3
1176 07:55:00.764703 USB2 port 5
1177 07:55:00.767570 USB2 port 6
1178 07:55:00.770629 USB2 port 9
1179 07:55:00.771118 USB3 port 0
1180 07:55:00.773993 USB3 port 1
1181 07:55:00.774486 USB3 port 2
1182 07:55:00.777268 USB3 port 3
1183 07:55:00.777760 USB3 port 4
1184 07:55:00.780537 PCI: 00:14.2
1185 07:55:00.790299 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1186 07:55:00.800147 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1187 07:55:00.800780 PCI: 00:14.3
1188 07:55:00.810115 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 07:55:00.816574 PCI: 00:15.0 child on link 0 I2C: 01:15
1190 07:55:00.826909 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 07:55:00.827504 I2C: 01:15
1192 07:55:00.829774 PCI: 00:15.1 child on link 0 I2C: 02:5d
1193 07:55:00.839661 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 07:55:00.842649
1195 07:55:00.843222 I2C: 02:5d
1196 07:55:00.843618 GENERIC: 0.0
1197 07:55:00.845962
1198 07:55:00.846467 PCI: 00:16.0
1199 07:55:00.855836 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 07:55:00.858754 PCI: 00:17.0
1201 07:55:00.866001 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1202 07:55:00.875129 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1203 07:55:00.884844 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1204 07:55:00.891293 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1205 07:55:00.901183 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1206 07:55:00.907991 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1207 07:55:00.914385 PCI: 00:19.0 child on link 0 I2C: 03:1a
1208 07:55:00.924020 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 07:55:00.924109 I2C: 03:1a
1210 07:55:00.927209 I2C: 03:38
1211 07:55:00.927296 I2C: 03:39
1212 07:55:00.930331 I2C: 03:3a
1213 07:55:00.930418 I2C: 03:3b
1214 07:55:00.936666 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1215 07:55:00.943194 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 07:55:00.953304 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 07:55:00.963066 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 07:55:00.966252 PCI: 01:00.0
1219 07:55:00.976154 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 07:55:00.976242 PCI: 00:1e.0
1221 07:55:00.985740 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1222 07:55:00.989116
1223 07:55:00.999367 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1224 07:55:01.002589 PCI: 00:1e.2 child on link 0 SPI: 00
1225 07:55:01.011960 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 07:55:01.012047 SPI: 00
1227 07:55:01.015306 PCI: 00:1e.3 child on link 0 SPI: 01
1228 07:55:01.024948 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 07:55:01.028082 SPI: 01
1230 07:55:01.031870 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 07:55:01.041413 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 07:55:01.051458 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1233 07:55:01.051549 PNP: 0c09.0
1234 07:55:01.061213 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 07:55:01.061301 PCI: 00:1f.3
1236 07:55:01.071168 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 07:55:01.080903 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1238 07:55:01.084203 PCI: 00:1f.4
1239 07:55:01.093974 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1240 07:55:01.103408 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1241 07:55:01.103497 PCI: 00:1f.5
1242 07:55:01.113933 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1243 07:55:01.120543 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 07:55:01.126767 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1245 07:55:01.133847 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1246 07:55:01.136898 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1247 07:55:01.140086 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1248 07:55:01.143338 PCI: 00:17.0 18 * [0x60 - 0x67] io
1249 07:55:01.146447 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1250 07:55:01.153032 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1251 07:55:01.159276 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1252 07:55:01.169632 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1253 07:55:01.176005 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1254 07:55:01.182456 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1255 07:55:01.189383 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1256 07:55:01.195995 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1257 07:55:01.199302 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1258 07:55:01.205570 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1259 07:55:01.209110 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1260 07:55:01.215423 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1261 07:55:01.218608 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1262 07:55:01.225569 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1263 07:55:01.228541 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1264 07:55:01.235034 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1265 07:55:01.238147 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1266 07:55:01.244623 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1267 07:55:01.247922 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1268 07:55:01.254411 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1269 07:55:01.257686 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1270 07:55:01.264213 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1271 07:55:01.267640 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1272 07:55:01.273974 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1273 07:55:01.277405 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1274 07:55:01.284319 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1275 07:55:01.287393 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1276 07:55:01.293746 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1277 07:55:01.297052 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1278 07:55:01.304003 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1279 07:55:01.306856 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1280 07:55:01.317056 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1281 07:55:01.319719 avoid_fixed_resources: DOMAIN: 0000
1282 07:55:01.326658 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1283 07:55:01.329649 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1284 07:55:01.339785 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1285 07:55:01.346086 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1286 07:55:01.355679 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1287 07:55:01.362138 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1288 07:55:01.369107 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1289 07:55:01.378613 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 07:55:01.385435 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1291 07:55:01.391877 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1292 07:55:01.398737 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1293 07:55:01.408404 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1294 07:55:01.409046 Setting resources...
1295 07:55:01.415170 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1296 07:55:01.418396 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1297 07:55:01.424910 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1298 07:55:01.428211 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1299 07:55:01.431445 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1300 07:55:01.437599 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1301 07:55:01.443961 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1302 07:55:01.450756 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1303 07:55:01.457261 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1304 07:55:01.463545 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1305 07:55:01.466773 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1306 07:55:01.473342 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1307 07:55:01.477154 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1308 07:55:01.483751 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1309 07:55:01.486850 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1310 07:55:01.493370 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1311 07:55:01.496560 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1312 07:55:01.503067 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1313 07:55:01.506397 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1314 07:55:01.513053 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1315 07:55:01.516436 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1316 07:55:01.519243 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1317 07:55:01.522677
1318 07:55:01.525824 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1319 07:55:01.528997 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1320 07:55:01.536328 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1321 07:55:01.539562 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1322 07:55:01.545779 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1323 07:55:01.548853 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1324 07:55:01.555423 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1325 07:55:01.558683 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1326 07:55:01.565852 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1327 07:55:01.568949 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1328 07:55:01.578712 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1329 07:55:01.585295 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1330 07:55:01.591844 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1331 07:55:01.598230 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1332 07:55:01.604534 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1333 07:55:01.611064 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1334 07:55:01.614871 Root Device assign_resources, bus 0 link: 0
1335 07:55:01.621596 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 07:55:01.628214 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1337 07:55:01.637780 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1338 07:55:01.644068 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1339 07:55:01.654349 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1340 07:55:01.660781 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1341 07:55:01.670932 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1342 07:55:01.673608 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 07:55:01.680622 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 07:55:01.687074 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1345 07:55:01.697042 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1346 07:55:01.703577 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1347 07:55:01.713362 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1348 07:55:01.716587 PCI: 00:15.0 assign_resources, bus 1 link: 0
1349 07:55:01.723219 PCI: 00:15.0 assign_resources, bus 1 link: 0
1350 07:55:01.730357 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1351 07:55:01.732618 PCI: 00:15.1 assign_resources, bus 2 link: 0
1352 07:55:01.739551 PCI: 00:15.1 assign_resources, bus 2 link: 0
1353 07:55:01.745915 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1354 07:55:01.756205 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1355 07:55:01.762551 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1356 07:55:01.769717 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1357 07:55:01.772895
1358 07:55:01.779209 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1359 07:55:01.785886 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1360 07:55:01.796192 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1361 07:55:01.802195 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1362 07:55:01.805480 PCI: 00:19.0 assign_resources, bus 3 link: 0
1363 07:55:01.811988 PCI: 00:19.0 assign_resources, bus 3 link: 0
1364 07:55:01.819199 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1365 07:55:01.822230
1366 07:55:01.828973 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1367 07:55:01.838228 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1368 07:55:01.842068 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 07:55:01.851595 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1370 07:55:01.854828 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 07:55:01.864477 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1372 07:55:01.871770 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1373 07:55:01.874907 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1374 07:55:01.877954
1375 07:55:01.881099 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1376 07:55:01.887690 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1377 07:55:01.890927
1378 07:55:01.894216 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1379 07:55:01.897312 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1380 07:55:01.904002 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1381 07:55:01.907094 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 07:55:01.913880 LPC: Trying to open IO window from 800 size 1ff
1383 07:55:01.920381 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1384 07:55:01.929772 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1385 07:55:01.936721 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1386 07:55:01.946450 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1387 07:55:01.949627 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 07:55:01.956197 Root Device assign_resources, bus 0 link: 0
1389 07:55:01.956635 Done setting resources.
1390 07:55:01.962552 Show resources in subtree (Root Device)...After assigning values.
1391 07:55:01.969340 Root Device child on link 0 CPU_CLUSTER: 0
1392 07:55:01.973069 CPU_CLUSTER: 0 child on link 0 APIC: 00
1393 07:55:01.973616 APIC: 00
1394 07:55:01.976108 APIC: 03
1395 07:55:01.976805 APIC: 05
1396 07:55:01.979246 APIC: 07
1397 07:55:01.979745 APIC: 01
1398 07:55:01.980184 APIC: 04
1399 07:55:01.982746 APIC: 06
1400 07:55:01.983469 APIC: 02
1401 07:55:01.988886 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1402 07:55:01.995349 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1403 07:55:02.008467 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1404 07:55:02.008993 PCI: 00:00.0
1405 07:55:02.018811 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1406 07:55:02.027973 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1407 07:55:02.038074 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1408 07:55:02.047701 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1409 07:55:02.057423 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1410 07:55:02.067758 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1411 07:55:02.074033 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1412 07:55:02.077026
1413 07:55:02.083774 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1414 07:55:02.093262 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1415 07:55:02.103199 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1416 07:55:02.112962 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1417 07:55:02.122855 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1418 07:55:02.132828 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1419 07:55:02.143084 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1420 07:55:02.149215 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1421 07:55:02.158974 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1422 07:55:02.162215 PCI: 00:02.0
1423 07:55:02.171874 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1424 07:55:02.181958 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1425 07:55:02.191889 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1426 07:55:02.195081 PCI: 00:04.0
1427 07:55:02.195678 PCI: 00:08.0
1428 07:55:02.204715 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1429 07:55:02.207864 PCI: 00:12.0
1430 07:55:02.218003 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1431 07:55:02.221161 PCI: 00:14.0 child on link 0 USB0 port 0
1432 07:55:02.230768 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1433 07:55:02.237196 USB0 port 0 child on link 0 USB2 port 0
1434 07:55:02.237695 USB2 port 0
1435 07:55:02.240557 USB2 port 1
1436 07:55:02.241089 USB2 port 2
1437 07:55:02.244020 USB2 port 3
1438 07:55:02.244622 USB2 port 5
1439 07:55:02.247015 USB2 port 6
1440 07:55:02.250138 USB2 port 9
1441 07:55:02.250630 USB3 port 0
1442 07:55:02.253606 USB3 port 1
1443 07:55:02.254098 USB3 port 2
1444 07:55:02.257208 USB3 port 3
1445 07:55:02.257699 USB3 port 4
1446 07:55:02.260620 PCI: 00:14.2
1447 07:55:02.269989 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1448 07:55:02.279523 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1449 07:55:02.282907 PCI: 00:14.3
1450 07:55:02.293588 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1451 07:55:02.297009 PCI: 00:15.0 child on link 0 I2C: 01:15
1452 07:55:02.306493 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1453 07:55:02.309437 I2C: 01:15
1454 07:55:02.312639 PCI: 00:15.1 child on link 0 I2C: 02:5d
1455 07:55:02.322484 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1456 07:55:02.326054 I2C: 02:5d
1457 07:55:02.326608 GENERIC: 0.0
1458 07:55:02.328834 PCI: 00:16.0
1459 07:55:02.338897 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1460 07:55:02.339464 PCI: 00:17.0
1461 07:55:02.349092 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1462 07:55:02.358437 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1463 07:55:02.368048 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1464 07:55:02.378167 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1465 07:55:02.387979 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1466 07:55:02.398098 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1467 07:55:02.401087 PCI: 00:19.0 child on link 0 I2C: 03:1a
1468 07:55:02.411463 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1469 07:55:02.414146 I2C: 03:1a
1470 07:55:02.414737 I2C: 03:38
1471 07:55:02.417787 I2C: 03:39
1472 07:55:02.418269 I2C: 03:3a
1473 07:55:02.420458 I2C: 03:3b
1474 07:55:02.424128 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1475 07:55:02.433935 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1476 07:55:02.443626 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1477 07:55:02.453473 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1478 07:55:02.457190 PCI: 01:00.0
1479 07:55:02.466951 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1480 07:55:02.467482 PCI: 00:1e.0
1481 07:55:02.480108 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1482 07:55:02.489669 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1483 07:55:02.493173 PCI: 00:1e.2 child on link 0 SPI: 00
1484 07:55:02.502897 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1485 07:55:02.506069 SPI: 00
1486 07:55:02.509191 PCI: 00:1e.3 child on link 0 SPI: 01
1487 07:55:02.519078 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1488 07:55:02.519670 SPI: 01
1489 07:55:02.525902 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 07:55:02.532166 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 07:55:02.541603 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1492 07:55:02.544716 PNP: 0c09.0
1493 07:55:02.551449 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 07:55:02.555231 PCI: 00:1f.3
1495 07:55:02.565002 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1496 07:55:02.574815 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1497 07:55:02.577697 PCI: 00:1f.4
1498 07:55:02.584046 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1499 07:55:02.597274 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1500 07:55:02.597745 PCI: 00:1f.5
1501 07:55:02.607097 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1502 07:55:02.610408 Done allocating resources.
1503 07:55:02.616697 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1504 07:55:02.617192 Enabling resources...
1505 07:55:02.620086
1506 07:55:02.623375 PCI: 00:00.0 subsystem <- 8086/9b61
1507 07:55:02.626505 PCI: 00:00.0 cmd <- 06
1508 07:55:02.629739 PCI: 00:02.0 subsystem <- 8086/9b41
1509 07:55:02.633119 PCI: 00:02.0 cmd <- 03
1510 07:55:02.633563 PCI: 00:08.0 cmd <- 06
1511 07:55:02.639289 PCI: 00:12.0 subsystem <- 8086/02f9
1512 07:55:02.639376 PCI: 00:12.0 cmd <- 02
1513 07:55:02.642952 PCI: 00:14.0 subsystem <- 8086/02ed
1514 07:55:02.645988 PCI: 00:14.0 cmd <- 02
1515 07:55:02.649057 PCI: 00:14.2 cmd <- 02
1516 07:55:02.652467 PCI: 00:14.3 subsystem <- 8086/02f0
1517 07:55:02.655789 PCI: 00:14.3 cmd <- 02
1518 07:55:02.658928 PCI: 00:15.0 subsystem <- 8086/02e8
1519 07:55:02.662589 PCI: 00:15.0 cmd <- 02
1520 07:55:02.665438 PCI: 00:15.1 subsystem <- 8086/02e9
1521 07:55:02.668693 PCI: 00:15.1 cmd <- 02
1522 07:55:02.671830 PCI: 00:16.0 subsystem <- 8086/02e0
1523 07:55:02.675044 PCI: 00:16.0 cmd <- 02
1524 07:55:02.678428 PCI: 00:17.0 subsystem <- 8086/02d3
1525 07:55:02.682229 PCI: 00:17.0 cmd <- 03
1526 07:55:02.684870 PCI: 00:19.0 subsystem <- 8086/02c5
1527 07:55:02.684957 PCI: 00:19.0 cmd <- 02
1528 07:55:02.688543
1529 07:55:02.691749 PCI: 00:1d.0 bridge ctrl <- 0013
1530 07:55:02.695074 PCI: 00:1d.0 subsystem <- 8086/02b0
1531 07:55:02.695161 PCI: 00:1d.0 cmd <- 06
1532 07:55:02.701556 PCI: 00:1e.0 subsystem <- 8086/02a8
1533 07:55:02.701642 PCI: 00:1e.0 cmd <- 06
1534 07:55:02.704717 PCI: 00:1e.2 subsystem <- 8086/02aa
1535 07:55:02.708068
1536 07:55:02.708154 PCI: 00:1e.2 cmd <- 06
1537 07:55:02.711385 PCI: 00:1e.3 subsystem <- 8086/02ab
1538 07:55:02.714738 PCI: 00:1e.3 cmd <- 02
1539 07:55:02.718093 PCI: 00:1f.0 subsystem <- 8086/0284
1540 07:55:02.721363 PCI: 00:1f.0 cmd <- 407
1541 07:55:02.724510 PCI: 00:1f.3 subsystem <- 8086/02c8
1542 07:55:02.727654 PCI: 00:1f.3 cmd <- 02
1543 07:55:02.730989 PCI: 00:1f.4 subsystem <- 8086/02a3
1544 07:55:02.734209 PCI: 00:1f.4 cmd <- 03
1545 07:55:02.737556 PCI: 00:1f.5 subsystem <- 8086/02a4
1546 07:55:02.740491 PCI: 00:1f.5 cmd <- 406
1547 07:55:02.749137 PCI: 01:00.0 cmd <- 02
1548 07:55:02.754351 done.
1549 07:55:02.763835 ME: Version: 14.0.39.1367
1550 07:55:02.770470 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1551 07:55:02.773577 Initializing devices...
1552 07:55:02.773663 Root Device init ...
1553 07:55:02.779929 Chrome EC: Set SMI mask to 0x0000000000000000
1554 07:55:02.783031 Chrome EC: clear events_b mask to 0x0000000000000000
1555 07:55:02.790138 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 07:55:02.796443 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1557 07:55:02.802929 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1558 07:55:02.806344 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 07:55:02.812782 Root Device init finished in 35183 usecs
1560 07:55:02.812874 CPU_CLUSTER: 0 init ...
1561 07:55:02.819300 CPU_CLUSTER: 0 init finished in 2448 usecs
1562 07:55:02.824499 PCI: 00:00.0 init ...
1563 07:55:02.827686 CPU TDP: 15 Watts
1564 07:55:02.831080 CPU PL2 = 64 Watts
1565 07:55:02.834245 PCI: 00:00.0 init finished in 7082 usecs
1566 07:55:02.837608 PCI: 00:02.0 init ...
1567 07:55:02.840735 PCI: 00:02.0 init finished in 2252 usecs
1568 07:55:02.843912 PCI: 00:08.0 init ...
1569 07:55:02.847135 PCI: 00:08.0 init finished in 2254 usecs
1570 07:55:02.850050 PCI: 00:12.0 init ...
1571 07:55:02.853776 PCI: 00:12.0 init finished in 2252 usecs
1572 07:55:02.857014 PCI: 00:14.0 init ...
1573 07:55:02.860561 PCI: 00:14.0 init finished in 2253 usecs
1574 07:55:02.863477 PCI: 00:14.2 init ...
1575 07:55:02.866729 PCI: 00:14.2 init finished in 2252 usecs
1576 07:55:02.870038 PCI: 00:14.3 init ...
1577 07:55:02.873129 PCI: 00:14.3 init finished in 2261 usecs
1578 07:55:02.876419 PCI: 00:15.0 init ...
1579 07:55:02.879688 DW I2C bus 0 at 0xd121f000 (400 KHz)
1580 07:55:02.886634 PCI: 00:15.0 init finished in 5979 usecs
1581 07:55:02.886721 PCI: 00:15.1 init ...
1582 07:55:02.889750 DW I2C bus 1 at 0xd1220000 (400 KHz)
1583 07:55:02.896211 PCI: 00:15.1 init finished in 5978 usecs
1584 07:55:02.899553 PCI: 00:16.0 init ...
1585 07:55:02.902796 PCI: 00:16.0 init finished in 2254 usecs
1586 07:55:02.905991 PCI: 00:19.0 init ...
1587 07:55:02.909168 DW I2C bus 4 at 0xd1222000 (400 KHz)
1588 07:55:02.912372 PCI: 00:19.0 init finished in 5979 usecs
1589 07:55:02.915591 PCI: 00:1d.0 init ...
1590 07:55:02.918946 Initializing PCH PCIe bridge.
1591 07:55:02.922264 PCI: 00:1d.0 init finished in 5287 usecs
1592 07:55:02.926218 PCI: 00:1f.0 init ...
1593 07:55:02.929409 IOAPIC: Initializing IOAPIC at 0xfec00000
1594 07:55:02.936113 IOAPIC: Bootstrap Processor Local APIC = 0x00
1595 07:55:02.936199 IOAPIC: ID = 0x02
1596 07:55:02.939282 IOAPIC: Dumping registers
1597 07:55:02.942434 reg 0x0000: 0x02000000
1598 07:55:02.945824 reg 0x0001: 0x00770020
1599 07:55:02.948876 reg 0x0002: 0x00000000
1600 07:55:02.952031 PCI: 00:1f.0 init finished in 23546 usecs
1601 07:55:02.955772 PCI: 00:1f.4 init ...
1602 07:55:02.958377 PCI: 00:1f.4 init finished in 2261 usecs
1603 07:55:02.970126 PCI: 01:00.0 init ...
1604 07:55:02.973286 PCI: 01:00.0 init finished in 2245 usecs
1605 07:55:02.977826 PNP: 0c09.0 init ...
1606 07:55:02.981483 Google Chrome EC uptime: 11.085 seconds
1607 07:55:02.984672
1608 07:55:02.988075 Google Chrome AP resets since EC boot: 0
1609 07:55:02.991118 Google Chrome most recent AP reset causes:
1610 07:55:02.997406 Google Chrome EC reset flags at last EC boot: reset-pin
1611 07:55:03.000780 PNP: 0c09.0 init finished in 20637 usecs
1612 07:55:03.004063 Devices initialized
1613 07:55:03.007161 Show all devs... After init.
1614 07:55:03.007246 Root Device: enabled 1
1615 07:55:03.010500 CPU_CLUSTER: 0: enabled 1
1616 07:55:03.013844 DOMAIN: 0000: enabled 1
1617 07:55:03.013930 APIC: 00: enabled 1
1618 07:55:03.017029 PCI: 00:00.0: enabled 1
1619 07:55:03.020354 PCI: 00:02.0: enabled 1
1620 07:55:03.023735 PCI: 00:04.0: enabled 0
1621 07:55:03.023821 PCI: 00:05.0: enabled 0
1622 07:55:03.027165 PCI: 00:12.0: enabled 1
1623 07:55:03.030233 PCI: 00:12.5: enabled 0
1624 07:55:03.034082 PCI: 00:12.6: enabled 0
1625 07:55:03.034168 PCI: 00:14.0: enabled 1
1626 07:55:03.036692 PCI: 00:14.1: enabled 0
1627 07:55:03.040043 PCI: 00:14.3: enabled 1
1628 07:55:03.043206 PCI: 00:14.5: enabled 0
1629 07:55:03.043291 PCI: 00:15.0: enabled 1
1630 07:55:03.046443 PCI: 00:15.1: enabled 1
1631 07:55:03.049611 PCI: 00:15.2: enabled 0
1632 07:55:03.052866 PCI: 00:15.3: enabled 0
1633 07:55:03.052952 PCI: 00:16.0: enabled 1
1634 07:55:03.056422 PCI: 00:16.1: enabled 0
1635 07:55:03.059684 PCI: 00:16.2: enabled 0
1636 07:55:03.062976 PCI: 00:16.3: enabled 0
1637 07:55:03.063061 PCI: 00:16.4: enabled 0
1638 07:55:03.066184 PCI: 00:16.5: enabled 0
1639 07:55:03.069263 PCI: 00:17.0: enabled 1
1640 07:55:03.073113 PCI: 00:19.0: enabled 1
1641 07:55:03.073200 PCI: 00:19.1: enabled 0
1642 07:55:03.076258 PCI: 00:19.2: enabled 0
1643 07:55:03.079412 PCI: 00:1a.0: enabled 0
1644 07:55:03.082738 PCI: 00:1c.0: enabled 0
1645 07:55:03.082824 PCI: 00:1c.1: enabled 0
1646 07:55:03.085900 PCI: 00:1c.2: enabled 0
1647 07:55:03.089093 PCI: 00:1c.3: enabled 0
1648 07:55:03.092380 PCI: 00:1c.4: enabled 0
1649 07:55:03.092466 PCI: 00:1c.5: enabled 0
1650 07:55:03.095445 PCI: 00:1c.6: enabled 0
1651 07:55:03.099315 PCI: 00:1c.7: enabled 0
1652 07:55:03.099402 PCI: 00:1d.0: enabled 1
1653 07:55:03.102486
1654 07:55:03.102573 PCI: 00:1d.1: enabled 0
1655 07:55:03.105832 PCI: 00:1d.2: enabled 0
1656 07:55:03.109146 PCI: 00:1d.3: enabled 0
1657 07:55:03.109233 PCI: 00:1d.4: enabled 0
1658 07:55:03.112481 PCI: 00:1d.5: enabled 0
1659 07:55:03.115635 PCI: 00:1e.0: enabled 1
1660 07:55:03.118317 PCI: 00:1e.1: enabled 0
1661 07:55:03.118403 PCI: 00:1e.2: enabled 1
1662 07:55:03.121840 PCI: 00:1e.3: enabled 1
1663 07:55:03.124848 PCI: 00:1f.0: enabled 1
1664 07:55:03.128100 PCI: 00:1f.1: enabled 0
1665 07:55:03.128186 PCI: 00:1f.2: enabled 0
1666 07:55:03.131438 PCI: 00:1f.3: enabled 1
1667 07:55:03.135221 PCI: 00:1f.4: enabled 1
1668 07:55:03.137848 PCI: 00:1f.5: enabled 1
1669 07:55:03.137934 PCI: 00:1f.6: enabled 0
1670 07:55:03.141748 USB0 port 0: enabled 1
1671 07:55:03.144936 I2C: 01:15: enabled 1
1672 07:55:03.145022 I2C: 02:5d: enabled 1
1673 07:55:03.148291
1674 07:55:03.148377 GENERIC: 0.0: enabled 1
1675 07:55:03.151438 I2C: 03:1a: enabled 1
1676 07:55:03.154547 I2C: 03:38: enabled 1
1677 07:55:03.154634 I2C: 03:39: enabled 1
1678 07:55:03.158014 I2C: 03:3a: enabled 1
1679 07:55:03.161313 I2C: 03:3b: enabled 1
1680 07:55:03.161400 PCI: 00:00.0: enabled 1
1681 07:55:03.164411 SPI: 00: enabled 1
1682 07:55:03.167712 SPI: 01: enabled 1
1683 07:55:03.167798 PNP: 0c09.0: enabled 1
1684 07:55:03.170973 USB2 port 0: enabled 1
1685 07:55:03.174210 USB2 port 1: enabled 1
1686 07:55:03.174296 USB2 port 2: enabled 0
1687 07:55:03.177342 USB2 port 3: enabled 0
1688 07:55:03.180458 USB2 port 5: enabled 0
1689 07:55:03.183626 USB2 port 6: enabled 1
1690 07:55:03.183705 USB2 port 9: enabled 1
1691 07:55:03.187412 USB3 port 0: enabled 1
1692 07:55:03.190639 USB3 port 1: enabled 1
1693 07:55:03.190722 USB3 port 2: enabled 1
1694 07:55:03.193830
1695 07:55:03.193907 USB3 port 3: enabled 1
1696 07:55:03.197018 USB3 port 4: enabled 0
1697 07:55:03.200191 APIC: 03: enabled 1
1698 07:55:03.200268 APIC: 05: enabled 1
1699 07:55:03.203511 APIC: 07: enabled 1
1700 07:55:03.203593 APIC: 01: enabled 1
1701 07:55:03.206735 APIC: 04: enabled 1
1702 07:55:03.209965 APIC: 06: enabled 1
1703 07:55:03.210041 APIC: 02: enabled 1
1704 07:55:03.213375 PCI: 00:08.0: enabled 1
1705 07:55:03.216564 PCI: 00:14.2: enabled 1
1706 07:55:03.216641 PCI: 01:00.0: enabled 1
1707 07:55:03.219805
1708 07:55:03.223607 Disabling ACPI via APMC:
1709 07:55:03.223684 done.
1710 07:55:03.229598 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1711 07:55:03.232843 ELOG: NV offset 0xaf0000 size 0x4000
1712 07:55:03.239784 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1713 07:55:03.246364 ELOG: Event(17) added with size 13 at 2022-11-25 07:55:03 UTC
1714 07:55:03.252864 POST: Unexpected post code in previous boot: 0x73
1715 07:55:03.259652 ELOG: Event(A3) added with size 11 at 2022-11-25 07:55:03 UTC
1716 07:55:03.265897 ELOG: Event(A6) added with size 13 at 2022-11-25 07:55:03 UTC
1717 07:55:03.272469 ELOG: Event(92) added with size 9 at 2022-11-25 07:55:03 UTC
1718 07:55:03.278909 ELOG: Event(93) added with size 9 at 2022-11-25 07:55:03 UTC
1719 07:55:03.282261 ELOG: Event(9A) added with size 9 at 2022-11-25 07:55:03 UTC
1720 07:55:03.285290
1721 07:55:03.288422 ELOG: Event(9E) added with size 10 at 2022-11-25 07:55:03 UTC
1722 07:55:03.295546 ELOG: Event(9F) added with size 14 at 2022-11-25 07:55:03 UTC
1723 07:55:03.301982 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1724 07:55:03.308377 ELOG: Event(A1) added with size 10 at 2022-11-25 07:55:03 UTC
1725 07:55:03.314885 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1726 07:55:03.321834 ELOG: Event(A0) added with size 9 at 2022-11-25 07:55:03 UTC
1727 07:55:03.328492 elog_add_boot_reason: Logged dev mode boot
1728 07:55:03.328579 Finalize devices...
1729 07:55:03.331560 PCI: 00:17.0 final
1730 07:55:03.331647 Devices finalized
1731 07:55:03.338103 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1732 07:55:03.344611 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1733 07:55:03.347990 ME: HFSTS1 : 0x90000245
1734 07:55:03.351289 ME: HFSTS2 : 0x3B850126
1735 07:55:03.354378 ME: HFSTS3 : 0x00000020
1736 07:55:03.360695 ME: HFSTS4 : 0x00004800
1737 07:55:03.364517 ME: HFSTS5 : 0x00000000
1738 07:55:03.367689 ME: HFSTS6 : 0x40400006
1739 07:55:03.371045 ME: Manufacturing Mode : NO
1740 07:55:03.374286 ME: FW Partition Table : OK
1741 07:55:03.377428 ME: Bringup Loader Failure : NO
1742 07:55:03.380771 ME: Firmware Init Complete : YES
1743 07:55:03.383961 ME: Boot Options Present : NO
1744 07:55:03.387039 ME: Update In Progress : NO
1745 07:55:03.390243 ME: D0i3 Support : YES
1746 07:55:03.393484 ME: Low Power State Enabled : NO
1747 07:55:03.396619 ME: CPU Replaced : NO
1748 07:55:03.400045 ME: CPU Replacement Valid : YES
1749 07:55:03.403205 ME: Current Working State : 5
1750 07:55:03.406463 ME: Current Operation State : 1
1751 07:55:03.409785 ME: Current Operation Mode : 0
1752 07:55:03.413060 ME: Error Code : 0
1753 07:55:03.416275 ME: CPU Debug Disabled : YES
1754 07:55:03.419503 ME: TXT Support : NO
1755 07:55:03.426081 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1756 07:55:03.433138 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1757 07:55:03.433225 CBFS @ c08000 size 3f8000
1758 07:55:03.439207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1759 07:55:03.442762 CBFS: Locating 'fallback/dsdt.aml'
1760 07:55:03.448696 CBFS: Found @ offset 10bb80 size 3fa5
1761 07:55:03.452549 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1762 07:55:03.455767 CBFS @ c08000 size 3f8000
1763 07:55:03.462074 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1764 07:55:03.465736 CBFS: Locating 'fallback/slic'
1765 07:55:03.468986 CBFS: 'fallback/slic' not found.
1766 07:55:03.472225 ACPI: Writing ACPI tables at 99b3e000.
1767 07:55:03.475517
1768 07:55:03.475606 ACPI: * FACS
1769 07:55:03.475700 ACPI: * DSDT
1770 07:55:03.478556
1771 07:55:03.481908 Ramoops buffer: 0x100000@0x99a3d000.
1772 07:55:03.485029 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1773 07:55:03.488229 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1774 07:55:03.492700 Google Chrome EC: version:
1775 07:55:03.495916 ro: helios_v2.0.2659-56403530b
1776 07:55:03.498873 rw: helios_v2.0.2849-c41de27e7d
1777 07:55:03.502157 running image: 1
1778 07:55:03.505372 ACPI: * FADT
1779 07:55:03.505459 SCI is IRQ9
1780 07:55:03.511787 ACPI: added table 1/32, length now 40
1781 07:55:03.511874 ACPI: * SSDT
1782 07:55:03.514860 Found 1 CPU(s) with 8 core(s) each.
1783 07:55:03.518115 Error: Could not locate 'wifi_sar' in VPD.
1784 07:55:03.521314
1785 07:55:03.524643 Checking CBFS for default SAR values
1786 07:55:03.527900 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 07:55:03.531907 CBFS @ c08000 size 3f8000
1788 07:55:03.538325 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 07:55:03.541438 CBFS: Locating 'wifi_sar_defaults.hex'
1790 07:55:03.544793 CBFS: Found @ offset 5fac0 size 77
1791 07:55:03.548027 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1792 07:55:03.554436 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1793 07:55:03.557660 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1794 07:55:03.564036 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1795 07:55:03.567449 failed to find key in VPD: dsm_calib_r0_0
1796 07:55:03.577497 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1797 07:55:03.580617 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1798 07:55:03.587090 failed to find key in VPD: dsm_calib_r0_1
1799 07:55:03.593697 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1800 07:55:03.600621 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1801 07:55:03.603727 failed to find key in VPD: dsm_calib_r0_2
1802 07:55:03.613572 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1803 07:55:03.620036 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1804 07:55:03.623368 failed to find key in VPD: dsm_calib_r0_3
1805 07:55:03.633100 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1806 07:55:03.636331 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1807 07:55:03.642922 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1808 07:55:03.646661 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1809 07:55:03.649924 EC returned error result code 1
1810 07:55:03.653139 EC returned error result code 1
1811 07:55:03.656350 EC returned error result code 1
1812 07:55:03.659676 PS2K: Bad resp from EC. Vivaldi disabled!
1813 07:55:03.662772
1814 07:55:03.666492 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1815 07:55:03.672789 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1816 07:55:03.679333 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1817 07:55:03.683016 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1818 07:55:03.688920 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1819 07:55:03.695961 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1820 07:55:03.699133 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1821 07:55:03.702327
1822 07:55:03.705722 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1823 07:55:03.712230 ACPI: added table 2/32, length now 44
1824 07:55:03.712318 ACPI: * MCFG
1825 07:55:03.715357 ACPI: added table 3/32, length now 48
1826 07:55:03.718688 ACPI: * TPM2
1827 07:55:03.721804 TPM2 log created at 99a2d000
1828 07:55:03.725200 ACPI: added table 4/32, length now 52
1829 07:55:03.725286 ACPI: * MADT
1830 07:55:03.728360 SCI is IRQ9
1831 07:55:03.731663 ACPI: added table 5/32, length now 56
1832 07:55:03.731750 current = 99b43ac0
1833 07:55:03.734955 ACPI: * DMAR
1834 07:55:03.738258 ACPI: added table 6/32, length now 60
1835 07:55:03.741484 ACPI: * IGD OpRegion
1836 07:55:03.744762 GMA: Found VBT in CBFS
1837 07:55:03.744848 GMA: Found valid VBT in CBFS
1838 07:55:03.751191 ACPI: added table 7/32, length now 64
1839 07:55:03.751284 ACPI: * HPET
1840 07:55:03.754487 ACPI: added table 8/32, length now 68
1841 07:55:03.757907 ACPI: done.
1842 07:55:03.757994 ACPI tables: 31744 bytes.
1843 07:55:03.760907 smbios_write_tables: 99a2c000
1844 07:55:03.764620 EC returned error result code 3
1845 07:55:03.767783
1846 07:55:03.770707 Couldn't obtain OEM name from CBI
1847 07:55:03.770793 Create SMBIOS type 17
1848 07:55:03.774102 PCI: 00:00.0 (Intel Cannonlake)
1849 07:55:03.777300 PCI: 00:14.3 (Intel WiFi)
1850 07:55:03.781218 SMBIOS tables: 939 bytes.
1851 07:55:03.783802 Writing table forward entry at 0x00000500
1852 07:55:03.790686 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1853 07:55:03.793941 Writing coreboot table at 0x99b62000
1854 07:55:03.800268 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1855 07:55:03.803544 1. 0000000000001000-000000000009ffff: RAM
1856 07:55:03.809968 2. 00000000000a0000-00000000000fffff: RESERVED
1857 07:55:03.813315 3. 0000000000100000-0000000099a2bfff: RAM
1858 07:55:03.819724 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1859 07:55:03.823003 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1860 07:55:03.829705 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1861 07:55:03.836675 7. 000000009a000000-000000009f7fffff: RESERVED
1862 07:55:03.840107 8. 00000000e0000000-00000000efffffff: RESERVED
1863 07:55:03.846002 9. 00000000fc000000-00000000fc000fff: RESERVED
1864 07:55:03.849279 10. 00000000fe000000-00000000fe00ffff: RESERVED
1865 07:55:03.852537 11. 00000000fed10000-00000000fed17fff: RESERVED
1866 07:55:03.859730 12. 00000000fed80000-00000000fed83fff: RESERVED
1867 07:55:03.862774 13. 00000000fed90000-00000000fed91fff: RESERVED
1868 07:55:03.869321 14. 00000000feda0000-00000000feda1fff: RESERVED
1869 07:55:03.872246 15. 0000000100000000-000000045e7fffff: RAM
1870 07:55:03.875735 Graphics framebuffer located at 0xc0000000
1871 07:55:03.879324 Passing 5 GPIOs to payload:
1872 07:55:03.885770 NAME | PORT | POLARITY | VALUE
1873 07:55:03.889090 write protect | undefined | high | low
1874 07:55:03.892188
1875 07:55:03.895335 lid | undefined | high | high
1876 07:55:03.902134 power | undefined | high | low
1877 07:55:03.905253 oprom | undefined | high | low
1878 07:55:03.911797 EC in RW | 0x000000cb | high | low
1879 07:55:03.911886 Board ID: 4
1880 07:55:03.918352 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1881 07:55:03.921525 CBFS @ c08000 size 3f8000
1882 07:55:03.924845 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1883 07:55:03.931502 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1884 07:55:03.934689 coreboot table: 1492 bytes.
1885 07:55:03.938084 IMD ROOT 0. 99fff000 00001000
1886 07:55:03.941265 IMD SMALL 1. 99ffe000 00001000
1887 07:55:03.944619 FSP MEMORY 2. 99c4e000 003b0000
1888 07:55:03.947831 CONSOLE 3. 99c2e000 00020000
1889 07:55:03.951069 FMAP 4. 99c2d000 0000054e
1890 07:55:03.954312 TIME STAMP 5. 99c2c000 00000910
1891 07:55:03.957468 VBOOT WORK 6. 99c18000 00014000
1892 07:55:03.960957 MRC DATA 7. 99c16000 00001958
1893 07:55:03.964052 ROMSTG STCK 8. 99c15000 00001000
1894 07:55:03.967314 AFTER CAR 9. 99c0b000 0000a000
1895 07:55:03.970528 RAMSTAGE 10. 99baf000 0005c000
1896 07:55:03.974069 REFCODE 11. 99b7a000 00035000
1897 07:55:03.977326 SMM BACKUP 12. 99b6a000 00010000
1898 07:55:03.980271 COREBOOT 13. 99b62000 00008000
1899 07:55:03.983499 ACPI 14. 99b3e000 00024000
1900 07:55:03.987199 ACPI GNVS 15. 99b3d000 00001000
1901 07:55:03.990406 RAMOOPS 16. 99a3d000 00100000
1902 07:55:03.993599 TPM2 TCGLOG17. 99a2d000 00010000
1903 07:55:03.996916 SMBIOS 18. 99a2c000 00000800
1904 07:55:03.999973
1905 07:55:04.000049 IMD small region:
1906 07:55:04.003226 IMD ROOT 0. 99ffec00 00000400
1907 07:55:04.006348 FSP RUNTIME 1. 99ffebe0 00000004
1908 07:55:04.010265 EC HOSTEVENT 2. 99ffebc0 00000008
1909 07:55:04.012871 POWER STATE 3. 99ffeb80 00000040
1910 07:55:04.016099 ROMSTAGE 4. 99ffeb60 00000004
1911 07:55:04.019484
1912 07:55:04.023113 MEM INFO 5. 99ffe9a0 000001b9
1913 07:55:04.026443 VPD 6. 99ffe920 0000006c
1914 07:55:04.029722 MTRR: Physical address space:
1915 07:55:04.032477 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1916 07:55:04.039560 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1917 07:55:04.045598 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1918 07:55:04.051931 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1919 07:55:04.059336 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1920 07:55:04.064996 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1921 07:55:04.072140 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1922 07:55:04.075040 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 07:55:04.078345 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 07:55:04.085193 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 07:55:04.088204 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 07:55:04.091395 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 07:55:04.094615 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 07:55:04.101050 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 07:55:04.104822 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 07:55:04.108101 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 07:55:04.111205 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 07:55:04.117574 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 07:55:04.120864 call enable_fixed_mtrr()
1934 07:55:04.124098 CPU physical address size: 39 bits
1935 07:55:04.127364 MTRR: default type WB/UC MTRR counts: 6/8.
1936 07:55:04.130560 MTRR: WB selected as default type.
1937 07:55:04.137054 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1938 07:55:04.144020 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1939 07:55:04.149905 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1940 07:55:04.156868 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1941 07:55:04.163431 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1942 07:55:04.169870 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1943 07:55:04.173221 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 07:55:04.176153 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 07:55:04.183123 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 07:55:04.186329 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 07:55:04.189417 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 07:55:04.193133 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 07:55:04.199147 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 07:55:04.203150 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 07:55:04.206073 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 07:55:04.209268 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 07:55:04.215583 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 07:55:04.215662
1955 07:55:04.215731 MTRR check
1956 07:55:04.218836 call enable_fixed_mtrr()
1957 07:55:04.222118 Fixed MTRRs : Enabled
1958 07:55:04.222196 Variable MTRRs: Enabled
1959 07:55:04.222260
1960 07:55:04.225298
1961 07:55:04.228564 CPU physical address size: 39 bits
1962 07:55:04.231881 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1963 07:55:04.238332 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 07:55:04.241622 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 07:55:04.245025 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 07:55:04.248202 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 07:55:04.254954 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 07:55:04.258617 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 07:55:04.261794 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 07:55:04.265107 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 07:55:04.271552 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 07:55:04.274560 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 07:55:04.277930 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 07:55:04.281037 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 07:55:04.284626 call enable_fixed_mtrr()
1976 07:55:04.287897 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 07:55:04.294289 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 07:55:04.297691 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 07:55:04.300740 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 07:55:04.304057 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 07:55:04.310946 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 07:55:04.314091 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 07:55:04.317547 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 07:55:04.320917 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 07:55:04.327199 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 07:55:04.330453 CPU physical address size: 39 bits
1987 07:55:04.333623 call enable_fixed_mtrr()
1988 07:55:04.336833 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 07:55:04.340103 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 07:55:04.343334 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 07:55:04.349891 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 07:55:04.353138 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 07:55:04.356276 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 07:55:04.360092 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 07:55:04.366615 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 07:55:04.369207 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 07:55:04.372400 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 07:55:04.376219 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 07:55:04.382563 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 07:55:04.385526 call enable_fixed_mtrr()
2001 07:55:04.388902 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 07:55:04.392246 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 07:55:04.396093 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 07:55:04.402353 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 07:55:04.405497 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 07:55:04.408611 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 07:55:04.411564 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 07:55:04.418261 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 07:55:04.421401 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 07:55:04.425228 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 07:55:04.427873 CPU physical address size: 39 bits
2012 07:55:04.431765 call enable_fixed_mtrr()
2013 07:55:04.435077 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 07:55:04.441609 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 07:55:04.444913 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 07:55:04.448131 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 07:55:04.451506 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 07:55:04.458008 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 07:55:04.461209 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 07:55:04.464474 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 07:55:04.467612 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 07:55:04.474017 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 07:55:04.477409 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 07:55:04.480632 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 07:55:04.484276 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 07:55:04.487353 call enable_fixed_mtrr()
2027 07:55:04.490483 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 07:55:04.493801
2029 07:55:04.496944 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 07:55:04.499837 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 07:55:04.503752 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 07:55:04.507110 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 07:55:04.510296
2034 07:55:04.513342 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 07:55:04.516453 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 07:55:04.519610 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 07:55:04.523074 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 07:55:04.526223
2039 07:55:04.529430 CPU physical address size: 39 bits
2040 07:55:04.532653 call enable_fixed_mtrr()
2041 07:55:04.535855 CPU physical address size: 39 bits
2042 07:55:04.539588 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
2043 07:55:04.542804 CPU physical address size: 39 bits
2044 07:55:04.546074 CPU physical address size: 39 bits
2045 07:55:04.549530 CBFS @ c08000 size 3f8000
2046 07:55:04.555463 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2047 07:55:04.558673 CBFS: Locating 'fallback/payload'
2048 07:55:04.561804 CBFS: Found @ offset 1c96c0 size 3f798
2049 07:55:04.568896 Checking segment from ROM address 0xffdd16f8
2050 07:55:04.572173 Checking segment from ROM address 0xffdd1714
2051 07:55:04.578648 Loading segment from ROM address 0xffdd16f8
2052 07:55:04.578733 code (compression=0)
2053 07:55:04.588197 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2054 07:55:04.595003 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2055 07:55:04.598152 it's not compressed!
2056 07:55:04.690596 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2057 07:55:04.696981 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2058 07:55:04.703816 Loading segment from ROM address 0xffdd1714
2059 07:55:04.703897 Entry Point 0x30000000
2060 07:55:04.707017 Loaded segments
2061 07:55:04.712837 Finalizing chipset.
2062 07:55:04.716159 Finalizing SMM.
2063 07:55:04.719935 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2064 07:55:04.722522 mp_park_aps done after 0 msecs.
2065 07:55:04.729670 Jumping to boot code at 30000000(99b62000)
2066 07:55:04.736154 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2067 07:55:04.736245
2068 07:55:04.736313
2069 07:55:04.736407
2070 07:55:04.738913 Starting depthcharge on Helios...
2071 07:55:04.739000
2072 07:55:04.739330 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2073 07:55:04.739437 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2074 07:55:04.739522 Setting prompt string to ['hatch:']
2075 07:55:04.739604 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2076 07:55:04.749078 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2077 07:55:04.749166
2078 07:55:04.755473 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2079 07:55:04.755571
2080 07:55:04.762103 board_setup: Info: eMMC controller not present; skipping
2081 07:55:04.762190
2082 07:55:04.765430 New NVMe Controller 0x30053ac0 @ 00:1d:00
2083 07:55:04.765516
2084 07:55:04.771762 board_setup: Info: SDHCI controller not present; skipping
2085 07:55:04.771849
2086 07:55:04.778461 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2087 07:55:04.778548
2088 07:55:04.778616 Wipe memory regions:
2089 07:55:04.778680
2090 07:55:04.784811 [0x00000000001000, 0x000000000a0000)
2091 07:55:04.784897
2092 07:55:04.787785 [0x00000000100000, 0x00000030000000)
2093 07:55:04.787876
2094 07:55:04.855095 [0x00000030657430, 0x00000099a2c000)
2095 07:55:04.855253
2096 07:55:04.995218 [0x00000100000000, 0x0000045e800000)
2097 07:55:04.995352
2098 07:55:06.378316 R8152: Initializing
2099 07:55:06.378471
2100 07:55:06.381563 Version 9 (ocp_data = 6010)
2101 07:55:06.381651
2102 07:55:06.386021 R8152: Done initializing
2103 07:55:06.386123
2104 07:55:06.389346 Adding net device
2105 07:55:06.389433
2106 07:55:06.871783 R8152: Initializing
2107 07:55:06.871937
2108 07:55:06.874867 Version 6 (ocp_data = 5c30)
2109 07:55:06.874955
2110 07:55:06.878327 R8152: Done initializing
2111 07:55:06.878413
2112 07:55:06.885497 net_add_device: Attemp to include the same device
2113 07:55:06.885584
2114 07:55:06.892066 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2115 07:55:06.892161
2116 07:55:06.892231
2117 07:55:06.892293
2118 07:55:06.892565 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 07:55:06.993323 hatch: tftpboot 192.168.201.1 8119428/tftp-deploy-wrhcvjxw/kernel/bzImage 8119428/tftp-deploy-wrhcvjxw/kernel/cmdline 8119428/tftp-deploy-wrhcvjxw/ramdisk/ramdisk.cpio.gz
2121 07:55:06.993475 Setting prompt string to 'Starting kernel'
2122 07:55:06.993551 Setting prompt string to ['Starting kernel']
2123 07:55:06.993618 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 07:55:06.993692 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2125 07:55:06.998129 tftpboot 192.168.201.1 8119428/tftp-deploy-wrhcvjxw/kernel/bzImoy-wrhcvjxw/kernel/cmdline 8119428/tftp-deploy-wrhcvjxw/ramdisk/ramdisk.cpio.gz
2126 07:55:06.998220
2127 07:55:06.998286 Waiting for link
2128 07:55:06.998348
2129 07:55:07.198563 done.
2130 07:55:07.198709
2131 07:55:07.198789 MAC: 00:24:32:50:19:be
2132 07:55:07.198853
2133 07:55:07.202452 Sending DHCP discover... done.
2134 07:55:07.202530
2135 07:55:07.205136 Waiting for reply... done.
2136 07:55:07.205213
2137 07:55:07.208427 Sending DHCP request... done.
2138 07:55:07.208507
2139 07:55:07.211655 Waiting for reply... done.
2140 07:55:07.211726
2141 07:55:07.215481 My ip is 192.168.201.15
2142 07:55:07.215552
2143 07:55:07.218706 The DHCP server ip is 192.168.201.1
2144 07:55:07.218781
2145 07:55:07.221943 TFTP server IP predefined by user: 192.168.201.1
2146 07:55:07.222014
2147 07:55:07.228524 Bootfile predefined by user: 8119428/tftp-deploy-wrhcvjxw/kernel/bzImage
2148 07:55:07.228597
2149 07:55:07.231805 Sending tftp read request... done.
2150 07:55:07.234989
2151 07:55:07.238087 Waiting for the transfer...
2152 07:55:07.238158
2153 07:55:07.794821 00000000 ################################################################
2154 07:55:07.794970
2155 07:55:08.331607 00080000 ################################################################
2156 07:55:08.331751
2157 07:55:08.868534 00100000 ################################################################
2158 07:55:08.868687
2159 07:55:09.401712 00180000 ################################################################
2160 07:55:09.401868
2161 07:55:09.932799 00200000 ################################################################
2162 07:55:09.932953
2163 07:55:10.466037 00280000 ################################################################
2164 07:55:10.466196
2165 07:55:10.990295 00300000 ################################################################
2166 07:55:10.990454
2167 07:55:11.524355 00380000 ################################################################
2168 07:55:11.524512
2169 07:55:12.061483 00400000 ################################################################
2170 07:55:12.061645
2171 07:55:12.596047 00480000 ################################################################
2172 07:55:12.596191
2173 07:55:13.131691 00500000 ################################################################
2174 07:55:13.131845
2175 07:55:13.663277 00580000 ################################################################
2176 07:55:13.663455
2177 07:55:14.202607 00600000 ################################################################
2178 07:55:14.202763
2179 07:55:14.531128 00680000 ####################################### done.
2180 07:55:14.531285
2181 07:55:14.534345 The bootfile was 7131024 bytes long.
2182 07:55:14.534450
2183 07:55:14.537663 Sending tftp read request... done.
2184 07:55:14.537750
2185 07:55:14.540967 Waiting for the transfer...
2186 07:55:14.541054
2187 07:55:15.080339 00000000 ################################################################
2188 07:55:15.080506
2189 07:55:15.639498 00080000 ################################################################
2190 07:55:15.639644
2191 07:55:16.211710 00100000 ################################################################
2192 07:55:16.211895
2193 07:55:16.778676 00180000 ################################################################
2194 07:55:16.778839
2195 07:55:17.383993 00200000 ################################################################
2196 07:55:17.384592
2197 07:55:18.088413 00280000 ################################################################
2198 07:55:18.089037
2199 07:55:18.800505 00300000 ################################################################
2200 07:55:18.801096
2201 07:55:19.429687 00380000 ################################################################
2202 07:55:19.429830
2203 07:55:20.004040 00400000 ################################################################
2204 07:55:20.004189
2205 07:55:20.566623 00480000 ################################################################
2206 07:55:20.566791
2207 07:55:20.840689 00500000 ################################ done.
2208 07:55:20.840901
2209 07:55:20.843774 Sending tftp read request... done.
2210 07:55:20.843883
2211 07:55:20.847088 Waiting for the transfer...
2212 07:55:20.847175
2213 07:55:20.847243 00000000 # done.
2214 07:55:20.847307
2215 07:55:20.856685 Command line loaded dynamically from TFTP file: 8119428/tftp-deploy-wrhcvjxw/kernel/cmdline
2216 07:55:20.856883
2217 07:55:20.880172 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119428/extract-nfsrootfs-3_0lzdoj,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2218 07:55:20.880277
2219 07:55:20.886590 ec_init(0): CrosEC protocol v3 supported (256, 256)
2220 07:55:20.886690
2221 07:55:20.893894 Shutting down all USB controllers.
2222 07:55:20.894090
2223 07:55:20.894197 Removing current net device
2224 07:55:20.894293
2225 07:55:20.898615 Finalizing coreboot
2226 07:55:20.898826
2227 07:55:20.904716 Exiting depthcharge with code 4 at timestamp: 23489630
2228 07:55:20.904935
2229 07:55:20.905060
2230 07:55:20.905175 Starting kernel ...
2231 07:55:20.905283
2232 07:55:20.905389
2233 07:55:20.905526
2234 07:55:20.906014 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2235 07:55:20.906181 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2236 07:55:20.906307 Setting prompt string to ['Linux version [0-9]']
2237 07:55:20.906436 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2238 07:55:20.906556 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2240 07:59:45.907216 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2242 07:59:45.908464 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2244 07:59:45.909403 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2247 07:59:45.911047 end: 2 depthcharge-action (duration 00:05:00) [common]
2249 07:59:45.912318 Cleaning after the job
2250 07:59:45.912799 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/ramdisk
2251 07:59:45.915119 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/kernel
2252 07:59:45.917734 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/nfsrootfs
2253 07:59:45.983745 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119428/tftp-deploy-wrhcvjxw/modules
2254 07:59:45.984055 start: 4.1 power-off (timeout 00:00:30) [common]
2255 07:59:45.984219 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2256 07:59:46.003353 >> Command sent successfully.
2257 07:59:46.005312 Returned 0 in 0 seconds
2258 07:59:46.106514 end: 4.1 power-off (duration 00:00:00) [common]
2260 07:59:46.108071 start: 4.2 read-feedback (timeout 00:10:00) [common]
2261 07:59:46.109261 Listened to connection for namespace 'common' for up to 1s
2262 07:59:47.113070 Finalising connection for namespace 'common'
2263 07:59:47.113820 Disconnecting from shell: Finalise
2264 07:59:47.215300 end: 4.2 read-feedback (duration 00:00:01) [common]
2265 07:59:47.215966 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119428
2266 07:59:47.423912 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119428
2267 07:59:47.424112 JobError: Your job cannot terminate cleanly.