Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:48:44.149989 lava-dispatcher, installed at version: 2022.10
2 07:48:44.150226 start: 0 validate
3 07:48:44.150377 Start time: 2022-11-25 07:48:44.150368+00:00 (UTC)
4 07:48:44.150527 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:48:44.150684 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:48:44.444141 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:48:44.444355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:48:44.729593 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:48:44.729788 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:48:45.023847 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:48:45.024084 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:48:45.317036 validate duration: 1.17
14 07:48:45.317469 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:48:45.317632 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:48:45.317780 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:48:45.317931 Not decompressing ramdisk as can be used compressed.
18 07:48:45.318076 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/initrd.cpio.gz
19 07:48:45.318186 saving as /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/ramdisk/initrd.cpio.gz
20 07:48:45.318266 total size: 5431622 (5MB)
21 07:48:45.319745 progress 0% (0MB)
22 07:48:45.322229 progress 5% (0MB)
23 07:48:45.324681 progress 10% (0MB)
24 07:48:45.326983 progress 15% (0MB)
25 07:48:45.329702 progress 20% (1MB)
26 07:48:45.331977 progress 25% (1MB)
27 07:48:45.334303 progress 30% (1MB)
28 07:48:45.336996 progress 35% (1MB)
29 07:48:45.339262 progress 40% (2MB)
30 07:48:45.341526 progress 45% (2MB)
31 07:48:45.343902 progress 50% (2MB)
32 07:48:45.346429 progress 55% (2MB)
33 07:48:45.348699 progress 60% (3MB)
34 07:48:45.351080 progress 65% (3MB)
35 07:48:45.353490 progress 70% (3MB)
36 07:48:45.355588 progress 75% (3MB)
37 07:48:45.357633 progress 80% (4MB)
38 07:48:45.359853 progress 85% (4MB)
39 07:48:45.362548 progress 90% (4MB)
40 07:48:45.364168 progress 95% (4MB)
41 07:48:45.365655 progress 100% (5MB)
42 07:48:45.365950 5MB downloaded in 0.05s (108.64MB/s)
43 07:48:45.366123 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:48:45.366413 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:48:45.366516 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:48:45.366617 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:48:45.366740 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:48:45.366830 saving as /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/kernel/bzImage
50 07:48:45.366903 total size: 7131024 (6MB)
51 07:48:45.366973 No compression specified
52 07:48:46.877059 progress 0% (0MB)
53 07:48:46.879130 progress 5% (0MB)
54 07:48:46.881161 progress 10% (0MB)
55 07:48:46.883162 progress 15% (1MB)
56 07:48:46.885148 progress 20% (1MB)
57 07:48:46.887135 progress 25% (1MB)
58 07:48:46.889111 progress 30% (2MB)
59 07:48:46.891104 progress 35% (2MB)
60 07:48:46.893056 progress 40% (2MB)
61 07:48:46.894866 progress 45% (3MB)
62 07:48:46.896837 progress 50% (3MB)
63 07:48:46.898794 progress 55% (3MB)
64 07:48:46.900750 progress 60% (4MB)
65 07:48:46.902686 progress 65% (4MB)
66 07:48:46.904633 progress 70% (4MB)
67 07:48:46.906564 progress 75% (5MB)
68 07:48:46.908509 progress 80% (5MB)
69 07:48:46.910326 progress 85% (5MB)
70 07:48:46.912309 progress 90% (6MB)
71 07:48:46.914260 progress 95% (6MB)
72 07:48:46.916230 progress 100% (6MB)
73 07:48:46.916500 6MB downloaded in 1.55s (4.39MB/s)
74 07:48:46.916676 end: 1.2.1 http-download (duration 00:00:02) [common]
76 07:48:46.916959 end: 1.2 download-retry (duration 00:00:02) [common]
77 07:48:46.917064 start: 1.3 download-retry (timeout 00:09:58) [common]
78 07:48:46.917164 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 07:48:46.917285 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/full.rootfs.tar.xz
80 07:48:46.917364 saving as /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/nfsrootfs/full.rootfs.tar
81 07:48:46.917434 total size: 123211568 (117MB)
82 07:48:46.917504 Using unxz to decompress xz
83 07:48:46.921154 progress 0% (0MB)
84 07:48:47.424903 progress 5% (5MB)
85 07:48:47.953534 progress 10% (11MB)
86 07:48:48.498261 progress 15% (17MB)
87 07:48:49.059764 progress 20% (23MB)
88 07:48:49.444627 progress 25% (29MB)
89 07:48:49.827892 progress 30% (35MB)
90 07:48:50.116229 progress 35% (41MB)
91 07:48:50.395279 progress 40% (47MB)
92 07:48:50.811650 progress 45% (52MB)
93 07:48:51.233993 progress 50% (58MB)
94 07:48:51.625398 progress 55% (64MB)
95 07:48:52.036435 progress 60% (70MB)
96 07:48:52.426274 progress 65% (76MB)
97 07:48:52.862928 progress 70% (82MB)
98 07:48:53.330065 progress 75% (88MB)
99 07:48:53.800360 progress 80% (94MB)
100 07:48:53.934633 progress 85% (99MB)
101 07:48:54.128814 progress 90% (105MB)
102 07:48:54.502790 progress 95% (111MB)
103 07:48:54.914534 progress 100% (117MB)
104 07:48:54.920095 117MB downloaded in 8.00s (14.68MB/s)
105 07:48:54.920480 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:48:54.920839 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:48:54.920964 start: 1.4 download-retry (timeout 00:09:50) [common]
109 07:48:54.921083 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 07:48:54.921230 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:48:54.921317 saving as /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/modules/modules.tar
112 07:48:54.921409 total size: 52060 (0MB)
113 07:48:54.921500 Using unxz to decompress xz
114 07:48:54.925228 progress 62% (0MB)
115 07:48:54.925693 progress 100% (0MB)
116 07:48:54.929344 0MB downloaded in 0.01s (6.27MB/s)
117 07:48:54.929705 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:48:54.930019 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:48:54.930129 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 07:48:54.930241 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 07:48:56.804797 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119353/extract-nfsrootfs-eu5p8sx9
123 07:48:56.805024 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:48:56.805147 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 07:48:56.805311 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9
126 07:48:56.805430 makedir: /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin
127 07:48:56.805527 makedir: /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/tests
128 07:48:56.805620 makedir: /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/results
129 07:48:56.805735 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-add-keys
130 07:48:56.805939 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-add-sources
131 07:48:56.806090 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-background-process-start
132 07:48:56.806219 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-background-process-stop
133 07:48:56.806353 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-common-functions
134 07:48:56.806480 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-echo-ipv4
135 07:48:56.806606 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-install-packages
136 07:48:56.806732 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-installed-packages
137 07:48:56.806870 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-os-build
138 07:48:56.807001 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-probe-channel
139 07:48:56.807137 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-probe-ip
140 07:48:56.807280 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-target-ip
141 07:48:56.807409 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-target-mac
142 07:48:56.807534 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-target-storage
143 07:48:56.807662 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-case
144 07:48:56.807789 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-event
145 07:48:56.807913 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-feedback
146 07:48:56.808085 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-raise
147 07:48:56.808248 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-reference
148 07:48:56.808393 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-runner
149 07:48:56.808519 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-set
150 07:48:56.808649 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-test-shell
151 07:48:56.808776 Updating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-install-packages (oe)
152 07:48:56.808919 Updating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/bin/lava-installed-packages (oe)
153 07:48:56.809033 Creating /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/environment
154 07:48:56.809145 LAVA metadata
155 07:48:56.809223 - LAVA_JOB_ID=8119353
156 07:48:56.809297 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:48:56.809417 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 07:48:56.809494 skipped lava-vland-overlay
159 07:48:56.809588 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:48:56.809689 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 07:48:56.809761 skipped lava-multinode-overlay
162 07:48:56.809849 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:48:56.809946 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 07:48:56.810029 Loading test definitions
165 07:48:56.810132 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
166 07:48:56.810230 Using /lava-8119353 at stage 0
167 07:48:56.810387 Fetching tests from https://github.com/kernelci/test-definitions
168 07:48:56.810506 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/0/tests/0_ltp-ipc'
169 07:49:02.121953 Running '/usr/bin/git checkout kernelci.org
170 07:49:02.232800 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 07:49:02.233634 uuid=8119353_1.5.2.3.1 testdef=None
172 07:49:02.233818 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 07:49:02.234100 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
175 07:49:02.235008 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:49:02.235281 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
178 07:49:02.236415 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:49:02.236695 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
181 07:49:02.237811 runner path: /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/0/tests/0_ltp-ipc test_uuid 8119353_1.5.2.3.1
182 07:49:02.237919 SKIPFILE='skipfile-lkft.yaml'
183 07:49:02.237995 SKIP_INSTALL='true'
184 07:49:02.238070 TST_CMDFILES='ipc'
185 07:49:02.238224 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 07:49:02.238471 Creating lava-test-runner.conf files
188 07:49:02.238547 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119353/lava-overlay-4dlf95z9/lava-8119353/0 for stage 0
189 07:49:02.238644 - 0_ltp-ipc
190 07:49:02.238761 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 07:49:02.238865 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
192 07:49:10.586520 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 07:49:10.586702 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
194 07:49:10.586864 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 07:49:10.587007 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 07:49:10.587161 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
197 07:49:10.702533 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 07:49:10.702928 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
199 07:49:10.703056 extracting modules file /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119353/extract-nfsrootfs-eu5p8sx9
200 07:49:10.707631 extracting modules file /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119353/extract-overlay-ramdisk-pnck1eaa/ramdisk
201 07:49:10.711830 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 07:49:10.711967 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
203 07:49:10.712072 [common] Applying overlay to NFS
204 07:49:10.712155 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119353/compress-overlay-j546idy_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119353/extract-nfsrootfs-eu5p8sx9
205 07:49:11.220425 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
206 07:49:11.220609 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
207 07:49:11.220720 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 07:49:11.220824 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
209 07:49:11.220920 Building ramdisk /var/lib/lava/dispatcher/tmp/8119353/extract-overlay-ramdisk-pnck1eaa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119353/extract-overlay-ramdisk-pnck1eaa/ramdisk
210 07:49:11.258711 >> 24546 blocks
211 07:49:11.811119 rename /var/lib/lava/dispatcher/tmp/8119353/extract-overlay-ramdisk-pnck1eaa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/ramdisk/ramdisk.cpio.gz
212 07:49:11.811574 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 07:49:11.811720 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
214 07:49:11.811853 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
215 07:49:11.811967 No mkimage arch provided, not using FIT.
216 07:49:11.812073 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 07:49:11.812182 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 07:49:11.812306 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
219 07:49:11.812422 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
220 07:49:11.812519 No LXC device requested
221 07:49:11.812621 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 07:49:11.812730 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
223 07:49:11.812828 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 07:49:11.812920 Checking files for TFTP limit of 4294967296 bytes.
225 07:49:11.813343 end: 1 tftp-deploy (duration 00:00:26) [common]
226 07:49:11.813470 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 07:49:11.813588 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 07:49:11.813754 substitutions:
229 07:49:11.813841 - {DTB}: None
230 07:49:11.813917 - {INITRD}: 8119353/tftp-deploy-fjoh7qa4/ramdisk/ramdisk.cpio.gz
231 07:49:11.814001 - {KERNEL}: 8119353/tftp-deploy-fjoh7qa4/kernel/bzImage
232 07:49:11.814089 - {LAVA_MAC}: None
233 07:49:11.814162 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119353/extract-nfsrootfs-eu5p8sx9
234 07:49:11.814243 - {NFS_SERVER_IP}: 192.168.201.1
235 07:49:11.814313 - {PRESEED_CONFIG}: None
236 07:49:11.814378 - {PRESEED_LOCAL}: None
237 07:49:11.814458 - {RAMDISK}: 8119353/tftp-deploy-fjoh7qa4/ramdisk/ramdisk.cpio.gz
238 07:49:11.814537 - {ROOT_PART}: None
239 07:49:11.814606 - {ROOT}: None
240 07:49:11.814674 - {SERVER_IP}: 192.168.201.1
241 07:49:11.814738 - {TEE}: None
242 07:49:11.814833 Parsed boot commands:
243 07:49:11.814900 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 07:49:11.815088 Parsed boot commands: tftpboot 192.168.201.1 8119353/tftp-deploy-fjoh7qa4/kernel/bzImage 8119353/tftp-deploy-fjoh7qa4/kernel/cmdline 8119353/tftp-deploy-fjoh7qa4/ramdisk/ramdisk.cpio.gz
245 07:49:11.815206 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 07:49:11.815321 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 07:49:11.815441 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 07:49:11.815558 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 07:49:11.815645 Not connected, no need to disconnect.
250 07:49:11.815743 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 07:49:11.815855 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 07:49:11.815935 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 07:49:11.818932 Setting prompt string to ['lava-test: # ']
254 07:49:11.819269 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 07:49:11.819394 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 07:49:11.819518 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 07:49:11.819623 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 07:49:11.819833 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 07:49:11.840884 >> Command sent successfully.
260 07:49:11.843037 Returned 0 in 0 seconds
261 07:49:11.943875 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 07:49:11.944241 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 07:49:11.944369 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 07:49:11.944476 Setting prompt string to 'Starting depthcharge on Helios...'
266 07:49:11.944564 Changing prompt to 'Starting depthcharge on Helios...'
267 07:49:11.944645 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 07:49:11.944966 [Enter `^Ec?' for help]
269 07:49:18.458013
270 07:49:18.458177
271 07:49:18.468039 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 07:49:18.471648 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 07:49:18.478293 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 07:49:18.481276 CPU: AES supported, TXT NOT supported, VT supported
275 07:49:18.487777 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 07:49:18.491815 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 07:49:18.497914 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 07:49:18.501445 VBOOT: Loading verstage.
279 07:49:18.504883 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 07:49:18.511339 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 07:49:18.515040 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 07:49:18.517886 CBFS @ c08000 size 3f8000
283 07:49:18.525170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 07:49:18.528307 CBFS: Locating 'fallback/verstage'
285 07:49:18.531347 CBFS: Found @ offset 10fb80 size 1072c
286 07:49:18.534827
287 07:49:18.534923
288 07:49:18.544505 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 07:49:18.558915 Probing TPM: . done!
290 07:49:18.562499 TPM ready after 0 ms
291 07:49:18.565652 Connected to device vid:did:rid of 1ae0:0028:00
292 07:49:18.575740 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 07:49:18.579258 Initialized TPM device CR50 revision 0
294 07:49:18.621989 tlcl_send_startup: Startup return code is 0
295 07:49:18.622103 TPM: setup succeeded
296 07:49:18.634849 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 07:49:18.638367 Chrome EC: UHEPI supported
298 07:49:18.641954 Phase 1
299 07:49:18.644998 FMAP: area GBB found @ c05000 (12288 bytes)
300 07:49:18.651688 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 07:49:18.651785 Phase 2
302 07:49:18.655276
303 07:49:18.655373 Phase 3
304 07:49:18.658318 FMAP: area GBB found @ c05000 (12288 bytes)
305 07:49:18.665177 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 07:49:18.671760 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 07:49:18.674750 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 07:49:18.681394 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 07:49:18.696983 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 07:49:18.700519 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 07:49:18.707093 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 07:49:18.711321 Phase 4
313 07:49:18.714715 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 07:49:18.721278 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 07:49:18.900594 VB2:vb2_rsa_verify_digest() Digest check failed!
316 07:49:18.903957 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 07:49:18.907413
318 07:49:18.907510 Saving nvdata
319 07:49:18.910602 Reboot requested (10020007)
320 07:49:18.914105 board_reset() called!
321 07:49:18.914202 full_reset() called!
322 07:49:23.425974
323 07:49:23.426533
324 07:49:23.435720 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
325 07:49:23.439315 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
326 07:49:23.445983 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
327 07:49:23.449156 CPU: AES supported, TXT NOT supported, VT supported
328 07:49:23.455558 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
329 07:49:23.458819 PCH: device id 0284 (rev 00) is Cometlake-U Premium
330 07:49:23.465832 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
331 07:49:23.468825 VBOOT: Loading verstage.
332 07:49:23.472509 FMAP: Found "FLASH" version 1.1 at 0xc04000.
333 07:49:23.478636 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
334 07:49:23.482503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 07:49:23.485461 CBFS @ c08000 size 3f8000
336 07:49:23.491859 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 07:49:23.495485 CBFS: Locating 'fallback/verstage'
338 07:49:23.498903 CBFS: Found @ offset 10fb80 size 1072c
339 07:49:23.502731
340 07:49:23.503263
341 07:49:23.512479 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
342 07:49:23.526622 Probing TPM: . done!
343 07:49:23.530037 TPM ready after 0 ms
344 07:49:23.533526 Connected to device vid:did:rid of 1ae0:0028:00
345 07:49:23.543574 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
346 07:49:23.547097 Initialized TPM device CR50 revision 0
347 07:49:23.589460 tlcl_send_startup: Startup return code is 0
348 07:49:23.589942 TPM: setup succeeded
349 07:49:23.602417 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
350 07:49:23.606050 Chrome EC: UHEPI supported
351 07:49:23.608963 Phase 1
352 07:49:23.612427 FMAP: area GBB found @ c05000 (12288 bytes)
353 07:49:23.619060 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
354 07:49:23.625798 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
355 07:49:23.629373 Recovery requested (1009000e)
356 07:49:23.634440 Saving nvdata
357 07:49:23.641165 tlcl_extend: response is 0
358 07:49:23.649621 tlcl_extend: response is 0
359 07:49:23.656991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
360 07:49:23.660064 CBFS @ c08000 size 3f8000
361 07:49:23.666691 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
362 07:49:23.669812 CBFS: Locating 'fallback/romstage'
363 07:49:23.673468 CBFS: Found @ offset 80 size 145fc
364 07:49:23.676400 Accumulated console time in verstage 98 ms
365 07:49:23.676844
366 07:49:23.677269
367 07:49:23.689589 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
368 07:49:23.696067 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
369 07:49:23.699599 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 07:49:23.703351 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 07:49:23.709455 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
372 07:49:23.712909 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
373 07:49:23.716101 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
374 07:49:23.719537 TCO_STS: 0000 0000
375 07:49:23.722667 GEN_PMCON: e0015238 00000200
376 07:49:23.726343 GBLRST_CAUSE: 00000000 00000000
377 07:49:23.726888 prev_sleep_state 5
378 07:49:23.729621 Boot Count incremented to 36527
379 07:49:23.736387 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 07:49:23.739786 CBFS @ c08000 size 3f8000
381 07:49:23.746412 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 07:49:23.747085 CBFS: Locating 'fspm.bin'
383 07:49:23.749402 CBFS: Found @ offset 5ffc0 size 71000
384 07:49:23.753007
385 07:49:23.755976 Chrome EC: UHEPI supported
386 07:49:23.762655 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
387 07:49:23.766290 Probing TPM: done!
388 07:49:23.773323 Connected to device vid:did:rid of 1ae0:0028:00
389 07:49:23.783037 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
390 07:49:23.788604 Initialized TPM device CR50 revision 0
391 07:49:23.798087 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
392 07:49:23.805021 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
393 07:49:23.807880 MRC cache found, size 1948
394 07:49:23.811509 bootmode is set to: 2
395 07:49:23.814253 PRMRR disabled by config.
396 07:49:23.814702 SPD INDEX = 1
397 07:49:23.821120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
398 07:49:23.824800 CBFS @ c08000 size 3f8000
399 07:49:23.830860 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
400 07:49:23.831309 CBFS: Locating 'spd.bin'
401 07:49:23.834220 CBFS: Found @ offset 5fb80 size 400
402 07:49:23.837727 SPD: module type is LPDDR3
403 07:49:23.840727 SPD: module part is
404 07:49:23.847268 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
405 07:49:23.850869 SPD: device width 4 bits, bus width 8 bits
406 07:49:23.854355 SPD: module size is 4096 MB (per channel)
407 07:49:23.857413 memory slot: 0 configuration done.
408 07:49:23.860994 memory slot: 2 configuration done.
409 07:49:23.911728 CBMEM:
410 07:49:23.915319 IMD: root @ 99fff000 254 entries.
411 07:49:23.918425 IMD: root @ 99ffec00 62 entries.
412 07:49:23.922068 External stage cache:
413 07:49:23.925002 IMD: root @ 9abff000 254 entries.
414 07:49:23.928055 IMD: root @ 9abfec00 62 entries.
415 07:49:23.931688 Chrome EC: clear events_b mask to 0x0000000020004000
416 07:49:23.947686 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 07:49:23.961109 tlcl_write: response is 0
418 07:49:23.970146 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 07:49:23.976838 MRC: TPM MRC hash updated successfully.
420 07:49:23.976975 2 DIMMs found
421 07:49:23.979913 SMM Memory Map
422 07:49:23.983519 SMRAM : 0x9a000000 0x1000000
423 07:49:23.986427 Subregion 0: 0x9a000000 0xa00000
424 07:49:23.990178 Subregion 1: 0x9aa00000 0x200000
425 07:49:23.993183 Subregion 2: 0x9ac00000 0x400000
426 07:49:23.996745 top_of_ram = 0x9a000000
427 07:49:23.999721 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
428 07:49:24.006283 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
429 07:49:24.009953 MTRR Range: Start=ff000000 End=0 (Size 1000000)
430 07:49:24.016760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
431 07:49:24.019784 CBFS @ c08000 size 3f8000
432 07:49:24.022880 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
433 07:49:24.026550 CBFS: Locating 'fallback/postcar'
434 07:49:24.029741 CBFS: Found @ offset 107000 size 4b44
435 07:49:24.033439
436 07:49:24.036768 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
437 07:49:24.048683 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
438 07:49:24.051806 Processing 180 relocs. Offset value of 0x97c0c000
439 07:49:24.060071 Accumulated console time in romstage 286 ms
440 07:49:24.060237
441 07:49:24.060335
442 07:49:24.070505 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
443 07:49:24.076819 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
444 07:49:24.080395 CBFS @ c08000 size 3f8000
445 07:49:24.083305 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
446 07:49:24.090180 CBFS: Locating 'fallback/ramstage'
447 07:49:24.093198 CBFS: Found @ offset 43380 size 1b9e8
448 07:49:24.100014 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
449 07:49:24.132214 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
450 07:49:24.135812 Processing 3976 relocs. Offset value of 0x98db0000
451 07:49:24.142457 Accumulated console time in postcar 52 ms
452 07:49:24.142939
453 07:49:24.143298
454 07:49:24.152008 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
455 07:49:24.158478 FMAP: area RO_VPD found @ c00000 (16384 bytes)
456 07:49:24.161913 WARNING: RO_VPD is uninitialized or empty.
457 07:49:24.165074 FMAP: area RW_VPD found @ af8000 (8192 bytes)
458 07:49:24.171770 FMAP: area RW_VPD found @ af8000 (8192 bytes)
459 07:49:24.171934 Normal boot.
460 07:49:24.178426 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
461 07:49:24.182005 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
462 07:49:24.184936 CBFS @ c08000 size 3f8000
463 07:49:24.191832 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
464 07:49:24.195316 CBFS: Locating 'cpu_microcode_blob.bin'
465 07:49:24.198475 CBFS: Found @ offset 14700 size 2ec00
466 07:49:24.202066 microcode: sig=0x806ec pf=0x4 revision=0xc9
467 07:49:24.204992 Skip microcode update
468 07:49:24.208650 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
469 07:49:24.211561 CBFS @ c08000 size 3f8000
470 07:49:24.218308 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
471 07:49:24.221923 CBFS: Locating 'fsps.bin'
472 07:49:24.224915 CBFS: Found @ offset d1fc0 size 35000
473 07:49:24.250384 Detected 4 core, 8 thread CPU.
474 07:49:24.253955 Setting up SMI for CPU
475 07:49:24.256867 IED base = 0x9ac00000
476 07:49:24.257046 IED size = 0x00400000
477 07:49:24.259913 Will perform SMM setup.
478 07:49:24.266610 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
479 07:49:24.273680 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
480 07:49:24.276430 Processing 16 relocs. Offset value of 0x00030000
481 07:49:24.280166
482 07:49:24.280555 Attempting to start 7 APs
483 07:49:24.286890 Waiting for 10ms after sending INIT.
484 07:49:24.300069 Waiting for 1st SIPI to complete...done.
485 07:49:24.300669 AP: slot 3 apic_id 6.
486 07:49:24.303236 AP: slot 7 apic_id 7.
487 07:49:24.306882 Waiting for 2nd SIPI to complete...done.
488 07:49:24.309836 AP: slot 2 apic_id 1.
489 07:49:24.313300 AP: slot 1 apic_id 3.
490 07:49:24.313772 AP: slot 4 apic_id 2.
491 07:49:24.316431 AP: slot 5 apic_id 5.
492 07:49:24.320115 AP: slot 6 apic_id 4.
493 07:49:24.326713 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
494 07:49:24.333310 Processing 13 relocs. Offset value of 0x00038000
495 07:49:24.336836 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
496 07:49:24.343472 Installing SMM handler to 0x9a000000
497 07:49:24.350090 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
498 07:49:24.353560 Processing 658 relocs. Offset value of 0x9a010000
499 07:49:24.363254 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
500 07:49:24.366408 Processing 13 relocs. Offset value of 0x9a008000
501 07:49:24.373079 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
502 07:49:24.379824 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
503 07:49:24.383181 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
504 07:49:24.389978 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
505 07:49:24.396301 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
506 07:49:24.403167 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
507 07:49:24.406084 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
508 07:49:24.412603 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
509 07:49:24.416275 Clearing SMI status registers
510 07:49:24.419766 SMI_STS: PM1
511 07:49:24.420102 PM1_STS: PWRBTN
512 07:49:24.422722 TCO_STS: SECOND_TO
513 07:49:24.426326 New SMBASE 0x9a000000
514 07:49:24.429342 In relocation handler: CPU 0
515 07:49:24.432995 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
516 07:49:24.436078 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 07:49:24.439748 Relocation complete.
518 07:49:24.442655 New SMBASE 0x99fff800
519 07:49:24.443003 In relocation handler: CPU 2
520 07:49:24.449391 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
521 07:49:24.452854 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 07:49:24.455954 Relocation complete.
523 07:49:24.456366 New SMBASE 0x99fff400
524 07:49:24.459476
525 07:49:24.459892 In relocation handler: CPU 3
526 07:49:24.466068 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
527 07:49:24.469488 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 07:49:24.473132 Relocation complete.
529 07:49:24.473547 New SMBASE 0x99ffe400
530 07:49:24.475928 In relocation handler: CPU 7
531 07:49:24.482916 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
532 07:49:24.485774 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 07:49:24.489384 Relocation complete.
534 07:49:24.489956 New SMBASE 0x99fffc00
535 07:49:24.492551 In relocation handler: CPU 1
536 07:49:24.496184 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
537 07:49:24.502799 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 07:49:24.505773 Relocation complete.
539 07:49:24.506266 New SMBASE 0x99fff000
540 07:49:24.509376 In relocation handler: CPU 4
541 07:49:24.512366 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
542 07:49:24.519019 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 07:49:24.522735 Relocation complete.
544 07:49:24.523204 New SMBASE 0x99ffe800
545 07:49:24.525866 In relocation handler: CPU 6
546 07:49:24.529225 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
547 07:49:24.535978 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 07:49:24.536393 Relocation complete.
549 07:49:24.538915 New SMBASE 0x99ffec00
550 07:49:24.542549 In relocation handler: CPU 5
551 07:49:24.545601 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
552 07:49:24.552170 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 07:49:24.552583 Relocation complete.
554 07:49:24.555799 Initializing CPU #0
555 07:49:24.558805 CPU: vendor Intel device 806ec
556 07:49:24.562452 CPU: family 06, model 8e, stepping 0c
557 07:49:24.565503 Clearing out pending MCEs
558 07:49:24.569171 Setting up local APIC...
559 07:49:24.569579 apic_id: 0x00 done.
560 07:49:24.572621 Turbo is available but hidden
561 07:49:24.575624 Turbo is available and visible
562 07:49:24.579229 VMX status: enabled
563 07:49:24.582253 IA32_FEATURE_CONTROL status: locked
564 07:49:24.586034 Skip microcode update
565 07:49:24.586510 CPU #0 initialized
566 07:49:24.589052 Initializing CPU #2
567 07:49:24.589457 Initializing CPU #6
568 07:49:24.592081 Initializing CPU #5
569 07:49:24.595761 CPU: vendor Intel device 806ec
570 07:49:24.598737 CPU: family 06, model 8e, stepping 0c
571 07:49:24.602387 CPU: vendor Intel device 806ec
572 07:49:24.605371 CPU: family 06, model 8e, stepping 0c
573 07:49:24.608966 Clearing out pending MCEs
574 07:49:24.612095 Clearing out pending MCEs
575 07:49:24.615340 Setting up local APIC...
576 07:49:24.618738 CPU: vendor Intel device 806ec
577 07:49:24.622296 CPU: family 06, model 8e, stepping 0c
578 07:49:24.622708 Clearing out pending MCEs
579 07:49:24.625264 Initializing CPU #7
580 07:49:24.629044 Initializing CPU #3
581 07:49:24.631934 CPU: vendor Intel device 806ec
582 07:49:24.635065 CPU: family 06, model 8e, stepping 0c
583 07:49:24.638608 CPU: vendor Intel device 806ec
584 07:49:24.641736 CPU: family 06, model 8e, stepping 0c
585 07:49:24.645307 Clearing out pending MCEs
586 07:49:24.645715 Clearing out pending MCEs
587 07:49:24.648489 Setting up local APIC...
588 07:49:24.652136 Setting up local APIC...
589 07:49:24.654937 Setting up local APIC...
590 07:49:24.655227 Initializing CPU #4
591 07:49:24.658656 Initializing CPU #1
592 07:49:24.661561 CPU: vendor Intel device 806ec
593 07:49:24.665083 CPU: family 06, model 8e, stepping 0c
594 07:49:24.668508 CPU: vendor Intel device 806ec
595 07:49:24.671477 CPU: family 06, model 8e, stepping 0c
596 07:49:24.675182 Clearing out pending MCEs
597 07:49:24.678510 Clearing out pending MCEs
598 07:49:24.678649 Setting up local APIC...
599 07:49:24.681549 apic_id: 0x04 done.
600 07:49:24.684666 Setting up local APIC...
601 07:49:24.684785 apic_id: 0x01 done.
602 07:49:24.688611
603 07:49:24.688812 Setting up local APIC...
604 07:49:24.691376 VMX status: enabled
605 07:49:24.694993 apic_id: 0x03 done.
606 07:49:24.695112 apic_id: 0x02 done.
607 07:49:24.698243 VMX status: enabled
608 07:49:24.698360 VMX status: enabled
609 07:49:24.701399 IA32_FEATURE_CONTROL status: locked
610 07:49:24.704807
611 07:49:24.707852 IA32_FEATURE_CONTROL status: locked
612 07:49:24.707972 Skip microcode update
613 07:49:24.711565 Skip microcode update
614 07:49:24.714636 CPU #1 initialized
615 07:49:24.714764 CPU #4 initialized
616 07:49:24.718173 VMX status: enabled
617 07:49:24.718300 apic_id: 0x05 done.
618 07:49:24.721146 IA32_FEATURE_CONTROL status: locked
619 07:49:24.724752 VMX status: enabled
620 07:49:24.727742 Skip microcode update
621 07:49:24.731475 IA32_FEATURE_CONTROL status: locked
622 07:49:24.731594 CPU #6 initialized
623 07:49:24.734773 Skip microcode update
624 07:49:24.737882 apic_id: 0x06 done.
625 07:49:24.737987 apic_id: 0x07 done.
626 07:49:24.741559 CPU #5 initialized
627 07:49:24.744618 IA32_FEATURE_CONTROL status: locked
628 07:49:24.748292 VMX status: enabled
629 07:49:24.748390 VMX status: enabled
630 07:49:24.751281 IA32_FEATURE_CONTROL status: locked
631 07:49:24.754333 IA32_FEATURE_CONTROL status: locked
632 07:49:24.757954 Skip microcode update
633 07:49:24.760855 Skip microcode update
634 07:49:24.760953 CPU #7 initialized
635 07:49:24.764493 CPU #3 initialized
636 07:49:24.768085 Skip microcode update
637 07:49:24.768183 CPU #2 initialized
638 07:49:24.774516 bsp_do_flight_plan done after 463 msecs.
639 07:49:24.774614 CPU: frequency set to 4200 MHz
640 07:49:24.777649
641 07:49:24.777748 Enabling SMIs.
642 07:49:24.777826 Locking SMM.
643 07:49:24.793554 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
644 07:49:24.797296 CBFS @ c08000 size 3f8000
645 07:49:24.800299 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
646 07:49:24.804055
647 07:49:24.804153 CBFS: Locating 'vbt.bin'
648 07:49:24.807063 CBFS: Found @ offset 5f5c0 size 499
649 07:49:24.813647 Found a VBT of 4608 bytes after decompression
650 07:49:24.996906 Display FSP Version Info HOB
651 07:49:24.999845 Reference Code - CPU = 9.0.1e.30
652 07:49:25.003507 uCode Version = 0.0.0.ca
653 07:49:25.006603 TXT ACM version = ff.ff.ff.ffff
654 07:49:25.010262 Display FSP Version Info HOB
655 07:49:25.013353 Reference Code - ME = 9.0.1e.30
656 07:49:25.016445 MEBx version = 0.0.0.0
657 07:49:25.020167 ME Firmware Version = Consumer SKU
658 07:49:25.023131 Display FSP Version Info HOB
659 07:49:25.026631 Reference Code - CML PCH = 9.0.1e.30
660 07:49:25.029699 PCH-CRID Status = Disabled
661 07:49:25.033314 PCH-CRID Original Value = ff.ff.ff.ffff
662 07:49:25.036802 PCH-CRID New Value = ff.ff.ff.ffff
663 07:49:25.039797 OPROM - RST - RAID = ff.ff.ff.ffff
664 07:49:25.043483 ChipsetInit Base Version = ff.ff.ff.ffff
665 07:49:25.046425 ChipsetInit Oem Version = ff.ff.ff.ffff
666 07:49:25.050304 Display FSP Version Info HOB
667 07:49:25.056774 Reference Code - SA - System Agent = 9.0.1e.30
668 07:49:25.059823 Reference Code - MRC = 0.7.1.6c
669 07:49:25.060272 SA - PCIe Version = 9.0.1e.30
670 07:49:25.063473 SA-CRID Status = Disabled
671 07:49:25.066408 SA-CRID Original Value = 0.0.0.c
672 07:49:25.069819 SA-CRID New Value = 0.0.0.c
673 07:49:25.072857 OPROM - VBIOS = ff.ff.ff.ffff
674 07:49:25.076365 RTC Init
675 07:49:25.079323 Set power on after power failure.
676 07:49:25.079516 Disabling Deep S3
677 07:49:25.082733 Disabling Deep S3
678 07:49:25.082941 Disabling Deep S4
679 07:49:25.086558 Disabling Deep S4
680 07:49:25.086721 Disabling Deep S5
681 07:49:25.089661 Disabling Deep S5
682 07:49:25.096313 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
683 07:49:25.096480 Enumerating buses...
684 07:49:25.103060 Show all devs... Before device enumeration.
685 07:49:25.103223 Root Device: enabled 1
686 07:49:25.106202 CPU_CLUSTER: 0: enabled 1
687 07:49:25.109215 DOMAIN: 0000: enabled 1
688 07:49:25.112898 APIC: 00: enabled 1
689 07:49:25.113061 PCI: 00:00.0: enabled 1
690 07:49:25.115906 PCI: 00:02.0: enabled 1
691 07:49:25.119697 PCI: 00:04.0: enabled 0
692 07:49:25.122509 PCI: 00:05.0: enabled 0
693 07:49:25.122662 PCI: 00:12.0: enabled 1
694 07:49:25.126058 PCI: 00:12.5: enabled 0
695 07:49:25.129474 PCI: 00:12.6: enabled 0
696 07:49:25.129617 PCI: 00:14.0: enabled 1
697 07:49:25.132472 PCI: 00:14.1: enabled 0
698 07:49:25.136076 PCI: 00:14.3: enabled 1
699 07:49:25.139424 PCI: 00:14.5: enabled 0
700 07:49:25.139564 PCI: 00:15.0: enabled 1
701 07:49:25.142893 PCI: 00:15.1: enabled 1
702 07:49:25.145837 PCI: 00:15.2: enabled 0
703 07:49:25.149349 PCI: 00:15.3: enabled 0
704 07:49:25.149501 PCI: 00:16.0: enabled 1
705 07:49:25.152644 PCI: 00:16.1: enabled 0
706 07:49:25.155879 PCI: 00:16.2: enabled 0
707 07:49:25.159603 PCI: 00:16.3: enabled 0
708 07:49:25.160000 PCI: 00:16.4: enabled 0
709 07:49:25.162704 PCI: 00:16.5: enabled 0
710 07:49:25.166279 PCI: 00:17.0: enabled 1
711 07:49:25.166738 PCI: 00:19.0: enabled 1
712 07:49:25.169190 PCI: 00:19.1: enabled 0
713 07:49:25.172935 PCI: 00:19.2: enabled 0
714 07:49:25.175969 PCI: 00:1a.0: enabled 0
715 07:49:25.176420 PCI: 00:1c.0: enabled 0
716 07:49:25.179119 PCI: 00:1c.1: enabled 0
717 07:49:25.182614 PCI: 00:1c.2: enabled 0
718 07:49:25.186104 PCI: 00:1c.3: enabled 0
719 07:49:25.186551 PCI: 00:1c.4: enabled 0
720 07:49:25.189130 PCI: 00:1c.5: enabled 0
721 07:49:25.192911 PCI: 00:1c.6: enabled 0
722 07:49:25.195905 PCI: 00:1c.7: enabled 0
723 07:49:25.196375 PCI: 00:1d.0: enabled 1
724 07:49:25.199337 PCI: 00:1d.1: enabled 0
725 07:49:25.202444 PCI: 00:1d.2: enabled 0
726 07:49:25.202798 PCI: 00:1d.3: enabled 0
727 07:49:25.205869 PCI: 00:1d.4: enabled 0
728 07:49:25.209017 PCI: 00:1d.5: enabled 1
729 07:49:25.212090 PCI: 00:1e.0: enabled 1
730 07:49:25.212283 PCI: 00:1e.1: enabled 0
731 07:49:25.215667 PCI: 00:1e.2: enabled 1
732 07:49:25.218675 PCI: 00:1e.3: enabled 1
733 07:49:25.221729 PCI: 00:1f.0: enabled 1
734 07:49:25.221922 PCI: 00:1f.1: enabled 1
735 07:49:25.225461 PCI: 00:1f.2: enabled 1
736 07:49:25.228319 PCI: 00:1f.3: enabled 1
737 07:49:25.231899 PCI: 00:1f.4: enabled 1
738 07:49:25.232093 PCI: 00:1f.5: enabled 1
739 07:49:25.235605 PCI: 00:1f.6: enabled 0
740 07:49:25.238506 USB0 port 0: enabled 1
741 07:49:25.238698 I2C: 00:15: enabled 1
742 07:49:25.241527 I2C: 00:5d: enabled 1
743 07:49:25.245115 GENERIC: 0.0: enabled 1
744 07:49:25.248164 I2C: 00:1a: enabled 1
745 07:49:25.248364 I2C: 00:38: enabled 1
746 07:49:25.251709 I2C: 00:39: enabled 1
747 07:49:25.254830 I2C: 00:3a: enabled 1
748 07:49:25.255097 I2C: 00:3b: enabled 1
749 07:49:25.258387 PCI: 00:00.0: enabled 1
750 07:49:25.262123 SPI: 00: enabled 1
751 07:49:25.262397 SPI: 01: enabled 1
752 07:49:25.265033 PNP: 0c09.0: enabled 1
753 07:49:25.268179 USB2 port 0: enabled 1
754 07:49:25.268372 USB2 port 1: enabled 1
755 07:49:25.271735 USB2 port 2: enabled 0
756 07:49:25.274820 USB2 port 3: enabled 0
757 07:49:25.275011 USB2 port 5: enabled 0
758 07:49:25.278527 USB2 port 6: enabled 1
759 07:49:25.281678 USB2 port 9: enabled 1
760 07:49:25.281904 USB3 port 0: enabled 1
761 07:49:25.285078 USB3 port 1: enabled 1
762 07:49:25.288157 USB3 port 2: enabled 1
763 07:49:25.291811 USB3 port 3: enabled 1
764 07:49:25.292004 USB3 port 4: enabled 0
765 07:49:25.294990 APIC: 03: enabled 1
766 07:49:25.297964 APIC: 01: enabled 1
767 07:49:25.298180 APIC: 06: enabled 1
768 07:49:25.301634 APIC: 02: enabled 1
769 07:49:25.301824 APIC: 05: enabled 1
770 07:49:25.304765 APIC: 04: enabled 1
771 07:49:25.308608 APIC: 07: enabled 1
772 07:49:25.308878 Compare with tree...
773 07:49:25.311627 Root Device: enabled 1
774 07:49:25.314570 CPU_CLUSTER: 0: enabled 1
775 07:49:25.314778 APIC: 00: enabled 1
776 07:49:25.317732 APIC: 03: enabled 1
777 07:49:25.321332 APIC: 01: enabled 1
778 07:49:25.321525 APIC: 06: enabled 1
779 07:49:25.324418
780 07:49:25.324611 APIC: 02: enabled 1
781 07:49:25.328032 APIC: 05: enabled 1
782 07:49:25.331522 APIC: 04: enabled 1
783 07:49:25.331714 APIC: 07: enabled 1
784 07:49:25.334615 DOMAIN: 0000: enabled 1
785 07:49:25.338037 PCI: 00:00.0: enabled 1
786 07:49:25.341142 PCI: 00:02.0: enabled 1
787 07:49:25.341416 PCI: 00:04.0: enabled 0
788 07:49:25.344825 PCI: 00:05.0: enabled 0
789 07:49:25.347645 PCI: 00:12.0: enabled 1
790 07:49:25.351260 PCI: 00:12.5: enabled 0
791 07:49:25.354272 PCI: 00:12.6: enabled 0
792 07:49:25.354544 PCI: 00:14.0: enabled 1
793 07:49:25.358025 USB0 port 0: enabled 1
794 07:49:25.361036 USB2 port 0: enabled 1
795 07:49:25.364075 USB2 port 1: enabled 1
796 07:49:25.367830 USB2 port 2: enabled 0
797 07:49:25.368098 USB2 port 3: enabled 0
798 07:49:25.370830 USB2 port 5: enabled 0
799 07:49:25.374377 USB2 port 6: enabled 1
800 07:49:25.377279 USB2 port 9: enabled 1
801 07:49:25.380834 USB3 port 0: enabled 1
802 07:49:25.383967 USB3 port 1: enabled 1
803 07:49:25.384237 USB3 port 2: enabled 1
804 07:49:25.387544 USB3 port 3: enabled 1
805 07:49:25.390498 USB3 port 4: enabled 0
806 07:49:25.394034 PCI: 00:14.1: enabled 0
807 07:49:25.397154 PCI: 00:14.3: enabled 1
808 07:49:25.397423 PCI: 00:14.5: enabled 0
809 07:49:25.400756 PCI: 00:15.0: enabled 1
810 07:49:25.404072 I2C: 00:15: enabled 1
811 07:49:25.407011 PCI: 00:15.1: enabled 1
812 07:49:25.410108 I2C: 00:5d: enabled 1
813 07:49:25.410375 GENERIC: 0.0: enabled 1
814 07:49:25.413769 PCI: 00:15.2: enabled 0
815 07:49:25.416838 PCI: 00:15.3: enabled 0
816 07:49:25.420579 PCI: 00:16.0: enabled 1
817 07:49:25.423552 PCI: 00:16.1: enabled 0
818 07:49:25.423853 PCI: 00:16.2: enabled 0
819 07:49:25.426616 PCI: 00:16.3: enabled 0
820 07:49:25.430199 PCI: 00:16.4: enabled 0
821 07:49:25.433724 PCI: 00:16.5: enabled 0
822 07:49:25.437012 PCI: 00:17.0: enabled 1
823 07:49:25.437327 PCI: 00:19.0: enabled 1
824 07:49:25.440056 I2C: 00:1a: enabled 1
825 07:49:25.443586 I2C: 00:38: enabled 1
826 07:49:25.446642 I2C: 00:39: enabled 1
827 07:49:25.447096 I2C: 00:3a: enabled 1
828 07:49:25.450074 I2C: 00:3b: enabled 1
829 07:49:25.453520 PCI: 00:19.1: enabled 0
830 07:49:25.456528 PCI: 00:19.2: enabled 0
831 07:49:25.460148 PCI: 00:1a.0: enabled 0
832 07:49:25.460489 PCI: 00:1c.0: enabled 0
833 07:49:25.463164 PCI: 00:1c.1: enabled 0
834 07:49:25.466586 PCI: 00:1c.2: enabled 0
835 07:49:25.469637 PCI: 00:1c.3: enabled 0
836 07:49:25.473162 PCI: 00:1c.4: enabled 0
837 07:49:25.473480 PCI: 00:1c.5: enabled 0
838 07:49:25.476181 PCI: 00:1c.6: enabled 0
839 07:49:25.479803 PCI: 00:1c.7: enabled 0
840 07:49:25.482824 PCI: 00:1d.0: enabled 1
841 07:49:25.486618 PCI: 00:1d.1: enabled 0
842 07:49:25.486893 PCI: 00:1d.2: enabled 0
843 07:49:25.489496 PCI: 00:1d.3: enabled 0
844 07:49:25.493033 PCI: 00:1d.4: enabled 0
845 07:49:25.496540 PCI: 00:1d.5: enabled 1
846 07:49:25.499802 PCI: 00:00.0: enabled 1
847 07:49:25.500056 PCI: 00:1e.0: enabled 1
848 07:49:25.502826 PCI: 00:1e.1: enabled 0
849 07:49:25.506478 PCI: 00:1e.2: enabled 1
850 07:49:25.509583 SPI: 00: enabled 1
851 07:49:25.509909 PCI: 00:1e.3: enabled 1
852 07:49:25.513084 SPI: 01: enabled 1
853 07:49:25.516223 PCI: 00:1f.0: enabled 1
854 07:49:25.519158 PNP: 0c09.0: enabled 1
855 07:49:25.519413 PCI: 00:1f.1: enabled 1
856 07:49:25.522814 PCI: 00:1f.2: enabled 1
857 07:49:25.526341 PCI: 00:1f.3: enabled 1
858 07:49:25.529323 PCI: 00:1f.4: enabled 1
859 07:49:25.532865 PCI: 00:1f.5: enabled 1
860 07:49:25.533137 PCI: 00:1f.6: enabled 0
861 07:49:25.535890 Root Device scanning...
862 07:49:25.539543 scan_static_bus for Root Device
863 07:49:25.542627 CPU_CLUSTER: 0 enabled
864 07:49:25.546368 DOMAIN: 0000 enabled
865 07:49:25.546628 DOMAIN: 0000 scanning...
866 07:49:25.549225 PCI: pci_scan_bus for bus 00
867 07:49:25.552330 PCI: 00:00.0 [8086/0000] ops
868 07:49:25.555812 PCI: 00:00.0 [8086/9b61] enabled
869 07:49:25.559492 PCI: 00:02.0 [8086/0000] bus ops
870 07:49:25.562874 PCI: 00:02.0 [8086/9b41] enabled
871 07:49:25.565906 PCI: 00:04.0 [8086/1903] disabled
872 07:49:25.569627 PCI: 00:08.0 [8086/1911] enabled
873 07:49:25.572461 PCI: 00:12.0 [8086/02f9] enabled
874 07:49:25.575965 PCI: 00:14.0 [8086/0000] bus ops
875 07:49:25.579075 PCI: 00:14.0 [8086/02ed] enabled
876 07:49:25.582653 PCI: 00:14.2 [8086/02ef] enabled
877 07:49:25.586197 PCI: 00:14.3 [8086/02f0] enabled
878 07:49:25.589175 PCI: 00:15.0 [8086/0000] bus ops
879 07:49:25.592787 PCI: 00:15.0 [8086/02e8] enabled
880 07:49:25.595790 PCI: 00:15.1 [8086/0000] bus ops
881 07:49:25.599278 PCI: 00:15.1 [8086/02e9] enabled
882 07:49:25.602181 PCI: 00:16.0 [8086/0000] ops
883 07:49:25.605857 PCI: 00:16.0 [8086/02e0] enabled
884 07:49:25.609085 PCI: 00:17.0 [8086/0000] ops
885 07:49:25.612564 PCI: 00:17.0 [8086/02d3] enabled
886 07:49:25.615465 PCI: 00:19.0 [8086/0000] bus ops
887 07:49:25.619183 PCI: 00:19.0 [8086/02c5] enabled
888 07:49:25.622354 PCI: 00:1d.0 [8086/0000] bus ops
889 07:49:25.626025 PCI: 00:1d.0 [8086/02b0] enabled
890 07:49:25.632699 PCI: Static device PCI: 00:1d.5 not found, disabling it.
891 07:49:25.635663 PCI: 00:1e.0 [8086/0000] ops
892 07:49:25.638777 PCI: 00:1e.0 [8086/02a8] enabled
893 07:49:25.642357 PCI: 00:1e.2 [8086/0000] bus ops
894 07:49:25.645834 PCI: 00:1e.2 [8086/02aa] enabled
895 07:49:25.649462 PCI: 00:1e.3 [8086/0000] bus ops
896 07:49:25.652490 PCI: 00:1e.3 [8086/02ab] enabled
897 07:49:25.655387 PCI: 00:1f.0 [8086/0000] bus ops
898 07:49:25.658599 PCI: 00:1f.0 [8086/0284] enabled
899 07:49:25.662231 PCI: Static device PCI: 00:1f.1 not found, disabling it.
900 07:49:25.669018 PCI: Static device PCI: 00:1f.2 not found, disabling it.
901 07:49:25.672055 PCI: 00:1f.3 [8086/0000] bus ops
902 07:49:25.675155 PCI: 00:1f.3 [8086/02c8] enabled
903 07:49:25.678689 PCI: 00:1f.4 [8086/0000] bus ops
904 07:49:25.682242 PCI: 00:1f.4 [8086/02a3] enabled
905 07:49:25.685278 PCI: 00:1f.5 [8086/0000] bus ops
906 07:49:25.688924 PCI: 00:1f.5 [8086/02a4] enabled
907 07:49:25.692224 PCI: Leftover static devices:
908 07:49:25.692395 PCI: 00:05.0
909 07:49:25.695121 PCI: 00:12.5
910 07:49:25.695258 PCI: 00:12.6
911 07:49:25.698772 PCI: 00:14.1
912 07:49:25.698929 PCI: 00:14.5
913 07:49:25.699050 PCI: 00:15.2
914 07:49:25.701813 PCI: 00:15.3
915 07:49:25.701967 PCI: 00:16.1
916 07:49:25.705459 PCI: 00:16.2
917 07:49:25.705635 PCI: 00:16.3
918 07:49:25.708344 PCI: 00:16.4
919 07:49:25.708520 PCI: 00:16.5
920 07:49:25.708691 PCI: 00:19.1
921 07:49:25.712037 PCI: 00:19.2
922 07:49:25.712311 PCI: 00:1a.0
923 07:49:25.715116 PCI: 00:1c.0
924 07:49:25.715321 PCI: 00:1c.1
925 07:49:25.715481 PCI: 00:1c.2
926 07:49:25.718850 PCI: 00:1c.3
927 07:49:25.719052 PCI: 00:1c.4
928 07:49:25.721785 PCI: 00:1c.5
929 07:49:25.721986 PCI: 00:1c.6
930 07:49:25.722144 PCI: 00:1c.7
931 07:49:25.725386 PCI: 00:1d.1
932 07:49:25.725589 PCI: 00:1d.2
933 07:49:25.728387 PCI: 00:1d.3
934 07:49:25.728592 PCI: 00:1d.4
935 07:49:25.731878 PCI: 00:1d.5
936 07:49:25.731975 PCI: 00:1e.1
937 07:49:25.732051 PCI: 00:1f.1
938 07:49:25.735048 PCI: 00:1f.2
939 07:49:25.735145 PCI: 00:1f.6
940 07:49:25.738621 PCI: Check your devicetree.cb.
941 07:49:25.741688 PCI: 00:02.0 scanning...
942 07:49:25.744684 scan_generic_bus for PCI: 00:02.0
943 07:49:25.748343 scan_generic_bus for PCI: 00:02.0 done
944 07:49:25.754906 scan_bus: scanning of bus PCI: 00:02.0 took 10173 usecs
945 07:49:25.758058 PCI: 00:14.0 scanning...
946 07:49:25.761408 scan_static_bus for PCI: 00:14.0
947 07:49:25.761505 USB0 port 0 enabled
948 07:49:25.765222 USB0 port 0 scanning...
949 07:49:25.768328 scan_static_bus for USB0 port 0
950 07:49:25.771335 USB2 port 0 enabled
951 07:49:25.771432 USB2 port 1 enabled
952 07:49:25.775186 USB2 port 2 disabled
953 07:49:25.778089 USB2 port 3 disabled
954 07:49:25.778186 USB2 port 5 disabled
955 07:49:25.781826 USB2 port 6 enabled
956 07:49:25.784756 USB2 port 9 enabled
957 07:49:25.784853 USB3 port 0 enabled
958 07:49:25.788205 USB3 port 1 enabled
959 07:49:25.788302 USB3 port 2 enabled
960 07:49:25.791283 USB3 port 3 enabled
961 07:49:25.794664 USB3 port 4 disabled
962 07:49:25.794769 USB2 port 0 scanning...
963 07:49:25.798233 scan_static_bus for USB2 port 0
964 07:49:25.804407 scan_static_bus for USB2 port 0 done
965 07:49:25.807966 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
966 07:49:25.810909 USB2 port 1 scanning...
967 07:49:25.814678 scan_static_bus for USB2 port 1
968 07:49:25.817859 scan_static_bus for USB2 port 1 done
969 07:49:25.824502 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
970 07:49:25.824600 USB2 port 6 scanning...
971 07:49:25.828164 scan_static_bus for USB2 port 6
972 07:49:25.834263 scan_static_bus for USB2 port 6 done
973 07:49:25.838334 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
974 07:49:25.841001 USB2 port 9 scanning...
975 07:49:25.844707 scan_static_bus for USB2 port 9
976 07:49:25.847707 scan_static_bus for USB2 port 9 done
977 07:49:25.854305 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
978 07:49:25.854404 USB3 port 0 scanning...
979 07:49:25.857956 scan_static_bus for USB3 port 0
980 07:49:25.864862 scan_static_bus for USB3 port 0 done
981 07:49:25.867970 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
982 07:49:25.870898 USB3 port 1 scanning...
983 07:49:25.874754 scan_static_bus for USB3 port 1
984 07:49:25.877677 scan_static_bus for USB3 port 1 done
985 07:49:25.884415 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
986 07:49:25.884555 USB3 port 2 scanning...
987 07:49:25.888116 scan_static_bus for USB3 port 2
988 07:49:25.894711 scan_static_bus for USB3 port 2 done
989 07:49:25.898234 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
990 07:49:25.901323 USB3 port 3 scanning...
991 07:49:25.904145 scan_static_bus for USB3 port 3
992 07:49:25.908072 scan_static_bus for USB3 port 3 done
993 07:49:25.914681 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
994 07:49:25.917826 scan_static_bus for USB0 port 0 done
995 07:49:25.924038 scan_bus: scanning of bus USB0 port 0 took 155450 usecs
996 07:49:25.927673 scan_static_bus for PCI: 00:14.0 done
997 07:49:25.930655 scan_bus: scanning of bus PCI: 00:14.0 took 173079 usecs
998 07:49:25.934293 PCI: 00:15.0 scanning...
999 07:49:25.937354 scan_generic_bus for PCI: 00:15.0
1000 07:49:25.944187 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1001 07:49:25.947334 scan_generic_bus for PCI: 00:15.0 done
1002 07:49:25.950963 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1003 07:49:25.954059 PCI: 00:15.1 scanning...
1004 07:49:25.957155 scan_generic_bus for PCI: 00:15.1
1005 07:49:25.960721 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1006 07:49:25.964131
1007 07:49:25.967338 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1008 07:49:25.970340 scan_generic_bus for PCI: 00:15.1 done
1009 07:49:25.976792 scan_bus: scanning of bus PCI: 00:15.1 took 18616 usecs
1010 07:49:25.976889 PCI: 00:19.0 scanning...
1011 07:49:25.980500 scan_generic_bus for PCI: 00:19.0
1012 07:49:25.983593
1013 07:49:25.987127 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 07:49:25.990572 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 07:49:25.994107 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 07:49:25.996991 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 07:49:26.003929 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 07:49:26.006925 scan_generic_bus for PCI: 00:19.0 done
1019 07:49:26.010490 scan_bus: scanning of bus PCI: 00:19.0 took 30748 usecs
1020 07:49:26.013500
1021 07:49:26.013597 PCI: 00:1d.0 scanning...
1022 07:49:26.017220 do_pci_scan_bridge for PCI: 00:1d.0
1023 07:49:26.020194 PCI: pci_scan_bus for bus 01
1024 07:49:26.023893 PCI: 01:00.0 [1c5c/1327] enabled
1025 07:49:26.026885 Enabling Common Clock Configuration
1026 07:49:26.030569
1027 07:49:26.033683 L1 Sub-State supported from root port 29
1028 07:49:26.037243 L1 Sub-State Support = 0xf
1029 07:49:26.037340 CommonModeRestoreTime = 0x28
1030 07:49:26.043892 Power On Value = 0x16, Power On Scale = 0x0
1031 07:49:26.043994 ASPM: Enabled L1
1032 07:49:26.050476 scan_bus: scanning of bus PCI: 00:1d.0 took 32792 usecs
1033 07:49:26.053531 PCI: 00:1e.2 scanning...
1034 07:49:26.057088 scan_generic_bus for PCI: 00:1e.2
1035 07:49:26.060139 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1036 07:49:26.063632 scan_generic_bus for PCI: 00:1e.2 done
1037 07:49:26.070240 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1038 07:49:26.073330 PCI: 00:1e.3 scanning...
1039 07:49:26.076909 scan_generic_bus for PCI: 00:1e.3
1040 07:49:26.080028 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1041 07:49:26.083556 scan_generic_bus for PCI: 00:1e.3 done
1042 07:49:26.090088 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1043 07:49:26.093033 PCI: 00:1f.0 scanning...
1044 07:49:26.096708 scan_static_bus for PCI: 00:1f.0
1045 07:49:26.096821 PNP: 0c09.0 enabled
1046 07:49:26.100267 scan_static_bus for PCI: 00:1f.0 done
1047 07:49:26.106232 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1048 07:49:26.110047 PCI: 00:1f.3 scanning...
1049 07:49:26.116632 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1050 07:49:26.116731 PCI: 00:1f.4 scanning...
1051 07:49:26.119958 scan_generic_bus for PCI: 00:1f.4
1052 07:49:26.126619 scan_generic_bus for PCI: 00:1f.4 done
1053 07:49:26.129810 scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
1054 07:49:26.132833 PCI: 00:1f.5 scanning...
1055 07:49:26.136464 scan_generic_bus for PCI: 00:1f.5
1056 07:49:26.139620 scan_generic_bus for PCI: 00:1f.5 done
1057 07:49:26.146350 scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs
1058 07:49:26.152903 scan_bus: scanning of bus DOMAIN: 0000 took 605280 usecs
1059 07:49:26.155917 scan_static_bus for Root Device done
1060 07:49:26.162555 scan_bus: scanning of bus Root Device took 625209 usecs
1061 07:49:26.162661 done
1062 07:49:26.166079 Chrome EC: UHEPI supported
1063 07:49:26.172604 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1064 07:49:26.175602 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1065 07:49:26.182318 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1066 07:49:26.190087 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1067 07:49:26.193104 SPI flash protection: WPSW=0 SRP0=0
1068 07:49:26.199645 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 07:49:26.202990 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1070 07:49:26.206673 found VGA at PCI: 00:02.0
1071 07:49:26.209706 Setting up VGA for PCI: 00:02.0
1072 07:49:26.216419 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 07:49:26.219468 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 07:49:26.223089 Allocating resources...
1075 07:49:26.226153 Reading resources...
1076 07:49:26.229803 Root Device read_resources bus 0 link: 0
1077 07:49:26.232745 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1078 07:49:26.239484 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1079 07:49:26.242525 DOMAIN: 0000 read_resources bus 0 link: 0
1080 07:49:26.250500 PCI: 00:14.0 read_resources bus 0 link: 0
1081 07:49:26.253577 USB0 port 0 read_resources bus 0 link: 0
1082 07:49:26.261871 USB0 port 0 read_resources bus 0 link: 0 done
1083 07:49:26.265058 PCI: 00:14.0 read_resources bus 0 link: 0 done
1084 07:49:26.272757 PCI: 00:15.0 read_resources bus 1 link: 0
1085 07:49:26.275823 PCI: 00:15.0 read_resources bus 1 link: 0 done
1086 07:49:26.282349 PCI: 00:15.1 read_resources bus 2 link: 0
1087 07:49:26.285552 PCI: 00:15.1 read_resources bus 2 link: 0 done
1088 07:49:26.293378 PCI: 00:19.0 read_resources bus 3 link: 0
1089 07:49:26.299958 PCI: 00:19.0 read_resources bus 3 link: 0 done
1090 07:49:26.303437 PCI: 00:1d.0 read_resources bus 1 link: 0
1091 07:49:26.309989 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1092 07:49:26.313038 PCI: 00:1e.2 read_resources bus 4 link: 0
1093 07:49:26.319703 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1094 07:49:26.323345 PCI: 00:1e.3 read_resources bus 5 link: 0
1095 07:49:26.329697 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1096 07:49:26.333194 PCI: 00:1f.0 read_resources bus 0 link: 0
1097 07:49:26.339947 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1098 07:49:26.346627 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 07:49:26.349611 Root Device read_resources bus 0 link: 0 done
1100 07:49:26.353485 Done reading resources.
1101 07:49:26.356415 Show resources in subtree (Root Device)...After reading.
1102 07:49:26.363553 Root Device child on link 0 CPU_CLUSTER: 0
1103 07:49:26.366509 CPU_CLUSTER: 0 child on link 0 APIC: 00
1104 07:49:26.367004 APIC: 00
1105 07:49:26.370063 APIC: 03
1106 07:49:26.370571 APIC: 01
1107 07:49:26.372902 APIC: 06
1108 07:49:26.373349 APIC: 02
1109 07:49:26.373699 APIC: 05
1110 07:49:26.376386 APIC: 04
1111 07:49:26.376830 APIC: 07
1112 07:49:26.379383 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 07:49:26.389699 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 07:49:26.445982 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1115 07:49:26.446580 PCI: 00:00.0
1116 07:49:26.446989 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 07:49:26.447353 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 07:49:26.448054 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 07:49:26.448401 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 07:49:26.450315 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 07:49:26.456502 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 07:49:26.466528 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 07:49:26.476362 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 07:49:26.486280 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 07:49:26.496505 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1126 07:49:26.502884 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1127 07:49:26.512829 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1128 07:49:26.523152 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1129 07:49:26.532928 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1130 07:49:26.542337 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1131 07:49:26.552676 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1132 07:49:26.552774 PCI: 00:02.0
1133 07:49:26.562262 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1134 07:49:26.572464 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1135 07:49:26.582085 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1136 07:49:26.582208 PCI: 00:04.0
1137 07:49:26.585709 PCI: 00:08.0
1138 07:49:26.595315 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 07:49:26.595442 PCI: 00:12.0
1140 07:49:26.605103 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 07:49:26.612190 PCI: 00:14.0 child on link 0 USB0 port 0
1142 07:49:26.621530 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1143 07:49:26.625226 USB0 port 0 child on link 0 USB2 port 0
1144 07:49:26.628203 USB2 port 0
1145 07:49:26.628292 USB2 port 1
1146 07:49:26.632027 USB2 port 2
1147 07:49:26.632115 USB2 port 3
1148 07:49:26.635122 USB2 port 5
1149 07:49:26.635210 USB2 port 6
1150 07:49:26.638254 USB2 port 9
1151 07:49:26.638336 USB3 port 0
1152 07:49:26.641619 USB3 port 1
1153 07:49:26.641711 USB3 port 2
1154 07:49:26.645126 USB3 port 3
1155 07:49:26.645214 USB3 port 4
1156 07:49:26.648214
1157 07:49:26.648312 PCI: 00:14.2
1158 07:49:26.658561 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1159 07:49:26.668161 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1160 07:49:26.668258 PCI: 00:14.3
1161 07:49:26.671775
1162 07:49:26.678400 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 07:49:26.681322
1164 07:49:26.684966 PCI: 00:15.0 child on link 0 I2C: 01:15
1165 07:49:26.694692 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 07:49:26.694795 I2C: 01:15
1167 07:49:26.701507 PCI: 00:15.1 child on link 0 I2C: 02:5d
1168 07:49:26.711107 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:49:26.711214 I2C: 02:5d
1170 07:49:26.714725 GENERIC: 0.0
1171 07:49:26.714830 PCI: 00:16.0
1172 07:49:26.724749 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 07:49:26.727773 PCI: 00:17.0
1174 07:49:26.734521 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1175 07:49:26.744320 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1176 07:49:26.753981 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1177 07:49:26.760644 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1178 07:49:26.770854 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1179 07:49:26.777501 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1180 07:49:26.783953 PCI: 00:19.0 child on link 0 I2C: 03:1a
1181 07:49:26.794175 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 07:49:26.794274 I2C: 03:1a
1183 07:49:26.794351 I2C: 03:38
1184 07:49:26.797257
1185 07:49:26.797354 I2C: 03:39
1186 07:49:26.797431 I2C: 03:3a
1187 07:49:26.800782 I2C: 03:3b
1188 07:49:26.803886 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1189 07:49:26.813961 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1190 07:49:26.823904 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1191 07:49:26.833568 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1192 07:49:26.833668 PCI: 01:00.0
1193 07:49:26.843894 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 07:49:26.846889 PCI: 00:1e.0
1195 07:49:26.856737 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 07:49:26.866925 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1197 07:49:26.870082 PCI: 00:1e.2 child on link 0 SPI: 00
1198 07:49:26.880270 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 07:49:26.883261 SPI: 00
1200 07:49:26.886771 PCI: 00:1e.3 child on link 0 SPI: 01
1201 07:49:26.896636 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 07:49:26.896856 SPI: 01
1203 07:49:26.900256 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1204 07:49:26.910445 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1205 07:49:26.919949 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1206 07:49:26.920366 PNP: 0c09.0
1207 07:49:26.930066 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1208 07:49:26.930512 PCI: 00:1f.3
1209 07:49:26.939866 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 07:49:26.949787 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1211 07:49:26.953384
1212 07:49:26.953843 PCI: 00:1f.4
1213 07:49:26.963031 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1214 07:49:26.972832 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1215 07:49:26.973279 PCI: 00:1f.5
1216 07:49:26.983133 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 07:49:26.989817 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1218 07:49:26.996474 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1219 07:49:27.002640 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1220 07:49:27.006537 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1221 07:49:27.009166 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1222 07:49:27.012643 PCI: 00:17.0 18 * [0x60 - 0x67] io
1223 07:49:27.016234 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1224 07:49:27.022774 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1225 07:49:27.029443 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1226 07:49:27.039122 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1227 07:49:27.046033 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1228 07:49:27.052409 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1229 07:49:27.055520 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1230 07:49:27.066046 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1231 07:49:27.069045 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1232 07:49:27.075549 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1233 07:49:27.079052 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1234 07:49:27.085540 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1235 07:49:27.089067 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1236 07:49:27.095282 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1237 07:49:27.099009 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1238 07:49:27.105419 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1239 07:49:27.108783 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1240 07:49:27.111790 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1241 07:49:27.118373 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1242 07:49:27.121988 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1243 07:49:27.128376 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1244 07:49:27.132066 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1245 07:49:27.138566 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1246 07:49:27.141635 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1247 07:49:27.148484 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1248 07:49:27.151589 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1249 07:49:27.158056 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1250 07:49:27.161751 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1251 07:49:27.168032 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1252 07:49:27.171586 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1253 07:49:27.178371 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1254 07:49:27.184698 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1255 07:49:27.188366 avoid_fixed_resources: DOMAIN: 0000
1256 07:49:27.194497 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1257 07:49:27.201134 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1258 07:49:27.207936 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1259 07:49:27.214932 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1260 07:49:27.217947
1261 07:49:27.224336 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 07:49:27.231358 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 07:49:27.237535 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 07:49:27.247593 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 07:49:27.253803 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 07:49:27.260549 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 07:49:27.270750 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 07:49:27.277441 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 07:49:27.277898 Setting resources...
1270 07:49:27.284025 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 07:49:27.287598 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 07:49:27.290559
1273 07:49:27.294221 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1274 07:49:27.297168 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1275 07:49:27.300709 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1276 07:49:27.307488 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1277 07:49:27.314054 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1278 07:49:27.320371 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1279 07:49:27.327032 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1280 07:49:27.333496 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1281 07:49:27.337190 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1282 07:49:27.343445 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1283 07:49:27.347180 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1284 07:49:27.353777 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1285 07:49:27.356910 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1286 07:49:27.360041 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1287 07:49:27.363880
1288 07:49:27.366825 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1289 07:49:27.369878 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1290 07:49:27.376743 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1291 07:49:27.380456 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1292 07:49:27.386492 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1293 07:49:27.390018 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1294 07:49:27.396644 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1295 07:49:27.399654 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1296 07:49:27.406282 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1297 07:49:27.409820 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1298 07:49:27.416669 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1299 07:49:27.419526 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1300 07:49:27.426120 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1301 07:49:27.429606 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1302 07:49:27.435971 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1303 07:49:27.439766 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1304 07:49:27.446350 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1305 07:49:27.456025 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1306 07:49:27.462608 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1307 07:49:27.469372 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1308 07:49:27.472449 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1309 07:49:27.482046 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1310 07:49:27.485681 Root Device assign_resources, bus 0 link: 0
1311 07:49:27.488639 DOMAIN: 0000 assign_resources, bus 0 link: 0
1312 07:49:27.499404 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1313 07:49:27.506215 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1314 07:49:27.515975 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1315 07:49:27.522616 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1316 07:49:27.532231 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1317 07:49:27.539199 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1318 07:49:27.545694 PCI: 00:14.0 assign_resources, bus 0 link: 0
1319 07:49:27.549233 PCI: 00:14.0 assign_resources, bus 0 link: 0
1320 07:49:27.558849 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1321 07:49:27.566170 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1322 07:49:27.572105 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1323 07:49:27.582492 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1324 07:49:27.585989 PCI: 00:15.0 assign_resources, bus 1 link: 0
1325 07:49:27.592662 PCI: 00:15.0 assign_resources, bus 1 link: 0
1326 07:49:27.599280 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1327 07:49:27.602400 PCI: 00:15.1 assign_resources, bus 2 link: 0
1328 07:49:27.606118
1329 07:49:27.609266 PCI: 00:15.1 assign_resources, bus 2 link: 0
1330 07:49:27.616028 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1331 07:49:27.625872 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1332 07:49:27.632731 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1333 07:49:27.639318 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1334 07:49:27.642870
1335 07:49:27.649412 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1336 07:49:27.656154 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1337 07:49:27.662548 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1338 07:49:27.665638
1339 07:49:27.672364 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1340 07:49:27.675994 PCI: 00:19.0 assign_resources, bus 3 link: 0
1341 07:49:27.682027 PCI: 00:19.0 assign_resources, bus 3 link: 0
1342 07:49:27.688710 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1343 07:49:27.698991 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1344 07:49:27.708785 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1345 07:49:27.712136 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1346 07:49:27.721883 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1347 07:49:27.724944 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 07:49:27.735049 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1349 07:49:27.741469 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1350 07:49:27.745098 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1351 07:49:27.751572 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1352 07:49:27.758129 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1353 07:49:27.764952 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1354 07:49:27.768394 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1355 07:49:27.775044 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1356 07:49:27.778100 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1357 07:49:27.784793 LPC: Trying to open IO window from 800 size 1ff
1358 07:49:27.791524 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1359 07:49:27.801103 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1360 07:49:27.807745 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1361 07:49:27.817238 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1362 07:49:27.821161 DOMAIN: 0000 assign_resources, bus 0 link: 0
1363 07:49:27.824145 Root Device assign_resources, bus 0 link: 0
1364 07:49:27.827730 Done setting resources.
1365 07:49:27.834060 Show resources in subtree (Root Device)...After assigning values.
1366 07:49:27.837516 Root Device child on link 0 CPU_CLUSTER: 0
1367 07:49:27.844100 CPU_CLUSTER: 0 child on link 0 APIC: 00
1368 07:49:27.844646 APIC: 00
1369 07:49:27.846885 APIC: 03
1370 07:49:27.847301 APIC: 01
1371 07:49:27.847671 APIC: 06
1372 07:49:27.850317 APIC: 02
1373 07:49:27.850722 APIC: 05
1374 07:49:27.851111 APIC: 04
1375 07:49:27.853359 APIC: 07
1376 07:49:27.856983 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 07:49:27.866921 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1378 07:49:27.876478 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1379 07:49:27.880072 PCI: 00:00.0
1380 07:49:27.890321 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 07:49:27.899922 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 07:49:27.909832 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 07:49:27.916027 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 07:49:27.926340 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 07:49:27.936075 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 07:49:27.946103 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 07:49:27.955748 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 07:49:27.962410 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 07:49:27.965517
1390 07:49:27.972319 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1391 07:49:27.982229 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1392 07:49:27.991994 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1393 07:49:28.002207 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1394 07:49:28.011967 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1395 07:49:28.021588 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1396 07:49:28.028349 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1397 07:49:28.032130 PCI: 00:02.0
1398 07:49:28.041918 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1399 07:49:28.051671 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1400 07:49:28.061731 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1401 07:49:28.064948 PCI: 00:04.0
1402 07:49:28.065048 PCI: 00:08.0
1403 07:49:28.074611 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1404 07:49:28.077997 PCI: 00:12.0
1405 07:49:28.088167 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1406 07:49:28.091113 PCI: 00:14.0 child on link 0 USB0 port 0
1407 07:49:28.101481 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1408 07:49:28.108041 USB0 port 0 child on link 0 USB2 port 0
1409 07:49:28.108146 USB2 port 0
1410 07:49:28.111478 USB2 port 1
1411 07:49:28.111574 USB2 port 2
1412 07:49:28.114533 USB2 port 3
1413 07:49:28.114630 USB2 port 5
1414 07:49:28.118214 USB2 port 6
1415 07:49:28.118311 USB2 port 9
1416 07:49:28.121178 USB3 port 0
1417 07:49:28.121275 USB3 port 1
1418 07:49:28.124813 USB3 port 2
1419 07:49:28.124911 USB3 port 3
1420 07:49:28.128015 USB3 port 4
1421 07:49:28.128111 PCI: 00:14.2
1422 07:49:28.140943 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1423 07:49:28.151100 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1424 07:49:28.151195 PCI: 00:14.3
1425 07:49:28.161278 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1426 07:49:28.168030 PCI: 00:15.0 child on link 0 I2C: 01:15
1427 07:49:28.177482 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1428 07:49:28.177580 I2C: 01:15
1429 07:49:28.180716 PCI: 00:15.1 child on link 0 I2C: 02:5d
1430 07:49:28.194104 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1431 07:49:28.194202 I2C: 02:5d
1432 07:49:28.197043 GENERIC: 0.0
1433 07:49:28.197133 PCI: 00:16.0
1434 07:49:28.207158 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1435 07:49:28.210173 PCI: 00:17.0
1436 07:49:28.220618 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1437 07:49:28.230265 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1438 07:49:28.240294 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1439 07:49:28.246967 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1440 07:49:28.256847 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1441 07:49:28.266729 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1442 07:49:28.273380 PCI: 00:19.0 child on link 0 I2C: 03:1a
1443 07:49:28.283174 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1444 07:49:28.283624 I2C: 03:1a
1445 07:49:28.286724 I2C: 03:38
1446 07:49:28.287265 I2C: 03:39
1447 07:49:28.289654 I2C: 03:3a
1448 07:49:28.290111 I2C: 03:3b
1449 07:49:28.293484 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1450 07:49:28.303018 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1451 07:49:28.312671 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1452 07:49:28.322941 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1453 07:49:28.325860
1454 07:49:28.326335 PCI: 01:00.0
1455 07:49:28.335672 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 07:49:28.338736 PCI: 00:1e.0
1457 07:49:28.349091 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 07:49:28.358833 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 07:49:28.361840 PCI: 00:1e.2 child on link 0 SPI: 00
1460 07:49:28.375063 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 07:49:28.375530 SPI: 00
1462 07:49:28.378602 PCI: 00:1e.3 child on link 0 SPI: 01
1463 07:49:28.388373 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 07:49:28.391702 SPI: 01
1465 07:49:28.395226 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 07:49:28.404893 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 07:49:28.411592 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 07:49:28.415219 PNP: 0c09.0
1469 07:49:28.421248 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 07:49:28.424994 PCI: 00:1f.3
1471 07:49:28.434429 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 07:49:28.444570 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 07:49:28.448160 PCI: 00:1f.4
1474 07:49:28.457641 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 07:49:28.467942 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 07:49:28.468407 PCI: 00:1f.5
1477 07:49:28.477536 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 07:49:28.481067 Done allocating resources.
1479 07:49:28.487677 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 07:49:28.490621 Enabling resources...
1481 07:49:28.494213 PCI: 00:00.0 subsystem <- 8086/9b61
1482 07:49:28.497096 PCI: 00:00.0 cmd <- 06
1483 07:49:28.500622 PCI: 00:02.0 subsystem <- 8086/9b41
1484 07:49:28.503850 PCI: 00:02.0 cmd <- 03
1485 07:49:28.504298 PCI: 00:08.0 cmd <- 06
1486 07:49:28.510816 PCI: 00:12.0 subsystem <- 8086/02f9
1487 07:49:28.511267 PCI: 00:12.0 cmd <- 02
1488 07:49:28.513782 PCI: 00:14.0 subsystem <- 8086/02ed
1489 07:49:28.517093 PCI: 00:14.0 cmd <- 02
1490 07:49:28.520144 PCI: 00:14.2 cmd <- 02
1491 07:49:28.523857 PCI: 00:14.3 subsystem <- 8086/02f0
1492 07:49:28.526762 PCI: 00:14.3 cmd <- 02
1493 07:49:28.529876 PCI: 00:15.0 subsystem <- 8086/02e8
1494 07:49:28.533522 PCI: 00:15.0 cmd <- 02
1495 07:49:28.536529 PCI: 00:15.1 subsystem <- 8086/02e9
1496 07:49:28.540304 PCI: 00:15.1 cmd <- 02
1497 07:49:28.543156 PCI: 00:16.0 subsystem <- 8086/02e0
1498 07:49:28.547093 PCI: 00:16.0 cmd <- 02
1499 07:49:28.550089 PCI: 00:17.0 subsystem <- 8086/02d3
1500 07:49:28.550537 PCI: 00:17.0 cmd <- 03
1501 07:49:28.557123 PCI: 00:19.0 subsystem <- 8086/02c5
1502 07:49:28.557582 PCI: 00:19.0 cmd <- 02
1503 07:49:28.560135 PCI: 00:1d.0 bridge ctrl <- 0013
1504 07:49:28.563615 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 07:49:28.566783 PCI: 00:1d.0 cmd <- 06
1506 07:49:28.570396 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 07:49:28.573400 PCI: 00:1e.0 cmd <- 06
1508 07:49:28.577081 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 07:49:28.580045 PCI: 00:1e.2 cmd <- 06
1510 07:49:28.583079 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 07:49:28.586695 PCI: 00:1e.3 cmd <- 02
1512 07:49:28.589886 PCI: 00:1f.0 subsystem <- 8086/0284
1513 07:49:28.593338 PCI: 00:1f.0 cmd <- 407
1514 07:49:28.596459 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 07:49:28.599547 PCI: 00:1f.3 cmd <- 02
1516 07:49:28.602687 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 07:49:28.605867 PCI: 00:1f.4 cmd <- 03
1518 07:49:28.609635 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 07:49:28.612385 PCI: 00:1f.5 cmd <- 406
1520 07:49:28.620203 PCI: 01:00.0 cmd <- 02
1521 07:49:28.625609 done.
1522 07:49:28.635946 ME: Version: 14.0.39.1367
1523 07:49:28.642776 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1524 07:49:28.645870 Initializing devices...
1525 07:49:28.646071 Root Device init ...
1526 07:49:28.652759 Chrome EC: Set SMI mask to 0x0000000000000000
1527 07:49:28.655885 Chrome EC: clear events_b mask to 0x0000000000000000
1528 07:49:28.662832 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 07:49:28.668824 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 07:49:28.675637 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 07:49:28.678658 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 07:49:28.682331 Root Device init finished in 35230 usecs
1533 07:49:28.685288
1534 07:49:28.685731 CPU_CLUSTER: 0 init ...
1535 07:49:28.692057 CPU_CLUSTER: 0 init finished in 2447 usecs
1536 07:49:28.696937 PCI: 00:00.0 init ...
1537 07:49:28.699930 CPU TDP: 15 Watts
1538 07:49:28.703584 CPU PL2 = 64 Watts
1539 07:49:28.706701 PCI: 00:00.0 init finished in 7080 usecs
1540 07:49:28.709706 PCI: 00:02.0 init ...
1541 07:49:28.713277 PCI: 00:02.0 init finished in 2245 usecs
1542 07:49:28.716300 PCI: 00:08.0 init ...
1543 07:49:28.720009 PCI: 00:08.0 init finished in 2252 usecs
1544 07:49:28.723095 PCI: 00:12.0 init ...
1545 07:49:28.726539 PCI: 00:12.0 init finished in 2253 usecs
1546 07:49:28.729760 PCI: 00:14.0 init ...
1547 07:49:28.733431 PCI: 00:14.0 init finished in 2244 usecs
1548 07:49:28.736472 PCI: 00:14.2 init ...
1549 07:49:28.740113 PCI: 00:14.2 init finished in 2252 usecs
1550 07:49:28.743147 PCI: 00:14.3 init ...
1551 07:49:28.746213 PCI: 00:14.3 init finished in 2271 usecs
1552 07:49:28.749662 PCI: 00:15.0 init ...
1553 07:49:28.753238 DW I2C bus 0 at 0xd121f000 (400 KHz)
1554 07:49:28.756464 PCI: 00:15.0 init finished in 5977 usecs
1555 07:49:28.759815 PCI: 00:15.1 init ...
1556 07:49:28.763342 DW I2C bus 1 at 0xd1220000 (400 KHz)
1557 07:49:28.769574 PCI: 00:15.1 init finished in 5976 usecs
1558 07:49:28.770131 PCI: 00:16.0 init ...
1559 07:49:28.776068 PCI: 00:16.0 init finished in 2252 usecs
1560 07:49:28.779586 PCI: 00:19.0 init ...
1561 07:49:28.782539 DW I2C bus 4 at 0xd1222000 (400 KHz)
1562 07:49:28.786134 PCI: 00:19.0 init finished in 5975 usecs
1563 07:49:28.789023 PCI: 00:1d.0 init ...
1564 07:49:28.792800 Initializing PCH PCIe bridge.
1565 07:49:28.795804 PCI: 00:1d.0 init finished in 5286 usecs
1566 07:49:28.799261 PCI: 00:1f.0 init ...
1567 07:49:28.802367 IOAPIC: Initializing IOAPIC at 0xfec00000
1568 07:49:28.809460 IOAPIC: Bootstrap Processor Local APIC = 0x00
1569 07:49:28.809967 IOAPIC: ID = 0x02
1570 07:49:28.812554 IOAPIC: Dumping registers
1571 07:49:28.815520 reg 0x0000: 0x02000000
1572 07:49:28.819100 reg 0x0001: 0x00770020
1573 07:49:28.819591 reg 0x0002: 0x00000000
1574 07:49:28.825670 PCI: 00:1f.0 init finished in 23544 usecs
1575 07:49:28.828661 PCI: 00:1f.4 init ...
1576 07:49:28.832454 PCI: 00:1f.4 init finished in 2262 usecs
1577 07:49:28.842866 PCI: 01:00.0 init ...
1578 07:49:28.845932 PCI: 01:00.0 init finished in 2252 usecs
1579 07:49:28.850804 PNP: 0c09.0 init ...
1580 07:49:28.853768 Google Chrome EC uptime: 11.069 seconds
1581 07:49:28.860497 Google Chrome AP resets since EC boot: 0
1582 07:49:28.864229 Google Chrome most recent AP reset causes:
1583 07:49:28.870587 Google Chrome EC reset flags at last EC boot: reset-pin
1584 07:49:28.873469 PNP: 0c09.0 init finished in 20568 usecs
1585 07:49:28.876989 Devices initialized
1586 07:49:28.877486 Show all devs... After init.
1587 07:49:28.880101
1588 07:49:28.880595 Root Device: enabled 1
1589 07:49:28.883737 CPU_CLUSTER: 0: enabled 1
1590 07:49:28.886721 DOMAIN: 0000: enabled 1
1591 07:49:28.887271 APIC: 00: enabled 1
1592 07:49:28.890177 PCI: 00:00.0: enabled 1
1593 07:49:28.893240 PCI: 00:02.0: enabled 1
1594 07:49:28.896650 PCI: 00:04.0: enabled 0
1595 07:49:28.897138 PCI: 00:05.0: enabled 0
1596 07:49:28.899792 PCI: 00:12.0: enabled 1
1597 07:49:28.903502 PCI: 00:12.5: enabled 0
1598 07:49:28.906621 PCI: 00:12.6: enabled 0
1599 07:49:28.907170 PCI: 00:14.0: enabled 1
1600 07:49:28.910121 PCI: 00:14.1: enabled 0
1601 07:49:28.913148 PCI: 00:14.3: enabled 1
1602 07:49:28.913688 PCI: 00:14.5: enabled 0
1603 07:49:28.916730 PCI: 00:15.0: enabled 1
1604 07:49:28.919654 PCI: 00:15.1: enabled 1
1605 07:49:28.923209 PCI: 00:15.2: enabled 0
1606 07:49:28.923732 PCI: 00:15.3: enabled 0
1607 07:49:28.926275 PCI: 00:16.0: enabled 1
1608 07:49:28.929757 PCI: 00:16.1: enabled 0
1609 07:49:28.932812 PCI: 00:16.2: enabled 0
1610 07:49:28.933324 PCI: 00:16.3: enabled 0
1611 07:49:28.936535 PCI: 00:16.4: enabled 0
1612 07:49:28.939366 PCI: 00:16.5: enabled 0
1613 07:49:28.943014 PCI: 00:17.0: enabled 1
1614 07:49:28.943490 PCI: 00:19.0: enabled 1
1615 07:49:28.946204 PCI: 00:19.1: enabled 0
1616 07:49:28.949703 PCI: 00:19.2: enabled 0
1617 07:49:28.950146 PCI: 00:1a.0: enabled 0
1618 07:49:28.953199
1619 07:49:28.953693 PCI: 00:1c.0: enabled 0
1620 07:49:28.956157 PCI: 00:1c.1: enabled 0
1621 07:49:28.959738 PCI: 00:1c.2: enabled 0
1622 07:49:28.960183 PCI: 00:1c.3: enabled 0
1623 07:49:28.962827 PCI: 00:1c.4: enabled 0
1624 07:49:28.966399 PCI: 00:1c.5: enabled 0
1625 07:49:28.969371 PCI: 00:1c.6: enabled 0
1626 07:49:28.969895 PCI: 00:1c.7: enabled 0
1627 07:49:28.972809 PCI: 00:1d.0: enabled 1
1628 07:49:28.975849 PCI: 00:1d.1: enabled 0
1629 07:49:28.979572 PCI: 00:1d.2: enabled 0
1630 07:49:28.980067 PCI: 00:1d.3: enabled 0
1631 07:49:28.982631 PCI: 00:1d.4: enabled 0
1632 07:49:28.986197 PCI: 00:1d.5: enabled 0
1633 07:49:28.989181 PCI: 00:1e.0: enabled 1
1634 07:49:28.989652 PCI: 00:1e.1: enabled 0
1635 07:49:28.992807 PCI: 00:1e.2: enabled 1
1636 07:49:28.995811 PCI: 00:1e.3: enabled 1
1637 07:49:28.996317 PCI: 00:1f.0: enabled 1
1638 07:49:28.999470 PCI: 00:1f.1: enabled 0
1639 07:49:29.002471 PCI: 00:1f.2: enabled 0
1640 07:49:29.006168 PCI: 00:1f.3: enabled 1
1641 07:49:29.006676 PCI: 00:1f.4: enabled 1
1642 07:49:29.009001 PCI: 00:1f.5: enabled 1
1643 07:49:29.012610 PCI: 00:1f.6: enabled 0
1644 07:49:29.015607 USB0 port 0: enabled 1
1645 07:49:29.016101 I2C: 01:15: enabled 1
1646 07:49:29.019240 I2C: 02:5d: enabled 1
1647 07:49:29.022298 GENERIC: 0.0: enabled 1
1648 07:49:29.022907 I2C: 03:1a: enabled 1
1649 07:49:29.025767 I2C: 03:38: enabled 1
1650 07:49:29.028779 I2C: 03:39: enabled 1
1651 07:49:29.029307 I2C: 03:3a: enabled 1
1652 07:49:29.032294 I2C: 03:3b: enabled 1
1653 07:49:29.035423 PCI: 00:00.0: enabled 1
1654 07:49:29.035988 SPI: 00: enabled 1
1655 07:49:29.039100 SPI: 01: enabled 1
1656 07:49:29.042116 PNP: 0c09.0: enabled 1
1657 07:49:29.042612 USB2 port 0: enabled 1
1658 07:49:29.045569 USB2 port 1: enabled 1
1659 07:49:29.049157 USB2 port 2: enabled 0
1660 07:49:29.049597 USB2 port 3: enabled 0
1661 07:49:29.052264
1662 07:49:29.052706 USB2 port 5: enabled 0
1663 07:49:29.055339 USB2 port 6: enabled 1
1664 07:49:29.058801 USB2 port 9: enabled 1
1665 07:49:29.059259 USB3 port 0: enabled 1
1666 07:49:29.061763 USB3 port 1: enabled 1
1667 07:49:29.065457 USB3 port 2: enabled 1
1668 07:49:29.065883 USB3 port 3: enabled 1
1669 07:49:29.068348 USB3 port 4: enabled 0
1670 07:49:29.072150 APIC: 03: enabled 1
1671 07:49:29.072579 APIC: 01: enabled 1
1672 07:49:29.075294 APIC: 06: enabled 1
1673 07:49:29.078727 APIC: 02: enabled 1
1674 07:49:29.079198 APIC: 05: enabled 1
1675 07:49:29.081777 APIC: 04: enabled 1
1676 07:49:29.082208 APIC: 07: enabled 1
1677 07:49:29.085464 PCI: 00:08.0: enabled 1
1678 07:49:29.088444 PCI: 00:14.2: enabled 1
1679 07:49:29.091618 PCI: 01:00.0: enabled 1
1680 07:49:29.095190 Disabling ACPI via APMC:
1681 07:49:29.095636 done.
1682 07:49:29.102471 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1683 07:49:29.105431 ELOG: NV offset 0xaf0000 size 0x4000
1684 07:49:29.112132 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1685 07:49:29.118385 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:27 UTC
1686 07:49:29.125085 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:27 UTC
1687 07:49:29.131612 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:27 UTC
1688 07:49:29.138463 ELOG: Event(9A) added with size 9 at 2022-11-25 07:49:27 UTC
1689 07:49:29.145108 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:27 UTC
1690 07:49:29.151819 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:27 UTC
1691 07:49:29.154990 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1692 07:49:29.162090 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:27 UTC
1693 07:49:29.172463 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1694 07:49:29.178673 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:27 UTC
1695 07:49:29.181752 elog_add_boot_reason: Logged dev mode boot
1696 07:49:29.185332 Finalize devices...
1697 07:49:29.185429 PCI: 00:17.0 final
1698 07:49:29.188425 Devices finalized
1699 07:49:29.192112 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1700 07:49:29.198049 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1701 07:49:29.201661 ME: HFSTS1 : 0x90000245
1702 07:49:29.205043 ME: HFSTS2 : 0x3B850126
1703 07:49:29.211858 ME: HFSTS3 : 0x00000020
1704 07:49:29.214656 ME: HFSTS4 : 0x00004800
1705 07:49:29.218467 ME: HFSTS5 : 0x00000000
1706 07:49:29.221581 ME: HFSTS6 : 0x40400006
1707 07:49:29.224426 ME: Manufacturing Mode : NO
1708 07:49:29.227920 ME: FW Partition Table : OK
1709 07:49:29.231416 ME: Bringup Loader Failure : NO
1710 07:49:29.234512 ME: Firmware Init Complete : YES
1711 07:49:29.237905 ME: Boot Options Present : NO
1712 07:49:29.241013 ME: Update In Progress : NO
1713 07:49:29.244781 ME: D0i3 Support : YES
1714 07:49:29.247691 ME: Low Power State Enabled : NO
1715 07:49:29.251350 ME: CPU Replaced : NO
1716 07:49:29.254434 ME: CPU Replacement Valid : YES
1717 07:49:29.258091 ME: Current Working State : 5
1718 07:49:29.260861 ME: Current Operation State : 1
1719 07:49:29.264496 ME: Current Operation Mode : 0
1720 07:49:29.267568 ME: Error Code : 0
1721 07:49:29.271192 ME: CPU Debug Disabled : YES
1722 07:49:29.274507 ME: TXT Support : NO
1723 07:49:29.280987 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1724 07:49:29.287793 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1725 07:49:29.287945 CBFS @ c08000 size 3f8000
1726 07:49:29.294030 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1727 07:49:29.297489 CBFS: Locating 'fallback/dsdt.aml'
1728 07:49:29.300604 CBFS: Found @ offset 10bb80 size 3fa5
1729 07:49:29.307241 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 07:49:29.310834 CBFS @ c08000 size 3f8000
1731 07:49:29.317098 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 07:49:29.317203 CBFS: Locating 'fallback/slic'
1733 07:49:29.322650 CBFS: 'fallback/slic' not found.
1734 07:49:29.329122 ACPI: Writing ACPI tables at 99b3e000.
1735 07:49:29.329285 ACPI: * FACS
1736 07:49:29.332734 ACPI: * DSDT
1737 07:49:29.335589 Ramoops buffer: 0x100000@0x99a3d000.
1738 07:49:29.339049 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1739 07:49:29.345972 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1740 07:49:29.349019 Google Chrome EC: version:
1741 07:49:29.352634 ro: helios_v2.0.2659-56403530b
1742 07:49:29.355582 rw: helios_v2.0.2849-c41de27e7d
1743 07:49:29.355696 running image: 1
1744 07:49:29.359930 ACPI: * FADT
1745 07:49:29.360085 SCI is IRQ9
1746 07:49:29.363435 ACPI: added table 1/32, length now 40
1747 07:49:29.366960
1748 07:49:29.367135 ACPI: * SSDT
1749 07:49:29.369837 Found 1 CPU(s) with 8 core(s) each.
1750 07:49:29.373442 Error: Could not locate 'wifi_sar' in VPD.
1751 07:49:29.380367 Checking CBFS for default SAR values
1752 07:49:29.383174 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1753 07:49:29.386661 CBFS @ c08000 size 3f8000
1754 07:49:29.393436 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1755 07:49:29.396463 CBFS: Locating 'wifi_sar_defaults.hex'
1756 07:49:29.400103 CBFS: Found @ offset 5fac0 size 77
1757 07:49:29.403292 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1758 07:49:29.406831 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1759 07:49:29.410221
1760 07:49:29.413048 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1761 07:49:29.419935 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1762 07:49:29.422767 failed to find key in VPD: dsm_calib_r0_0
1763 07:49:29.433015 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1764 07:49:29.436654 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1765 07:49:29.439692 failed to find key in VPD: dsm_calib_r0_1
1766 07:49:29.449488 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1767 07:49:29.456241 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1768 07:49:29.459207 failed to find key in VPD: dsm_calib_r0_2
1769 07:49:29.469666 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1770 07:49:29.472678 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1771 07:49:29.479381 failed to find key in VPD: dsm_calib_r0_3
1772 07:49:29.486000 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1773 07:49:29.492514 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1774 07:49:29.496019 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1775 07:49:29.498925 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1776 07:49:29.503189 EC returned error result code 1
1777 07:49:29.506688 EC returned error result code 1
1778 07:49:29.511000 EC returned error result code 1
1779 07:49:29.517710 PS2K: Bad resp from EC. Vivaldi disabled!
1780 07:49:29.520484 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1781 07:49:29.527067 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1782 07:49:29.534226 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1783 07:49:29.537145 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1784 07:49:29.543844 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1785 07:49:29.550619 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1786 07:49:29.556716 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1787 07:49:29.560341 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1788 07:49:29.567187 ACPI: added table 2/32, length now 44
1789 07:49:29.567855 ACPI: * MCFG
1790 07:49:29.570242 ACPI: added table 3/32, length now 48
1791 07:49:29.573200 ACPI: * TPM2
1792 07:49:29.576823 TPM2 log created at 99a2d000
1793 07:49:29.580376 ACPI: added table 4/32, length now 52
1794 07:49:29.580825 ACPI: * MADT
1795 07:49:29.583525 SCI is IRQ9
1796 07:49:29.586466 ACPI: added table 5/32, length now 56
1797 07:49:29.586978 current = 99b43ac0
1798 07:49:29.590096 ACPI: * DMAR
1799 07:49:29.593094 ACPI: added table 6/32, length now 60
1800 07:49:29.596744 ACPI: * IGD OpRegion
1801 07:49:29.597191 GMA: Found VBT in CBFS
1802 07:49:29.599734 GMA: Found valid VBT in CBFS
1803 07:49:29.602912 ACPI: added table 7/32, length now 64
1804 07:49:29.606537 ACPI: * HPET
1805 07:49:29.609614 ACPI: added table 8/32, length now 68
1806 07:49:29.610063 ACPI: done.
1807 07:49:29.613335 ACPI tables: 31744 bytes.
1808 07:49:29.616715 smbios_write_tables: 99a2c000
1809 07:49:29.620357 EC returned error result code 3
1810 07:49:29.623319 Couldn't obtain OEM name from CBI
1811 07:49:29.626390 Create SMBIOS type 17
1812 07:49:29.630252 PCI: 00:00.0 (Intel Cannonlake)
1813 07:49:29.633299 PCI: 00:14.3 (Intel WiFi)
1814 07:49:29.636953 SMBIOS tables: 939 bytes.
1815 07:49:29.639859 Writing table forward entry at 0x00000500
1816 07:49:29.646250 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1817 07:49:29.649875 Writing coreboot table at 0x99b62000
1818 07:49:29.656661 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1819 07:49:29.659721 1. 0000000000001000-000000000009ffff: RAM
1820 07:49:29.663224 2. 00000000000a0000-00000000000fffff: RESERVED
1821 07:49:29.669930 3. 0000000000100000-0000000099a2bfff: RAM
1822 07:49:29.672941 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1823 07:49:29.676530
1824 07:49:29.679497 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 07:49:29.686448 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 07:49:29.689254 7. 000000009a000000-000000009f7fffff: RESERVED
1827 07:49:29.696451 8. 00000000e0000000-00000000efffffff: RESERVED
1828 07:49:29.699437 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 07:49:29.702525 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 07:49:29.706200
1831 07:49:29.709243 11. 00000000fed10000-00000000fed17fff: RESERVED
1832 07:49:29.712907 12. 00000000fed80000-00000000fed83fff: RESERVED
1833 07:49:29.719541 13. 00000000fed90000-00000000fed91fff: RESERVED
1834 07:49:29.722415 14. 00000000feda0000-00000000feda1fff: RESERVED
1835 07:49:29.729007 15. 0000000100000000-000000045e7fffff: RAM
1836 07:49:29.732730 Graphics framebuffer located at 0xc0000000
1837 07:49:29.735685 Passing 5 GPIOs to payload:
1838 07:49:29.739343 NAME | PORT | POLARITY | VALUE
1839 07:49:29.745523 write protect | undefined | high | low
1840 07:49:29.749077 lid | undefined | high | high
1841 07:49:29.752090
1842 07:49:29.755901 power | undefined | high | low
1843 07:49:29.762566 oprom | undefined | high | low
1844 07:49:29.765885 EC in RW | 0x000000cb | high | low
1845 07:49:29.768671 Board ID: 4
1846 07:49:29.772313 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1847 07:49:29.775248 CBFS @ c08000 size 3f8000
1848 07:49:29.782049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1849 07:49:29.788607 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1850 07:49:29.789059 coreboot table: 1492 bytes.
1851 07:49:29.792214 IMD ROOT 0. 99fff000 00001000
1852 07:49:29.795052 IMD SMALL 1. 99ffe000 00001000
1853 07:49:29.798736 FSP MEMORY 2. 99c4e000 003b0000
1854 07:49:29.801780
1855 07:49:29.802229 CONSOLE 3. 99c2e000 00020000
1856 07:49:29.804906
1857 07:49:29.805349 FMAP 4. 99c2d000 0000054e
1858 07:49:29.808608
1859 07:49:29.809090 TIME STAMP 5. 99c2c000 00000910
1860 07:49:29.811516
1861 07:49:29.811959 VBOOT WORK 6. 99c18000 00014000
1862 07:49:29.815107
1863 07:49:29.815587 MRC DATA 7. 99c16000 00001958
1864 07:49:29.818600
1865 07:49:29.819088 ROMSTG STCK 8. 99c15000 00001000
1866 07:49:29.821585
1867 07:49:29.822035 AFTER CAR 9. 99c0b000 0000a000
1868 07:49:29.824966
1869 07:49:29.825472 RAMSTAGE 10. 99baf000 0005c000
1870 07:49:29.828602
1871 07:49:29.829131 REFCODE 11. 99b7a000 00035000
1872 07:49:29.831746
1873 07:49:29.832225 SMM BACKUP 12. 99b6a000 00010000
1874 07:49:29.835169
1875 07:49:29.838339 COREBOOT 13. 99b62000 00008000
1876 07:49:29.841412 ACPI 14. 99b3e000 00024000
1877 07:49:29.845024 ACPI GNVS 15. 99b3d000 00001000
1878 07:49:29.848076 RAMOOPS 16. 99a3d000 00100000
1879 07:49:29.851790 TPM2 TCGLOG17. 99a2d000 00010000
1880 07:49:29.854812 SMBIOS 18. 99a2c000 00000800
1881 07:49:29.855324 IMD small region:
1882 07:49:29.857911 IMD ROOT 0. 99ffec00 00000400
1883 07:49:29.861643 FSP RUNTIME 1. 99ffebe0 00000004
1884 07:49:29.864562 EC HOSTEVENT 2. 99ffebc0 00000008
1885 07:49:29.868220 POWER STATE 3. 99ffeb80 00000040
1886 07:49:29.871100 ROMSTAGE 4. 99ffeb60 00000004
1887 07:49:29.878396 MEM INFO 5. 99ffe9a0 000001b9
1888 07:49:29.881246 VPD 6. 99ffe920 0000006c
1889 07:49:29.881706 MTRR: Physical address space:
1890 07:49:29.884840
1891 07:49:29.887965 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1892 07:49:29.894476 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1893 07:49:29.901131 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1894 07:49:29.907994 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1895 07:49:29.914439 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1896 07:49:29.921076 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1897 07:49:29.927652 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1898 07:49:29.930616 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 07:49:29.934121 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 07:49:29.937276 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 07:49:29.943975 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 07:49:29.947703 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 07:49:29.950540 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 07:49:29.954259 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 07:49:29.960574 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 07:49:29.964087 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 07:49:29.967274 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 07:49:29.970272 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 07:49:29.973966 call enable_fixed_mtrr()
1910 07:49:29.977527 CPU physical address size: 39 bits
1911 07:49:29.984223 MTRR: default type WB/UC MTRR counts: 6/8.
1912 07:49:29.987207 MTRR: WB selected as default type.
1913 07:49:29.993787 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1914 07:49:29.997426 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1915 07:49:30.004035 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1916 07:49:30.010677 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1917 07:49:30.017223 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1918 07:49:30.023849 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1919 07:49:30.027030 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 07:49:30.030443
1921 07:49:30.033957 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 07:49:30.036921 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 07:49:30.040380 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 07:49:30.043484 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 07:49:30.050303 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 07:49:30.053373 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 07:49:30.056960 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 07:49:30.060117 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 07:49:30.066910 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 07:49:30.069876 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 07:49:30.070486
1932 07:49:30.070909 MTRR check
1933 07:49:30.073508 Fixed MTRRs : Enabled
1934 07:49:30.076514 Variable MTRRs: Enabled
1935 07:49:30.077051
1936 07:49:30.080174 call enable_fixed_mtrr()
1937 07:49:30.083180 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1938 07:49:30.086827 CPU physical address size: 39 bits
1939 07:49:30.093456 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1940 07:49:30.096367 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 07:49:30.099963 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 07:49:30.106560 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 07:49:30.109498 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 07:49:30.113060 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 07:49:30.116123 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 07:49:30.122780 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 07:49:30.125772 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 07:49:30.129586 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 07:49:30.132490 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 07:49:30.139367 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 07:49:30.142571 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 07:49:30.145771 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 07:49:30.149378 call enable_fixed_mtrr()
1954 07:49:30.152339 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 07:49:30.155380 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 07:49:30.162134 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 07:49:30.165225 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 07:49:30.168988 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 07:49:30.172137 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 07:49:30.178451 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 07:49:30.182086 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 07:49:30.185232 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 07:49:30.188907 CPU physical address size: 39 bits
1964 07:49:30.191983 call enable_fixed_mtrr()
1965 07:49:30.195464 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 07:49:30.201896 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 07:49:30.205734 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 07:49:30.208734 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 07:49:30.212103 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 07:49:30.215289 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 07:49:30.222109 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 07:49:30.225199 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 07:49:30.228712 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 07:49:30.231654 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 07:49:30.238589 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 07:49:30.242157 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 07:49:30.245208 call enable_fixed_mtrr()
1978 07:49:30.248838 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 07:49:30.251841 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 07:49:30.255517 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 07:49:30.262080 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 07:49:30.265356 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 07:49:30.268277 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 07:49:30.271854 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 07:49:30.278404 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 07:49:30.281632 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 07:49:30.284573 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 07:49:30.288329 CPU physical address size: 39 bits
1989 07:49:30.292041 call enable_fixed_mtrr()
1990 07:49:30.294987 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 07:49:30.301610 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 07:49:30.304804 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 07:49:30.308356 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 07:49:30.311493 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 07:49:30.315017 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 07:49:30.321196 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 07:49:30.325231 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 07:49:30.328275 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 07:49:30.331300 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 07:49:30.338169 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 07:49:30.341132 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 07:49:30.345072 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 07:49:30.348092 call enable_fixed_mtrr()
2004 07:49:30.351084 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 07:49:30.354195 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 07:49:30.361355 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 07:49:30.364341 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 07:49:30.367665 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 07:49:30.371224 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 07:49:30.378169 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 07:49:30.381180 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 07:49:30.384273 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 07:49:30.387213 CPU physical address size: 39 bits
2014 07:49:30.391054 call enable_fixed_mtrr()
2015 07:49:30.394559 CBFS @ c08000 size 3f8000
2016 07:49:30.400693 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2017 07:49:30.404213 CPU physical address size: 39 bits
2018 07:49:30.407796 CPU physical address size: 39 bits
2019 07:49:30.410798 CBFS: Locating 'fallback/payload'
2020 07:49:30.414586 CPU physical address size: 39 bits
2021 07:49:30.417567 CBFS: Found @ offset 1c96c0 size 3f798
2022 07:49:30.420702 Checking segment from ROM address 0xffdd16f8
2023 07:49:30.427564 Checking segment from ROM address 0xffdd1714
2024 07:49:30.431237 Loading segment from ROM address 0xffdd16f8
2025 07:49:30.434148 code (compression=0)
2026 07:49:30.440683 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2027 07:49:30.450905 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2028 07:49:30.453814 it's not compressed!
2029 07:49:30.544247 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2030 07:49:30.550717 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2031 07:49:30.554556 Loading segment from ROM address 0xffdd1714
2032 07:49:30.557415 Entry Point 0x30000000
2033 07:49:30.560986 Loaded segments
2034 07:49:30.566338 Finalizing chipset.
2035 07:49:30.569965 Finalizing SMM.
2036 07:49:30.573094 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2037 07:49:30.576153 mp_park_aps done after 0 msecs.
2038 07:49:30.583009 Jumping to boot code at 30000000(99b62000)
2039 07:49:30.589407 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2040 07:49:30.589513
2041 07:49:30.589590
2042 07:49:30.589662
2043 07:49:30.592500 Starting depthcharge on Helios...
2044 07:49:30.592598
2045 07:49:30.592954 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2046 07:49:30.593072 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2047 07:49:30.593171 Setting prompt string to ['hatch:']
2048 07:49:30.593261 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2049 07:49:30.602630 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2050 07:49:30.602733
2051 07:49:30.609048 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2052 07:49:30.609148
2053 07:49:30.615809 board_setup: Info: eMMC controller not present; skipping
2054 07:49:30.615941
2055 07:49:30.618666 New NVMe Controller 0x30053ac0 @ 00:1d:00
2056 07:49:30.618772
2057 07:49:30.625540 board_setup: Info: SDHCI controller not present; skipping
2058 07:49:30.625638
2059 07:49:30.632317 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2060 07:49:30.632467
2061 07:49:30.632544 Wipe memory regions:
2062 07:49:30.632615
2063 07:49:30.635256 [0x00000000001000, 0x000000000a0000)
2064 07:49:30.635355
2065 07:49:30.641973 [0x00000000100000, 0x00000030000000)
2066 07:49:30.642083
2067 07:49:30.708720 [0x00000030657430, 0x00000099a2c000)
2068 07:49:30.709306
2069 07:49:30.858774 [0x00000100000000, 0x0000045e800000)
2070 07:49:30.858988
2071 07:49:32.315184 R8152: Initializing
2072 07:49:32.315707
2073 07:49:32.318284 Version 9 (ocp_data = 6010)
2074 07:49:32.318725
2075 07:49:32.322465 R8152: Done initializing
2076 07:49:32.322944
2077 07:49:32.326163 Adding net device
2078 07:49:32.326625
2079 07:49:32.808214 R8152: Initializing
2080 07:49:32.808364
2081 07:49:32.811790 Version 6 (ocp_data = 5c30)
2082 07:49:32.811895
2083 07:49:32.814891 R8152: Done initializing
2084 07:49:32.815010
2085 07:49:32.818025 net_add_device: Attemp to include the same device
2086 07:49:32.821537
2087 07:49:32.828755 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2088 07:49:32.828848
2089 07:49:32.828924
2090 07:49:32.829002
2091 07:49:32.829284 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2093 07:49:32.930004 hatch: tftpboot 192.168.201.1 8119353/tftp-deploy-fjoh7qa4/kernel/bzImage 8119353/tftp-deploy-fjoh7qa4/kernel/cmdline 8119353/tftp-deploy-fjoh7qa4/ramdisk/ramdisk.cpio.gz
2094 07:49:32.930161 Setting prompt string to 'Starting kernel'
2095 07:49:32.930250 Setting prompt string to ['Starting kernel']
2096 07:49:32.930326 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2097 07:49:32.930415 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2098 07:49:32.934316 tftpboot 192.168.201.1 8119353/tftp-deploy-fjoh7qa4/kernel/bzImoy-fjoh7qa4/kernel/cmdline 8119353/tftp-deploy-fjoh7qa4/ramdisk/ramdisk.cpio.gz
2099 07:49:32.934416
2100 07:49:32.934491 Waiting for link
2101 07:49:32.934559
2102 07:49:33.135220 done.
2103 07:49:33.135386
2104 07:49:33.135481 MAC: 00:24:32:50:1a:59
2105 07:49:33.135556
2106 07:49:33.138350 Sending DHCP discover... done.
2107 07:49:33.138447
2108 07:49:33.141929 Waiting for reply... done.
2109 07:49:33.142033
2110 07:49:33.145020 Sending DHCP request... done.
2111 07:49:33.145117
2112 07:49:33.148584 Waiting for reply... done.
2113 07:49:33.148682
2114 07:49:33.151590 My ip is 192.168.201.14
2115 07:49:33.151698
2116 07:49:33.155192 The DHCP server ip is 192.168.201.1
2117 07:49:33.155289
2118 07:49:33.158197 TFTP server IP predefined by user: 192.168.201.1
2119 07:49:33.158292
2120 07:49:33.165007 Bootfile predefined by user: 8119353/tftp-deploy-fjoh7qa4/kernel/bzImage
2121 07:49:33.165108
2122 07:49:33.168125 Sending tftp read request... done.
2123 07:49:33.168223
2124 07:49:33.171674 Waiting for the transfer...
2125 07:49:33.174740
2126 07:49:33.689210 00000000 ################################################################
2127 07:49:33.689370
2128 07:49:34.202300 00080000 ################################################################
2129 07:49:34.202463
2130 07:49:34.715553 00100000 ################################################################
2131 07:49:34.715718
2132 07:49:35.230267 00180000 ################################################################
2133 07:49:35.230417
2134 07:49:35.743736 00200000 ################################################################
2135 07:49:35.743891
2136 07:49:36.263770 00280000 ################################################################
2137 07:49:36.263931
2138 07:49:36.783338 00300000 ################################################################
2139 07:49:36.783502
2140 07:49:37.291367 00380000 ################################################################
2141 07:49:37.291525
2142 07:49:37.808212 00400000 ################################################################
2143 07:49:37.808364
2144 07:49:38.323243 00480000 ################################################################
2145 07:49:38.323410
2146 07:49:38.854972 00500000 ################################################################
2147 07:49:38.855131
2148 07:49:39.383583 00580000 ################################################################
2149 07:49:39.383739
2150 07:49:39.921528 00600000 ################################################################
2151 07:49:39.921679
2152 07:49:40.231172 00680000 ####################################### done.
2153 07:49:40.231343
2154 07:49:40.234799 The bootfile was 7131024 bytes long.
2155 07:49:40.234890
2156 07:49:40.237737 Sending tftp read request... done.
2157 07:49:40.237834
2158 07:49:40.241303 Waiting for the transfer...
2159 07:49:40.241394
2160 07:49:40.759323 00000000 ################################################################
2161 07:49:40.759479
2162 07:49:41.276548 00080000 ################################################################
2163 07:49:41.276732
2164 07:49:41.788491 00100000 ################################################################
2165 07:49:41.788654
2166 07:49:42.304406 00180000 ################################################################
2167 07:49:42.304563
2168 07:49:42.815679 00200000 ################################################################
2169 07:49:42.815848
2170 07:49:43.333835 00280000 ################################################################
2171 07:49:43.334007
2172 07:49:43.847227 00300000 ################################################################
2173 07:49:43.847397
2174 07:49:44.362723 00380000 ################################################################
2175 07:49:44.362901
2176 07:49:44.898176 00400000 ################################################################
2177 07:49:44.898340
2178 07:49:45.426689 00480000 ################################################################
2179 07:49:45.426860
2180 07:49:45.681078 00500000 ################################ done.
2181 07:49:45.681255
2182 07:49:45.684635 Sending tftp read request... done.
2183 07:49:45.684730
2184 07:49:45.687667 Waiting for the transfer...
2185 07:49:45.687759
2186 07:49:45.687846 00000000 # done.
2187 07:49:45.691199
2188 07:49:45.697651 Command line loaded dynamically from TFTP file: 8119353/tftp-deploy-fjoh7qa4/kernel/cmdline
2189 07:49:45.697743
2190 07:49:45.724425 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119353/extract-nfsrootfs-eu5p8sx9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2191 07:49:45.724543
2192 07:49:45.730734 ec_init(0): CrosEC protocol v3 supported (256, 256)
2193 07:49:45.730839
2194 07:49:45.738005 Shutting down all USB controllers.
2195 07:49:45.738096
2196 07:49:45.738189 Removing current net device
2197 07:49:45.738264
2198 07:49:45.741680 Finalizing coreboot
2199 07:49:45.741770
2200 07:49:45.748547 Exiting depthcharge with code 4 at timestamp: 22464564
2201 07:49:45.748642
2202 07:49:45.748728
2203 07:49:45.748801 Starting kernel ...
2204 07:49:45.748883
2205 07:49:45.748954
2206 07:49:45.749354 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2207 07:49:45.749479 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2208 07:49:45.749584 Setting prompt string to ['Linux version [0-9]']
2209 07:49:45.749667 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2210 07:49:45.749759 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2211 07:49:45.751511
2212 07:49:45.751600
2214 07:54:11.749736 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2216 07:54:11.749982 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2218 07:54:11.750162 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2221 07:54:11.750475 end: 2 depthcharge-action (duration 00:05:00) [common]
2223 07:54:11.750742 Cleaning after the job
2224 07:54:11.750851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/ramdisk
2225 07:54:11.751352 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/kernel
2226 07:54:11.751922 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/nfsrootfs
2227 07:54:11.804680 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119353/tftp-deploy-fjoh7qa4/modules
2228 07:54:11.805013 start: 4.1 power-off (timeout 00:00:30) [common]
2229 07:54:11.805200 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2230 07:54:11.826889 >> Command sent successfully.
2231 07:54:11.829028 Returned 0 in 0 seconds
2232 07:54:11.929934 end: 4.1 power-off (duration 00:00:00) [common]
2234 07:54:11.930399 start: 4.2 read-feedback (timeout 00:10:00) [common]
2235 07:54:11.930731 Listened to connection for namespace 'common' for up to 1s
2236 07:54:12.309607 Listened to connection for namespace 'common' for up to 1s
2237 07:54:12.312947 Listened to connection for namespace 'common' for up to 1s
2238 07:54:12.316360 Listened to connection for namespace 'common' for up to 1s
2239 07:54:12.320029 Listened to connection for namespace 'common' for up to 1s
2240 07:54:12.323423 Listened to connection for namespace 'common' for up to 1s
2241 07:54:12.326379 Listened to connection for namespace 'common' for up to 1s
2242 07:54:12.329920 Listened to connection for namespace 'common' for up to 1s
2243 07:54:12.332922 Listened to connection for namespace 'common' for up to 1s
2244 07:54:12.336482 Listened to connection for namespace 'common' for up to 1s
2245 07:54:12.339899 Listened to connection for namespace 'common' for up to 1s
2246 07:54:12.342957 Listened to connection for namespace 'common' for up to 1s
2247 07:54:12.346281 Listened to connection for namespace 'common' for up to 1s
2248 07:54:12.349997 Listened to connection for namespace 'common' for up to 1s
2249 07:54:12.356342 Listened to connection for namespace 'common' for up to 1s
2250 07:54:12.359273 Listened to connection for namespace 'common' for up to 1s
2251 07:54:12.930966 Finalising connection for namespace 'common'
2252 07:54:12.931644 Disconnecting from shell: Finalise
2253 07:54:12.932161
2254 07:54:13.033569 end: 4.2 read-feedback (duration 00:00:01) [common]
2255 07:54:13.034137 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119353
2256 07:54:13.231140 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119353
2257 07:54:13.231366 JobError: Your job cannot terminate cleanly.