Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:49:05.665101 lava-dispatcher, installed at version: 2022.10
2 07:49:05.665296 start: 0 validate
3 07:49:05.665465 Start time: 2022-11-25 07:49:05.665456+00:00 (UTC)
4 07:49:05.665597 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:49:05.665727 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:49:05.967938 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:49:05.968116 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:49:05.969757 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:49:05.969868 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:49:05.980222 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:49:05.980335 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:49:05.983161 validate duration: 0.32
14 07:49:05.983408 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:49:05.983509 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:49:05.983599 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:49:05.983700 Not decompressing ramdisk as can be used compressed.
18 07:49:05.983781 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/initrd.cpio.gz
19 07:49:05.983845 saving as /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/ramdisk/initrd.cpio.gz
20 07:49:05.983905 total size: 5431622 (5MB)
21 07:49:06.011819 progress 0% (0MB)
22 07:49:06.039948 progress 5% (0MB)
23 07:49:06.056383 progress 10% (0MB)
24 07:49:06.090320 progress 15% (0MB)
25 07:49:06.122485 progress 20% (1MB)
26 07:49:06.149448 progress 25% (1MB)
27 07:49:06.175801 progress 30% (1MB)
28 07:49:06.203065 progress 35% (1MB)
29 07:49:06.234985 progress 40% (2MB)
30 07:49:06.255624 progress 45% (2MB)
31 07:49:06.282574 progress 50% (2MB)
32 07:49:06.309590 progress 55% (2MB)
33 07:49:06.344327 progress 60% (3MB)
34 07:49:06.364559 progress 65% (3MB)
35 07:49:06.398744 progress 70% (3MB)
36 07:49:06.425441 progress 75% (3MB)
37 07:49:06.452441 progress 80% (4MB)
38 07:49:06.480512 progress 85% (4MB)
39 07:49:06.514688 progress 90% (4MB)
40 07:49:06.545922 progress 95% (4MB)
41 07:49:06.572977 progress 100% (5MB)
42 07:49:06.573304 5MB downloaded in 0.59s (8.79MB/s)
43 07:49:06.573475 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:49:06.573728 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:49:06.573818 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:49:06.573906 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:49:06.574010 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:49:06.574077 saving as /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/kernel/bzImage
50 07:49:06.574138 total size: 7131024 (6MB)
51 07:49:06.574197 No compression specified
52 07:49:06.630691 progress 0% (0MB)
53 07:49:06.761300 progress 5% (0MB)
54 07:49:06.879780 progress 10% (0MB)
55 07:49:07.005710 progress 15% (1MB)
56 07:49:07.134319 progress 20% (1MB)
57 07:49:07.234264 progress 25% (1MB)
58 07:49:07.372906 progress 30% (2MB)
59 07:49:07.478412 progress 35% (2MB)
60 07:49:07.546512 progress 40% (2MB)
61 07:49:07.605096 progress 45% (3MB)
62 07:49:07.682290 progress 50% (3MB)
63 07:49:07.745024 progress 55% (3MB)
64 07:49:07.871420 progress 60% (4MB)
65 07:49:07.979853 progress 65% (4MB)
66 07:49:08.100613 progress 70% (4MB)
67 07:49:08.224466 progress 75% (5MB)
68 07:49:08.327045 progress 80% (5MB)
69 07:49:08.429074 progress 85% (5MB)
70 07:49:08.544466 progress 90% (6MB)
71 07:49:08.636994 progress 95% (6MB)
72 07:49:08.757490 progress 100% (6MB)
73 07:49:08.757984 6MB downloaded in 2.18s (3.11MB/s)
74 07:49:08.758214 end: 1.2.1 http-download (duration 00:00:02) [common]
76 07:49:08.758591 end: 1.2 download-retry (duration 00:00:02) [common]
77 07:49:08.758724 start: 1.3 download-retry (timeout 00:09:57) [common]
78 07:49:08.758885 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 07:49:08.759064 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/full.rootfs.tar.xz
80 07:49:08.759186 saving as /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/nfsrootfs/full.rootfs.tar
81 07:49:08.759295 total size: 123211568 (117MB)
82 07:49:08.759397 Using unxz to decompress xz
83 07:49:09.081505 progress 0% (0MB)
84 07:49:09.770762 progress 5% (5MB)
85 07:49:10.404246 progress 10% (11MB)
86 07:49:11.208663 progress 15% (17MB)
87 07:49:12.116055 progress 20% (23MB)
88 07:49:12.839046 progress 25% (29MB)
89 07:49:13.669482 progress 30% (35MB)
90 07:49:14.281273 progress 35% (41MB)
91 07:49:14.760559 progress 40% (47MB)
92 07:49:15.193112 progress 45% (52MB)
93 07:49:15.660919 progress 50% (58MB)
94 07:49:16.128124 progress 55% (64MB)
95 07:49:16.592254 progress 60% (70MB)
96 07:49:17.052780 progress 65% (76MB)
97 07:49:17.550380 progress 70% (82MB)
98 07:49:17.975814 progress 75% (88MB)
99 07:49:18.411525 progress 80% (94MB)
100 07:49:18.528947 progress 85% (99MB)
101 07:49:18.699221 progress 90% (105MB)
102 07:49:19.047324 progress 95% (111MB)
103 07:49:19.424701 progress 100% (117MB)
104 07:49:19.429778 117MB downloaded in 10.67s (11.01MB/s)
105 07:49:19.430048 end: 1.3.1 http-download (duration 00:00:11) [common]
107 07:49:19.430333 end: 1.3 download-retry (duration 00:00:11) [common]
108 07:49:19.430430 start: 1.4 download-retry (timeout 00:09:47) [common]
109 07:49:19.430527 start: 1.4.1 http-download (timeout 00:09:47) [common]
110 07:49:19.430677 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:49:19.430751 saving as /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/modules/modules.tar
112 07:49:19.430815 total size: 52060 (0MB)
113 07:49:19.430879 Using unxz to decompress xz
114 07:49:19.724576 progress 62% (0MB)
115 07:49:19.726244 progress 100% (0MB)
116 07:49:19.739843 0MB downloaded in 0.31s (0.16MB/s)
117 07:49:19.740838 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:49:19.742143 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:49:19.742619 start: 1.5 prepare-tftp-overlay (timeout 00:09:46) [common]
121 07:49:19.743050 start: 1.5.1 extract-nfsrootfs (timeout 00:09:46) [common]
122 07:49:21.436067 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119391/extract-nfsrootfs-0ddla_v8
123 07:49:21.436269 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:49:21.436376 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
125 07:49:21.436514 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l
126 07:49:21.436616 makedir: /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin
127 07:49:21.436702 makedir: /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/tests
128 07:49:21.436786 makedir: /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/results
129 07:49:21.436887 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-add-keys
130 07:49:21.437014 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-add-sources
131 07:49:21.437128 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-background-process-start
132 07:49:21.437241 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-background-process-stop
133 07:49:21.437487 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-common-functions
134 07:49:21.437601 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-echo-ipv4
135 07:49:21.437712 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-install-packages
136 07:49:21.437823 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-installed-packages
137 07:49:21.437932 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-os-build
138 07:49:21.438041 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-probe-channel
139 07:49:21.438150 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-probe-ip
140 07:49:21.438258 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-target-ip
141 07:49:21.438366 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-target-mac
142 07:49:21.438474 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-target-storage
143 07:49:21.438583 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-case
144 07:49:21.438694 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-event
145 07:49:21.438801 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-feedback
146 07:49:21.438909 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-raise
147 07:49:21.439018 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-reference
148 07:49:21.439127 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-runner
149 07:49:21.439234 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-set
150 07:49:21.439341 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-test-shell
151 07:49:21.439453 Updating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-install-packages (oe)
152 07:49:21.439566 Updating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/bin/lava-installed-packages (oe)
153 07:49:21.439663 Creating /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/environment
154 07:49:21.439746 LAVA metadata
155 07:49:21.439812 - LAVA_JOB_ID=8119391
156 07:49:21.439876 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:49:21.439974 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:45) [common]
158 07:49:21.440039 skipped lava-vland-overlay
159 07:49:21.440115 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:49:21.440196 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
161 07:49:21.440258 skipped lava-multinode-overlay
162 07:49:21.440332 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:49:21.440412 start: 1.5.2.3 test-definition (timeout 00:09:45) [common]
164 07:49:21.440483 Loading test definitions
165 07:49:21.440576 start: 1.5.2.3.1 git-repo-action (timeout 00:09:45) [common]
166 07:49:21.440656 Using /lava-8119391 at stage 0
167 07:49:21.440754 Fetching tests from https://github.com/kernelci/test-definitions
168 07:49:21.440834 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/0/tests/0_ltp-ipc'
169 07:49:26.636413 Running '/usr/bin/git checkout kernelci.org
170 07:49:26.779231 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 07:49:26.780008 uuid=8119391_1.5.2.3.1 testdef=None
172 07:49:26.780175 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 07:49:26.780422 start: 1.5.2.3.2 test-overlay (timeout 00:09:39) [common]
175 07:49:26.781225 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:49:26.781514 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:39) [common]
178 07:49:26.782538 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:49:26.782787 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:39) [common]
181 07:49:26.783885 runner path: /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/0/tests/0_ltp-ipc test_uuid 8119391_1.5.2.3.1
182 07:49:26.783982 SKIPFILE='skipfile-lkft.yaml'
183 07:49:26.784050 SKIP_INSTALL='true'
184 07:49:26.784112 TST_CMDFILES='ipc'
185 07:49:26.784249 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 07:49:26.784467 Creating lava-test-runner.conf files
188 07:49:26.784533 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119391/lava-overlay-5zvi1j6l/lava-8119391/0 for stage 0
189 07:49:26.784617 - 0_ltp-ipc
190 07:49:26.784747 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 07:49:26.784839 start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
192 07:49:34.300366 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 07:49:34.300523 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:32) [common]
194 07:49:34.300620 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 07:49:34.300721 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
196 07:49:34.300819 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
197 07:49:34.407150 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 07:49:34.407506 start: 1.5.4 extract-modules (timeout 00:09:32) [common]
199 07:49:34.407634 extracting modules file /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119391/extract-nfsrootfs-0ddla_v8
200 07:49:34.411808 extracting modules file /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119391/extract-overlay-ramdisk-td_tjrmm/ramdisk
201 07:49:34.415577 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 07:49:34.415699 start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
203 07:49:34.415805 [common] Applying overlay to NFS
204 07:49:34.415890 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119391/compress-overlay-287mwcdm/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119391/extract-nfsrootfs-0ddla_v8
205 07:49:34.882462 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 07:49:34.882644 start: 1.5.6 configure-preseed-file (timeout 00:09:31) [common]
207 07:49:34.882763 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 07:49:34.882872 start: 1.5.7 compress-ramdisk (timeout 00:09:31) [common]
209 07:49:34.882969 Building ramdisk /var/lib/lava/dispatcher/tmp/8119391/extract-overlay-ramdisk-td_tjrmm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119391/extract-overlay-ramdisk-td_tjrmm/ramdisk
210 07:49:34.918244 >> 24546 blocks
211 07:49:35.417046 rename /var/lib/lava/dispatcher/tmp/8119391/extract-overlay-ramdisk-td_tjrmm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/ramdisk/ramdisk.cpio.gz
212 07:49:35.417478 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 07:49:35.417620 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
214 07:49:35.417738 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
215 07:49:35.417846 No mkimage arch provided, not using FIT.
216 07:49:35.417955 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 07:49:35.418055 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 07:49:35.418168 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 07:49:35.418279 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
220 07:49:35.418370 No LXC device requested
221 07:49:35.418474 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 07:49:35.418579 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
223 07:49:35.418678 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 07:49:35.418760 Checking files for TFTP limit of 4294967296 bytes.
225 07:49:35.419175 end: 1 tftp-deploy (duration 00:00:29) [common]
226 07:49:35.419293 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 07:49:35.419406 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 07:49:35.419550 substitutions:
229 07:49:35.419627 - {DTB}: None
230 07:49:35.419709 - {INITRD}: 8119391/tftp-deploy-kbz3fpgn/ramdisk/ramdisk.cpio.gz
231 07:49:35.419788 - {KERNEL}: 8119391/tftp-deploy-kbz3fpgn/kernel/bzImage
232 07:49:35.419866 - {LAVA_MAC}: None
233 07:49:35.419943 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119391/extract-nfsrootfs-0ddla_v8
234 07:49:35.420018 - {NFS_SERVER_IP}: 192.168.201.1
235 07:49:35.420094 - {PRESEED_CONFIG}: None
236 07:49:35.420169 - {PRESEED_LOCAL}: None
237 07:49:35.420244 - {RAMDISK}: 8119391/tftp-deploy-kbz3fpgn/ramdisk/ramdisk.cpio.gz
238 07:49:35.420318 - {ROOT_PART}: None
239 07:49:35.420392 - {ROOT}: None
240 07:49:35.420467 - {SERVER_IP}: 192.168.201.1
241 07:49:35.420539 - {TEE}: None
242 07:49:35.420612 Parsed boot commands:
243 07:49:35.420683 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 07:49:35.420861 Parsed boot commands: tftpboot 192.168.201.1 8119391/tftp-deploy-kbz3fpgn/kernel/bzImage 8119391/tftp-deploy-kbz3fpgn/kernel/cmdline 8119391/tftp-deploy-kbz3fpgn/ramdisk/ramdisk.cpio.gz
245 07:49:35.420975 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 07:49:35.421083 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 07:49:35.421196 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 07:49:35.421302 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 07:49:35.421392 Not connected, no need to disconnect.
250 07:49:35.421494 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 07:49:35.421598 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 07:49:35.421679 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
253 07:49:35.424468 Setting prompt string to ['lava-test: # ']
254 07:49:35.424775 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 07:49:35.424894 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 07:49:35.425012 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 07:49:35.425122 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 07:49:35.425312 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
259 07:49:35.444544 >> Command sent successfully.
260 07:49:35.446508 Returned 0 in 0 seconds
261 07:49:35.547273 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 07:49:35.547586 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 07:49:35.547690 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 07:49:35.547779 Setting prompt string to 'Starting depthcharge on Voema...'
266 07:49:35.547845 Changing prompt to 'Starting depthcharge on Voema...'
267 07:49:35.547917 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 07:49:35.548188 [Enter `^Ec?' for help]
269 07:49:42.979733
270 07:49:42.979893
271 07:49:42.989701 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 07:49:42.992710 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
273 07:49:42.999299 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 07:49:43.002843 CPU: AES supported, TXT NOT supported, VT supported
275 07:49:43.009372 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 07:49:43.013026 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 07:49:43.019951 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 07:49:43.023525 VBOOT: Loading verstage.
279 07:49:43.026454 FMAP: Found "FLASH" version 1.1 at 0x1804000.
280 07:49:43.033154 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 07:49:43.036625 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 07:49:43.046319 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 07:49:43.052934 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 07:49:43.053020
285 07:49:43.053086
286 07:49:43.066509 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 07:49:43.080052 Probing TPM: . done!
288 07:49:43.083129 TPM ready after 0 ms
289 07:49:43.086645 Connected to device vid:did:rid of 1ae0:0028:00
290 07:49:43.097947 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
291 07:49:43.104482 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 07:49:43.108062 Initialized TPM device CR50 revision 0
293 07:49:43.164385 tlcl_send_startup: Startup return code is 0
294 07:49:43.164617 TPM: setup succeeded
295 07:49:43.178712 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 07:49:43.193289 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 07:49:43.205739 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 07:49:43.215558 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 07:49:43.219625 Chrome EC: UHEPI supported
300 07:49:43.222698 Phase 1
301 07:49:43.226223 FMAP: area GBB found @ 1805000 (458752 bytes)
302 07:49:43.235766 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 07:49:43.242587 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 07:49:43.248876 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 07:49:43.255408 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 07:49:43.258643 Recovery requested (1009000e)
307 07:49:43.262102 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 07:49:43.273848 tlcl_extend: response is 0
309 07:49:43.280339 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 07:49:43.290072 tlcl_extend: response is 0
311 07:49:43.296580 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 07:49:43.303128 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 07:49:43.310208 BS: verstage times (exec / console): total (unknown) / 142 ms
314 07:49:43.310294
315 07:49:43.310362
316 07:49:43.322930 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 07:49:43.329436 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 07:49:43.332950 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 07:49:43.336120 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 07:49:43.342717 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 07:49:43.346286 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 07:49:43.349728 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 07:49:43.353222 TCO_STS: 0000 0000
324 07:49:43.356130 GEN_PMCON: d0015038 00002200
325 07:49:43.359400 GBLRST_CAUSE: 00000000 00000000
326 07:49:43.362966 HPR_CAUSE0: 00000000
327 07:49:43.363051 prev_sleep_state 5
328 07:49:43.365918 Boot Count incremented to 10472
329 07:49:43.372476 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 07:49:43.379271 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 07:49:43.388961 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 07:49:43.395846 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 07:49:43.399060 Chrome EC: UHEPI supported
334 07:49:43.405939 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 07:49:43.417124 Probing TPM: done!
336 07:49:43.423326 Connected to device vid:did:rid of 1ae0:0028:00
337 07:49:43.433372 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
338 07:49:43.437486 Initialized TPM device CR50 revision 0
339 07:49:43.451625 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 07:49:43.458274 MRC: Hash idx 0x100b comparison successful.
341 07:49:43.461668 MRC cache found, size faa8
342 07:49:43.461749 bootmode is set to: 2
343 07:49:43.465259 SPD index = 2
344 07:49:43.471530 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 07:49:43.474974 SPD: module type is LPDDR4X
346 07:49:43.478018 SPD: module part number is MT53D1G64D4NW-046
347 07:49:43.484578 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
348 07:49:43.487847 SPD: device width 16 bits, bus width 16 bits
349 07:49:43.494389 SPD: module size is 2048 MB (per channel)
350 07:49:43.924517 CBMEM:
351 07:49:43.928087 IMD: root @ 0x76fff000 254 entries.
352 07:49:43.931391 IMD: root @ 0x76ffec00 62 entries.
353 07:49:43.934496 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 07:49:43.940965 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 07:49:43.944618 External stage cache:
356 07:49:43.947650 IMD: root @ 0x7b3ff000 254 entries.
357 07:49:43.951083 IMD: root @ 0x7b3fec00 62 entries.
358 07:49:43.966004 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 07:49:43.972737 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 07:49:43.978965 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 07:49:43.992972 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 07:49:43.999826 cse_lite: Skip switching to RW in the recovery path
363 07:49:43.999915 8 DIMMs found
364 07:49:43.999987 SMM Memory Map
365 07:49:44.002746 SMRAM : 0x7b000000 0x800000
366 07:49:44.006062
367 07:49:44.009291 Subregion 0: 0x7b000000 0x200000
368 07:49:44.012843 Subregion 1: 0x7b200000 0x200000
369 07:49:44.016387 Subregion 2: 0x7b400000 0x400000
370 07:49:44.016472 top_of_ram = 0x77000000
371 07:49:44.022990 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
372 07:49:44.029554 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
373 07:49:44.032909 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
374 07:49:44.039504 MTRR Range: Start=ff000000 End=0 (Size 1000000)
375 07:49:44.045948 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
376 07:49:44.052510 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
377 07:49:44.062577 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
378 07:49:44.065930 Processing 211 relocs. Offset value of 0x74c0b000
379 07:49:44.069454
380 07:49:44.075615 BS: romstage times (exec / console): total (unknown) / 277 ms
381 07:49:44.081967
382 07:49:44.082052
383 07:49:44.089660 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
384 07:49:44.095759 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 07:49:44.102160 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 07:49:44.109241 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 07:49:44.112848
388 07:49:44.119391 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
389 07:49:44.125447 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
390 07:49:44.168418 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
391 07:49:44.174818 Processing 5008 relocs. Offset value of 0x75d98000
392 07:49:44.178209 BS: postcar times (exec / console): total (unknown) / 59 ms
393 07:49:44.181455
394 07:49:44.181540
395 07:49:44.191437 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
396 07:49:44.191525 Normal boot
397 07:49:44.194868 FW_CONFIG value is 0x804c02
398 07:49:44.198275 PCI: 00:07.0 disabled by fw_config
399 07:49:44.201473 PCI: 00:07.1 disabled by fw_config
400 07:49:44.204757 PCI: 00:0d.2 disabled by fw_config
401 07:49:44.211357 PCI: 00:1c.7 disabled by fw_config
402 07:49:44.214805 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
403 07:49:44.221332 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
404 07:49:44.224539 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
405 07:49:44.231097 GENERIC: 0.0 disabled by fw_config
406 07:49:44.234626 GENERIC: 1.0 disabled by fw_config
407 07:49:44.237551 fw_config match found: DB_USB=USB3_ACTIVE
408 07:49:44.241252 fw_config match found: DB_USB=USB3_ACTIVE
409 07:49:44.244156 fw_config match found: DB_USB=USB3_ACTIVE
410 07:49:44.250929 fw_config match found: DB_USB=USB3_ACTIVE
411 07:49:44.254549 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
412 07:49:44.261018 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
413 07:49:44.264439
414 07:49:44.270902 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
415 07:49:44.277612 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
416 07:49:44.280704 microcode: sig=0x806c1 pf=0x80 revision=0x86
417 07:49:44.284006
418 07:49:44.287046 microcode: Update skipped, already up-to-date
419 07:49:44.293686 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
420 07:49:44.321808 Detected 4 core, 8 thread CPU.
421 07:49:44.324996 Setting up SMI for CPU
422 07:49:44.328501 IED base = 0x7b400000
423 07:49:44.328579 IED size = 0x00400000
424 07:49:44.331988 Will perform SMM setup.
425 07:49:44.338559 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
426 07:49:44.345094 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
427 07:49:44.351753 Processing 16 relocs. Offset value of 0x00030000
428 07:49:44.354876 Attempting to start 7 APs
429 07:49:44.358311 Waiting for 10ms after sending INIT.
430 07:49:44.373967 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
431 07:49:44.377050 AP: slot 2 apic_id 3.
432 07:49:44.380326 AP: slot 6 apic_id 2.
433 07:49:44.380407 AP: slot 3 apic_id 6.
434 07:49:44.384584 AP: slot 7 apic_id 7.
435 07:49:44.386879 AP: slot 4 apic_id 5.
436 07:49:44.386956 AP: slot 5 apic_id 4.
437 07:49:44.387020 done.
438 07:49:44.393586 Waiting for 2nd SIPI to complete...done.
439 07:49:44.400193 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
440 07:49:44.406660 Processing 13 relocs. Offset value of 0x00038000
441 07:49:44.410208 Unable to locate Global NVS
442 07:49:44.416716 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
443 07:49:44.420254 Installing permanent SMM handler to 0x7b000000
444 07:49:44.429892 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
445 07:49:44.433276 Processing 794 relocs. Offset value of 0x7b010000
446 07:49:44.443025 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
447 07:49:44.446759 Processing 13 relocs. Offset value of 0x7b008000
448 07:49:44.453282 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
449 07:49:44.459780 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
450 07:49:44.463340 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
451 07:49:44.466222
452 07:49:44.469844 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 07:49:44.476352 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 07:49:44.483064 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 07:49:44.489328 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 07:49:44.492916 Unable to locate Global NVS
457 07:49:44.499790 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 07:49:44.502852 Clearing SMI status registers
459 07:49:44.502937 SMI_STS: PM1
460 07:49:44.506306 PM1_STS: PWRBTN
461 07:49:44.512748 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 07:49:44.516262 In relocation handler: CPU 0
463 07:49:44.519282 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 07:49:44.525963 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 07:49:44.526048 Relocation complete.
466 07:49:44.529449
467 07:49:44.535903 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
468 07:49:44.539003 In relocation handler: CPU 1
469 07:49:44.542409 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
470 07:49:44.542499 Relocation complete.
471 07:49:44.552412 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
472 07:49:44.552502 In relocation handler: CPU 7
473 07:49:44.556164
474 07:49:44.559012 New SMBASE=0x7affe400 IEDBASE=0x7b400000
475 07:49:44.559097 Relocation complete.
476 07:49:44.569098 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
477 07:49:44.569184 In relocation handler: CPU 3
478 07:49:44.572450
479 07:49:44.575541 New SMBASE=0x7afff400 IEDBASE=0x7b400000
480 07:49:44.579021 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 07:49:44.582274 Relocation complete.
482 07:49:44.588777 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 07:49:44.592125 In relocation handler: CPU 6
484 07:49:44.595825 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 07:49:44.602073 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 07:49:44.602189 Relocation complete.
487 07:49:44.612175 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 07:49:44.612260 In relocation handler: CPU 2
489 07:49:44.618578 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 07:49:44.618663 Relocation complete.
491 07:49:44.625273 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
492 07:49:44.628676
493 07:49:44.628761 In relocation handler: CPU 4
494 07:49:44.634843 New SMBASE=0x7afff000 IEDBASE=0x7b400000
495 07:49:44.634934 Relocation complete.
496 07:49:44.641972 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
497 07:49:44.644917
498 07:49:44.644994 In relocation handler: CPU 5
499 07:49:44.651353 New SMBASE=0x7affec00 IEDBASE=0x7b400000
500 07:49:44.655050 Writing SMRR. base = 0x7b000006, mask=0xff800c00
501 07:49:44.658042 Relocation complete.
502 07:49:44.658120 Initializing CPU #0
503 07:49:44.661676 CPU: vendor Intel device 806c1
504 07:49:44.668142 CPU: family 06, model 8c, stepping 01
505 07:49:44.668218 Clearing out pending MCEs
506 07:49:44.671484 Setting up local APIC...
507 07:49:44.674940 apic_id: 0x00 done.
508 07:49:44.678038 Turbo is available but hidden
509 07:49:44.681473 Turbo is available and visible
510 07:49:44.684464 microcode: Update skipped, already up-to-date
511 07:49:44.687855 CPU #0 initialized
512 07:49:44.687936 Initializing CPU #2
513 07:49:44.691151 Initializing CPU #6
514 07:49:44.694494 Initializing CPU #7
515 07:49:44.694591 Initializing CPU #3
516 07:49:44.697984 CPU: vendor Intel device 806c1
517 07:49:44.701312 CPU: family 06, model 8c, stepping 01
518 07:49:44.704355 CPU: vendor Intel device 806c1
519 07:49:44.707979 CPU: family 06, model 8c, stepping 01
520 07:49:44.711493 Clearing out pending MCEs
521 07:49:44.714475 Clearing out pending MCEs
522 07:49:44.717892 Setting up local APIC...
523 07:49:44.717978 Initializing CPU #1
524 07:49:44.721297 CPU: vendor Intel device 806c1
525 07:49:44.724283 CPU: family 06, model 8c, stepping 01
526 07:49:44.727948 Initializing CPU #4
527 07:49:44.730843 Setting up local APIC...
528 07:49:44.734498 Clearing out pending MCEs
529 07:49:44.737612 CPU: vendor Intel device 806c1
530 07:49:44.740915 CPU: family 06, model 8c, stepping 01
531 07:49:44.744144 Setting up local APIC...
532 07:49:44.744228 apic_id: 0x06 done.
533 07:49:44.747626 apic_id: 0x07 done.
534 07:49:44.751253 microcode: Update skipped, already up-to-date
535 07:49:44.755369 CPU: vendor Intel device 806c1
536 07:49:44.758830 CPU: family 06, model 8c, stepping 01
537 07:49:44.758915 CPU #3 initialized
538 07:49:44.762375
539 07:49:44.765532 microcode: Update skipped, already up-to-date
540 07:49:44.765618 Initializing CPU #5
541 07:49:44.768594
542 07:49:44.768680 CPU: vendor Intel device 806c1
543 07:49:44.772045
544 07:49:44.775386 CPU: family 06, model 8c, stepping 01
545 07:49:44.778916 CPU: vendor Intel device 806c1
546 07:49:44.781658 CPU: family 06, model 8c, stepping 01
547 07:49:44.785223 Clearing out pending MCEs
548 07:49:44.785308 Clearing out pending MCEs
549 07:49:44.788589 Setting up local APIC...
550 07:49:44.791567 Clearing out pending MCEs
551 07:49:44.795301 Clearing out pending MCEs
552 07:49:44.795386 apic_id: 0x05 done.
553 07:49:44.798415 Setting up local APIC...
554 07:49:44.801728 Setting up local APIC...
555 07:49:44.801813 CPU #7 initialized
556 07:49:44.804844
557 07:49:44.804936 Setting up local APIC...
558 07:49:44.808436 apic_id: 0x04 done.
559 07:49:44.811528 microcode: Update skipped, already up-to-date
560 07:49:44.818345 microcode: Update skipped, already up-to-date
561 07:49:44.818430 CPU #4 initialized
562 07:49:44.821329 CPU #5 initialized
563 07:49:44.821435 apic_id: 0x01 done.
564 07:49:44.824893
565 07:49:44.824979 apic_id: 0x03 done.
566 07:49:44.827988 apic_id: 0x02 done.
567 07:49:44.831467 microcode: Update skipped, already up-to-date
568 07:49:44.837918 microcode: Update skipped, already up-to-date
569 07:49:44.838012 CPU #2 initialized
570 07:49:44.841004 CPU #6 initialized
571 07:49:44.844367 microcode: Update skipped, already up-to-date
572 07:49:44.848070 CPU #1 initialized
573 07:49:44.851044 bsp_do_flight_plan done after 454 msecs.
574 07:49:44.854649 CPU: frequency set to 4400 MHz
575 07:49:44.857596 Enabling SMIs.
576 07:49:44.861033 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
577 07:49:44.863938
578 07:49:44.878563 SATAXPCIE1 indicates PCIe NVMe is present
579 07:49:44.882088 Probing TPM: done!
580 07:49:44.885279 Connected to device vid:did:rid of 1ae0:0028:00
581 07:49:44.895988 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
582 07:49:44.899055 Initialized TPM device CR50 revision 0
583 07:49:44.902692 Enabling S0i3.4
584 07:49:44.909156 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
585 07:49:44.912236 Found a VBT of 8704 bytes after decompression
586 07:49:44.919130 cse_lite: CSE RO boot. HybridStorageMode disabled
587 07:49:44.925681 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
588 07:49:45.000298 FSPS returned 0
589 07:49:45.003260 Executing Phase 1 of FspMultiPhaseSiInit
590 07:49:45.013197 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
591 07:49:45.016764 port C0 DISC req: usage 1 usb3 1 usb2 5
592 07:49:45.020392 Raw Buffer output 0 00000511
593 07:49:45.023379 Raw Buffer output 1 00000000
594 07:49:45.027280 pmc_send_ipc_cmd succeeded
595 07:49:45.030246 port C1 DISC req: usage 1 usb3 2 usb2 3
596 07:49:45.033676
597 07:49:45.033757 Raw Buffer output 0 00000321
598 07:49:45.036757 Raw Buffer output 1 00000000
599 07:49:45.041326 pmc_send_ipc_cmd succeeded
600 07:49:45.045968 Detected 4 core, 8 thread CPU.
601 07:49:45.049636 Detected 4 core, 8 thread CPU.
602 07:49:45.249491 Display FSP Version Info HOB
603 07:49:45.252974 Reference Code - CPU = a.0.4c.31
604 07:49:45.255970 uCode Version = 0.0.0.86
605 07:49:45.259320 TXT ACM version = ff.ff.ff.ffff
606 07:49:45.263075 Reference Code - ME = a.0.4c.31
607 07:49:45.266473 MEBx version = 0.0.0.0
608 07:49:45.269447 ME Firmware Version = Consumer SKU
609 07:49:45.273085 Reference Code - PCH = a.0.4c.31
610 07:49:45.276179 PCH-CRID Status = Disabled
611 07:49:45.279630 PCH-CRID Original Value = ff.ff.ff.ffff
612 07:49:45.282689 PCH-CRID New Value = ff.ff.ff.ffff
613 07:49:45.286039 OPROM - RST - RAID = ff.ff.ff.ffff
614 07:49:45.289444 PCH Hsio Version = 4.0.0.0
615 07:49:45.292574 Reference Code - SA - System Agent = a.0.4c.31
616 07:49:45.296189 Reference Code - MRC = 2.0.0.1
617 07:49:45.299186 SA - PCIe Version = a.0.4c.31
618 07:49:45.302532 SA-CRID Status = Disabled
619 07:49:45.305886 SA-CRID Original Value = 0.0.0.1
620 07:49:45.309249 SA-CRID New Value = 0.0.0.1
621 07:49:45.312913 OPROM - VBIOS = ff.ff.ff.ffff
622 07:49:45.315765 IO Manageability Engine FW Version = 11.1.4.0
623 07:49:45.319359 PHY Build Version = 0.0.0.e0
624 07:49:45.322462 Thunderbolt(TM) FW Version = 0.0.0.0
625 07:49:45.329698 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
626 07:49:45.332668 ITSS IRQ Polarities Before:
627 07:49:45.332756 IPC0: 0xffffffff
628 07:49:45.336705 IPC1: 0xffffffff
629 07:49:45.336790 IPC2: 0xffffffff
630 07:49:45.340309 IPC3: 0xffffffff
631 07:49:45.340386 ITSS IRQ Polarities After:
632 07:49:45.343284 IPC0: 0xffffffff
633 07:49:45.343360 IPC1: 0xffffffff
634 07:49:45.346952 IPC2: 0xffffffff
635 07:49:45.349999 IPC3: 0xffffffff
636 07:49:45.353478 Found PCIe Root Port #9 at PCI: 00:1d.0.
637 07:49:45.362991 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
638 07:49:45.376567 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
639 07:49:45.389797 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
640 07:49:45.396150 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
641 07:49:45.396239 Enumerating buses...
642 07:49:45.403048 Show all devs... Before device enumeration.
643 07:49:45.403141 Root Device: enabled 1
644 07:49:45.406141 DOMAIN: 0000: enabled 1
645 07:49:45.409970 CPU_CLUSTER: 0: enabled 1
646 07:49:45.413144 PCI: 00:00.0: enabled 1
647 07:49:45.413229 PCI: 00:02.0: enabled 1
648 07:49:45.416234 PCI: 00:04.0: enabled 1
649 07:49:45.419685 PCI: 00:05.0: enabled 1
650 07:49:45.419771 PCI: 00:06.0: enabled 0
651 07:49:45.422819
652 07:49:45.422906 PCI: 00:07.0: enabled 0
653 07:49:45.426468 PCI: 00:07.1: enabled 0
654 07:49:45.429609 PCI: 00:07.2: enabled 0
655 07:49:45.429705 PCI: 00:07.3: enabled 0
656 07:49:45.432676 PCI: 00:08.0: enabled 1
657 07:49:45.435963 PCI: 00:09.0: enabled 0
658 07:49:45.439397 PCI: 00:0a.0: enabled 0
659 07:49:45.439487 PCI: 00:0d.0: enabled 1
660 07:49:45.442784 PCI: 00:0d.1: enabled 0
661 07:49:45.445830 PCI: 00:0d.2: enabled 0
662 07:49:45.449288 PCI: 00:0d.3: enabled 0
663 07:49:45.449382 PCI: 00:0e.0: enabled 0
664 07:49:45.452446 PCI: 00:10.2: enabled 1
665 07:49:45.456101 PCI: 00:10.6: enabled 0
666 07:49:45.458950 PCI: 00:10.7: enabled 0
667 07:49:45.459028 PCI: 00:12.0: enabled 0
668 07:49:45.462616 PCI: 00:12.6: enabled 0
669 07:49:45.465920 PCI: 00:13.0: enabled 0
670 07:49:45.469044 PCI: 00:14.0: enabled 1
671 07:49:45.469129 PCI: 00:14.1: enabled 0
672 07:49:45.472644 PCI: 00:14.2: enabled 1
673 07:49:45.475716 PCI: 00:14.3: enabled 1
674 07:49:45.475800 PCI: 00:15.0: enabled 1
675 07:49:45.478956
676 07:49:45.479041 PCI: 00:15.1: enabled 1
677 07:49:45.482204 PCI: 00:15.2: enabled 1
678 07:49:45.485688 PCI: 00:15.3: enabled 1
679 07:49:45.485773 PCI: 00:16.0: enabled 1
680 07:49:45.488688 PCI: 00:16.1: enabled 0
681 07:49:45.492162 PCI: 00:16.2: enabled 0
682 07:49:45.495644 PCI: 00:16.3: enabled 0
683 07:49:45.495730 PCI: 00:16.4: enabled 0
684 07:49:45.498829 PCI: 00:16.5: enabled 0
685 07:49:45.502108 PCI: 00:17.0: enabled 1
686 07:49:45.505269 PCI: 00:19.0: enabled 0
687 07:49:45.505391 PCI: 00:19.1: enabled 1
688 07:49:45.508968 PCI: 00:19.2: enabled 0
689 07:49:45.511983 PCI: 00:1c.0: enabled 1
690 07:49:45.515355 PCI: 00:1c.1: enabled 0
691 07:49:45.515455 PCI: 00:1c.2: enabled 0
692 07:49:45.518896 PCI: 00:1c.3: enabled 0
693 07:49:45.522227 PCI: 00:1c.4: enabled 0
694 07:49:45.522311 PCI: 00:1c.5: enabled 0
695 07:49:45.525619
696 07:49:45.525696 PCI: 00:1c.6: enabled 1
697 07:49:45.528562 PCI: 00:1c.7: enabled 0
698 07:49:45.532062 PCI: 00:1d.0: enabled 1
699 07:49:45.532135 PCI: 00:1d.1: enabled 0
700 07:49:45.535483 PCI: 00:1d.2: enabled 1
701 07:49:45.538300 PCI: 00:1d.3: enabled 0
702 07:49:45.541831 PCI: 00:1e.0: enabled 1
703 07:49:45.541920 PCI: 00:1e.1: enabled 0
704 07:49:45.545203 PCI: 00:1e.2: enabled 1
705 07:49:45.548721 PCI: 00:1e.3: enabled 1
706 07:49:45.551885 PCI: 00:1f.0: enabled 1
707 07:49:45.551960 PCI: 00:1f.1: enabled 0
708 07:49:45.554952 PCI: 00:1f.2: enabled 1
709 07:49:45.558555 PCI: 00:1f.3: enabled 1
710 07:49:45.561494 PCI: 00:1f.4: enabled 0
711 07:49:45.561571 PCI: 00:1f.5: enabled 1
712 07:49:45.565121 PCI: 00:1f.6: enabled 0
713 07:49:45.568082 PCI: 00:1f.7: enabled 0
714 07:49:45.568154 APIC: 00: enabled 1
715 07:49:45.571563 GENERIC: 0.0: enabled 1
716 07:49:45.574926 GENERIC: 0.0: enabled 1
717 07:49:45.577908 GENERIC: 1.0: enabled 1
718 07:49:45.577981 GENERIC: 0.0: enabled 1
719 07:49:45.581508 GENERIC: 1.0: enabled 1
720 07:49:45.585025 USB0 port 0: enabled 1
721 07:49:45.587947 GENERIC: 0.0: enabled 1
722 07:49:45.588021 USB0 port 0: enabled 1
723 07:49:45.591474 GENERIC: 0.0: enabled 1
724 07:49:45.594903 I2C: 00:1a: enabled 1
725 07:49:45.594975 I2C: 00:31: enabled 1
726 07:49:45.597814 I2C: 00:32: enabled 1
727 07:49:45.601206 I2C: 00:10: enabled 1
728 07:49:45.601277 I2C: 00:15: enabled 1
729 07:49:45.604830 GENERIC: 0.0: enabled 0
730 07:49:45.608242 GENERIC: 1.0: enabled 0
731 07:49:45.611454 GENERIC: 0.0: enabled 1
732 07:49:45.611527 SPI: 00: enabled 1
733 07:49:45.614483 SPI: 00: enabled 1
734 07:49:45.614554 PNP: 0c09.0: enabled 1
735 07:49:45.617849
736 07:49:45.617921 GENERIC: 0.0: enabled 1
737 07:49:45.621290 USB3 port 0: enabled 1
738 07:49:45.624750 USB3 port 1: enabled 1
739 07:49:45.624824 USB3 port 2: enabled 0
740 07:49:45.627848 USB3 port 3: enabled 0
741 07:49:45.630958 USB2 port 0: enabled 0
742 07:49:45.634259 USB2 port 1: enabled 1
743 07:49:45.634330 USB2 port 2: enabled 1
744 07:49:45.637780 USB2 port 3: enabled 0
745 07:49:45.640715 USB2 port 4: enabled 1
746 07:49:45.640785 USB2 port 5: enabled 0
747 07:49:45.644237 USB2 port 6: enabled 0
748 07:49:45.647848 USB2 port 7: enabled 0
749 07:49:45.647923 USB2 port 8: enabled 0
750 07:49:45.650956
751 07:49:45.651030 USB2 port 9: enabled 0
752 07:49:45.653915 USB3 port 0: enabled 0
753 07:49:45.657552 USB3 port 1: enabled 1
754 07:49:45.657624 USB3 port 2: enabled 0
755 07:49:45.660786 USB3 port 3: enabled 0
756 07:49:45.663933 GENERIC: 0.0: enabled 1
757 07:49:45.664005 GENERIC: 1.0: enabled 1
758 07:49:45.667444
759 07:49:45.667514 APIC: 01: enabled 1
760 07:49:45.670914 APIC: 03: enabled 1
761 07:49:45.670985 APIC: 06: enabled 1
762 07:49:45.673904 APIC: 05: enabled 1
763 07:49:45.677551 APIC: 04: enabled 1
764 07:49:45.677623 APIC: 02: enabled 1
765 07:49:45.680510 APIC: 07: enabled 1
766 07:49:45.680580 Compare with tree...
767 07:49:45.684087 Root Device: enabled 1
768 07:49:45.687245 DOMAIN: 0000: enabled 1
769 07:49:45.690623 PCI: 00:00.0: enabled 1
770 07:49:45.693925 PCI: 00:02.0: enabled 1
771 07:49:45.694000 PCI: 00:04.0: enabled 1
772 07:49:45.697278 GENERIC: 0.0: enabled 1
773 07:49:45.700330 PCI: 00:05.0: enabled 1
774 07:49:45.703860 PCI: 00:06.0: enabled 0
775 07:49:45.707011 PCI: 00:07.0: enabled 0
776 07:49:45.707081 GENERIC: 0.0: enabled 1
777 07:49:45.710295 PCI: 00:07.1: enabled 0
778 07:49:45.713548 GENERIC: 1.0: enabled 1
779 07:49:45.717178 PCI: 00:07.2: enabled 0
780 07:49:45.720530 GENERIC: 0.0: enabled 1
781 07:49:45.720601 PCI: 00:07.3: enabled 0
782 07:49:45.723511 GENERIC: 1.0: enabled 1
783 07:49:45.726943 PCI: 00:08.0: enabled 1
784 07:49:45.730176 PCI: 00:09.0: enabled 0
785 07:49:45.733430 PCI: 00:0a.0: enabled 0
786 07:49:45.733516 PCI: 00:0d.0: enabled 1
787 07:49:45.737035 USB0 port 0: enabled 1
788 07:49:45.740601 USB3 port 0: enabled 1
789 07:49:45.743410 USB3 port 1: enabled 1
790 07:49:45.746885 USB3 port 2: enabled 0
791 07:49:45.750319 USB3 port 3: enabled 0
792 07:49:45.750407 PCI: 00:0d.1: enabled 0
793 07:49:45.753425 PCI: 00:0d.2: enabled 0
794 07:49:45.756514 GENERIC: 0.0: enabled 1
795 07:49:45.760036 PCI: 00:0d.3: enabled 0
796 07:49:45.763109 PCI: 00:0e.0: enabled 0
797 07:49:45.763195 PCI: 00:10.2: enabled 1
798 07:49:45.766717 PCI: 00:10.6: enabled 0
799 07:49:45.769736 PCI: 00:10.7: enabled 0
800 07:49:45.773151 PCI: 00:12.0: enabled 0
801 07:49:45.776652 PCI: 00:12.6: enabled 0
802 07:49:45.776736 PCI: 00:13.0: enabled 0
803 07:49:45.779748 PCI: 00:14.0: enabled 1
804 07:49:45.782915 USB0 port 0: enabled 1
805 07:49:45.786299 USB2 port 0: enabled 0
806 07:49:45.789638 USB2 port 1: enabled 1
807 07:49:45.789721 USB2 port 2: enabled 1
808 07:49:45.793286 USB2 port 3: enabled 0
809 07:49:45.796164 USB2 port 4: enabled 1
810 07:49:45.799657 USB2 port 5: enabled 0
811 07:49:45.803138 USB2 port 6: enabled 0
812 07:49:45.806296 USB2 port 7: enabled 0
813 07:49:45.806372 USB2 port 8: enabled 0
814 07:49:45.809807 USB2 port 9: enabled 0
815 07:49:45.812770 USB3 port 0: enabled 0
816 07:49:45.816162 USB3 port 1: enabled 1
817 07:49:45.819249 USB3 port 2: enabled 0
818 07:49:45.822884 USB3 port 3: enabled 0
819 07:49:45.822973 PCI: 00:14.1: enabled 0
820 07:49:45.825892 PCI: 00:14.2: enabled 1
821 07:49:45.829501 PCI: 00:14.3: enabled 1
822 07:49:45.833032 GENERIC: 0.0: enabled 1
823 07:49:45.835766 PCI: 00:15.0: enabled 1
824 07:49:45.835867 I2C: 00:1a: enabled 1
825 07:49:45.839137 I2C: 00:31: enabled 1
826 07:49:45.842742 I2C: 00:32: enabled 1
827 07:49:45.846270 PCI: 00:15.1: enabled 1
828 07:49:45.846357 I2C: 00:10: enabled 1
829 07:49:45.849187 PCI: 00:15.2: enabled 1
830 07:49:45.852372 PCI: 00:15.3: enabled 1
831 07:49:45.855921 PCI: 00:16.0: enabled 1
832 07:49:45.859434 PCI: 00:16.1: enabled 0
833 07:49:45.859519 PCI: 00:16.2: enabled 0
834 07:49:45.862533 PCI: 00:16.3: enabled 0
835 07:49:45.865520 PCI: 00:16.4: enabled 0
836 07:49:45.869235 PCI: 00:16.5: enabled 0
837 07:49:45.872173 PCI: 00:17.0: enabled 1
838 07:49:45.872250 PCI: 00:19.0: enabled 0
839 07:49:45.875919 PCI: 00:19.1: enabled 1
840 07:49:45.878717 I2C: 00:15: enabled 1
841 07:49:45.882302 PCI: 00:19.2: enabled 0
842 07:49:45.885750 PCI: 00:1d.0: enabled 1
843 07:49:45.885835 GENERIC: 0.0: enabled 1
844 07:49:45.888972 PCI: 00:1e.0: enabled 1
845 07:49:45.891975 PCI: 00:1e.1: enabled 0
846 07:49:45.895305 PCI: 00:1e.2: enabled 1
847 07:49:45.895378 SPI: 00: enabled 1
848 07:49:45.898746
849 07:49:45.898823 PCI: 00:1e.3: enabled 1
850 07:49:45.901886 SPI: 00: enabled 1
851 07:49:45.905354 PCI: 00:1f.0: enabled 1
852 07:49:45.908872 PNP: 0c09.0: enabled 1
853 07:49:45.908947 PCI: 00:1f.1: enabled 0
854 07:49:45.912168 PCI: 00:1f.2: enabled 1
855 07:49:45.915374 GENERIC: 0.0: enabled 1
856 07:49:45.918594 GENERIC: 0.0: enabled 1
857 07:49:45.921793 GENERIC: 1.0: enabled 1
858 07:49:45.921879 PCI: 00:1f.3: enabled 1
859 07:49:45.925162
860 07:49:45.925247 PCI: 00:1f.4: enabled 0
861 07:49:45.928586 PCI: 00:1f.5: enabled 1
862 07:49:45.931917 PCI: 00:1f.6: enabled 0
863 07:49:45.983299 PCI: 00:1f.7: enabled 0
864 07:49:45.983398 CPU_CLUSTER: 0: enabled 1
865 07:49:45.983467 APIC: 00: enabled 1
866 07:49:45.983977 APIC: 01: enabled 1
867 07:49:45.984050 APIC: 03: enabled 1
868 07:49:45.984118 APIC: 06: enabled 1
869 07:49:45.984401 APIC: 05: enabled 1
870 07:49:45.984507 APIC: 04: enabled 1
871 07:49:45.984604 APIC: 02: enabled 1
872 07:49:45.984678 APIC: 07: enabled 1
873 07:49:45.984734 Root Device scanning...
874 07:49:45.984979 scan_static_bus for Root Device
875 07:49:45.985046 DOMAIN: 0000 enabled
876 07:49:45.985289 CPU_CLUSTER: 0 enabled
877 07:49:45.985397 DOMAIN: 0000 scanning...
878 07:49:45.985456 PCI: pci_scan_bus for bus 00
879 07:49:45.985513 PCI: 00:00.0 [8086/0000] ops
880 07:49:45.985575 PCI: 00:00.0 [8086/9a12] enabled
881 07:49:45.985820 PCI: 00:02.0 [8086/0000] bus ops
882 07:49:45.985881 PCI: 00:02.0 [8086/9a40] enabled
883 07:49:46.008443 PCI: 00:04.0 [8086/0000] bus ops
884 07:49:46.008724 PCI: 00:04.0 [8086/9a03] enabled
885 07:49:46.008799 PCI: 00:05.0 [8086/9a19] enabled
886 07:49:46.009206 PCI: 00:07.0 [0000/0000] hidden
887 07:49:46.009278 PCI: 00:08.0 [8086/9a11] enabled
888 07:49:46.009857 PCI: 00:0a.0 [8086/9a0d] disabled
889 07:49:46.009941 PCI: 00:0d.0 [8086/0000] bus ops
890 07:49:46.011764 PCI: 00:0d.0 [8086/9a13] enabled
891 07:49:46.015212 PCI: 00:14.0 [8086/0000] bus ops
892 07:49:46.018375 PCI: 00:14.0 [8086/a0ed] enabled
893 07:49:46.022140 PCI: 00:14.2 [8086/a0ef] enabled
894 07:49:46.025412 PCI: 00:14.3 [8086/0000] bus ops
895 07:49:46.028916 PCI: 00:14.3 [8086/a0f0] enabled
896 07:49:46.031917 PCI: 00:15.0 [8086/0000] bus ops
897 07:49:46.035292 PCI: 00:15.0 [8086/a0e8] enabled
898 07:49:46.038395 PCI: 00:15.1 [8086/0000] bus ops
899 07:49:46.041614 PCI: 00:15.1 [8086/a0e9] enabled
900 07:49:46.045373 PCI: 00:15.2 [8086/0000] bus ops
901 07:49:46.048286 PCI: 00:15.2 [8086/a0ea] enabled
902 07:49:46.051418 PCI: 00:15.3 [8086/0000] bus ops
903 07:49:46.055064 PCI: 00:15.3 [8086/a0eb] enabled
904 07:49:46.058117 PCI: 00:16.0 [8086/0000] ops
905 07:49:46.061679 PCI: 00:16.0 [8086/a0e0] enabled
906 07:49:46.067916 PCI: Static device PCI: 00:17.0 not found, disabling it.
907 07:49:46.071298 PCI: 00:19.0 [8086/0000] bus ops
908 07:49:46.074849 PCI: 00:19.0 [8086/a0c5] disabled
909 07:49:46.077862 PCI: 00:19.1 [8086/0000] bus ops
910 07:49:46.081577 PCI: 00:19.1 [8086/a0c6] enabled
911 07:49:46.084494 PCI: 00:1d.0 [8086/0000] bus ops
912 07:49:46.087985 PCI: 00:1d.0 [8086/a0b0] enabled
913 07:49:46.091047 PCI: 00:1e.0 [8086/0000] ops
914 07:49:46.094385 PCI: 00:1e.0 [8086/a0a8] enabled
915 07:49:46.097542 PCI: 00:1e.2 [8086/0000] bus ops
916 07:49:46.101223 PCI: 00:1e.2 [8086/a0aa] enabled
917 07:49:46.104195 PCI: 00:1e.3 [8086/0000] bus ops
918 07:49:46.107455 PCI: 00:1e.3 [8086/a0ab] enabled
919 07:49:46.110783 PCI: 00:1f.0 [8086/0000] bus ops
920 07:49:46.114224 PCI: 00:1f.0 [8086/a087] enabled
921 07:49:46.114304 RTC Init
922 07:49:46.117395 Set power on after power failure.
923 07:49:46.121005 Disabling Deep S3
924 07:49:46.121080 Disabling Deep S3
925 07:49:46.124247 Disabling Deep S4
926 07:49:46.124331 Disabling Deep S4
927 07:49:46.127209 Disabling Deep S5
928 07:49:46.130937 Disabling Deep S5
929 07:49:46.133966 PCI: 00:1f.2 [0000/0000] hidden
930 07:49:46.137461 PCI: 00:1f.3 [8086/0000] bus ops
931 07:49:46.140486 PCI: 00:1f.3 [8086/a0c8] enabled
932 07:49:46.144096 PCI: 00:1f.5 [8086/0000] bus ops
933 07:49:46.147173 PCI: 00:1f.5 [8086/a0a4] enabled
934 07:49:46.150459 PCI: Leftover static devices:
935 07:49:46.150599 PCI: 00:10.2
936 07:49:46.150737 PCI: 00:10.6
937 07:49:46.153621 PCI: 00:10.7
938 07:49:46.153769 PCI: 00:06.0
939 07:49:46.157341 PCI: 00:07.1
940 07:49:46.157501 PCI: 00:07.2
941 07:49:46.157642 PCI: 00:07.3
942 07:49:46.160572 PCI: 00:09.0
943 07:49:46.160775 PCI: 00:0d.1
944 07:49:46.164126 PCI: 00:0d.2
945 07:49:46.164307 PCI: 00:0d.3
946 07:49:46.167073 PCI: 00:0e.0
947 07:49:46.167284 PCI: 00:12.0
948 07:49:46.167519 PCI: 00:12.6
949 07:49:46.170761 PCI: 00:13.0
950 07:49:46.171204 PCI: 00:14.1
951 07:49:46.173651 PCI: 00:16.1
952 07:49:46.173736 PCI: 00:16.2
953 07:49:46.173803 PCI: 00:16.3
954 07:49:46.176688 PCI: 00:16.4
955 07:49:46.176773 PCI: 00:16.5
956 07:49:46.180160 PCI: 00:17.0
957 07:49:46.180260 PCI: 00:19.2
958 07:49:46.180349 PCI: 00:1e.1
959 07:49:46.183311
960 07:49:46.183397 PCI: 00:1f.1
961 07:49:46.183464 PCI: 00:1f.4
962 07:49:46.186784 PCI: 00:1f.6
963 07:49:46.186869 PCI: 00:1f.7
964 07:49:46.190066 PCI: Check your devicetree.cb.
965 07:49:46.193628 PCI: 00:02.0 scanning...
966 07:49:46.196676 scan_generic_bus for PCI: 00:02.0
967 07:49:46.200001 scan_generic_bus for PCI: 00:02.0 done
968 07:49:46.206732 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
969 07:49:46.206819 PCI: 00:04.0 scanning...
970 07:49:46.209718 scan_generic_bus for PCI: 00:04.0
971 07:49:46.213317 GENERIC: 0.0 enabled
972 07:49:46.219895 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
973 07:49:46.223089 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
974 07:49:46.226407 PCI: 00:0d.0 scanning...
975 07:49:46.230008 scan_static_bus for PCI: 00:0d.0
976 07:49:46.233126 USB0 port 0 enabled
977 07:49:46.236666 USB0 port 0 scanning...
978 07:49:46.239736 scan_static_bus for USB0 port 0
979 07:49:46.239842 USB3 port 0 enabled
980 07:49:46.243306 USB3 port 1 enabled
981 07:49:46.246667 USB3 port 2 disabled
982 07:49:46.246803 USB3 port 3 disabled
983 07:49:46.249745 USB3 port 0 scanning...
984 07:49:46.252869 scan_static_bus for USB3 port 0
985 07:49:46.256253 scan_static_bus for USB3 port 0 done
986 07:49:46.259758 scan_bus: bus USB3 port 0 finished in 6 msecs
987 07:49:46.262781 USB3 port 1 scanning...
988 07:49:46.266497 scan_static_bus for USB3 port 1
989 07:49:46.269422 scan_static_bus for USB3 port 1 done
990 07:49:46.276139 scan_bus: bus USB3 port 1 finished in 6 msecs
991 07:49:46.279764 scan_static_bus for USB0 port 0 done
992 07:49:46.283373 scan_bus: bus USB0 port 0 finished in 43 msecs
993 07:49:46.286400 scan_static_bus for PCI: 00:0d.0 done
994 07:49:46.292819 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
995 07:49:46.296294 PCI: 00:14.0 scanning...
996 07:49:46.299865 scan_static_bus for PCI: 00:14.0
997 07:49:46.300329 USB0 port 0 enabled
998 07:49:46.302906 USB0 port 0 scanning...
999 07:49:46.306126 scan_static_bus for USB0 port 0
1000 07:49:46.309442 USB2 port 0 disabled
1001 07:49:46.309904 USB2 port 1 enabled
1002 07:49:46.312764 USB2 port 2 enabled
1003 07:49:46.315994 USB2 port 3 disabled
1004 07:49:46.316440 USB2 port 4 enabled
1005 07:49:46.319398 USB2 port 5 disabled
1006 07:49:46.322736 USB2 port 6 disabled
1007 07:49:46.323291 USB2 port 7 disabled
1008 07:49:46.326058 USB2 port 8 disabled
1009 07:49:46.329453 USB2 port 9 disabled
1010 07:49:46.329908 USB3 port 0 disabled
1011 07:49:46.332599 USB3 port 1 enabled
1012 07:49:46.333074 USB3 port 2 disabled
1013 07:49:46.335973
1014 07:49:46.336490 USB3 port 3 disabled
1015 07:49:46.339511 USB2 port 1 scanning...
1016 07:49:46.342445 scan_static_bus for USB2 port 1
1017 07:49:46.345936 scan_static_bus for USB2 port 1 done
1018 07:49:46.349262 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 07:49:46.352299 USB2 port 2 scanning...
1020 07:49:46.355861 scan_static_bus for USB2 port 2
1021 07:49:46.359235 scan_static_bus for USB2 port 2 done
1022 07:49:46.365921 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 07:49:46.366362 USB2 port 4 scanning...
1024 07:49:46.369302 scan_static_bus for USB2 port 4
1025 07:49:46.376044 scan_static_bus for USB2 port 4 done
1026 07:49:46.378996 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 07:49:46.382574 USB3 port 1 scanning...
1028 07:49:46.385435 scan_static_bus for USB3 port 1
1029 07:49:46.389001 scan_static_bus for USB3 port 1 done
1030 07:49:46.392204 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 07:49:46.395653 scan_static_bus for USB0 port 0 done
1032 07:49:46.402205 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 07:49:46.405243 scan_static_bus for PCI: 00:14.0 done
1034 07:49:46.408499 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1035 07:49:46.412227 PCI: 00:14.3 scanning...
1036 07:49:46.415395 scan_static_bus for PCI: 00:14.3
1037 07:49:46.418711 GENERIC: 0.0 enabled
1038 07:49:46.421893 scan_static_bus for PCI: 00:14.3 done
1039 07:49:46.425419 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 07:49:46.428526
1041 07:49:46.428968 PCI: 00:15.0 scanning...
1042 07:49:46.431969 scan_static_bus for PCI: 00:15.0
1043 07:49:46.435352 I2C: 00:1a enabled
1044 07:49:46.438441 I2C: 00:31 enabled
1045 07:49:46.438876 I2C: 00:32 enabled
1046 07:49:46.441647 scan_static_bus for PCI: 00:15.0 done
1047 07:49:46.448236 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1048 07:49:46.451628 PCI: 00:15.1 scanning...
1049 07:49:46.454679 scan_static_bus for PCI: 00:15.1
1050 07:49:46.455113 I2C: 00:10 enabled
1051 07:49:46.458018 scan_static_bus for PCI: 00:15.1 done
1052 07:49:46.464852 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1053 07:49:46.467865 PCI: 00:15.2 scanning...
1054 07:49:46.471101 scan_static_bus for PCI: 00:15.2
1055 07:49:46.474211 scan_static_bus for PCI: 00:15.2 done
1056 07:49:46.477828 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1057 07:49:46.480957 PCI: 00:15.3 scanning...
1058 07:49:46.484364 scan_static_bus for PCI: 00:15.3
1059 07:49:46.487418 scan_static_bus for PCI: 00:15.3 done
1060 07:49:46.494334 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1061 07:49:46.494774 PCI: 00:19.1 scanning...
1062 07:49:46.497606 scan_static_bus for PCI: 00:19.1
1063 07:49:46.501080 I2C: 00:15 enabled
1064 07:49:46.504257 scan_static_bus for PCI: 00:19.1 done
1065 07:49:46.510841 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1066 07:49:46.511282 PCI: 00:1d.0 scanning...
1067 07:49:46.517731 do_pci_scan_bridge for PCI: 00:1d.0
1068 07:49:46.518173 PCI: pci_scan_bus for bus 01
1069 07:49:46.521146 PCI: 01:00.0 [15b7/5009] enabled
1070 07:49:46.524693 GENERIC: 0.0 enabled
1071 07:49:46.527583 Enabling Common Clock Configuration
1072 07:49:46.534380 L1 Sub-State supported from root port 29
1073 07:49:46.534814 L1 Sub-State Support = 0x5
1074 07:49:46.537690 CommonModeRestoreTime = 0x28
1075 07:49:46.544298 Power On Value = 0x16, Power On Scale = 0x0
1076 07:49:46.544741 ASPM: Enabled L1
1077 07:49:46.547175 PCIe: Max_Payload_Size adjusted to 128
1078 07:49:46.553822 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1079 07:49:46.557315 PCI: 00:1e.2 scanning...
1080 07:49:46.560759 scan_generic_bus for PCI: 00:1e.2
1081 07:49:46.561196 SPI: 00 enabled
1082 07:49:46.567602 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1083 07:49:46.570566 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1084 07:49:46.573753
1085 07:49:46.574316 PCI: 00:1e.3 scanning...
1086 07:49:46.576903 scan_generic_bus for PCI: 00:1e.3
1087 07:49:46.580947 SPI: 00 enabled
1088 07:49:46.584438 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1089 07:49:46.587213
1090 07:49:46.590479 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1091 07:49:46.593884 PCI: 00:1f.0 scanning...
1092 07:49:46.597622 scan_static_bus for PCI: 00:1f.0
1093 07:49:46.598060 PNP: 0c09.0 enabled
1094 07:49:46.600796 PNP: 0c09.0 scanning...
1095 07:49:46.603795 scan_static_bus for PNP: 0c09.0
1096 07:49:46.607083 scan_static_bus for PNP: 0c09.0 done
1097 07:49:46.613910 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1098 07:49:46.617159 scan_static_bus for PCI: 00:1f.0 done
1099 07:49:46.620286 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1100 07:49:46.623578 PCI: 00:1f.2 scanning...
1101 07:49:46.627212 scan_static_bus for PCI: 00:1f.2
1102 07:49:46.630490 GENERIC: 0.0 enabled
1103 07:49:46.633439 GENERIC: 0.0 scanning...
1104 07:49:46.636815 scan_static_bus for GENERIC: 0.0
1105 07:49:46.637253 GENERIC: 0.0 enabled
1106 07:49:46.640285 GENERIC: 1.0 enabled
1107 07:49:46.643367 scan_static_bus for GENERIC: 0.0 done
1108 07:49:46.649906 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1109 07:49:46.653434 scan_static_bus for PCI: 00:1f.2 done
1110 07:49:46.656896 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1111 07:49:46.660207 PCI: 00:1f.3 scanning...
1112 07:49:46.663220 scan_static_bus for PCI: 00:1f.3
1113 07:49:46.666367 scan_static_bus for PCI: 00:1f.3 done
1114 07:49:46.673095 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1115 07:49:46.673570 PCI: 00:1f.5 scanning...
1116 07:49:46.676627 scan_generic_bus for PCI: 00:1f.5
1117 07:49:46.683364 scan_generic_bus for PCI: 00:1f.5 done
1118 07:49:46.686299 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1119 07:49:46.693040 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1120 07:49:46.696214 scan_static_bus for Root Device done
1121 07:49:46.699905 scan_bus: bus Root Device finished in 735 msecs
1122 07:49:46.700351 done
1123 07:49:46.706387 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1124 07:49:46.709434 Chrome EC: UHEPI supported
1125 07:49:46.715835 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1126 07:49:46.722875 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1127 07:49:46.725792 SPI flash protection: WPSW=0 SRP0=1
1128 07:49:46.729003 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1129 07:49:46.735550 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1130 07:49:46.738928 found VGA at PCI: 00:02.0
1131 07:49:46.742196 Setting up VGA for PCI: 00:02.0
1132 07:49:46.748890 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1133 07:49:46.752329 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1134 07:49:46.755714 Allocating resources...
1135 07:49:46.756179 Reading resources...
1136 07:49:46.762470 Root Device read_resources bus 0 link: 0
1137 07:49:46.765294 DOMAIN: 0000 read_resources bus 0 link: 0
1138 07:49:46.771809 PCI: 00:04.0 read_resources bus 1 link: 0
1139 07:49:46.775259 PCI: 00:04.0 read_resources bus 1 link: 0 done
1140 07:49:46.781827 PCI: 00:0d.0 read_resources bus 0 link: 0
1141 07:49:46.785407 USB0 port 0 read_resources bus 0 link: 0
1142 07:49:46.792035 USB0 port 0 read_resources bus 0 link: 0 done
1143 07:49:46.795041 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1144 07:49:46.798591 PCI: 00:14.0 read_resources bus 0 link: 0
1145 07:49:46.804991 USB0 port 0 read_resources bus 0 link: 0
1146 07:49:46.808859 USB0 port 0 read_resources bus 0 link: 0 done
1147 07:49:46.815283 PCI: 00:14.0 read_resources bus 0 link: 0 done
1148 07:49:46.818637 PCI: 00:14.3 read_resources bus 0 link: 0
1149 07:49:46.825419 PCI: 00:14.3 read_resources bus 0 link: 0 done
1150 07:49:46.828590 PCI: 00:15.0 read_resources bus 0 link: 0
1151 07:49:46.835263 PCI: 00:15.0 read_resources bus 0 link: 0 done
1152 07:49:46.838824 PCI: 00:15.1 read_resources bus 0 link: 0
1153 07:49:46.845550 PCI: 00:15.1 read_resources bus 0 link: 0 done
1154 07:49:46.848734 PCI: 00:19.1 read_resources bus 0 link: 0
1155 07:49:46.855766 PCI: 00:19.1 read_resources bus 0 link: 0 done
1156 07:49:46.858530 PCI: 00:1d.0 read_resources bus 1 link: 0
1157 07:49:46.865476 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1158 07:49:46.869106 PCI: 00:1e.2 read_resources bus 2 link: 0
1159 07:49:46.875419 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1160 07:49:46.878755 PCI: 00:1e.3 read_resources bus 3 link: 0
1161 07:49:46.885375 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1162 07:49:46.888309 PCI: 00:1f.0 read_resources bus 0 link: 0
1163 07:49:46.894986 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1164 07:49:46.898629 PCI: 00:1f.2 read_resources bus 0 link: 0
1165 07:49:46.901633 GENERIC: 0.0 read_resources bus 0 link: 0
1166 07:49:46.908725 GENERIC: 0.0 read_resources bus 0 link: 0 done
1167 07:49:46.912281 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1168 07:49:46.919604 DOMAIN: 0000 read_resources bus 0 link: 0 done
1169 07:49:46.922609 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1170 07:49:46.929231 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1171 07:49:46.932588 Root Device read_resources bus 0 link: 0 done
1172 07:49:46.935784 Done reading resources.
1173 07:49:46.942470 Show resources in subtree (Root Device)...After reading.
1174 07:49:46.945644 Root Device child on link 0 DOMAIN: 0000
1175 07:49:46.948991 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1176 07:49:46.958835 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1177 07:49:46.968851 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1178 07:49:46.972274 PCI: 00:00.0
1179 07:49:46.982348 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1180 07:49:46.988911 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1181 07:49:46.991902
1182 07:49:46.998448 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1183 07:49:47.008228 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1184 07:49:47.018205 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1185 07:49:47.028361 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1186 07:49:47.037901 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1187 07:49:47.048042 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1188 07:49:47.054905 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1189 07:49:47.064351 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1190 07:49:47.074114 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1191 07:49:47.083948 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1192 07:49:47.094201 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1193 07:49:47.100653 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1194 07:49:47.110255 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1195 07:49:47.120319 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1196 07:49:47.130318 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1197 07:49:47.140321 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1198 07:49:47.150014 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1199 07:49:47.160030 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1200 07:49:47.160474 PCI: 00:02.0
1201 07:49:47.169723 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1202 07:49:47.183280 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1203 07:49:47.189426 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1204 07:49:47.192956 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1205 07:49:47.196362
1206 07:49:47.206527 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1207 07:49:47.206976 GENERIC: 0.0
1208 07:49:47.209453 PCI: 00:05.0
1209 07:49:47.219491 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1210 07:49:47.222606 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1211 07:49:47.226222 GENERIC: 0.0
1212 07:49:47.226662 PCI: 00:08.0
1213 07:49:47.235605 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 07:49:47.239007 PCI: 00:0a.0
1215 07:49:47.242105 PCI: 00:0d.0 child on link 0 USB0 port 0
1216 07:49:47.252091 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1217 07:49:47.255482 USB0 port 0 child on link 0 USB3 port 0
1218 07:49:47.258410 USB3 port 0
1219 07:49:47.258854 USB3 port 1
1220 07:49:47.262028
1221 07:49:47.262472 USB3 port 2
1222 07:49:47.265025 USB3 port 3
1223 07:49:47.268530 PCI: 00:14.0 child on link 0 USB0 port 0
1224 07:49:47.278237 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1225 07:49:47.281775 USB0 port 0 child on link 0 USB2 port 0
1226 07:49:47.284733 USB2 port 0
1227 07:49:47.285177 USB2 port 1
1228 07:49:47.288300 USB2 port 2
1229 07:49:47.288742 USB2 port 3
1230 07:49:47.291744 USB2 port 4
1231 07:49:47.292188 USB2 port 5
1232 07:49:47.294797
1233 07:49:47.295239 USB2 port 6
1234 07:49:47.298390 USB2 port 7
1235 07:49:47.298828 USB2 port 8
1236 07:49:47.301316 USB2 port 9
1237 07:49:47.301787 USB3 port 0
1238 07:49:47.304740 USB3 port 1
1239 07:49:47.305185 USB3 port 2
1240 07:49:47.308267 USB3 port 3
1241 07:49:47.308711 PCI: 00:14.2
1242 07:49:47.318278 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 07:49:47.327826 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1244 07:49:47.334321 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1245 07:49:47.344514 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 07:49:47.344976 GENERIC: 0.0
1247 07:49:47.347723 PCI: 00:15.0 child on link 0 I2C: 00:1a
1248 07:49:47.350745
1249 07:49:47.357499 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 07:49:47.360980
1251 07:49:47.361405 I2C: 00:1a
1252 07:49:47.361782 I2C: 00:31
1253 07:49:47.364226 I2C: 00:32
1254 07:49:47.367795 PCI: 00:15.1 child on link 0 I2C: 00:10
1255 07:49:47.377642 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 07:49:47.380602 I2C: 00:10
1257 07:49:47.381037 PCI: 00:15.2
1258 07:49:47.390714 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 07:49:47.393802 PCI: 00:15.3
1260 07:49:47.403775 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 07:49:47.404254 PCI: 00:16.0
1262 07:49:47.414058 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 07:49:47.417088 PCI: 00:19.0
1264 07:49:47.420697 PCI: 00:19.1 child on link 0 I2C: 00:15
1265 07:49:47.430395 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 07:49:47.433805 I2C: 00:15
1267 07:49:47.437104 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1268 07:49:47.447156 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1269 07:49:47.456687 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1270 07:49:47.463479 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1271 07:49:47.466797 GENERIC: 0.0
1272 07:49:47.467266 PCI: 01:00.0
1273 07:49:47.476462 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1274 07:49:47.486715 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1275 07:49:47.489772 PCI: 00:1e.0
1276 07:49:47.499818 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1277 07:49:47.503036 PCI: 00:1e.2 child on link 0 SPI: 00
1278 07:49:47.513051 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1279 07:49:47.516089 SPI: 00
1280 07:49:47.519604 PCI: 00:1e.3 child on link 0 SPI: 00
1281 07:49:47.529692 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1282 07:49:47.530185 SPI: 00
1283 07:49:47.536155 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1284 07:49:47.542640 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1285 07:49:47.546038 PNP: 0c09.0
1286 07:49:47.556072 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1287 07:49:47.559572 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1288 07:49:47.568968 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1289 07:49:47.579226 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1290 07:49:47.582102 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1291 07:49:47.582538 GENERIC: 0.0
1292 07:49:47.585574
1293 07:49:47.586013 GENERIC: 1.0
1294 07:49:47.589054 PCI: 00:1f.3
1295 07:49:47.598754 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1296 07:49:47.608630 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1297 07:49:47.609070 PCI: 00:1f.5
1298 07:49:47.618673 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1299 07:49:47.621869 CPU_CLUSTER: 0 child on link 0 APIC: 00
1300 07:49:47.625373 APIC: 00
1301 07:49:47.625814 APIC: 01
1302 07:49:47.626160 APIC: 03
1303 07:49:47.628345 APIC: 06
1304 07:49:47.628831 APIC: 05
1305 07:49:47.631828 APIC: 04
1306 07:49:47.632277 APIC: 02
1307 07:49:47.632715 APIC: 07
1308 07:49:47.641579 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1309 07:49:47.645176 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1310 07:49:47.651874 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1311 07:49:47.658368 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1312 07:49:47.661904 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1313 07:49:47.668117 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1314 07:49:47.674886 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1315 07:49:47.681431 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1316 07:49:47.688363 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1317 07:49:47.694915 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1318 07:49:47.701468 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1319 07:49:47.711366 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1320 07:49:47.717865 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1321 07:49:47.724641 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1322 07:49:47.727653 DOMAIN: 0000: Resource ranges:
1323 07:49:47.731202 * Base: 1000, Size: 800, Tag: 100
1324 07:49:47.734816 * Base: 1900, Size: e700, Tag: 100
1325 07:49:47.741276 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1326 07:49:47.747711 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1327 07:49:47.754558 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1328 07:49:47.760848 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1329 07:49:47.770720 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1330 07:49:47.777425 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1331 07:49:47.783955 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1332 07:49:47.794021 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1333 07:49:47.800633 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1334 07:49:47.807093 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1335 07:49:47.817419 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1336 07:49:47.823545 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1337 07:49:47.830341 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1338 07:49:47.840395 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1339 07:49:47.846818 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1340 07:49:47.853206 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1341 07:49:47.863169 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1342 07:49:47.869988 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1343 07:49:47.876398 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1344 07:49:47.886652 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1345 07:49:47.893134 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1346 07:49:47.899735 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1347 07:49:47.909409 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1348 07:49:47.916536 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1349 07:49:47.923122 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1350 07:49:47.926072 DOMAIN: 0000: Resource ranges:
1351 07:49:47.933031 * Base: 7fc00000, Size: 40400000, Tag: 200
1352 07:49:47.936101 * Base: d0000000, Size: 28000000, Tag: 200
1353 07:49:47.939216 * Base: fa000000, Size: 1000000, Tag: 200
1354 07:49:47.945909 * Base: fb001000, Size: 2fff000, Tag: 200
1355 07:49:47.949402 * Base: fe010000, Size: 2e000, Tag: 200
1356 07:49:47.952423 * Base: fe03f000, Size: d41000, Tag: 200
1357 07:49:47.955796 * Base: fed88000, Size: 8000, Tag: 200
1358 07:49:47.959352 * Base: fed93000, Size: d000, Tag: 200
1359 07:49:47.965798 * Base: feda2000, Size: 1e000, Tag: 200
1360 07:49:47.969059 * Base: fede0000, Size: 1220000, Tag: 200
1361 07:49:47.972445 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1362 07:49:47.975515
1363 07:49:47.982506 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1364 07:49:47.988731 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1365 07:49:47.995738 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1366 07:49:48.002208 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1367 07:49:48.008758 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1368 07:49:48.015377 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1369 07:49:48.021889 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1370 07:49:48.028378 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1371 07:49:48.035009 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1372 07:49:48.041556 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1373 07:49:48.048293 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1374 07:49:48.054828 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1375 07:49:48.061226 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1376 07:49:48.067929 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1377 07:49:48.074690 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1378 07:49:48.081273 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1379 07:49:48.087498 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1380 07:49:48.094552 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1381 07:49:48.101032 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1382 07:49:48.107575 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1383 07:49:48.114076 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1384 07:49:48.121252 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1385 07:49:48.127199 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1386 07:49:48.134223 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1387 07:49:48.137246 PCI: 00:1d.0: Resource ranges:
1388 07:49:48.143958 * Base: 7fc00000, Size: 100000, Tag: 200
1389 07:49:48.150725 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1390 07:49:48.157390 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1391 07:49:48.163791 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1392 07:49:48.170469 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1393 07:49:48.177122 Root Device assign_resources, bus 0 link: 0
1394 07:49:48.180244 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 07:49:48.190099 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1396 07:49:48.196537 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1397 07:49:48.206944 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1398 07:49:48.213599 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1399 07:49:48.216579 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 07:49:48.223399 PCI: 00:04.0 assign_resources, bus 1 link: 0
1401 07:49:48.229801 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1402 07:49:48.239884 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1403 07:49:48.246571 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1404 07:49:48.252822 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1405 07:49:48.256368 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1406 07:49:48.266039 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1407 07:49:48.269489 PCI: 00:14.0 assign_resources, bus 0 link: 0
1408 07:49:48.272940 PCI: 00:14.0 assign_resources, bus 0 link: 0
1409 07:49:48.282438 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1410 07:49:48.289290 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1411 07:49:48.298991 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1412 07:49:48.302648 PCI: 00:14.3 assign_resources, bus 0 link: 0
1413 07:49:48.308941 PCI: 00:14.3 assign_resources, bus 0 link: 0
1414 07:49:48.316001 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1415 07:49:48.319053 PCI: 00:15.0 assign_resources, bus 0 link: 0
1416 07:49:48.325619 PCI: 00:15.0 assign_resources, bus 0 link: 0
1417 07:49:48.332304 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1418 07:49:48.339073 PCI: 00:15.1 assign_resources, bus 0 link: 0
1419 07:49:48.342123 PCI: 00:15.1 assign_resources, bus 0 link: 0
1420 07:49:48.351954 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1421 07:49:48.358521 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1422 07:49:48.368339 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1423 07:49:48.374912 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1424 07:49:48.378124 PCI: 00:19.1 assign_resources, bus 0 link: 0
1425 07:49:48.384783 PCI: 00:19.1 assign_resources, bus 0 link: 0
1426 07:49:48.391349 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1427 07:49:48.401861 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1428 07:49:48.404962
1429 07:49:48.411389 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1430 07:49:48.414615 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1431 07:49:48.424719 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1432 07:49:48.431305 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1433 07:49:48.437782 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1434 07:49:48.444379 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1435 07:49:48.450851 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1436 07:49:48.454290 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1437 07:49:48.464356 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1438 07:49:48.467803 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1439 07:49:48.471058 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1440 07:49:48.477218 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1441 07:49:48.480672 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1442 07:49:48.487046 LPC: Trying to open IO window from 800 size 1ff
1443 07:49:48.493651 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1444 07:49:48.503583 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1445 07:49:48.510600 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1446 07:49:48.516700 DOMAIN: 0000 assign_resources, bus 0 link: 0
1447 07:49:48.520365 Root Device assign_resources, bus 0 link: 0
1448 07:49:48.523340 Done setting resources.
1449 07:49:48.529931 Show resources in subtree (Root Device)...After assigning values.
1450 07:49:48.533496 Root Device child on link 0 DOMAIN: 0000
1451 07:49:48.537203 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1452 07:49:48.546767 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1453 07:49:48.556315 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1454 07:49:48.560390 PCI: 00:00.0
1455 07:49:48.569630 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1456 07:49:48.576309 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1457 07:49:48.586297 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1458 07:49:48.596308 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1459 07:49:48.606346 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1460 07:49:48.615801 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1461 07:49:48.626127 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1462 07:49:48.632598 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1463 07:49:48.642642 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1464 07:49:48.652687 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1465 07:49:48.662001 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1466 07:49:48.671979 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1467 07:49:48.682303 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1468 07:49:48.688430 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1469 07:49:48.698456 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1470 07:49:48.708525 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1471 07:49:48.718409 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1472 07:49:48.728124 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1473 07:49:48.738394 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1474 07:49:48.748023 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1475 07:49:48.748105 PCI: 00:02.0
1476 07:49:48.758096 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1477 07:49:48.771296 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1478 07:49:48.777967 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1479 07:49:48.784768 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1480 07:49:48.794413 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1481 07:49:48.794506 GENERIC: 0.0
1482 07:49:48.798025 PCI: 00:05.0
1483 07:49:48.808031 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1484 07:49:48.811022 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1485 07:49:48.814466
1486 07:49:48.814553 GENERIC: 0.0
1487 07:49:48.817568 PCI: 00:08.0
1488 07:49:48.827659 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1489 07:49:48.827749 PCI: 00:0a.0
1490 07:49:48.831218 PCI: 00:0d.0 child on link 0 USB0 port 0
1491 07:49:48.834281
1492 07:49:48.844267 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1493 07:49:48.847284 USB0 port 0 child on link 0 USB3 port 0
1494 07:49:48.850493 USB3 port 0
1495 07:49:48.850580 USB3 port 1
1496 07:49:48.853948 USB3 port 2
1497 07:49:48.854035 USB3 port 3
1498 07:49:48.860365 PCI: 00:14.0 child on link 0 USB0 port 0
1499 07:49:48.870124 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1500 07:49:48.873495 USB0 port 0 child on link 0 USB2 port 0
1501 07:49:48.877044 USB2 port 0
1502 07:49:48.877127 USB2 port 1
1503 07:49:48.880465 USB2 port 2
1504 07:49:48.880544 USB2 port 3
1505 07:49:48.883396 USB2 port 4
1506 07:49:48.883475 USB2 port 5
1507 07:49:48.886814 USB2 port 6
1508 07:49:48.886889 USB2 port 7
1509 07:49:48.890209 USB2 port 8
1510 07:49:48.890287 USB2 port 9
1511 07:49:48.893211 USB3 port 0
1512 07:49:48.893290 USB3 port 1
1513 07:49:48.896856 USB3 port 2
1514 07:49:48.900362 USB3 port 3
1515 07:49:48.900452 PCI: 00:14.2
1516 07:49:48.909829 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1517 07:49:48.920034 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1518 07:49:48.926354 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1519 07:49:48.936164 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1520 07:49:48.936249 GENERIC: 0.0
1521 07:49:48.942918 PCI: 00:15.0 child on link 0 I2C: 00:1a
1522 07:49:48.953253 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1523 07:49:48.953352 I2C: 00:1a
1524 07:49:48.956128 I2C: 00:31
1525 07:49:48.956231 I2C: 00:32
1526 07:49:48.959236 PCI: 00:15.1 child on link 0 I2C: 00:10
1527 07:49:48.962800
1528 07:49:48.972609 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1529 07:49:48.972697 I2C: 00:10
1530 07:49:48.975803 PCI: 00:15.2
1531 07:49:48.985566 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1532 07:49:48.985654 PCI: 00:15.3
1533 07:49:48.995690 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1534 07:49:48.999101 PCI: 00:16.0
1535 07:49:49.008752 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1536 07:49:49.008856 PCI: 00:19.0
1537 07:49:49.015206 PCI: 00:19.1 child on link 0 I2C: 00:15
1538 07:49:49.025730 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1539 07:49:49.025817 I2C: 00:15
1540 07:49:49.032425 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1541 07:49:49.042115 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1542 07:49:49.051990 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1543 07:49:49.062044 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1544 07:49:49.064999 GENERIC: 0.0
1545 07:49:49.065083 PCI: 01:00.0
1546 07:49:49.075200 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1547 07:49:49.088334 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1548 07:49:49.088422 PCI: 00:1e.0
1549 07:49:49.098357 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1550 07:49:49.104894 PCI: 00:1e.2 child on link 0 SPI: 00
1551 07:49:49.114845 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1552 07:49:49.114935 SPI: 00
1553 07:49:49.117965 PCI: 00:1e.3 child on link 0 SPI: 00
1554 07:49:49.127784 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1555 07:49:49.131578
1556 07:49:49.131663 SPI: 00
1557 07:49:49.134601 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1558 07:49:49.144395 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1559 07:49:49.144483 PNP: 0c09.0
1560 07:49:49.154308 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1561 07:49:49.157995 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1562 07:49:49.167377 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1563 07:49:49.177268 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1564 07:49:49.180665 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1565 07:49:49.184174 GENERIC: 0.0
1566 07:49:49.187633 GENERIC: 1.0
1567 07:49:49.187719 PCI: 00:1f.3
1568 07:49:49.197460 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1569 07:49:49.207274 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1570 07:49:49.210292 PCI: 00:1f.5
1571 07:49:49.220376 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1572 07:49:49.223607 CPU_CLUSTER: 0 child on link 0 APIC: 00
1573 07:49:49.226954 APIC: 00
1574 07:49:49.227040 APIC: 01
1575 07:49:49.227108 APIC: 03
1576 07:49:49.230431 APIC: 06
1577 07:49:49.230517 APIC: 05
1578 07:49:49.233666 APIC: 04
1579 07:49:49.233761 APIC: 02
1580 07:49:49.233830 APIC: 07
1581 07:49:49.237327 Done allocating resources.
1582 07:49:49.243578 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1583 07:49:49.250179 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1584 07:49:49.253741 Configure GPIOs for I2S audio on UP4.
1585 07:49:49.260081 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1586 07:49:49.263420 Enabling resources...
1587 07:49:49.266938 PCI: 00:00.0 subsystem <- 8086/9a12
1588 07:49:49.270191 PCI: 00:00.0 cmd <- 06
1589 07:49:49.273397 PCI: 00:02.0 subsystem <- 8086/9a40
1590 07:49:49.276368 PCI: 00:02.0 cmd <- 03
1591 07:49:49.280121 PCI: 00:04.0 subsystem <- 8086/9a03
1592 07:49:49.280221 PCI: 00:04.0 cmd <- 02
1593 07:49:49.286894 PCI: 00:05.0 subsystem <- 8086/9a19
1594 07:49:49.286993 PCI: 00:05.0 cmd <- 02
1595 07:49:49.289894 PCI: 00:08.0 subsystem <- 8086/9a11
1596 07:49:49.293176 PCI: 00:08.0 cmd <- 06
1597 07:49:49.296721 PCI: 00:0d.0 subsystem <- 8086/9a13
1598 07:49:49.299821 PCI: 00:0d.0 cmd <- 02
1599 07:49:49.303330 PCI: 00:14.0 subsystem <- 8086/a0ed
1600 07:49:49.306361 PCI: 00:14.0 cmd <- 02
1601 07:49:49.309948 PCI: 00:14.2 subsystem <- 8086/a0ef
1602 07:49:49.312711 PCI: 00:14.2 cmd <- 02
1603 07:49:49.316309 PCI: 00:14.3 subsystem <- 8086/a0f0
1604 07:49:49.319676 PCI: 00:14.3 cmd <- 02
1605 07:49:49.322710 PCI: 00:15.0 subsystem <- 8086/a0e8
1606 07:49:49.326249 PCI: 00:15.0 cmd <- 02
1607 07:49:49.329081 PCI: 00:15.1 subsystem <- 8086/a0e9
1608 07:49:49.329158 PCI: 00:15.1 cmd <- 02
1609 07:49:49.332741
1610 07:49:49.335965 PCI: 00:15.2 subsystem <- 8086/a0ea
1611 07:49:49.336039 PCI: 00:15.2 cmd <- 02
1612 07:49:49.342686 PCI: 00:15.3 subsystem <- 8086/a0eb
1613 07:49:49.342761 PCI: 00:15.3 cmd <- 02
1614 07:49:49.345570 PCI: 00:16.0 subsystem <- 8086/a0e0
1615 07:49:49.348776 PCI: 00:16.0 cmd <- 02
1616 07:49:49.352283 PCI: 00:19.1 subsystem <- 8086/a0c6
1617 07:49:49.355684 PCI: 00:19.1 cmd <- 02
1618 07:49:49.358698 PCI: 00:1d.0 bridge ctrl <- 0013
1619 07:49:49.362476 PCI: 00:1d.0 subsystem <- 8086/a0b0
1620 07:49:49.365534 PCI: 00:1d.0 cmd <- 06
1621 07:49:49.369032 PCI: 00:1e.0 subsystem <- 8086/a0a8
1622 07:49:49.372051 PCI: 00:1e.0 cmd <- 06
1623 07:49:49.375449 PCI: 00:1e.2 subsystem <- 8086/a0aa
1624 07:49:49.378562 PCI: 00:1e.2 cmd <- 06
1625 07:49:49.381957 PCI: 00:1e.3 subsystem <- 8086/a0ab
1626 07:49:49.385666 PCI: 00:1e.3 cmd <- 02
1627 07:49:49.388866 PCI: 00:1f.0 subsystem <- 8086/a087
1628 07:49:49.388945 PCI: 00:1f.0 cmd <- 407
1629 07:49:49.391712
1630 07:49:49.395288 PCI: 00:1f.3 subsystem <- 8086/a0c8
1631 07:49:49.395374 PCI: 00:1f.3 cmd <- 02
1632 07:49:49.401603 PCI: 00:1f.5 subsystem <- 8086/a0a4
1633 07:49:49.401690 PCI: 00:1f.5 cmd <- 406
1634 07:49:49.406994 PCI: 01:00.0 cmd <- 02
1635 07:49:49.411403 done.
1636 07:49:49.414813 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1637 07:49:49.418373 Initializing devices...
1638 07:49:49.421235 Root Device init
1639 07:49:49.424694 Chrome EC: Set SMI mask to 0x0000000000000000
1640 07:49:49.431222 Chrome EC: clear events_b mask to 0x0000000000000000
1641 07:49:49.437933 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1642 07:49:49.441126 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1643 07:49:49.448224 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1644 07:49:49.454758 Chrome EC: Set WAKE mask to 0x0000000000000000
1645 07:49:49.457794 fw_config match found: DB_USB=USB3_ACTIVE
1646 07:49:49.464376 Configure Right Type-C port orientation for retimer
1647 07:49:49.467491 Root Device init finished in 43 msecs
1648 07:49:49.471052 PCI: 00:00.0 init
1649 07:49:49.474045 CPU TDP = 9 Watts
1650 07:49:49.474131 CPU PL1 = 9 Watts
1651 07:49:49.477368 CPU PL2 = 40 Watts
1652 07:49:49.480866 CPU PL4 = 83 Watts
1653 07:49:49.483893 PCI: 00:00.0 init finished in 8 msecs
1654 07:49:49.483988 PCI: 00:02.0 init
1655 07:49:49.487476 GMA: Found VBT in CBFS
1656 07:49:49.490644 GMA: Found valid VBT in CBFS
1657 07:49:49.497237 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1658 07:49:49.503881 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1659 07:49:49.507203 PCI: 00:02.0 init finished in 18 msecs
1660 07:49:49.510422 PCI: 00:05.0 init
1661 07:49:49.514052 PCI: 00:05.0 init finished in 0 msecs
1662 07:49:49.517317 PCI: 00:08.0 init
1663 07:49:49.520757 PCI: 00:08.0 init finished in 0 msecs
1664 07:49:49.523610 PCI: 00:14.0 init
1665 07:49:49.527239 PCI: 00:14.0 init finished in 0 msecs
1666 07:49:49.530382 PCI: 00:14.2 init
1667 07:49:49.533735 PCI: 00:14.2 init finished in 0 msecs
1668 07:49:49.536772 PCI: 00:15.0 init
1669 07:49:49.536848 I2C bus 0 version 0x3230302a
1670 07:49:49.543880 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1671 07:49:49.546837 PCI: 00:15.0 init finished in 6 msecs
1672 07:49:49.546915 PCI: 00:15.1 init
1673 07:49:49.549955 I2C bus 1 version 0x3230302a
1674 07:49:49.553418 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1675 07:49:49.560012 PCI: 00:15.1 init finished in 6 msecs
1676 07:49:49.560092 PCI: 00:15.2 init
1677 07:49:49.563208 I2C bus 2 version 0x3230302a
1678 07:49:49.566881 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1679 07:49:49.569753 PCI: 00:15.2 init finished in 6 msecs
1680 07:49:49.573264 PCI: 00:15.3 init
1681 07:49:49.576328 I2C bus 3 version 0x3230302a
1682 07:49:49.579802 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1683 07:49:49.583236 PCI: 00:15.3 init finished in 6 msecs
1684 07:49:49.586249 PCI: 00:16.0 init
1685 07:49:49.589716 PCI: 00:16.0 init finished in 0 msecs
1686 07:49:49.592791 PCI: 00:19.1 init
1687 07:49:49.596116 I2C bus 5 version 0x3230302a
1688 07:49:49.599370 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1689 07:49:49.602777 PCI: 00:19.1 init finished in 6 msecs
1690 07:49:49.606060 PCI: 00:1d.0 init
1691 07:49:49.609792 Initializing PCH PCIe bridge.
1692 07:49:49.612871 PCI: 00:1d.0 init finished in 3 msecs
1693 07:49:49.615927 PCI: 00:1f.0 init
1694 07:49:49.619193 IOAPIC: Initializing IOAPIC at 0xfec00000
1695 07:49:49.622660 IOAPIC: Bootstrap Processor Local APIC = 0x00
1696 07:49:49.626119 IOAPIC: ID = 0x02
1697 07:49:49.629258 IOAPIC: Dumping registers
1698 07:49:49.629374 reg 0x0000: 0x02000000
1699 07:49:49.633019 reg 0x0001: 0x00770020
1700 07:49:49.635981 reg 0x0002: 0x00000000
1701 07:49:49.639200 PCI: 00:1f.0 init finished in 21 msecs
1702 07:49:49.642412 PCI: 00:1f.2 init
1703 07:49:49.646109 Disabling ACPI via APMC.
1704 07:49:49.646184 APMC done.
1705 07:49:49.652207 PCI: 00:1f.2 init finished in 5 msecs
1706 07:49:49.662818 PCI: 01:00.0 init
1707 07:49:49.666440 PCI: 01:00.0 init finished in 0 msecs
1708 07:49:49.669576 PNP: 0c09.0 init
1709 07:49:49.672819 Google Chrome EC uptime: 8.286 seconds
1710 07:49:49.679485 Google Chrome AP resets since EC boot: 1
1711 07:49:49.682770 Google Chrome most recent AP reset causes:
1712 07:49:49.685741 0.482: 32775 shutdown: entering G3
1713 07:49:49.692430 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1714 07:49:49.695797 PNP: 0c09.0 init finished in 22 msecs
1715 07:49:49.701749 Devices initialized
1716 07:49:49.705097 Show all devs... After init.
1717 07:49:49.708694 Root Device: enabled 1
1718 07:49:49.708770 DOMAIN: 0000: enabled 1
1719 07:49:49.711558 CPU_CLUSTER: 0: enabled 1
1720 07:49:49.714811 PCI: 00:00.0: enabled 1
1721 07:49:49.718402 PCI: 00:02.0: enabled 1
1722 07:49:49.718484 PCI: 00:04.0: enabled 1
1723 07:49:49.721730 PCI: 00:05.0: enabled 1
1724 07:49:49.725090 PCI: 00:06.0: enabled 0
1725 07:49:49.728121 PCI: 00:07.0: enabled 0
1726 07:49:49.728192 PCI: 00:07.1: enabled 0
1727 07:49:49.731440 PCI: 00:07.2: enabled 0
1728 07:49:49.734881 PCI: 00:07.3: enabled 0
1729 07:49:49.738056 PCI: 00:08.0: enabled 1
1730 07:49:49.738148 PCI: 00:09.0: enabled 0
1731 07:49:49.741442 PCI: 00:0a.0: enabled 0
1732 07:49:49.744572 PCI: 00:0d.0: enabled 1
1733 07:49:49.747989 PCI: 00:0d.1: enabled 0
1734 07:49:49.748075 PCI: 00:0d.2: enabled 0
1735 07:49:49.751473 PCI: 00:0d.3: enabled 0
1736 07:49:49.754972 PCI: 00:0e.0: enabled 0
1737 07:49:49.755055 PCI: 00:10.2: enabled 1
1738 07:49:49.758040
1739 07:49:49.758124 PCI: 00:10.6: enabled 0
1740 07:49:49.761714 PCI: 00:10.7: enabled 0
1741 07:49:49.764620 PCI: 00:12.0: enabled 0
1742 07:49:49.764697 PCI: 00:12.6: enabled 0
1743 07:49:49.768361 PCI: 00:13.0: enabled 0
1744 07:49:49.771388 PCI: 00:14.0: enabled 1
1745 07:49:49.774607 PCI: 00:14.1: enabled 0
1746 07:49:49.774680 PCI: 00:14.2: enabled 1
1747 07:49:49.777965 PCI: 00:14.3: enabled 1
1748 07:49:49.781112 PCI: 00:15.0: enabled 1
1749 07:49:49.784543 PCI: 00:15.1: enabled 1
1750 07:49:49.784618 PCI: 00:15.2: enabled 1
1751 07:49:49.787973 PCI: 00:15.3: enabled 1
1752 07:49:49.791408 PCI: 00:16.0: enabled 1
1753 07:49:49.794507 PCI: 00:16.1: enabled 0
1754 07:49:49.794605 PCI: 00:16.2: enabled 0
1755 07:49:49.797888 PCI: 00:16.3: enabled 0
1756 07:49:49.801163 PCI: 00:16.4: enabled 0
1757 07:49:49.804137 PCI: 00:16.5: enabled 0
1758 07:49:49.804219 PCI: 00:17.0: enabled 0
1759 07:49:49.807622 PCI: 00:19.0: enabled 0
1760 07:49:49.810984 PCI: 00:19.1: enabled 1
1761 07:49:49.811068 PCI: 00:19.2: enabled 0
1762 07:49:49.814015 PCI: 00:1c.0: enabled 1
1763 07:49:49.817787 PCI: 00:1c.1: enabled 0
1764 07:49:49.821131 PCI: 00:1c.2: enabled 0
1765 07:49:49.821209 PCI: 00:1c.3: enabled 0
1766 07:49:49.824320 PCI: 00:1c.4: enabled 0
1767 07:49:49.827265 PCI: 00:1c.5: enabled 0
1768 07:49:49.830624 PCI: 00:1c.6: enabled 1
1769 07:49:49.830698 PCI: 00:1c.7: enabled 0
1770 07:49:49.834250 PCI: 00:1d.0: enabled 1
1771 07:49:49.837311 PCI: 00:1d.1: enabled 0
1772 07:49:49.840824 PCI: 00:1d.2: enabled 1
1773 07:49:49.840895 PCI: 00:1d.3: enabled 0
1774 07:49:49.843812 PCI: 00:1e.0: enabled 1
1775 07:49:49.847402 PCI: 00:1e.1: enabled 0
1776 07:49:49.850450 PCI: 00:1e.2: enabled 1
1777 07:49:49.850522 PCI: 00:1e.3: enabled 1
1778 07:49:49.853932 PCI: 00:1f.0: enabled 1
1779 07:49:49.857146 PCI: 00:1f.1: enabled 0
1780 07:49:49.857218 PCI: 00:1f.2: enabled 1
1781 07:49:49.860253
1782 07:49:49.860326 PCI: 00:1f.3: enabled 1
1783 07:49:49.863969 PCI: 00:1f.4: enabled 0
1784 07:49:49.867364 PCI: 00:1f.5: enabled 1
1785 07:49:49.867437 PCI: 00:1f.6: enabled 0
1786 07:49:49.870209 PCI: 00:1f.7: enabled 0
1787 07:49:49.873469 APIC: 00: enabled 1
1788 07:49:49.877009 GENERIC: 0.0: enabled 1
1789 07:49:49.877077 GENERIC: 0.0: enabled 1
1790 07:49:49.880591 GENERIC: 1.0: enabled 1
1791 07:49:49.883760 GENERIC: 0.0: enabled 1
1792 07:49:49.883831 GENERIC: 1.0: enabled 1
1793 07:49:49.887097
1794 07:49:49.887175 USB0 port 0: enabled 1
1795 07:49:49.890219 GENERIC: 0.0: enabled 1
1796 07:49:49.893599 USB0 port 0: enabled 1
1797 07:49:49.893688 GENERIC: 0.0: enabled 1
1798 07:49:49.896749 I2C: 00:1a: enabled 1
1799 07:49:49.900176 I2C: 00:31: enabled 1
1800 07:49:49.900259 I2C: 00:32: enabled 1
1801 07:49:49.903412 I2C: 00:10: enabled 1
1802 07:49:49.906702 I2C: 00:15: enabled 1
1803 07:49:49.910337 GENERIC: 0.0: enabled 0
1804 07:49:49.910417 GENERIC: 1.0: enabled 0
1805 07:49:49.913083 GENERIC: 0.0: enabled 1
1806 07:49:49.916684 SPI: 00: enabled 1
1807 07:49:49.916762 SPI: 00: enabled 1
1808 07:49:49.919891 PNP: 0c09.0: enabled 1
1809 07:49:49.923240 GENERIC: 0.0: enabled 1
1810 07:49:49.923317 USB3 port 0: enabled 1
1811 07:49:49.926715 USB3 port 1: enabled 1
1812 07:49:49.930242 USB3 port 2: enabled 0
1813 07:49:49.930326 USB3 port 3: enabled 0
1814 07:49:49.933416
1815 07:49:49.933526 USB2 port 0: enabled 0
1816 07:49:49.936660 USB2 port 1: enabled 1
1817 07:49:49.939764 USB2 port 2: enabled 1
1818 07:49:49.939870 USB2 port 3: enabled 0
1819 07:49:49.942743 USB2 port 4: enabled 1
1820 07:49:49.946196 USB2 port 5: enabled 0
1821 07:49:49.946270 USB2 port 6: enabled 0
1822 07:49:49.949497 USB2 port 7: enabled 0
1823 07:49:49.952853 USB2 port 8: enabled 0
1824 07:49:49.956322 USB2 port 9: enabled 0
1825 07:49:49.956393 USB3 port 0: enabled 0
1826 07:49:49.959445 USB3 port 1: enabled 1
1827 07:49:49.962969 USB3 port 2: enabled 0
1828 07:49:49.963051 USB3 port 3: enabled 0
1829 07:49:49.966419 GENERIC: 0.0: enabled 1
1830 07:49:49.969943 GENERIC: 1.0: enabled 1
1831 07:49:49.973030 APIC: 01: enabled 1
1832 07:49:49.973107 APIC: 03: enabled 1
1833 07:49:49.975937 APIC: 06: enabled 1
1834 07:49:49.976013 APIC: 05: enabled 1
1835 07:49:49.979504 APIC: 04: enabled 1
1836 07:49:49.982561 APIC: 02: enabled 1
1837 07:49:49.982638 APIC: 07: enabled 1
1838 07:49:49.986086 PCI: 01:00.0: enabled 1
1839 07:49:49.992603 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1840 07:49:49.995828 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1841 07:49:49.999041 ELOG: NV offset 0xf30000 size 0x1000
1842 07:49:50.007251 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1843 07:49:50.013589 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:50 UTC
1844 07:49:50.020089 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:50 UTC
1845 07:49:50.026572 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:50 UTC
1846 07:49:50.033581 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:50 UTC
1847 07:49:50.039743 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:50 UTC
1848 07:49:50.046432 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1849 07:49:50.053189 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:50 UTC
1850 07:49:50.059735 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1851 07:49:50.066392 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:50 UTC
1852 07:49:50.069273 elog_add_boot_reason: Logged dev mode boot
1853 07:49:50.076159 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1854 07:49:50.076244 Finalize devices...
1855 07:49:50.079519
1856 07:49:50.079602 Devices finalized
1857 07:49:50.086151 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1858 07:49:50.089622 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1859 07:49:50.095936 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1860 07:49:50.099445 ME: HFSTS1 : 0x80030055
1861 07:49:50.105681 ME: HFSTS2 : 0x30280116
1862 07:49:50.109343 ME: HFSTS3 : 0x00000050
1863 07:49:50.112700 ME: HFSTS4 : 0x00004000
1864 07:49:50.119008 ME: HFSTS5 : 0x00000000
1865 07:49:50.122552 ME: HFSTS6 : 0x40400006
1866 07:49:50.125641 ME: Manufacturing Mode : YES
1867 07:49:50.128991 ME: SPI Protection Mode Enabled : NO
1868 07:49:50.136121 ME: FW Partition Table : OK
1869 07:49:50.138970 ME: Bringup Loader Failure : NO
1870 07:49:50.142622 ME: Firmware Init Complete : NO
1871 07:49:50.145461 ME: Boot Options Present : NO
1872 07:49:50.149239 ME: Update In Progress : NO
1873 07:49:50.152282 ME: D0i3 Support : YES
1874 07:49:50.155475 ME: Low Power State Enabled : NO
1875 07:49:50.159135 ME: CPU Replaced : YES
1876 07:49:50.165979 ME: CPU Replacement Valid : YES
1877 07:49:50.168895 ME: Current Working State : 5
1878 07:49:50.172368 ME: Current Operation State : 1
1879 07:49:50.175821 ME: Current Operation Mode : 3
1880 07:49:50.178909 ME: Error Code : 0
1881 07:49:50.182468 ME: Enhanced Debug Mode : NO
1882 07:49:50.185373 ME: CPU Debug Disabled : YES
1883 07:49:50.188763 ME: TXT Support : NO
1884 07:49:50.195192 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1885 07:49:50.205149 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1886 07:49:50.208619 CBFS: 'fallback/slic' not found.
1887 07:49:50.211601 ACPI: Writing ACPI tables at 76b01000.
1888 07:49:50.211690 ACPI: * FACS
1889 07:49:50.215241 ACPI: * DSDT
1890 07:49:50.218655 Ramoops buffer: 0x100000@0x76a00000.
1891 07:49:50.221976 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1892 07:49:50.228080 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1893 07:49:50.231658 Google Chrome EC: version:
1894 07:49:50.235186 ro: voema_v2.0.10114-a447f03e46
1895 07:49:50.238133 rw: voema_v2.0.10114-a447f03e46
1896 07:49:50.238221 running image: 2
1897 07:49:50.244738 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1898 07:49:50.249875 ACPI: * FADT
1899 07:49:50.249962 SCI is IRQ9
1900 07:49:50.252895 ACPI: added table 1/32, length now 40
1901 07:49:50.256308
1902 07:49:50.256396 ACPI: * SSDT
1903 07:49:50.259703 Found 1 CPU(s) with 8 core(s) each.
1904 07:49:50.266181 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1905 07:49:50.269697 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1906 07:49:50.272700 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1907 07:49:50.276293 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1908 07:49:50.282884 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1909 07:49:50.289421 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1910 07:49:50.292480 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1911 07:49:50.299100 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1912 07:49:50.306105 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1913 07:49:50.309275 \_SB.PCI0.RP09: Added StorageD3Enable property
1914 07:49:50.315801 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1915 07:49:50.319061 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1916 07:49:50.325447 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1917 07:49:50.329062 PS2K: Passing 80 keymaps to kernel
1918 07:49:50.336079 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1919 07:49:50.342497 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1920 07:49:50.349065 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1921 07:49:50.355535 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1922 07:49:50.362125 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1923 07:49:50.368424 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1924 07:49:50.374994 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1925 07:49:50.381665 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1926 07:49:50.385014 ACPI: added table 2/32, length now 44
1927 07:49:50.385100 ACPI: * MCFG
1928 07:49:50.391533 ACPI: added table 3/32, length now 48
1929 07:49:50.391620 ACPI: * TPM2
1930 07:49:50.394894 TPM2 log created at 0x769f0000
1931 07:49:50.398429 ACPI: added table 4/32, length now 52
1932 07:49:50.401738 ACPI: * MADT
1933 07:49:50.401821 SCI is IRQ9
1934 07:49:50.404877 ACPI: added table 5/32, length now 56
1935 07:49:50.408244 current = 76b09850
1936 07:49:50.408318 ACPI: * DMAR
1937 07:49:50.414631 ACPI: added table 6/32, length now 60
1938 07:49:50.418002 ACPI: added table 7/32, length now 64
1939 07:49:50.418086 ACPI: * HPET
1940 07:49:50.421404 ACPI: added table 8/32, length now 68
1941 07:49:50.425097 ACPI: done.
1942 07:49:50.425170 ACPI tables: 35216 bytes.
1943 07:49:50.427845
1944 07:49:50.427918 smbios_write_tables: 769ef000
1945 07:49:50.432631 EC returned error result code 3
1946 07:49:50.436190 Couldn't obtain OEM name from CBI
1947 07:49:50.440151 Create SMBIOS type 16
1948 07:49:50.443792 Create SMBIOS type 17
1949 07:49:50.446758 GENERIC: 0.0 (WIFI Device)
1950 07:49:50.446830 SMBIOS tables: 1734 bytes.
1951 07:49:50.449681
1952 07:49:50.453284 Writing table forward entry at 0x00000500
1953 07:49:50.459530 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1954 07:49:50.462878 Writing coreboot table at 0x76b25000
1955 07:49:50.469481 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1956 07:49:50.473067 1. 0000000000001000-000000000009ffff: RAM
1957 07:49:50.476104 2. 00000000000a0000-00000000000fffff: RESERVED
1958 07:49:50.483097 3. 0000000000100000-00000000769eefff: RAM
1959 07:49:50.486373 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1960 07:49:50.492718 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1961 07:49:50.499556 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1962 07:49:50.502758 7. 0000000077000000-000000007fbfffff: RESERVED
1963 07:49:50.509709 8. 00000000c0000000-00000000cfffffff: RESERVED
1964 07:49:50.512622 9. 00000000f8000000-00000000f9ffffff: RESERVED
1965 07:49:50.516158 10. 00000000fb000000-00000000fb000fff: RESERVED
1966 07:49:50.522964 11. 00000000fe000000-00000000fe00ffff: RESERVED
1967 07:49:50.525753 12. 00000000fed80000-00000000fed87fff: RESERVED
1968 07:49:50.532918 13. 00000000fed90000-00000000fed92fff: RESERVED
1969 07:49:50.535911 14. 00000000feda0000-00000000feda1fff: RESERVED
1970 07:49:50.542334 15. 00000000fedc0000-00000000feddffff: RESERVED
1971 07:49:50.545699 16. 0000000100000000-00000004803fffff: RAM
1972 07:49:50.548876 Passing 4 GPIOs to payload:
1973 07:49:50.552461 NAME | PORT | POLARITY | VALUE
1974 07:49:50.559118 lid | undefined | high | high
1975 07:49:50.565695 power | undefined | high | low
1976 07:49:50.568955 oprom | undefined | high | low
1977 07:49:50.575479 EC in RW | 0x000000e5 | high | high
1978 07:49:50.582079 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1979 07:49:50.585682 coreboot table: 1576 bytes.
1980 07:49:50.588700 IMD ROOT 0. 0x76fff000 0x00001000
1981 07:49:50.592218 IMD SMALL 1. 0x76ffe000 0x00001000
1982 07:49:50.595363 FSP MEMORY 2. 0x76c4e000 0x003b0000
1983 07:49:50.598839 VPD 3. 0x76c4d000 0x00000367
1984 07:49:50.602211 RO MCACHE 4. 0x76c4c000 0x00000fdc
1985 07:49:50.605260 CONSOLE 5. 0x76c2c000 0x00020000
1986 07:49:50.608936 FMAP 6. 0x76c2b000 0x00000578
1987 07:49:50.611907
1988 07:49:50.615423 TIME STAMP 7. 0x76c2a000 0x00000910
1989 07:49:50.618439 VBOOT WORK 8. 0x76c16000 0x00014000
1990 07:49:50.621828 ROMSTG STCK 9. 0x76c15000 0x00001000
1991 07:49:50.625152 AFTER CAR 10. 0x76c0a000 0x0000b000
1992 07:49:50.628053 RAMSTAGE 11. 0x76b97000 0x00073000
1993 07:49:50.631660 REFCODE 12. 0x76b42000 0x00055000
1994 07:49:50.634769 SMM BACKUP 13. 0x76b32000 0x00010000
1995 07:49:50.641284 4f444749 14. 0x76b30000 0x00002000
1996 07:49:50.644779 EXT VBT15. 0x76b2d000 0x0000219f
1997 07:49:50.648160 COREBOOT 16. 0x76b25000 0x00008000
1998 07:49:50.651345 ACPI 17. 0x76b01000 0x00024000
1999 07:49:50.654545 ACPI GNVS 18. 0x76b00000 0x00001000
2000 07:49:50.658074 RAMOOPS 19. 0x76a00000 0x00100000
2001 07:49:50.661499 TPM2 TCGLOG20. 0x769f0000 0x00010000
2002 07:49:50.664442 SMBIOS 21. 0x769ef000 0x00000800
2003 07:49:50.667863 IMD small region:
2004 07:49:50.671348 IMD ROOT 0. 0x76ffec00 0x00000400
2005 07:49:50.674655 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2006 07:49:50.677969 POWER STATE 2. 0x76ffeb80 0x00000044
2007 07:49:50.684368 ROMSTAGE 3. 0x76ffeb60 0x00000004
2008 07:49:50.688067 MEM INFO 4. 0x76ffe980 0x000001e0
2009 07:49:50.694252 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
2010 07:49:50.694339 MTRR: Physical address space:
2011 07:49:50.697683
2012 07:49:50.700841 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2013 07:49:50.707917 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2014 07:49:50.714237 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2015 07:49:50.720810 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2016 07:49:50.727722 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2017 07:49:50.734309 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2018 07:49:50.740848 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2019 07:49:50.744203 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 07:49:50.747840 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 07:49:50.750621 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 07:49:50.757451 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 07:49:50.760837 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 07:49:50.763852 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 07:49:50.767465 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 07:49:50.773815 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 07:49:50.777266 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 07:49:50.780465 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 07:49:50.783674 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 07:49:50.788873 call enable_fixed_mtrr()
2031 07:49:50.791960 CPU physical address size: 39 bits
2032 07:49:50.798497 MTRR: default type WB/UC MTRR counts: 6/7.
2033 07:49:50.802197 MTRR: WB selected as default type.
2034 07:49:50.808841 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2035 07:49:50.812102 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2036 07:49:50.818855 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2037 07:49:50.825139 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2038 07:49:50.831629 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2039 07:49:50.838273 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2040 07:49:50.845244 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 07:49:50.848636 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 07:49:50.851971 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 07:49:50.855478 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 07:49:50.861993 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 07:49:50.865568 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 07:49:50.868682 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 07:49:50.871829 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 07:49:50.878741 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 07:49:50.881577 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 07:49:50.885256 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 07:49:50.885381
2052 07:49:50.889199 MTRR check
2053 07:49:50.892285 call enable_fixed_mtrr()
2054 07:49:50.892371 Fixed MTRRs : Enabled
2055 07:49:50.895816 Variable MTRRs: Enabled
2056 07:49:50.895903
2057 07:49:50.898767 CPU physical address size: 39 bits
2058 07:49:50.906820 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2059 07:49:50.909652 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 07:49:50.916978 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 07:49:50.919779 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 07:49:50.923187 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 07:49:50.926325 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 07:49:50.932827 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 07:49:50.936422 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 07:49:50.939856 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 07:49:50.943143 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 07:49:50.949537 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 07:49:50.952718 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 07:49:50.955907 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 07:49:50.963598 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 07:49:50.966767 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 07:49:50.970416 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 07:49:50.973393 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 07:49:50.980387 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 07:49:50.983325 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 07:49:50.987027 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 07:49:50.990411 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 07:49:50.996973 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 07:49:51.000079 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 07:49:51.003576 call enable_fixed_mtrr()
2082 07:49:51.006620 call enable_fixed_mtrr()
2083 07:49:51.010007 MTRR: Fixed MSR 0x250 0x0606060606060606
2084 07:49:51.013594 MTRR: Fixed MSR 0x250 0x0606060606060606
2085 07:49:51.020007 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 07:49:51.023321 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 07:49:51.026592 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 07:49:51.029660 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 07:49:51.033111 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 07:49:51.036308
2091 07:49:51.040066 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 07:49:51.043131 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 07:49:51.046449 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 07:49:51.049655 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 07:49:51.056212 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 07:49:51.059776 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 07:49:51.066258 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 07:49:51.069347 MTRR: Fixed MSR 0x268 0x0606060606060606
2099 07:49:51.072982 MTRR: Fixed MSR 0x269 0x0606060606060606
2100 07:49:51.076416 MTRR: Fixed MSR 0x26a 0x0606060606060606
2101 07:49:51.082906 MTRR: Fixed MSR 0x26b 0x0606060606060606
2102 07:49:51.085980 MTRR: Fixed MSR 0x26c 0x0606060606060606
2103 07:49:51.089429 MTRR: Fixed MSR 0x26d 0x0606060606060606
2104 07:49:51.092402 MTRR: Fixed MSR 0x26e 0x0606060606060606
2105 07:49:51.099578 MTRR: Fixed MSR 0x26f 0x0606060606060606
2106 07:49:51.102511 call enable_fixed_mtrr()
2107 07:49:51.106133 call enable_fixed_mtrr()
2108 07:49:51.108977 CPU physical address size: 39 bits
2109 07:49:51.112336 CPU physical address size: 39 bits
2110 07:49:51.115746 CPU physical address size: 39 bits
2111 07:49:51.120757 CPU physical address size: 39 bits
2112 07:49:51.127287 MTRR: Fixed MSR 0x250 0x0606060606060606
2113 07:49:51.130266 MTRR: Fixed MSR 0x250 0x0606060606060606
2114 07:49:51.133926 MTRR: Fixed MSR 0x258 0x0606060606060606
2115 07:49:51.137422 MTRR: Fixed MSR 0x259 0x0000000000000000
2116 07:49:51.144037 MTRR: Fixed MSR 0x268 0x0606060606060606
2117 07:49:51.148208 MTRR: Fixed MSR 0x269 0x0606060606060606
2118 07:49:51.150339 MTRR: Fixed MSR 0x26a 0x0606060606060606
2119 07:49:51.153833 MTRR: Fixed MSR 0x26b 0x0606060606060606
2120 07:49:51.159883 MTRR: Fixed MSR 0x26c 0x0606060606060606
2121 07:49:51.163409 MTRR: Fixed MSR 0x26d 0x0606060606060606
2122 07:49:51.166964 MTRR: Fixed MSR 0x26e 0x0606060606060606
2123 07:49:51.169837 MTRR: Fixed MSR 0x26f 0x0606060606060606
2124 07:49:51.176359 MTRR: Fixed MSR 0x258 0x0606060606060606
2125 07:49:51.179892 MTRR: Fixed MSR 0x259 0x0000000000000000
2126 07:49:51.183019
2127 07:49:51.186051 MTRR: Fixed MSR 0x268 0x0606060606060606
2128 07:49:51.189675 MTRR: Fixed MSR 0x269 0x0606060606060606
2129 07:49:51.192660 MTRR: Fixed MSR 0x26a 0x0606060606060606
2130 07:49:51.196220 MTRR: Fixed MSR 0x26b 0x0606060606060606
2131 07:49:51.199063
2132 07:49:51.202361 MTRR: Fixed MSR 0x26c 0x0606060606060606
2133 07:49:51.205807 MTRR: Fixed MSR 0x26d 0x0606060606060606
2134 07:49:51.208899 MTRR: Fixed MSR 0x26e 0x0606060606060606
2135 07:49:51.212177 MTRR: Fixed MSR 0x26f 0x0606060606060606
2136 07:49:51.215441
2137 07:49:51.219023 call enable_fixed_mtrr()
2138 07:49:51.222063 call enable_fixed_mtrr()
2139 07:49:51.226164 Checking cr50 for pending updates
2140 07:49:51.229385 CPU physical address size: 39 bits
2141 07:49:51.232463 CPU physical address size: 39 bits
2142 07:49:51.235580 Reading cr50 TPM mode
2143 07:49:51.245288 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2144 07:49:51.254921 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2145 07:49:51.258089 Checking segment from ROM address 0xffc02b38
2146 07:49:51.261876 Checking segment from ROM address 0xffc02b54
2147 07:49:51.268470 Loading segment from ROM address 0xffc02b38
2148 07:49:51.268557 code (compression=0)
2149 07:49:51.278246 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2150 07:49:51.288259 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2151 07:49:51.288347 it's not compressed!
2152 07:49:51.428712 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2153 07:49:51.435286 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2154 07:49:51.442094 Loading segment from ROM address 0xffc02b54
2155 07:49:51.445646 Entry Point 0x30000000
2156 07:49:51.445737 Loaded segments
2157 07:49:51.451909 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2158 07:49:51.497114 Finalizing chipset.
2159 07:49:51.500686 Finalizing SMM.
2160 07:49:51.501061 APMC done.
2161 07:49:51.507437 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2162 07:49:51.510561 mp_park_aps done after 0 msecs.
2163 07:49:51.514025 Jumping to boot code at 0x30000000(0x76b25000)
2164 07:49:51.523839 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2165 07:49:51.524291
2166 07:49:51.524672
2167 07:49:51.527392
2168 07:49:51.527836 Starting depthcharge on Voema...
2169 07:49:51.528869 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2170 07:49:51.529472 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2171 07:49:51.529971 Setting prompt string to ['volteer:']
2172 07:49:51.530425 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2173 07:49:51.531209
2174 07:49:51.537117 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2175 07:49:51.537640
2176 07:49:51.543696 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2177 07:49:51.544113
2178 07:49:51.550141 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2179 07:49:51.550565
2180 07:49:51.553595 Failed to find eMMC card reader
2181 07:49:51.553977
2182 07:49:51.556637 Wipe memory regions:
2183 07:49:51.557027
2184 07:49:51.560274 [0x00000000001000, 0x000000000a0000)
2185 07:49:51.560818
2186 07:49:51.563301 [0x00000000100000, 0x00000030000000)
2187 07:49:51.563758
2188 07:49:51.600788 [0x00000032662db0, 0x000000769ef000)
2189 07:49:51.601241
2190 07:49:51.651454 [0x00000100000000, 0x00000480400000)
2191 07:49:51.651626
2192 07:49:52.298110 ec_init: CrosEC protocol v3 supported (256, 256)
2193 07:49:52.298630
2194 07:49:52.730213 R8152: Initializing
2195 07:49:52.730736
2196 07:49:52.733290 Version 6 (ocp_data = 5c30)
2197 07:49:52.733719
2198 07:49:52.736472 R8152: Done initializing
2199 07:49:52.736931
2200 07:49:52.739931 Adding net device
2201 07:49:52.740371
2202 07:49:53.045421 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2203 07:49:53.045995
2204 07:49:53.046384
2205 07:49:53.046746
2206 07:49:53.048862 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2208 07:49:53.150867 volteer: tftpboot 192.168.201.1 8119391/tftp-deploy-kbz3fpgn/kernel/bzImage 8119391/tftp-deploy-kbz3fpgn/kernel/cmdline 8119391/tftp-deploy-kbz3fpgn/ramdisk/ramdisk.cpio.gz
2209 07:49:53.151563 Setting prompt string to 'Starting kernel'
2210 07:49:53.152017 Setting prompt string to ['Starting kernel']
2211 07:49:53.152402 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2212 07:49:53.152811 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2213 07:49:53.156416 tftpboot 192.168.201.1 8119391/tftp-deploy-kbz3fpgn/kernel/bzImoy-kbz3fpgn/kernel/cmdline 8119391/tftp-deploy-kbz3fpgn/ramdisk/ramdisk.cpio.gz
2214 07:49:53.156888
2215 07:49:53.157265 Waiting for link
2216 07:49:53.157698
2217 07:49:53.361256 done.
2218 07:49:53.361927
2219 07:49:53.362466 MAC: 00:24:32:30:7d:ab
2220 07:49:53.362844
2221 07:49:53.363935 Sending DHCP discover... done.
2222 07:49:53.364423
2223 07:49:53.367320 Waiting for reply... done.
2224 07:49:53.367950
2225 07:49:53.370283 Sending DHCP request... done.
2226 07:49:53.370771
2227 07:49:53.377239 Waiting for reply... done.
2228 07:49:53.377854
2229 07:49:53.378243 My ip is 192.168.201.20
2230 07:49:53.378600
2231 07:49:53.380421 The DHCP server ip is 192.168.201.1
2232 07:49:53.383773
2233 07:49:53.386773 TFTP server IP predefined by user: 192.168.201.1
2234 07:49:53.387268
2235 07:49:53.393102 Bootfile predefined by user: 8119391/tftp-deploy-kbz3fpgn/kernel/bzImage
2236 07:49:53.393623
2237 07:49:53.396642 Sending tftp read request... done.
2238 07:49:53.397063
2239 07:49:53.403707 Waiting for the transfer...
2240 07:49:53.404197
2241 07:49:54.047941 00000000 ################################################################
2242 07:49:54.048096
2243 07:49:54.719537 00080000 ################################################################
2244 07:49:54.720095
2245 07:49:55.331161 00100000 ################################################################
2246 07:49:55.331311
2247 07:49:55.967387 00180000 ################################################################
2248 07:49:55.967941
2249 07:49:56.626143 00200000 ################################################################
2250 07:49:56.626435
2251 07:49:57.333435 00280000 ################################################################
2252 07:49:57.334008
2253 07:49:58.064955 00300000 ################################################################
2254 07:49:58.065507
2255 07:49:58.780260 00380000 ################################################################
2256 07:49:58.780838
2257 07:49:59.499381 00400000 ################################################################
2258 07:49:59.499927
2259 07:50:00.215058 00480000 ################################################################
2260 07:50:00.215662
2261 07:50:00.944864 00500000 ################################################################
2262 07:50:00.945473
2263 07:50:01.667136 00580000 ################################################################
2264 07:50:01.667661
2265 07:50:02.375319 00600000 ################################################################
2266 07:50:02.375539
2267 07:50:02.735359 00680000 ####################################### done.
2268 07:50:02.735496
2269 07:50:02.738704 The bootfile was 7131024 bytes long.
2270 07:50:02.738791
2271 07:50:02.741794 Sending tftp read request... done.
2272 07:50:02.741881
2273 07:50:02.745063 Waiting for the transfer...
2274 07:50:02.745149
2275 07:50:03.307226 00000000 ################################################################
2276 07:50:03.307361
2277 07:50:03.895966 00080000 ################################################################
2278 07:50:03.896161
2279 07:50:04.607841 00100000 ################################################################
2280 07:50:04.608500
2281 07:50:05.338814 00180000 ################################################################
2282 07:50:05.339369
2283 07:50:06.011191 00200000 ################################################################
2284 07:50:06.011340
2285 07:50:06.566261 00280000 ################################################################
2286 07:50:06.566408
2287 07:50:07.123068 00300000 ################################################################
2288 07:50:07.123219
2289 07:50:07.716223 00380000 ################################################################
2290 07:50:07.716375
2291 07:50:08.371474 00400000 ################################################################
2292 07:50:08.372002
2293 07:50:09.000622 00480000 ################################################################
2294 07:50:09.000764
2295 07:50:09.285569 00500000 ################################ done.
2296 07:50:09.285724
2297 07:50:09.288316 Sending tftp read request... done.
2298 07:50:09.288392
2299 07:50:09.291730 Waiting for the transfer...
2300 07:50:09.291807
2301 07:50:09.291880 00000000 # done.
2302 07:50:09.291944
2303 07:50:09.301759 Command line loaded dynamically from TFTP file: 8119391/tftp-deploy-kbz3fpgn/kernel/cmdline
2304 07:50:09.301845
2305 07:50:09.324986 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119391/extract-nfsrootfs-0ddla_v8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2306 07:50:09.325080
2307 07:50:09.331487 Shutting down all USB controllers.
2308 07:50:09.331565
2309 07:50:09.331630 Removing current net device
2310 07:50:09.331698
2311 07:50:09.335034 Finalizing coreboot
2312 07:50:09.335109
2313 07:50:09.341811 Exiting depthcharge with code 4 at timestamp: 26389043
2314 07:50:09.341902
2315 07:50:09.341969
2316 07:50:09.342038 Starting kernel ...
2317 07:50:09.342101
2318 07:50:09.342159
2319 07:50:09.342520 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2320 07:50:09.342626 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2321 07:50:09.342702 Setting prompt string to ['Linux version [0-9]']
2322 07:50:09.342772 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2323 07:50:09.342850 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2324 07:50:09.344943
2326 07:54:35.342899 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2328 07:54:35.343113 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2330 07:54:35.343273 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2333 07:54:35.343535 end: 2 depthcharge-action (duration 00:05:00) [common]
2335 07:54:35.343793 Cleaning after the job
2336 07:54:35.343880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/ramdisk
2337 07:54:35.344363 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/kernel
2338 07:54:35.344914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/nfsrootfs
2339 07:54:35.394155 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119391/tftp-deploy-kbz3fpgn/modules
2340 07:54:35.394432 start: 4.1 power-off (timeout 00:00:30) [common]
2341 07:54:35.394591 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2342 07:54:35.413585 >> Command sent successfully.
2343 07:54:35.415398 Returned 0 in 0 seconds
2344 07:54:35.516549 end: 4.1 power-off (duration 00:00:00) [common]
2346 07:54:35.518035 start: 4.2 read-feedback (timeout 00:10:00) [common]
2347 07:54:35.519152 Listened to connection for namespace 'common' for up to 1s
2348 07:54:36.523952 Finalising connection for namespace 'common'
2349 07:54:36.524716 Disconnecting from shell: Finalise
2350 07:54:36.625793 end: 4.2 read-feedback (duration 00:00:01) [common]
2351 07:54:36.626453 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119391
2352 07:54:36.777970 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119391
2353 07:54:36.778175 JobError: Your job cannot terminate cleanly.