Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:48:56.006307 lava-dispatcher, installed at version: 2022.10
2 07:48:56.006489 start: 0 validate
3 07:48:56.006618 Start time: 2022-11-25 07:48:56.006610+00:00 (UTC)
4 07:48:56.006740 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:48:56.006865 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:48:56.018489 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:48:56.018657 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:48:56.033454 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:48:56.033628 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:48:56.035930 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:48:56.036119 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:48:56.054210 validate duration: 0.05
14 07:48:56.054496 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:48:56.054606 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:48:56.054697 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:48:56.054798 Not decompressing ramdisk as can be used compressed.
18 07:48:56.054885 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/initrd.cpio.gz
19 07:48:56.054951 saving as /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/ramdisk/initrd.cpio.gz
20 07:48:56.055011 total size: 5431622 (5MB)
21 07:48:56.082646 progress 0% (0MB)
22 07:48:56.121837 progress 5% (0MB)
23 07:48:56.133964 progress 10% (0MB)
24 07:48:56.156700 progress 15% (0MB)
25 07:48:56.185509 progress 20% (1MB)
26 07:48:56.204167 progress 25% (1MB)
27 07:48:56.231887 progress 30% (1MB)
28 07:48:56.260229 progress 35% (1MB)
29 07:48:56.288359 progress 40% (2MB)
30 07:48:56.322541 progress 45% (2MB)
31 07:48:56.343701 progress 50% (2MB)
32 07:48:56.374137 progress 55% (2MB)
33 07:48:56.402276 progress 60% (3MB)
34 07:48:56.435810 progress 65% (3MB)
35 07:48:56.464757 progress 70% (3MB)
36 07:48:56.501315 progress 75% (3MB)
37 07:48:56.521434 progress 80% (4MB)
38 07:48:56.550175 progress 85% (4MB)
39 07:48:56.584724 progress 90% (4MB)
40 07:48:56.612922 progress 95% (4MB)
41 07:48:56.640906 progress 100% (5MB)
42 07:48:56.641235 5MB downloaded in 0.59s (8.84MB/s)
43 07:48:56.641399 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:48:56.641648 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:48:56.641738 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:48:56.641825 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:48:56.641928 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:48:56.641996 saving as /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/kernel/bzImage
50 07:48:56.642087 total size: 7131024 (6MB)
51 07:48:56.642162 No compression specified
52 07:48:56.696199 progress 0% (0MB)
53 07:48:56.775119 progress 5% (0MB)
54 07:48:56.828012 progress 10% (0MB)
55 07:48:56.869227 progress 15% (1MB)
56 07:48:56.902657 progress 20% (1MB)
57 07:48:56.934963 progress 25% (1MB)
58 07:48:56.975654 progress 30% (2MB)
59 07:48:57.019679 progress 35% (2MB)
60 07:48:57.057746 progress 40% (2MB)
61 07:48:57.102313 progress 45% (3MB)
62 07:48:57.148145 progress 50% (3MB)
63 07:48:57.180829 progress 55% (3MB)
64 07:48:57.225152 progress 60% (4MB)
65 07:48:57.259905 progress 65% (4MB)
66 07:48:57.303818 progress 70% (4MB)
67 07:48:57.336602 progress 75% (5MB)
68 07:48:57.375876 progress 80% (5MB)
69 07:48:57.403329 progress 85% (5MB)
70 07:48:57.442957 progress 90% (6MB)
71 07:48:57.476889 progress 95% (6MB)
72 07:48:57.520229 progress 100% (6MB)
73 07:48:57.521565 6MB downloaded in 0.88s (7.73MB/s)
74 07:48:57.522483 end: 1.2.1 http-download (duration 00:00:01) [common]
76 07:48:57.523964 end: 1.2 download-retry (duration 00:00:01) [common]
77 07:48:57.524501 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:48:57.525022 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:48:57.525570 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/full.rootfs.tar.xz
80 07:48:57.525960 saving as /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/nfsrootfs/full.rootfs.tar
81 07:48:57.526361 total size: 123211568 (117MB)
82 07:48:57.526808 Using unxz to decompress xz
83 07:48:57.840590 progress 0% (0MB)
84 07:48:58.293431 progress 5% (5MB)
85 07:48:58.749073 progress 10% (11MB)
86 07:48:59.205879 progress 15% (17MB)
87 07:48:59.670800 progress 20% (23MB)
88 07:48:59.995125 progress 25% (29MB)
89 07:49:00.340016 progress 30% (35MB)
90 07:49:00.854008 progress 35% (41MB)
91 07:49:01.817914 progress 40% (47MB)
92 07:49:02.487621 progress 45% (52MB)
93 07:49:02.998234 progress 50% (58MB)
94 07:49:03.725617 progress 55% (64MB)
95 07:49:04.345360 progress 60% (70MB)
96 07:49:04.841419 progress 65% (76MB)
97 07:49:05.319977 progress 70% (82MB)
98 07:49:05.798074 progress 75% (88MB)
99 07:49:06.356132 progress 80% (94MB)
100 07:49:06.895963 progress 85% (99MB)
101 07:49:07.732980 progress 90% (105MB)
102 07:49:08.555468 progress 95% (111MB)
103 07:49:09.220073 progress 100% (117MB)
104 07:49:09.224580 117MB downloaded in 11.70s (10.04MB/s)
105 07:49:09.224838 end: 1.3.1 http-download (duration 00:00:12) [common]
107 07:49:09.225103 end: 1.3 download-retry (duration 00:00:12) [common]
108 07:49:09.225197 start: 1.4 download-retry (timeout 00:09:47) [common]
109 07:49:09.225287 start: 1.4.1 http-download (timeout 00:09:47) [common]
110 07:49:09.225405 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:49:09.225477 saving as /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/modules/modules.tar
112 07:49:09.225539 total size: 52060 (0MB)
113 07:49:09.225603 Using unxz to decompress xz
114 07:49:09.265859 progress 62% (0MB)
115 07:49:09.266345 progress 100% (0MB)
116 07:49:09.269654 0MB downloaded in 0.04s (1.13MB/s)
117 07:49:09.269903 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:49:09.270211 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:49:09.270312 start: 1.5 prepare-tftp-overlay (timeout 00:09:47) [common]
121 07:49:09.270411 start: 1.5.1 extract-nfsrootfs (timeout 00:09:47) [common]
122 07:49:10.952507 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119377/extract-nfsrootfs-1784jhip
123 07:49:10.952730 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:49:10.952848 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
125 07:49:10.953000 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj
126 07:49:10.953117 makedir: /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin
127 07:49:10.953214 makedir: /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/tests
128 07:49:10.953311 makedir: /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/results
129 07:49:10.953423 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-add-keys
130 07:49:10.953568 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-add-sources
131 07:49:10.953699 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-background-process-start
132 07:49:10.953827 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-background-process-stop
133 07:49:10.953953 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-common-functions
134 07:49:10.954114 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-echo-ipv4
135 07:49:10.954242 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-install-packages
136 07:49:10.954367 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-installed-packages
137 07:49:10.954491 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-os-build
138 07:49:10.954616 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-probe-channel
139 07:49:10.954741 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-probe-ip
140 07:49:10.954864 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-target-ip
141 07:49:10.954988 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-target-mac
142 07:49:10.955112 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-target-storage
143 07:49:10.955238 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-case
144 07:49:10.955364 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-event
145 07:49:10.955490 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-feedback
146 07:49:10.955614 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-raise
147 07:49:10.955737 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-reference
148 07:49:10.955861 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-runner
149 07:49:10.955986 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-set
150 07:49:10.956110 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-test-shell
151 07:49:10.956236 Updating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-install-packages (oe)
152 07:49:10.956364 Updating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/bin/lava-installed-packages (oe)
153 07:49:10.956473 Creating /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/environment
154 07:49:10.956569 LAVA metadata
155 07:49:10.956643 - LAVA_JOB_ID=8119377
156 07:49:10.956721 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:49:10.956837 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:45) [common]
158 07:49:10.956909 skipped lava-vland-overlay
159 07:49:10.957007 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:49:10.957105 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
161 07:49:10.957174 skipped lava-multinode-overlay
162 07:49:10.957271 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:49:10.957369 start: 1.5.2.3 test-definition (timeout 00:09:45) [common]
164 07:49:10.957451 Loading test definitions
165 07:49:10.957560 start: 1.5.2.3.1 git-repo-action (timeout 00:09:45) [common]
166 07:49:10.957641 Using /lava-8119377 at stage 0
167 07:49:10.957758 Fetching tests from https://github.com/kernelci/test-definitions
168 07:49:10.957846 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/0/tests/0_ltp-mm'
169 07:49:14.509000 Running '/usr/bin/git checkout kernelci.org
170 07:49:14.654001 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 07:49:14.654803 uuid=8119377_1.5.2.3.1 testdef=None
172 07:49:14.654966 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 07:49:14.655221 start: 1.5.2.3.2 test-overlay (timeout 00:09:41) [common]
175 07:49:14.656017 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:49:14.656252 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:41) [common]
178 07:49:14.657303 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:49:14.657547 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:41) [common]
181 07:49:14.658533 runner path: /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/0/tests/0_ltp-mm test_uuid 8119377_1.5.2.3.1
182 07:49:14.658625 SKIPFILE='skipfile-lkft.yaml'
183 07:49:14.658711 SKIP_INSTALL='true'
184 07:49:14.658805 TST_CMDFILES='mm'
185 07:49:14.658947 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 07:49:14.659162 Creating lava-test-runner.conf files
188 07:49:14.659225 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119377/lava-overlay-lwd00pxj/lava-8119377/0 for stage 0
189 07:49:14.659306 - 0_ltp-mm
190 07:49:14.659403 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 07:49:14.659492 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
192 07:49:22.439280 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 07:49:22.439458 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
194 07:49:22.439580 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 07:49:22.439706 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 07:49:22.439846 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
197 07:49:22.544231 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 07:49:22.544584 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
199 07:49:22.544690 extracting modules file /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119377/extract-nfsrootfs-1784jhip
200 07:49:22.548806 extracting modules file /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119377/extract-overlay-ramdisk-6_ha4ycd/ramdisk
201 07:49:22.552692 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 07:49:22.552868 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
203 07:49:22.552969 [common] Applying overlay to NFS
204 07:49:22.553043 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119377/compress-overlay-rk5_lhar/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119377/extract-nfsrootfs-1784jhip
205 07:49:23.021159 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 07:49:23.021333 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
207 07:49:23.021431 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 07:49:23.021528 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
209 07:49:23.021618 Building ramdisk /var/lib/lava/dispatcher/tmp/8119377/extract-overlay-ramdisk-6_ha4ycd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119377/extract-overlay-ramdisk-6_ha4ycd/ramdisk
210 07:49:23.058826 >> 24546 blocks
211 07:49:23.570296 rename /var/lib/lava/dispatcher/tmp/8119377/extract-overlay-ramdisk-6_ha4ycd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/ramdisk/ramdisk.cpio.gz
212 07:49:23.570708 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 07:49:23.570833 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
214 07:49:23.570935 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
215 07:49:23.571034 No mkimage arch provided, not using FIT.
216 07:49:23.571126 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 07:49:23.571217 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 07:49:23.571317 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 07:49:23.571413 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
220 07:49:23.571492 No LXC device requested
221 07:49:23.571575 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 07:49:23.571663 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
223 07:49:23.571748 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 07:49:23.571847 Checking files for TFTP limit of 4294967296 bytes.
225 07:49:23.572280 end: 1 tftp-deploy (duration 00:00:28) [common]
226 07:49:23.572393 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 07:49:23.572489 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 07:49:23.572622 substitutions:
229 07:49:23.572691 - {DTB}: None
230 07:49:23.572760 - {INITRD}: 8119377/tftp-deploy-bxtnv8_u/ramdisk/ramdisk.cpio.gz
231 07:49:23.572824 - {KERNEL}: 8119377/tftp-deploy-bxtnv8_u/kernel/bzImage
232 07:49:23.572887 - {LAVA_MAC}: None
233 07:49:23.572947 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119377/extract-nfsrootfs-1784jhip
234 07:49:23.573009 - {NFS_SERVER_IP}: 192.168.201.1
235 07:49:23.573067 - {PRESEED_CONFIG}: None
236 07:49:23.573125 - {PRESEED_LOCAL}: None
237 07:49:23.573182 - {RAMDISK}: 8119377/tftp-deploy-bxtnv8_u/ramdisk/ramdisk.cpio.gz
238 07:49:23.573240 - {ROOT_PART}: None
239 07:49:23.573297 - {ROOT}: None
240 07:49:23.573354 - {SERVER_IP}: 192.168.201.1
241 07:49:23.573416 - {TEE}: None
242 07:49:23.573473 Parsed boot commands:
243 07:49:23.573529 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 07:49:23.573690 Parsed boot commands: tftpboot 192.168.201.1 8119377/tftp-deploy-bxtnv8_u/kernel/bzImage 8119377/tftp-deploy-bxtnv8_u/kernel/cmdline 8119377/tftp-deploy-bxtnv8_u/ramdisk/ramdisk.cpio.gz
245 07:49:23.573782 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 07:49:23.573870 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 07:49:23.574012 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 07:49:23.574145 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 07:49:23.574223 Not connected, no need to disconnect.
250 07:49:23.574304 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 07:49:23.574389 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 07:49:23.574464 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
253 07:49:23.577323 Setting prompt string to ['lava-test: # ']
254 07:49:23.577633 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 07:49:23.577747 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 07:49:23.577853 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 07:49:23.577946 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 07:49:23.578183 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
259 07:49:23.597931 >> Command sent successfully.
260 07:49:23.600690 Returned 0 in 0 seconds
261 07:49:23.701487 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 07:49:23.701820 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 07:49:23.701923 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 07:49:23.702013 Setting prompt string to 'Starting depthcharge on Helios...'
266 07:49:23.702104 Changing prompt to 'Starting depthcharge on Helios...'
267 07:49:23.702183 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 07:49:23.702531 [Enter `^Ec?' for help]
269 07:49:29.882406
270 07:49:29.882580
271 07:49:29.892273 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 07:49:29.895606 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 07:49:29.902566 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 07:49:29.905491 CPU: AES supported, TXT NOT supported, VT supported
275 07:49:29.912010 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 07:49:29.915495 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 07:49:29.921866 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 07:49:29.925355 VBOOT: Loading verstage.
279 07:49:29.928770 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 07:49:29.935068 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 07:49:29.938647 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 07:49:29.941734 CBFS @ c08000 size 3f8000
283 07:49:29.948752 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 07:49:29.951663 CBFS: Locating 'fallback/verstage'
285 07:49:29.955309 CBFS: Found @ offset 10fb80 size 1072c
286 07:49:29.958909
287 07:49:29.959034
288 07:49:29.968746 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 07:49:29.983189 Probing TPM: . done!
290 07:49:29.986535 TPM ready after 0 ms
291 07:49:29.989973 Connected to device vid:did:rid of 1ae0:0028:00
292 07:49:30.000047 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 07:49:30.003568 Initialized TPM device CR50 revision 0
294 07:49:30.044570 tlcl_send_startup: Startup return code is 0
295 07:49:30.044721 TPM: setup succeeded
296 07:49:30.057463 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 07:49:30.061158 Chrome EC: UHEPI supported
298 07:49:30.064644 Phase 1
299 07:49:30.067718 FMAP: area GBB found @ c05000 (12288 bytes)
300 07:49:30.074140 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 07:49:30.077625 Phase 2
302 07:49:30.077741 Phase 3
303 07:49:30.081089 FMAP: area GBB found @ c05000 (12288 bytes)
304 07:49:30.087607 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 07:49:30.093832 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 07:49:30.097348 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 07:49:30.103814 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 07:49:30.120128 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 07:49:30.122910 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 07:49:30.129890 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 07:49:30.133977 Phase 4
312 07:49:30.137568 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 07:49:30.143588 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 07:49:30.323118 VB2:vb2_rsa_verify_digest() Digest check failed!
315 07:49:30.326583 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 07:49:30.329947
317 07:49:30.330036 Saving nvdata
318 07:49:30.333140 Reboot requested (10020007)
319 07:49:30.336549 board_reset() called!
320 07:49:30.336682 full_reset() called!
321 07:49:34.848759
322 07:49:34.848901
323 07:49:34.857951 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 07:49:34.861567 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 07:49:34.868214 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 07:49:34.871751 CPU: AES supported, TXT NOT supported, VT supported
327 07:49:34.877820 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 07:49:34.881387 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 07:49:34.887995 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 07:49:34.890968 VBOOT: Loading verstage.
331 07:49:34.894696 FMAP: Found "FLASH" version 1.1 at 0xc04000.
332 07:49:34.900753 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 07:49:34.907440 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 07:49:34.907551 CBFS @ c08000 size 3f8000
335 07:49:34.914024 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 07:49:34.917564 CBFS: Locating 'fallback/verstage'
337 07:49:34.920835 CBFS: Found @ offset 10fb80 size 1072c
338 07:49:34.925133
339 07:49:34.925225
340 07:49:34.934893 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 07:49:34.949671 Probing TPM: . done!
342 07:49:34.952571 TPM ready after 0 ms
343 07:49:34.956035 Connected to device vid:did:rid of 1ae0:0028:00
344 07:49:34.966120 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 07:49:34.969807 Initialized TPM device CR50 revision 0
346 07:49:35.011688 tlcl_send_startup: Startup return code is 0
347 07:49:35.011847 TPM: setup succeeded
348 07:49:35.024569 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 07:49:35.028754 Chrome EC: UHEPI supported
350 07:49:35.031674 Phase 1
351 07:49:35.035050 FMAP: area GBB found @ c05000 (12288 bytes)
352 07:49:35.041795 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 07:49:35.048239 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 07:49:35.051503 Recovery requested (1009000e)
355 07:49:35.057511 Saving nvdata
356 07:49:35.063474 tlcl_extend: response is 0
357 07:49:35.072378 tlcl_extend: response is 0
358 07:49:35.079129 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 07:49:35.082187 CBFS @ c08000 size 3f8000
360 07:49:35.089375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 07:49:35.092222 CBFS: Locating 'fallback/romstage'
362 07:49:35.096011 CBFS: Found @ offset 80 size 145fc
363 07:49:35.098891 Accumulated console time in verstage 98 ms
364 07:49:35.098984
365 07:49:35.099051
366 07:49:35.112153 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 07:49:35.118904 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 07:49:35.121908 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 07:49:35.125342 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 07:49:35.131862 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 07:49:35.134890 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 07:49:35.138436 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
373 07:49:35.141990 TCO_STS: 0000 0000
374 07:49:35.145014 GEN_PMCON: e0015238 00000200
375 07:49:35.148182 GBLRST_CAUSE: 00000000 00000000
376 07:49:35.148266 prev_sleep_state 5
377 07:49:35.152252 Boot Count incremented to 38299
378 07:49:35.158707 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 07:49:35.162383 CBFS @ c08000 size 3f8000
380 07:49:35.168964 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 07:49:35.169053 CBFS: Locating 'fspm.bin'
382 07:49:35.175135 CBFS: Found @ offset 5ffc0 size 71000
383 07:49:35.178677 Chrome EC: UHEPI supported
384 07:49:35.185280 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 07:49:35.188959 Probing TPM: done!
386 07:49:35.195556 Connected to device vid:did:rid of 1ae0:0028:00
387 07:49:35.205470 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
388 07:49:35.211221 Initialized TPM device CR50 revision 0
389 07:49:35.220082 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 07:49:35.230016 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 07:49:35.230236 MRC cache found, size 1948
392 07:49:35.233562 bootmode is set to: 2
393 07:49:35.236510 PRMRR disabled by config.
394 07:49:35.239989 SPD INDEX = 1
395 07:49:35.242940 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 07:49:35.246655 CBFS @ c08000 size 3f8000
397 07:49:35.253108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 07:49:35.253231 CBFS: Locating 'spd.bin'
399 07:49:35.256235 CBFS: Found @ offset 5fb80 size 400
400 07:49:35.259848
401 07:49:35.259931 SPD: module type is LPDDR3
402 07:49:35.262953 SPD: module part is
403 07:49:35.269473 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
404 07:49:35.272529 SPD: device width 4 bits, bus width 8 bits
405 07:49:35.276161 SPD: module size is 4096 MB (per channel)
406 07:49:35.279116 memory slot: 0 configuration done.
407 07:49:35.285720 memory slot: 2 configuration done.
408 07:49:35.334638 CBMEM:
409 07:49:35.337499 IMD: root @ 99fff000 254 entries.
410 07:49:35.340984 IMD: root @ 99ffec00 62 entries.
411 07:49:35.344417 External stage cache:
412 07:49:35.347774 IMD: root @ 9abff000 254 entries.
413 07:49:35.350945 IMD: root @ 9abfec00 62 entries.
414 07:49:35.357321 Chrome EC: clear events_b mask to 0x0000000020004000
415 07:49:35.370543 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 07:49:35.383553 tlcl_write: response is 0
417 07:49:35.392473 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
418 07:49:35.398971 MRC: TPM MRC hash updated successfully.
419 07:49:35.399057 2 DIMMs found
420 07:49:35.402729 SMM Memory Map
421 07:49:35.405654 SMRAM : 0x9a000000 0x1000000
422 07:49:35.409191 Subregion 0: 0x9a000000 0xa00000
423 07:49:35.412647 Subregion 1: 0x9aa00000 0x200000
424 07:49:35.415493 Subregion 2: 0x9ac00000 0x400000
425 07:49:35.418971 top_of_ram = 0x9a000000
426 07:49:35.421979 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
427 07:49:35.428951 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
428 07:49:35.431873 MTRR Range: Start=ff000000 End=0 (Size 1000000)
429 07:49:35.438376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 07:49:35.441944 CBFS @ c08000 size 3f8000
431 07:49:35.445320 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 07:49:35.448784 CBFS: Locating 'fallback/postcar'
433 07:49:35.455439 CBFS: Found @ offset 107000 size 4b44
434 07:49:35.461377 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
435 07:49:35.471752 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
436 07:49:35.474561 Processing 180 relocs. Offset value of 0x97c0c000
437 07:49:35.482892 Accumulated console time in romstage 286 ms
438 07:49:35.483010
439 07:49:35.483093
440 07:49:35.493093 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
441 07:49:35.499512 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 07:49:35.503116 CBFS @ c08000 size 3f8000
443 07:49:35.509416 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 07:49:35.513130 CBFS: Locating 'fallback/ramstage'
445 07:49:35.516438 CBFS: Found @ offset 43380 size 1b9e8
446 07:49:35.522775 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
447 07:49:35.555174 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
448 07:49:35.558212 Processing 3976 relocs. Offset value of 0x98db0000
449 07:49:35.561265
450 07:49:35.564804 Accumulated console time in postcar 52 ms
451 07:49:35.564889
452 07:49:35.564984
453 07:49:35.574363 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
454 07:49:35.581131 FMAP: area RO_VPD found @ c00000 (16384 bytes)
455 07:49:35.584734 WARNING: RO_VPD is uninitialized or empty.
456 07:49:35.587792 FMAP: area RW_VPD found @ af8000 (8192 bytes)
457 07:49:35.594300 FMAP: area RW_VPD found @ af8000 (8192 bytes)
458 07:49:35.594479 Normal boot.
459 07:49:35.600836 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
460 07:49:35.604434 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 07:49:35.607275 CBFS @ c08000 size 3f8000
462 07:49:35.613787 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 07:49:35.617226 CBFS: Locating 'cpu_microcode_blob.bin'
464 07:49:35.620614 CBFS: Found @ offset 14700 size 2ec00
465 07:49:35.627161 microcode: sig=0x806ec pf=0x4 revision=0xc9
466 07:49:35.627280 Skip microcode update
467 07:49:35.634187 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 07:49:35.637125 CBFS @ c08000 size 3f8000
469 07:49:35.640736 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 07:49:35.643719 CBFS: Locating 'fsps.bin'
471 07:49:35.646745 CBFS: Found @ offset d1fc0 size 35000
472 07:49:35.673038 Detected 4 core, 8 thread CPU.
473 07:49:35.676592 Setting up SMI for CPU
474 07:49:35.679571 IED base = 0x9ac00000
475 07:49:35.679657 IED size = 0x00400000
476 07:49:35.683236
477 07:49:35.683344 Will perform SMM setup.
478 07:49:35.689794 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
479 07:49:35.695951 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
480 07:49:35.702375 Processing 16 relocs. Offset value of 0x00030000
481 07:49:35.702486 Attempting to start 7 APs
482 07:49:35.706027
483 07:49:35.709115 Waiting for 10ms after sending INIT.
484 07:49:35.722640 Waiting for 1st SIPI to complete...done.
485 07:49:35.722777 AP: slot 3 apic_id 3.
486 07:49:35.726048 AP: slot 1 apic_id 2.
487 07:49:35.729929 AP: slot 2 apic_id 1.
488 07:49:35.732721 Waiting for 2nd SIPI to complete...done.
489 07:49:35.736273 AP: slot 7 apic_id 5.
490 07:49:35.736359 AP: slot 6 apic_id 4.
491 07:49:35.739277 AP: slot 4 apic_id 7.
492 07:49:35.742788 AP: slot 5 apic_id 6.
493 07:49:35.749207 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
494 07:49:35.755888 Processing 13 relocs. Offset value of 0x00038000
495 07:49:35.762391 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
496 07:49:35.765883 Installing SMM handler to 0x9a000000
497 07:49:35.772603 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
498 07:49:35.779235 Processing 658 relocs. Offset value of 0x9a010000
499 07:49:35.785814 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
500 07:49:35.788779 Processing 13 relocs. Offset value of 0x9a008000
501 07:49:35.795422 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
502 07:49:35.801933 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
503 07:49:35.808927 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
504 07:49:35.811997 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
505 07:49:35.818458 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
506 07:49:35.825342 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
507 07:49:35.831731 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
508 07:49:35.838255 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
509 07:49:35.841872 Clearing SMI status registers
510 07:49:35.841965 SMI_STS: PM1
511 07:49:35.844777 PM1_STS: PWRBTN
512 07:49:35.844856 TCO_STS: SECOND_TO
513 07:49:35.848400 New SMBASE 0x9a000000
514 07:49:35.851353 In relocation handler: CPU 0
515 07:49:35.854856 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
516 07:49:35.861031 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 07:49:35.861121 Relocation complete.
518 07:49:35.864529 New SMBASE 0x99fff800
519 07:49:35.867985 In relocation handler: CPU 2
520 07:49:35.871541 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
521 07:49:35.877597 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 07:49:35.877690 Relocation complete.
523 07:49:35.880714 New SMBASE 0x99ffec00
524 07:49:35.884295 In relocation handler: CPU 5
525 07:49:35.887379 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
526 07:49:35.894001 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 07:49:35.894127 Relocation complete.
528 07:49:35.897099 New SMBASE 0x99ffe800
529 07:49:35.900575 In relocation handler: CPU 6
530 07:49:35.903738 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
531 07:49:35.910416 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 07:49:35.910526 Relocation complete.
533 07:49:35.913706 New SMBASE 0x99fffc00
534 07:49:35.917295 In relocation handler: CPU 1
535 07:49:35.920178 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
536 07:49:35.926715 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 07:49:35.926837 Relocation complete.
538 07:49:35.930131 New SMBASE 0x99fff400
539 07:49:35.933690 In relocation handler: CPU 3
540 07:49:35.936494 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
541 07:49:35.943179 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 07:49:35.943269 Relocation complete.
543 07:49:35.946241 New SMBASE 0x99ffe400
544 07:49:35.949870 In relocation handler: CPU 7
545 07:49:35.953401 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
546 07:49:35.959431 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 07:49:35.959523 Relocation complete.
548 07:49:35.962929 New SMBASE 0x99fff000
549 07:49:35.966523 In relocation handler: CPU 4
550 07:49:35.969371 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
551 07:49:35.975859 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 07:49:35.975958 Relocation complete.
553 07:49:35.979529 Initializing CPU #0
554 07:49:35.983168 CPU: vendor Intel device 806ec
555 07:49:35.986125 CPU: family 06, model 8e, stepping 0c
556 07:49:35.989153 Clearing out pending MCEs
557 07:49:35.992872 Setting up local APIC...
558 07:49:35.992976 apic_id: 0x00 done.
559 07:49:35.995849 Turbo is available but hidden
560 07:49:35.998947 Turbo is available and visible
561 07:49:36.002425 VMX status: enabled
562 07:49:36.005603 IA32_FEATURE_CONTROL status: locked
563 07:49:36.005690 Skip microcode update
564 07:49:36.009199 CPU #0 initialized
565 07:49:36.012502 Initializing CPU #2
566 07:49:36.012588 Initializing CPU #5
567 07:49:36.015830 Initializing CPU #4
568 07:49:36.019342 CPU: vendor Intel device 806ec
569 07:49:36.022847 CPU: family 06, model 8e, stepping 0c
570 07:49:36.025512 CPU: vendor Intel device 806ec
571 07:49:36.029100 CPU: family 06, model 8e, stepping 0c
572 07:49:36.032596 Clearing out pending MCEs
573 07:49:36.035666 Clearing out pending MCEs
574 07:49:36.035806 Setting up local APIC...
575 07:49:36.039212 CPU: vendor Intel device 806ec
576 07:49:36.045602 CPU: family 06, model 8e, stepping 0c
577 07:49:36.045691 Clearing out pending MCEs
578 07:49:36.048954 Initializing CPU #6
579 07:49:36.052559 Setting up local APIC...
580 07:49:36.055494 CPU: vendor Intel device 806ec
581 07:49:36.059114 CPU: family 06, model 8e, stepping 0c
582 07:49:36.059202 Initializing CPU #1
583 07:49:36.062170 Initializing CPU #3
584 07:49:36.065712 CPU: vendor Intel device 806ec
585 07:49:36.068690 CPU: family 06, model 8e, stepping 0c
586 07:49:36.072195 CPU: vendor Intel device 806ec
587 07:49:36.075768 CPU: family 06, model 8e, stepping 0c
588 07:49:36.078771 Clearing out pending MCEs
589 07:49:36.082021 Clearing out pending MCEs
590 07:49:36.085180 Setting up local APIC...
591 07:49:36.085268 apic_id: 0x01 done.
592 07:49:36.088739 Setting up local APIC...
593 07:49:36.091961 VMX status: enabled
594 07:49:36.092047 apic_id: 0x03 done.
595 07:49:36.095425 apic_id: 0x02 done.
596 07:49:36.098495 VMX status: enabled
597 07:49:36.098613 VMX status: enabled
598 07:49:36.102008 IA32_FEATURE_CONTROL status: locked
599 07:49:36.105042 IA32_FEATURE_CONTROL status: locked
600 07:49:36.108662 Skip microcode update
601 07:49:36.111637 Skip microcode update
602 07:49:36.111723 CPU #3 initialized
603 07:49:36.115251 CPU #1 initialized
604 07:49:36.118612 IA32_FEATURE_CONTROL status: locked
605 07:49:36.121424 Initializing CPU #7
606 07:49:36.121511 Clearing out pending MCEs
607 07:49:36.125203 CPU: vendor Intel device 806ec
608 07:49:36.128078 CPU: family 06, model 8e, stepping 0c
609 07:49:36.131513
610 07:49:36.131602 Setting up local APIC...
611 07:49:36.135129 apic_id: 0x06 done.
612 07:49:36.138072 Setting up local APIC...
613 07:49:36.138173 Skip microcode update
614 07:49:36.141615 apic_id: 0x07 done.
615 07:49:36.144548 VMX status: enabled
616 07:49:36.144635 VMX status: enabled
617 07:49:36.147971 IA32_FEATURE_CONTROL status: locked
618 07:49:36.151620 IA32_FEATURE_CONTROL status: locked
619 07:49:36.154655 Skip microcode update
620 07:49:36.158094 Skip microcode update
621 07:49:36.158181 CPU #5 initialized
622 07:49:36.161052 CPU #4 initialized
623 07:49:36.164860 Clearing out pending MCEs
624 07:49:36.164946 apic_id: 0x04 done.
625 07:49:36.167824 Setting up local APIC...
626 07:49:36.171486 CPU #2 initialized
627 07:49:36.171572 apic_id: 0x05 done.
628 07:49:36.174417 VMX status: enabled
629 07:49:36.177641 VMX status: enabled
630 07:49:36.181286 IA32_FEATURE_CONTROL status: locked
631 07:49:36.184729 IA32_FEATURE_CONTROL status: locked
632 07:49:36.187615 Skip microcode update
633 07:49:36.187736 Skip microcode update
634 07:49:36.190652 CPU #6 initialized
635 07:49:36.190742 CPU #7 initialized
636 07:49:36.197264 bsp_do_flight_plan done after 461 msecs.
637 07:49:36.201174 CPU: frequency set to 4200 MHz
638 07:49:36.201271 Enabling SMIs.
639 07:49:36.203716 Locking SMM.
640 07:49:36.217440 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 07:49:36.220486 CBFS @ c08000 size 3f8000
642 07:49:36.227505 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 07:49:36.227609 CBFS: Locating 'vbt.bin'
644 07:49:36.230916 CBFS: Found @ offset 5f5c0 size 499
645 07:49:36.233810
646 07:49:36.237230 Found a VBT of 4608 bytes after decompression
647 07:49:36.424173 Display FSP Version Info HOB
648 07:49:36.426871 Reference Code - CPU = 9.0.1e.30
649 07:49:36.429931 uCode Version = 0.0.0.ca
650 07:49:36.433230 TXT ACM version = ff.ff.ff.ffff
651 07:49:36.436680 Display FSP Version Info HOB
652 07:49:36.440086 Reference Code - ME = 9.0.1e.30
653 07:49:36.443043 MEBx version = 0.0.0.0
654 07:49:36.446626 ME Firmware Version = Consumer SKU
655 07:49:36.450288 Display FSP Version Info HOB
656 07:49:36.453163 Reference Code - CML PCH = 9.0.1e.30
657 07:49:36.456160 PCH-CRID Status = Disabled
658 07:49:36.459791 PCH-CRID Original Value = ff.ff.ff.ffff
659 07:49:36.462732 PCH-CRID New Value = ff.ff.ff.ffff
660 07:49:36.466320 OPROM - RST - RAID = ff.ff.ff.ffff
661 07:49:36.469356 ChipsetInit Base Version = ff.ff.ff.ffff
662 07:49:36.472466 ChipsetInit Oem Version = ff.ff.ff.ffff
663 07:49:36.475865 Display FSP Version Info HOB
664 07:49:36.482541 Reference Code - SA - System Agent = 9.0.1e.30
665 07:49:36.485687 Reference Code - MRC = 0.7.1.6c
666 07:49:36.489151 SA - PCIe Version = 9.0.1e.30
667 07:49:36.492673 SA-CRID Status = Disabled
668 07:49:36.495462 SA-CRID Original Value = 0.0.0.c
669 07:49:36.495555 SA-CRID New Value = 0.0.0.c
670 07:49:36.498969 OPROM - VBIOS = ff.ff.ff.ffff
671 07:49:36.502496 RTC Init
672 07:49:36.505438 Set power on after power failure.
673 07:49:36.505523 Disabling Deep S3
674 07:49:36.509197 Disabling Deep S3
675 07:49:36.512065 Disabling Deep S4
676 07:49:36.512149 Disabling Deep S4
677 07:49:36.515537 Disabling Deep S5
678 07:49:36.515622 Disabling Deep S5
679 07:49:36.522110 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
680 07:49:36.525622 Enumerating buses...
681 07:49:36.528612 Show all devs... Before device enumeration.
682 07:49:36.531569 Root Device: enabled 1
683 07:49:36.535099 CPU_CLUSTER: 0: enabled 1
684 07:49:36.535199 DOMAIN: 0000: enabled 1
685 07:49:36.538039 APIC: 00: enabled 1
686 07:49:36.541746 PCI: 00:00.0: enabled 1
687 07:49:36.541832 PCI: 00:02.0: enabled 1
688 07:49:36.544652 PCI: 00:04.0: enabled 0
689 07:49:36.548153 PCI: 00:05.0: enabled 0
690 07:49:36.551694 PCI: 00:12.0: enabled 1
691 07:49:36.551813 PCI: 00:12.5: enabled 0
692 07:49:36.554581 PCI: 00:12.6: enabled 0
693 07:49:36.557783 PCI: 00:14.0: enabled 1
694 07:49:36.561411 PCI: 00:14.1: enabled 0
695 07:49:36.561496 PCI: 00:14.3: enabled 1
696 07:49:36.564439 PCI: 00:14.5: enabled 0
697 07:49:36.567891 PCI: 00:15.0: enabled 1
698 07:49:36.570968 PCI: 00:15.1: enabled 1
699 07:49:36.571099 PCI: 00:15.2: enabled 0
700 07:49:36.574614 PCI: 00:15.3: enabled 0
701 07:49:36.577548 PCI: 00:16.0: enabled 1
702 07:49:36.580730 PCI: 00:16.1: enabled 0
703 07:49:36.580825 PCI: 00:16.2: enabled 0
704 07:49:36.584318 PCI: 00:16.3: enabled 0
705 07:49:36.587239 PCI: 00:16.4: enabled 0
706 07:49:36.590894 PCI: 00:16.5: enabled 0
707 07:49:36.590982 PCI: 00:17.0: enabled 1
708 07:49:36.593932 PCI: 00:19.0: enabled 1
709 07:49:36.597110 PCI: 00:19.1: enabled 0
710 07:49:36.600606 PCI: 00:19.2: enabled 0
711 07:49:36.600691 PCI: 00:1a.0: enabled 0
712 07:49:36.603917 PCI: 00:1c.0: enabled 0
713 07:49:36.606991 PCI: 00:1c.1: enabled 0
714 07:49:36.607077 PCI: 00:1c.2: enabled 0
715 07:49:36.610565
716 07:49:36.610650 PCI: 00:1c.3: enabled 0
717 07:49:36.613530 PCI: 00:1c.4: enabled 0
718 07:49:36.617132 PCI: 00:1c.5: enabled 0
719 07:49:36.617243 PCI: 00:1c.6: enabled 0
720 07:49:36.620248 PCI: 00:1c.7: enabled 0
721 07:49:36.623181 PCI: 00:1d.0: enabled 1
722 07:49:36.626486 PCI: 00:1d.1: enabled 0
723 07:49:36.626567 PCI: 00:1d.2: enabled 0
724 07:49:36.630125 PCI: 00:1d.3: enabled 0
725 07:49:36.632952 PCI: 00:1d.4: enabled 0
726 07:49:36.636570 PCI: 00:1d.5: enabled 1
727 07:49:36.636649 PCI: 00:1e.0: enabled 1
728 07:49:36.639552 PCI: 00:1e.1: enabled 0
729 07:49:36.642935 PCI: 00:1e.2: enabled 1
730 07:49:36.646436 PCI: 00:1e.3: enabled 1
731 07:49:36.646525 PCI: 00:1f.0: enabled 1
732 07:49:36.649556 PCI: 00:1f.1: enabled 1
733 07:49:36.653158 PCI: 00:1f.2: enabled 1
734 07:49:36.656038 PCI: 00:1f.3: enabled 1
735 07:49:36.656123 PCI: 00:1f.4: enabled 1
736 07:49:36.659145 PCI: 00:1f.5: enabled 1
737 07:49:36.662873 PCI: 00:1f.6: enabled 0
738 07:49:36.665828 USB0 port 0: enabled 1
739 07:49:36.665912 I2C: 00:15: enabled 1
740 07:49:36.669290 I2C: 00:5d: enabled 1
741 07:49:36.672294 GENERIC: 0.0: enabled 1
742 07:49:36.672377 I2C: 00:1a: enabled 1
743 07:49:36.676012 I2C: 00:38: enabled 1
744 07:49:36.679037 I2C: 00:39: enabled 1
745 07:49:36.679120 I2C: 00:3a: enabled 1
746 07:49:36.682608 I2C: 00:3b: enabled 1
747 07:49:36.685821 PCI: 00:00.0: enabled 1
748 07:49:36.685921 SPI: 00: enabled 1
749 07:49:36.688864 SPI: 01: enabled 1
750 07:49:36.692097 PNP: 0c09.0: enabled 1
751 07:49:36.692181 USB2 port 0: enabled 1
752 07:49:36.695529 USB2 port 1: enabled 1
753 07:49:36.698507 USB2 port 2: enabled 0
754 07:49:36.701877 USB2 port 3: enabled 0
755 07:49:36.701956 USB2 port 5: enabled 0
756 07:49:36.705100 USB2 port 6: enabled 1
757 07:49:36.708599 USB2 port 9: enabled 1
758 07:49:36.708687 USB3 port 0: enabled 1
759 07:49:36.711667 USB3 port 1: enabled 1
760 07:49:36.715163 USB3 port 2: enabled 1
761 07:49:36.718230 USB3 port 3: enabled 1
762 07:49:36.718314 USB3 port 4: enabled 0
763 07:49:36.721798 APIC: 02: enabled 1
764 07:49:36.724819 APIC: 01: enabled 1
765 07:49:36.724904 APIC: 03: enabled 1
766 07:49:36.728277 APIC: 07: enabled 1
767 07:49:36.728364 APIC: 06: enabled 1
768 07:49:36.731300 APIC: 04: enabled 1
769 07:49:36.734820 APIC: 05: enabled 1
770 07:49:36.734905 Compare with tree...
771 07:49:36.737679 Root Device: enabled 1
772 07:49:36.741169 CPU_CLUSTER: 0: enabled 1
773 07:49:36.744830 APIC: 00: enabled 1
774 07:49:36.744929 APIC: 02: enabled 1
775 07:49:36.747720 APIC: 01: enabled 1
776 07:49:36.751268 APIC: 03: enabled 1
777 07:49:36.751353 APIC: 07: enabled 1
778 07:49:36.754172 APIC: 06: enabled 1
779 07:49:36.757571 APIC: 04: enabled 1
780 07:49:36.757657 APIC: 05: enabled 1
781 07:49:36.760698 DOMAIN: 0000: enabled 1
782 07:49:36.764281 PCI: 00:00.0: enabled 1
783 07:49:36.767194 PCI: 00:02.0: enabled 1
784 07:49:36.770835 PCI: 00:04.0: enabled 0
785 07:49:36.770919 PCI: 00:05.0: enabled 0
786 07:49:36.773697 PCI: 00:12.0: enabled 1
787 07:49:36.777158 PCI: 00:12.5: enabled 0
788 07:49:36.780083 PCI: 00:12.6: enabled 0
789 07:49:36.783711 PCI: 00:14.0: enabled 1
790 07:49:36.783798 USB0 port 0: enabled 1
791 07:49:36.786760 USB2 port 0: enabled 1
792 07:49:36.790393 USB2 port 1: enabled 1
793 07:49:36.793481 USB2 port 2: enabled 0
794 07:49:36.796407 USB2 port 3: enabled 0
795 07:49:36.799802 USB2 port 5: enabled 0
796 07:49:36.799887 USB2 port 6: enabled 1
797 07:49:36.803429 USB2 port 9: enabled 1
798 07:49:36.806368 USB3 port 0: enabled 1
799 07:49:36.809902 USB3 port 1: enabled 1
800 07:49:36.812941 USB3 port 2: enabled 1
801 07:49:36.816486 USB3 port 3: enabled 1
802 07:49:36.816568 USB3 port 4: enabled 0
803 07:49:36.819353 PCI: 00:14.1: enabled 0
804 07:49:36.823015 PCI: 00:14.3: enabled 1
805 07:49:36.826012 PCI: 00:14.5: enabled 0
806 07:49:36.828961 PCI: 00:15.0: enabled 1
807 07:49:36.829042 I2C: 00:15: enabled 1
808 07:49:36.832463 PCI: 00:15.1: enabled 1
809 07:49:36.835994 I2C: 00:5d: enabled 1
810 07:49:36.838921 GENERIC: 0.0: enabled 1
811 07:49:36.842254 PCI: 00:15.2: enabled 0
812 07:49:36.842367 PCI: 00:15.3: enabled 0
813 07:49:36.845804 PCI: 00:16.0: enabled 1
814 07:49:36.848678 PCI: 00:16.1: enabled 0
815 07:49:36.852371 PCI: 00:16.2: enabled 0
816 07:49:36.855289 PCI: 00:16.3: enabled 0
817 07:49:36.855375 PCI: 00:16.4: enabled 0
818 07:49:36.858861 PCI: 00:16.5: enabled 0
819 07:49:36.861754 PCI: 00:17.0: enabled 1
820 07:49:36.865503 PCI: 00:19.0: enabled 1
821 07:49:36.868601 I2C: 00:1a: enabled 1
822 07:49:36.868679 I2C: 00:38: enabled 1
823 07:49:36.872003 I2C: 00:39: enabled 1
824 07:49:36.875006 I2C: 00:3a: enabled 1
825 07:49:36.878606 I2C: 00:3b: enabled 1
826 07:49:36.878686 PCI: 00:19.1: enabled 0
827 07:49:36.881657
828 07:49:36.881741 PCI: 00:19.2: enabled 0
829 07:49:36.884666 PCI: 00:1a.0: enabled 0
830 07:49:36.888351 PCI: 00:1c.0: enabled 0
831 07:49:36.891194 PCI: 00:1c.1: enabled 0
832 07:49:36.894853 PCI: 00:1c.2: enabled 0
833 07:49:36.894945 PCI: 00:1c.3: enabled 0
834 07:49:36.897814 PCI: 00:1c.4: enabled 0
835 07:49:36.901515 PCI: 00:1c.5: enabled 0
836 07:49:36.904362 PCI: 00:1c.6: enabled 0
837 07:49:36.907454 PCI: 00:1c.7: enabled 0
838 07:49:36.907545 PCI: 00:1d.0: enabled 1
839 07:49:36.910763 PCI: 00:1d.1: enabled 0
840 07:49:36.914495 PCI: 00:1d.2: enabled 0
841 07:49:36.917393 PCI: 00:1d.3: enabled 0
842 07:49:36.920989 PCI: 00:1d.4: enabled 0
843 07:49:36.921070 PCI: 00:1d.5: enabled 1
844 07:49:36.924323 PCI: 00:00.0: enabled 1
845 07:49:36.927332 PCI: 00:1e.0: enabled 1
846 07:49:36.930852 PCI: 00:1e.1: enabled 0
847 07:49:36.934318 PCI: 00:1e.2: enabled 1
848 07:49:36.934395 SPI: 00: enabled 1
849 07:49:36.937131 PCI: 00:1e.3: enabled 1
850 07:49:36.940882 SPI: 01: enabled 1
851 07:49:36.943533 PCI: 00:1f.0: enabled 1
852 07:49:36.943607 PNP: 0c09.0: enabled 1
853 07:49:36.947179 PCI: 00:1f.1: enabled 1
854 07:49:36.950425 PCI: 00:1f.2: enabled 1
855 07:49:36.953443 PCI: 00:1f.3: enabled 1
856 07:49:36.956942 PCI: 00:1f.4: enabled 1
857 07:49:36.957019 PCI: 00:1f.5: enabled 1
858 07:49:36.960011 PCI: 00:1f.6: enabled 0
859 07:49:36.963483 Root Device scanning...
860 07:49:36.967102 scan_static_bus for Root Device
861 07:49:36.969820 CPU_CLUSTER: 0 enabled
862 07:49:36.969900 DOMAIN: 0000 enabled
863 07:49:36.973437 DOMAIN: 0000 scanning...
864 07:49:36.976380 PCI: pci_scan_bus for bus 00
865 07:49:36.979916 PCI: 00:00.0 [8086/0000] ops
866 07:49:36.982996 PCI: 00:00.0 [8086/9b61] enabled
867 07:49:36.986668 PCI: 00:02.0 [8086/0000] bus ops
868 07:49:36.989673 PCI: 00:02.0 [8086/9b41] enabled
869 07:49:36.992732 PCI: 00:04.0 [8086/1903] disabled
870 07:49:36.995909 PCI: 00:08.0 [8086/1911] enabled
871 07:49:36.999478 PCI: 00:12.0 [8086/02f9] enabled
872 07:49:37.002482 PCI: 00:14.0 [8086/0000] bus ops
873 07:49:37.005899 PCI: 00:14.0 [8086/02ed] enabled
874 07:49:37.009392 PCI: 00:14.2 [8086/02ef] enabled
875 07:49:37.012447 PCI: 00:14.3 [8086/02f0] enabled
876 07:49:37.015879 PCI: 00:15.0 [8086/0000] bus ops
877 07:49:37.018999 PCI: 00:15.0 [8086/02e8] enabled
878 07:49:37.022617 PCI: 00:15.1 [8086/0000] bus ops
879 07:49:37.025553 PCI: 00:15.1 [8086/02e9] enabled
880 07:49:37.028626 PCI: 00:16.0 [8086/0000] ops
881 07:49:37.032134 PCI: 00:16.0 [8086/02e0] enabled
882 07:49:37.035658 PCI: 00:17.0 [8086/0000] ops
883 07:49:37.038697 PCI: 00:17.0 [8086/02d3] enabled
884 07:49:37.042197 PCI: 00:19.0 [8086/0000] bus ops
885 07:49:37.045137 PCI: 00:19.0 [8086/02c5] enabled
886 07:49:37.048457 PCI: 00:1d.0 [8086/0000] bus ops
887 07:49:37.051950 PCI: 00:1d.0 [8086/02b0] enabled
888 07:49:37.057956 PCI: Static device PCI: 00:1d.5 not found, disabling it.
889 07:49:37.061637 PCI: 00:1e.0 [8086/0000] ops
890 07:49:37.065212 PCI: 00:1e.0 [8086/02a8] enabled
891 07:49:37.068224 PCI: 00:1e.2 [8086/0000] bus ops
892 07:49:37.071692 PCI: 00:1e.2 [8086/02aa] enabled
893 07:49:37.074545 PCI: 00:1e.3 [8086/0000] bus ops
894 07:49:37.078009 PCI: 00:1e.3 [8086/02ab] enabled
895 07:49:37.081160 PCI: 00:1f.0 [8086/0000] bus ops
896 07:49:37.084212 PCI: 00:1f.0 [8086/0284] enabled
897 07:49:37.090733 PCI: Static device PCI: 00:1f.1 not found, disabling it.
898 07:49:37.094202 PCI: Static device PCI: 00:1f.2 not found, disabling it.
899 07:49:37.097943 PCI: 00:1f.3 [8086/0000] bus ops
900 07:49:37.100634 PCI: 00:1f.3 [8086/02c8] enabled
901 07:49:37.103925 PCI: 00:1f.4 [8086/0000] bus ops
902 07:49:37.107295 PCI: 00:1f.4 [8086/02a3] enabled
903 07:49:37.110492 PCI: 00:1f.5 [8086/0000] bus ops
904 07:49:37.113899 PCI: 00:1f.5 [8086/02a4] enabled
905 07:49:37.117679 PCI: Leftover static devices:
906 07:49:37.120533 PCI: 00:05.0
907 07:49:37.120635 PCI: 00:12.5
908 07:49:37.123677 PCI: 00:12.6
909 07:49:37.123790 PCI: 00:14.1
910 07:49:37.123859 PCI: 00:14.5
911 07:49:37.127030 PCI: 00:15.2
912 07:49:37.127122 PCI: 00:15.3
913 07:49:37.130288 PCI: 00:16.1
914 07:49:37.130388 PCI: 00:16.2
915 07:49:37.133351 PCI: 00:16.3
916 07:49:37.133445 PCI: 00:16.4
917 07:49:37.133513 PCI: 00:16.5
918 07:49:37.136872 PCI: 00:19.1
919 07:49:37.136974 PCI: 00:19.2
920 07:49:37.140250 PCI: 00:1a.0
921 07:49:37.140365 PCI: 00:1c.0
922 07:49:37.140436 PCI: 00:1c.1
923 07:49:37.143153 PCI: 00:1c.2
924 07:49:37.143245 PCI: 00:1c.3
925 07:49:37.146657 PCI: 00:1c.4
926 07:49:37.146761 PCI: 00:1c.5
927 07:49:37.149816 PCI: 00:1c.6
928 07:49:37.149903 PCI: 00:1c.7
929 07:49:37.149970 PCI: 00:1d.1
930 07:49:37.152769 PCI: 00:1d.2
931 07:49:37.152863 PCI: 00:1d.3
932 07:49:37.156306 PCI: 00:1d.4
933 07:49:37.156391 PCI: 00:1d.5
934 07:49:37.156459 PCI: 00:1e.1
935 07:49:37.159502 PCI: 00:1f.1
936 07:49:37.159583 PCI: 00:1f.2
937 07:49:37.162979 PCI: 00:1f.6
938 07:49:37.165872 PCI: Check your devicetree.cb.
939 07:49:37.165954 PCI: 00:02.0 scanning...
940 07:49:37.169489 scan_generic_bus for PCI: 00:02.0
941 07:49:37.172948
942 07:49:37.176550 scan_generic_bus for PCI: 00:02.0 done
943 07:49:37.179465 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
944 07:49:37.182954 PCI: 00:14.0 scanning...
945 07:49:37.185937 scan_static_bus for PCI: 00:14.0
946 07:49:37.189071 USB0 port 0 enabled
947 07:49:37.192747 USB0 port 0 scanning...
948 07:49:37.195713 scan_static_bus for USB0 port 0
949 07:49:37.195799 USB2 port 0 enabled
950 07:49:37.199382 USB2 port 1 enabled
951 07:49:37.202430 USB2 port 2 disabled
952 07:49:37.202520 USB2 port 3 disabled
953 07:49:37.205493 USB2 port 5 disabled
954 07:49:37.209060 USB2 port 6 enabled
955 07:49:37.209198 USB2 port 9 enabled
956 07:49:37.212558 USB3 port 0 enabled
957 07:49:37.212684 USB3 port 1 enabled
958 07:49:37.215385 USB3 port 2 enabled
959 07:49:37.218910 USB3 port 3 enabled
960 07:49:37.219083 USB3 port 4 disabled
961 07:49:37.221820 USB2 port 0 scanning...
962 07:49:37.225408 scan_static_bus for USB2 port 0
963 07:49:37.228522 scan_static_bus for USB2 port 0 done
964 07:49:37.235189 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
965 07:49:37.238558 USB2 port 1 scanning...
966 07:49:37.241510 scan_static_bus for USB2 port 1
967 07:49:37.245013 scan_static_bus for USB2 port 1 done
968 07:49:37.248028 scan_bus: scanning of bus USB2 port 1 took 9697 usecs
969 07:49:37.251661 USB2 port 6 scanning...
970 07:49:37.254851 scan_static_bus for USB2 port 6
971 07:49:37.257808 scan_static_bus for USB2 port 6 done
972 07:49:37.264562 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
973 07:49:37.267924 USB2 port 9 scanning...
974 07:49:37.271477 scan_static_bus for USB2 port 9
975 07:49:37.274447 scan_static_bus for USB2 port 9 done
976 07:49:37.281140 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
977 07:49:37.281227 USB3 port 0 scanning...
978 07:49:37.284090 scan_static_bus for USB3 port 0
979 07:49:37.290764 scan_static_bus for USB3 port 0 done
980 07:49:37.294357 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
981 07:49:37.297334 USB3 port 1 scanning...
982 07:49:37.300471 scan_static_bus for USB3 port 1
983 07:49:37.304061 scan_static_bus for USB3 port 1 done
984 07:49:37.310772 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
985 07:49:37.310862 USB3 port 2 scanning...
986 07:49:37.313692
987 07:49:37.317332 scan_static_bus for USB3 port 2
988 07:49:37.320385 scan_static_bus for USB3 port 2 done
989 07:49:37.323789 scan_bus: scanning of bus USB3 port 2 took 9688 usecs
990 07:49:37.326791 USB3 port 3 scanning...
991 07:49:37.329952 scan_static_bus for USB3 port 3
992 07:49:37.333419 scan_static_bus for USB3 port 3 done
993 07:49:37.339908 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
994 07:49:37.343452 scan_static_bus for USB0 port 0 done
995 07:49:37.349422 scan_bus: scanning of bus USB0 port 0 took 155320 usecs
996 07:49:37.352772 scan_static_bus for PCI: 00:14.0 done
997 07:49:37.359345 scan_bus: scanning of bus PCI: 00:14.0 took 172934 usecs
998 07:49:37.359444 PCI: 00:15.0 scanning...
999 07:49:37.365965 scan_generic_bus for PCI: 00:15.0
1000 07:49:37.369432 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1001 07:49:37.373022 scan_generic_bus for PCI: 00:15.0 done
1002 07:49:37.379599 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
1003 07:49:37.379698 PCI: 00:15.1 scanning...
1004 07:49:37.386061 scan_generic_bus for PCI: 00:15.1
1005 07:49:37.389264 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1006 07:49:37.392929 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1007 07:49:37.395913 scan_generic_bus for PCI: 00:15.1 done
1008 07:49:37.402649 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
1009 07:49:37.405698 PCI: 00:19.0 scanning...
1010 07:49:37.408741 scan_generic_bus for PCI: 00:19.0
1011 07:49:37.412312 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1012 07:49:37.415246 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1013 07:49:37.422422 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1014 07:49:37.425218 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1015 07:49:37.428319 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1016 07:49:37.431879 scan_generic_bus for PCI: 00:19.0 done
1017 07:49:37.438497 scan_bus: scanning of bus PCI: 00:19.0 took 30732 usecs
1018 07:49:37.441446 PCI: 00:1d.0 scanning...
1019 07:49:37.445011 do_pci_scan_bridge for PCI: 00:1d.0
1020 07:49:37.447901 PCI: pci_scan_bus for bus 01
1021 07:49:37.451403 PCI: 01:00.0 [1c5c/1327] enabled
1022 07:49:37.454465 Enabling Common Clock Configuration
1023 07:49:37.457898 L1 Sub-State supported from root port 29
1024 07:49:37.461127 L1 Sub-State Support = 0xf
1025 07:49:37.464565 CommonModeRestoreTime = 0x28
1026 07:49:37.468093 Power On Value = 0x16, Power On Scale = 0x0
1027 07:49:37.470949 ASPM: Enabled L1
1028 07:49:37.477569 scan_bus: scanning of bus PCI: 00:1d.0 took 32770 usecs
1029 07:49:37.477656 PCI: 00:1e.2 scanning...
1030 07:49:37.481032 scan_generic_bus for PCI: 00:1e.2
1031 07:49:37.484739
1032 07:49:37.487741 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1033 07:49:37.490903 scan_generic_bus for PCI: 00:1e.2 done
1034 07:49:37.497471 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1035 07:49:37.497556 PCI: 00:1e.3 scanning...
1036 07:49:37.500605 scan_generic_bus for PCI: 00:1e.3
1037 07:49:37.507093 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1038 07:49:37.510635 scan_generic_bus for PCI: 00:1e.3 done
1039 07:49:37.514334 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1040 07:49:37.517141
1041 07:49:37.517226 PCI: 00:1f.0 scanning...
1042 07:49:37.520728 scan_static_bus for PCI: 00:1f.0
1043 07:49:37.523823 PNP: 0c09.0 enabled
1044 07:49:37.526708 scan_static_bus for PCI: 00:1f.0 done
1045 07:49:37.533733 scan_bus: scanning of bus PCI: 00:1f.0 took 12038 usecs
1046 07:49:37.536838 PCI: 00:1f.3 scanning...
1047 07:49:37.539759 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1048 07:49:37.543370 PCI: 00:1f.4 scanning...
1049 07:49:37.546520 scan_generic_bus for PCI: 00:1f.4
1050 07:49:37.549958 scan_generic_bus for PCI: 00:1f.4 done
1051 07:49:37.556576 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1052 07:49:37.559423 PCI: 00:1f.5 scanning...
1053 07:49:37.562852 scan_generic_bus for PCI: 00:1f.5
1054 07:49:37.565981 scan_generic_bus for PCI: 00:1f.5 done
1055 07:49:37.572583 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1056 07:49:37.579601 scan_bus: scanning of bus DOMAIN: 0000 took 604811 usecs
1057 07:49:37.582588 scan_static_bus for Root Device done
1058 07:49:37.589072 scan_bus: scanning of bus Root Device took 624679 usecs
1059 07:49:37.589163 done
1060 07:49:37.592275 Chrome EC: UHEPI supported
1061 07:49:37.598937 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 07:49:37.602317 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 07:49:37.608438 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 07:49:37.615802 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 07:49:37.619242 SPI flash protection: WPSW=0 SRP0=0
1066 07:49:37.625719 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 07:49:37.628834 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1068 07:49:37.632632 found VGA at PCI: 00:02.0
1069 07:49:37.635441 Setting up VGA for PCI: 00:02.0
1070 07:49:37.642001 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 07:49:37.645485 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 07:49:37.648563 Allocating resources...
1073 07:49:37.651560 Reading resources...
1074 07:49:37.655172 Root Device read_resources bus 0 link: 0
1075 07:49:37.658444 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 07:49:37.664921 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 07:49:37.667887 DOMAIN: 0000 read_resources bus 0 link: 0
1078 07:49:37.675799 PCI: 00:14.0 read_resources bus 0 link: 0
1079 07:49:37.679465 USB0 port 0 read_resources bus 0 link: 0
1080 07:49:37.687177 USB0 port 0 read_resources bus 0 link: 0 done
1081 07:49:37.690754 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 07:49:37.698179 PCI: 00:15.0 read_resources bus 1 link: 0
1083 07:49:37.701291 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 07:49:37.707844 PCI: 00:15.1 read_resources bus 2 link: 0
1085 07:49:37.711013 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 07:49:37.718660 PCI: 00:19.0 read_resources bus 3 link: 0
1087 07:49:37.725240 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 07:49:37.728573 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 07:49:37.735261 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 07:49:37.738304 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 07:49:37.745148 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 07:49:37.748561 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 07:49:37.754996 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 07:49:37.757961 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 07:49:37.764438 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 07:49:37.771427 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 07:49:37.774223 Root Device read_resources bus 0 link: 0 done
1098 07:49:37.777845 Done reading resources.
1099 07:49:37.784073 Show resources in subtree (Root Device)...After reading.
1100 07:49:37.787706 Root Device child on link 0 CPU_CLUSTER: 0
1101 07:49:37.790547 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 07:49:37.793992 APIC: 00
1103 07:49:37.794114 APIC: 02
1104 07:49:37.797262 APIC: 01
1105 07:49:37.797374 APIC: 03
1106 07:49:37.797466 APIC: 07
1107 07:49:37.800802 APIC: 06
1108 07:49:37.800888 APIC: 04
1109 07:49:37.800954 APIC: 05
1110 07:49:37.853399 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 07:49:37.853630 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 07:49:37.853935 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 07:49:37.854022 PCI: 00:00.0
1114 07:49:37.854094 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 07:49:37.854375 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 07:49:37.901275 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 07:49:37.901800 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 07:49:37.901878 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 07:49:37.901944 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 07:49:37.903134 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 07:49:37.905592 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 07:49:37.911642 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 07:49:37.921962 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 07:49:37.928264 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 07:49:37.938523 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 07:49:37.948017 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 07:49:37.957751 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 07:49:37.967645 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 07:49:37.977077 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 07:49:37.977195 PCI: 00:02.0
1131 07:49:37.990590 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 07:49:38.000027 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 07:49:38.006552 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 07:49:38.010290 PCI: 00:04.0
1135 07:49:38.010382 PCI: 00:08.0
1136 07:49:38.019897 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 07:49:38.023040 PCI: 00:12.0
1138 07:49:38.032912 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 07:49:38.035804 PCI: 00:14.0 child on link 0 USB0 port 0
1140 07:49:38.045999 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 07:49:38.052540 USB0 port 0 child on link 0 USB2 port 0
1142 07:49:38.052705 USB2 port 0
1143 07:49:38.055432 USB2 port 1
1144 07:49:38.055516 USB2 port 2
1145 07:49:38.059006 USB2 port 3
1146 07:49:38.059088 USB2 port 5
1147 07:49:38.061964 USB2 port 6
1148 07:49:38.062053 USB2 port 9
1149 07:49:38.065379 USB3 port 0
1150 07:49:38.065511 USB3 port 1
1151 07:49:38.068964 USB3 port 2
1152 07:49:38.069094 USB3 port 3
1153 07:49:38.071928
1154 07:49:38.072070 USB3 port 4
1155 07:49:38.075526 PCI: 00:14.2
1156 07:49:38.085072 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 07:49:38.094863 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 07:49:38.095013 PCI: 00:14.3
1159 07:49:38.105070 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 07:49:38.107957 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 07:49:38.117858 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 07:49:38.120871 I2C: 01:15
1163 07:49:38.124484 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 07:49:38.133903 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 07:49:38.137260 I2C: 02:5d
1166 07:49:38.137351 GENERIC: 0.0
1167 07:49:38.140795 PCI: 00:16.0
1168 07:49:38.150560 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:49:38.150691 PCI: 00:17.0
1170 07:49:38.160563 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 07:49:38.170503 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 07:49:38.176949 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 07:49:38.186689 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 07:49:38.193072 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 07:49:38.202850 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 07:49:38.209483 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 07:49:38.219144 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 07:49:38.219289 I2C: 03:1a
1179 07:49:38.222786 I2C: 03:38
1180 07:49:38.222904 I2C: 03:39
1181 07:49:38.223006 I2C: 03:3a
1182 07:49:38.225924 I2C: 03:3b
1183 07:49:38.228876 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 07:49:38.238905 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 07:49:38.248737 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 07:49:38.258923 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 07:49:38.259071 PCI: 01:00.0
1188 07:49:38.268586 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 07:49:38.271546 PCI: 00:1e.0
1190 07:49:38.281498 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 07:49:38.291497 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 07:49:38.294548 PCI: 00:1e.2 child on link 0 SPI: 00
1193 07:49:38.304678 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 07:49:38.307612 SPI: 00
1195 07:49:38.311245 PCI: 00:1e.3 child on link 0 SPI: 01
1196 07:49:38.320712 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 07:49:38.323738 SPI: 01
1198 07:49:38.327416 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 07:49:38.333972 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 07:49:38.336838
1201 07:49:38.343646 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1202 07:49:38.346751 PNP: 0c09.0
1203 07:49:38.353244 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1204 07:49:38.356457 PCI: 00:1f.3
1205 07:49:38.366381 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 07:49:38.375872 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1207 07:49:38.379387 PCI: 00:1f.4
1208 07:49:38.386015 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1209 07:49:38.395543 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1210 07:49:38.398926 PCI: 00:1f.5
1211 07:49:38.408521 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1212 07:49:38.415089 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1213 07:49:38.421713 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1214 07:49:38.428543 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1215 07:49:38.431578 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1216 07:49:38.435057 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1217 07:49:38.437951 PCI: 00:17.0 18 * [0x60 - 0x67] io
1218 07:49:38.441245 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1219 07:49:38.448050 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1220 07:49:38.454580 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1221 07:49:38.464070 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1222 07:49:38.471132 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1223 07:49:38.477558 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1224 07:49:38.480495 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1225 07:49:38.490590 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1226 07:49:38.493543 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1227 07:49:38.500244 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1228 07:49:38.503834 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1229 07:49:38.509823 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1230 07:49:38.513559 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1231 07:49:38.520055 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1232 07:49:38.523463 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1233 07:49:38.529486 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1234 07:49:38.533165 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1235 07:49:38.539599 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1236 07:49:38.542568 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1237 07:49:38.549263 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1238 07:49:38.552862 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1239 07:49:38.558955 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1240 07:49:38.562648 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1241 07:49:38.569376 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1242 07:49:38.572248 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1243 07:49:38.578941 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1244 07:49:38.581811 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1245 07:49:38.588463 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1246 07:49:38.591932 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1247 07:49:38.598385 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1248 07:49:38.601344 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1249 07:49:38.611394 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1250 07:49:38.614402 avoid_fixed_resources: DOMAIN: 0000
1251 07:49:38.620921 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1252 07:49:38.624615 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1253 07:49:38.634139 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1254 07:49:38.640775 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1255 07:49:38.647148 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1256 07:49:38.656795 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1257 07:49:38.663403 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1258 07:49:38.669913 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 07:49:38.679855 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1260 07:49:38.686430 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1261 07:49:38.692835 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1262 07:49:38.702440 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1263 07:49:38.702562 Setting resources...
1264 07:49:38.709057 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1265 07:49:38.712651 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1266 07:49:38.719096 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1267 07:49:38.722053 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1268 07:49:38.725608 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1269 07:49:38.732355 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1270 07:49:38.738362 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1271 07:49:38.744922 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1272 07:49:38.751928 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1273 07:49:38.758553 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1274 07:49:38.761630 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1275 07:49:38.768085 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1276 07:49:38.771132 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1277 07:49:38.778130 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1278 07:49:38.781149 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1279 07:49:38.787425 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1280 07:49:38.791162 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1281 07:49:38.797598 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1282 07:49:38.800488 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1283 07:49:38.807083 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1284 07:49:38.810609 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1285 07:49:38.817044 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1286 07:49:38.820281 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1287 07:49:38.826843 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1288 07:49:38.829823 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1289 07:49:38.836538 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1290 07:49:38.839568 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1291 07:49:38.846040 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1292 07:49:38.849473 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1293 07:49:38.856329 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1294 07:49:38.859381 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1295 07:49:38.862917 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1296 07:49:38.865869
1297 07:49:38.872437 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1298 07:49:38.878887 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1299 07:49:38.885448 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1300 07:49:38.895577 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1301 07:49:38.898485 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1302 07:49:38.905078 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1303 07:49:38.911656 Root Device assign_resources, bus 0 link: 0
1304 07:49:38.915395 DOMAIN: 0000 assign_resources, bus 0 link: 0
1305 07:49:38.924698 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1306 07:49:38.931502 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1307 07:49:38.941093 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1308 07:49:38.947645 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1309 07:49:38.957831 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1310 07:49:38.964191 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1311 07:49:38.970718 PCI: 00:14.0 assign_resources, bus 0 link: 0
1312 07:49:38.973610 PCI: 00:14.0 assign_resources, bus 0 link: 0
1313 07:49:38.983641 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1314 07:49:38.990000 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1315 07:49:38.999852 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1316 07:49:39.006266 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1317 07:49:39.009855 PCI: 00:15.0 assign_resources, bus 1 link: 0
1318 07:49:39.012730
1319 07:49:39.016269 PCI: 00:15.0 assign_resources, bus 1 link: 0
1320 07:49:39.022723 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1321 07:49:39.026375
1322 07:49:39.029340 PCI: 00:15.1 assign_resources, bus 2 link: 0
1323 07:49:39.032966 PCI: 00:15.1 assign_resources, bus 2 link: 0
1324 07:49:39.042571 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1325 07:49:39.049187 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1326 07:49:39.058710 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1327 07:49:39.065192 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1328 07:49:39.071466 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1329 07:49:39.081410 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1330 07:49:39.087980 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1331 07:49:39.097922 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1332 07:49:39.100827 PCI: 00:19.0 assign_resources, bus 3 link: 0
1333 07:49:39.107654 PCI: 00:19.0 assign_resources, bus 3 link: 0
1334 07:49:39.114277 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1335 07:49:39.123834 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1336 07:49:39.130751 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1337 07:49:39.133802
1338 07:49:39.136967 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1339 07:49:39.143785 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1340 07:49:39.150527 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 07:49:39.156574 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1342 07:49:39.166375 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1343 07:49:39.169948 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1344 07:49:39.176619 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1345 07:49:39.183300 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1346 07:49:39.189279 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1347 07:49:39.192732 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1348 07:49:39.199327 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1349 07:49:39.202330 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1350 07:49:39.209066 LPC: Trying to open IO window from 800 size 1ff
1351 07:49:39.215669 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1352 07:49:39.225305 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1353 07:49:39.232044 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1354 07:49:39.241478 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1355 07:49:39.245230 DOMAIN: 0000 assign_resources, bus 0 link: 0
1356 07:49:39.248191 Root Device assign_resources, bus 0 link: 0
1357 07:49:39.251239
1358 07:49:39.251327 Done setting resources.
1359 07:49:39.257858 Show resources in subtree (Root Device)...After assigning values.
1360 07:49:39.264268 Root Device child on link 0 CPU_CLUSTER: 0
1361 07:49:39.267796 CPU_CLUSTER: 0 child on link 0 APIC: 00
1362 07:49:39.267883 APIC: 00
1363 07:49:39.270903 APIC: 02
1364 07:49:39.270984 APIC: 01
1365 07:49:39.271071 APIC: 03
1366 07:49:39.273964 APIC: 07
1367 07:49:39.274042 APIC: 06
1368 07:49:39.277597 APIC: 04
1369 07:49:39.277676 APIC: 05
1370 07:49:39.280615 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 07:49:39.290897 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1372 07:49:39.304098 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1373 07:49:39.304223 PCI: 00:00.0
1374 07:49:39.313657 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 07:49:39.323522 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 07:49:39.333140 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 07:49:39.342790 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 07:49:39.352658 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 07:49:39.359289 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 07:49:39.369089 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 07:49:39.378999 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 07:49:39.389145 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 07:49:39.398823 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1384 07:49:39.408627 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1385 07:49:39.414770 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1386 07:49:39.424428 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1387 07:49:39.434656 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1388 07:49:39.444387 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1389 07:49:39.454432 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1390 07:49:39.457419 PCI: 00:02.0
1391 07:49:39.467251 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1392 07:49:39.477114 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1393 07:49:39.487065 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1394 07:49:39.487238 PCI: 00:04.0
1395 07:49:39.489987 PCI: 00:08.0
1396 07:49:39.499524 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1397 07:49:39.503092 PCI: 00:12.0
1398 07:49:39.512842 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1399 07:49:39.516051 PCI: 00:14.0 child on link 0 USB0 port 0
1400 07:49:39.525752 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1401 07:49:39.532588 USB0 port 0 child on link 0 USB2 port 0
1402 07:49:39.532721 USB2 port 0
1403 07:49:39.535594 USB2 port 1
1404 07:49:39.535695 USB2 port 2
1405 07:49:39.538903 USB2 port 3
1406 07:49:39.539010 USB2 port 5
1407 07:49:39.542368 USB2 port 6
1408 07:49:39.542456 USB2 port 9
1409 07:49:39.545454 USB3 port 0
1410 07:49:39.545540 USB3 port 1
1411 07:49:39.548690 USB3 port 2
1412 07:49:39.548775 USB3 port 3
1413 07:49:39.551727
1414 07:49:39.551849 USB3 port 4
1415 07:49:39.555481 PCI: 00:14.2
1416 07:49:39.565206 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 07:49:39.575181 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 07:49:39.575281 PCI: 00:14.3
1419 07:49:39.584573 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 07:49:39.587824
1421 07:49:39.590872 PCI: 00:15.0 child on link 0 I2C: 01:15
1422 07:49:39.601177 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1423 07:49:39.601272 I2C: 01:15
1424 07:49:39.607835 PCI: 00:15.1 child on link 0 I2C: 02:5d
1425 07:49:39.617485 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1426 07:49:39.617585 I2C: 02:5d
1427 07:49:39.620705 GENERIC: 0.0
1428 07:49:39.620802 PCI: 00:16.0
1429 07:49:39.633649 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1430 07:49:39.633750 PCI: 00:17.0
1431 07:49:39.643427 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1432 07:49:39.653346 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1433 07:49:39.663018 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1434 07:49:39.672847 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1435 07:49:39.682664 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1436 07:49:39.692543 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1437 07:49:39.695425 PCI: 00:19.0 child on link 0 I2C: 03:1a
1438 07:49:39.705528 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1439 07:49:39.708522 I2C: 03:1a
1440 07:49:39.708640 I2C: 03:38
1441 07:49:39.711844 I2C: 03:39
1442 07:49:39.711922 I2C: 03:3a
1443 07:49:39.715351 I2C: 03:3b
1444 07:49:39.718392 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1445 07:49:39.727987 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1446 07:49:39.738349 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1447 07:49:39.748147 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1448 07:49:39.751465 PCI: 01:00.0
1449 07:49:39.760915 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1450 07:49:39.761060 PCI: 00:1e.0
1451 07:49:39.774396 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1452 07:49:39.784063 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1453 07:49:39.787075 PCI: 00:1e.2 child on link 0 SPI: 00
1454 07:49:39.796756 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1455 07:49:39.800423 SPI: 00
1456 07:49:39.803485 PCI: 00:1e.3 child on link 0 SPI: 01
1457 07:49:39.813185 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1458 07:49:39.813280 SPI: 01
1459 07:49:39.819766 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1460 07:49:39.826533 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1461 07:49:39.836322 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1462 07:49:39.839406 PNP: 0c09.0
1463 07:49:39.846017 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1464 07:49:39.849093 PCI: 00:1f.3
1465 07:49:39.859133 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1466 07:49:39.868839 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1467 07:49:39.872509 PCI: 00:1f.4
1468 07:49:39.878736 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1469 07:49:39.881879
1470 07:49:39.891926 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1471 07:49:39.892029 PCI: 00:1f.5
1472 07:49:39.901650 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1473 07:49:39.904726 Done allocating resources.
1474 07:49:39.911418 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1475 07:49:39.914989 Enabling resources...
1476 07:49:39.917999 PCI: 00:00.0 subsystem <- 8086/9b61
1477 07:49:39.921484 PCI: 00:00.0 cmd <- 06
1478 07:49:39.924707 PCI: 00:02.0 subsystem <- 8086/9b41
1479 07:49:39.927632 PCI: 00:02.0 cmd <- 03
1480 07:49:39.927720 PCI: 00:08.0 cmd <- 06
1481 07:49:39.934488 PCI: 00:12.0 subsystem <- 8086/02f9
1482 07:49:39.934585 PCI: 00:12.0 cmd <- 02
1483 07:49:39.937680 PCI: 00:14.0 subsystem <- 8086/02ed
1484 07:49:39.941320 PCI: 00:14.0 cmd <- 02
1485 07:49:39.944464 PCI: 00:14.2 cmd <- 02
1486 07:49:39.947647 PCI: 00:14.3 subsystem <- 8086/02f0
1487 07:49:39.951082 PCI: 00:14.3 cmd <- 02
1488 07:49:39.954249 PCI: 00:15.0 subsystem <- 8086/02e8
1489 07:49:39.957534 PCI: 00:15.0 cmd <- 02
1490 07:49:39.960775 PCI: 00:15.1 subsystem <- 8086/02e9
1491 07:49:39.963845 PCI: 00:15.1 cmd <- 02
1492 07:49:39.967215 PCI: 00:16.0 subsystem <- 8086/02e0
1493 07:49:39.970291 PCI: 00:16.0 cmd <- 02
1494 07:49:39.973814 PCI: 00:17.0 subsystem <- 8086/02d3
1495 07:49:39.976876 PCI: 00:17.0 cmd <- 03
1496 07:49:39.980269 PCI: 00:19.0 subsystem <- 8086/02c5
1497 07:49:39.980391 PCI: 00:19.0 cmd <- 02
1498 07:49:39.983319
1499 07:49:39.986460 PCI: 00:1d.0 bridge ctrl <- 0013
1500 07:49:39.990059 PCI: 00:1d.0 subsystem <- 8086/02b0
1501 07:49:39.990165 PCI: 00:1d.0 cmd <- 06
1502 07:49:39.996791 PCI: 00:1e.0 subsystem <- 8086/02a8
1503 07:49:39.996877 PCI: 00:1e.0 cmd <- 06
1504 07:49:40.000238 PCI: 00:1e.2 subsystem <- 8086/02aa
1505 07:49:40.003356 PCI: 00:1e.2 cmd <- 06
1506 07:49:40.006346 PCI: 00:1e.3 subsystem <- 8086/02ab
1507 07:49:40.009911 PCI: 00:1e.3 cmd <- 02
1508 07:49:40.013018 PCI: 00:1f.0 subsystem <- 8086/0284
1509 07:49:40.016240 PCI: 00:1f.0 cmd <- 407
1510 07:49:40.019913 PCI: 00:1f.3 subsystem <- 8086/02c8
1511 07:49:40.022928 PCI: 00:1f.3 cmd <- 02
1512 07:49:40.026468 PCI: 00:1f.4 subsystem <- 8086/02a3
1513 07:49:40.029523 PCI: 00:1f.4 cmd <- 03
1514 07:49:40.032650 PCI: 00:1f.5 subsystem <- 8086/02a4
1515 07:49:40.036243 PCI: 00:1f.5 cmd <- 406
1516 07:49:40.044467 PCI: 01:00.0 cmd <- 02
1517 07:49:40.049408 done.
1518 07:49:40.061790 ME: Version: 14.0.39.1367
1519 07:49:40.068702 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1520 07:49:40.072200 Initializing devices...
1521 07:49:40.072361 Root Device init ...
1522 07:49:40.078799 Chrome EC: Set SMI mask to 0x0000000000000000
1523 07:49:40.081690 Chrome EC: clear events_b mask to 0x0000000000000000
1524 07:49:40.084999
1525 07:49:40.088209 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1526 07:49:40.095008 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1527 07:49:40.101561 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1528 07:49:40.104696 Chrome EC: Set WAKE mask to 0x0000000000000000
1529 07:49:40.111192 Root Device init finished in 35149 usecs
1530 07:49:40.111345 CPU_CLUSTER: 0 init ...
1531 07:49:40.114038
1532 07:49:40.117721 CPU_CLUSTER: 0 init finished in 2447 usecs
1533 07:49:40.122633 PCI: 00:00.0 init ...
1534 07:49:40.126336 CPU TDP: 15 Watts
1535 07:49:40.129339 CPU PL2 = 64 Watts
1536 07:49:40.132882 PCI: 00:00.0 init finished in 7062 usecs
1537 07:49:40.136065 PCI: 00:02.0 init ...
1538 07:49:40.139166 PCI: 00:02.0 init finished in 2242 usecs
1539 07:49:40.142355 PCI: 00:08.0 init ...
1540 07:49:40.145578 PCI: 00:08.0 init finished in 2251 usecs
1541 07:49:40.149128 PCI: 00:12.0 init ...
1542 07:49:40.152289 PCI: 00:12.0 init finished in 2252 usecs
1543 07:49:40.155195 PCI: 00:14.0 init ...
1544 07:49:40.158546 PCI: 00:14.0 init finished in 2250 usecs
1545 07:49:40.161606 PCI: 00:14.2 init ...
1546 07:49:40.164808 PCI: 00:14.2 init finished in 2252 usecs
1547 07:49:40.168700 PCI: 00:14.3 init ...
1548 07:49:40.171802 PCI: 00:14.3 init finished in 2259 usecs
1549 07:49:40.175403 PCI: 00:15.0 init ...
1550 07:49:40.178296 DW I2C bus 0 at 0xd121f000 (400 KHz)
1551 07:49:40.185122 PCI: 00:15.0 init finished in 5973 usecs
1552 07:49:40.185233 PCI: 00:15.1 init ...
1553 07:49:40.188196 DW I2C bus 1 at 0xd1220000 (400 KHz)
1554 07:49:40.191776
1555 07:49:40.194615 PCI: 00:15.1 init finished in 5974 usecs
1556 07:49:40.197644 PCI: 00:16.0 init ...
1557 07:49:40.201477 PCI: 00:16.0 init finished in 2243 usecs
1558 07:49:40.204472 PCI: 00:19.0 init ...
1559 07:49:40.208069 DW I2C bus 4 at 0xd1222000 (400 KHz)
1560 07:49:40.211005 PCI: 00:19.0 init finished in 5974 usecs
1561 07:49:40.214110 PCI: 00:1d.0 init ...
1562 07:49:40.217550 Initializing PCH PCIe bridge.
1563 07:49:40.220669 PCI: 00:1d.0 init finished in 5276 usecs
1564 07:49:40.224333 PCI: 00:1f.0 init ...
1565 07:49:40.227918 IOAPIC: Initializing IOAPIC at 0xfec00000
1566 07:49:40.234170 IOAPIC: Bootstrap Processor Local APIC = 0x00
1567 07:49:40.234268 IOAPIC: ID = 0x02
1568 07:49:40.237282 IOAPIC: Dumping registers
1569 07:49:40.240653 reg 0x0000: 0x02000000
1570 07:49:40.244293 reg 0x0001: 0x00770020
1571 07:49:40.247316 reg 0x0002: 0x00000000
1572 07:49:40.250525 PCI: 00:1f.0 init finished in 23542 usecs
1573 07:49:40.253638 PCI: 00:1f.4 init ...
1574 07:49:40.257342 PCI: 00:1f.4 init finished in 2262 usecs
1575 07:49:40.268735 PCI: 01:00.0 init ...
1576 07:49:40.271897 PCI: 01:00.0 init finished in 2251 usecs
1577 07:49:40.276160 PNP: 0c09.0 init ...
1578 07:49:40.279310 Google Chrome EC uptime: 11.155 seconds
1579 07:49:40.286151 Google Chrome AP resets since EC boot: 0
1580 07:49:40.289461 Google Chrome most recent AP reset causes:
1581 07:49:40.296127 Google Chrome EC reset flags at last EC boot: reset-pin
1582 07:49:40.299190 PNP: 0c09.0 init finished in 20563 usecs
1583 07:49:40.302844 Devices initialized
1584 07:49:40.305965 Show all devs... After init.
1585 07:49:40.306053 Root Device: enabled 1
1586 07:49:40.308925 CPU_CLUSTER: 0: enabled 1
1587 07:49:40.312694 DOMAIN: 0000: enabled 1
1588 07:49:40.312780 APIC: 00: enabled 1
1589 07:49:40.315458 PCI: 00:00.0: enabled 1
1590 07:49:40.318543 PCI: 00:02.0: enabled 1
1591 07:49:40.321901 PCI: 00:04.0: enabled 0
1592 07:49:40.321984 PCI: 00:05.0: enabled 0
1593 07:49:40.325014 PCI: 00:12.0: enabled 1
1594 07:49:40.328756 PCI: 00:12.5: enabled 0
1595 07:49:40.331685 PCI: 00:12.6: enabled 0
1596 07:49:40.331775 PCI: 00:14.0: enabled 1
1597 07:49:40.335570 PCI: 00:14.1: enabled 0
1598 07:49:40.338526 PCI: 00:14.3: enabled 1
1599 07:49:40.341575 PCI: 00:14.5: enabled 0
1600 07:49:40.341653 PCI: 00:15.0: enabled 1
1601 07:49:40.345397 PCI: 00:15.1: enabled 1
1602 07:49:40.348397 PCI: 00:15.2: enabled 0
1603 07:49:40.351547 PCI: 00:15.3: enabled 0
1604 07:49:40.351628 PCI: 00:16.0: enabled 1
1605 07:49:40.354673 PCI: 00:16.1: enabled 0
1606 07:49:40.357740 PCI: 00:16.2: enabled 0
1607 07:49:40.361497 PCI: 00:16.3: enabled 0
1608 07:49:40.361584 PCI: 00:16.4: enabled 0
1609 07:49:40.364596 PCI: 00:16.5: enabled 0
1610 07:49:40.367731 PCI: 00:17.0: enabled 1
1611 07:49:40.370826 PCI: 00:19.0: enabled 1
1612 07:49:40.370906 PCI: 00:19.1: enabled 0
1613 07:49:40.374057 PCI: 00:19.2: enabled 0
1614 07:49:40.377421 PCI: 00:1a.0: enabled 0
1615 07:49:40.381026 PCI: 00:1c.0: enabled 0
1616 07:49:40.381112 PCI: 00:1c.1: enabled 0
1617 07:49:40.384067 PCI: 00:1c.2: enabled 0
1618 07:49:40.387229 PCI: 00:1c.3: enabled 0
1619 07:49:40.390593 PCI: 00:1c.4: enabled 0
1620 07:49:40.390683 PCI: 00:1c.5: enabled 0
1621 07:49:40.393815 PCI: 00:1c.6: enabled 0
1622 07:49:40.396923 PCI: 00:1c.7: enabled 0
1623 07:49:40.397010 PCI: 00:1d.0: enabled 1
1624 07:49:40.400694
1625 07:49:40.400781 PCI: 00:1d.1: enabled 0
1626 07:49:40.403595 PCI: 00:1d.2: enabled 0
1627 07:49:40.407179 PCI: 00:1d.3: enabled 0
1628 07:49:40.407264 PCI: 00:1d.4: enabled 0
1629 07:49:40.410442
1630 07:49:40.410527 PCI: 00:1d.5: enabled 0
1631 07:49:40.413441 PCI: 00:1e.0: enabled 1
1632 07:49:40.417119 PCI: 00:1e.1: enabled 0
1633 07:49:40.417205 PCI: 00:1e.2: enabled 1
1634 07:49:40.420069 PCI: 00:1e.3: enabled 1
1635 07:49:40.423583 PCI: 00:1f.0: enabled 1
1636 07:49:40.426626 PCI: 00:1f.1: enabled 0
1637 07:49:40.426710 PCI: 00:1f.2: enabled 0
1638 07:49:40.429819 PCI: 00:1f.3: enabled 1
1639 07:49:40.433500 PCI: 00:1f.4: enabled 1
1640 07:49:40.436433 PCI: 00:1f.5: enabled 1
1641 07:49:40.436511 PCI: 00:1f.6: enabled 0
1642 07:49:40.439689 USB0 port 0: enabled 1
1643 07:49:40.442740 I2C: 01:15: enabled 1
1644 07:49:40.442820 I2C: 02:5d: enabled 1
1645 07:49:40.446034
1646 07:49:40.446121 GENERIC: 0.0: enabled 1
1647 07:49:40.449646 I2C: 03:1a: enabled 1
1648 07:49:40.452770 I2C: 03:38: enabled 1
1649 07:49:40.452852 I2C: 03:39: enabled 1
1650 07:49:40.455840 I2C: 03:3a: enabled 1
1651 07:49:40.459652 I2C: 03:3b: enabled 1
1652 07:49:40.459734 PCI: 00:00.0: enabled 1
1653 07:49:40.462752 SPI: 00: enabled 1
1654 07:49:40.465806 SPI: 01: enabled 1
1655 07:49:40.465885 PNP: 0c09.0: enabled 1
1656 07:49:40.469032 USB2 port 0: enabled 1
1657 07:49:40.472895 USB2 port 1: enabled 1
1658 07:49:40.472969 USB2 port 2: enabled 0
1659 07:49:40.475800 USB2 port 3: enabled 0
1660 07:49:40.478822 USB2 port 5: enabled 0
1661 07:49:40.482520 USB2 port 6: enabled 1
1662 07:49:40.482614 USB2 port 9: enabled 1
1663 07:49:40.485789 USB3 port 0: enabled 1
1664 07:49:40.488878 USB3 port 1: enabled 1
1665 07:49:40.488963 USB3 port 2: enabled 1
1666 07:49:40.491976 USB3 port 3: enabled 1
1667 07:49:40.495100 USB3 port 4: enabled 0
1668 07:49:40.495191 APIC: 02: enabled 1
1669 07:49:40.498671
1670 07:49:40.498754 APIC: 01: enabled 1
1671 07:49:40.501734 APIC: 03: enabled 1
1672 07:49:40.501814 APIC: 07: enabled 1
1673 07:49:40.505137 APIC: 06: enabled 1
1674 07:49:40.509066 APIC: 04: enabled 1
1675 07:49:40.509149 APIC: 05: enabled 1
1676 07:49:40.511497 PCI: 00:08.0: enabled 1
1677 07:49:40.515084 PCI: 00:14.2: enabled 1
1678 07:49:40.515182 PCI: 01:00.0: enabled 1
1679 07:49:40.519586 Disabling ACPI via APMC:
1680 07:49:40.523822 done.
1681 07:49:40.526697 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1682 07:49:40.530186 ELOG: NV offset 0xaf0000 size 0x4000
1683 07:49:40.537674 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1684 07:49:40.544513 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:40 UTC
1685 07:49:40.550769 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:40 UTC
1686 07:49:40.557603 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:40 UTC
1687 07:49:40.563697 ELOG: Event(9A) added with size 9 at 2022-11-25 07:49:40 UTC
1688 07:49:40.570714 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:40 UTC
1689 07:49:40.577061 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:40 UTC
1690 07:49:40.580283 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1691 07:49:40.583374
1692 07:49:40.590355 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:40 UTC
1693 07:49:40.596467 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1694 07:49:40.602806 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:40 UTC
1695 07:49:40.606421 elog_add_boot_reason: Logged dev mode boot
1696 07:49:40.609602 Finalize devices...
1697 07:49:40.612923 PCI: 00:17.0 final
1698 07:49:40.613021 Devices finalized
1699 07:49:40.619698 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1700 07:49:40.622633 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1701 07:49:40.629328 ME: HFSTS1 : 0x90000245
1702 07:49:40.632640 ME: HFSTS2 : 0x3B850126
1703 07:49:40.635619 ME: HFSTS3 : 0x00000020
1704 07:49:40.639291 ME: HFSTS4 : 0x00004800
1705 07:49:40.645357 ME: HFSTS5 : 0x00000000
1706 07:49:40.649231 ME: HFSTS6 : 0x40400006
1707 07:49:40.652274 ME: Manufacturing Mode : NO
1708 07:49:40.655491 ME: FW Partition Table : OK
1709 07:49:40.658680 ME: Bringup Loader Failure : NO
1710 07:49:40.661778 ME: Firmware Init Complete : YES
1711 07:49:40.664913 ME: Boot Options Present : NO
1712 07:49:40.668182 ME: Update In Progress : NO
1713 07:49:40.671279 ME: D0i3 Support : YES
1714 07:49:40.675119 ME: Low Power State Enabled : NO
1715 07:49:40.678342 ME: CPU Replaced : NO
1716 07:49:40.681482 ME: CPU Replacement Valid : YES
1717 07:49:40.684849 ME: Current Working State : 5
1718 07:49:40.687984 ME: Current Operation State : 1
1719 07:49:40.691069 ME: Current Operation Mode : 0
1720 07:49:40.694320 ME: Error Code : 0
1721 07:49:40.698184 ME: CPU Debug Disabled : YES
1722 07:49:40.701394 ME: TXT Support : NO
1723 07:49:40.707692 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1724 07:49:40.710773 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1725 07:49:40.714453 CBFS @ c08000 size 3f8000
1726 07:49:40.720592 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1727 07:49:40.723884 CBFS: Locating 'fallback/dsdt.aml'
1728 07:49:40.727009 CBFS: Found @ offset 10bb80 size 3fa5
1729 07:49:40.733621 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 07:49:40.736757 CBFS @ c08000 size 3f8000
1731 07:49:40.740313 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 07:49:40.743322 CBFS: Locating 'fallback/slic'
1733 07:49:40.748358 CBFS: 'fallback/slic' not found.
1734 07:49:40.755262 ACPI: Writing ACPI tables at 99b3e000.
1735 07:49:40.755355 ACPI: * FACS
1736 07:49:40.757909 ACPI: * DSDT
1737 07:49:40.761574 Ramoops buffer: 0x100000@0x99a3d000.
1738 07:49:40.764687 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1739 07:49:40.771604 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1740 07:49:40.774680 Google Chrome EC: version:
1741 07:49:40.777935 ro: helios_v2.0.2659-56403530b
1742 07:49:40.781165 rw: helios_v2.0.2849-c41de27e7d
1743 07:49:40.781250 running image: 1
1744 07:49:40.785743 ACPI: * FADT
1745 07:49:40.785827 SCI is IRQ9
1746 07:49:40.792437 ACPI: added table 1/32, length now 40
1747 07:49:40.792546 ACPI: * SSDT
1748 07:49:40.795487 Found 1 CPU(s) with 8 core(s) each.
1749 07:49:40.798597 Error: Could not locate 'wifi_sar' in VPD.
1750 07:49:40.805769 Checking CBFS for default SAR values
1751 07:49:40.808685 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1752 07:49:40.811814 CBFS @ c08000 size 3f8000
1753 07:49:40.817956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1754 07:49:40.821570 CBFS: Locating 'wifi_sar_defaults.hex'
1755 07:49:40.824566 CBFS: Found @ offset 5fac0 size 77
1756 07:49:40.828171 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1757 07:49:40.834881 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1758 07:49:40.837669 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1759 07:49:40.844616 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1760 07:49:40.847679 failed to find key in VPD: dsm_calib_r0_0
1761 07:49:40.857617 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1762 07:49:40.860793 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1763 07:49:40.867040 failed to find key in VPD: dsm_calib_r0_1
1764 07:49:40.873826 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1765 07:49:40.880097 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1766 07:49:40.883957 failed to find key in VPD: dsm_calib_r0_2
1767 07:49:40.893656 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1768 07:49:40.900320 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1769 07:49:40.903489 failed to find key in VPD: dsm_calib_r0_3
1770 07:49:40.913575 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1771 07:49:40.916865 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1772 07:49:40.923027 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1773 07:49:40.926566 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1774 07:49:40.929954 EC returned error result code 1
1775 07:49:40.933475 EC returned error result code 1
1776 07:49:40.936549 EC returned error result code 1
1777 07:49:40.943202 PS2K: Bad resp from EC. Vivaldi disabled!
1778 07:49:40.946691 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1779 07:49:40.952878 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1780 07:49:40.959446 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1781 07:49:40.962689 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1782 07:49:40.969335 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1783 07:49:40.976187 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1784 07:49:40.979462 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1785 07:49:40.985638 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1786 07:49:40.988803 ACPI: added table 2/32, length now 44
1787 07:49:40.992090
1788 07:49:40.992180 ACPI: * MCFG
1789 07:49:40.995813 ACPI: added table 3/32, length now 48
1790 07:49:40.999046 ACPI: * TPM2
1791 07:49:41.002130 TPM2 log created at 99a2d000
1792 07:49:41.005437 ACPI: added table 4/32, length now 52
1793 07:49:41.005522 ACPI: * MADT
1794 07:49:41.008523 SCI is IRQ9
1795 07:49:41.011732 ACPI: added table 5/32, length now 56
1796 07:49:41.011815 current = 99b43ac0
1797 07:49:41.015537 ACPI: * DMAR
1798 07:49:41.018645 ACPI: added table 6/32, length now 60
1799 07:49:41.021697 ACPI: * IGD OpRegion
1800 07:49:41.021784 GMA: Found VBT in CBFS
1801 07:49:41.024837
1802 07:49:41.024926 GMA: Found valid VBT in CBFS
1803 07:49:41.031384 ACPI: added table 7/32, length now 64
1804 07:49:41.031474 ACPI: * HPET
1805 07:49:41.034810 ACPI: added table 8/32, length now 68
1806 07:49:41.038445 ACPI: done.
1807 07:49:41.038522 ACPI tables: 31744 bytes.
1808 07:49:41.041292 smbios_write_tables: 99a2c000
1809 07:49:41.044861 EC returned error result code 3
1810 07:49:41.048272
1811 07:49:41.051009 Couldn't obtain OEM name from CBI
1812 07:49:41.051085 Create SMBIOS type 17
1813 07:49:41.054340 PCI: 00:00.0 (Intel Cannonlake)
1814 07:49:41.057815 PCI: 00:14.3 (Intel WiFi)
1815 07:49:41.060905 SMBIOS tables: 939 bytes.
1816 07:49:41.064098 Writing table forward entry at 0x00000500
1817 07:49:41.070872 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 07:49:41.074335 Writing coreboot table at 0x99b62000
1819 07:49:41.080612 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 07:49:41.083754 1. 0000000000001000-000000000009ffff: RAM
1821 07:49:41.090502 2. 00000000000a0000-00000000000fffff: RESERVED
1822 07:49:41.093710 3. 0000000000100000-0000000099a2bfff: RAM
1823 07:49:41.099866 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 07:49:41.103662 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 07:49:41.109783 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 07:49:41.116494 7. 000000009a000000-000000009f7fffff: RESERVED
1827 07:49:41.119573 8. 00000000e0000000-00000000efffffff: RESERVED
1828 07:49:41.126463 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 07:49:41.129616 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 07:49:41.136039 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 07:49:41.138984 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 07:49:41.145532 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 07:49:41.149167 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 07:49:41.152064 15. 0000000100000000-000000045e7fffff: RAM
1835 07:49:41.158557 Graphics framebuffer located at 0xc0000000
1836 07:49:41.158652 Passing 5 GPIOs to payload:
1837 07:49:41.165459 NAME | PORT | POLARITY | VALUE
1838 07:49:41.171620 write protect | undefined | high | low
1839 07:49:41.175281 lid | undefined | high | high
1840 07:49:41.181411 power | undefined | high | low
1841 07:49:41.188366 oprom | undefined | high | low
1842 07:49:41.191457 EC in RW | 0x000000cb | high | low
1843 07:49:41.194471 Board ID: 4
1844 07:49:41.198363 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 07:49:41.201449 CBFS @ c08000 size 3f8000
1846 07:49:41.207540 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 07:49:41.211238 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1848 07:49:41.214260
1849 07:49:41.214348 coreboot table: 1492 bytes.
1850 07:49:41.217259 IMD ROOT 0. 99fff000 00001000
1851 07:49:41.220725 IMD SMALL 1. 99ffe000 00001000
1852 07:49:41.223999 FSP MEMORY 2. 99c4e000 003b0000
1853 07:49:41.227671 CONSOLE 3. 99c2e000 00020000
1854 07:49:41.230681 FMAP 4. 99c2d000 0000054e
1855 07:49:41.233675 TIME STAMP 5. 99c2c000 00000910
1856 07:49:41.237251 VBOOT WORK 6. 99c18000 00014000
1857 07:49:41.240253 MRC DATA 7. 99c16000 00001958
1858 07:49:41.243848
1859 07:49:41.243936 ROMSTG STCK 8. 99c15000 00001000
1860 07:49:41.246967
1861 07:49:41.249991 AFTER CAR 9. 99c0b000 0000a000
1862 07:49:41.253485 RAMSTAGE 10. 99baf000 0005c000
1863 07:49:41.256550 REFCODE 11. 99b7a000 00035000
1864 07:49:41.260067 SMM BACKUP 12. 99b6a000 00010000
1865 07:49:41.263538 COREBOOT 13. 99b62000 00008000
1866 07:49:41.266409 ACPI 14. 99b3e000 00024000
1867 07:49:41.269868 ACPI GNVS 15. 99b3d000 00001000
1868 07:49:41.273060 RAMOOPS 16. 99a3d000 00100000
1869 07:49:41.276691 TPM2 TCGLOG17. 99a2d000 00010000
1870 07:49:41.279763 SMBIOS 18. 99a2c000 00000800
1871 07:49:41.279851 IMD small region:
1872 07:49:41.282811 IMD ROOT 0. 99ffec00 00000400
1873 07:49:41.286513 FSP RUNTIME 1. 99ffebe0 00000004
1874 07:49:41.289663 EC HOSTEVENT 2. 99ffebc0 00000008
1875 07:49:41.292775
1876 07:49:41.295964 POWER STATE 3. 99ffeb80 00000040
1877 07:49:41.299072 ROMSTAGE 4. 99ffeb60 00000004
1878 07:49:41.302777 MEM INFO 5. 99ffe9a0 000001b9
1879 07:49:41.305746 VPD 6. 99ffe920 0000006c
1880 07:49:41.308854 MTRR: Physical address space:
1881 07:49:41.315494 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1882 07:49:41.322293 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1883 07:49:41.325339 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1884 07:49:41.332112 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1885 07:49:41.338206 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1886 07:49:41.344781 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1887 07:49:41.351533 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1888 07:49:41.354598 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 07:49:41.361249 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 07:49:41.364958 MTRR: Fixed MSR 0x259 0x0000000000000000
1891 07:49:41.367877 MTRR: Fixed MSR 0x268 0x0606060606060606
1892 07:49:41.371047 MTRR: Fixed MSR 0x269 0x0606060606060606
1893 07:49:41.377887 MTRR: Fixed MSR 0x26a 0x0606060606060606
1894 07:49:41.381007 MTRR: Fixed MSR 0x26b 0x0606060606060606
1895 07:49:41.384169 MTRR: Fixed MSR 0x26c 0x0606060606060606
1896 07:49:41.387817 MTRR: Fixed MSR 0x26d 0x0606060606060606
1897 07:49:41.394309 MTRR: Fixed MSR 0x26e 0x0606060606060606
1898 07:49:41.397328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1899 07:49:41.400484 call enable_fixed_mtrr()
1900 07:49:41.404217 CPU physical address size: 39 bits
1901 07:49:41.407362 MTRR: default type WB/UC MTRR counts: 6/8.
1902 07:49:41.410527 MTRR: WB selected as default type.
1903 07:49:41.417176 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1904 07:49:41.423344 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1905 07:49:41.430190 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1906 07:49:41.437007 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1907 07:49:41.442957 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1908 07:49:41.449740 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1909 07:49:41.453167 MTRR: Fixed MSR 0x250 0x0606060606060606
1910 07:49:41.456275 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 07:49:41.459329
1912 07:49:41.462950 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 07:49:41.465922 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 07:49:41.469064 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 07:49:41.475635 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 07:49:41.478901 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 07:49:41.482493 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 07:49:41.485535 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 07:49:41.491873 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 07:49:41.495215 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 07:49:41.495302
1922 07:49:41.495370 MTRR check
1923 07:49:41.498908 Fixed MTRRs : Enabled
1924 07:49:41.501944 Variable MTRRs: Enabled
1925 07:49:41.502026
1926 07:49:41.505085 call enable_fixed_mtrr()
1927 07:49:41.508293 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1928 07:49:41.511537 CPU physical address size: 39 bits
1929 07:49:41.518446 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1930 07:49:41.521963 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 07:49:41.525012 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 07:49:41.531959 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 07:49:41.535343 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 07:49:41.537871 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 07:49:41.541311 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 07:49:41.547844 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 07:49:41.551177 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 07:49:41.554627 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 07:49:41.557600 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 07:49:41.564383 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 07:49:41.567299 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 07:49:41.571175 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 07:49:41.573985 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 07:49:41.577679
1945 07:49:41.580612 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 07:49:41.583754 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 07:49:41.586847 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 07:49:41.593784 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 07:49:41.597022 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 07:49:41.600218 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 07:49:41.603313 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 07:49:41.606997 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 07:49:41.610402
1954 07:49:41.610494 call enable_fixed_mtrr()
1955 07:49:41.613342 call enable_fixed_mtrr()
1956 07:49:41.616442 CPU physical address size: 39 bits
1957 07:49:41.619749 CPU physical address size: 39 bits
1958 07:49:41.623437 CBFS @ c08000 size 3f8000
1959 07:49:41.629960 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1960 07:49:41.633207 CBFS: Locating 'fallback/payload'
1961 07:49:41.636518 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 07:49:41.639520 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 07:49:41.646207 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 07:49:41.649114 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 07:49:41.652854 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 07:49:41.655825 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 07:49:41.662518 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 07:49:41.665624 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 07:49:41.669141 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 07:49:41.672383 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 07:49:41.678992 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 07:49:41.682151 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 07:49:41.685255 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 07:49:41.688251 call enable_fixed_mtrr()
1975 07:49:41.692296 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 07:49:41.698464 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 07:49:41.701488 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 07:49:41.705199 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 07:49:41.708596 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 07:49:41.714716 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 07:49:41.717776 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 07:49:41.721570 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 07:49:41.724637 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 07:49:41.727597 CPU physical address size: 39 bits
1985 07:49:41.731325
1986 07:49:41.731421 call enable_fixed_mtrr()
1987 07:49:41.737599 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 07:49:41.740781 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 07:49:41.744377 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 07:49:41.747336 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 07:49:41.754298 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 07:49:41.757502 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 07:49:41.760740 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 07:49:41.763588 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 07:49:41.770516 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 07:49:41.773499 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 07:49:41.777081 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 07:49:41.780087 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 07:49:41.786471 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 07:49:41.786575 call enable_fixed_mtrr()
2001 07:49:41.793418 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 07:49:41.796598 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 07:49:41.799986 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 07:49:41.803010 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 07:49:41.809358 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 07:49:41.812665 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 07:49:41.816425 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 07:49:41.819660 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 07:49:41.825802 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 07:49:41.829380 CPU physical address size: 39 bits
2011 07:49:41.832459 call enable_fixed_mtrr()
2012 07:49:41.835564 CBFS: Found @ offset 1c96c0 size 3f798
2013 07:49:41.838863 CPU physical address size: 39 bits
2014 07:49:41.842438 Checking segment from ROM address 0xffdd16f8
2015 07:49:41.845652 CPU physical address size: 39 bits
2016 07:49:41.851967 Checking segment from ROM address 0xffdd1714
2017 07:49:41.855313 Loading segment from ROM address 0xffdd16f8
2018 07:49:41.858449 code (compression=0)
2019 07:49:41.865146 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2020 07:49:41.875269 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2021 07:49:41.878419 it's not compressed!
2022 07:49:41.969653 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2023 07:49:41.975941 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2024 07:49:41.982773 Loading segment from ROM address 0xffdd1714
2025 07:49:41.982861 Entry Point 0x30000000
2026 07:49:41.985704 Loaded segments
2027 07:49:41.991979 Finalizing chipset.
2028 07:49:41.995002 Finalizing SMM.
2029 07:49:41.998231 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2030 07:49:42.001529 mp_park_aps done after 0 msecs.
2031 07:49:42.008325 Jumping to boot code at 30000000(99b62000)
2032 07:49:42.014678 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2033 07:49:42.014778
2034 07:49:42.014882
2035 07:49:42.014974
2036 07:49:42.017793 Starting depthcharge on Helios...
2037 07:49:42.017886
2038 07:49:42.018213 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2039 07:49:42.018371 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2040 07:49:42.018482 Setting prompt string to ['hatch:']
2041 07:49:42.018587 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2042 07:49:42.027689 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2043 07:49:42.027781
2044 07:49:42.034348 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2045 07:49:42.034441
2046 07:49:42.040646 board_setup: Info: eMMC controller not present; skipping
2047 07:49:42.040741
2048 07:49:42.044446 New NVMe Controller 0x30053ac0 @ 00:1d:00
2049 07:49:42.044537
2050 07:49:42.050703 board_setup: Info: SDHCI controller not present; skipping
2051 07:49:42.050793
2052 07:49:42.057402 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2053 07:49:42.057491
2054 07:49:42.057649 Wipe memory regions:
2055 07:49:42.057731
2056 07:49:42.063732 [0x00000000001000, 0x000000000a0000)
2057 07:49:42.063824
2058 07:49:42.066899 [0x00000000100000, 0x00000030000000)
2059 07:49:42.066991
2060 07:49:42.131286 [0x00000030657430, 0x00000099a2c000)
2061 07:49:42.131434
2062 07:49:42.264330 [0x00000100000000, 0x0000045e800000)
2063 07:49:42.264489
2064 07:49:44.182201 R8152: Initializing
2065 07:49:44.182337
2066 07:49:44.184922 Version 6 (ocp_data = 5c30)
2067 07:49:44.185009
2068 07:49:44.188382 R8152: Done initializing
2069 07:49:44.188469
2070 07:49:44.191688 Adding net device
2071 07:49:44.191771
2072 07:49:44.198765 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 07:49:44.198857
2074 07:49:44.198923
2075 07:49:44.198984
2076 07:49:44.199254 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 07:49:44.300014 hatch: tftpboot 192.168.201.1 8119377/tftp-deploy-bxtnv8_u/kernel/bzImage 8119377/tftp-deploy-bxtnv8_u/kernel/cmdline 8119377/tftp-deploy-bxtnv8_u/ramdisk/ramdisk.cpio.gz
2079 07:49:44.300176 Setting prompt string to 'Starting kernel'
2080 07:49:44.300250 Setting prompt string to ['Starting kernel']
2081 07:49:44.300329 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2082 07:49:44.300406 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2083 07:49:44.304432 tftpboot 192.168.201.1 8119377/tftp-deploy-bxtnv8_u/kernel/bzImoy-bxtnv8_u/kernel/cmdline 8119377/tftp-deploy-bxtnv8_u/ramdisk/ramdisk.cpio.gz
2084 07:49:44.304522
2085 07:49:44.304589 Waiting for link
2086 07:49:44.304650
2087 07:49:44.505451 done.
2088 07:49:44.505585
2089 07:49:44.505654 MAC: 00:24:32:50:21:91
2090 07:49:44.505715
2091 07:49:44.508700 Sending DHCP discover... done.
2092 07:49:44.508783
2093 07:49:44.511656 Waiting for reply... done.
2094 07:49:44.511757
2095 07:49:44.514726 Sending DHCP request... done.
2096 07:49:44.514822
2097 07:49:44.518298 Waiting for reply... done.
2098 07:49:44.518399
2099 07:49:44.521322 My ip is 192.168.201.14
2100 07:49:44.521422
2101 07:49:44.524561 The DHCP server ip is 192.168.201.1
2102 07:49:44.524702
2103 07:49:44.527859 TFTP server IP predefined by user: 192.168.201.1
2104 07:49:44.527946
2105 07:49:44.534688 Bootfile predefined by user: 8119377/tftp-deploy-bxtnv8_u/kernel/bzImage
2106 07:49:44.537883
2107 07:49:44.540964 Sending tftp read request... done.
2108 07:49:44.541144
2109 07:49:44.544576 Waiting for the transfer...
2110 07:49:44.544669
2111 07:49:45.069968 00000000 ################################################################
2112 07:49:45.070124
2113 07:49:45.587983 00080000 ################################################################
2114 07:49:45.588125
2115 07:49:46.107898 00100000 ################################################################
2116 07:49:46.108051
2117 07:49:46.628295 00180000 ################################################################
2118 07:49:46.628443
2119 07:49:47.152831 00200000 ################################################################
2120 07:49:47.152968
2121 07:49:47.673847 00280000 ################################################################
2122 07:49:47.673980
2123 07:49:48.203305 00300000 ################################################################
2124 07:49:48.203449
2125 07:49:48.727383 00380000 ################################################################
2126 07:49:48.727522
2127 07:49:49.265661 00400000 ################################################################
2128 07:49:49.265798
2129 07:49:49.793611 00480000 ################################################################
2130 07:49:49.793753
2131 07:49:50.326473 00500000 ################################################################
2132 07:49:50.326649
2133 07:49:50.845800 00580000 ################################################################
2134 07:49:50.845943
2135 07:49:51.383163 00600000 ################################################################
2136 07:49:51.383303
2137 07:49:51.713068 00680000 ####################################### done.
2138 07:49:51.713202
2139 07:49:51.716226 The bootfile was 7131024 bytes long.
2140 07:49:51.716302
2141 07:49:51.720092 Sending tftp read request... done.
2142 07:49:51.720173
2143 07:49:51.722648 Waiting for the transfer...
2144 07:49:51.722726
2145 07:49:52.272802 00000000 ################################################################
2146 07:49:52.272948
2147 07:49:52.795688 00080000 ################################################################
2148 07:49:52.795842
2149 07:49:53.311649 00100000 ################################################################
2150 07:49:53.311788
2151 07:49:53.823856 00180000 ################################################################
2152 07:49:53.823992
2153 07:49:54.344843 00200000 ################################################################
2154 07:49:54.344983
2155 07:49:54.866916 00280000 ################################################################
2156 07:49:54.867050
2157 07:49:55.380814 00300000 ################################################################
2158 07:49:55.380955
2159 07:49:55.903214 00380000 ################################################################
2160 07:49:55.903363
2161 07:49:56.425872 00400000 ################################################################
2162 07:49:56.426011
2163 07:49:56.944069 00480000 ################################################################
2164 07:49:56.944211
2165 07:49:57.199536 00500000 ################################ done.
2166 07:49:57.199673
2167 07:49:57.203337 Sending tftp read request... done.
2168 07:49:57.203414
2169 07:49:57.206348 Waiting for the transfer...
2170 07:49:57.206436
2171 07:49:57.206514 00000000 # done.
2172 07:49:57.206579
2173 07:49:57.216023 Command line loaded dynamically from TFTP file: 8119377/tftp-deploy-bxtnv8_u/kernel/cmdline
2174 07:49:57.216112
2175 07:49:57.242259 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119377/extract-nfsrootfs-1784jhip,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2176 07:49:57.242358
2177 07:49:57.249055 ec_init(0): CrosEC protocol v3 supported (256, 256)
2178 07:49:57.249141
2179 07:49:57.256306 Shutting down all USB controllers.
2180 07:49:57.256391
2181 07:49:57.260020 Removing current net device
2182 07:49:57.260096
2183 07:49:57.264370 Finalizing coreboot
2184 07:49:57.264454
2185 07:49:57.270265 Exiting depthcharge with code 4 at timestamp: 22563791
2186 07:49:57.270366
2187 07:49:57.270433
2188 07:49:57.270495 Starting kernel ...
2189 07:49:57.270554
2190 07:49:57.270612
2191 07:49:57.270669
2192 07:49:57.271024 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2193 07:49:57.271123 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2194 07:49:57.271198 Setting prompt string to ['Linux version [0-9]']
2195 07:49:57.271267 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2196 07:49:57.271355 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2198 07:54:23.272225 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2200 07:54:23.273378 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2202 07:54:23.274325 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2205 07:54:23.275821 end: 2 depthcharge-action (duration 00:05:00) [common]
2207 07:54:23.277038 Cleaning after the job
2208 07:54:23.277301 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/ramdisk
2209 07:54:23.277749 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/kernel
2210 07:54:23.278326 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/nfsrootfs
2211 07:54:23.325925 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119377/tftp-deploy-bxtnv8_u/modules
2212 07:54:23.326301 start: 4.1 power-off (timeout 00:00:30) [common]
2213 07:54:23.326533 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2214 07:54:23.345502 >> Command sent successfully.
2215 07:54:23.347425 Returned 0 in 0 seconds
2216 07:54:23.448613 end: 4.1 power-off (duration 00:00:00) [common]
2218 07:54:23.450185 start: 4.2 read-feedback (timeout 00:10:00) [common]
2219 07:54:23.451577 Listened to connection for namespace 'common' for up to 1s
2220 07:54:24.455322 Finalising connection for namespace 'common'
2221 07:54:24.456197 Disconnecting from shell: Finalise
2222 07:54:24.557703 end: 4.2 read-feedback (duration 00:00:01) [common]
2223 07:54:24.558360 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119377
2224 07:54:24.752453 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119377
2225 07:54:24.752660 JobError: Your job cannot terminate cleanly.