Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 07:49:06.026403 lava-dispatcher, installed at version: 2022.10
2 07:49:06.026598 start: 0 validate
3 07:49:06.026736 Start time: 2022-11-25 07:49:06.026729+00:00 (UTC)
4 07:49:06.026866 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:49:06.026995 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 07:49:06.042164 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:49:06.042317 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:49:06.059758 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:49:06.059904 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:49:06.070547 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:49:06.070681 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:49:06.082507 validate duration: 0.06
14 07:49:06.082762 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:49:06.082874 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:49:06.082963 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:49:06.083064 Not decompressing ramdisk as can be used compressed.
18 07:49:06.083149 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/initrd.cpio.gz
19 07:49:06.083217 saving as /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/ramdisk/initrd.cpio.gz
20 07:49:06.083278 total size: 5431622 (5MB)
21 07:49:06.106111 progress 0% (0MB)
22 07:49:06.137495 progress 5% (0MB)
23 07:49:06.165308 progress 10% (0MB)
24 07:49:06.181922 progress 15% (0MB)
25 07:49:06.217796 progress 20% (1MB)
26 07:49:06.241178 progress 25% (1MB)
27 07:49:06.281811 progress 30% (1MB)
28 07:49:06.313103 progress 35% (1MB)
29 07:49:06.348085 progress 40% (2MB)
30 07:49:06.384606 progress 45% (2MB)
31 07:49:06.419114 progress 50% (2MB)
32 07:49:06.461207 progress 55% (2MB)
33 07:49:06.496175 progress 60% (3MB)
34 07:49:06.531260 progress 65% (3MB)
35 07:49:06.566664 progress 70% (3MB)
36 07:49:06.603427 progress 75% (3MB)
37 07:49:06.639810 progress 80% (4MB)
38 07:49:06.691348 progress 85% (4MB)
39 07:49:06.747492 progress 90% (4MB)
40 07:49:06.791057 progress 95% (4MB)
41 07:49:06.823971 progress 100% (5MB)
42 07:49:06.825328 5MB downloaded in 0.74s (6.98MB/s)
43 07:49:06.826098 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:49:06.827348 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:49:06.827799 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:49:06.828234 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:49:06.828733 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:49:06.829081 saving as /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/kernel/bzImage
50 07:49:06.829399 total size: 7131024 (6MB)
51 07:49:06.829764 No compression specified
52 07:49:06.854387 progress 0% (0MB)
53 07:49:06.882077 progress 5% (0MB)
54 07:49:06.915950 progress 10% (0MB)
55 07:49:06.951026 progress 15% (1MB)
56 07:49:06.992073 progress 20% (1MB)
57 07:49:07.025619 progress 25% (1MB)
58 07:49:07.066419 progress 30% (2MB)
59 07:49:07.109397 progress 35% (2MB)
60 07:49:07.153880 progress 40% (2MB)
61 07:49:07.199732 progress 45% (3MB)
62 07:49:07.253560 progress 50% (3MB)
63 07:49:07.288258 progress 55% (3MB)
64 07:49:07.342071 progress 60% (4MB)
65 07:49:07.382124 progress 65% (4MB)
66 07:49:07.439236 progress 70% (4MB)
67 07:49:07.487675 progress 75% (5MB)
68 07:49:07.547589 progress 80% (5MB)
69 07:49:07.590114 progress 85% (5MB)
70 07:49:07.631583 progress 90% (6MB)
71 07:49:07.682510 progress 95% (6MB)
72 07:49:07.723914 progress 100% (6MB)
73 07:49:07.724828 6MB downloaded in 0.90s (7.59MB/s)
74 07:49:07.725338 end: 1.2.1 http-download (duration 00:00:01) [common]
76 07:49:07.726276 end: 1.2 download-retry (duration 00:00:01) [common]
77 07:49:07.726617 start: 1.3 download-retry (timeout 00:09:58) [common]
78 07:49:07.726945 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 07:49:07.727327 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/full.rootfs.tar.xz
80 07:49:07.727577 saving as /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/nfsrootfs/full.rootfs.tar
81 07:49:07.727805 total size: 123211568 (117MB)
82 07:49:07.728030 Using unxz to decompress xz
83 07:49:07.738455 progress 0% (0MB)
84 07:49:08.186656 progress 5% (5MB)
85 07:49:08.633166 progress 10% (11MB)
86 07:49:09.084835 progress 15% (17MB)
87 07:49:09.541329 progress 20% (23MB)
88 07:49:09.866865 progress 25% (29MB)
89 07:49:10.202518 progress 30% (35MB)
90 07:49:10.451264 progress 35% (41MB)
91 07:49:10.644007 progress 40% (47MB)
92 07:49:10.995937 progress 45% (52MB)
93 07:49:11.357315 progress 50% (58MB)
94 07:49:11.693005 progress 55% (64MB)
95 07:49:12.051063 progress 60% (70MB)
96 07:49:12.392976 progress 65% (76MB)
97 07:49:12.779339 progress 70% (82MB)
98 07:49:13.187596 progress 75% (88MB)
99 07:49:13.596946 progress 80% (94MB)
100 07:49:13.709417 progress 85% (99MB)
101 07:49:13.875828 progress 90% (105MB)
102 07:49:14.204443 progress 95% (111MB)
103 07:49:14.571641 progress 100% (117MB)
104 07:49:14.576651 117MB downloaded in 6.85s (17.16MB/s)
105 07:49:14.576937 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:49:14.577210 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:49:14.577319 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:49:14.577434 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:49:14.577559 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:49:14.577652 saving as /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/modules/modules.tar
112 07:49:14.577715 total size: 52060 (0MB)
113 07:49:14.577778 Using unxz to decompress xz
114 07:49:14.603508 progress 62% (0MB)
115 07:49:14.611271 progress 100% (0MB)
116 07:49:14.612786 0MB downloaded in 0.04s (1.42MB/s)
117 07:49:14.613022 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:49:14.613289 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:49:14.613388 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 07:49:14.613545 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 07:49:16.303434 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8119396/extract-nfsrootfs-xx87b2w6
123 07:49:16.303644 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:49:16.303750 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 07:49:16.303882 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive
126 07:49:16.303980 makedir: /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin
127 07:49:16.304063 makedir: /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/tests
128 07:49:16.304145 makedir: /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/results
129 07:49:16.304242 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-add-keys
130 07:49:16.304367 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-add-sources
131 07:49:16.304487 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-background-process-start
132 07:49:16.304628 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-background-process-stop
133 07:49:16.304738 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-common-functions
134 07:49:16.304847 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-echo-ipv4
135 07:49:16.304955 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-install-packages
136 07:49:16.305061 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-installed-packages
137 07:49:16.305167 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-os-build
138 07:49:16.305273 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-probe-channel
139 07:49:16.305380 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-probe-ip
140 07:49:16.305726 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-target-ip
141 07:49:16.305839 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-target-mac
142 07:49:16.305947 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-target-storage
143 07:49:16.306056 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-case
144 07:49:16.306164 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-event
145 07:49:16.306269 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-feedback
146 07:49:16.306374 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-raise
147 07:49:16.306480 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-reference
148 07:49:16.306604 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-runner
149 07:49:16.306714 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-set
150 07:49:16.306820 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-test-shell
151 07:49:16.306927 Updating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-install-packages (oe)
152 07:49:16.307037 Updating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/bin/lava-installed-packages (oe)
153 07:49:16.307132 Creating /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/environment
154 07:49:16.307214 LAVA metadata
155 07:49:16.307279 - LAVA_JOB_ID=8119396
156 07:49:16.307342 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:49:16.307440 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 07:49:16.307505 skipped lava-vland-overlay
159 07:49:16.307581 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:49:16.307661 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 07:49:16.307723 skipped lava-multinode-overlay
162 07:49:16.307794 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:49:16.307874 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 07:49:16.307943 Loading test definitions
165 07:49:16.308035 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 07:49:16.308103 Using /lava-8119396 at stage 0
167 07:49:16.308197 Fetching tests from https://github.com/kernelci/test-definitions
168 07:49:16.308274 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/0/tests/0_ltp-timers'
169 07:49:20.160113 Running '/usr/bin/git checkout kernelci.org
170 07:49:20.285869 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 07:49:20.286539 uuid=8119396_1.5.2.3.1 testdef=None
172 07:49:20.286700 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 07:49:20.286965 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 07:49:20.287627 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:49:20.287863 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 07:49:20.288658 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:49:20.288910 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 07:49:20.289772 runner path: /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/0/tests/0_ltp-timers test_uuid 8119396_1.5.2.3.1
182 07:49:20.289869 GRP_TEST='TMR'
183 07:49:20.289936 SKIPFILE='skipfile-lkft.yaml'
184 07:49:20.289998 SKIP_INSTALL='true'
185 07:49:20.290058 TST_CMDFILES=''
186 07:49:20.290186 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 07:49:20.290401 Creating lava-test-runner.conf files
189 07:49:20.290465 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8119396/lava-overlay-c1_utive/lava-8119396/0 for stage 0
190 07:49:20.290547 - 0_ltp-timers
191 07:49:20.290644 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
192 07:49:20.290733 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
193 07:49:27.732720 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 07:49:27.732884 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
195 07:49:27.732981 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 07:49:27.733092 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
197 07:49:27.733191 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
198 07:49:27.838279 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 07:49:27.838660 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
200 07:49:27.838837 extracting modules file /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119396/extract-nfsrootfs-xx87b2w6
201 07:49:27.843920 extracting modules file /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8119396/extract-overlay-ramdisk-kp4k0vah/ramdisk
202 07:49:27.848592 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 07:49:27.848774 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
204 07:49:27.848903 [common] Applying overlay to NFS
205 07:49:27.849008 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8119396/compress-overlay-rsz58rdp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8119396/extract-nfsrootfs-xx87b2w6
206 07:49:28.332882 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 07:49:28.333053 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
208 07:49:28.333152 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 07:49:28.333243 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
210 07:49:28.333332 Building ramdisk /var/lib/lava/dispatcher/tmp/8119396/extract-overlay-ramdisk-kp4k0vah/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8119396/extract-overlay-ramdisk-kp4k0vah/ramdisk
211 07:49:28.367044 >> 24546 blocks
212 07:49:28.838826 rename /var/lib/lava/dispatcher/tmp/8119396/extract-overlay-ramdisk-kp4k0vah/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/ramdisk/ramdisk.cpio.gz
213 07:49:28.839235 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 07:49:28.839365 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
215 07:49:28.839473 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
216 07:49:28.839568 No mkimage arch provided, not using FIT.
217 07:49:28.839660 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 07:49:28.839745 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 07:49:28.839846 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
220 07:49:28.839939 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
221 07:49:28.840025 No LXC device requested
222 07:49:28.840111 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 07:49:28.840199 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
224 07:49:28.840304 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 07:49:28.840460 Checking files for TFTP limit of 4294967296 bytes.
226 07:49:28.840949 end: 1 tftp-deploy (duration 00:00:23) [common]
227 07:49:28.841078 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 07:49:28.841203 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 07:49:28.841335 substitutions:
230 07:49:28.841408 - {DTB}: None
231 07:49:28.841474 - {INITRD}: 8119396/tftp-deploy-tn17_19n/ramdisk/ramdisk.cpio.gz
232 07:49:28.841580 - {KERNEL}: 8119396/tftp-deploy-tn17_19n/kernel/bzImage
233 07:49:28.841642 - {LAVA_MAC}: None
234 07:49:28.841702 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8119396/extract-nfsrootfs-xx87b2w6
235 07:49:28.841764 - {NFS_SERVER_IP}: 192.168.201.1
236 07:49:28.841821 - {PRESEED_CONFIG}: None
237 07:49:28.841881 - {PRESEED_LOCAL}: None
238 07:49:28.841940 - {RAMDISK}: 8119396/tftp-deploy-tn17_19n/ramdisk/ramdisk.cpio.gz
239 07:49:28.841998 - {ROOT_PART}: None
240 07:49:28.842054 - {ROOT}: None
241 07:49:28.842124 - {SERVER_IP}: 192.168.201.1
242 07:49:28.842182 - {TEE}: None
243 07:49:28.842237 Parsed boot commands:
244 07:49:28.842309 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 07:49:28.842478 Parsed boot commands: tftpboot 192.168.201.1 8119396/tftp-deploy-tn17_19n/kernel/bzImage 8119396/tftp-deploy-tn17_19n/kernel/cmdline 8119396/tftp-deploy-tn17_19n/ramdisk/ramdisk.cpio.gz
246 07:49:28.842570 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 07:49:28.842656 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 07:49:28.842751 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 07:49:28.842841 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 07:49:28.842914 Not connected, no need to disconnect.
251 07:49:28.842992 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 07:49:28.843076 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 07:49:28.843158 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 07:49:28.846340 Setting prompt string to ['lava-test: # ']
255 07:49:28.846762 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 07:49:28.846946 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 07:49:28.847086 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 07:49:28.847215 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 07:49:28.847553 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 07:49:28.872335 >> Command sent successfully.
261 07:49:28.874887 Returned 0 in 0 seconds
262 07:49:28.975673 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 07:49:28.976079 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 07:49:28.976191 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 07:49:28.976277 Setting prompt string to 'Starting depthcharge on Helios...'
267 07:49:28.976343 Changing prompt to 'Starting depthcharge on Helios...'
268 07:49:28.976413 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 07:49:28.976678 [Enter `^Ec?' for help]
270 07:49:35.405435
271 07:49:35.405635
272 07:49:35.414962 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 07:49:35.418358 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 07:49:35.424942 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 07:49:35.428383 CPU: AES supported, TXT NOT supported, VT supported
276 07:49:35.435155 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 07:49:35.438438 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 07:49:35.445278 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 07:49:35.448816 VBOOT: Loading verstage.
280 07:49:35.451780 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 07:49:35.458218 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 07:49:35.461725 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 07:49:35.465164 CBFS @ c08000 size 3f8000
284 07:49:35.471660 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 07:49:35.475133 CBFS: Locating 'fallback/verstage'
286 07:49:35.478280 CBFS: Found @ offset 10fb80 size 1072c
287 07:49:35.478382
288 07:49:35.481317
289 07:49:35.491739 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 07:49:35.505491 Probing TPM: . done!
291 07:49:35.509365 TPM ready after 0 ms
292 07:49:35.512566 Connected to device vid:did:rid of 1ae0:0028:00
293 07:49:35.522438 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 07:49:35.526007 Initialized TPM device CR50 revision 0
295 07:49:35.569306 tlcl_send_startup: Startup return code is 0
296 07:49:35.569455 TPM: setup succeeded
297 07:49:35.582515 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 07:49:35.586021 Chrome EC: UHEPI supported
299 07:49:35.589184 Phase 1
300 07:49:35.592770 FMAP: area GBB found @ c05000 (12288 bytes)
301 07:49:35.599477 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 07:49:35.599632 Phase 2
303 07:49:35.602533
304 07:49:35.602629 Phase 3
305 07:49:35.605864 FMAP: area GBB found @ c05000 (12288 bytes)
306 07:49:35.612699 VB2:vb2_report_dev_firmware() This is developer signed firmware
307 07:49:35.619109 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 07:49:35.622408 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 07:49:35.629266 VB2:vb2_verify_keyblock() Checking keyblock signature...
310 07:49:35.644651 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 07:49:35.648264 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 07:49:35.654859 VB2:vb2_verify_fw_preamble() Verifying preamble.
313 07:49:35.658812 Phase 4
314 07:49:35.662521 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
315 07:49:35.669341 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
316 07:49:35.848373 VB2:vb2_rsa_verify_digest() Digest check failed!
317 07:49:35.851569 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
318 07:49:35.854901
319 07:49:35.854995 Saving nvdata
320 07:49:35.858311 Reboot requested (10020007)
321 07:49:35.861797 board_reset() called!
322 07:49:35.861879 full_reset() called!
323 07:49:40.371666
324 07:49:40.371815
325 07:49:40.381860 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
326 07:49:40.385106 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
327 07:49:40.391780 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
328 07:49:40.395141 CPU: AES supported, TXT NOT supported, VT supported
329 07:49:40.401297 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
330 07:49:40.405015 PCH: device id 0284 (rev 00) is Cometlake-U Premium
331 07:49:40.411496 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
332 07:49:40.414702 VBOOT: Loading verstage.
333 07:49:40.418105 FMAP: Found "FLASH" version 1.1 at 0xc04000.
334 07:49:40.424793 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
335 07:49:40.428459 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
336 07:49:40.431448
337 07:49:40.431527 CBFS @ c08000 size 3f8000
338 07:49:40.438115 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
339 07:49:40.442080 CBFS: Locating 'fallback/verstage'
340 07:49:40.444816 CBFS: Found @ offset 10fb80 size 1072c
341 07:49:40.448624
342 07:49:40.448700
343 07:49:40.458554 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
344 07:49:40.472642 Probing TPM: . done!
345 07:49:40.476023 TPM ready after 0 ms
346 07:49:40.479608 Connected to device vid:did:rid of 1ae0:0028:00
347 07:49:40.489865 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
348 07:49:40.493096 Initialized TPM device CR50 revision 0
349 07:49:40.536651 tlcl_send_startup: Startup return code is 0
350 07:49:40.536769 TPM: setup succeeded
351 07:49:40.549483 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 07:49:40.553132 Chrome EC: UHEPI supported
353 07:49:40.556300 Phase 1
354 07:49:40.559734 FMAP: area GBB found @ c05000 (12288 bytes)
355 07:49:40.566101 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
356 07:49:40.573183 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
357 07:49:40.576213 Recovery requested (1009000e)
358 07:49:40.582586 Saving nvdata
359 07:49:40.588389 tlcl_extend: response is 0
360 07:49:40.597467 tlcl_extend: response is 0
361 07:49:40.604047 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 07:49:40.607288 CBFS @ c08000 size 3f8000
363 07:49:40.614215 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 07:49:40.617537 CBFS: Locating 'fallback/romstage'
365 07:49:40.620776 CBFS: Found @ offset 80 size 145fc
366 07:49:40.624291 Accumulated console time in verstage 98 ms
367 07:49:40.624379
368 07:49:40.624446
369 07:49:40.637141 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
370 07:49:40.643927 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
371 07:49:40.647713 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
372 07:49:40.650787 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
373 07:49:40.657009 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
374 07:49:40.660809 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
375 07:49:40.663684 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
376 07:49:40.666911 TCO_STS: 0000 0000
377 07:49:40.670476 GEN_PMCON: e0015238 00000200
378 07:49:40.673700 GBLRST_CAUSE: 00000000 00000000
379 07:49:40.673784 prev_sleep_state 5
380 07:49:40.677343 Boot Count incremented to 46647
381 07:49:40.684007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 07:49:40.687544 CBFS @ c08000 size 3f8000
383 07:49:40.693975 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 07:49:40.694061 CBFS: Locating 'fspm.bin'
385 07:49:40.697045 CBFS: Found @ offset 5ffc0 size 71000
386 07:49:40.700693
387 07:49:40.703876 Chrome EC: UHEPI supported
388 07:49:40.710262 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
389 07:49:40.713946 Probing TPM: done!
390 07:49:40.720560 Connected to device vid:did:rid of 1ae0:0028:00
391 07:49:40.730417 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
392 07:49:40.736364 Initialized TPM device CR50 revision 0
393 07:49:40.745473 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
394 07:49:40.752129 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
395 07:49:40.755326 MRC cache found, size 1948
396 07:49:40.758849 bootmode is set to: 2
397 07:49:40.762332 PRMRR disabled by config.
398 07:49:40.762419 SPD INDEX = 1
399 07:49:40.768557 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 07:49:40.772021 CBFS @ c08000 size 3f8000
401 07:49:40.778672 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
402 07:49:40.778759 CBFS: Locating 'spd.bin'
403 07:49:40.782601 CBFS: Found @ offset 5fb80 size 400
404 07:49:40.785529 SPD: module type is LPDDR3
405 07:49:40.788912 SPD: module part is
406 07:49:40.795558 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
407 07:49:40.798626 SPD: device width 4 bits, bus width 8 bits
408 07:49:40.802273 SPD: module size is 4096 MB (per channel)
409 07:49:40.805444 memory slot: 0 configuration done.
410 07:49:40.808909 memory slot: 2 configuration done.
411 07:49:40.860277 CBMEM:
412 07:49:40.863574 IMD: root @ 99fff000 254 entries.
413 07:49:40.866955 IMD: root @ 99ffec00 62 entries.
414 07:49:40.869964 External stage cache:
415 07:49:40.873200 IMD: root @ 9abff000 254 entries.
416 07:49:40.876746 IMD: root @ 9abfec00 62 entries.
417 07:49:40.879951 Chrome EC: clear events_b mask to 0x0000000020004000
418 07:49:40.895706 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 07:49:40.900506
420 07:49:40.909318 tlcl_write: response is 0
421 07:49:40.918408 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 07:49:40.925234 MRC: TPM MRC hash updated successfully.
423 07:49:40.925325 2 DIMMs found
424 07:49:40.928461 SMM Memory Map
425 07:49:40.931539 SMRAM : 0x9a000000 0x1000000
426 07:49:40.934916 Subregion 0: 0x9a000000 0xa00000
427 07:49:40.938348 Subregion 1: 0x9aa00000 0x200000
428 07:49:40.941473 Subregion 2: 0x9ac00000 0x400000
429 07:49:40.944610 top_of_ram = 0x9a000000
430 07:49:40.947877 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 07:49:40.954502 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 07:49:40.958306 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 07:49:40.964676 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 07:49:40.967762 CBFS @ c08000 size 3f8000
435 07:49:40.971668 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 07:49:40.974796 CBFS: Locating 'fallback/postcar'
437 07:49:40.977899 CBFS: Found @ offset 107000 size 4b44
438 07:49:40.984617 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 07:49:40.997504 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 07:49:41.000447 Processing 180 relocs. Offset value of 0x97c0c000
441 07:49:41.009014 Accumulated console time in romstage 286 ms
442 07:49:41.009096
443 07:49:41.009162
444 07:49:41.019078 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 07:49:41.025373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 07:49:41.028892 CBFS @ c08000 size 3f8000
447 07:49:41.032004 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 07:49:41.035132
449 07:49:41.038748 CBFS: Locating 'fallback/ramstage'
450 07:49:41.042531 CBFS: Found @ offset 43380 size 1b9e8
451 07:49:41.048613 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 07:49:41.080378 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 07:49:41.084783 Processing 3976 relocs. Offset value of 0x98db0000
454 07:49:41.090977 Accumulated console time in postcar 52 ms
455 07:49:41.091064
456 07:49:41.091132
457 07:49:41.100931 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 07:49:41.104035 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 07:49:41.107403
460 07:49:41.110684 WARNING: RO_VPD is uninitialized or empty.
461 07:49:41.113859 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 07:49:41.120497 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 07:49:41.120585 Normal boot.
464 07:49:41.127176 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 07:49:41.130589 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 07:49:41.133919 CBFS @ c08000 size 3f8000
467 07:49:41.140546 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 07:49:41.143900 CBFS: Locating 'cpu_microcode_blob.bin'
469 07:49:41.147206 CBFS: Found @ offset 14700 size 2ec00
470 07:49:41.150427 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 07:49:41.154076 Skip microcode update
472 07:49:41.157152 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 07:49:41.160566 CBFS @ c08000 size 3f8000
474 07:49:41.167584 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 07:49:41.170596 CBFS: Locating 'fsps.bin'
476 07:49:41.173677 CBFS: Found @ offset d1fc0 size 35000
477 07:49:41.198872 Detected 4 core, 8 thread CPU.
478 07:49:41.202028 Setting up SMI for CPU
479 07:49:41.205208 IED base = 0x9ac00000
480 07:49:41.205293 IED size = 0x00400000
481 07:49:41.208595 Will perform SMM setup.
482 07:49:41.215517 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 07:49:41.221849 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 07:49:41.225653 Processing 16 relocs. Offset value of 0x00030000
485 07:49:41.228951 Attempting to start 7 APs
486 07:49:41.232392 Waiting for 10ms after sending INIT.
487 07:49:41.248652 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
488 07:49:41.248745 done.
489 07:49:41.251823 AP: slot 5 apic_id 3.
490 07:49:41.255239 AP: slot 6 apic_id 2.
491 07:49:41.258418 Waiting for 2nd SIPI to complete...done.
492 07:49:41.261933 AP: slot 3 apic_id 5.
493 07:49:41.262017 AP: slot 7 apic_id 4.
494 07:49:41.265118 AP: slot 4 apic_id 6.
495 07:49:41.268308 AP: slot 2 apic_id 7.
496 07:49:41.274870 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 07:49:41.278379 Processing 13 relocs. Offset value of 0x00038000
498 07:49:41.281431
499 07:49:41.284929 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
500 07:49:41.291590 Installing SMM handler to 0x9a000000
501 07:49:41.298197 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
502 07:49:41.301361 Processing 658 relocs. Offset value of 0x9a010000
503 07:49:41.304975
504 07:49:41.311438 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
505 07:49:41.314527 Processing 13 relocs. Offset value of 0x9a008000
506 07:49:41.321211 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
507 07:49:41.328160 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
508 07:49:41.334529 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
509 07:49:41.337653 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
510 07:49:41.344534 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
511 07:49:41.351187 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
512 07:49:41.354415 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
513 07:49:41.361150 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
514 07:49:41.364860 Clearing SMI status registers
515 07:49:41.368033 SMI_STS: PM1
516 07:49:41.368117 PM1_STS: PWRBTN
517 07:49:41.371049 TCO_STS: SECOND_TO
518 07:49:41.374564 New SMBASE 0x9a000000
519 07:49:41.378166 In relocation handler: CPU 0
520 07:49:41.381197 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
521 07:49:41.384267 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 07:49:41.388106 Relocation complete.
523 07:49:41.391098 New SMBASE 0x99fffc00
524 07:49:41.391182 In relocation handler: CPU 1
525 07:49:41.397910 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
526 07:49:41.400959 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 07:49:41.404886 Relocation complete.
528 07:49:41.404970 New SMBASE 0x99ffe800
529 07:49:41.407895
530 07:49:41.407981 In relocation handler: CPU 6
531 07:49:41.414463 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
532 07:49:41.417711 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 07:49:41.421391 Relocation complete.
534 07:49:41.421484 New SMBASE 0x99ffec00
535 07:49:41.424455 In relocation handler: CPU 5
536 07:49:41.430886 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 07:49:41.434232 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 07:49:41.437889 Relocation complete.
539 07:49:41.437974 New SMBASE 0x99fff400
540 07:49:41.441012 In relocation handler: CPU 3
541 07:49:41.444554 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
542 07:49:41.451049 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 07:49:41.454503 Relocation complete.
544 07:49:41.454588 New SMBASE 0x99ffe400
545 07:49:41.458203 In relocation handler: CPU 7
546 07:49:41.461077 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 07:49:41.467591 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 07:49:41.467676 Relocation complete.
549 07:49:41.470908 New SMBASE 0x99fff800
550 07:49:41.474483 In relocation handler: CPU 2
551 07:49:41.477828 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
552 07:49:41.484373 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 07:49:41.484457 Relocation complete.
554 07:49:41.488101 New SMBASE 0x99fff000
555 07:49:41.491031 In relocation handler: CPU 4
556 07:49:41.494161 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
557 07:49:41.500949 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 07:49:41.501034 Relocation complete.
559 07:49:41.504076 Initializing CPU #0
560 07:49:41.507825 CPU: vendor Intel device 806ec
561 07:49:41.510698 CPU: family 06, model 8e, stepping 0c
562 07:49:41.514390 Clearing out pending MCEs
563 07:49:41.517354 Setting up local APIC...
564 07:49:41.517439 apic_id: 0x00 done.
565 07:49:41.521316 Turbo is available but hidden
566 07:49:41.524528 Turbo is available and visible
567 07:49:41.527717 VMX status: enabled
568 07:49:41.530745 IA32_FEATURE_CONTROL status: locked
569 07:49:41.534491 Skip microcode update
570 07:49:41.534576 CPU #0 initialized
571 07:49:41.537411 Initializing CPU #1
572 07:49:41.537519 Initializing CPU #3
573 07:49:41.540828 Initializing CPU #7
574 07:49:41.543982 CPU: vendor Intel device 806ec
575 07:49:41.547397 CPU: family 06, model 8e, stepping 0c
576 07:49:41.550482 CPU: vendor Intel device 806ec
577 07:49:41.554111 CPU: family 06, model 8e, stepping 0c
578 07:49:41.557078 Clearing out pending MCEs
579 07:49:41.560836 Clearing out pending MCEs
580 07:49:41.564017 Setting up local APIC...
581 07:49:41.564107 Initializing CPU #4
582 07:49:41.567269 Initializing CPU #2
583 07:49:41.570410 CPU: vendor Intel device 806ec
584 07:49:41.573661 CPU: family 06, model 8e, stepping 0c
585 07:49:41.577091 CPU: vendor Intel device 806ec
586 07:49:41.580351 CPU: family 06, model 8e, stepping 0c
587 07:49:41.583800 Clearing out pending MCEs
588 07:49:41.587165 Clearing out pending MCEs
589 07:49:41.587251 Setting up local APIC...
590 07:49:41.590567 apic_id: 0x04 done.
591 07:49:41.593847 Setting up local APIC...
592 07:49:41.597121 CPU: vendor Intel device 806ec
593 07:49:41.600402 CPU: family 06, model 8e, stepping 0c
594 07:49:41.603725 Clearing out pending MCEs
595 07:49:41.603809 VMX status: enabled
596 07:49:41.606883 apic_id: 0x05 done.
597 07:49:41.610248 IA32_FEATURE_CONTROL status: locked
598 07:49:41.613463 VMX status: enabled
599 07:49:41.613569 Skip microcode update
600 07:49:41.616675 IA32_FEATURE_CONTROL status: locked
601 07:49:41.620475 CPU #7 initialized
602 07:49:41.623635 Skip microcode update
603 07:49:41.623722 Initializing CPU #6
604 07:49:41.627169 Setting up local APIC...
605 07:49:41.630190 apic_id: 0x07 done.
606 07:49:41.630276 Setting up local APIC...
607 07:49:41.633216 CPU: vendor Intel device 806ec
608 07:49:41.636910 CPU: family 06, model 8e, stepping 0c
609 07:49:41.640079 Initializing CPU #5
610 07:49:41.643230 Clearing out pending MCEs
611 07:49:41.646903 CPU: vendor Intel device 806ec
612 07:49:41.650267 CPU: family 06, model 8e, stepping 0c
613 07:49:41.653640 Setting up local APIC...
614 07:49:41.653726 apic_id: 0x06 done.
615 07:49:41.656505 VMX status: enabled
616 07:49:41.659755 VMX status: enabled
617 07:49:41.663194 IA32_FEATURE_CONTROL status: locked
618 07:49:41.666598 IA32_FEATURE_CONTROL status: locked
619 07:49:41.666683 Skip microcode update
620 07:49:41.670228 Skip microcode update
621 07:49:41.672984 CPU #2 initialized
622 07:49:41.673069 CPU #4 initialized
623 07:49:41.676547 apic_id: 0x02 done.
624 07:49:41.679781 Clearing out pending MCEs
625 07:49:41.679865 VMX status: enabled
626 07:49:41.683214 Setting up local APIC...
627 07:49:41.686499 CPU #3 initialized
628 07:49:41.686584 apic_id: 0x03 done.
629 07:49:41.689776 IA32_FEATURE_CONTROL status: locked
630 07:49:41.692806 VMX status: enabled
631 07:49:41.696852 Skip microcode update
632 07:49:41.699543 IA32_FEATURE_CONTROL status: locked
633 07:49:41.699628 CPU #6 initialized
634 07:49:41.703280 Skip microcode update
635 07:49:41.706516 apic_id: 0x01 done.
636 07:49:41.706602 CPU #5 initialized
637 07:49:41.709467 VMX status: enabled
638 07:49:41.712701 IA32_FEATURE_CONTROL status: locked
639 07:49:41.716348 Skip microcode update
640 07:49:41.716432 CPU #1 initialized
641 07:49:41.722757 bsp_do_flight_plan done after 461 msecs.
642 07:49:41.726101 CPU: frequency set to 4200 MHz
643 07:49:41.726189 Enabling SMIs.
644 07:49:41.726257 Locking SMM.
645 07:49:41.742692 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
646 07:49:41.745743 CBFS @ c08000 size 3f8000
647 07:49:41.749400 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
648 07:49:41.752652
649 07:49:41.752737 CBFS: Locating 'vbt.bin'
650 07:49:41.756232 CBFS: Found @ offset 5f5c0 size 499
651 07:49:41.762484 Found a VBT of 4608 bytes after decompression
652 07:49:41.941829 Display FSP Version Info HOB
653 07:49:41.945212 Reference Code - CPU = 9.0.1e.30
654 07:49:41.948421 uCode Version = 0.0.0.ca
655 07:49:41.951698 TXT ACM version = ff.ff.ff.ffff
656 07:49:41.954783 Display FSP Version Info HOB
657 07:49:41.958207 Reference Code - ME = 9.0.1e.30
658 07:49:41.961821 MEBx version = 0.0.0.0
659 07:49:41.964793 ME Firmware Version = Consumer SKU
660 07:49:41.968425 Display FSP Version Info HOB
661 07:49:41.971837 Reference Code - CML PCH = 9.0.1e.30
662 07:49:41.975208 PCH-CRID Status = Disabled
663 07:49:41.978344 PCH-CRID Original Value = ff.ff.ff.ffff
664 07:49:41.981666 PCH-CRID New Value = ff.ff.ff.ffff
665 07:49:41.984876 OPROM - RST - RAID = ff.ff.ff.ffff
666 07:49:41.988192 ChipsetInit Base Version = ff.ff.ff.ffff
667 07:49:41.991791 ChipsetInit Oem Version = ff.ff.ff.ffff
668 07:49:41.994704 Display FSP Version Info HOB
669 07:49:42.001550 Reference Code - SA - System Agent = 9.0.1e.30
670 07:49:42.004711 Reference Code - MRC = 0.7.1.6c
671 07:49:42.004797 SA - PCIe Version = 9.0.1e.30
672 07:49:42.008290 SA-CRID Status = Disabled
673 07:49:42.011423 SA-CRID Original Value = 0.0.0.c
674 07:49:42.014610 SA-CRID New Value = 0.0.0.c
675 07:49:42.017728 OPROM - VBIOS = ff.ff.ff.ffff
676 07:49:42.021283 RTC Init
677 07:49:42.024509 Set power on after power failure.
678 07:49:42.024594 Disabling Deep S3
679 07:49:42.028500 Disabling Deep S3
680 07:49:42.028584 Disabling Deep S4
681 07:49:42.031035 Disabling Deep S4
682 07:49:42.031121 Disabling Deep S5
683 07:49:42.034593 Disabling Deep S5
684 07:49:42.041262 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
685 07:49:42.041348 Enumerating buses...
686 07:49:42.047733 Show all devs... Before device enumeration.
687 07:49:42.047820 Root Device: enabled 1
688 07:49:42.050960 CPU_CLUSTER: 0: enabled 1
689 07:49:42.054462 DOMAIN: 0000: enabled 1
690 07:49:42.057741 APIC: 00: enabled 1
691 07:49:42.057826 PCI: 00:00.0: enabled 1
692 07:49:42.061228 PCI: 00:02.0: enabled 1
693 07:49:42.064555 PCI: 00:04.0: enabled 0
694 07:49:42.067730 PCI: 00:05.0: enabled 0
695 07:49:42.067814 PCI: 00:12.0: enabled 1
696 07:49:42.070944 PCI: 00:12.5: enabled 0
697 07:49:42.074841 PCI: 00:12.6: enabled 0
698 07:49:42.074953 PCI: 00:14.0: enabled 1
699 07:49:42.077678
700 07:49:42.077764 PCI: 00:14.1: enabled 0
701 07:49:42.080883 PCI: 00:14.3: enabled 1
702 07:49:42.083974 PCI: 00:14.5: enabled 0
703 07:49:42.084060 PCI: 00:15.0: enabled 1
704 07:49:42.087302 PCI: 00:15.1: enabled 1
705 07:49:42.091231 PCI: 00:15.2: enabled 0
706 07:49:42.093900 PCI: 00:15.3: enabled 0
707 07:49:42.093986 PCI: 00:16.0: enabled 1
708 07:49:42.097248 PCI: 00:16.1: enabled 0
709 07:49:42.100665 PCI: 00:16.2: enabled 0
710 07:49:42.104164 PCI: 00:16.3: enabled 0
711 07:49:42.104249 PCI: 00:16.4: enabled 0
712 07:49:42.107273 PCI: 00:16.5: enabled 0
713 07:49:42.110841 PCI: 00:17.0: enabled 1
714 07:49:42.114061 PCI: 00:19.0: enabled 1
715 07:49:42.114146 PCI: 00:19.1: enabled 0
716 07:49:42.117316 PCI: 00:19.2: enabled 0
717 07:49:42.120561 PCI: 00:1a.0: enabled 0
718 07:49:42.120646 PCI: 00:1c.0: enabled 0
719 07:49:42.124355 PCI: 00:1c.1: enabled 0
720 07:49:42.127245 PCI: 00:1c.2: enabled 0
721 07:49:42.130526 PCI: 00:1c.3: enabled 0
722 07:49:42.130611 PCI: 00:1c.4: enabled 0
723 07:49:42.133936 PCI: 00:1c.5: enabled 0
724 07:49:42.137601 PCI: 00:1c.6: enabled 0
725 07:49:42.140644 PCI: 00:1c.7: enabled 0
726 07:49:42.140728 PCI: 00:1d.0: enabled 1
727 07:49:42.143950 PCI: 00:1d.1: enabled 0
728 07:49:42.147002 PCI: 00:1d.2: enabled 0
729 07:49:42.150775 PCI: 00:1d.3: enabled 0
730 07:49:42.150861 PCI: 00:1d.4: enabled 0
731 07:49:42.153770 PCI: 00:1d.5: enabled 1
732 07:49:42.157128 PCI: 00:1e.0: enabled 1
733 07:49:42.157213 PCI: 00:1e.1: enabled 0
734 07:49:42.160656 PCI: 00:1e.2: enabled 1
735 07:49:42.164122 PCI: 00:1e.3: enabled 1
736 07:49:42.167225 PCI: 00:1f.0: enabled 1
737 07:49:42.167310 PCI: 00:1f.1: enabled 1
738 07:49:42.170492 PCI: 00:1f.2: enabled 1
739 07:49:42.173797 PCI: 00:1f.3: enabled 1
740 07:49:42.177261 PCI: 00:1f.4: enabled 1
741 07:49:42.177346 PCI: 00:1f.5: enabled 1
742 07:49:42.180697 PCI: 00:1f.6: enabled 0
743 07:49:42.183750 USB0 port 0: enabled 1
744 07:49:42.183835 I2C: 00:15: enabled 1
745 07:49:42.186882 I2C: 00:5d: enabled 1
746 07:49:42.190171 GENERIC: 0.0: enabled 1
747 07:49:42.193732 I2C: 00:1a: enabled 1
748 07:49:42.193817 I2C: 00:38: enabled 1
749 07:49:42.196922 I2C: 00:39: enabled 1
750 07:49:42.200603 I2C: 00:3a: enabled 1
751 07:49:42.200688 I2C: 00:3b: enabled 1
752 07:49:42.203671 PCI: 00:00.0: enabled 1
753 07:49:42.207188 SPI: 00: enabled 1
754 07:49:42.207273 SPI: 01: enabled 1
755 07:49:42.210293 PNP: 0c09.0: enabled 1
756 07:49:42.210378 USB2 port 0: enabled 1
757 07:49:42.213425
758 07:49:42.213547 USB2 port 1: enabled 1
759 07:49:42.217220 USB2 port 2: enabled 0
760 07:49:42.220458 USB2 port 3: enabled 0
761 07:49:42.220543 USB2 port 5: enabled 0
762 07:49:42.223931 USB2 port 6: enabled 1
763 07:49:42.226964 USB2 port 9: enabled 1
764 07:49:42.227050 USB3 port 0: enabled 1
765 07:49:42.230418 USB3 port 1: enabled 1
766 07:49:42.233728 USB3 port 2: enabled 1
767 07:49:42.236834 USB3 port 3: enabled 1
768 07:49:42.236936 USB3 port 4: enabled 0
769 07:49:42.240198 APIC: 01: enabled 1
770 07:49:42.240283 APIC: 07: enabled 1
771 07:49:42.243662 APIC: 05: enabled 1
772 07:49:42.246751 APIC: 06: enabled 1
773 07:49:42.246836 APIC: 03: enabled 1
774 07:49:42.250543 APIC: 02: enabled 1
775 07:49:42.253621 APIC: 04: enabled 1
776 07:49:42.253707 Compare with tree...
777 07:49:42.256808 Root Device: enabled 1
778 07:49:42.260494 CPU_CLUSTER: 0: enabled 1
779 07:49:42.260579 APIC: 00: enabled 1
780 07:49:42.263598 APIC: 01: enabled 1
781 07:49:42.266900 APIC: 07: enabled 1
782 07:49:42.266986 APIC: 05: enabled 1
783 07:49:42.270256 APIC: 06: enabled 1
784 07:49:42.273624 APIC: 03: enabled 1
785 07:49:42.273710 APIC: 02: enabled 1
786 07:49:42.276744 APIC: 04: enabled 1
787 07:49:42.280525 DOMAIN: 0000: enabled 1
788 07:49:42.283509 PCI: 00:00.0: enabled 1
789 07:49:42.283593 PCI: 00:02.0: enabled 1
790 07:49:42.286615 PCI: 00:04.0: enabled 0
791 07:49:42.290273 PCI: 00:05.0: enabled 0
792 07:49:42.293354 PCI: 00:12.0: enabled 1
793 07:49:42.296794 PCI: 00:12.5: enabled 0
794 07:49:42.296880 PCI: 00:12.6: enabled 0
795 07:49:42.299768 PCI: 00:14.0: enabled 1
796 07:49:42.303400 USB0 port 0: enabled 1
797 07:49:42.306775 USB2 port 0: enabled 1
798 07:49:42.309807 USB2 port 1: enabled 1
799 07:49:42.309892 USB2 port 2: enabled 0
800 07:49:42.312957
801 07:49:42.313042 USB2 port 3: enabled 0
802 07:49:42.316400 USB2 port 5: enabled 0
803 07:49:42.319926 USB2 port 6: enabled 1
804 07:49:42.323128 USB2 port 9: enabled 1
805 07:49:42.326690 USB3 port 0: enabled 1
806 07:49:42.326775 USB3 port 1: enabled 1
807 07:49:42.329650 USB3 port 2: enabled 1
808 07:49:42.333144 USB3 port 3: enabled 1
809 07:49:42.336431 USB3 port 4: enabled 0
810 07:49:42.339847 PCI: 00:14.1: enabled 0
811 07:49:42.339931 PCI: 00:14.3: enabled 1
812 07:49:42.343159 PCI: 00:14.5: enabled 0
813 07:49:42.346474 PCI: 00:15.0: enabled 1
814 07:49:42.349604 I2C: 00:15: enabled 1
815 07:49:42.353102 PCI: 00:15.1: enabled 1
816 07:49:42.353187 I2C: 00:5d: enabled 1
817 07:49:42.356698 GENERIC: 0.0: enabled 1
818 07:49:42.359501 PCI: 00:15.2: enabled 0
819 07:49:42.363155 PCI: 00:15.3: enabled 0
820 07:49:42.366444 PCI: 00:16.0: enabled 1
821 07:49:42.366531 PCI: 00:16.1: enabled 0
822 07:49:42.369887 PCI: 00:16.2: enabled 0
823 07:49:42.373023 PCI: 00:16.3: enabled 0
824 07:49:42.376527 PCI: 00:16.4: enabled 0
825 07:49:42.376613 PCI: 00:16.5: enabled 0
826 07:49:42.379420
827 07:49:42.379506 PCI: 00:17.0: enabled 1
828 07:49:42.383328 PCI: 00:19.0: enabled 1
829 07:49:42.386142 I2C: 00:1a: enabled 1
830 07:49:42.389723 I2C: 00:38: enabled 1
831 07:49:42.389807 I2C: 00:39: enabled 1
832 07:49:42.392896 I2C: 00:3a: enabled 1
833 07:49:42.396176 I2C: 00:3b: enabled 1
834 07:49:42.399331 PCI: 00:19.1: enabled 0
835 07:49:42.399416 PCI: 00:19.2: enabled 0
836 07:49:42.403017 PCI: 00:1a.0: enabled 0
837 07:49:42.406603 PCI: 00:1c.0: enabled 0
838 07:49:42.409457 PCI: 00:1c.1: enabled 0
839 07:49:42.413457 PCI: 00:1c.2: enabled 0
840 07:49:42.413547 PCI: 00:1c.3: enabled 0
841 07:49:42.416227 PCI: 00:1c.4: enabled 0
842 07:49:42.419574 PCI: 00:1c.5: enabled 0
843 07:49:42.423333 PCI: 00:1c.6: enabled 0
844 07:49:42.426145 PCI: 00:1c.7: enabled 0
845 07:49:42.426231 PCI: 00:1d.0: enabled 1
846 07:49:42.429583 PCI: 00:1d.1: enabled 0
847 07:49:42.432720 PCI: 00:1d.2: enabled 0
848 07:49:42.436560 PCI: 00:1d.3: enabled 0
849 07:49:42.439340 PCI: 00:1d.4: enabled 0
850 07:49:42.439425 PCI: 00:1d.5: enabled 1
851 07:49:42.442647 PCI: 00:00.0: enabled 1
852 07:49:42.445843 PCI: 00:1e.0: enabled 1
853 07:49:42.449149 PCI: 00:1e.1: enabled 0
854 07:49:42.452771 PCI: 00:1e.2: enabled 1
855 07:49:42.452860 SPI: 00: enabled 1
856 07:49:42.455733 PCI: 00:1e.3: enabled 1
857 07:49:42.459240 SPI: 01: enabled 1
858 07:49:42.459336 PCI: 00:1f.0: enabled 1
859 07:49:42.462595 PNP: 0c09.0: enabled 1
860 07:49:42.465872 PCI: 00:1f.1: enabled 1
861 07:49:42.469108 PCI: 00:1f.2: enabled 1
862 07:49:42.472974 PCI: 00:1f.3: enabled 1
863 07:49:42.473065 PCI: 00:1f.4: enabled 1
864 07:49:42.475769 PCI: 00:1f.5: enabled 1
865 07:49:42.479006 PCI: 00:1f.6: enabled 0
866 07:49:42.482441 Root Device scanning...
867 07:49:42.485434 scan_static_bus for Root Device
868 07:49:42.488868 CPU_CLUSTER: 0 enabled
869 07:49:42.488952 DOMAIN: 0000 enabled
870 07:49:42.492376 DOMAIN: 0000 scanning...
871 07:49:42.495545 PCI: pci_scan_bus for bus 00
872 07:49:42.499039 PCI: 00:00.0 [8086/0000] ops
873 07:49:42.502195 PCI: 00:00.0 [8086/9b61] enabled
874 07:49:42.506327 PCI: 00:02.0 [8086/0000] bus ops
875 07:49:42.509175 PCI: 00:02.0 [8086/9b41] enabled
876 07:49:42.512160 PCI: 00:04.0 [8086/1903] disabled
877 07:49:42.515837 PCI: 00:08.0 [8086/1911] enabled
878 07:49:42.519303 PCI: 00:12.0 [8086/02f9] enabled
879 07:49:42.522387 PCI: 00:14.0 [8086/0000] bus ops
880 07:49:42.525707 PCI: 00:14.0 [8086/02ed] enabled
881 07:49:42.529149 PCI: 00:14.2 [8086/02ef] enabled
882 07:49:42.532477 PCI: 00:14.3 [8086/02f0] enabled
883 07:49:42.535755 PCI: 00:15.0 [8086/0000] bus ops
884 07:49:42.538915 PCI: 00:15.0 [8086/02e8] enabled
885 07:49:42.542475 PCI: 00:15.1 [8086/0000] bus ops
886 07:49:42.545850 PCI: 00:15.1 [8086/02e9] enabled
887 07:49:42.548616 PCI: 00:16.0 [8086/0000] ops
888 07:49:42.552205 PCI: 00:16.0 [8086/02e0] enabled
889 07:49:42.555640 PCI: 00:17.0 [8086/0000] ops
890 07:49:42.558855 PCI: 00:17.0 [8086/02d3] enabled
891 07:49:42.562235 PCI: 00:19.0 [8086/0000] bus ops
892 07:49:42.565539 PCI: 00:19.0 [8086/02c5] enabled
893 07:49:42.568624 PCI: 00:1d.0 [8086/0000] bus ops
894 07:49:42.572230 PCI: 00:1d.0 [8086/02b0] enabled
895 07:49:42.575140 PCI: Static device PCI: 00:1d.5 not found, disabling it.
896 07:49:42.578708 PCI: 00:1e.0 [8086/0000] ops
897 07:49:42.582339 PCI: 00:1e.0 [8086/02a8] enabled
898 07:49:42.585364 PCI: 00:1e.2 [8086/0000] bus ops
899 07:49:42.588637 PCI: 00:1e.2 [8086/02aa] enabled
900 07:49:42.592431 PCI: 00:1e.3 [8086/0000] bus ops
901 07:49:42.595323 PCI: 00:1e.3 [8086/02ab] enabled
902 07:49:42.598691 PCI: 00:1f.0 [8086/0000] bus ops
903 07:49:42.602360 PCI: 00:1f.0 [8086/0284] enabled
904 07:49:42.608527 PCI: Static device PCI: 00:1f.1 not found, disabling it.
905 07:49:42.615245 PCI: Static device PCI: 00:1f.2 not found, disabling it.
906 07:49:42.618500 PCI: 00:1f.3 [8086/0000] bus ops
907 07:49:42.621652 PCI: 00:1f.3 [8086/02c8] enabled
908 07:49:42.624955 PCI: 00:1f.4 [8086/0000] bus ops
909 07:49:42.628610 PCI: 00:1f.4 [8086/02a3] enabled
910 07:49:42.632212 PCI: 00:1f.5 [8086/0000] bus ops
911 07:49:42.635207 PCI: 00:1f.5 [8086/02a4] enabled
912 07:49:42.638677 PCI: Leftover static devices:
913 07:49:42.638764 PCI: 00:05.0
914 07:49:42.638831 PCI: 00:12.5
915 07:49:42.641649 PCI: 00:12.6
916 07:49:42.641735 PCI: 00:14.1
917 07:49:42.645231 PCI: 00:14.5
918 07:49:42.645317 PCI: 00:15.2
919 07:49:42.645385 PCI: 00:15.3
920 07:49:42.648421 PCI: 00:16.1
921 07:49:42.648505 PCI: 00:16.2
922 07:49:42.651872 PCI: 00:16.3
923 07:49:42.651959 PCI: 00:16.4
924 07:49:42.652027 PCI: 00:16.5
925 07:49:42.654995 PCI: 00:19.1
926 07:49:42.655081 PCI: 00:19.2
927 07:49:42.658257 PCI: 00:1a.0
928 07:49:42.658343 PCI: 00:1c.0
929 07:49:42.661695 PCI: 00:1c.1
930 07:49:42.661780 PCI: 00:1c.2
931 07:49:42.661846 PCI: 00:1c.3
932 07:49:42.665187 PCI: 00:1c.4
933 07:49:42.665272 PCI: 00:1c.5
934 07:49:42.668865 PCI: 00:1c.6
935 07:49:42.668949 PCI: 00:1c.7
936 07:49:42.669016 PCI: 00:1d.1
937 07:49:42.671486 PCI: 00:1d.2
938 07:49:42.671571 PCI: 00:1d.3
939 07:49:42.674822 PCI: 00:1d.4
940 07:49:42.674907 PCI: 00:1d.5
941 07:49:42.674974 PCI: 00:1e.1
942 07:49:42.678552 PCI: 00:1f.1
943 07:49:42.678650 PCI: 00:1f.2
944 07:49:42.681664 PCI: 00:1f.6
945 07:49:42.685098 PCI: Check your devicetree.cb.
946 07:49:42.685184 PCI: 00:02.0 scanning...
947 07:49:42.688422 scan_generic_bus for PCI: 00:02.0
948 07:49:42.692109
949 07:49:42.695085 scan_generic_bus for PCI: 00:02.0 done
950 07:49:42.698171 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
951 07:49:42.701651 PCI: 00:14.0 scanning...
952 07:49:42.704799 scan_static_bus for PCI: 00:14.0
953 07:49:42.708513 USB0 port 0 enabled
954 07:49:42.711821 USB0 port 0 scanning...
955 07:49:42.714797 scan_static_bus for USB0 port 0
956 07:49:42.714883 USB2 port 0 enabled
957 07:49:42.718457 USB2 port 1 enabled
958 07:49:42.718542 USB2 port 2 disabled
959 07:49:42.721600 USB2 port 3 disabled
960 07:49:42.724954 USB2 port 5 disabled
961 07:49:42.725042 USB2 port 6 enabled
962 07:49:42.728112 USB2 port 9 enabled
963 07:49:42.731694 USB3 port 0 enabled
964 07:49:42.731786 USB3 port 1 enabled
965 07:49:42.734596 USB3 port 2 enabled
966 07:49:42.734684 USB3 port 3 enabled
967 07:49:42.737986 USB3 port 4 disabled
968 07:49:42.741321 USB2 port 0 scanning...
969 07:49:42.744961 scan_static_bus for USB2 port 0
970 07:49:42.748340 scan_static_bus for USB2 port 0 done
971 07:49:42.754404 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
972 07:49:42.754503 USB2 port 1 scanning...
973 07:49:42.758050 scan_static_bus for USB2 port 1
974 07:49:42.764930 scan_static_bus for USB2 port 1 done
975 07:49:42.768160 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
976 07:49:42.771589 USB2 port 6 scanning...
977 07:49:42.774641 scan_static_bus for USB2 port 6
978 07:49:42.778160 scan_static_bus for USB2 port 6 done
979 07:49:42.784452 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
980 07:49:42.784601 USB2 port 9 scanning...
981 07:49:42.788126 scan_static_bus for USB2 port 9
982 07:49:42.794627 scan_static_bus for USB2 port 9 done
983 07:49:42.797829 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
984 07:49:42.801433 USB3 port 0 scanning...
985 07:49:42.804798 scan_static_bus for USB3 port 0
986 07:49:42.807829 scan_static_bus for USB3 port 0 done
987 07:49:42.814745 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
988 07:49:42.814892 USB3 port 1 scanning...
989 07:49:42.818051 scan_static_bus for USB3 port 1
990 07:49:42.824610 scan_static_bus for USB3 port 1 done
991 07:49:42.828043 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
992 07:49:42.831426 USB3 port 2 scanning...
993 07:49:42.835161 scan_static_bus for USB3 port 2
994 07:49:42.837773 scan_static_bus for USB3 port 2 done
995 07:49:42.844431 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
996 07:49:42.844568 USB3 port 3 scanning...
997 07:49:42.847850 scan_static_bus for USB3 port 3
998 07:49:42.854765 scan_static_bus for USB3 port 3 done
999 07:49:42.857827 scan_bus: scanning of bus USB3 port 3 took 9691 usecs
1000 07:49:42.861336 scan_static_bus for USB0 port 0 done
1001 07:49:42.867588 scan_bus: scanning of bus USB0 port 0 took 155374 usecs
1002 07:49:42.871105 scan_static_bus for PCI: 00:14.0 done
1003 07:49:42.878020 scan_bus: scanning of bus PCI: 00:14.0 took 172988 usecs
1004 07:49:42.881173 PCI: 00:15.0 scanning...
1005 07:49:42.884150 scan_generic_bus for PCI: 00:15.0
1006 07:49:42.887641 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1007 07:49:42.890861 scan_generic_bus for PCI: 00:15.0 done
1008 07:49:42.897517 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
1009 07:49:42.900826 PCI: 00:15.1 scanning...
1010 07:49:42.904429 scan_generic_bus for PCI: 00:15.1
1011 07:49:42.907622 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1012 07:49:42.910742 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1013 07:49:42.913855 scan_generic_bus for PCI: 00:15.1 done
1014 07:49:42.920754 scan_bus: scanning of bus PCI: 00:15.1 took 18617 usecs
1015 07:49:42.924223 PCI: 00:19.0 scanning...
1016 07:49:42.927220 scan_generic_bus for PCI: 00:19.0
1017 07:49:42.930714 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1018 07:49:42.933764 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1019 07:49:42.937658
1020 07:49:42.940396 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1021 07:49:42.943905 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1022 07:49:42.946893 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1023 07:49:42.950670 scan_generic_bus for PCI: 00:19.0 done
1024 07:49:42.957187 scan_bus: scanning of bus PCI: 00:19.0 took 30740 usecs
1025 07:49:42.960353 PCI: 00:1d.0 scanning...
1026 07:49:42.963494 do_pci_scan_bridge for PCI: 00:1d.0
1027 07:49:42.967044 PCI: pci_scan_bus for bus 01
1028 07:49:42.970458 PCI: 01:00.0 [1c5c/1327] enabled
1029 07:49:42.973684 Enabling Common Clock Configuration
1030 07:49:42.976756 L1 Sub-State supported from root port 29
1031 07:49:42.980140 L1 Sub-State Support = 0xf
1032 07:49:42.983835 CommonModeRestoreTime = 0x28
1033 07:49:42.986782 Power On Value = 0x16, Power On Scale = 0x0
1034 07:49:42.990367 ASPM: Enabled L1
1035 07:49:42.996858 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1036 07:49:42.996976 PCI: 00:1e.2 scanning...
1037 07:49:43.000190 scan_generic_bus for PCI: 00:1e.2
1038 07:49:43.006713 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1039 07:49:43.010257 scan_generic_bus for PCI: 00:1e.2 done
1040 07:49:43.013338 scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
1041 07:49:43.016562 PCI: 00:1e.3 scanning...
1042 07:49:43.020248 scan_generic_bus for PCI: 00:1e.3
1043 07:49:43.023236 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1044 07:49:43.029929 scan_generic_bus for PCI: 00:1e.3 done
1045 07:49:43.033434 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
1046 07:49:43.036810 PCI: 00:1f.0 scanning...
1047 07:49:43.040085 scan_static_bus for PCI: 00:1f.0
1048 07:49:43.043730 PNP: 0c09.0 enabled
1049 07:49:43.046324 scan_static_bus for PCI: 00:1f.0 done
1050 07:49:43.053244 scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs
1051 07:49:43.053377 PCI: 00:1f.3 scanning...
1052 07:49:43.059810 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1053 07:49:43.062840 PCI: 00:1f.4 scanning...
1054 07:49:43.066458 scan_generic_bus for PCI: 00:1f.4
1055 07:49:43.069912 scan_generic_bus for PCI: 00:1f.4 done
1056 07:49:43.076487 scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs
1057 07:49:43.080045 PCI: 00:1f.5 scanning...
1058 07:49:43.082849 scan_generic_bus for PCI: 00:1f.5
1059 07:49:43.086038 scan_generic_bus for PCI: 00:1f.5 done
1060 07:49:43.093015 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1061 07:49:43.096426 scan_bus: scanning of bus DOMAIN: 0000 took 605121 usecs
1062 07:49:43.099523 scan_static_bus for Root Device done
1063 07:49:43.106085 scan_bus: scanning of bus Root Device took 624993 usecs
1064 07:49:43.106212 done
1065 07:49:43.109645 Chrome EC: UHEPI supported
1066 07:49:43.116446 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1067 07:49:43.122943 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1068 07:49:43.129836 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1069 07:49:43.135967 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1070 07:49:43.139271 SPI flash protection: WPSW=0 SRP0=0
1071 07:49:43.142344 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1072 07:49:43.149344 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1073 07:49:43.152552 found VGA at PCI: 00:02.0
1074 07:49:43.155746 Setting up VGA for PCI: 00:02.0
1075 07:49:43.159082 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1076 07:49:43.165785 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1077 07:49:43.169303 Allocating resources...
1078 07:49:43.169387 Reading resources...
1079 07:49:43.175721 Root Device read_resources bus 0 link: 0
1080 07:49:43.178945 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1081 07:49:43.185485 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1082 07:49:43.189274 DOMAIN: 0000 read_resources bus 0 link: 0
1083 07:49:43.195808 PCI: 00:14.0 read_resources bus 0 link: 0
1084 07:49:43.199006 USB0 port 0 read_resources bus 0 link: 0
1085 07:49:43.206610 USB0 port 0 read_resources bus 0 link: 0 done
1086 07:49:43.210474 PCI: 00:14.0 read_resources bus 0 link: 0 done
1087 07:49:43.217390 PCI: 00:15.0 read_resources bus 1 link: 0
1088 07:49:43.220592 PCI: 00:15.0 read_resources bus 1 link: 0 done
1089 07:49:43.227257 PCI: 00:15.1 read_resources bus 2 link: 0
1090 07:49:43.230543 PCI: 00:15.1 read_resources bus 2 link: 0 done
1091 07:49:43.238452 PCI: 00:19.0 read_resources bus 3 link: 0
1092 07:49:43.244776 PCI: 00:19.0 read_resources bus 3 link: 0 done
1093 07:49:43.248530 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 07:49:43.254729 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 07:49:43.258475 PCI: 00:1e.2 read_resources bus 4 link: 0
1096 07:49:43.264826 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1097 07:49:43.268040 PCI: 00:1e.3 read_resources bus 5 link: 0
1098 07:49:43.274809 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1099 07:49:43.278203 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 07:49:43.284765 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 07:49:43.288456 DOMAIN: 0000 read_resources bus 0 link: 0 done
1102 07:49:43.295398 Root Device read_resources bus 0 link: 0 done
1103 07:49:43.298280 Done reading resources.
1104 07:49:43.301680 Show resources in subtree (Root Device)...After reading.
1105 07:49:43.308307 Root Device child on link 0 CPU_CLUSTER: 0
1106 07:49:43.311793 CPU_CLUSTER: 0 child on link 0 APIC: 00
1107 07:49:43.311882 APIC: 00
1108 07:49:43.315230 APIC: 01
1109 07:49:43.315317 APIC: 07
1110 07:49:43.315384 APIC: 05
1111 07:49:43.318781 APIC: 06
1112 07:49:43.318868 APIC: 03
1113 07:49:43.321866 APIC: 02
1114 07:49:43.321952 APIC: 04
1115 07:49:43.324932 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 07:49:43.335303 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 07:49:43.345116 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1118 07:49:43.345206 PCI: 00:00.0
1119 07:49:43.395043 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 07:49:43.396031 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 07:49:43.396739 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 07:49:43.397936 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 07:49:43.398213 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 07:49:43.444524 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 07:49:43.444869 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 07:49:43.444949 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 07:49:43.445204 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 07:49:43.445463 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1129 07:49:43.450131 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1130 07:49:43.456922 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1131 07:49:43.460026
1132 07:49:43.466867 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1133 07:49:43.476860 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1134 07:49:43.486650 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1135 07:49:43.496398 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1136 07:49:43.496486 PCI: 00:02.0
1137 07:49:43.506533 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 07:49:43.509892
1139 07:49:43.519544 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1140 07:49:43.526051 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1141 07:49:43.529429 PCI: 00:04.0
1142 07:49:43.529557 PCI: 00:08.0
1143 07:49:43.539548 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1144 07:49:43.543604 PCI: 00:12.0
1145 07:49:43.553244 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 07:49:43.556130 PCI: 00:14.0 child on link 0 USB0 port 0
1147 07:49:43.566564 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1148 07:49:43.569594 USB0 port 0 child on link 0 USB2 port 0
1149 07:49:43.572920 USB2 port 0
1150 07:49:43.573004 USB2 port 1
1151 07:49:43.575986 USB2 port 2
1152 07:49:43.576071 USB2 port 3
1153 07:49:43.579489 USB2 port 5
1154 07:49:43.579573 USB2 port 6
1155 07:49:43.582649 USB2 port 9
1156 07:49:43.585842 USB3 port 0
1157 07:49:43.585926 USB3 port 1
1158 07:49:43.589444 USB3 port 2
1159 07:49:43.589534 USB3 port 3
1160 07:49:43.592543 USB3 port 4
1161 07:49:43.592627 PCI: 00:14.2
1162 07:49:43.602590 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1163 07:49:43.612467 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 07:49:43.616374 PCI: 00:14.3
1165 07:49:43.625468 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 07:49:43.629096 PCI: 00:15.0 child on link 0 I2C: 01:15
1167 07:49:43.638875 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 07:49:43.638963 I2C: 01:15
1169 07:49:43.645532 PCI: 00:15.1 child on link 0 I2C: 02:5d
1170 07:49:43.655615 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 07:49:43.655734 I2C: 02:5d
1172 07:49:43.658862 GENERIC: 0.0
1173 07:49:43.658947 PCI: 00:16.0
1174 07:49:43.669063 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 07:49:43.671964 PCI: 00:17.0
1176 07:49:43.678913 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1177 07:49:43.688723 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1178 07:49:43.698559 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1179 07:49:43.705234 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1180 07:49:43.715408 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1181 07:49:43.722214 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1182 07:49:43.728302 PCI: 00:19.0 child on link 0 I2C: 03:1a
1183 07:49:43.738805 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 07:49:43.738902 I2C: 03:1a
1185 07:49:43.741865 I2C: 03:38
1186 07:49:43.741952 I2C: 03:39
1187 07:49:43.745118 I2C: 03:3a
1188 07:49:43.745204 I2C: 03:3b
1189 07:49:43.748549 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1190 07:49:43.758512 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1191 07:49:43.768058 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1192 07:49:43.778154 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1193 07:49:43.778264 PCI: 01:00.0
1194 07:49:43.788116 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 07:49:43.791522 PCI: 00:1e.0
1196 07:49:43.801516 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1197 07:49:43.811254 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1198 07:49:43.814596 PCI: 00:1e.2 child on link 0 SPI: 00
1199 07:49:43.824532 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 07:49:43.827950 SPI: 00
1201 07:49:43.831115 PCI: 00:1e.3 child on link 0 SPI: 01
1202 07:49:43.841063 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 07:49:43.841159 SPI: 01
1204 07:49:43.847861 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1205 07:49:43.854443 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1206 07:49:43.864299 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1207 07:49:43.864406 PNP: 0c09.0
1208 07:49:43.874275 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1209 07:49:43.874372 PCI: 00:1f.3
1210 07:49:43.877341
1211 07:49:43.883940 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 07:49:43.887609
1213 07:49:43.897184 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1214 07:49:43.897280 PCI: 00:1f.4
1215 07:49:43.906988 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1216 07:49:43.917336 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1217 07:49:43.917439 PCI: 00:1f.5
1218 07:49:43.927142 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1219 07:49:43.933842 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1220 07:49:43.940528 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1221 07:49:43.946829 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1222 07:49:43.950368 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1223 07:49:43.953721 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1224 07:49:43.957436 PCI: 00:17.0 18 * [0x60 - 0x67] io
1225 07:49:43.960426 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1226 07:49:43.966898 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1227 07:49:43.973598 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1228 07:49:43.983402 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1229 07:49:43.990151 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1230 07:49:43.996638 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1231 07:49:44.000320 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1232 07:49:44.010273 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1233 07:49:44.013422 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1234 07:49:44.020040 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1235 07:49:44.023466 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1236 07:49:44.030249 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1237 07:49:44.033158 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1238 07:49:44.039767 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1239 07:49:44.043277 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1240 07:49:44.046662 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1241 07:49:44.053107 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1242 07:49:44.056294 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1243 07:49:44.063157 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1244 07:49:44.066123 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1245 07:49:44.072807 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1246 07:49:44.076190 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1247 07:49:44.082984 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1248 07:49:44.086122 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1249 07:49:44.092859 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1250 07:49:44.096249 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1251 07:49:44.102704 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1252 07:49:44.106167 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1253 07:49:44.112547 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1254 07:49:44.115921 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1255 07:49:44.119480 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1256 07:49:44.122707
1257 07:49:44.129115 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1258 07:49:44.132268 avoid_fixed_resources: DOMAIN: 0000
1259 07:49:44.139574 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1260 07:49:44.146131 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1261 07:49:44.152753 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1262 07:49:44.159067 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1263 07:49:44.169397 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1264 07:49:44.175825 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1265 07:49:44.182244 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1266 07:49:44.192296 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1267 07:49:44.199158 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1268 07:49:44.205644 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1269 07:49:44.212423 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1270 07:49:44.222053 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1271 07:49:44.222459 Setting resources...
1272 07:49:44.229214 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1273 07:49:44.232123 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1274 07:49:44.239029 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1275 07:49:44.242439 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1276 07:49:44.245442 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1277 07:49:44.252307 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1278 07:49:44.258840 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1279 07:49:44.265975 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1280 07:49:44.272521 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1281 07:49:44.275272 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1282 07:49:44.278987
1283 07:49:44.282419 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1284 07:49:44.285139 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1285 07:49:44.291863 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1286 07:49:44.295441 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1287 07:49:44.301850 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1288 07:49:44.304938 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1289 07:49:44.311876 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1290 07:49:44.315567 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1291 07:49:44.321689 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1292 07:49:44.325138 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1293 07:49:44.331848 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1294 07:49:44.334837 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1295 07:49:44.341574 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1296 07:49:44.345256 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1297 07:49:44.348459 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1298 07:49:44.351745
1299 07:49:44.355176 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1300 07:49:44.358206 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1301 07:49:44.365033 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1302 07:49:44.368354 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1303 07:49:44.375115 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1304 07:49:44.378347 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1305 07:49:44.385062 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1306 07:49:44.391245 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1307 07:49:44.398053 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1308 07:49:44.404617 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1309 07:49:44.415182 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1310 07:49:44.418415 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1311 07:49:44.424898 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1312 07:49:44.431351 Root Device assign_resources, bus 0 link: 0
1313 07:49:44.434478 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 07:49:44.444684 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1315 07:49:44.451428 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1316 07:49:44.461194 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1317 07:49:44.468195 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1318 07:49:44.477575 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1319 07:49:44.484268 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1320 07:49:44.487770 PCI: 00:14.0 assign_resources, bus 0 link: 0
1321 07:49:44.494407 PCI: 00:14.0 assign_resources, bus 0 link: 0
1322 07:49:44.501186 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1323 07:49:44.511074 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1324 07:49:44.517567 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1325 07:49:44.528100 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1326 07:49:44.531145 PCI: 00:15.0 assign_resources, bus 1 link: 0
1327 07:49:44.534447 PCI: 00:15.0 assign_resources, bus 1 link: 0
1328 07:49:44.537856
1329 07:49:44.543895 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1330 07:49:44.547504 PCI: 00:15.1 assign_resources, bus 2 link: 0
1331 07:49:44.554336 PCI: 00:15.1 assign_resources, bus 2 link: 0
1332 07:49:44.560737 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1333 07:49:44.570637 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1334 07:49:44.577189 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1335 07:49:44.583635 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1336 07:49:44.594088 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1337 07:49:44.600634 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1338 07:49:44.607139 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1339 07:49:44.617006 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1340 07:49:44.620364 PCI: 00:19.0 assign_resources, bus 3 link: 0
1341 07:49:44.626904 PCI: 00:19.0 assign_resources, bus 3 link: 0
1342 07:49:44.633354 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1343 07:49:44.643610 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1344 07:49:44.653206 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1345 07:49:44.656636 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1346 07:49:44.663126 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1347 07:49:44.669999 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 07:49:44.677411 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1349 07:49:44.686676 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1350 07:49:44.689980 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1351 07:49:44.696765 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1352 07:49:44.703280 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1353 07:49:44.706721 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1354 07:49:44.713093 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1355 07:49:44.716599 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1356 07:49:44.723436 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1357 07:49:44.726754 LPC: Trying to open IO window from 800 size 1ff
1358 07:49:44.736830 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1359 07:49:44.743459 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1360 07:49:44.753140 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1361 07:49:44.759778 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1362 07:49:44.766314 DOMAIN: 0000 assign_resources, bus 0 link: 0
1363 07:49:44.769996 Root Device assign_resources, bus 0 link: 0
1364 07:49:44.773394 Done setting resources.
1365 07:49:44.779950 Show resources in subtree (Root Device)...After assigning values.
1366 07:49:44.783145 Root Device child on link 0 CPU_CLUSTER: 0
1367 07:49:44.786151 CPU_CLUSTER: 0 child on link 0 APIC: 00
1368 07:49:44.789532 APIC: 00
1369 07:49:44.789950 APIC: 01
1370 07:49:44.790281 APIC: 07
1371 07:49:44.792698 APIC: 05
1372 07:49:44.793120 APIC: 06
1373 07:49:44.796148 APIC: 03
1374 07:49:44.796565 APIC: 02
1375 07:49:44.796886 APIC: 04
1376 07:49:44.802811 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 07:49:44.812691 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1378 07:49:44.822415 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1379 07:49:44.822920 PCI: 00:00.0
1380 07:49:44.832333 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 07:49:44.842223 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 07:49:44.852606 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 07:49:44.862338 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 07:49:44.872247 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 07:49:44.878880 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 07:49:44.882275
1387 07:49:44.888531 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1388 07:49:44.898715 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1389 07:49:44.908273 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1390 07:49:44.918195 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1391 07:49:44.925178 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1392 07:49:44.928240
1393 07:49:44.935068 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 07:49:44.944831 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 07:49:44.954500 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 07:49:44.964510 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 07:49:44.974593 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 07:49:44.975075 PCI: 00:02.0
1399 07:49:44.988004 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 07:49:44.997695 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 07:49:45.007531 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 07:49:45.007992 PCI: 00:04.0
1403 07:49:45.011138 PCI: 00:08.0
1404 07:49:45.020949 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 07:49:45.021470 PCI: 00:12.0
1406 07:49:45.030621 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 07:49:45.037169 PCI: 00:14.0 child on link 0 USB0 port 0
1408 07:49:45.047346 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 07:49:45.050615 USB0 port 0 child on link 0 USB2 port 0
1410 07:49:45.054257 USB2 port 0
1411 07:49:45.054709 USB2 port 1
1412 07:49:45.057355 USB2 port 2
1413 07:49:45.057841 USB2 port 3
1414 07:49:45.060472 USB2 port 5
1415 07:49:45.061061 USB2 port 6
1416 07:49:45.064266 USB2 port 9
1417 07:49:45.064816 USB3 port 0
1418 07:49:45.067467 USB3 port 1
1419 07:49:45.067921 USB3 port 2
1420 07:49:45.070798 USB3 port 3
1421 07:49:45.071453 USB3 port 4
1422 07:49:45.073913 PCI: 00:14.2
1423 07:49:45.083911 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 07:49:45.093749 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 07:49:45.096882 PCI: 00:14.3
1426 07:49:45.106963 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 07:49:45.110310 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 07:49:45.120414 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 07:49:45.123253 I2C: 01:15
1430 07:49:45.126835 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 07:49:45.136868 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 07:49:45.140169 I2C: 02:5d
1433 07:49:45.140605 GENERIC: 0.0
1434 07:49:45.143170 PCI: 00:16.0
1435 07:49:45.153328 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 07:49:45.153828 PCI: 00:17.0
1437 07:49:45.163456 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 07:49:45.173428 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 07:49:45.183440 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 07:49:45.193222 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 07:49:45.202751 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 07:49:45.212795 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 07:49:45.216426 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 07:49:45.225966 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 07:49:45.229226 I2C: 03:1a
1446 07:49:45.229694 I2C: 03:38
1447 07:49:45.230057 I2C: 03:39
1448 07:49:45.232463 I2C: 03:3a
1449 07:49:45.232892 I2C: 03:3b
1450 07:49:45.238953 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 07:49:45.249347 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 07:49:45.259164 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 07:49:45.269315 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 07:49:45.269819 PCI: 01:00.0
1455 07:49:45.279380 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 07:49:45.282642 PCI: 00:1e.0
1457 07:49:45.292415 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 07:49:45.302120 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 07:49:45.308515 PCI: 00:1e.2 child on link 0 SPI: 00
1460 07:49:45.319150 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 07:49:45.319796 SPI: 00
1462 07:49:45.322104 PCI: 00:1e.3 child on link 0 SPI: 01
1463 07:49:45.331619 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 07:49:45.334981 SPI: 01
1465 07:49:45.338590 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 07:49:45.348264 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 07:49:45.355232 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 07:49:45.358204 PNP: 0c09.0
1469 07:49:45.368336 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 07:49:45.368887 PCI: 00:1f.3
1471 07:49:45.378275 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 07:49:45.388190 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 07:49:45.391471 PCI: 00:1f.4
1474 07:49:45.401550 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 07:49:45.411354 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 07:49:45.411794 PCI: 00:1f.5
1477 07:49:45.421166 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 07:49:45.424503 Done allocating resources.
1479 07:49:45.431019 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 07:49:45.434278 Enabling resources...
1481 07:49:45.437594 PCI: 00:00.0 subsystem <- 8086/9b61
1482 07:49:45.440748 PCI: 00:00.0 cmd <- 06
1483 07:49:45.444174 PCI: 00:02.0 subsystem <- 8086/9b41
1484 07:49:45.447326 PCI: 00:02.0 cmd <- 03
1485 07:49:45.447759 PCI: 00:08.0 cmd <- 06
1486 07:49:45.454112 PCI: 00:12.0 subsystem <- 8086/02f9
1487 07:49:45.454546 PCI: 00:12.0 cmd <- 02
1488 07:49:45.457405 PCI: 00:14.0 subsystem <- 8086/02ed
1489 07:49:45.460876 PCI: 00:14.0 cmd <- 02
1490 07:49:45.464148 PCI: 00:14.2 cmd <- 02
1491 07:49:45.467332 PCI: 00:14.3 subsystem <- 8086/02f0
1492 07:49:45.470829 PCI: 00:14.3 cmd <- 02
1493 07:49:45.474077 PCI: 00:15.0 subsystem <- 8086/02e8
1494 07:49:45.477521 PCI: 00:15.0 cmd <- 02
1495 07:49:45.480674 PCI: 00:15.1 subsystem <- 8086/02e9
1496 07:49:45.484345 PCI: 00:15.1 cmd <- 02
1497 07:49:45.487561 PCI: 00:16.0 subsystem <- 8086/02e0
1498 07:49:45.490386 PCI: 00:16.0 cmd <- 02
1499 07:49:45.494062 PCI: 00:17.0 subsystem <- 8086/02d3
1500 07:49:45.494620 PCI: 00:17.0 cmd <- 03
1501 07:49:45.500682 PCI: 00:19.0 subsystem <- 8086/02c5
1502 07:49:45.501112 PCI: 00:19.0 cmd <- 02
1503 07:49:45.503935 PCI: 00:1d.0 bridge ctrl <- 0013
1504 07:49:45.507315 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 07:49:45.510382 PCI: 00:1d.0 cmd <- 06
1506 07:49:45.513950 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 07:49:45.517258 PCI: 00:1e.0 cmd <- 06
1508 07:49:45.521350 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 07:49:45.524148 PCI: 00:1e.2 cmd <- 06
1510 07:49:45.527290 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 07:49:45.530701 PCI: 00:1e.3 cmd <- 02
1512 07:49:45.533762 PCI: 00:1f.0 subsystem <- 8086/0284
1513 07:49:45.537167 PCI: 00:1f.0 cmd <- 407
1514 07:49:45.540403 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 07:49:45.543781 PCI: 00:1f.3 cmd <- 02
1516 07:49:45.547431 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 07:49:45.547875 PCI: 00:1f.4 cmd <- 03
1518 07:49:45.550093
1519 07:49:45.553321 PCI: 00:1f.5 subsystem <- 8086/02a4
1520 07:49:45.553786 PCI: 00:1f.5 cmd <- 406
1521 07:49:45.564345 PCI: 01:00.0 cmd <- 02
1522 07:49:45.569214 done.
1523 07:49:45.577834 ME: Version: 14.0.39.1367
1524 07:49:45.584192 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1525 07:49:45.587504 Initializing devices...
1526 07:49:45.587811 Root Device init ...
1527 07:49:45.594412 Chrome EC: Set SMI mask to 0x0000000000000000
1528 07:49:45.597155 Chrome EC: clear events_b mask to 0x0000000000000000
1529 07:49:45.604391 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1530 07:49:45.610707 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1531 07:49:45.617299 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1532 07:49:45.620619 Chrome EC: Set WAKE mask to 0x0000000000000000
1533 07:49:45.623581 Root Device init finished in 35171 usecs
1534 07:49:45.626967 CPU_CLUSTER: 0 init ...
1535 07:49:45.630517 CPU_CLUSTER: 0 init finished in 2447 usecs
1536 07:49:45.633451
1537 07:49:45.638012 PCI: 00:00.0 init ...
1538 07:49:45.641757 CPU TDP: 15 Watts
1539 07:49:45.644523 CPU PL2 = 64 Watts
1540 07:49:45.648144 PCI: 00:00.0 init finished in 7073 usecs
1541 07:49:45.651310 PCI: 00:02.0 init ...
1542 07:49:45.654275 PCI: 00:02.0 init finished in 2254 usecs
1543 07:49:45.657684 PCI: 00:08.0 init ...
1544 07:49:45.661126 PCI: 00:08.0 init finished in 2253 usecs
1545 07:49:45.664543 PCI: 00:12.0 init ...
1546 07:49:45.667656 PCI: 00:12.0 init finished in 2254 usecs
1547 07:49:45.671247 PCI: 00:14.0 init ...
1548 07:49:45.674462 PCI: 00:14.0 init finished in 2254 usecs
1549 07:49:45.677520 PCI: 00:14.2 init ...
1550 07:49:45.680937 PCI: 00:14.2 init finished in 2253 usecs
1551 07:49:45.684766 PCI: 00:14.3 init ...
1552 07:49:45.687471 PCI: 00:14.3 init finished in 2270 usecs
1553 07:49:45.691243 PCI: 00:15.0 init ...
1554 07:49:45.694391 DW I2C bus 0 at 0xd121f000 (400 KHz)
1555 07:49:45.697730 PCI: 00:15.0 init finished in 5979 usecs
1556 07:49:45.701003 PCI: 00:15.1 init ...
1557 07:49:45.704068 DW I2C bus 1 at 0xd1220000 (400 KHz)
1558 07:49:45.707531 PCI: 00:15.1 init finished in 5980 usecs
1559 07:49:45.710939
1560 07:49:45.711026 PCI: 00:16.0 init ...
1561 07:49:45.717153 PCI: 00:16.0 init finished in 2253 usecs
1562 07:49:45.717242 PCI: 00:19.0 init ...
1563 07:49:45.720617
1564 07:49:45.723878 DW I2C bus 4 at 0xd1222000 (400 KHz)
1565 07:49:45.727204 PCI: 00:19.0 init finished in 5976 usecs
1566 07:49:45.730618 PCI: 00:1d.0 init ...
1567 07:49:45.733766 Initializing PCH PCIe bridge.
1568 07:49:45.737063 PCI: 00:1d.0 init finished in 5283 usecs
1569 07:49:45.740348 PCI: 00:1f.0 init ...
1570 07:49:45.743551 IOAPIC: Initializing IOAPIC at 0xfec00000
1571 07:49:45.750585 IOAPIC: Bootstrap Processor Local APIC = 0x00
1572 07:49:45.750713 IOAPIC: ID = 0x02
1573 07:49:45.753824 IOAPIC: Dumping registers
1574 07:49:45.756810 reg 0x0000: 0x02000000
1575 07:49:45.760047 reg 0x0001: 0x00770020
1576 07:49:45.760147 reg 0x0002: 0x00000000
1577 07:49:45.766690 PCI: 00:1f.0 init finished in 23543 usecs
1578 07:49:45.770026 PCI: 00:1f.4 init ...
1579 07:49:45.773818 PCI: 00:1f.4 init finished in 2262 usecs
1580 07:49:45.784217 PCI: 01:00.0 init ...
1581 07:49:45.787460 PCI: 01:00.0 init finished in 2251 usecs
1582 07:49:45.791930 PNP: 0c09.0 init ...
1583 07:49:45.794743 Google Chrome EC uptime: 11.090 seconds
1584 07:49:45.801750 Google Chrome AP resets since EC boot: 0
1585 07:49:45.804954 Google Chrome most recent AP reset causes:
1586 07:49:45.811380 Google Chrome EC reset flags at last EC boot: reset-pin
1587 07:49:45.814732 PNP: 0c09.0 init finished in 20570 usecs
1588 07:49:45.818105 Devices initialized
1589 07:49:45.818189 Show all devs... After init.
1590 07:49:45.821271 Root Device: enabled 1
1591 07:49:45.824527 CPU_CLUSTER: 0: enabled 1
1592 07:49:45.828003 DOMAIN: 0000: enabled 1
1593 07:49:45.828086 APIC: 00: enabled 1
1594 07:49:45.831492 PCI: 00:00.0: enabled 1
1595 07:49:45.834834 PCI: 00:02.0: enabled 1
1596 07:49:45.837796 PCI: 00:04.0: enabled 0
1597 07:49:45.837913 PCI: 00:05.0: enabled 0
1598 07:49:45.841399 PCI: 00:12.0: enabled 1
1599 07:49:45.844918 PCI: 00:12.5: enabled 0
1600 07:49:45.845002 PCI: 00:12.6: enabled 0
1601 07:49:45.847797 PCI: 00:14.0: enabled 1
1602 07:49:45.851389 PCI: 00:14.1: enabled 0
1603 07:49:45.854476 PCI: 00:14.3: enabled 1
1604 07:49:45.854560 PCI: 00:14.5: enabled 0
1605 07:49:45.857675 PCI: 00:15.0: enabled 1
1606 07:49:45.860988 PCI: 00:15.1: enabled 1
1607 07:49:45.864423 PCI: 00:15.2: enabled 0
1608 07:49:45.864538 PCI: 00:15.3: enabled 0
1609 07:49:45.867692 PCI: 00:16.0: enabled 1
1610 07:49:45.871027 PCI: 00:16.1: enabled 0
1611 07:49:45.874362 PCI: 00:16.2: enabled 0
1612 07:49:45.874446 PCI: 00:16.3: enabled 0
1613 07:49:45.877825 PCI: 00:16.4: enabled 0
1614 07:49:45.881012 PCI: 00:16.5: enabled 0
1615 07:49:45.884005 PCI: 00:17.0: enabled 1
1616 07:49:45.884089 PCI: 00:19.0: enabled 1
1617 07:49:45.887680 PCI: 00:19.1: enabled 0
1618 07:49:45.890854 PCI: 00:19.2: enabled 0
1619 07:49:45.890938 PCI: 00:1a.0: enabled 0
1620 07:49:45.894202 PCI: 00:1c.0: enabled 0
1621 07:49:45.897473 PCI: 00:1c.1: enabled 0
1622 07:49:45.901092 PCI: 00:1c.2: enabled 0
1623 07:49:45.901176 PCI: 00:1c.3: enabled 0
1624 07:49:45.903937 PCI: 00:1c.4: enabled 0
1625 07:49:45.907253 PCI: 00:1c.5: enabled 0
1626 07:49:45.910565 PCI: 00:1c.6: enabled 0
1627 07:49:45.910651 PCI: 00:1c.7: enabled 0
1628 07:49:45.913973 PCI: 00:1d.0: enabled 1
1629 07:49:45.917164 PCI: 00:1d.1: enabled 0
1630 07:49:45.920690 PCI: 00:1d.2: enabled 0
1631 07:49:45.920774 PCI: 00:1d.3: enabled 0
1632 07:49:45.924029 PCI: 00:1d.4: enabled 0
1633 07:49:45.927492 PCI: 00:1d.5: enabled 0
1634 07:49:45.927581 PCI: 00:1e.0: enabled 1
1635 07:49:45.930717 PCI: 00:1e.1: enabled 0
1636 07:49:45.933808 PCI: 00:1e.2: enabled 1
1637 07:49:45.937346 PCI: 00:1e.3: enabled 1
1638 07:49:45.937442 PCI: 00:1f.0: enabled 1
1639 07:49:45.940757 PCI: 00:1f.1: enabled 0
1640 07:49:45.943859 PCI: 00:1f.2: enabled 0
1641 07:49:45.947155 PCI: 00:1f.3: enabled 1
1642 07:49:45.947268 PCI: 00:1f.4: enabled 1
1643 07:49:45.950633 PCI: 00:1f.5: enabled 1
1644 07:49:45.953765 PCI: 00:1f.6: enabled 0
1645 07:49:45.957902 USB0 port 0: enabled 1
1646 07:49:45.958095 I2C: 01:15: enabled 1
1647 07:49:45.960767 I2C: 02:5d: enabled 1
1648 07:49:45.964116 GENERIC: 0.0: enabled 1
1649 07:49:45.964329 I2C: 03:1a: enabled 1
1650 07:49:45.967093 I2C: 03:38: enabled 1
1651 07:49:45.970624 I2C: 03:39: enabled 1
1652 07:49:45.970849 I2C: 03:3a: enabled 1
1653 07:49:45.974005 I2C: 03:3b: enabled 1
1654 07:49:45.977564 PCI: 00:00.0: enabled 1
1655 07:49:45.977811 SPI: 00: enabled 1
1656 07:49:45.980450 SPI: 01: enabled 1
1657 07:49:45.983772 PNP: 0c09.0: enabled 1
1658 07:49:45.984076 USB2 port 0: enabled 1
1659 07:49:45.987200 USB2 port 1: enabled 1
1660 07:49:45.990655 USB2 port 2: enabled 0
1661 07:49:45.991138 USB2 port 3: enabled 0
1662 07:49:45.993930 USB2 port 5: enabled 0
1663 07:49:45.997384 USB2 port 6: enabled 1
1664 07:49:46.000694 USB2 port 9: enabled 1
1665 07:49:46.001158 USB3 port 0: enabled 1
1666 07:49:46.003528 USB3 port 1: enabled 1
1667 07:49:46.007077 USB3 port 2: enabled 1
1668 07:49:46.007512 USB3 port 3: enabled 1
1669 07:49:46.010105 USB3 port 4: enabled 0
1670 07:49:46.014125 APIC: 01: enabled 1
1671 07:49:46.014551 APIC: 07: enabled 1
1672 07:49:46.016988 APIC: 05: enabled 1
1673 07:49:46.020729 APIC: 06: enabled 1
1674 07:49:46.021285 APIC: 03: enabled 1
1675 07:49:46.023751 APIC: 02: enabled 1
1676 07:49:46.024181 APIC: 04: enabled 1
1677 07:49:46.027134 PCI: 00:08.0: enabled 1
1678 07:49:46.030135 PCI: 00:14.2: enabled 1
1679 07:49:46.033643 PCI: 01:00.0: enabled 1
1680 07:49:46.037227 Disabling ACPI via APMC:
1681 07:49:46.037694 done.
1682 07:49:46.043782 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1683 07:49:46.046989 ELOG: NV offset 0xaf0000 size 0x4000
1684 07:49:46.053853 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1685 07:49:46.060112 ELOG: Event(17) added with size 13 at 2022-11-25 07:49:46 UTC
1686 07:49:46.066812 ELOG: Event(92) added with size 9 at 2022-11-25 07:49:46 UTC
1687 07:49:46.073678 ELOG: Event(93) added with size 9 at 2022-11-25 07:49:46 UTC
1688 07:49:46.080490 ELOG: Event(9A) added with size 9 at 2022-11-25 07:49:46 UTC
1689 07:49:46.087136 ELOG: Event(9E) added with size 10 at 2022-11-25 07:49:46 UTC
1690 07:49:46.093733 ELOG: Event(9F) added with size 14 at 2022-11-25 07:49:46 UTC
1691 07:49:46.096418 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1692 07:49:46.103824 ELOG: Event(A1) added with size 10 at 2022-11-25 07:49:46 UTC
1693 07:49:46.113990 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1694 07:49:46.120180 ELOG: Event(A0) added with size 9 at 2022-11-25 07:49:46 UTC
1695 07:49:46.123847 elog_add_boot_reason: Logged dev mode boot
1696 07:49:46.124336 Finalize devices...
1697 07:49:46.126790
1698 07:49:46.127232 PCI: 00:17.0 final
1699 07:49:46.130237 Devices finalized
1700 07:49:46.133584 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1701 07:49:46.140349 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1702 07:49:46.143753 ME: HFSTS1 : 0x90000245
1703 07:49:46.147093 ME: HFSTS2 : 0x3B850126
1704 07:49:46.153878 ME: HFSTS3 : 0x00000020
1705 07:49:46.156892 ME: HFSTS4 : 0x00004800
1706 07:49:46.160081 ME: HFSTS5 : 0x00000000
1707 07:49:46.163478 ME: HFSTS6 : 0x40400006
1708 07:49:46.167371 ME: Manufacturing Mode : NO
1709 07:49:46.170003 ME: FW Partition Table : OK
1710 07:49:46.173428 ME: Bringup Loader Failure : NO
1711 07:49:46.176648 ME: Firmware Init Complete : YES
1712 07:49:46.179843 ME: Boot Options Present : NO
1713 07:49:46.183564 ME: Update In Progress : NO
1714 07:49:46.186469 ME: D0i3 Support : YES
1715 07:49:46.189830 ME: Low Power State Enabled : NO
1716 07:49:46.192925 ME: CPU Replaced : NO
1717 07:49:46.196369 ME: CPU Replacement Valid : YES
1718 07:49:46.199487 ME: Current Working State : 5
1719 07:49:46.202737 ME: Current Operation State : 1
1720 07:49:46.206351 ME: Current Operation Mode : 0
1721 07:49:46.209984 ME: Error Code : 0
1722 07:49:46.212611 ME: CPU Debug Disabled : YES
1723 07:49:46.216530 ME: TXT Support : NO
1724 07:49:46.223093 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1725 07:49:46.229285 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 07:49:46.229761 CBFS @ c08000 size 3f8000
1727 07:49:46.235858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 07:49:46.239041 CBFS: Locating 'fallback/dsdt.aml'
1729 07:49:46.242295 CBFS: Found @ offset 10bb80 size 3fa5
1730 07:49:46.245985
1731 07:49:46.248811 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1732 07:49:46.252149 CBFS @ c08000 size 3f8000
1733 07:49:46.259122 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1734 07:49:46.259556 CBFS: Locating 'fallback/slic'
1735 07:49:46.262461
1736 07:49:46.265908 CBFS: 'fallback/slic' not found.
1737 07:49:46.269066 ACPI: Writing ACPI tables at 99b3e000.
1738 07:49:46.272431 ACPI: * FACS
1739 07:49:46.272862 ACPI: * DSDT
1740 07:49:46.275646 Ramoops buffer: 0x100000@0x99a3d000.
1741 07:49:46.282357 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 07:49:46.285406 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 07:49:46.288555 Google Chrome EC: version:
1744 07:49:46.291747 ro: helios_v2.0.2659-56403530b
1745 07:49:46.295512 rw: helios_v2.0.2849-c41de27e7d
1746 07:49:46.298413 running image: 1
1747 07:49:46.301846 ACPI: * FADT
1748 07:49:46.302398 SCI is IRQ9
1749 07:49:46.305558 ACPI: added table 1/32, length now 40
1750 07:49:46.308533 ACPI: * SSDT
1751 07:49:46.311769 Found 1 CPU(s) with 8 core(s) each.
1752 07:49:46.315142 Error: Could not locate 'wifi_sar' in VPD.
1753 07:49:46.318373 Checking CBFS for default SAR values
1754 07:49:46.322000
1755 07:49:46.324944 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1756 07:49:46.328168 CBFS @ c08000 size 3f8000
1757 07:49:46.334780 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1758 07:49:46.338073 CBFS: Locating 'wifi_sar_defaults.hex'
1759 07:49:46.341439 CBFS: Found @ offset 5fac0 size 77
1760 07:49:46.344774 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1761 07:49:46.348242 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1762 07:49:46.354789 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1763 07:49:46.361264 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1764 07:49:46.364731 failed to find key in VPD: dsm_calib_r0_0
1765 07:49:46.371352 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1766 07:49:46.374939
1767 07:49:46.378009 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1768 07:49:46.381237 failed to find key in VPD: dsm_calib_r0_1
1769 07:49:46.391085 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1770 07:49:46.397697 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1771 07:49:46.401111 failed to find key in VPD: dsm_calib_r0_2
1772 07:49:46.410985 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1773 07:49:46.414404 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1774 07:49:46.421215 failed to find key in VPD: dsm_calib_r0_3
1775 07:49:46.427822 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1776 07:49:46.434180 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1777 07:49:46.437377 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1778 07:49:46.440665 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1779 07:49:46.444586 EC returned error result code 1
1780 07:49:46.448233 EC returned error result code 1
1781 07:49:46.452179 EC returned error result code 1
1782 07:49:46.458958 PS2K: Bad resp from EC. Vivaldi disabled!
1783 07:49:46.462140 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1784 07:49:46.469418 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1785 07:49:46.475788 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1786 07:49:46.478740 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1787 07:49:46.485235 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1788 07:49:46.492099 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1789 07:49:46.495358 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1790 07:49:46.498425
1791 07:49:46.501925 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1792 07:49:46.505319 ACPI: added table 2/32, length now 44
1793 07:49:46.508947 ACPI: * MCFG
1794 07:49:46.511831 ACPI: added table 3/32, length now 48
1795 07:49:46.515366 ACPI: * TPM2
1796 07:49:46.515805 TPM2 log created at 99a2d000
1797 07:49:46.518791
1798 07:49:46.521907 ACPI: added table 4/32, length now 52
1799 07:49:46.522348 ACPI: * MADT
1800 07:49:46.525511 SCI is IRQ9
1801 07:49:46.528263 ACPI: added table 5/32, length now 56
1802 07:49:46.528702 current = 99b43ac0
1803 07:49:46.531696 ACPI: * DMAR
1804 07:49:46.535054 ACPI: added table 6/32, length now 60
1805 07:49:46.538365 ACPI: * IGD OpRegion
1806 07:49:46.538805 GMA: Found VBT in CBFS
1807 07:49:46.541614 GMA: Found valid VBT in CBFS
1808 07:49:46.545044 ACPI: added table 7/32, length now 64
1809 07:49:46.548358 ACPI: * HPET
1810 07:49:46.551693 ACPI: added table 8/32, length now 68
1811 07:49:46.552137 ACPI: done.
1812 07:49:46.555008 ACPI tables: 31744 bytes.
1813 07:49:46.558878 smbios_write_tables: 99a2c000
1814 07:49:46.561825 EC returned error result code 3
1815 07:49:46.565241 Couldn't obtain OEM name from CBI
1816 07:49:46.568602 Create SMBIOS type 17
1817 07:49:46.572109 PCI: 00:00.0 (Intel Cannonlake)
1818 07:49:46.575488 PCI: 00:14.3 (Intel WiFi)
1819 07:49:46.578637 SMBIOS tables: 939 bytes.
1820 07:49:46.581913 Writing table forward entry at 0x00000500
1821 07:49:46.588408 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1822 07:49:46.591848 Writing coreboot table at 0x99b62000
1823 07:49:46.598448 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1824 07:49:46.601933 1. 0000000000001000-000000000009ffff: RAM
1825 07:49:46.605120 2. 00000000000a0000-00000000000fffff: RESERVED
1826 07:49:46.611419 3. 0000000000100000-0000000099a2bfff: RAM
1827 07:49:46.614635 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1828 07:49:46.621400 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1829 07:49:46.628018 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1830 07:49:46.631071 7. 000000009a000000-000000009f7fffff: RESERVED
1831 07:49:46.638030 8. 00000000e0000000-00000000efffffff: RESERVED
1832 07:49:46.641229 9. 00000000fc000000-00000000fc000fff: RESERVED
1833 07:49:46.644604 10. 00000000fe000000-00000000fe00ffff: RESERVED
1834 07:49:46.650686 11. 00000000fed10000-00000000fed17fff: RESERVED
1835 07:49:46.653957 12. 00000000fed80000-00000000fed83fff: RESERVED
1836 07:49:46.660571 13. 00000000fed90000-00000000fed91fff: RESERVED
1837 07:49:46.663796 14. 00000000feda0000-00000000feda1fff: RESERVED
1838 07:49:46.666966 15. 0000000100000000-000000045e7fffff: RAM
1839 07:49:46.673785 Graphics framebuffer located at 0xc0000000
1840 07:49:46.677217 Passing 5 GPIOs to payload:
1841 07:49:46.680398 NAME | PORT | POLARITY | VALUE
1842 07:49:46.687096 write protect | undefined | high | low
1843 07:49:46.690617 lid | undefined | high | high
1844 07:49:46.697236 power | undefined | high | low
1845 07:49:46.704010 oprom | undefined | high | low
1846 07:49:46.707296 EC in RW | 0x000000cb | high | low
1847 07:49:46.710738 Board ID: 4
1848 07:49:46.713807 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1849 07:49:46.716860 CBFS @ c08000 size 3f8000
1850 07:49:46.723717 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1851 07:49:46.726834 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1852 07:49:46.730173 coreboot table: 1492 bytes.
1853 07:49:46.733826 IMD ROOT 0. 99fff000 00001000
1854 07:49:46.737096 IMD SMALL 1. 99ffe000 00001000
1855 07:49:46.739930 FSP MEMORY 2. 99c4e000 003b0000
1856 07:49:46.743339 CONSOLE 3. 99c2e000 00020000
1857 07:49:46.746845 FMAP 4. 99c2d000 0000054e
1858 07:49:46.750149 TIME STAMP 5. 99c2c000 00000910
1859 07:49:46.753377 VBOOT WORK 6. 99c18000 00014000
1860 07:49:46.756466 MRC DATA 7. 99c16000 00001958
1861 07:49:46.759822 ROMSTG STCK 8. 99c15000 00001000
1862 07:49:46.763666 AFTER CAR 9. 99c0b000 0000a000
1863 07:49:46.766672 RAMSTAGE 10. 99baf000 0005c000
1864 07:49:46.770291 REFCODE 11. 99b7a000 00035000
1865 07:49:46.773644 SMM BACKUP 12. 99b6a000 00010000
1866 07:49:46.776854 COREBOOT 13. 99b62000 00008000
1867 07:49:46.780048 ACPI 14. 99b3e000 00024000
1868 07:49:46.783456 ACPI GNVS 15. 99b3d000 00001000
1869 07:49:46.786733 RAMOOPS 16. 99a3d000 00100000
1870 07:49:46.790016 TPM2 TCGLOG17. 99a2d000 00010000
1871 07:49:46.793235 SMBIOS 18. 99a2c000 00000800
1872 07:49:46.796596 IMD small region:
1873 07:49:46.799623 IMD ROOT 0. 99ffec00 00000400
1874 07:49:46.802855 FSP RUNTIME 1. 99ffebe0 00000004
1875 07:49:46.806749 EC HOSTEVENT 2. 99ffebc0 00000008
1876 07:49:46.810104 POWER STATE 3. 99ffeb80 00000040
1877 07:49:46.813350 ROMSTAGE 4. 99ffeb60 00000004
1878 07:49:46.816501 MEM INFO 5. 99ffe9a0 000001b9
1879 07:49:46.819730 VPD 6. 99ffe920 0000006c
1880 07:49:46.823042 MTRR: Physical address space:
1881 07:49:46.829514 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1882 07:49:46.836252 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1883 07:49:46.842924 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1884 07:49:46.849234 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1885 07:49:46.856045 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1886 07:49:46.862787 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1887 07:49:46.866136 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1888 07:49:46.869547
1889 07:49:46.872343 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 07:49:46.875918 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 07:49:46.879164 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 07:49:46.882783 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 07:49:46.888860 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 07:49:46.892478 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 07:49:46.895809 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 07:49:46.899162 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 07:49:46.905905 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 07:49:46.908819 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 07:49:46.912237 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 07:49:46.915643 call enable_fixed_mtrr()
1901 07:49:46.919115 CPU physical address size: 39 bits
1902 07:49:46.922183 MTRR: default type WB/UC MTRR counts: 6/8.
1903 07:49:46.925457
1904 07:49:46.928961 MTRR: WB selected as default type.
1905 07:49:46.932123 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1906 07:49:46.938941 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1907 07:49:46.945054 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1908 07:49:46.951740 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1909 07:49:46.958443 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1910 07:49:46.964756 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1911 07:49:46.968243 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 07:49:46.974778 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 07:49:46.978118 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 07:49:46.981324 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 07:49:46.984648 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 07:49:46.991221 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 07:49:46.994806 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 07:49:46.998156 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 07:49:47.001207 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 07:49:47.007910 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 07:49:47.011311 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 07:49:47.011394
1923 07:49:47.011460 MTRR check
1924 07:49:47.014680 Fixed MTRRs : Enabled
1925 07:49:47.017871 Variable MTRRs: Enabled
1926 07:49:47.017955
1927 07:49:47.021220 call enable_fixed_mtrr()
1928 07:49:47.024233 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1929 07:49:47.027400 CPU physical address size: 39 bits
1930 07:49:47.034355 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1931 07:49:47.038234 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 07:49:47.041130 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 07:49:47.047658 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 07:49:47.051250 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 07:49:47.054509 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 07:49:47.057708 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 07:49:47.060848 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 07:49:47.064221
1939 07:49:47.067565 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 07:49:47.071082 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 07:49:47.074132 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 07:49:47.077409 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 07:49:47.084149 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 07:49:47.087538 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 07:49:47.091053 call enable_fixed_mtrr()
1946 07:49:47.094303 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 07:49:47.097456 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 07:49:47.100859 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 07:49:47.103985
1950 07:49:47.107417 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 07:49:47.110552 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 07:49:47.114028 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 07:49:47.117518 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 07:49:47.123729 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 07:49:47.127075 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 07:49:47.130689 CPU physical address size: 39 bits
1957 07:49:47.133576 call enable_fixed_mtrr()
1958 07:49:47.137318 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 07:49:47.140586 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 07:49:47.147302 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 07:49:47.150576 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 07:49:47.153640 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 07:49:47.156917 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 07:49:47.163731 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 07:49:47.167017 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 07:49:47.170558 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 07:49:47.173499 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 07:49:47.179953 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 07:49:47.183699 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 07:49:47.186878 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 07:49:47.189799 call enable_fixed_mtrr()
1972 07:49:47.193319 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 07:49:47.196903 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 07:49:47.203106 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 07:49:47.206609 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 07:49:47.210082 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 07:49:47.213048 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 07:49:47.219642 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 07:49:47.223167 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 07:49:47.226853 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 07:49:47.229699 CPU physical address size: 39 bits
1982 07:49:47.232870 call enable_fixed_mtrr()
1983 07:49:47.236164 CPU physical address size: 39 bits
1984 07:49:47.239759 CBFS @ c08000 size 3f8000
1985 07:49:47.246405 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1986 07:49:47.249463 CBFS: Locating 'fallback/payload'
1987 07:49:47.252704 CPU physical address size: 39 bits
1988 07:49:47.255842 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 07:49:47.259472 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 07:49:47.262657 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 07:49:47.269256 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 07:49:47.272266 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 07:49:47.275809 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 07:49:47.279015 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 07:49:47.285585 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 07:49:47.289112 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 07:49:47.292156 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 07:49:47.295410 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 07:49:47.302182 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 07:49:47.302262 call enable_fixed_mtrr()
2001 07:49:47.308538 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 07:49:47.312116 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 07:49:47.315269 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 07:49:47.318590 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 07:49:47.325217 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 07:49:47.328320 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 07:49:47.331632 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 07:49:47.335649 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 07:49:47.342036 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 07:49:47.344858 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 07:49:47.348160 CPU physical address size: 39 bits
2012 07:49:47.351506 call enable_fixed_mtrr()
2013 07:49:47.354984 CBFS: Found @ offset 1c96c0 size 3f798
2014 07:49:47.358322 CPU physical address size: 39 bits
2015 07:49:47.361535 Checking segment from ROM address 0xffdd16f8
2016 07:49:47.364899
2017 07:49:47.368112 Checking segment from ROM address 0xffdd1714
2018 07:49:47.371542 Loading segment from ROM address 0xffdd16f8
2019 07:49:47.375026 code (compression=0)
2020 07:49:47.381470 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2021 07:49:47.391140 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2022 07:49:47.394565 it's not compressed!
2023 07:49:47.485995 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2024 07:49:47.492945 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2025 07:49:47.495551 Loading segment from ROM address 0xffdd1714
2026 07:49:47.498799 Entry Point 0x30000000
2027 07:49:47.502204 Loaded segments
2028 07:49:47.507865 Finalizing chipset.
2029 07:49:47.511476 Finalizing SMM.
2030 07:49:47.514607 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2031 07:49:47.517681 mp_park_aps done after 0 msecs.
2032 07:49:47.524718 Jumping to boot code at 30000000(99b62000)
2033 07:49:47.531103 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2034 07:49:47.531188
2035 07:49:47.531255
2036 07:49:47.531317
2037 07:49:47.534639 Starting depthcharge on Helios...
2038 07:49:47.534723
2039 07:49:47.535070 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2040 07:49:47.535172 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2041 07:49:47.535256 Setting prompt string to ['hatch:']
2042 07:49:47.535336 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2043 07:49:47.544148 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2044 07:49:47.544237
2045 07:49:47.551124 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2046 07:49:47.551217
2047 07:49:47.557706 board_setup: Info: eMMC controller not present; skipping
2048 07:49:47.557792
2049 07:49:47.560939 New NVMe Controller 0x30053ac0 @ 00:1d:00
2050 07:49:47.561025
2051 07:49:47.567588 board_setup: Info: SDHCI controller not present; skipping
2052 07:49:47.567674
2053 07:49:47.573822 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2054 07:49:47.573907
2055 07:49:47.573975 Wipe memory regions:
2056 07:49:47.574038
2057 07:49:47.577593 [0x00000000001000, 0x000000000a0000)
2058 07:49:47.577678
2059 07:49:47.580857 [0x00000000100000, 0x00000030000000)
2060 07:49:47.584087
2061 07:49:47.650420 [0x00000030657430, 0x00000099a2c000)
2062 07:49:47.650525
2063 07:49:47.790578 [0x00000100000000, 0x0000045e800000)
2064 07:49:47.790717
2065 07:49:49.173223 R8152: Initializing
2066 07:49:49.173765
2067 07:49:49.176372 Version 9 (ocp_data = 6010)
2068 07:49:49.176704
2069 07:49:49.180417 R8152: Done initializing
2070 07:49:49.180494
2071 07:49:49.183530 Adding net device
2072 07:49:49.183612
2073 07:49:49.793691 R8152: Initializing
2074 07:49:49.794209
2075 07:49:49.797223 Version 6 (ocp_data = 5c30)
2076 07:49:49.797682
2077 07:49:49.799862 R8152: Done initializing
2078 07:49:49.799960
2079 07:49:49.803005 net_add_device: Attemp to include the same device
2080 07:49:49.806871
2081 07:49:49.814132 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2082 07:49:49.814229
2083 07:49:49.814303
2084 07:49:49.814373
2085 07:49:49.814665 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2087 07:49:49.915710 hatch: tftpboot 192.168.201.1 8119396/tftp-deploy-tn17_19n/kernel/bzImage 8119396/tftp-deploy-tn17_19n/kernel/cmdline 8119396/tftp-deploy-tn17_19n/ramdisk/ramdisk.cpio.gz
2088 07:49:49.916364 Setting prompt string to 'Starting kernel'
2089 07:49:49.916761 Setting prompt string to ['Starting kernel']
2090 07:49:49.917129 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2091 07:49:49.917589 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2092 07:49:49.920959 tftpboot 192.168.201.1 8119396/tftp-deploy-tn17_19n/kernel/bzImaoy-tn17_19n/kernel/cmdline 8119396/tftp-deploy-tn17_19n/ramdisk/ramdisk.cpio.gz
2093 07:49:49.921038
2094 07:49:49.921103 Waiting for link
2095 07:49:49.921163
2096 07:49:50.121424 done.
2097 07:49:50.121582
2098 07:49:50.121653 MAC: 00:24:32:50:1a:5f
2099 07:49:50.121716
2100 07:49:50.124922 Sending DHCP discover... done.
2101 07:49:50.125008
2102 07:49:50.127938 Waiting for reply... done.
2103 07:49:50.128023
2104 07:49:50.131255 Sending DHCP request... done.
2105 07:49:50.131340
2106 07:49:50.134660 Waiting for reply... done.
2107 07:49:50.134770
2108 07:49:50.137957 My ip is 192.168.201.21
2109 07:49:50.138041
2110 07:49:50.141364 The DHCP server ip is 192.168.201.1
2111 07:49:50.141466
2112 07:49:50.148223 TFTP server IP predefined by user: 192.168.201.1
2113 07:49:50.148326
2114 07:49:50.154802 Bootfile predefined by user: 8119396/tftp-deploy-tn17_19n/kernel/bzImage
2115 07:49:50.154888
2116 07:49:50.158157 Sending tftp read request... done.
2117 07:49:50.158274
2118 07:49:50.160904 Waiting for the transfer...
2119 07:49:50.160987
2120 07:49:50.687023 00000000 ################################################################
2121 07:49:50.687174
2122 07:49:51.245154 00080000 ################################################################
2123 07:49:51.245315
2124 07:49:51.798407 00100000 ################################################################
2125 07:49:51.798560
2126 07:49:52.314625 00180000 ################################################################
2127 07:49:52.314781
2128 07:49:52.826841 00200000 ################################################################
2129 07:49:52.826980
2130 07:49:53.344314 00280000 ################################################################
2131 07:49:53.344500
2132 07:49:53.863466 00300000 ################################################################
2133 07:49:53.863612
2134 07:49:54.383394 00380000 ################################################################
2135 07:49:54.383545
2136 07:49:54.898392 00400000 ################################################################
2137 07:49:54.898532
2138 07:49:55.441239 00480000 ################################################################
2139 07:49:55.441384
2140 07:49:56.016057 00500000 ################################################################
2141 07:49:56.016197
2142 07:49:56.604174 00580000 ################################################################
2143 07:49:56.604308
2144 07:49:57.188631 00600000 ################################################################
2145 07:49:57.188780
2146 07:49:57.541088 00680000 ####################################### done.
2147 07:49:57.541228
2148 07:49:57.544270 The bootfile was 7131024 bytes long.
2149 07:49:57.544351
2150 07:49:57.547609 Sending tftp read request... done.
2151 07:49:57.547684
2152 07:49:57.550533 Waiting for the transfer...
2153 07:49:57.550608
2154 07:49:58.081696 00000000 ################################################################
2155 07:49:58.081834
2156 07:49:58.608776 00080000 ################################################################
2157 07:49:58.608911
2158 07:49:59.131413 00100000 ################################################################
2159 07:49:59.131551
2160 07:49:59.661448 00180000 ################################################################
2161 07:49:59.661630
2162 07:50:00.197186 00200000 ################################################################
2163 07:50:00.197322
2164 07:50:00.729569 00280000 ################################################################
2165 07:50:00.729707
2166 07:50:01.242872 00300000 ################################################################
2167 07:50:01.243015
2168 07:50:01.769338 00380000 ################################################################
2169 07:50:01.769526
2170 07:50:02.285092 00400000 ################################################################
2171 07:50:02.285252
2172 07:50:02.815621 00480000 ################################################################
2173 07:50:02.815777
2174 07:50:03.080115 00500000 ################################ done.
2175 07:50:03.080264
2176 07:50:03.083329 Sending tftp read request... done.
2177 07:50:03.083409
2178 07:50:03.086990 Waiting for the transfer...
2179 07:50:03.087076
2180 07:50:03.087143 00000000 # done.
2181 07:50:03.087207
2182 07:50:03.096638 Command line loaded dynamically from TFTP file: 8119396/tftp-deploy-tn17_19n/kernel/cmdline
2183 07:50:03.096726
2184 07:50:03.123260 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8119396/extract-nfsrootfs-xx87b2w6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2185 07:50:03.123355
2186 07:50:03.129976 ec_init(0): CrosEC protocol v3 supported (256, 256)
2187 07:50:03.130064
2188 07:50:03.136470 Shutting down all USB controllers.
2189 07:50:03.136558
2190 07:50:03.136643 Removing current net device
2191 07:50:03.136724
2192 07:50:03.144497 Finalizing coreboot
2193 07:50:03.144585
2194 07:50:03.150806 Exiting depthcharge with code 4 at timestamp: 22923084
2195 07:50:03.150894
2196 07:50:03.150979
2197 07:50:03.151060 Starting kernel ...
2198 07:50:03.151139
2199 07:50:03.151215
2200 07:50:03.151599 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2201 07:50:03.151711 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2202 07:50:03.151796 Setting prompt string to ['Linux version [0-9]']
2203 07:50:03.151884 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2204 07:50:03.151969 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2205 07:50:03.154010
2206 07:50:03.154097
2208 07:54:29.152812 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2210 07:54:29.154661 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2212 07:54:29.156064 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2215 07:54:29.157109 end: 2 depthcharge-action (duration 00:05:00) [common]
2217 07:54:29.157347 Cleaning after the job
2218 07:54:29.157449 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/ramdisk
2219 07:54:29.158053 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/kernel
2220 07:54:29.158551 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/nfsrootfs
2221 07:54:29.209851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8119396/tftp-deploy-tn17_19n/modules
2222 07:54:29.210158 start: 4.1 power-off (timeout 00:00:30) [common]
2223 07:54:29.210321 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2224 07:54:29.229573 >> Command sent successfully.
2225 07:54:29.231487 Returned 0 in 0 seconds
2226 07:54:29.332732 end: 4.1 power-off (duration 00:00:00) [common]
2228 07:54:29.334361 start: 4.2 read-feedback (timeout 00:10:00) [common]
2229 07:54:29.335607 Listened to connection for namespace 'common' for up to 1s
2230 07:54:30.294211 Listened to connection for namespace 'common' for up to 1s
2231 07:54:30.298007 Listened to connection for namespace 'common' for up to 1s
2232 07:54:30.300809 Listened to connection for namespace 'common' for up to 1s
2233 07:54:30.304492 Listened to connection for namespace 'common' for up to 1s
2234 07:54:30.307587 Listened to connection for namespace 'common' for up to 1s
2235 07:54:30.310902 Listened to connection for namespace 'common' for up to 1s
2236 07:54:30.314079 Listened to connection for namespace 'common' for up to 1s
2237 07:54:30.317802 Listened to connection for namespace 'common' for up to 1s
2238 07:54:30.321300 Listened to connection for namespace 'common' for up to 1s
2239 07:54:30.324402 Listened to connection for namespace 'common' for up to 1s
2240 07:54:30.327688 Listened to connection for namespace 'common' for up to 1s
2241 07:54:30.331058 Listened to connection for namespace 'common' for up to 1s
2242 07:54:30.334155 Listened to connection for namespace 'common' for up to 1s
2243 07:54:30.335091 Finalising connection for namespace 'common'
2244 07:54:30.335309 Disconnecting from shell: Finalise
2245 07:54:30.335448
2246 07:54:30.436597 end: 4.2 read-feedback (duration 00:00:01) [common]
2247 07:54:30.437207 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8119396
2248 07:54:30.629758 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8119396
2249 07:54:30.629965 JobError: Your job cannot terminate cleanly.