Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:40:03.018244 lava-dispatcher, installed at version: 2022.06
2 15:40:03.018433 start: 0 validate
3 15:40:03.018569 Start time: 2022-09-30 15:40:03.018562+00:00 (UTC)
4 15:40:03.018706 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:40:03.018837 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220919.0%2Fx86%2Frootfs.cpio.gz exists
6 15:40:03.021297 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:40:03.021418 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:40:03.022639 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:40:03.022752 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:40:03.025334 validate duration: 0.01
12 15:40:03.025569 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:40:03.025675 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:40:03.025774 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:40:03.025872 Not decompressing ramdisk as can be used compressed.
16 15:40:03.025955 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220919.0/x86/rootfs.cpio.gz
17 15:40:03.026027 saving as /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/ramdisk/rootfs.cpio.gz
18 15:40:03.026090 total size: 8415689 (8MB)
19 15:40:03.027775 progress 0% (0MB)
20 15:40:03.031941 progress 5% (0MB)
21 15:40:03.036584 progress 10% (0MB)
22 15:40:03.041259 progress 15% (1MB)
23 15:40:03.045396 progress 20% (1MB)
24 15:40:03.049466 progress 25% (2MB)
25 15:40:03.054122 progress 30% (2MB)
26 15:40:03.058100 progress 35% (2MB)
27 15:40:03.062597 progress 40% (3MB)
28 15:40:03.066755 progress 45% (3MB)
29 15:40:03.071590 progress 50% (4MB)
30 15:40:03.076381 progress 55% (4MB)
31 15:40:03.080575 progress 60% (4MB)
32 15:40:03.084473 progress 65% (5MB)
33 15:40:03.088839 progress 70% (5MB)
34 15:40:03.093240 progress 75% (6MB)
35 15:40:03.097328 progress 80% (6MB)
36 15:40:03.102233 progress 85% (6MB)
37 15:40:03.106511 progress 90% (7MB)
38 15:40:03.110555 progress 95% (7MB)
39 15:40:03.114740 progress 100% (8MB)
40 15:40:03.115050 8MB downloaded in 0.09s (90.22MB/s)
41 15:40:03.115212 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:40:03.115503 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:40:03.115643 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:40:03.115741 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:40:03.115850 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:40:03.115921 saving as /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/kernel/bzImage
48 15:40:03.115985 total size: 7126928 (6MB)
49 15:40:03.116048 No compression specified
50 15:40:03.118045 progress 0% (0MB)
51 15:40:03.121959 progress 5% (0MB)
52 15:40:03.126131 progress 10% (0MB)
53 15:40:03.129016 progress 15% (1MB)
54 15:40:03.133042 progress 20% (1MB)
55 15:40:03.136839 progress 25% (1MB)
56 15:40:03.140140 progress 30% (2MB)
57 15:40:03.144151 progress 35% (2MB)
58 15:40:03.147340 progress 40% (2MB)
59 15:40:03.151045 progress 45% (3MB)
60 15:40:03.155214 progress 50% (3MB)
61 15:40:03.158552 progress 55% (3MB)
62 15:40:03.162471 progress 60% (4MB)
63 15:40:03.166424 progress 65% (4MB)
64 15:40:03.170070 progress 70% (4MB)
65 15:40:03.174081 progress 75% (5MB)
66 15:40:03.177209 progress 80% (5MB)
67 15:40:03.180615 progress 85% (5MB)
68 15:40:03.184562 progress 90% (6MB)
69 15:40:03.188910 progress 95% (6MB)
70 15:40:03.191977 progress 100% (6MB)
71 15:40:03.192203 6MB downloaded in 0.08s (89.18MB/s)
72 15:40:03.192354 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:40:03.192595 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:40:03.192686 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:40:03.192809 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:40:03.192917 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:40:03.192985 saving as /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/modules/modules.tar
79 15:40:03.193048 total size: 51896 (0MB)
80 15:40:03.193110 Using unxz to decompress xz
81 15:40:03.197184 progress 63% (0MB)
82 15:40:03.197550 progress 100% (0MB)
83 15:40:03.200778 0MB downloaded in 0.01s (6.41MB/s)
84 15:40:03.201004 end: 1.3.1 http-download (duration 00:00:00) [common]
86 15:40:03.201264 end: 1.3 download-retry (duration 00:00:00) [common]
87 15:40:03.201362 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 15:40:03.201459 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 15:40:03.201546 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 15:40:03.201637 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 15:40:03.201799 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou
92 15:40:03.201909 makedir: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin
93 15:40:03.201994 makedir: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/tests
94 15:40:03.202074 makedir: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/results
95 15:40:03.202180 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-add-keys
96 15:40:03.202310 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-add-sources
97 15:40:03.202426 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-background-process-start
98 15:40:03.202543 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-background-process-stop
99 15:40:03.202656 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-common-functions
100 15:40:03.202765 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-echo-ipv4
101 15:40:03.202879 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-install-packages
102 15:40:03.202990 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-installed-packages
103 15:40:03.203098 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-os-build
104 15:40:03.203209 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-probe-channel
105 15:40:03.203320 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-probe-ip
106 15:40:03.203429 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-target-ip
107 15:40:03.203540 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-target-mac
108 15:40:03.203649 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-target-storage
109 15:40:03.203761 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-case
110 15:40:03.203870 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-event
111 15:40:03.203980 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-feedback
112 15:40:03.204093 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-raise
113 15:40:03.204206 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-reference
114 15:40:03.204315 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-runner
115 15:40:03.204423 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-set
116 15:40:03.204536 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-test-shell
117 15:40:03.204648 Updating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-install-packages (oe)
118 15:40:03.204806 Updating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/bin/lava-installed-packages (oe)
119 15:40:03.204910 Creating /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/environment
120 15:40:03.205001 LAVA metadata
121 15:40:03.205072 - LAVA_JOB_ID=7463436
122 15:40:03.205139 - LAVA_DISPATCHER_IP=192.168.201.1
123 15:40:03.205245 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 15:40:03.205313 skipped lava-vland-overlay
125 15:40:03.205391 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 15:40:03.205476 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 15:40:03.205541 skipped lava-multinode-overlay
128 15:40:03.205617 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 15:40:03.205700 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 15:40:03.205777 Loading test definitions
131 15:40:03.205875 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 15:40:03.205953 Using /lava-7463436 at stage 0
133 15:40:03.206217 uuid=7463436_1.4.2.3.1 testdef=None
134 15:40:03.206310 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 15:40:03.206403 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 15:40:03.206889 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 15:40:03.207119 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 15:40:03.207701 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 15:40:03.207944 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 15:40:03.208626 runner path: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/0/tests/0_dmesg test_uuid 7463436_1.4.2.3.1
143 15:40:03.208819 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 15:40:03.209059 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 15:40:03.209136 Using /lava-7463436 at stage 1
147 15:40:03.209382 uuid=7463436_1.4.2.3.5 testdef=None
148 15:40:03.209474 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 15:40:03.209571 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 15:40:03.210027 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 15:40:03.210257 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 15:40:03.210835 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 15:40:03.211078 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 15:40:03.211643 runner path: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/1/tests/1_bootrr test_uuid 7463436_1.4.2.3.5
157 15:40:03.211793 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 15:40:03.212009 Creating lava-test-runner.conf files
160 15:40:03.212074 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/0 for stage 0
161 15:40:03.212157 - 0_dmesg
162 15:40:03.212232 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463436/lava-overlay-ln1xfaou/lava-7463436/1 for stage 1
163 15:40:03.212315 - 1_bootrr
164 15:40:03.212406 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 15:40:03.212496 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 15:40:03.218611 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 15:40:03.218718 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 15:40:03.218810 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 15:40:03.218899 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 15:40:03.218986 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 15:40:03.418815 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 15:40:03.419163 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 15:40:03.419281 extracting modules file /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463436/extract-overlay-ramdisk-zv6xztfu/ramdisk
174 15:40:03.424047 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 15:40:03.424209 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 15:40:03.424323 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463436/compress-overlay-4g0fyzlt/overlay-1.4.2.4.tar.gz to ramdisk
177 15:40:03.424402 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463436/compress-overlay-4g0fyzlt/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463436/extract-overlay-ramdisk-zv6xztfu/ramdisk
178 15:40:03.428758 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 15:40:03.428896 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 15:40:03.428996 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 15:40:03.429099 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 15:40:03.429187 Building ramdisk /var/lib/lava/dispatcher/tmp/7463436/extract-overlay-ramdisk-zv6xztfu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463436/extract-overlay-ramdisk-zv6xztfu/ramdisk
183 15:40:03.493953 >> 48008 blocks
184 15:40:04.262657 rename /var/lib/lava/dispatcher/tmp/7463436/extract-overlay-ramdisk-zv6xztfu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/ramdisk/ramdisk.cpio.gz
185 15:40:04.263150 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 15:40:04.263335 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 15:40:04.263481 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 15:40:04.263585 No mkimage arch provided, not using FIT.
189 15:40:04.263690 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 15:40:04.263786 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 15:40:04.263894 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 15:40:04.264003 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 15:40:04.264086 No LXC device requested
194 15:40:04.264179 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 15:40:04.264276 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 15:40:04.264372 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 15:40:04.264461 Checking files for TFTP limit of 4294967296 bytes.
198 15:40:04.264871 end: 1 tftp-deploy (duration 00:00:01) [common]
199 15:40:04.264985 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 15:40:04.265103 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 15:40:04.265280 substitutions:
202 15:40:04.265394 - {DTB}: None
203 15:40:04.265493 - {INITRD}: 7463436/tftp-deploy-vdo0h6sq/ramdisk/ramdisk.cpio.gz
204 15:40:04.265594 - {KERNEL}: 7463436/tftp-deploy-vdo0h6sq/kernel/bzImage
205 15:40:04.265696 - {LAVA_MAC}: None
206 15:40:04.265788 - {PRESEED_CONFIG}: None
207 15:40:04.265886 - {PRESEED_LOCAL}: None
208 15:40:04.265982 - {RAMDISK}: 7463436/tftp-deploy-vdo0h6sq/ramdisk/ramdisk.cpio.gz
209 15:40:04.266071 - {ROOT_PART}: None
210 15:40:04.266166 - {ROOT}: None
211 15:40:04.266233 - {SERVER_IP}: 192.168.201.1
212 15:40:04.266294 - {TEE}: None
213 15:40:04.266362 Parsed boot commands:
214 15:40:04.266422 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 15:40:04.266592 Parsed boot commands: tftpboot 192.168.201.1 7463436/tftp-deploy-vdo0h6sq/kernel/bzImage 7463436/tftp-deploy-vdo0h6sq/kernel/cmdline 7463436/tftp-deploy-vdo0h6sq/ramdisk/ramdisk.cpio.gz
216 15:40:04.266691 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 15:40:04.266796 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 15:40:04.266911 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 15:40:04.267008 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 15:40:04.267085 Not connected, no need to disconnect.
221 15:40:04.267177 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 15:40:04.267268 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 15:40:04.267364 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
224 15:40:04.270211 Setting prompt string to ['lava-test: # ']
225 15:40:04.270582 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 15:40:04.270743 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 15:40:04.270891 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 15:40:04.271032 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 15:40:04.271317 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
230 15:40:04.292239 >> Command sent successfully.
231 15:40:04.294557 Returned 0 in 0 seconds
232 15:40:04.395361 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 15:40:04.395960 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 15:40:04.396070 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 15:40:04.396168 Setting prompt string to 'Starting depthcharge on Helios...'
237 15:40:04.396238 Changing prompt to 'Starting depthcharge on Helios...'
238 15:40:04.396308 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 15:40:04.396583 [Enter `^Ec?' for help]
240 15:40:11.424423
241 15:40:11.424718
242 15:40:11.434124 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 15:40:11.437553 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 15:40:11.443788 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 15:40:11.447359 CPU: AES supported, TXT NOT supported, VT supported
246 15:40:11.454041 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 15:40:11.460345 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 15:40:11.463844 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 15:40:11.466941 VBOOT: Loading verstage.
250 15:40:11.473682 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 15:40:11.476921 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 15:40:11.483467 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 15:40:11.486501 CBFS @ c08000 size 3f8000
254 15:40:11.490008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 15:40:11.493084 CBFS: Locating 'fallback/verstage'
256 15:40:11.499771 CBFS: Found @ offset 10fb80 size 1072c
257 15:40:11.499969
258 15:40:11.500084
259 15:40:11.509389 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 15:40:11.525397 Probing TPM: . done!
261 15:40:11.528753 TPM ready after 0 ms
262 15:40:11.531874 Connected to device vid:did:rid of 1ae0:0028:00
263 15:40:11.542099 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 15:40:11.545822 Initialized TPM device CR50 revision 0
265 15:40:11.591769 tlcl_send_startup: Startup return code is 0
266 15:40:11.591970 TPM: setup succeeded
267 15:40:11.604159 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 15:40:11.607781 Chrome EC: UHEPI supported
269 15:40:11.611419 Phase 1
270 15:40:11.614764 FMAP: area GBB found @ c05000 (12288 bytes)
271 15:40:11.621255 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 15:40:11.624437 Phase 2
273 15:40:11.624613 Phase 3
274 15:40:11.627466 FMAP: area GBB found @ c05000 (12288 bytes)
275 15:40:11.634013 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 15:40:11.640998 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 15:40:11.644158 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 15:40:11.650585 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 15:40:11.666560 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 15:40:11.669664 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 15:40:11.676343 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 15:40:11.680670 Phase 4
283 15:40:11.684347 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 15:40:11.690442 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 15:40:11.870075 VB2:vb2_rsa_verify_digest() Digest check failed!
286 15:40:11.876901 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 15:40:11.877103 Saving nvdata
288 15:40:11.880064 Reboot requested (10020007)
289 15:40:11.883206 board_reset() called!
290 15:40:11.883331 full_reset() called!
291 15:40:16.391449
292 15:40:16.391616
293 15:40:16.401151 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 15:40:16.404652 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 15:40:16.411113 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 15:40:16.414557 CPU: AES supported, TXT NOT supported, VT supported
297 15:40:16.421131 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 15:40:16.428163 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 15:40:16.431137 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 15:40:16.434589 VBOOT: Loading verstage.
301 15:40:16.440551 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 15:40:16.443986 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 15:40:16.450634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 15:40:16.453820 CBFS @ c08000 size 3f8000
305 15:40:16.457063 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 15:40:16.460496 CBFS: Locating 'fallback/verstage'
307 15:40:16.467070 CBFS: Found @ offset 10fb80 size 1072c
308 15:40:16.467161
309 15:40:16.467229
310 15:40:16.477073 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 15:40:16.492719 Probing TPM: . done!
312 15:40:16.496321 TPM ready after 0 ms
313 15:40:16.499497 Connected to device vid:did:rid of 1ae0:0028:00
314 15:40:16.509396 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 15:40:16.513144 Initialized TPM device CR50 revision 0
316 15:40:16.558790 tlcl_send_startup: Startup return code is 0
317 15:40:16.558931 TPM: setup succeeded
318 15:40:16.572550 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 15:40:16.576320 Chrome EC: UHEPI supported
320 15:40:16.579608 Phase 1
321 15:40:16.582826 FMAP: area GBB found @ c05000 (12288 bytes)
322 15:40:16.589545 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 15:40:16.596031 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 15:40:16.599099 Recovery requested (1009000e)
325 15:40:16.605291 Saving nvdata
326 15:40:16.611364 tlcl_extend: response is 0
327 15:40:16.619966 tlcl_extend: response is 0
328 15:40:16.627205 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 15:40:16.630263 CBFS @ c08000 size 3f8000
330 15:40:16.637032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 15:40:16.640204 CBFS: Locating 'fallback/romstage'
332 15:40:16.643417 CBFS: Found @ offset 80 size 145fc
333 15:40:16.647073 Accumulated console time in verstage 98 ms
334 15:40:16.647167
335 15:40:16.647239
336 15:40:16.659762 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 15:40:16.666628 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 15:40:16.669711 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 15:40:16.673108 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 15:40:16.679326 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 15:40:16.682808 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 15:40:16.686101 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 15:40:16.689393 TCO_STS: 0000 0000
344 15:40:16.692624 GEN_PMCON: e0015238 00000200
345 15:40:16.695971 GBLRST_CAUSE: 00000000 00000000
346 15:40:16.699054 prev_sleep_state 5
347 15:40:16.702941 Boot Count incremented to 32912
348 15:40:16.706223 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 15:40:16.708791 CBFS @ c08000 size 3f8000
350 15:40:16.715464 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 15:40:16.718634 CBFS: Locating 'fspm.bin'
352 15:40:16.722041 CBFS: Found @ offset 5ffc0 size 71000
353 15:40:16.725183 Chrome EC: UHEPI supported
354 15:40:16.732116 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 15:40:16.736621 Probing TPM: done!
356 15:40:16.743266 Connected to device vid:did:rid of 1ae0:0028:00
357 15:40:16.753058 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 15:40:16.760123 Initialized TPM device CR50 revision 0
359 15:40:16.769390 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 15:40:16.779263 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 15:40:16.779404 MRC cache found, size 1948
362 15:40:16.782651 bootmode is set to: 2
363 15:40:16.785768 PRMRR disabled by config.
364 15:40:16.789119 SPD INDEX = 1
365 15:40:16.792158 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 15:40:16.795905 CBFS @ c08000 size 3f8000
367 15:40:16.802092 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 15:40:16.802216 CBFS: Locating 'spd.bin'
369 15:40:16.805775 CBFS: Found @ offset 5fb80 size 400
370 15:40:16.809059 SPD: module type is LPDDR3
371 15:40:16.812514 SPD: module part is
372 15:40:16.818918 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 15:40:16.822132 SPD: device width 4 bits, bus width 8 bits
374 15:40:16.825346 SPD: module size is 4096 MB (per channel)
375 15:40:16.828956 memory slot: 0 configuration done.
376 15:40:16.832195 memory slot: 2 configuration done.
377 15:40:16.883906 CBMEM:
378 15:40:16.887030 IMD: root @ 99fff000 254 entries.
379 15:40:16.890600 IMD: root @ 99ffec00 62 entries.
380 15:40:16.893700 External stage cache:
381 15:40:16.897418 IMD: root @ 9abff000 254 entries.
382 15:40:16.900247 IMD: root @ 9abfec00 62 entries.
383 15:40:16.907095 Chrome EC: clear events_b mask to 0x0000000020004000
384 15:40:16.920781 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 15:40:16.936240 tlcl_write: response is 0
386 15:40:16.945230 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 15:40:16.951981 MRC: TPM MRC hash updated successfully.
388 15:40:16.952085 2 DIMMs found
389 15:40:16.955058 SMM Memory Map
390 15:40:16.958747 SMRAM : 0x9a000000 0x1000000
391 15:40:16.961837 Subregion 0: 0x9a000000 0xa00000
392 15:40:16.965043 Subregion 1: 0x9aa00000 0x200000
393 15:40:16.968551 Subregion 2: 0x9ac00000 0x400000
394 15:40:16.971695 top_of_ram = 0x9a000000
395 15:40:16.974744 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 15:40:16.981603 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 15:40:16.984600 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 15:40:16.991171 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 15:40:16.994771 CBFS @ c08000 size 3f8000
400 15:40:17.001315 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 15:40:17.004665 CBFS: Locating 'fallback/postcar'
402 15:40:17.007702 CBFS: Found @ offset 107000 size 4b44
403 15:40:17.014304 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 15:40:17.024025 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 15:40:17.027508 Processing 180 relocs. Offset value of 0x97c0c000
406 15:40:17.035408 Accumulated console time in romstage 286 ms
407 15:40:17.035513
408 15:40:17.035586
409 15:40:17.045341 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 15:40:17.051960 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 15:40:17.055098 CBFS @ c08000 size 3f8000
412 15:40:17.061941 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 15:40:17.065177 CBFS: Locating 'fallback/ramstage'
414 15:40:17.068615 CBFS: Found @ offset 43380 size 1b9e8
415 15:40:17.075276 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 15:40:17.107682 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 15:40:17.110812 Processing 3976 relocs. Offset value of 0x98db0000
418 15:40:17.117857 Accumulated console time in postcar 52 ms
419 15:40:17.117953
420 15:40:17.118025
421 15:40:17.127601 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 15:40:17.133836 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 15:40:17.137515 WARNING: RO_VPD is uninitialized or empty.
424 15:40:17.140519 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 15:40:17.147170 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 15:40:17.147293 Normal boot.
427 15:40:17.153566 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 15:40:17.157150 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 15:40:17.160216 CBFS @ c08000 size 3f8000
430 15:40:17.166937 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 15:40:17.170353 CBFS: Locating 'cpu_microcode_blob.bin'
432 15:40:17.173461 CBFS: Found @ offset 14700 size 2ec00
433 15:40:17.176817 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 15:40:17.180046 Skip microcode update
435 15:40:17.186968 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 15:40:17.187083 CBFS @ c08000 size 3f8000
437 15:40:17.193371 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 15:40:17.196570 CBFS: Locating 'fsps.bin'
439 15:40:17.199582 CBFS: Found @ offset d1fc0 size 35000
440 15:40:17.226196 Detected 4 core, 8 thread CPU.
441 15:40:17.229252 Setting up SMI for CPU
442 15:40:17.232378 IED base = 0x9ac00000
443 15:40:17.235709 IED size = 0x00400000
444 15:40:17.235819 Will perform SMM setup.
445 15:40:17.242364 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 15:40:17.248660 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 15:40:17.255382 Processing 16 relocs. Offset value of 0x00030000
448 15:40:17.255490 Attempting to start 7 APs
449 15:40:17.261995 Waiting for 10ms after sending INIT.
450 15:40:17.275584 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
451 15:40:17.275694 done.
452 15:40:17.278828 AP: slot 3 apic_id 2.
453 15:40:17.282015 AP: slot 1 apic_id 3.
454 15:40:17.282096 AP: slot 4 apic_id 5.
455 15:40:17.285393 AP: slot 5 apic_id 4.
456 15:40:17.288593 AP: slot 7 apic_id 6.
457 15:40:17.288682 AP: slot 6 apic_id 7.
458 15:40:17.295091 Waiting for 2nd SIPI to complete...done.
459 15:40:17.301710 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 15:40:17.308491 Processing 13 relocs. Offset value of 0x00038000
461 15:40:17.314987 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 15:40:17.318507 Installing SMM handler to 0x9a000000
463 15:40:17.324675 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 15:40:17.331568 Processing 658 relocs. Offset value of 0x9a010000
465 15:40:17.338037 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 15:40:17.341331 Processing 13 relocs. Offset value of 0x9a008000
467 15:40:17.348078 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 15:40:17.354378 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 15:40:17.360950 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 15:40:17.364502 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 15:40:17.371303 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 15:40:17.377634 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 15:40:17.384506 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 15:40:17.390908 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 15:40:17.393948 Clearing SMI status registers
476 15:40:17.394041 SMI_STS: PM1
477 15:40:17.397617 PM1_STS: PWRBTN
478 15:40:17.397703 TCO_STS: SECOND_TO
479 15:40:17.400547 New SMBASE 0x9a000000
480 15:40:17.404133 In relocation handler: CPU 0
481 15:40:17.407161 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 15:40:17.413907 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 15:40:17.414004 Relocation complete.
484 15:40:17.417046 New SMBASE 0x99fff800
485 15:40:17.420485 In relocation handler: CPU 2
486 15:40:17.423980 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 15:40:17.430047 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 15:40:17.430140 Relocation complete.
489 15:40:17.433770 New SMBASE 0x99fffc00
490 15:40:17.436658 In relocation handler: CPU 1
491 15:40:17.440108 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
492 15:40:17.446844 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 15:40:17.446946 Relocation complete.
494 15:40:17.450241 New SMBASE 0x99fff400
495 15:40:17.453496 In relocation handler: CPU 3
496 15:40:17.456433 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
497 15:40:17.459908 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 15:40:17.463006 Relocation complete.
499 15:40:17.466570 New SMBASE 0x99ffe800
500 15:40:17.469598 In relocation handler: CPU 6
501 15:40:17.473133 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
502 15:40:17.476358 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 15:40:17.479350 Relocation complete.
504 15:40:17.483180 New SMBASE 0x99ffe400
505 15:40:17.486446 In relocation handler: CPU 7
506 15:40:17.489689 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
507 15:40:17.492663 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 15:40:17.495826 Relocation complete.
509 15:40:17.499260 New SMBASE 0x99ffec00
510 15:40:17.502360 In relocation handler: CPU 5
511 15:40:17.505978 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
512 15:40:17.508957 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 15:40:17.512463 Relocation complete.
514 15:40:17.515736 New SMBASE 0x99fff000
515 15:40:17.518857 In relocation handler: CPU 4
516 15:40:17.521941 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
517 15:40:17.525606 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 15:40:17.528605 Relocation complete.
519 15:40:17.531879 Initializing CPU #0
520 15:40:17.535020 CPU: vendor Intel device 806ec
521 15:40:17.538548 CPU: family 06, model 8e, stepping 0c
522 15:40:17.542082 Clearing out pending MCEs
523 15:40:17.542169 Setting up local APIC...
524 15:40:17.545172 apic_id: 0x00 done.
525 15:40:17.548235 Turbo is available but hidden
526 15:40:17.552095 Turbo is available and visible
527 15:40:17.555151 VMX status: enabled
528 15:40:17.558302 IA32_FEATURE_CONTROL status: locked
529 15:40:17.558392 Skip microcode update
530 15:40:17.561426 CPU #0 initialized
531 15:40:17.564999 Initializing CPU #2
532 15:40:17.565086 Initializing CPU #5
533 15:40:17.568169 Initializing CPU #4
534 15:40:17.571674 CPU: vendor Intel device 806ec
535 15:40:17.574992 CPU: family 06, model 8e, stepping 0c
536 15:40:17.578009 CPU: vendor Intel device 806ec
537 15:40:17.581478 CPU: family 06, model 8e, stepping 0c
538 15:40:17.584726 Clearing out pending MCEs
539 15:40:17.588022 Clearing out pending MCEs
540 15:40:17.588111 Setting up local APIC...
541 15:40:17.591260 CPU: vendor Intel device 806ec
542 15:40:17.598053 CPU: family 06, model 8e, stepping 0c
543 15:40:17.598146 Clearing out pending MCEs
544 15:40:17.601483 Initializing CPU #6
545 15:40:17.604531 Initializing CPU #7
546 15:40:17.608235 CPU: vendor Intel device 806ec
547 15:40:17.611405 CPU: family 06, model 8e, stepping 0c
548 15:40:17.611504 Setting up local APIC...
549 15:40:17.614606 Initializing CPU #3
550 15:40:17.617711 Initializing CPU #1
551 15:40:17.621247 CPU: vendor Intel device 806ec
552 15:40:17.624199 CPU: family 06, model 8e, stepping 0c
553 15:40:17.627988 CPU: vendor Intel device 806ec
554 15:40:17.631134 CPU: family 06, model 8e, stepping 0c
555 15:40:17.634257 Clearing out pending MCEs
556 15:40:17.634350 Clearing out pending MCEs
557 15:40:17.637399 Setting up local APIC...
558 15:40:17.640688 apic_id: 0x04 done.
559 15:40:17.644176 Setting up local APIC...
560 15:40:17.644261 apic_id: 0x01 done.
561 15:40:17.647223 apic_id: 0x02 done.
562 15:40:17.650765 Setting up local APIC...
563 15:40:17.650850 VMX status: enabled
564 15:40:17.653958 apic_id: 0x03 done.
565 15:40:17.657662 VMX status: enabled
566 15:40:17.657749 VMX status: enabled
567 15:40:17.660650 IA32_FEATURE_CONTROL status: locked
568 15:40:17.663750 IA32_FEATURE_CONTROL status: locked
569 15:40:17.667203 Skip microcode update
570 15:40:17.670341 Skip microcode update
571 15:40:17.670420 CPU #3 initialized
572 15:40:17.673455 CPU #1 initialized
573 15:40:17.677077 apic_id: 0x05 done.
574 15:40:17.677167 VMX status: enabled
575 15:40:17.680263 VMX status: enabled
576 15:40:17.683281 IA32_FEATURE_CONTROL status: locked
577 15:40:17.686679 IA32_FEATURE_CONTROL status: locked
578 15:40:17.690243 Skip microcode update
579 15:40:17.693173 IA32_FEATURE_CONTROL status: locked
580 15:40:17.696629 Clearing out pending MCEs
581 15:40:17.700423 CPU: vendor Intel device 806ec
582 15:40:17.703046 CPU: family 06, model 8e, stepping 0c
583 15:40:17.706776 Setting up local APIC...
584 15:40:17.706863 Skip microcode update
585 15:40:17.709817 CPU #5 initialized
586 15:40:17.709901 CPU #4 initialized
587 15:40:17.712925 Skip microcode update
588 15:40:17.717159 Clearing out pending MCEs
589 15:40:17.717241 apic_id: 0x07 done.
590 15:40:17.719757 Setting up local APIC...
591 15:40:17.722955 CPU #2 initialized
592 15:40:17.723040 VMX status: enabled
593 15:40:17.726089 apic_id: 0x06 done.
594 15:40:17.729975 IA32_FEATURE_CONTROL status: locked
595 15:40:17.733232 VMX status: enabled
596 15:40:17.736154 Skip microcode update
597 15:40:17.739258 IA32_FEATURE_CONTROL status: locked
598 15:40:17.739344 CPU #6 initialized
599 15:40:17.742988 Skip microcode update
600 15:40:17.745904 CPU #7 initialized
601 15:40:17.749456 bsp_do_flight_plan done after 452 msecs.
602 15:40:17.752606 CPU: frequency set to 4200 MHz
603 15:40:17.752705 Enabling SMIs.
604 15:40:17.756154 Locking SMM.
605 15:40:17.769628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 15:40:17.772955 CBFS @ c08000 size 3f8000
607 15:40:17.779406 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 15:40:17.779542 CBFS: Locating 'vbt.bin'
609 15:40:17.786209 CBFS: Found @ offset 5f5c0 size 499
610 15:40:17.789836 Found a VBT of 4608 bytes after decompression
611 15:40:17.974317 Display FSP Version Info HOB
612 15:40:17.977410 Reference Code - CPU = 9.0.1e.30
613 15:40:17.980644 uCode Version = 0.0.0.ca
614 15:40:17.983913 TXT ACM version = ff.ff.ff.ffff
615 15:40:17.987036 Display FSP Version Info HOB
616 15:40:17.990627 Reference Code - ME = 9.0.1e.30
617 15:40:17.993679 MEBx version = 0.0.0.0
618 15:40:17.996713 ME Firmware Version = Consumer SKU
619 15:40:18.000204 Display FSP Version Info HOB
620 15:40:18.003226 Reference Code - CML PCH = 9.0.1e.30
621 15:40:18.006751 PCH-CRID Status = Disabled
622 15:40:18.010222 PCH-CRID Original Value = ff.ff.ff.ffff
623 15:40:18.013040 PCH-CRID New Value = ff.ff.ff.ffff
624 15:40:18.016650 OPROM - RST - RAID = ff.ff.ff.ffff
625 15:40:18.019762 ChipsetInit Base Version = ff.ff.ff.ffff
626 15:40:18.026003 ChipsetInit Oem Version = ff.ff.ff.ffff
627 15:40:18.026112 Display FSP Version Info HOB
628 15:40:18.032850 Reference Code - SA - System Agent = 9.0.1e.30
629 15:40:18.035925 Reference Code - MRC = 0.7.1.6c
630 15:40:18.039498 SA - PCIe Version = 9.0.1e.30
631 15:40:18.042671 SA-CRID Status = Disabled
632 15:40:18.045799 SA-CRID Original Value = 0.0.0.c
633 15:40:18.046006 SA-CRID New Value = 0.0.0.c
634 15:40:18.048890 OPROM - VBIOS = ff.ff.ff.ffff
635 15:40:18.052566 RTC Init
636 15:40:18.056053 Set power on after power failure.
637 15:40:18.059397 Disabling Deep S3
638 15:40:18.059514 Disabling Deep S3
639 15:40:18.062585 Disabling Deep S4
640 15:40:18.062774 Disabling Deep S4
641 15:40:18.065509 Disabling Deep S5
642 15:40:18.065667 Disabling Deep S5
643 15:40:18.072414 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
644 15:40:18.075708 Enumerating buses...
645 15:40:18.078952 Show all devs... Before device enumeration.
646 15:40:18.081935 Root Device: enabled 1
647 15:40:18.085462 CPU_CLUSTER: 0: enabled 1
648 15:40:18.085603 DOMAIN: 0000: enabled 1
649 15:40:18.088585 APIC: 00: enabled 1
650 15:40:18.091597 PCI: 00:00.0: enabled 1
651 15:40:18.095156 PCI: 00:02.0: enabled 1
652 15:40:18.095275 PCI: 00:04.0: enabled 0
653 15:40:18.098214 PCI: 00:05.0: enabled 0
654 15:40:18.101615 PCI: 00:12.0: enabled 1
655 15:40:18.101741 PCI: 00:12.5: enabled 0
656 15:40:18.105100 PCI: 00:12.6: enabled 0
657 15:40:18.108454 PCI: 00:14.0: enabled 1
658 15:40:18.111506 PCI: 00:14.1: enabled 0
659 15:40:18.111626 PCI: 00:14.3: enabled 1
660 15:40:18.115047 PCI: 00:14.5: enabled 0
661 15:40:18.118266 PCI: 00:15.0: enabled 1
662 15:40:18.121783 PCI: 00:15.1: enabled 1
663 15:40:18.121906 PCI: 00:15.2: enabled 0
664 15:40:18.124750 PCI: 00:15.3: enabled 0
665 15:40:18.128071 PCI: 00:16.0: enabled 1
666 15:40:18.131160 PCI: 00:16.1: enabled 0
667 15:40:18.131284 PCI: 00:16.2: enabled 0
668 15:40:18.134626 PCI: 00:16.3: enabled 0
669 15:40:18.137685 PCI: 00:16.4: enabled 0
670 15:40:18.140634 PCI: 00:16.5: enabled 0
671 15:40:18.140767 PCI: 00:17.0: enabled 1
672 15:40:18.144222 PCI: 00:19.0: enabled 1
673 15:40:18.147285 PCI: 00:19.1: enabled 0
674 15:40:18.150953 PCI: 00:19.2: enabled 0
675 15:40:18.151073 PCI: 00:1a.0: enabled 0
676 15:40:18.153983 PCI: 00:1c.0: enabled 0
677 15:40:18.157412 PCI: 00:1c.1: enabled 0
678 15:40:18.160582 PCI: 00:1c.2: enabled 0
679 15:40:18.160698 PCI: 00:1c.3: enabled 0
680 15:40:18.163699 PCI: 00:1c.4: enabled 0
681 15:40:18.166750 PCI: 00:1c.5: enabled 0
682 15:40:18.170452 PCI: 00:1c.6: enabled 0
683 15:40:18.170588 PCI: 00:1c.7: enabled 0
684 15:40:18.173559 PCI: 00:1d.0: enabled 1
685 15:40:18.176577 PCI: 00:1d.1: enabled 0
686 15:40:18.179856 PCI: 00:1d.2: enabled 0
687 15:40:18.179982 PCI: 00:1d.3: enabled 0
688 15:40:18.183312 PCI: 00:1d.4: enabled 0
689 15:40:18.186554 PCI: 00:1d.5: enabled 1
690 15:40:18.189846 PCI: 00:1e.0: enabled 1
691 15:40:18.189968 PCI: 00:1e.1: enabled 0
692 15:40:18.193134 PCI: 00:1e.2: enabled 1
693 15:40:18.196535 PCI: 00:1e.3: enabled 1
694 15:40:18.199625 PCI: 00:1f.0: enabled 1
695 15:40:18.199741 PCI: 00:1f.1: enabled 1
696 15:40:18.203176 PCI: 00:1f.2: enabled 1
697 15:40:18.206227 PCI: 00:1f.3: enabled 1
698 15:40:18.209360 PCI: 00:1f.4: enabled 1
699 15:40:18.209448 PCI: 00:1f.5: enabled 1
700 15:40:18.212592 PCI: 00:1f.6: enabled 0
701 15:40:18.215792 USB0 port 0: enabled 1
702 15:40:18.215890 I2C: 00:15: enabled 1
703 15:40:18.218991 I2C: 00:5d: enabled 1
704 15:40:18.222627 GENERIC: 0.0: enabled 1
705 15:40:18.225748 I2C: 00:1a: enabled 1
706 15:40:18.225846 I2C: 00:38: enabled 1
707 15:40:18.228933 I2C: 00:39: enabled 1
708 15:40:18.232575 I2C: 00:3a: enabled 1
709 15:40:18.232665 I2C: 00:3b: enabled 1
710 15:40:18.235512 PCI: 00:00.0: enabled 1
711 15:40:18.238677 SPI: 00: enabled 1
712 15:40:18.238768 SPI: 01: enabled 1
713 15:40:18.242013 PNP: 0c09.0: enabled 1
714 15:40:18.245652 USB2 port 0: enabled 1
715 15:40:18.245757 USB2 port 1: enabled 1
716 15:40:18.249069 USB2 port 2: enabled 0
717 15:40:18.251897 USB2 port 3: enabled 0
718 15:40:18.251986 USB2 port 5: enabled 0
719 15:40:18.255018 USB2 port 6: enabled 1
720 15:40:18.258643 USB2 port 9: enabled 1
721 15:40:18.261977 USB3 port 0: enabled 1
722 15:40:18.262065 USB3 port 1: enabled 1
723 15:40:18.265198 USB3 port 2: enabled 1
724 15:40:18.268075 USB3 port 3: enabled 1
725 15:40:18.268163 USB3 port 4: enabled 0
726 15:40:18.271742 APIC: 03: enabled 1
727 15:40:18.274883 APIC: 01: enabled 1
728 15:40:18.274973 APIC: 02: enabled 1
729 15:40:18.278365 APIC: 05: enabled 1
730 15:40:18.281428 APIC: 04: enabled 1
731 15:40:18.281517 APIC: 07: enabled 1
732 15:40:18.284750 APIC: 06: enabled 1
733 15:40:18.287588 Compare with tree...
734 15:40:18.287677 Root Device: enabled 1
735 15:40:18.291445 CPU_CLUSTER: 0: enabled 1
736 15:40:18.294175 APIC: 00: enabled 1
737 15:40:18.294264 APIC: 03: enabled 1
738 15:40:18.297570 APIC: 01: enabled 1
739 15:40:18.300667 APIC: 02: enabled 1
740 15:40:18.304026 APIC: 05: enabled 1
741 15:40:18.304121 APIC: 04: enabled 1
742 15:40:18.306975 APIC: 07: enabled 1
743 15:40:18.310722 APIC: 06: enabled 1
744 15:40:18.310808 DOMAIN: 0000: enabled 1
745 15:40:18.313777 PCI: 00:00.0: enabled 1
746 15:40:18.317222 PCI: 00:02.0: enabled 1
747 15:40:18.320238 PCI: 00:04.0: enabled 0
748 15:40:18.323771 PCI: 00:05.0: enabled 0
749 15:40:18.323864 PCI: 00:12.0: enabled 1
750 15:40:18.326851 PCI: 00:12.5: enabled 0
751 15:40:18.330557 PCI: 00:12.6: enabled 0
752 15:40:18.333343 PCI: 00:14.0: enabled 1
753 15:40:18.337039 USB0 port 0: enabled 1
754 15:40:18.337144 USB2 port 0: enabled 1
755 15:40:18.340151 USB2 port 1: enabled 1
756 15:40:18.343294 USB2 port 2: enabled 0
757 15:40:18.346276 USB2 port 3: enabled 0
758 15:40:18.349771 USB2 port 5: enabled 0
759 15:40:18.352909 USB2 port 6: enabled 1
760 15:40:18.353002 USB2 port 9: enabled 1
761 15:40:18.356493 USB3 port 0: enabled 1
762 15:40:18.359333 USB3 port 1: enabled 1
763 15:40:18.362897 USB3 port 2: enabled 1
764 15:40:18.366049 USB3 port 3: enabled 1
765 15:40:18.369219 USB3 port 4: enabled 0
766 15:40:18.369321 PCI: 00:14.1: enabled 0
767 15:40:18.372656 PCI: 00:14.3: enabled 1
768 15:40:18.375757 PCI: 00:14.5: enabled 0
769 15:40:18.378961 PCI: 00:15.0: enabled 1
770 15:40:18.382556 I2C: 00:15: enabled 1
771 15:40:18.382645 PCI: 00:15.1: enabled 1
772 15:40:18.385543 I2C: 00:5d: enabled 1
773 15:40:18.388747 GENERIC: 0.0: enabled 1
774 15:40:18.392183 PCI: 00:15.2: enabled 0
775 15:40:18.395657 PCI: 00:15.3: enabled 0
776 15:40:18.395749 PCI: 00:16.0: enabled 1
777 15:40:18.398616 PCI: 00:16.1: enabled 0
778 15:40:18.402244 PCI: 00:16.2: enabled 0
779 15:40:18.405376 PCI: 00:16.3: enabled 0
780 15:40:18.408546 PCI: 00:16.4: enabled 0
781 15:40:18.408636 PCI: 00:16.5: enabled 0
782 15:40:18.412127 PCI: 00:17.0: enabled 1
783 15:40:18.415103 PCI: 00:19.0: enabled 1
784 15:40:18.418622 I2C: 00:1a: enabled 1
785 15:40:18.421708 I2C: 00:38: enabled 1
786 15:40:18.421790 I2C: 00:39: enabled 1
787 15:40:18.424880 I2C: 00:3a: enabled 1
788 15:40:18.428088 I2C: 00:3b: enabled 1
789 15:40:18.431526 PCI: 00:19.1: enabled 0
790 15:40:18.434685 PCI: 00:19.2: enabled 0
791 15:40:18.434796 PCI: 00:1a.0: enabled 0
792 15:40:18.438308 PCI: 00:1c.0: enabled 0
793 15:40:18.441907 PCI: 00:1c.1: enabled 0
794 15:40:18.444547 PCI: 00:1c.2: enabled 0
795 15:40:18.447541 PCI: 00:1c.3: enabled 0
796 15:40:18.447630 PCI: 00:1c.4: enabled 0
797 15:40:18.451293 PCI: 00:1c.5: enabled 0
798 15:40:18.454387 PCI: 00:1c.6: enabled 0
799 15:40:18.457317 PCI: 00:1c.7: enabled 0
800 15:40:18.460755 PCI: 00:1d.0: enabled 1
801 15:40:18.460844 PCI: 00:1d.1: enabled 0
802 15:40:18.464015 PCI: 00:1d.2: enabled 0
803 15:40:18.467383 PCI: 00:1d.3: enabled 0
804 15:40:18.470752 PCI: 00:1d.4: enabled 0
805 15:40:18.473785 PCI: 00:1d.5: enabled 1
806 15:40:18.473874 PCI: 00:00.0: enabled 1
807 15:40:18.477082 PCI: 00:1e.0: enabled 1
808 15:40:18.480596 PCI: 00:1e.1: enabled 0
809 15:40:18.483853 PCI: 00:1e.2: enabled 1
810 15:40:18.483944 SPI: 00: enabled 1
811 15:40:18.486937 PCI: 00:1e.3: enabled 1
812 15:40:18.490473 SPI: 01: enabled 1
813 15:40:18.493666 PCI: 00:1f.0: enabled 1
814 15:40:18.496719 PNP: 0c09.0: enabled 1
815 15:40:18.496815 PCI: 00:1f.1: enabled 1
816 15:40:18.500154 PCI: 00:1f.2: enabled 1
817 15:40:18.503430 PCI: 00:1f.3: enabled 1
818 15:40:18.506886 PCI: 00:1f.4: enabled 1
819 15:40:18.509863 PCI: 00:1f.5: enabled 1
820 15:40:18.509952 PCI: 00:1f.6: enabled 0
821 15:40:18.513289 Root Device scanning...
822 15:40:18.516255 scan_static_bus for Root Device
823 15:40:18.519817 CPU_CLUSTER: 0 enabled
824 15:40:18.522945 DOMAIN: 0000 enabled
825 15:40:18.523031 DOMAIN: 0000 scanning...
826 15:40:18.526153 PCI: pci_scan_bus for bus 00
827 15:40:18.529726 PCI: 00:00.0 [8086/0000] ops
828 15:40:18.532914 PCI: 00:00.0 [8086/9b61] enabled
829 15:40:18.536193 PCI: 00:02.0 [8086/0000] bus ops
830 15:40:18.539211 PCI: 00:02.0 [8086/9b41] enabled
831 15:40:18.542447 PCI: 00:04.0 [8086/1903] disabled
832 15:40:18.545751 PCI: 00:08.0 [8086/1911] enabled
833 15:40:18.548999 PCI: 00:12.0 [8086/02f9] enabled
834 15:40:18.555335 PCI: 00:14.0 [8086/0000] bus ops
835 15:40:18.558751 PCI: 00:14.0 [8086/02ed] enabled
836 15:40:18.561882 PCI: 00:14.2 [8086/02ef] enabled
837 15:40:18.565512 PCI: 00:14.3 [8086/02f0] enabled
838 15:40:18.568576 PCI: 00:15.0 [8086/0000] bus ops
839 15:40:18.571724 PCI: 00:15.0 [8086/02e8] enabled
840 15:40:18.575304 PCI: 00:15.1 [8086/0000] bus ops
841 15:40:18.578546 PCI: 00:15.1 [8086/02e9] enabled
842 15:40:18.578630 PCI: 00:16.0 [8086/0000] ops
843 15:40:18.581691 PCI: 00:16.0 [8086/02e0] enabled
844 15:40:18.585092 PCI: 00:17.0 [8086/0000] ops
845 15:40:18.588565 PCI: 00:17.0 [8086/02d3] enabled
846 15:40:18.591584 PCI: 00:19.0 [8086/0000] bus ops
847 15:40:18.594628 PCI: 00:19.0 [8086/02c5] enabled
848 15:40:18.598240 PCI: 00:1d.0 [8086/0000] bus ops
849 15:40:18.601270 PCI: 00:1d.0 [8086/02b0] enabled
850 15:40:18.607682 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 15:40:18.611258 PCI: 00:1e.0 [8086/0000] ops
852 15:40:18.614241 PCI: 00:1e.0 [8086/02a8] enabled
853 15:40:18.617736 PCI: 00:1e.2 [8086/0000] bus ops
854 15:40:18.621257 PCI: 00:1e.2 [8086/02aa] enabled
855 15:40:18.624142 PCI: 00:1e.3 [8086/0000] bus ops
856 15:40:18.627251 PCI: 00:1e.3 [8086/02ab] enabled
857 15:40:18.630826 PCI: 00:1f.0 [8086/0000] bus ops
858 15:40:18.634068 PCI: 00:1f.0 [8086/0284] enabled
859 15:40:18.640528 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 15:40:18.647266 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 15:40:18.650679 PCI: 00:1f.3 [8086/0000] bus ops
862 15:40:18.653806 PCI: 00:1f.3 [8086/02c8] enabled
863 15:40:18.656929 PCI: 00:1f.4 [8086/0000] bus ops
864 15:40:18.660019 PCI: 00:1f.4 [8086/02a3] enabled
865 15:40:18.663613 PCI: 00:1f.5 [8086/0000] bus ops
866 15:40:18.666803 PCI: 00:1f.5 [8086/02a4] enabled
867 15:40:18.670031 PCI: Leftover static devices:
868 15:40:18.670133 PCI: 00:05.0
869 15:40:18.672956 PCI: 00:12.5
870 15:40:18.673057 PCI: 00:12.6
871 15:40:18.673128 PCI: 00:14.1
872 15:40:18.676406 PCI: 00:14.5
873 15:40:18.676537 PCI: 00:15.2
874 15:40:18.679586 PCI: 00:15.3
875 15:40:18.679739 PCI: 00:16.1
876 15:40:18.679814 PCI: 00:16.2
877 15:40:18.682989 PCI: 00:16.3
878 15:40:18.683087 PCI: 00:16.4
879 15:40:18.685994 PCI: 00:16.5
880 15:40:18.686091 PCI: 00:19.1
881 15:40:18.689704 PCI: 00:19.2
882 15:40:18.689797 PCI: 00:1a.0
883 15:40:18.689884 PCI: 00:1c.0
884 15:40:18.692932 PCI: 00:1c.1
885 15:40:18.693062 PCI: 00:1c.2
886 15:40:18.695757 PCI: 00:1c.3
887 15:40:18.695899 PCI: 00:1c.4
888 15:40:18.696007 PCI: 00:1c.5
889 15:40:18.699896 PCI: 00:1c.6
890 15:40:18.700036 PCI: 00:1c.7
891 15:40:18.702388 PCI: 00:1d.1
892 15:40:18.702481 PCI: 00:1d.2
893 15:40:18.705523 PCI: 00:1d.3
894 15:40:18.705625 PCI: 00:1d.4
895 15:40:18.705700 PCI: 00:1d.5
896 15:40:18.709290 PCI: 00:1e.1
897 15:40:18.709383 PCI: 00:1f.1
898 15:40:18.712469 PCI: 00:1f.2
899 15:40:18.712560 PCI: 00:1f.6
900 15:40:18.715647 PCI: Check your devicetree.cb.
901 15:40:18.718854 PCI: 00:02.0 scanning...
902 15:40:18.722172 scan_generic_bus for PCI: 00:02.0
903 15:40:18.725238 scan_generic_bus for PCI: 00:02.0 done
904 15:40:18.731986 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
905 15:40:18.735117 PCI: 00:14.0 scanning...
906 15:40:18.738402 scan_static_bus for PCI: 00:14.0
907 15:40:18.738496 USB0 port 0 enabled
908 15:40:18.741619 USB0 port 0 scanning...
909 15:40:18.744800 scan_static_bus for USB0 port 0
910 15:40:18.748200 USB2 port 0 enabled
911 15:40:18.748281 USB2 port 1 enabled
912 15:40:18.751327 USB2 port 2 disabled
913 15:40:18.754504 USB2 port 3 disabled
914 15:40:18.754587 USB2 port 5 disabled
915 15:40:18.757720 USB2 port 6 enabled
916 15:40:18.760994 USB2 port 9 enabled
917 15:40:18.761072 USB3 port 0 enabled
918 15:40:18.764180 USB3 port 1 enabled
919 15:40:18.767217 USB3 port 2 enabled
920 15:40:18.767303 USB3 port 3 enabled
921 15:40:18.770578 USB3 port 4 disabled
922 15:40:18.773768 USB2 port 0 scanning...
923 15:40:18.777389 scan_static_bus for USB2 port 0
924 15:40:18.780661 scan_static_bus for USB2 port 0 done
925 15:40:18.783882 scan_bus: scanning of bus USB2 port 0 took 9687 usecs
926 15:40:18.787144 USB2 port 1 scanning...
927 15:40:18.790289 scan_static_bus for USB2 port 1
928 15:40:18.793675 scan_static_bus for USB2 port 1 done
929 15:40:18.800548 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
930 15:40:18.803205 USB2 port 6 scanning...
931 15:40:18.806952 scan_static_bus for USB2 port 6
932 15:40:18.810014 scan_static_bus for USB2 port 6 done
933 15:40:18.816365 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
934 15:40:18.816457 USB2 port 9 scanning...
935 15:40:18.820027 scan_static_bus for USB2 port 9
936 15:40:18.826134 scan_static_bus for USB2 port 9 done
937 15:40:18.829799 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
938 15:40:18.832984 USB3 port 0 scanning...
939 15:40:18.836280 scan_static_bus for USB3 port 0
940 15:40:18.839465 scan_static_bus for USB3 port 0 done
941 15:40:18.845888 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
942 15:40:18.849129 USB3 port 1 scanning...
943 15:40:18.852376 scan_static_bus for USB3 port 1
944 15:40:18.855557 scan_static_bus for USB3 port 1 done
945 15:40:18.858686 scan_bus: scanning of bus USB3 port 1 took 9693 usecs
946 15:40:18.861916 USB3 port 2 scanning...
947 15:40:18.865411 scan_static_bus for USB3 port 2
948 15:40:18.868583 scan_static_bus for USB3 port 2 done
949 15:40:18.875268 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
950 15:40:18.878632 USB3 port 3 scanning...
951 15:40:18.881816 scan_static_bus for USB3 port 3
952 15:40:18.885182 scan_static_bus for USB3 port 3 done
953 15:40:18.891463 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
954 15:40:18.894858 scan_static_bus for USB0 port 0 done
955 15:40:18.898105 scan_bus: scanning of bus USB0 port 0 took 155319 usecs
956 15:40:18.904390 scan_static_bus for PCI: 00:14.0 done
957 15:40:18.907918 scan_bus: scanning of bus PCI: 00:14.0 took 172935 usecs
958 15:40:18.911255 PCI: 00:15.0 scanning...
959 15:40:18.914332 scan_generic_bus for PCI: 00:15.0
960 15:40:18.920719 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 15:40:18.924382 scan_generic_bus for PCI: 00:15.0 done
962 15:40:18.927300 scan_bus: scanning of bus PCI: 00:15.0 took 14282 usecs
963 15:40:18.930988 PCI: 00:15.1 scanning...
964 15:40:18.934396 scan_generic_bus for PCI: 00:15.1
965 15:40:18.940685 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 15:40:18.943928 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 15:40:18.946957 scan_generic_bus for PCI: 00:15.1 done
968 15:40:18.953528 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
969 15:40:18.956612 PCI: 00:19.0 scanning...
970 15:40:18.960383 scan_generic_bus for PCI: 00:19.0
971 15:40:18.963593 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 15:40:18.966560 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 15:40:18.970087 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 15:40:18.976478 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 15:40:18.979695 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 15:40:18.982880 scan_generic_bus for PCI: 00:19.0 done
977 15:40:18.989416 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
978 15:40:18.992648 PCI: 00:1d.0 scanning...
979 15:40:18.995870 do_pci_scan_bridge for PCI: 00:1d.0
980 15:40:18.999081 PCI: pci_scan_bus for bus 01
981 15:40:19.002288 PCI: 01:00.0 [1c5c/1327] enabled
982 15:40:19.006181 Enabling Common Clock Configuration
983 15:40:19.009083 L1 Sub-State supported from root port 29
984 15:40:19.012425 L1 Sub-State Support = 0xf
985 15:40:19.015679 CommonModeRestoreTime = 0x28
986 15:40:19.018924 Power On Value = 0x16, Power On Scale = 0x0
987 15:40:19.022145 ASPM: Enabled L1
988 15:40:19.029154 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
989 15:40:19.029244 PCI: 00:1e.2 scanning...
990 15:40:19.031684 scan_generic_bus for PCI: 00:1e.2
991 15:40:19.038516 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 15:40:19.041677 scan_generic_bus for PCI: 00:1e.2 done
993 15:40:19.045014 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
994 15:40:19.048687 PCI: 00:1e.3 scanning...
995 15:40:19.051307 scan_generic_bus for PCI: 00:1e.3
996 15:40:19.058592 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 15:40:19.061162 scan_generic_bus for PCI: 00:1e.3 done
998 15:40:19.064782 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
999 15:40:19.067720 PCI: 00:1f.0 scanning...
1000 15:40:19.071350 scan_static_bus for PCI: 00:1f.0
1001 15:40:19.074687 PNP: 0c09.0 enabled
1002 15:40:19.077805 scan_static_bus for PCI: 00:1f.0 done
1003 15:40:19.084134 scan_bus: scanning of bus PCI: 00:1f.0 took 12045 usecs
1004 15:40:19.087359 PCI: 00:1f.3 scanning...
1005 15:40:19.090682 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1006 15:40:19.093879 PCI: 00:1f.4 scanning...
1007 15:40:19.097275 scan_generic_bus for PCI: 00:1f.4
1008 15:40:19.100485 scan_generic_bus for PCI: 00:1f.4 done
1009 15:40:19.107252 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1010 15:40:19.110521 PCI: 00:1f.5 scanning...
1011 15:40:19.113589 scan_generic_bus for PCI: 00:1f.5
1012 15:40:19.116776 scan_generic_bus for PCI: 00:1f.5 done
1013 15:40:19.123178 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1014 15:40:19.129965 scan_bus: scanning of bus DOMAIN: 0000 took 604812 usecs
1015 15:40:19.133060 scan_static_bus for Root Device done
1016 15:40:19.139605 scan_bus: scanning of bus Root Device took 624679 usecs
1017 15:40:19.139699 done
1018 15:40:19.143343 Chrome EC: UHEPI supported
1019 15:40:19.149792 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 15:40:19.152933 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 15:40:19.159619 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 15:40:19.166358 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 15:40:19.169622 SPI flash protection: WPSW=0 SRP0=0
1024 15:40:19.176283 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 15:40:19.179600 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1026 15:40:19.183013 found VGA at PCI: 00:02.0
1027 15:40:19.186049 Setting up VGA for PCI: 00:02.0
1028 15:40:19.192635 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 15:40:19.195744 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 15:40:19.198952 Allocating resources...
1031 15:40:19.202771 Reading resources...
1032 15:40:19.206363 Root Device read_resources bus 0 link: 0
1033 15:40:19.208591 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 15:40:19.215322 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 15:40:19.218418 DOMAIN: 0000 read_resources bus 0 link: 0
1036 15:40:19.226409 PCI: 00:14.0 read_resources bus 0 link: 0
1037 15:40:19.229935 USB0 port 0 read_resources bus 0 link: 0
1038 15:40:19.238119 USB0 port 0 read_resources bus 0 link: 0 done
1039 15:40:19.241344 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 15:40:19.248549 PCI: 00:15.0 read_resources bus 1 link: 0
1041 15:40:19.251703 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 15:40:19.258179 PCI: 00:15.1 read_resources bus 2 link: 0
1043 15:40:19.261782 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 15:40:19.269313 PCI: 00:19.0 read_resources bus 3 link: 0
1045 15:40:19.275752 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 15:40:19.278921 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 15:40:19.285412 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 15:40:19.288637 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 15:40:19.295353 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 15:40:19.299149 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 15:40:19.305164 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 15:40:19.308382 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 15:40:19.315193 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 15:40:19.321858 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 15:40:19.324606 Root Device read_resources bus 0 link: 0 done
1056 15:40:19.328205 Done reading resources.
1057 15:40:19.334525 Show resources in subtree (Root Device)...After reading.
1058 15:40:19.338067 Root Device child on link 0 CPU_CLUSTER: 0
1059 15:40:19.341200 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 15:40:19.344386 APIC: 00
1061 15:40:19.344475 APIC: 03
1062 15:40:19.347624 APIC: 01
1063 15:40:19.347712 APIC: 02
1064 15:40:19.347781 APIC: 05
1065 15:40:19.397568 APIC: 04
1066 15:40:19.397694 APIC: 07
1067 15:40:19.397788 APIC: 06
1068 15:40:19.398075 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 15:40:19.398153 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 15:40:19.398430 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 15:40:19.398507 PCI: 00:00.0
1072 15:40:19.398780 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 15:40:19.399202 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 15:40:19.447124 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 15:40:19.447448 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 15:40:19.448122 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 15:40:19.448406 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 15:40:19.448680 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 15:40:19.496801 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 15:40:19.497302 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 15:40:19.498062 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 15:40:19.499109 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 15:40:19.499483 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 15:40:19.523100 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 15:40:19.523622 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 15:40:19.524726 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 15:40:19.527392 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 15:40:19.530553 PCI: 00:02.0
1089 15:40:19.540079 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 15:40:19.549521 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 15:40:19.559880 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 15:40:19.559980 PCI: 00:04.0
1093 15:40:19.562680 PCI: 00:08.0
1094 15:40:19.572545 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 15:40:19.572639 PCI: 00:12.0
1096 15:40:19.582847 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 15:40:19.586125 PCI: 00:14.0 child on link 0 USB0 port 0
1098 15:40:19.595695 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 15:40:19.602266 USB0 port 0 child on link 0 USB2 port 0
1100 15:40:19.602418 USB2 port 0
1101 15:40:19.605635 USB2 port 1
1102 15:40:19.605728 USB2 port 2
1103 15:40:19.608762 USB2 port 3
1104 15:40:19.611940 USB2 port 5
1105 15:40:19.612020 USB2 port 6
1106 15:40:19.615167 USB2 port 9
1107 15:40:19.615258 USB3 port 0
1108 15:40:19.618670 USB3 port 1
1109 15:40:19.618767 USB3 port 2
1110 15:40:19.621825 USB3 port 3
1111 15:40:19.621917 USB3 port 4
1112 15:40:19.625149 PCI: 00:14.2
1113 15:40:19.635002 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 15:40:19.644462 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 15:40:19.644605 PCI: 00:14.3
1116 15:40:19.655057 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 15:40:19.661090 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 15:40:19.670713 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 15:40:19.670858 I2C: 01:15
1120 15:40:19.677446 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 15:40:19.686880 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 15:40:19.687041 I2C: 02:5d
1123 15:40:19.690157 GENERIC: 0.0
1124 15:40:19.690283 PCI: 00:16.0
1125 15:40:19.700362 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 15:40:19.703632 PCI: 00:17.0
1127 15:40:19.710205 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 15:40:19.719573 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 15:40:19.729355 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 15:40:19.736066 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 15:40:19.745826 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 15:40:19.755377 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 15:40:19.758906 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 15:40:19.768927 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 15:40:19.769018 I2C: 03:1a
1136 15:40:19.771801 I2C: 03:38
1137 15:40:19.771878 I2C: 03:39
1138 15:40:19.775368 I2C: 03:3a
1139 15:40:19.775452 I2C: 03:3b
1140 15:40:19.781755 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 15:40:19.788528 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 15:40:19.798172 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 15:40:19.808016 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 15:40:19.811165 PCI: 01:00.0
1145 15:40:19.820992 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 15:40:19.821083 PCI: 00:1e.0
1147 15:40:19.834051 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 15:40:19.844084 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 15:40:19.847075 PCI: 00:1e.2 child on link 0 SPI: 00
1150 15:40:19.856707 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 15:40:19.856807 SPI: 00
1152 15:40:19.860489 PCI: 00:1e.3 child on link 0 SPI: 01
1153 15:40:19.870011 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 15:40:19.873352 SPI: 01
1155 15:40:19.876555 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 15:40:19.886346 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 15:40:19.896219 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 15:40:19.896316 PNP: 0c09.0
1159 15:40:19.905941 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 15:40:19.906033 PCI: 00:1f.3
1161 15:40:19.915590 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 15:40:19.925888 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 15:40:19.928864 PCI: 00:1f.4
1164 15:40:19.938470 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 15:40:19.948657 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 15:40:19.948767 PCI: 00:1f.5
1167 15:40:19.958208 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 15:40:19.965205 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 15:40:19.971211 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 15:40:19.978186 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 15:40:19.981425 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 15:40:19.984700 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 15:40:19.987906 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 15:40:19.990870 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 15:40:19.997282 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 15:40:20.003721 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 15:40:20.013855 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 15:40:20.020330 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 15:40:20.030044 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 15:40:20.033413 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 15:40:20.040006 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 15:40:20.046599 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 15:40:20.050269 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 15:40:20.056134 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 15:40:20.059275 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 15:40:20.066347 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 15:40:20.069593 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 15:40:20.072717 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 15:40:20.079214 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 15:40:20.082439 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 15:40:20.088982 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 15:40:20.092046 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 15:40:20.098397 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 15:40:20.102142 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 15:40:20.108235 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 15:40:20.111576 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 15:40:20.118030 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 15:40:20.121500 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 15:40:20.127842 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 15:40:20.131221 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 15:40:20.137929 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 15:40:20.141132 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 15:40:20.147473 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 15:40:20.151000 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 15:40:20.160576 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 15:40:20.163716 avoid_fixed_resources: DOMAIN: 0000
1207 15:40:20.170593 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 15:40:20.177016 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 15:40:20.183789 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 15:40:20.190070 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 15:40:20.199573 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 15:40:20.206135 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 15:40:20.212569 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 15:40:20.222767 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 15:40:20.229130 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 15:40:20.236053 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 15:40:20.245383 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 15:40:20.251945 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 15:40:20.254980 Setting resources...
1220 15:40:20.261869 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 15:40:20.265083 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 15:40:20.268425 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 15:40:20.271441 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 15:40:20.274655 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 15:40:20.281155 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 15:40:20.287618 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 15:40:20.294675 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 15:40:20.300885 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 15:40:20.307316 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 15:40:20.313785 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 15:40:20.317608 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 15:40:20.324116 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 15:40:20.327338 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 15:40:20.333721 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 15:40:20.337262 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 15:40:20.339912 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 15:40:20.346422 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 15:40:20.349719 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 15:40:20.356392 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 15:40:20.359726 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 15:40:20.366353 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 15:40:20.369655 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 15:40:20.375946 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 15:40:20.379065 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 15:40:20.385553 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 15:40:20.388859 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 15:40:20.395815 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 15:40:20.399048 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 15:40:20.405282 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 15:40:20.408470 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 15:40:20.415060 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 15:40:20.421491 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 15:40:20.427818 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 15:40:20.437561 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 15:40:20.444456 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 15:40:20.447489 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 15:40:20.457533 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 15:40:20.460655 Root Device assign_resources, bus 0 link: 0
1259 15:40:20.467240 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 15:40:20.473776 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 15:40:20.483422 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 15:40:20.489953 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 15:40:20.499773 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 15:40:20.506200 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 15:40:20.516111 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 15:40:20.519296 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 15:40:20.526012 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 15:40:20.532670 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 15:40:20.542166 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 15:40:20.548957 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 15:40:20.558540 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 15:40:20.561617 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 15:40:20.565367 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 15:40:20.575055 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 15:40:20.578420 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 15:40:20.584839 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 15:40:20.591543 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 15:40:20.601157 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 15:40:20.607675 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 15:40:20.617672 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 15:40:20.624222 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 15:40:20.630797 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 15:40:20.640619 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 15:40:20.647028 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 15:40:20.653411 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 15:40:20.656553 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 15:40:20.666361 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 15:40:20.672917 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 15:40:20.682541 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 15:40:20.685724 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 15:40:20.695553 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 15:40:20.698926 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 15:40:20.708599 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 15:40:20.715316 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 15:40:20.721707 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 15:40:20.725175 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 15:40:20.734633 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 15:40:20.738363 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 15:40:20.744622 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 15:40:20.747710 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 15:40:20.754612 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 15:40:20.757788 LPC: Trying to open IO window from 800 size 1ff
1303 15:40:20.767749 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 15:40:20.773792 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 15:40:20.783706 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 15:40:20.790315 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 15:40:20.796704 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 15:40:20.800065 Root Device assign_resources, bus 0 link: 0
1309 15:40:20.803595 Done setting resources.
1310 15:40:20.809826 Show resources in subtree (Root Device)...After assigning values.
1311 15:40:20.813136 Root Device child on link 0 CPU_CLUSTER: 0
1312 15:40:20.816492 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 15:40:20.819767 APIC: 00
1314 15:40:20.819851 APIC: 03
1315 15:40:20.823103 APIC: 01
1316 15:40:20.823191 APIC: 02
1317 15:40:20.823262 APIC: 05
1318 15:40:20.826345 APIC: 04
1319 15:40:20.826422 APIC: 07
1320 15:40:20.829618 APIC: 06
1321 15:40:20.832882 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 15:40:20.842741 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 15:40:20.852368 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 15:40:20.855643 PCI: 00:00.0
1325 15:40:20.865350 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 15:40:20.875121 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 15:40:20.881648 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 15:40:20.891351 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 15:40:20.901396 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 15:40:20.911148 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 15:40:20.920483 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 15:40:20.930720 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 15:40:20.940253 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 15:40:20.946926 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 15:40:20.957010 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 15:40:20.966535 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 15:40:20.976027 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 15:40:20.986282 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 15:40:20.995668 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 15:40:21.005455 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 15:40:21.005543 PCI: 00:02.0
1342 15:40:21.018454 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 15:40:21.028316 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 15:40:21.038214 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 15:40:21.038392 PCI: 00:04.0
1346 15:40:21.041637 PCI: 00:08.0
1347 15:40:21.051065 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 15:40:21.051153 PCI: 00:12.0
1349 15:40:21.061074 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 15:40:21.067218 PCI: 00:14.0 child on link 0 USB0 port 0
1351 15:40:21.077281 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 15:40:21.080484 USB0 port 0 child on link 0 USB2 port 0
1353 15:40:21.083910 USB2 port 0
1354 15:40:21.083995 USB2 port 1
1355 15:40:21.087064 USB2 port 2
1356 15:40:21.090303 USB2 port 3
1357 15:40:21.090388 USB2 port 5
1358 15:40:21.093382 USB2 port 6
1359 15:40:21.093467 USB2 port 9
1360 15:40:21.096701 USB3 port 0
1361 15:40:21.096823 USB3 port 1
1362 15:40:21.100128 USB3 port 2
1363 15:40:21.100230 USB3 port 3
1364 15:40:21.103411 USB3 port 4
1365 15:40:21.103496 PCI: 00:14.2
1366 15:40:21.113153 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 15:40:21.126299 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 15:40:21.126386 PCI: 00:14.3
1369 15:40:21.136038 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 15:40:21.142643 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 15:40:21.152099 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 15:40:21.152190 I2C: 01:15
1373 15:40:21.158715 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 15:40:21.168349 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 15:40:21.168437 I2C: 02:5d
1376 15:40:21.171935 GENERIC: 0.0
1377 15:40:21.172020 PCI: 00:16.0
1378 15:40:21.181533 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 15:40:21.184837 PCI: 00:17.0
1380 15:40:21.194497 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 15:40:21.204382 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 15:40:21.214195 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 15:40:21.223933 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 15:40:21.233818 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 15:40:21.243663 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 15:40:21.246979 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 15:40:21.256803 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 15:40:21.259952 I2C: 03:1a
1389 15:40:21.260037 I2C: 03:38
1390 15:40:21.262947 I2C: 03:39
1391 15:40:21.263025 I2C: 03:3a
1392 15:40:21.266219 I2C: 03:3b
1393 15:40:21.269403 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 15:40:21.279377 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 15:40:21.289065 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 15:40:21.299031 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 15:40:21.302128 PCI: 01:00.0
1398 15:40:21.311917 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 15:40:21.312018 PCI: 00:1e.0
1400 15:40:21.325065 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 15:40:21.334953 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 15:40:21.338225 PCI: 00:1e.2 child on link 0 SPI: 00
1403 15:40:21.348063 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 15:40:21.351383 SPI: 00
1405 15:40:21.354707 PCI: 00:1e.3 child on link 0 SPI: 01
1406 15:40:21.364291 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 15:40:21.364378 SPI: 01
1408 15:40:21.370675 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 15:40:21.377093 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 15:40:21.387106 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 15:40:21.390392 PNP: 0c09.0
1412 15:40:21.396688 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 15:40:21.399913 PCI: 00:1f.3
1414 15:40:21.409942 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 15:40:21.419509 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 15:40:21.422841 PCI: 00:1f.4
1417 15:40:21.432385 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 15:40:21.442229 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 15:40:21.442329 PCI: 00:1f.5
1420 15:40:21.452187 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 15:40:21.455504 Done allocating resources.
1422 15:40:21.461940 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 15:40:21.465177 Enabling resources...
1424 15:40:21.468294 PCI: 00:00.0 subsystem <- 8086/9b61
1425 15:40:21.471628 PCI: 00:00.0 cmd <- 06
1426 15:40:21.475232 PCI: 00:02.0 subsystem <- 8086/9b41
1427 15:40:21.478408 PCI: 00:02.0 cmd <- 03
1428 15:40:21.478494 PCI: 00:08.0 cmd <- 06
1429 15:40:21.485370 PCI: 00:12.0 subsystem <- 8086/02f9
1430 15:40:21.485457 PCI: 00:12.0 cmd <- 02
1431 15:40:21.491741 PCI: 00:14.0 subsystem <- 8086/02ed
1432 15:40:21.491826 PCI: 00:14.0 cmd <- 02
1433 15:40:21.494907 PCI: 00:14.2 cmd <- 02
1434 15:40:21.498277 PCI: 00:14.3 subsystem <- 8086/02f0
1435 15:40:21.501601 PCI: 00:14.3 cmd <- 02
1436 15:40:21.504891 PCI: 00:15.0 subsystem <- 8086/02e8
1437 15:40:21.508067 PCI: 00:15.0 cmd <- 02
1438 15:40:21.511486 PCI: 00:15.1 subsystem <- 8086/02e9
1439 15:40:21.514931 PCI: 00:15.1 cmd <- 02
1440 15:40:21.518077 PCI: 00:16.0 subsystem <- 8086/02e0
1441 15:40:21.521293 PCI: 00:16.0 cmd <- 02
1442 15:40:21.524127 PCI: 00:17.0 subsystem <- 8086/02d3
1443 15:40:21.527419 PCI: 00:17.0 cmd <- 03
1444 15:40:21.530907 PCI: 00:19.0 subsystem <- 8086/02c5
1445 15:40:21.534127 PCI: 00:19.0 cmd <- 02
1446 15:40:21.537288 PCI: 00:1d.0 bridge ctrl <- 0013
1447 15:40:21.540524 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 15:40:21.543749 PCI: 00:1d.0 cmd <- 06
1449 15:40:21.546887 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 15:40:21.546973 PCI: 00:1e.0 cmd <- 06
1451 15:40:21.553556 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 15:40:21.553646 PCI: 00:1e.2 cmd <- 06
1453 15:40:21.560002 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 15:40:21.560090 PCI: 00:1e.3 cmd <- 02
1455 15:40:21.563258 PCI: 00:1f.0 subsystem <- 8086/0284
1456 15:40:21.566916 PCI: 00:1f.0 cmd <- 407
1457 15:40:21.570033 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 15:40:21.573213 PCI: 00:1f.3 cmd <- 02
1459 15:40:21.576289 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 15:40:21.579954 PCI: 00:1f.4 cmd <- 03
1461 15:40:21.583055 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 15:40:21.586216 PCI: 00:1f.5 cmd <- 406
1463 15:40:21.594923 PCI: 01:00.0 cmd <- 02
1464 15:40:21.600381 done.
1465 15:40:21.612783 ME: Version: 14.0.39.1367
1466 15:40:21.619438 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1467 15:40:21.622667 Initializing devices...
1468 15:40:21.622759 Root Device init ...
1469 15:40:21.629204 Chrome EC: Set SMI mask to 0x0000000000000000
1470 15:40:21.635813 Chrome EC: clear events_b mask to 0x0000000000000000
1471 15:40:21.639089 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 15:40:21.645696 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 15:40:21.652203 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 15:40:21.654990 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 15:40:21.661796 Root Device init finished in 35260 usecs
1476 15:40:21.665079 CPU_CLUSTER: 0 init ...
1477 15:40:21.668214 CPU_CLUSTER: 0 init finished in 2448 usecs
1478 15:40:21.674086 PCI: 00:00.0 init ...
1479 15:40:21.677084 CPU TDP: 15 Watts
1480 15:40:21.680410 CPU PL2 = 64 Watts
1481 15:40:21.683408 PCI: 00:00.0 init finished in 7075 usecs
1482 15:40:21.687037 PCI: 00:02.0 init ...
1483 15:40:21.690235 PCI: 00:02.0 init finished in 2253 usecs
1484 15:40:21.693455 PCI: 00:08.0 init ...
1485 15:40:21.696736 PCI: 00:08.0 init finished in 2253 usecs
1486 15:40:21.700067 PCI: 00:12.0 init ...
1487 15:40:21.703336 PCI: 00:12.0 init finished in 2253 usecs
1488 15:40:21.706614 PCI: 00:14.0 init ...
1489 15:40:21.709383 PCI: 00:14.0 init finished in 2253 usecs
1490 15:40:21.713138 PCI: 00:14.2 init ...
1491 15:40:21.715913 PCI: 00:14.2 init finished in 2253 usecs
1492 15:40:21.719215 PCI: 00:14.3 init ...
1493 15:40:21.722512 PCI: 00:14.3 init finished in 2269 usecs
1494 15:40:21.726319 PCI: 00:15.0 init ...
1495 15:40:21.729493 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 15:40:21.736068 PCI: 00:15.0 init finished in 5979 usecs
1497 15:40:21.736156 PCI: 00:15.1 init ...
1498 15:40:21.742553 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 15:40:21.745930 PCI: 00:15.1 init finished in 5968 usecs
1500 15:40:21.749253 PCI: 00:16.0 init ...
1501 15:40:21.752454 PCI: 00:16.0 init finished in 2243 usecs
1502 15:40:21.755807 PCI: 00:19.0 init ...
1503 15:40:21.758520 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 15:40:21.761726 PCI: 00:19.0 init finished in 5979 usecs
1505 15:40:21.765231 PCI: 00:1d.0 init ...
1506 15:40:21.768313 Initializing PCH PCIe bridge.
1507 15:40:21.772025 PCI: 00:1d.0 init finished in 5277 usecs
1508 15:40:21.775806 PCI: 00:1f.0 init ...
1509 15:40:21.778913 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 15:40:21.785408 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 15:40:21.785495 IOAPIC: ID = 0x02
1512 15:40:21.788532 IOAPIC: Dumping registers
1513 15:40:21.791879 reg 0x0000: 0x02000000
1514 15:40:21.795204 reg 0x0001: 0x00770020
1515 15:40:21.798497 reg 0x0002: 0x00000000
1516 15:40:21.801749 PCI: 00:1f.0 init finished in 23546 usecs
1517 15:40:21.804900 PCI: 00:1f.4 init ...
1518 15:40:21.808275 PCI: 00:1f.4 init finished in 2262 usecs
1519 15:40:21.819736 PCI: 01:00.0 init ...
1520 15:40:21.822983 PCI: 01:00.0 init finished in 2251 usecs
1521 15:40:21.827772 PNP: 0c09.0 init ...
1522 15:40:21.833862 Google Chrome EC uptime: 11.061 seconds
1523 15:40:21.837117 Google Chrome AP resets since EC boot: 0
1524 15:40:21.840663 Google Chrome most recent AP reset causes:
1525 15:40:21.846869 Google Chrome EC reset flags at last EC boot: reset-pin
1526 15:40:21.850318 PNP: 0c09.0 init finished in 20601 usecs
1527 15:40:21.853541 Devices initialized
1528 15:40:21.856969 Show all devs... After init.
1529 15:40:21.857055 Root Device: enabled 1
1530 15:40:21.859755 CPU_CLUSTER: 0: enabled 1
1531 15:40:21.863128 DOMAIN: 0000: enabled 1
1532 15:40:21.866341 APIC: 00: enabled 1
1533 15:40:21.866427 PCI: 00:00.0: enabled 1
1534 15:40:21.869617 PCI: 00:02.0: enabled 1
1535 15:40:21.873264 PCI: 00:04.0: enabled 0
1536 15:40:21.876479 PCI: 00:05.0: enabled 0
1537 15:40:21.876592 PCI: 00:12.0: enabled 1
1538 15:40:21.879921 PCI: 00:12.5: enabled 0
1539 15:40:21.883213 PCI: 00:12.6: enabled 0
1540 15:40:21.883300 PCI: 00:14.0: enabled 1
1541 15:40:21.886470 PCI: 00:14.1: enabled 0
1542 15:40:21.889487 PCI: 00:14.3: enabled 1
1543 15:40:21.892607 PCI: 00:14.5: enabled 0
1544 15:40:21.892697 PCI: 00:15.0: enabled 1
1545 15:40:21.895894 PCI: 00:15.1: enabled 1
1546 15:40:21.899165 PCI: 00:15.2: enabled 0
1547 15:40:21.902487 PCI: 00:15.3: enabled 0
1548 15:40:21.902606 PCI: 00:16.0: enabled 1
1549 15:40:21.905852 PCI: 00:16.1: enabled 0
1550 15:40:21.909058 PCI: 00:16.2: enabled 0
1551 15:40:21.912314 PCI: 00:16.3: enabled 0
1552 15:40:21.912430 PCI: 00:16.4: enabled 0
1553 15:40:21.915593 PCI: 00:16.5: enabled 0
1554 15:40:21.918832 PCI: 00:17.0: enabled 1
1555 15:40:21.922174 PCI: 00:19.0: enabled 1
1556 15:40:21.922282 PCI: 00:19.1: enabled 0
1557 15:40:21.925470 PCI: 00:19.2: enabled 0
1558 15:40:21.928659 PCI: 00:1a.0: enabled 0
1559 15:40:21.931973 PCI: 00:1c.0: enabled 0
1560 15:40:21.932062 PCI: 00:1c.1: enabled 0
1561 15:40:21.935134 PCI: 00:1c.2: enabled 0
1562 15:40:21.938429 PCI: 00:1c.3: enabled 0
1563 15:40:21.941756 PCI: 00:1c.4: enabled 0
1564 15:40:21.941864 PCI: 00:1c.5: enabled 0
1565 15:40:21.945016 PCI: 00:1c.6: enabled 0
1566 15:40:21.948217 PCI: 00:1c.7: enabled 0
1567 15:40:21.951650 PCI: 00:1d.0: enabled 1
1568 15:40:21.951788 PCI: 00:1d.1: enabled 0
1569 15:40:21.954384 PCI: 00:1d.2: enabled 0
1570 15:40:21.957576 PCI: 00:1d.3: enabled 0
1571 15:40:21.961406 PCI: 00:1d.4: enabled 0
1572 15:40:21.961493 PCI: 00:1d.5: enabled 0
1573 15:40:21.964076 PCI: 00:1e.0: enabled 1
1574 15:40:21.967445 PCI: 00:1e.1: enabled 0
1575 15:40:21.970753 PCI: 00:1e.2: enabled 1
1576 15:40:21.970841 PCI: 00:1e.3: enabled 1
1577 15:40:21.974298 PCI: 00:1f.0: enabled 1
1578 15:40:21.977455 PCI: 00:1f.1: enabled 0
1579 15:40:21.980582 PCI: 00:1f.2: enabled 0
1580 15:40:21.980673 PCI: 00:1f.3: enabled 1
1581 15:40:21.983682 PCI: 00:1f.4: enabled 1
1582 15:40:21.986951 PCI: 00:1f.5: enabled 1
1583 15:40:21.990105 PCI: 00:1f.6: enabled 0
1584 15:40:21.990207 USB0 port 0: enabled 1
1585 15:40:21.993671 I2C: 01:15: enabled 1
1586 15:40:21.996928 I2C: 02:5d: enabled 1
1587 15:40:21.997017 GENERIC: 0.0: enabled 1
1588 15:40:22.000237 I2C: 03:1a: enabled 1
1589 15:40:22.003509 I2C: 03:38: enabled 1
1590 15:40:22.003611 I2C: 03:39: enabled 1
1591 15:40:22.006775 I2C: 03:3a: enabled 1
1592 15:40:22.009968 I2C: 03:3b: enabled 1
1593 15:40:22.013201 PCI: 00:00.0: enabled 1
1594 15:40:22.013326 SPI: 00: enabled 1
1595 15:40:22.016464 SPI: 01: enabled 1
1596 15:40:22.016559 PNP: 0c09.0: enabled 1
1597 15:40:22.019874 USB2 port 0: enabled 1
1598 15:40:22.023029 USB2 port 1: enabled 1
1599 15:40:22.026310 USB2 port 2: enabled 0
1600 15:40:22.026402 USB2 port 3: enabled 0
1601 15:40:22.029652 USB2 port 5: enabled 0
1602 15:40:22.032772 USB2 port 6: enabled 1
1603 15:40:22.036154 USB2 port 9: enabled 1
1604 15:40:22.036245 USB3 port 0: enabled 1
1605 15:40:22.039441 USB3 port 1: enabled 1
1606 15:40:22.042825 USB3 port 2: enabled 1
1607 15:40:22.042911 USB3 port 3: enabled 1
1608 15:40:22.046123 USB3 port 4: enabled 0
1609 15:40:22.049410 APIC: 03: enabled 1
1610 15:40:22.049509 APIC: 01: enabled 1
1611 15:40:22.052647 APIC: 02: enabled 1
1612 15:40:22.055989 APIC: 05: enabled 1
1613 15:40:22.056091 APIC: 04: enabled 1
1614 15:40:22.059284 APIC: 07: enabled 1
1615 15:40:22.059364 APIC: 06: enabled 1
1616 15:40:22.062733 PCI: 00:08.0: enabled 1
1617 15:40:22.065909 PCI: 00:14.2: enabled 1
1618 15:40:22.068589 PCI: 01:00.0: enabled 1
1619 15:40:22.072586 Disabling ACPI via APMC:
1620 15:40:22.075772 done.
1621 15:40:22.078995 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 15:40:22.082116 ELOG: NV offset 0xaf0000 size 0x4000
1623 15:40:22.089095 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 15:40:22.095939 ELOG: Event(17) added with size 13 at 2022-09-30 15:40:22 UTC
1625 15:40:22.102349 ELOG: Event(92) added with size 9 at 2022-09-30 15:40:22 UTC
1626 15:40:22.109070 ELOG: Event(93) added with size 9 at 2022-09-30 15:40:22 UTC
1627 15:40:22.115601 ELOG: Event(9A) added with size 9 at 2022-09-30 15:40:22 UTC
1628 15:40:22.121672 ELOG: Event(9E) added with size 10 at 2022-09-30 15:40:22 UTC
1629 15:40:22.128595 ELOG: Event(16) added with size 11 at 2022-09-30 15:40:22 UTC
1630 15:40:22.131345 Erasing flash addr af0000 + 4 KiB
1631 15:40:22.203821 ELOG: Event(9F) added with size 14 at 2022-09-30 15:40:22 UTC
1632 15:40:22.210202 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 63
1633 15:40:22.216763 ELOG: Event(A1) added with size 10 at 2022-09-30 15:40:22 UTC
1634 15:40:22.223322 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1635 15:40:22.229932 ELOG: Event(A0) added with size 9 at 2022-09-30 15:40:22 UTC
1636 15:40:22.236387 elog_add_boot_reason: Logged dev mode boot
1637 15:40:22.236490 Finalize devices...
1638 15:40:22.239651 PCI: 00:17.0 final
1639 15:40:22.242442 Devices finalized
1640 15:40:22.245786 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1641 15:40:22.252261 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1642 15:40:22.256189 ME: HFSTS1 : 0x90000245
1643 15:40:22.258831 ME: HFSTS2 : 0x3B850126
1644 15:40:22.265647 ME: HFSTS3 : 0x00000020
1645 15:40:22.268725 ME: HFSTS4 : 0x00004800
1646 15:40:22.272137 ME: HFSTS5 : 0x00000000
1647 15:40:22.275452 ME: HFSTS6 : 0x40400006
1648 15:40:22.278642 ME: Manufacturing Mode : NO
1649 15:40:22.282063 ME: FW Partition Table : OK
1650 15:40:22.285068 ME: Bringup Loader Failure : NO
1651 15:40:22.288173 ME: Firmware Init Complete : YES
1652 15:40:22.291758 ME: Boot Options Present : NO
1653 15:40:22.294859 ME: Update In Progress : NO
1654 15:40:22.297965 ME: D0i3 Support : YES
1655 15:40:22.301087 ME: Low Power State Enabled : NO
1656 15:40:22.304572 ME: CPU Replaced : NO
1657 15:40:22.310968 ME: CPU Replacement Valid : YES
1658 15:40:22.314224 ME: Current Working State : 5
1659 15:40:22.314309 ME: Current Operation State : 1
1660 15:40:22.317873 ME: Current Operation Mode : 0
1661 15:40:22.320778 ME: Error Code : 0
1662 15:40:22.324033 ME: CPU Debug Disabled : YES
1663 15:40:22.327274 ME: TXT Support : NO
1664 15:40:22.334195 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1665 15:40:22.340827 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 15:40:22.344179 CBFS @ c08000 size 3f8000
1667 15:40:22.347348 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 15:40:22.350529 CBFS: Locating 'fallback/dsdt.aml'
1669 15:40:22.357071 CBFS: Found @ offset 10bb80 size 3fa5
1670 15:40:22.360347 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1671 15:40:22.363646 CBFS @ c08000 size 3f8000
1672 15:40:22.370300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1673 15:40:22.373665 CBFS: Locating 'fallback/slic'
1674 15:40:22.376922 CBFS: 'fallback/slic' not found.
1675 15:40:22.383520 ACPI: Writing ACPI tables at 99b3e000.
1676 15:40:22.383607 ACPI: * FACS
1677 15:40:22.386309 ACPI: * DSDT
1678 15:40:22.390045 Ramoops buffer: 0x100000@0x99a3d000.
1679 15:40:22.392704 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1680 15:40:22.399574 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1681 15:40:22.402672 Google Chrome EC: version:
1682 15:40:22.405824 ro: helios_v2.0.2659-56403530b
1683 15:40:22.408899 rw: helios_v2.0.2849-c41de27e7d
1684 15:40:22.408985 running image: 1
1685 15:40:22.413629 ACPI: * FADT
1686 15:40:22.413709 SCI is IRQ9
1687 15:40:22.420136 ACPI: added table 1/32, length now 40
1688 15:40:22.420222 ACPI: * SSDT
1689 15:40:22.423427 Found 1 CPU(s) with 8 core(s) each.
1690 15:40:22.429928 Error: Could not locate 'wifi_sar' in VPD.
1691 15:40:22.433136 Checking CBFS for default SAR values
1692 15:40:22.436394 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 15:40:22.439598 CBFS @ c08000 size 3f8000
1694 15:40:22.446096 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 15:40:22.449574 CBFS: Locating 'wifi_sar_defaults.hex'
1696 15:40:22.452593 CBFS: Found @ offset 5fac0 size 77
1697 15:40:22.455808 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1698 15:40:22.462327 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1699 15:40:22.465674 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1700 15:40:22.472276 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1701 15:40:22.475634 failed to find key in VPD: dsm_calib_r0_0
1702 15:40:22.485267 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1703 15:40:22.491635 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1704 15:40:22.494986 failed to find key in VPD: dsm_calib_r0_1
1705 15:40:22.501834 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1706 15:40:22.508236 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1707 15:40:22.511466 failed to find key in VPD: dsm_calib_r0_2
1708 15:40:22.521256 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1709 15:40:22.527834 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1710 15:40:22.531203 failed to find key in VPD: dsm_calib_r0_3
1711 15:40:22.541071 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1712 15:40:22.544157 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1713 15:40:22.550742 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1714 15:40:22.554074 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1715 15:40:22.557393 EC returned error result code 1
1716 15:40:22.560591 EC returned error result code 1
1717 15:40:22.563988 EC returned error result code 1
1718 15:40:22.570700 PS2K: Bad resp from EC. Vivaldi disabled!
1719 15:40:22.573977 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1720 15:40:22.580631 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1721 15:40:22.587121 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1722 15:40:22.590511 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1723 15:40:22.596898 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1724 15:40:22.603403 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1725 15:40:22.610061 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1726 15:40:22.616161 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1727 15:40:22.619359 ACPI: added table 2/32, length now 44
1728 15:40:22.619447 ACPI: * MCFG
1729 15:40:22.623262 ACPI: added table 3/32, length now 48
1730 15:40:22.626562 ACPI: * TPM2
1731 15:40:22.629267 TPM2 log created at 99a2d000
1732 15:40:22.633099 ACPI: added table 4/32, length now 52
1733 15:40:22.633186 ACPI: * MADT
1734 15:40:22.635884 SCI is IRQ9
1735 15:40:22.639270 ACPI: added table 5/32, length now 56
1736 15:40:22.642351 current = 99b43ac0
1737 15:40:22.642454 ACPI: * DMAR
1738 15:40:22.645679 ACPI: added table 6/32, length now 60
1739 15:40:22.648924 ACPI: * IGD OpRegion
1740 15:40:22.652151 GMA: Found VBT in CBFS
1741 15:40:22.655551 GMA: Found valid VBT in CBFS
1742 15:40:22.658861 ACPI: added table 7/32, length now 64
1743 15:40:22.658945 ACPI: * HPET
1744 15:40:22.662158 ACPI: added table 8/32, length now 68
1745 15:40:22.665471 ACPI: done.
1746 15:40:22.668674 ACPI tables: 31744 bytes.
1747 15:40:22.672006 smbios_write_tables: 99a2c000
1748 15:40:22.675200 EC returned error result code 3
1749 15:40:22.678417 Couldn't obtain OEM name from CBI
1750 15:40:22.681692 Create SMBIOS type 17
1751 15:40:22.685051 PCI: 00:00.0 (Intel Cannonlake)
1752 15:40:22.685139 PCI: 00:14.3 (Intel WiFi)
1753 15:40:22.688229 SMBIOS tables: 939 bytes.
1754 15:40:22.694674 Writing table forward entry at 0x00000500
1755 15:40:22.698074 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1756 15:40:22.704503 Writing coreboot table at 0x99b62000
1757 15:40:22.707757 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1758 15:40:22.714500 1. 0000000000001000-000000000009ffff: RAM
1759 15:40:22.717644 2. 00000000000a0000-00000000000fffff: RESERVED
1760 15:40:22.720845 3. 0000000000100000-0000000099a2bfff: RAM
1761 15:40:22.727423 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1762 15:40:22.733755 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1763 15:40:22.740287 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1764 15:40:22.743672 7. 000000009a000000-000000009f7fffff: RESERVED
1765 15:40:22.746915 8. 00000000e0000000-00000000efffffff: RESERVED
1766 15:40:22.753467 9. 00000000fc000000-00000000fc000fff: RESERVED
1767 15:40:22.756661 10. 00000000fe000000-00000000fe00ffff: RESERVED
1768 15:40:22.763261 11. 00000000fed10000-00000000fed17fff: RESERVED
1769 15:40:22.766499 12. 00000000fed80000-00000000fed83fff: RESERVED
1770 15:40:22.772997 13. 00000000fed90000-00000000fed91fff: RESERVED
1771 15:40:22.776250 14. 00000000feda0000-00000000feda1fff: RESERVED
1772 15:40:22.779632 15. 0000000100000000-000000045e7fffff: RAM
1773 15:40:22.786017 Graphics framebuffer located at 0xc0000000
1774 15:40:22.789847 Passing 5 GPIOs to payload:
1775 15:40:22.793026 NAME | PORT | POLARITY | VALUE
1776 15:40:22.799112 write protect | undefined | high | low
1777 15:40:22.802370 lid | undefined | high | high
1778 15:40:22.809182 power | undefined | high | low
1779 15:40:22.815390 oprom | undefined | high | low
1780 15:40:22.818550 EC in RW | 0x000000cb | high | low
1781 15:40:22.822413 Board ID: 4
1782 15:40:22.825638 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1783 15:40:22.828937 CBFS @ c08000 size 3f8000
1784 15:40:22.834848 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1785 15:40:22.841460 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1786 15:40:22.844637 coreboot table: 1492 bytes.
1787 15:40:22.848480 IMD ROOT 0. 99fff000 00001000
1788 15:40:22.851202 IMD SMALL 1. 99ffe000 00001000
1789 15:40:22.854334 FSP MEMORY 2. 99c4e000 003b0000
1790 15:40:22.857696 CONSOLE 3. 99c2e000 00020000
1791 15:40:22.861063 FMAP 4. 99c2d000 0000054e
1792 15:40:22.864178 TIME STAMP 5. 99c2c000 00000910
1793 15:40:22.867441 VBOOT WORK 6. 99c18000 00014000
1794 15:40:22.870938 MRC DATA 7. 99c16000 00001958
1795 15:40:22.874132 ROMSTG STCK 8. 99c15000 00001000
1796 15:40:22.877370 AFTER CAR 9. 99c0b000 0000a000
1797 15:40:22.880676 RAMSTAGE 10. 99baf000 0005c000
1798 15:40:22.884020 REFCODE 11. 99b7a000 00035000
1799 15:40:22.887237 SMM BACKUP 12. 99b6a000 00010000
1800 15:40:22.890640 COREBOOT 13. 99b62000 00008000
1801 15:40:22.893958 ACPI 14. 99b3e000 00024000
1802 15:40:22.897394 ACPI GNVS 15. 99b3d000 00001000
1803 15:40:22.900345 RAMOOPS 16. 99a3d000 00100000
1804 15:40:22.903563 TPM2 TCGLOG17. 99a2d000 00010000
1805 15:40:22.906825 SMBIOS 18. 99a2c000 00000800
1806 15:40:22.910003 IMD small region:
1807 15:40:22.913172 IMD ROOT 0. 99ffec00 00000400
1808 15:40:22.916257 FSP RUNTIME 1. 99ffebe0 00000004
1809 15:40:22.920010 EC HOSTEVENT 2. 99ffebc0 00000008
1810 15:40:22.923282 POWER STATE 3. 99ffeb80 00000040
1811 15:40:22.926065 ROMSTAGE 4. 99ffeb60 00000004
1812 15:40:22.929866 MEM INFO 5. 99ffe9a0 000001b9
1813 15:40:22.932682 VPD 6. 99ffe920 0000006c
1814 15:40:22.936463 MTRR: Physical address space:
1815 15:40:22.942499 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1816 15:40:22.949185 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1817 15:40:22.955656 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1818 15:40:22.962362 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1819 15:40:22.968635 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1820 15:40:22.971956 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1821 15:40:22.978518 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1822 15:40:22.985198 MTRR: Fixed MSR 0x250 0x0606060606060606
1823 15:40:22.988476 MTRR: Fixed MSR 0x258 0x0606060606060606
1824 15:40:22.991837 MTRR: Fixed MSR 0x259 0x0000000000000000
1825 15:40:22.995036 MTRR: Fixed MSR 0x268 0x0606060606060606
1826 15:40:23.001452 MTRR: Fixed MSR 0x269 0x0606060606060606
1827 15:40:23.004661 MTRR: Fixed MSR 0x26a 0x0606060606060606
1828 15:40:23.007959 MTRR: Fixed MSR 0x26b 0x0606060606060606
1829 15:40:23.011084 MTRR: Fixed MSR 0x26c 0x0606060606060606
1830 15:40:23.018082 MTRR: Fixed MSR 0x26d 0x0606060606060606
1831 15:40:23.021018 MTRR: Fixed MSR 0x26e 0x0606060606060606
1832 15:40:23.024283 MTRR: Fixed MSR 0x26f 0x0606060606060606
1833 15:40:23.027545 call enable_fixed_mtrr()
1834 15:40:23.030714 CPU physical address size: 39 bits
1835 15:40:23.037311 MTRR: default type WB/UC MTRR counts: 6/8.
1836 15:40:23.040674 MTRR: WB selected as default type.
1837 15:40:23.047198 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1838 15:40:23.053813 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1839 15:40:23.056863 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1840 15:40:23.063426 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 15:40:23.069945 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1842 15:40:23.076598 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1843 15:40:23.082654 MTRR: Fixed MSR 0x250 0x0606060606060606
1844 15:40:23.086027 MTRR: Fixed MSR 0x258 0x0606060606060606
1845 15:40:23.089221 MTRR: Fixed MSR 0x259 0x0000000000000000
1846 15:40:23.092606 MTRR: Fixed MSR 0x268 0x0606060606060606
1847 15:40:23.099133 MTRR: Fixed MSR 0x269 0x0606060606060606
1848 15:40:23.102806 MTRR: Fixed MSR 0x26a 0x0606060606060606
1849 15:40:23.106008 MTRR: Fixed MSR 0x26b 0x0606060606060606
1850 15:40:23.112285 MTRR: Fixed MSR 0x26c 0x0606060606060606
1851 15:40:23.115639 MTRR: Fixed MSR 0x26d 0x0606060606060606
1852 15:40:23.118889 MTRR: Fixed MSR 0x26e 0x0606060606060606
1853 15:40:23.121998 MTRR: Fixed MSR 0x26f 0x0606060606060606
1854 15:40:23.122084
1855 15:40:23.125488 MTRR check
1856 15:40:23.128644 Fixed MTRRs : Enabled
1857 15:40:23.128735 Variable MTRRs: Enabled
1858 15:40:23.128841
1859 15:40:23.132033 call enable_fixed_mtrr()
1860 15:40:23.138503 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1861 15:40:23.141978 CPU physical address size: 39 bits
1862 15:40:23.145010 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1863 15:40:23.151585 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 15:40:23.154843 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 15:40:23.158117 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 15:40:23.161375 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 15:40:23.167485 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 15:40:23.170782 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 15:40:23.174621 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 15:40:23.177885 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 15:40:23.184042 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 15:40:23.187115 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 15:40:23.190950 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 15:40:23.197495 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 15:40:23.197580 call enable_fixed_mtrr()
1876 15:40:23.203906 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 15:40:23.207047 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 15:40:23.210286 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 15:40:23.213489 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 15:40:23.219934 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 15:40:23.223732 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 15:40:23.226833 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 15:40:23.229918 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 15:40:23.236505 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 15:40:23.239865 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 15:40:23.243044 CPU physical address size: 39 bits
1887 15:40:23.246301 call enable_fixed_mtrr()
1888 15:40:23.249683 CBFS @ c08000 size 3f8000
1889 15:40:23.252471 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1890 15:40:23.259033 CBFS: Locating 'fallback/payload'
1891 15:40:23.262357 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 15:40:23.265590 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 15:40:23.268725 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 15:40:23.275421 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 15:40:23.278652 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 15:40:23.281849 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 15:40:23.285124 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 15:40:23.291737 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 15:40:23.295017 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 15:40:23.298412 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 15:40:23.301683 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 15:40:23.308178 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 15:40:23.311280 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 15:40:23.314618 call enable_fixed_mtrr()
1905 15:40:23.317760 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 15:40:23.321014 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 15:40:23.324511 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 15:40:23.331122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 15:40:23.334384 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 15:40:23.337073 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 15:40:23.343743 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 15:40:23.347110 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 15:40:23.350394 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 15:40:23.353518 CPU physical address size: 39 bits
1915 15:40:23.356847 call enable_fixed_mtrr()
1916 15:40:23.360033 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 15:40:23.366438 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 15:40:23.369766 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 15:40:23.373019 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 15:40:23.376150 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 15:40:23.382797 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 15:40:23.386031 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 15:40:23.389342 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 15:40:23.392635 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 15:40:23.399230 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 15:40:23.402510 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 15:40:23.405791 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 15:40:23.408986 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 15:40:23.415942 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 15:40:23.418674 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 15:40:23.422494 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 15:40:23.425694 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 15:40:23.432013 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 15:40:23.435337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 15:40:23.438570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 15:40:23.442049 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 15:40:23.448369 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 15:40:23.451667 call enable_fixed_mtrr()
1939 15:40:23.451755 call enable_fixed_mtrr()
1940 15:40:23.454974 CPU physical address size: 39 bits
1941 15:40:23.460934 CPU physical address size: 39 bits
1942 15:40:23.464319 CPU physical address size: 39 bits
1943 15:40:23.467646 CBFS: Found @ offset 1c96c0 size 3f798
1944 15:40:23.470855 CPU physical address size: 39 bits
1945 15:40:23.474122 Checking segment from ROM address 0xffdd16f8
1946 15:40:23.480513 Checking segment from ROM address 0xffdd1714
1947 15:40:23.483800 Loading segment from ROM address 0xffdd16f8
1948 15:40:23.487121 code (compression=0)
1949 15:40:23.493674 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1950 15:40:23.503331 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1951 15:40:23.506694 it's not compressed!
1952 15:40:23.598657 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1953 15:40:23.604709 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1954 15:40:23.607653 Loading segment from ROM address 0xffdd1714
1955 15:40:23.611415 Entry Point 0x30000000
1956 15:40:23.614602 Loaded segments
1957 15:40:23.620321 Finalizing chipset.
1958 15:40:23.623634 Finalizing SMM.
1959 15:40:23.626365 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1960 15:40:23.630105 mp_park_aps done after 0 msecs.
1961 15:40:23.636407 Jumping to boot code at 30000000(99b62000)
1962 15:40:23.642939 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1963 15:40:23.643027
1964 15:40:23.646074 Starting depthcharge on Helios...
1965 15:40:23.646439 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1966 15:40:23.646550 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1967 15:40:23.646636 Setting prompt string to ['hatch:']
1968 15:40:23.646717 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1969 15:40:23.656111 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1970 15:40:23.662769 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1971 15:40:23.669047 board_setup: Info: eMMC controller not present; skipping
1972 15:40:23.672487 New NVMe Controller 0x30053ac0 @ 00:1d:00
1973 15:40:23.679033 board_setup: Info: SDHCI controller not present; skipping
1974 15:40:23.685522 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1975 15:40:23.685610 Wipe memory regions:
1976 15:40:23.691667 [0x00000000001000, 0x000000000a0000)
1977 15:40:23.694884 [0x00000000100000, 0x00000030000000)
1978 15:40:23.761006 [0x00000030657430, 0x00000099a2c000)
1979 15:40:23.901682 [0x00000100000000, 0x0000045e800000)
1980 15:40:25.284700 R8152: Initializing
1981 15:40:25.287919 Version 9 (ocp_data = 6010)
1982 15:40:25.292492 R8152: Done initializing
1983 15:40:25.295377 Adding net device
1984 15:40:25.792189 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1985 15:40:25.792332
1986 15:40:25.792654 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1988 15:40:25.893452 hatch: tftpboot 192.168.201.1 7463436/tftp-deploy-vdo0h6sq/kernel/bzImage 7463436/tftp-deploy-vdo0h6sq/kernel/cmdline 7463436/tftp-deploy-vdo0h6sq/ramdisk/ramdisk.cpio.gz
1989 15:40:25.893628 Setting prompt string to 'Starting kernel'
1990 15:40:25.893707 Setting prompt string to ['Starting kernel']
1991 15:40:25.893781 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1992 15:40:25.893870 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
1993 15:40:25.897931 tftpboot 192.168.201.1 7463436/tftp-deploy-vdo0h6sq/kernel/bzImoy-vdo0h6sq/kernel/cmdline 7463436/tftp-deploy-vdo0h6sq/ramdisk/ramdisk.cpio.gz
1994 15:40:25.898023 Waiting for link
1995 15:40:26.099068 done.
1996 15:40:26.099239 MAC: 88:54:1f:0f:6e:7d
1997 15:40:26.102577 Sending DHCP discover... done.
1998 15:40:26.105405 Waiting for reply... done.
1999 15:40:26.108707 Sending DHCP request... done.
2000 15:40:26.112367 Waiting for reply... done.
2001 15:40:26.115636 My ip is 192.168.201.15
2002 15:40:26.118781 The DHCP server ip is 192.168.201.1
2003 15:40:26.122174 TFTP server IP predefined by user: 192.168.201.1
2004 15:40:26.128444 Bootfile predefined by user: 7463436/tftp-deploy-vdo0h6sq/kernel/bzImage
2005 15:40:26.135102 Sending tftp read request... done.
2006 15:40:26.138516 Waiting for the transfer...
2007 15:40:26.402696 00000000 ################################################################
2008 15:40:26.658563 00080000 ################################################################
2009 15:40:26.884879 00100000 ################################################################
2010 15:40:27.113263 00180000 ################################################################
2011 15:40:27.333321 00200000 ################################################################
2012 15:40:27.556525 00280000 ################################################################
2013 15:40:27.774635 00300000 ################################################################
2014 15:40:28.001546 00380000 ################################################################
2015 15:40:28.236235 00400000 ################################################################
2016 15:40:28.466606 00480000 ################################################################
2017 15:40:28.709853 00500000 ################################################################
2018 15:40:28.933883 00580000 ################################################################
2019 15:40:29.164652 00600000 ################################################################
2020 15:40:29.300003 00680000 ###################################### done.
2021 15:40:29.303211 The bootfile was 7126928 bytes long.
2022 15:40:29.306521 Sending tftp read request... done.
2023 15:40:29.309806 Waiting for the transfer...
2024 15:40:29.534363 00000000 ################################################################
2025 15:40:29.751649 00080000 ################################################################
2026 15:40:29.966822 00100000 ################################################################
2027 15:40:30.181710 00180000 ################################################################
2028 15:40:30.402340 00200000 ################################################################
2029 15:40:30.621468 00280000 ################################################################
2030 15:40:30.844579 00300000 ################################################################
2031 15:40:31.089493 00380000 ################################################################
2032 15:40:31.331702 00400000 ################################################################
2033 15:40:31.567228 00480000 ################################################################
2034 15:40:31.801659 00500000 ################################################################
2035 15:40:32.040916 00580000 ################################################################
2036 15:40:32.286640 00600000 ################################################################
2037 15:40:32.504872 00680000 ################################################################
2038 15:40:32.718411 00700000 ################################################################
2039 15:40:32.938981 00780000 ################################################################
2040 15:40:33.002990 00800000 #################### done.
2041 15:40:33.006243 Sending tftp read request... done.
2042 15:40:33.009551 Waiting for the transfer...
2043 15:40:33.012958 00000000 # done.
2044 15:40:33.019592 Command line loaded dynamically from TFTP file: 7463436/tftp-deploy-vdo0h6sq/kernel/cmdline
2045 15:40:33.039324 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2046 15:40:33.042663 ec_init(0): CrosEC protocol v3 supported (256, 256)
2047 15:40:33.051763 Shutting down all USB controllers.
2048 15:40:33.051850 Removing current net device
2049 15:40:33.059375 Finalizing coreboot
2050 15:40:33.066041 Exiting depthcharge with code 4 at timestamp: 16783177
2051 15:40:33.066127
2052 15:40:33.066195 Starting kernel ...
2053 15:40:33.066257
2054 15:40:33.066317
2055 15:40:33.066685 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2056 15:40:33.066783 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2057 15:40:33.066860 Setting prompt string to ['Linux version [0-9]']
2058 15:40:33.066934 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 15:40:33.067005 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2061 15:45:04.067031 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2063 15:45:04.067247 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2065 15:45:04.067404 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2068 15:45:04.067663 end: 2 depthcharge-action (duration 00:05:00) [common]
2070 15:45:04.067897 Cleaning after the job
2071 15:45:04.067978 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/ramdisk
2072 15:45:04.068788 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/kernel
2073 15:45:04.069438 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463436/tftp-deploy-vdo0h6sq/modules
2074 15:45:04.069681 start: 5.1 power-off (timeout 00:00:30) [common]
2075 15:45:04.069863 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2076 15:45:04.089287 >> Command sent successfully.
2077 15:45:04.091283 Returned 0 in 0 seconds
2078 15:45:04.192043 end: 5.1 power-off (duration 00:00:00) [common]
2080 15:45:04.192378 start: 5.2 read-feedback (timeout 00:10:00) [common]
2081 15:45:04.192615 Listened to connection for namespace 'common' for up to 1s
2082 15:45:05.196792 Finalising connection for namespace 'common'
2083 15:45:05.196987 Disconnecting from shell: Finalise
2084 15:45:05.297738 end: 5.2 read-feedback (duration 00:00:01) [common]
2085 15:45:05.297895 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463436
2086 15:45:05.302805 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463436
2087 15:45:05.302939 JobError: Your job cannot terminate cleanly.