Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:39:47.495596 lava-dispatcher, installed at version: 2022.06
2 15:39:47.495798 start: 0 validate
3 15:39:47.495936 Start time: 2022-09-30 15:39:47.495927+00:00 (UTC)
4 15:39:47.496071 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:39:47.496199 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220919.0%2Fx86%2Frootfs.cpio.gz exists
6 15:39:47.499434 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:39:47.499596 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:39:49.502788 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:39:49.503034 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:39:49.513474 validate duration: 2.02
12 15:39:49.513751 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:39:49.513863 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:39:49.513965 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:39:49.514065 Not decompressing ramdisk as can be used compressed.
16 15:39:49.514152 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220919.0/x86/rootfs.cpio.gz
17 15:39:49.514221 saving as /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/ramdisk/rootfs.cpio.gz
18 15:39:49.514283 total size: 8415689 (8MB)
19 15:39:49.536941 progress 0% (0MB)
20 15:39:49.603295 progress 5% (0MB)
21 15:39:49.666293 progress 10% (0MB)
22 15:39:49.709188 progress 15% (1MB)
23 15:39:49.756064 progress 20% (1MB)
24 15:39:49.804458 progress 25% (2MB)
25 15:39:49.868177 progress 30% (2MB)
26 15:39:49.919337 progress 35% (2MB)
27 15:39:50.007917 progress 40% (3MB)
28 15:39:50.086275 progress 45% (3MB)
29 15:39:50.135052 progress 50% (4MB)
30 15:39:50.168373 progress 55% (4MB)
31 15:39:50.210358 progress 60% (4MB)
32 15:39:50.252127 progress 65% (5MB)
33 15:39:50.299470 progress 70% (5MB)
34 15:39:50.354748 progress 75% (6MB)
35 15:39:50.396967 progress 80% (6MB)
36 15:39:50.436480 progress 85% (6MB)
37 15:39:50.471372 progress 90% (7MB)
38 15:39:50.532912 progress 95% (7MB)
39 15:39:50.572247 progress 100% (8MB)
40 15:39:50.572738 8MB downloaded in 1.06s (7.58MB/s)
41 15:39:50.572980 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:39:50.573359 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:39:50.573494 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:39:50.573625 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:39:50.573782 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:39:50.573887 saving as /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/kernel/bzImage
48 15:39:50.573983 total size: 7126928 (6MB)
49 15:39:50.574081 No compression specified
50 15:39:50.594629 progress 0% (0MB)
51 15:39:50.626387 progress 5% (0MB)
52 15:39:50.654789 progress 10% (0MB)
53 15:39:50.691883 progress 15% (1MB)
54 15:39:50.709006 progress 20% (1MB)
55 15:39:50.731451 progress 25% (1MB)
56 15:39:50.774953 progress 30% (2MB)
57 15:39:50.818132 progress 35% (2MB)
58 15:39:50.845441 progress 40% (2MB)
59 15:39:50.889998 progress 45% (3MB)
60 15:39:50.936776 progress 50% (3MB)
61 15:39:50.974977 progress 55% (3MB)
62 15:39:51.019441 progress 60% (4MB)
63 15:39:51.055379 progress 65% (4MB)
64 15:39:51.099821 progress 70% (4MB)
65 15:39:51.136702 progress 75% (5MB)
66 15:39:51.173085 progress 80% (5MB)
67 15:39:51.217886 progress 85% (5MB)
68 15:39:51.254527 progress 90% (6MB)
69 15:39:51.299618 progress 95% (6MB)
70 15:39:51.338809 progress 100% (6MB)
71 15:39:51.339218 6MB downloaded in 0.77s (8.88MB/s)
72 15:39:51.339447 end: 1.2.1 http-download (duration 00:00:01) [common]
74 15:39:51.339835 end: 1.2 download-retry (duration 00:00:01) [common]
75 15:39:51.339968 start: 1.3 download-retry (timeout 00:09:58) [common]
76 15:39:51.340105 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 15:39:51.340260 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:39:51.340367 saving as /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/modules/modules.tar
79 15:39:51.340468 total size: 51896 (0MB)
80 15:39:51.340569 Using unxz to decompress xz
81 15:39:51.346597 progress 63% (0MB)
82 15:39:51.347205 progress 100% (0MB)
83 15:39:51.350743 0MB downloaded in 0.01s (4.82MB/s)
84 15:39:51.351111 end: 1.3.1 http-download (duration 00:00:00) [common]
86 15:39:51.351539 end: 1.3 download-retry (duration 00:00:00) [common]
87 15:39:51.351693 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 15:39:51.351838 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 15:39:51.351972 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 15:39:51.352109 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 15:39:51.352344 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi
92 15:39:51.352504 makedir: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin
93 15:39:51.352631 makedir: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/tests
94 15:39:51.352754 makedir: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/results
95 15:39:51.352911 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-add-keys
96 15:39:51.353105 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-add-sources
97 15:39:51.353283 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-background-process-start
98 15:39:51.353455 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-background-process-stop
99 15:39:51.353626 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-common-functions
100 15:39:51.353797 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-echo-ipv4
101 15:39:51.353971 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-install-packages
102 15:39:51.354146 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-installed-packages
103 15:39:51.354318 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-os-build
104 15:39:51.354492 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-probe-channel
105 15:39:51.354665 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-probe-ip
106 15:39:51.354843 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-target-ip
107 15:39:51.355017 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-target-mac
108 15:39:51.355186 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-target-storage
109 15:39:51.355361 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-case
110 15:39:51.355535 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-event
111 15:39:51.355712 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-feedback
112 15:39:51.355886 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-raise
113 15:39:51.356063 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-reference
114 15:39:51.356235 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-runner
115 15:39:51.356408 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-set
116 15:39:51.356580 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-test-shell
117 15:39:51.356760 Updating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-install-packages (oe)
118 15:39:51.356937 Updating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/bin/lava-installed-packages (oe)
119 15:39:51.357094 Creating /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/environment
120 15:39:51.357237 LAVA metadata
121 15:39:51.357354 - LAVA_JOB_ID=7463479
122 15:39:51.357463 - LAVA_DISPATCHER_IP=192.168.201.1
123 15:39:51.357639 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 15:39:51.357746 skipped lava-vland-overlay
125 15:39:51.357873 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 15:39:51.358013 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 15:39:51.358117 skipped lava-multinode-overlay
128 15:39:51.358242 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 15:39:51.358375 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 15:39:51.358497 Loading test definitions
131 15:39:51.358653 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 15:39:51.358778 Using /lava-7463479 at stage 0
133 15:39:51.359203 uuid=7463479_1.4.2.3.1 testdef=None
134 15:39:51.359339 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 15:39:51.359474 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 15:39:51.360244 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 15:39:51.360616 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 15:39:51.361510 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 15:39:51.361894 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 15:39:51.362736 runner path: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/0/tests/0_dmesg test_uuid 7463479_1.4.2.3.1
143 15:39:51.362946 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 15:39:51.363318 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 15:39:51.363433 Using /lava-7463479 at stage 1
147 15:39:51.363830 uuid=7463479_1.4.2.3.5 testdef=None
148 15:39:51.363966 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 15:39:51.364102 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 15:39:51.364800 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 15:39:51.365165 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 15:39:51.366064 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 15:39:51.366457 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 15:39:51.367324 runner path: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/1/tests/1_bootrr test_uuid 7463479_1.4.2.3.5
157 15:39:51.367534 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 15:39:51.367884 Creating lava-test-runner.conf files
160 15:39:51.367987 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/0 for stage 0
161 15:39:51.368115 - 0_dmesg
162 15:39:51.368234 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463479/lava-overlay-ra46ilhi/lava-7463479/1 for stage 1
163 15:39:51.368366 - 1_bootrr
164 15:39:51.368510 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 15:39:51.368648 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 15:39:51.377694 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 15:39:51.377905 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 15:39:51.378053 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 15:39:51.378192 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 15:39:51.378329 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 15:39:51.587582 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 15:39:51.588011 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 15:39:51.588167 extracting modules file /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463479/extract-overlay-ramdisk-bxfeiqfx/ramdisk
174 15:39:51.593970 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 15:39:51.594170 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 15:39:51.594314 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463479/compress-overlay-37c51jdh/overlay-1.4.2.4.tar.gz to ramdisk
177 15:39:51.594418 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463479/compress-overlay-37c51jdh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463479/extract-overlay-ramdisk-bxfeiqfx/ramdisk
178 15:39:51.599914 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 15:39:51.600124 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 15:39:51.600285 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 15:39:51.600430 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 15:39:51.600567 Building ramdisk /var/lib/lava/dispatcher/tmp/7463479/extract-overlay-ramdisk-bxfeiqfx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463479/extract-overlay-ramdisk-bxfeiqfx/ramdisk
183 15:39:51.671743 >> 48008 blocks
184 15:39:52.544768 rename /var/lib/lava/dispatcher/tmp/7463479/extract-overlay-ramdisk-bxfeiqfx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/ramdisk/ramdisk.cpio.gz
185 15:39:52.545303 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 15:39:52.545519 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 15:39:52.545682 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 15:39:52.545840 No mkimage arch provided, not using FIT.
189 15:39:52.546001 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 15:39:52.546143 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 15:39:52.546319 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 15:39:52.546484 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 15:39:52.546624 No LXC device requested
194 15:39:52.546769 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 15:39:52.546908 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 15:39:52.547084 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 15:39:52.547220 Checking files for TFTP limit of 4294967296 bytes.
198 15:39:52.547806 end: 1 tftp-deploy (duration 00:00:03) [common]
199 15:39:52.547967 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 15:39:52.548120 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 15:39:52.548322 substitutions:
202 15:39:52.548434 - {DTB}: None
203 15:39:52.548610 - {INITRD}: 7463479/tftp-deploy-e5zlq1e5/ramdisk/ramdisk.cpio.gz
204 15:39:52.548762 - {KERNEL}: 7463479/tftp-deploy-e5zlq1e5/kernel/bzImage
205 15:39:52.548882 - {LAVA_MAC}: None
206 15:39:52.548987 - {PRESEED_CONFIG}: None
207 15:39:52.549103 - {PRESEED_LOCAL}: None
208 15:39:52.549200 - {RAMDISK}: 7463479/tftp-deploy-e5zlq1e5/ramdisk/ramdisk.cpio.gz
209 15:39:52.549309 - {ROOT_PART}: None
210 15:39:52.549408 - {ROOT}: None
211 15:39:52.549517 - {SERVER_IP}: 192.168.201.1
212 15:39:52.549583 - {TEE}: None
213 15:39:52.549657 Parsed boot commands:
214 15:39:52.549716 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 15:39:52.549915 Parsed boot commands: tftpboot 192.168.201.1 7463479/tftp-deploy-e5zlq1e5/kernel/bzImage 7463479/tftp-deploy-e5zlq1e5/kernel/cmdline 7463479/tftp-deploy-e5zlq1e5/ramdisk/ramdisk.cpio.gz
216 15:39:52.550075 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 15:39:52.550194 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 15:39:52.550315 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 15:39:52.550425 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 15:39:52.550500 Not connected, no need to disconnect.
221 15:39:52.550596 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 15:39:52.550687 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 15:39:52.550757 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
224 15:39:52.554001 Setting prompt string to ['lava-test: # ']
225 15:39:52.554390 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 15:39:52.554519 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 15:39:52.554631 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 15:39:52.554726 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 15:39:52.554921 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
230 15:39:52.580159 >> Command sent successfully.
231 15:39:52.583109 Returned 0 in 0 seconds
232 15:39:52.683672 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 15:39:52.684354 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 15:39:52.684472 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 15:39:52.684575 Setting prompt string to 'Starting depthcharge on Voema...'
237 15:39:52.684674 Changing prompt to 'Starting depthcharge on Voema...'
238 15:39:52.684748 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 15:39:52.685074 [Enter `^Ec?' for help]
240 15:40:00.186640
241 15:40:00.186863
242 15:40:00.196586 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 15:40:00.200052 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 15:40:00.206472 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 15:40:00.209637 CPU: AES supported, TXT NOT supported, VT supported
246 15:40:00.216547 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 15:40:00.223089 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 15:40:00.226727 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 15:40:00.229859 VBOOT: Loading verstage.
250 15:40:00.233455 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 15:40:00.240077 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 15:40:00.243061 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 15:40:00.253798 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 15:40:00.260375 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 15:40:00.260558
256 15:40:00.260664
257 15:40:00.273405 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 15:40:00.287126 Probing TPM: . done!
259 15:40:00.290422 TPM ready after 0 ms
260 15:40:00.293931 Connected to device vid:did:rid of 1ae0:0028:00
261 15:40:00.305372 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 15:40:00.311789 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 15:40:00.315408 Initialized TPM device CR50 revision 0
264 15:40:00.364488 tlcl_send_startup: Startup return code is 0
265 15:40:00.364677 TPM: setup succeeded
266 15:40:00.379705 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 15:40:00.394012 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 15:40:00.406406 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 15:40:00.416827 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 15:40:00.420213 Chrome EC: UHEPI supported
271 15:40:00.423909 Phase 1
272 15:40:00.426819 FMAP: area GBB found @ 1805000 (458752 bytes)
273 15:40:00.437022 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 15:40:00.443321 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 15:40:00.449929 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 15:40:00.456489 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 15:40:00.460060 Recovery requested (1009000e)
278 15:40:00.463178 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 15:40:00.475284 tlcl_extend: response is 0
280 15:40:00.481768 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 15:40:00.491899 tlcl_extend: response is 0
282 15:40:00.498111 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 15:40:00.504740 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 15:40:00.511695 BS: verstage times (exec / console): total (unknown) / 142 ms
285 15:40:00.511875
286 15:40:00.511984
287 15:40:00.524848 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 15:40:00.531453 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 15:40:00.535075 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 15:40:00.538159 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 15:40:00.544411 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 15:40:00.547834 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 15:40:00.551469 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 15:40:00.554494 TCO_STS: 0000 0000
295 15:40:00.557960 GEN_PMCON: d0015038 00002200
296 15:40:00.560983 GBLRST_CAUSE: 00000000 00000000
297 15:40:00.564845 HPR_CAUSE0: 00000000
298 15:40:00.565007 prev_sleep_state 5
299 15:40:00.567709 Boot Count incremented to 10561
300 15:40:00.574398 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 15:40:00.580905 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 15:40:00.591113 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 15:40:00.597572 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 15:40:00.601042 Chrome EC: UHEPI supported
305 15:40:00.607372 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 15:40:00.618879 Probing TPM: done!
307 15:40:00.625170 Connected to device vid:did:rid of 1ae0:0028:00
308 15:40:00.636929 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 15:40:00.643725 Initialized TPM device CR50 revision 0
310 15:40:00.653669 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 15:40:00.660180 MRC: Hash idx 0x100b comparison successful.
312 15:40:00.663831 MRC cache found, size faa8
313 15:40:00.663990 bootmode is set to: 2
314 15:40:00.666773 SPD index = 0
315 15:40:00.673397 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 15:40:00.677026 SPD: module type is LPDDR4X
317 15:40:00.680063 SPD: module part number is MT53E512M64D4NW-046
318 15:40:00.686623 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 15:40:00.689766 SPD: device width 16 bits, bus width 16 bits
320 15:40:00.696897 SPD: module size is 1024 MB (per channel)
321 15:40:01.130591 CBMEM:
322 15:40:01.134100 IMD: root @ 0x76fff000 254 entries.
323 15:40:01.137130 IMD: root @ 0x76ffec00 62 entries.
324 15:40:01.140790 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 15:40:01.147050 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 15:40:01.150605 External stage cache:
327 15:40:01.154026 IMD: root @ 0x7b3ff000 254 entries.
328 15:40:01.156852 IMD: root @ 0x7b3fec00 62 entries.
329 15:40:01.172628 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 15:40:01.178762 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 15:40:01.185768 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 15:40:01.199977 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 15:40:01.206165 cse_lite: Skip switching to RW in the recovery path
334 15:40:01.206338 8 DIMMs found
335 15:40:01.206439 SMM Memory Map
336 15:40:01.210469 SMRAM : 0x7b000000 0x800000
337 15:40:01.213637 Subregion 0: 0x7b000000 0x200000
338 15:40:01.217332 Subregion 1: 0x7b200000 0x200000
339 15:40:01.220451 Subregion 2: 0x7b400000 0x400000
340 15:40:01.224209 top_of_ram = 0x77000000
341 15:40:01.230895 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 15:40:01.233813 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 15:40:01.240478 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 15:40:01.244047 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 15:40:01.254053 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 15:40:01.256993 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 15:40:01.269179 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 15:40:01.276024 Processing 211 relocs. Offset value of 0x74c0b000
349 15:40:01.282620 BS: romstage times (exec / console): total (unknown) / 277 ms
350 15:40:01.288972
351 15:40:01.289176
352 15:40:01.298327 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 15:40:01.302142 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 15:40:01.312047 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 15:40:01.318210 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 15:40:01.324900 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 15:40:01.331635 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 15:40:01.378554 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 15:40:01.385400 Processing 5008 relocs. Offset value of 0x75d98000
360 15:40:01.388660 BS: postcar times (exec / console): total (unknown) / 59 ms
361 15:40:01.391777
362 15:40:01.391920
363 15:40:01.402202 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 15:40:01.402382 Normal boot
365 15:40:01.405363 FW_CONFIG value is 0x804c02
366 15:40:01.408582 PCI: 00:07.0 disabled by fw_config
367 15:40:01.412228 PCI: 00:07.1 disabled by fw_config
368 15:40:01.415364 PCI: 00:0d.2 disabled by fw_config
369 15:40:01.418431 PCI: 00:1c.7 disabled by fw_config
370 15:40:01.425084 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 15:40:01.431793 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 15:40:01.434921 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 15:40:01.438311 GENERIC: 0.0 disabled by fw_config
374 15:40:01.441982 GENERIC: 1.0 disabled by fw_config
375 15:40:01.448681 fw_config match found: DB_USB=USB3_ACTIVE
376 15:40:01.451529 fw_config match found: DB_USB=USB3_ACTIVE
377 15:40:01.455206 fw_config match found: DB_USB=USB3_ACTIVE
378 15:40:01.462016 fw_config match found: DB_USB=USB3_ACTIVE
379 15:40:01.465138 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 15:40:01.471828 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 15:40:01.481404 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 15:40:01.488116 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 15:40:01.491386 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 15:40:01.498254 microcode: Update skipped, already up-to-date
385 15:40:01.505040 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 15:40:01.531933 Detected 4 core, 8 thread CPU.
387 15:40:01.535622 Setting up SMI for CPU
388 15:40:01.538565 IED base = 0x7b400000
389 15:40:01.538713 IED size = 0x00400000
390 15:40:01.542314 Will perform SMM setup.
391 15:40:01.548899 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 15:40:01.555667 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 15:40:01.562243 Processing 16 relocs. Offset value of 0x00030000
394 15:40:01.565203 Attempting to start 7 APs
395 15:40:01.568158 Waiting for 10ms after sending INIT.
396 15:40:01.584199 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 15:40:01.587828 AP: slot 5 apic_id 4.
398 15:40:01.590947 AP: slot 4 apic_id 5.
399 15:40:01.591100 AP: slot 3 apic_id 3.
400 15:40:01.593948 AP: slot 7 apic_id 2.
401 15:40:01.597759 AP: slot 2 apic_id 6.
402 15:40:01.597917 AP: slot 6 apic_id 7.
403 15:40:01.598024 done.
404 15:40:01.604077 Waiting for 2nd SIPI to complete...done.
405 15:40:01.610926 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 15:40:01.617082 Processing 13 relocs. Offset value of 0x00038000
407 15:40:01.620849 Unable to locate Global NVS
408 15:40:01.627573 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 15:40:01.630608 Installing permanent SMM handler to 0x7b000000
410 15:40:01.640347 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 15:40:01.643829 Processing 794 relocs. Offset value of 0x7b010000
412 15:40:01.653810 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 15:40:01.657252 Processing 13 relocs. Offset value of 0x7b008000
414 15:40:01.663795 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 15:40:01.670325 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 15:40:01.673752 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 15:40:01.680336 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 15:40:01.686766 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 15:40:01.693416 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 15:40:01.700213 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 15:40:01.700365 Unable to locate Global NVS
422 15:40:01.710149 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 15:40:01.713306 Clearing SMI status registers
424 15:40:01.713436 SMI_STS: PM1
425 15:40:01.716979 PM1_STS: PWRBTN
426 15:40:01.723241 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 15:40:01.726905 In relocation handler: CPU 0
428 15:40:01.730153 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 15:40:01.737004 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 15:40:01.737146 Relocation complete.
431 15:40:01.746617 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 15:40:01.749689 In relocation handler: CPU 1
433 15:40:01.753171 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 15:40:01.753354 Relocation complete.
435 15:40:01.763057 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
436 15:40:01.763248 In relocation handler: CPU 3
437 15:40:01.769992 New SMBASE=0x7afff400 IEDBASE=0x7b400000
438 15:40:01.770183 Relocation complete.
439 15:40:01.780057 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 15:40:01.780199 In relocation handler: CPU 2
441 15:40:01.786130 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 15:40:01.789684 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 15:40:01.792674 Relocation complete.
444 15:40:01.799436 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
445 15:40:01.803108 In relocation handler: CPU 4
446 15:40:01.806081 New SMBASE=0x7afff000 IEDBASE=0x7b400000
447 15:40:01.809709 Relocation complete.
448 15:40:01.816050 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
449 15:40:01.819285 In relocation handler: CPU 5
450 15:40:01.822919 New SMBASE=0x7affec00 IEDBASE=0x7b400000
451 15:40:01.829553 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 15:40:01.829713 Relocation complete.
453 15:40:01.835976 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
454 15:40:01.839572 In relocation handler: CPU 6
455 15:40:01.846266 New SMBASE=0x7affe800 IEDBASE=0x7b400000
456 15:40:01.846427 Relocation complete.
457 15:40:01.852358 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
458 15:40:01.856119 In relocation handler: CPU 7
459 15:40:01.862352 New SMBASE=0x7affe400 IEDBASE=0x7b400000
460 15:40:01.866064 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 15:40:01.869062 Relocation complete.
462 15:40:01.869214 Initializing CPU #0
463 15:40:01.872730 CPU: vendor Intel device 806c1
464 15:40:01.876228 CPU: family 06, model 8c, stepping 01
465 15:40:01.880160 Clearing out pending MCEs
466 15:40:01.884201 Setting up local APIC...
467 15:40:01.884363 apic_id: 0x00 done.
468 15:40:01.887086 Turbo is available but hidden
469 15:40:01.890684 Turbo is available and visible
470 15:40:01.896964 microcode: Update skipped, already up-to-date
471 15:40:01.897119 CPU #0 initialized
472 15:40:01.900123 Initializing CPU #1
473 15:40:01.900222 Initializing CPU #6
474 15:40:01.903783 Initializing CPU #2
475 15:40:01.906925 CPU: vendor Intel device 806c1
476 15:40:01.910131 CPU: family 06, model 8c, stepping 01
477 15:40:01.913732 Initializing CPU #7
478 15:40:01.913884 Initializing CPU #3
479 15:40:01.916825 CPU: vendor Intel device 806c1
480 15:40:01.923780 CPU: family 06, model 8c, stepping 01
481 15:40:01.923917 CPU: vendor Intel device 806c1
482 15:40:01.930423 CPU: family 06, model 8c, stepping 01
483 15:40:01.930590 Clearing out pending MCEs
484 15:40:01.933480 Clearing out pending MCEs
485 15:40:01.937219 Setting up local APIC...
486 15:40:01.940302 Initializing CPU #5
487 15:40:01.940439 Initializing CPU #4
488 15:40:01.943425 CPU: vendor Intel device 806c1
489 15:40:01.946707 CPU: family 06, model 8c, stepping 01
490 15:40:01.949711 CPU: vendor Intel device 806c1
491 15:40:01.953358 CPU: family 06, model 8c, stepping 01
492 15:40:01.956429 Clearing out pending MCEs
493 15:40:01.960129 Clearing out pending MCEs
494 15:40:01.963090 Setting up local APIC...
495 15:40:01.966921 CPU: vendor Intel device 806c1
496 15:40:01.969996 CPU: family 06, model 8c, stepping 01
497 15:40:01.973086 Clearing out pending MCEs
498 15:40:01.976194 CPU: vendor Intel device 806c1
499 15:40:01.979775 CPU: family 06, model 8c, stepping 01
500 15:40:01.983438 Setting up local APIC...
501 15:40:01.983576 Clearing out pending MCEs
502 15:40:01.986478 Setting up local APIC...
503 15:40:01.989485 Clearing out pending MCEs
504 15:40:01.992865 apic_id: 0x07 done.
505 15:40:01.993016 Setting up local APIC...
506 15:40:01.996220 Setting up local APIC...
507 15:40:01.999471 apic_id: 0x04 done.
508 15:40:01.999632 apic_id: 0x05 done.
509 15:40:02.006465 microcode: Update skipped, already up-to-date
510 15:40:02.009578 microcode: Update skipped, already up-to-date
511 15:40:02.012805 CPU #5 initialized
512 15:40:02.012996 apic_id: 0x06 done.
513 15:40:02.019803 microcode: Update skipped, already up-to-date
514 15:40:02.022917 microcode: Update skipped, already up-to-date
515 15:40:02.025974 CPU #6 initialized
516 15:40:02.026163 CPU #2 initialized
517 15:40:02.029815 CPU #4 initialized
518 15:40:02.032756 apic_id: 0x01 done.
519 15:40:02.032880 Setting up local APIC...
520 15:40:02.039525 microcode: Update skipped, already up-to-date
521 15:40:02.039669 apic_id: 0x03 done.
522 15:40:02.042748 apic_id: 0x02 done.
523 15:40:02.046005 microcode: Update skipped, already up-to-date
524 15:40:02.052823 microcode: Update skipped, already up-to-date
525 15:40:02.052962 CPU #3 initialized
526 15:40:02.055814 CPU #7 initialized
527 15:40:02.058917 CPU #1 initialized
528 15:40:02.062493 bsp_do_flight_plan done after 454 msecs.
529 15:40:02.065485 CPU: frequency set to 4000 MHz
530 15:40:02.065593 Enabling SMIs.
531 15:40:02.072482 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 15:40:02.088938 SATAXPCIE1 indicates PCIe NVMe is present
533 15:40:02.092015 Probing TPM: done!
534 15:40:02.095795 Connected to device vid:did:rid of 1ae0:0028:00
535 15:40:02.106425 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 15:40:02.109636 Initialized TPM device CR50 revision 0
537 15:40:02.113241 Enabling S0i3.4
538 15:40:02.119513 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 15:40:02.122795 Found a VBT of 8704 bytes after decompression
540 15:40:02.129529 cse_lite: CSE RO boot. HybridStorageMode disabled
541 15:40:02.135896 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 15:40:02.211529 FSPS returned 0
543 15:40:02.214874 Executing Phase 1 of FspMultiPhaseSiInit
544 15:40:02.224811 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 15:40:02.227873 port C0 DISC req: usage 1 usb3 1 usb2 5
546 15:40:02.231511 Raw Buffer output 0 00000511
547 15:40:02.234917 Raw Buffer output 1 00000000
548 15:40:02.238563 pmc_send_ipc_cmd succeeded
549 15:40:02.244917 port C1 DISC req: usage 1 usb3 2 usb2 3
550 15:40:02.245063 Raw Buffer output 0 00000321
551 15:40:02.248716 Raw Buffer output 1 00000000
552 15:40:02.252465 pmc_send_ipc_cmd succeeded
553 15:40:02.258224 Detected 4 core, 8 thread CPU.
554 15:40:02.261424 Detected 4 core, 8 thread CPU.
555 15:40:02.495416 Display FSP Version Info HOB
556 15:40:02.499186 Reference Code - CPU = a.0.4c.31
557 15:40:02.502281 uCode Version = 0.0.0.86
558 15:40:02.505562 TXT ACM version = ff.ff.ff.ffff
559 15:40:02.508731 Reference Code - ME = a.0.4c.31
560 15:40:02.512169 MEBx version = 0.0.0.0
561 15:40:02.515799 ME Firmware Version = Consumer SKU
562 15:40:02.518968 Reference Code - PCH = a.0.4c.31
563 15:40:02.522018 PCH-CRID Status = Disabled
564 15:40:02.525541 PCH-CRID Original Value = ff.ff.ff.ffff
565 15:40:02.528746 PCH-CRID New Value = ff.ff.ff.ffff
566 15:40:02.531853 OPROM - RST - RAID = ff.ff.ff.ffff
567 15:40:02.535511 PCH Hsio Version = 4.0.0.0
568 15:40:02.538698 Reference Code - SA - System Agent = a.0.4c.31
569 15:40:02.541882 Reference Code - MRC = 2.0.0.1
570 15:40:02.545469 SA - PCIe Version = a.0.4c.31
571 15:40:02.548687 SA-CRID Status = Disabled
572 15:40:02.551804 SA-CRID Original Value = 0.0.0.1
573 15:40:02.555500 SA-CRID New Value = 0.0.0.1
574 15:40:02.558706 OPROM - VBIOS = ff.ff.ff.ffff
575 15:40:02.561888 IO Manageability Engine FW Version = 11.1.4.0
576 15:40:02.565561 PHY Build Version = 0.0.0.e0
577 15:40:02.568556 Thunderbolt(TM) FW Version = 0.0.0.0
578 15:40:02.575330 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 15:40:02.578428 ITSS IRQ Polarities Before:
580 15:40:02.578551 IPC0: 0xffffffff
581 15:40:02.582131 IPC1: 0xffffffff
582 15:40:02.582300 IPC2: 0xffffffff
583 15:40:02.585371 IPC3: 0xffffffff
584 15:40:02.588914 ITSS IRQ Polarities After:
585 15:40:02.589067 IPC0: 0xffffffff
586 15:40:02.592168 IPC1: 0xffffffff
587 15:40:02.592308 IPC2: 0xffffffff
588 15:40:02.595199 IPC3: 0xffffffff
589 15:40:02.598283 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 15:40:02.612081 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 15:40:02.621995 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 15:40:02.634906 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 15:40:02.641839 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
594 15:40:02.644980 Enumerating buses...
595 15:40:02.648125 Show all devs... Before device enumeration.
596 15:40:02.651888 Root Device: enabled 1
597 15:40:02.652031 DOMAIN: 0000: enabled 1
598 15:40:02.655057 CPU_CLUSTER: 0: enabled 1
599 15:40:02.658087 PCI: 00:00.0: enabled 1
600 15:40:02.661289 PCI: 00:02.0: enabled 1
601 15:40:02.661436 PCI: 00:04.0: enabled 1
602 15:40:02.664940 PCI: 00:05.0: enabled 1
603 15:40:02.668038 PCI: 00:06.0: enabled 0
604 15:40:02.671220 PCI: 00:07.0: enabled 0
605 15:40:02.671409 PCI: 00:07.1: enabled 0
606 15:40:02.674636 PCI: 00:07.2: enabled 0
607 15:40:02.678352 PCI: 00:07.3: enabled 0
608 15:40:02.678472 PCI: 00:08.0: enabled 1
609 15:40:02.681347 PCI: 00:09.0: enabled 0
610 15:40:02.684446 PCI: 00:0a.0: enabled 0
611 15:40:02.688174 PCI: 00:0d.0: enabled 1
612 15:40:02.688289 PCI: 00:0d.1: enabled 0
613 15:40:02.691490 PCI: 00:0d.2: enabled 0
614 15:40:02.694808 PCI: 00:0d.3: enabled 0
615 15:40:02.697905 PCI: 00:0e.0: enabled 0
616 15:40:02.698020 PCI: 00:10.2: enabled 1
617 15:40:02.701579 PCI: 00:10.6: enabled 0
618 15:40:02.704701 PCI: 00:10.7: enabled 0
619 15:40:02.707945 PCI: 00:12.0: enabled 0
620 15:40:02.708057 PCI: 00:12.6: enabled 0
621 15:40:02.711656 PCI: 00:13.0: enabled 0
622 15:40:02.714674 PCI: 00:14.0: enabled 1
623 15:40:02.714789 PCI: 00:14.1: enabled 0
624 15:40:02.717711 PCI: 00:14.2: enabled 1
625 15:40:02.721554 PCI: 00:14.3: enabled 1
626 15:40:02.724753 PCI: 00:15.0: enabled 1
627 15:40:02.724866 PCI: 00:15.1: enabled 1
628 15:40:02.727936 PCI: 00:15.2: enabled 1
629 15:40:02.731010 PCI: 00:15.3: enabled 1
630 15:40:02.734823 PCI: 00:16.0: enabled 1
631 15:40:02.734937 PCI: 00:16.1: enabled 0
632 15:40:02.738016 PCI: 00:16.2: enabled 0
633 15:40:02.741253 PCI: 00:16.3: enabled 0
634 15:40:02.744404 PCI: 00:16.4: enabled 0
635 15:40:02.744556 PCI: 00:16.5: enabled 0
636 15:40:02.748095 PCI: 00:17.0: enabled 1
637 15:40:02.751405 PCI: 00:19.0: enabled 0
638 15:40:02.754559 PCI: 00:19.1: enabled 1
639 15:40:02.754702 PCI: 00:19.2: enabled 0
640 15:40:02.757702 PCI: 00:1c.0: enabled 1
641 15:40:02.760897 PCI: 00:1c.1: enabled 0
642 15:40:02.761093 PCI: 00:1c.2: enabled 0
643 15:40:02.764673 PCI: 00:1c.3: enabled 0
644 15:40:02.767676 PCI: 00:1c.4: enabled 0
645 15:40:02.771350 PCI: 00:1c.5: enabled 0
646 15:40:02.771556 PCI: 00:1c.6: enabled 1
647 15:40:02.774408 PCI: 00:1c.7: enabled 0
648 15:40:02.777620 PCI: 00:1d.0: enabled 1
649 15:40:02.780701 PCI: 00:1d.1: enabled 0
650 15:40:02.780809 PCI: 00:1d.2: enabled 1
651 15:40:02.784502 PCI: 00:1d.3: enabled 0
652 15:40:02.787678 PCI: 00:1e.0: enabled 1
653 15:40:02.791298 PCI: 00:1e.1: enabled 0
654 15:40:02.791416 PCI: 00:1e.2: enabled 1
655 15:40:02.794431 PCI: 00:1e.3: enabled 1
656 15:40:02.797390 PCI: 00:1f.0: enabled 1
657 15:40:02.797494 PCI: 00:1f.1: enabled 0
658 15:40:02.801218 PCI: 00:1f.2: enabled 1
659 15:40:02.804431 PCI: 00:1f.3: enabled 1
660 15:40:02.807990 PCI: 00:1f.4: enabled 0
661 15:40:02.808111 PCI: 00:1f.5: enabled 1
662 15:40:02.811147 PCI: 00:1f.6: enabled 0
663 15:40:02.814083 PCI: 00:1f.7: enabled 0
664 15:40:02.817764 APIC: 00: enabled 1
665 15:40:02.817881 GENERIC: 0.0: enabled 1
666 15:40:02.820807 GENERIC: 0.0: enabled 1
667 15:40:02.824200 GENERIC: 1.0: enabled 1
668 15:40:02.824313 GENERIC: 0.0: enabled 1
669 15:40:02.827332 GENERIC: 1.0: enabled 1
670 15:40:02.830648 USB0 port 0: enabled 1
671 15:40:02.834323 GENERIC: 0.0: enabled 1
672 15:40:02.834441 USB0 port 0: enabled 1
673 15:40:02.837607 GENERIC: 0.0: enabled 1
674 15:40:02.840696 I2C: 00:1a: enabled 1
675 15:40:02.840857 I2C: 00:31: enabled 1
676 15:40:02.843877 I2C: 00:32: enabled 1
677 15:40:02.847023 I2C: 00:10: enabled 1
678 15:40:02.850954 I2C: 00:15: enabled 1
679 15:40:02.851102 GENERIC: 0.0: enabled 0
680 15:40:02.854101 GENERIC: 1.0: enabled 0
681 15:40:02.857277 GENERIC: 0.0: enabled 1
682 15:40:02.857420 SPI: 00: enabled 1
683 15:40:02.860362 SPI: 00: enabled 1
684 15:40:02.864055 PNP: 0c09.0: enabled 1
685 15:40:02.864193 GENERIC: 0.0: enabled 1
686 15:40:02.867293 USB3 port 0: enabled 1
687 15:40:02.870370 USB3 port 1: enabled 1
688 15:40:02.870510 USB3 port 2: enabled 0
689 15:40:02.874018 USB3 port 3: enabled 0
690 15:40:02.877214 USB2 port 0: enabled 0
691 15:40:02.880269 USB2 port 1: enabled 1
692 15:40:02.880411 USB2 port 2: enabled 1
693 15:40:02.883966 USB2 port 3: enabled 0
694 15:40:02.887126 USB2 port 4: enabled 1
695 15:40:02.887257 USB2 port 5: enabled 0
696 15:40:02.890276 USB2 port 6: enabled 0
697 15:40:02.893487 USB2 port 7: enabled 0
698 15:40:02.897403 USB2 port 8: enabled 0
699 15:40:02.897543 USB2 port 9: enabled 0
700 15:40:02.900401 USB3 port 0: enabled 0
701 15:40:02.903477 USB3 port 1: enabled 1
702 15:40:02.903622 USB3 port 2: enabled 0
703 15:40:02.907304 USB3 port 3: enabled 0
704 15:40:02.910348 GENERIC: 0.0: enabled 1
705 15:40:02.913550 GENERIC: 1.0: enabled 1
706 15:40:02.913689 APIC: 01: enabled 1
707 15:40:02.917257 APIC: 06: enabled 1
708 15:40:02.917368 APIC: 03: enabled 1
709 15:40:02.920351 APIC: 05: enabled 1
710 15:40:02.923926 APIC: 04: enabled 1
711 15:40:02.924039 APIC: 07: enabled 1
712 15:40:02.927053 APIC: 02: enabled 1
713 15:40:02.927165 Compare with tree...
714 15:40:02.930306 Root Device: enabled 1
715 15:40:02.933401 DOMAIN: 0000: enabled 1
716 15:40:02.936999 PCI: 00:00.0: enabled 1
717 15:40:02.940136 PCI: 00:02.0: enabled 1
718 15:40:02.940245 PCI: 00:04.0: enabled 1
719 15:40:02.943913 GENERIC: 0.0: enabled 1
720 15:40:02.947128 PCI: 00:05.0: enabled 1
721 15:40:02.950275 PCI: 00:06.0: enabled 0
722 15:40:02.953446 PCI: 00:07.0: enabled 0
723 15:40:02.953556 GENERIC: 0.0: enabled 1
724 15:40:02.956678 PCI: 00:07.1: enabled 0
725 15:40:02.960356 GENERIC: 1.0: enabled 1
726 15:40:02.963528 PCI: 00:07.2: enabled 0
727 15:40:02.966758 GENERIC: 0.0: enabled 1
728 15:40:02.966873 PCI: 00:07.3: enabled 0
729 15:40:02.969887 GENERIC: 1.0: enabled 1
730 15:40:02.973573 PCI: 00:08.0: enabled 1
731 15:40:02.976699 PCI: 00:09.0: enabled 0
732 15:40:02.980105 PCI: 00:0a.0: enabled 0
733 15:40:02.980214 PCI: 00:0d.0: enabled 1
734 15:40:02.983735 USB0 port 0: enabled 1
735 15:40:02.986811 USB3 port 0: enabled 1
736 15:40:02.989867 USB3 port 1: enabled 1
737 15:40:02.993625 USB3 port 2: enabled 0
738 15:40:02.993763 USB3 port 3: enabled 0
739 15:40:02.996795 PCI: 00:0d.1: enabled 0
740 15:40:02.999850 PCI: 00:0d.2: enabled 0
741 15:40:03.003118 GENERIC: 0.0: enabled 1
742 15:40:03.006931 PCI: 00:0d.3: enabled 0
743 15:40:03.007031 PCI: 00:0e.0: enabled 0
744 15:40:03.010073 PCI: 00:10.2: enabled 1
745 15:40:03.013185 PCI: 00:10.6: enabled 0
746 15:40:03.016905 PCI: 00:10.7: enabled 0
747 15:40:03.019931 PCI: 00:12.0: enabled 0
748 15:40:03.020033 PCI: 00:12.6: enabled 0
749 15:40:03.023463 PCI: 00:13.0: enabled 0
750 15:40:03.026578 PCI: 00:14.0: enabled 1
751 15:40:03.029682 USB0 port 0: enabled 1
752 15:40:03.033470 USB2 port 0: enabled 0
753 15:40:03.033606 USB2 port 1: enabled 1
754 15:40:03.036460 USB2 port 2: enabled 1
755 15:40:03.040241 USB2 port 3: enabled 0
756 15:40:03.043363 USB2 port 4: enabled 1
757 15:40:03.046590 USB2 port 5: enabled 0
758 15:40:03.050317 USB2 port 6: enabled 0
759 15:40:03.050424 USB2 port 7: enabled 0
760 15:40:03.053340 USB2 port 8: enabled 0
761 15:40:03.056505 USB2 port 9: enabled 0
762 15:40:03.060587 USB3 port 0: enabled 0
763 15:40:03.063446 USB3 port 1: enabled 1
764 15:40:03.066521 USB3 port 2: enabled 0
765 15:40:03.066623 USB3 port 3: enabled 0
766 15:40:03.069893 PCI: 00:14.1: enabled 0
767 15:40:03.072927 PCI: 00:14.2: enabled 1
768 15:40:03.076562 PCI: 00:14.3: enabled 1
769 15:40:03.079807 GENERIC: 0.0: enabled 1
770 15:40:03.079910 PCI: 00:15.0: enabled 1
771 15:40:03.083345 I2C: 00:1a: enabled 1
772 15:40:03.086369 I2C: 00:31: enabled 1
773 15:40:03.089998 I2C: 00:32: enabled 1
774 15:40:03.090112 PCI: 00:15.1: enabled 1
775 15:40:03.093093 I2C: 00:10: enabled 1
776 15:40:03.096277 PCI: 00:15.2: enabled 1
777 15:40:03.099372 PCI: 00:15.3: enabled 1
778 15:40:03.103151 PCI: 00:16.0: enabled 1
779 15:40:03.103262 PCI: 00:16.1: enabled 0
780 15:40:03.106377 PCI: 00:16.2: enabled 0
781 15:40:03.109447 PCI: 00:16.3: enabled 0
782 15:40:03.112622 PCI: 00:16.4: enabled 0
783 15:40:03.116236 PCI: 00:16.5: enabled 0
784 15:40:03.116349 PCI: 00:17.0: enabled 1
785 15:40:03.120019 PCI: 00:19.0: enabled 0
786 15:40:03.123057 PCI: 00:19.1: enabled 1
787 15:40:03.127146 I2C: 00:15: enabled 1
788 15:40:03.127279 PCI: 00:19.2: enabled 0
789 15:40:03.130184 PCI: 00:1d.0: enabled 1
790 15:40:03.133980 GENERIC: 0.0: enabled 1
791 15:40:03.137104 PCI: 00:1e.0: enabled 1
792 15:40:03.137206 PCI: 00:1e.1: enabled 0
793 15:40:03.140300 PCI: 00:1e.2: enabled 1
794 15:40:03.143405 SPI: 00: enabled 1
795 15:40:03.147045 PCI: 00:1e.3: enabled 1
796 15:40:03.147148 SPI: 00: enabled 1
797 15:40:03.197106 PCI: 00:1f.0: enabled 1
798 15:40:03.197254 PNP: 0c09.0: enabled 1
799 15:40:03.197335 PCI: 00:1f.1: enabled 0
800 15:40:03.197406 PCI: 00:1f.2: enabled 1
801 15:40:03.197682 GENERIC: 0.0: enabled 1
802 15:40:03.197754 GENERIC: 0.0: enabled 1
803 15:40:03.197817 GENERIC: 1.0: enabled 1
804 15:40:03.197879 PCI: 00:1f.3: enabled 1
805 15:40:03.197939 PCI: 00:1f.4: enabled 0
806 15:40:03.197998 PCI: 00:1f.5: enabled 1
807 15:40:03.198056 PCI: 00:1f.6: enabled 0
808 15:40:03.198117 PCI: 00:1f.7: enabled 0
809 15:40:03.198176 CPU_CLUSTER: 0: enabled 1
810 15:40:03.198237 APIC: 00: enabled 1
811 15:40:03.198487 APIC: 01: enabled 1
812 15:40:03.198553 APIC: 06: enabled 1
813 15:40:03.198612 APIC: 03: enabled 1
814 15:40:03.198670 APIC: 05: enabled 1
815 15:40:03.198729 APIC: 04: enabled 1
816 15:40:03.248968 APIC: 07: enabled 1
817 15:40:03.249122 APIC: 02: enabled 1
818 15:40:03.249200 Root Device scanning...
819 15:40:03.249505 scan_static_bus for Root Device
820 15:40:03.249580 DOMAIN: 0000 enabled
821 15:40:03.249644 CPU_CLUSTER: 0 enabled
822 15:40:03.249706 DOMAIN: 0000 scanning...
823 15:40:03.249767 PCI: pci_scan_bus for bus 00
824 15:40:03.249826 PCI: 00:00.0 [8086/0000] ops
825 15:40:03.249884 PCI: 00:00.0 [8086/9a12] enabled
826 15:40:03.249942 PCI: 00:02.0 [8086/0000] bus ops
827 15:40:03.249999 PCI: 00:02.0 [8086/9a40] enabled
828 15:40:03.250056 PCI: 00:04.0 [8086/0000] bus ops
829 15:40:03.250306 PCI: 00:04.0 [8086/9a03] enabled
830 15:40:03.250374 PCI: 00:05.0 [8086/9a19] enabled
831 15:40:03.250433 PCI: 00:07.0 [0000/0000] hidden
832 15:40:03.250491 PCI: 00:08.0 [8086/9a11] enabled
833 15:40:03.255308 PCI: 00:0a.0 [8086/9a0d] disabled
834 15:40:03.255412 PCI: 00:0d.0 [8086/0000] bus ops
835 15:40:03.258346 PCI: 00:0d.0 [8086/9a13] enabled
836 15:40:03.262068 PCI: 00:14.0 [8086/0000] bus ops
837 15:40:03.265176 PCI: 00:14.0 [8086/a0ed] enabled
838 15:40:03.268309 PCI: 00:14.2 [8086/a0ef] enabled
839 15:40:03.271416 PCI: 00:14.3 [8086/0000] bus ops
840 15:40:03.275126 PCI: 00:14.3 [8086/a0f0] enabled
841 15:40:03.278348 PCI: 00:15.0 [8086/0000] bus ops
842 15:40:03.281367 PCI: 00:15.0 [8086/a0e8] enabled
843 15:40:03.284977 PCI: 00:15.1 [8086/0000] bus ops
844 15:40:03.287962 PCI: 00:15.1 [8086/a0e9] enabled
845 15:40:03.291726 PCI: 00:15.2 [8086/0000] bus ops
846 15:40:03.294880 PCI: 00:15.2 [8086/a0ea] enabled
847 15:40:03.298035 PCI: 00:15.3 [8086/0000] bus ops
848 15:40:03.301831 PCI: 00:15.3 [8086/a0eb] enabled
849 15:40:03.305000 PCI: 00:16.0 [8086/0000] ops
850 15:40:03.308142 PCI: 00:16.0 [8086/a0e0] enabled
851 15:40:03.314951 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 15:40:03.318060 PCI: 00:19.0 [8086/0000] bus ops
853 15:40:03.321196 PCI: 00:19.0 [8086/a0c5] disabled
854 15:40:03.324341 PCI: 00:19.1 [8086/0000] bus ops
855 15:40:03.328074 PCI: 00:19.1 [8086/a0c6] enabled
856 15:40:03.331062 PCI: 00:1d.0 [8086/0000] bus ops
857 15:40:03.334409 PCI: 00:1d.0 [8086/a0b0] enabled
858 15:40:03.337544 PCI: 00:1e.0 [8086/0000] ops
859 15:40:03.341318 PCI: 00:1e.0 [8086/a0a8] enabled
860 15:40:03.344443 PCI: 00:1e.2 [8086/0000] bus ops
861 15:40:03.347633 PCI: 00:1e.2 [8086/a0aa] enabled
862 15:40:03.351364 PCI: 00:1e.3 [8086/0000] bus ops
863 15:40:03.354446 PCI: 00:1e.3 [8086/a0ab] enabled
864 15:40:03.357458 PCI: 00:1f.0 [8086/0000] bus ops
865 15:40:03.361260 PCI: 00:1f.0 [8086/a087] enabled
866 15:40:03.361424 RTC Init
867 15:40:03.364513 Set power on after power failure.
868 15:40:03.367892 Disabling Deep S3
869 15:40:03.368049 Disabling Deep S3
870 15:40:03.370968 Disabling Deep S4
871 15:40:03.371112 Disabling Deep S4
872 15:40:03.374144 Disabling Deep S5
873 15:40:03.377323 Disabling Deep S5
874 15:40:03.381201 PCI: 00:1f.2 [0000/0000] hidden
875 15:40:03.384266 PCI: 00:1f.3 [8086/0000] bus ops
876 15:40:03.387327 PCI: 00:1f.3 [8086/a0c8] enabled
877 15:40:03.390407 PCI: 00:1f.5 [8086/0000] bus ops
878 15:40:03.394063 PCI: 00:1f.5 [8086/a0a4] enabled
879 15:40:03.397222 PCI: Leftover static devices:
880 15:40:03.397332 PCI: 00:10.2
881 15:40:03.397403 PCI: 00:10.6
882 15:40:03.400365 PCI: 00:10.7
883 15:40:03.400464 PCI: 00:06.0
884 15:40:03.404222 PCI: 00:07.1
885 15:40:03.404373 PCI: 00:07.2
886 15:40:03.404489 PCI: 00:07.3
887 15:40:03.407378 PCI: 00:09.0
888 15:40:03.407473 PCI: 00:0d.1
889 15:40:03.410442 PCI: 00:0d.2
890 15:40:03.410542 PCI: 00:0d.3
891 15:40:03.414136 PCI: 00:0e.0
892 15:40:03.414235 PCI: 00:12.0
893 15:40:03.414325 PCI: 00:12.6
894 15:40:03.417346 PCI: 00:13.0
895 15:40:03.417443 PCI: 00:14.1
896 15:40:03.420551 PCI: 00:16.1
897 15:40:03.420646 PCI: 00:16.2
898 15:40:03.420734 PCI: 00:16.3
899 15:40:03.423799 PCI: 00:16.4
900 15:40:03.423897 PCI: 00:16.5
901 15:40:03.426871 PCI: 00:17.0
902 15:40:03.426969 PCI: 00:19.2
903 15:40:03.430649 PCI: 00:1e.1
904 15:40:03.430746 PCI: 00:1f.1
905 15:40:03.430815 PCI: 00:1f.4
906 15:40:03.433804 PCI: 00:1f.6
907 15:40:03.433896 PCI: 00:1f.7
908 15:40:03.437003 PCI: Check your devicetree.cb.
909 15:40:03.440133 PCI: 00:02.0 scanning...
910 15:40:03.443801 scan_generic_bus for PCI: 00:02.0
911 15:40:03.447057 scan_generic_bus for PCI: 00:02.0 done
912 15:40:03.453237 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 15:40:03.453391 PCI: 00:04.0 scanning...
914 15:40:03.456881 scan_generic_bus for PCI: 00:04.0
915 15:40:03.460011 GENERIC: 0.0 enabled
916 15:40:03.466824 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 15:40:03.469982 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 15:40:03.473119 PCI: 00:0d.0 scanning...
919 15:40:03.477039 scan_static_bus for PCI: 00:0d.0
920 15:40:03.480087 USB0 port 0 enabled
921 15:40:03.483221 USB0 port 0 scanning...
922 15:40:03.486500 scan_static_bus for USB0 port 0
923 15:40:03.486636 USB3 port 0 enabled
924 15:40:03.490048 USB3 port 1 enabled
925 15:40:03.493121 USB3 port 2 disabled
926 15:40:03.493273 USB3 port 3 disabled
927 15:40:03.496146 USB3 port 0 scanning...
928 15:40:03.499424 scan_static_bus for USB3 port 0
929 15:40:03.503342 scan_static_bus for USB3 port 0 done
930 15:40:03.506542 scan_bus: bus USB3 port 0 finished in 6 msecs
931 15:40:03.509818 USB3 port 1 scanning...
932 15:40:03.513025 scan_static_bus for USB3 port 1
933 15:40:03.516198 scan_static_bus for USB3 port 1 done
934 15:40:03.522629 scan_bus: bus USB3 port 1 finished in 6 msecs
935 15:40:03.525964 scan_static_bus for USB0 port 0 done
936 15:40:03.529091 scan_bus: bus USB0 port 0 finished in 43 msecs
937 15:40:03.535887 scan_static_bus for PCI: 00:0d.0 done
938 15:40:03.539376 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 15:40:03.542754 PCI: 00:14.0 scanning...
940 15:40:03.545764 scan_static_bus for PCI: 00:14.0
941 15:40:03.545913 USB0 port 0 enabled
942 15:40:03.548919 USB0 port 0 scanning...
943 15:40:03.552824 scan_static_bus for USB0 port 0
944 15:40:03.555914 USB2 port 0 disabled
945 15:40:03.556067 USB2 port 1 enabled
946 15:40:03.559226 USB2 port 2 enabled
947 15:40:03.562432 USB2 port 3 disabled
948 15:40:03.562576 USB2 port 4 enabled
949 15:40:03.565660 USB2 port 5 disabled
950 15:40:03.568885 USB2 port 6 disabled
951 15:40:03.568987 USB2 port 7 disabled
952 15:40:03.572648 USB2 port 8 disabled
953 15:40:03.575913 USB2 port 9 disabled
954 15:40:03.576016 USB3 port 0 disabled
955 15:40:03.579148 USB3 port 1 enabled
956 15:40:03.582337 USB3 port 2 disabled
957 15:40:03.582438 USB3 port 3 disabled
958 15:40:03.585476 USB2 port 1 scanning...
959 15:40:03.588688 scan_static_bus for USB2 port 1
960 15:40:03.591839 scan_static_bus for USB2 port 1 done
961 15:40:03.598941 scan_bus: bus USB2 port 1 finished in 6 msecs
962 15:40:03.599076 USB2 port 2 scanning...
963 15:40:03.602253 scan_static_bus for USB2 port 2
964 15:40:03.605357 scan_static_bus for USB2 port 2 done
965 15:40:03.612205 scan_bus: bus USB2 port 2 finished in 6 msecs
966 15:40:03.615376 USB2 port 4 scanning...
967 15:40:03.618753 scan_static_bus for USB2 port 4
968 15:40:03.621953 scan_static_bus for USB2 port 4 done
969 15:40:03.625094 scan_bus: bus USB2 port 4 finished in 6 msecs
970 15:40:03.628322 USB3 port 1 scanning...
971 15:40:03.632227 scan_static_bus for USB3 port 1
972 15:40:03.635408 scan_static_bus for USB3 port 1 done
973 15:40:03.638647 scan_bus: bus USB3 port 1 finished in 6 msecs
974 15:40:03.644855 scan_static_bus for USB0 port 0 done
975 15:40:03.648688 scan_bus: bus USB0 port 0 finished in 93 msecs
976 15:40:03.651965 scan_static_bus for PCI: 00:14.0 done
977 15:40:03.658078 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 15:40:03.658216 PCI: 00:14.3 scanning...
979 15:40:03.661865 scan_static_bus for PCI: 00:14.3
980 15:40:03.665065 GENERIC: 0.0 enabled
981 15:40:03.668298 scan_static_bus for PCI: 00:14.3 done
982 15:40:03.674849 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 15:40:03.674978 PCI: 00:15.0 scanning...
984 15:40:03.678107 scan_static_bus for PCI: 00:15.0
985 15:40:03.681365 I2C: 00:1a enabled
986 15:40:03.684514 I2C: 00:31 enabled
987 15:40:03.684615 I2C: 00:32 enabled
988 15:40:03.687825 scan_static_bus for PCI: 00:15.0 done
989 15:40:03.694952 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 15:40:03.698672 PCI: 00:15.1 scanning...
991 15:40:03.701827 scan_static_bus for PCI: 00:15.1
992 15:40:03.701965 I2C: 00:10 enabled
993 15:40:03.705157 scan_static_bus for PCI: 00:15.1 done
994 15:40:03.712081 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 15:40:03.712224 PCI: 00:15.2 scanning...
996 15:40:03.715366 scan_static_bus for PCI: 00:15.2
997 15:40:03.721698 scan_static_bus for PCI: 00:15.2 done
998 15:40:03.724921 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 15:40:03.728198 PCI: 00:15.3 scanning...
1000 15:40:03.731973 scan_static_bus for PCI: 00:15.3
1001 15:40:03.735155 scan_static_bus for PCI: 00:15.3 done
1002 15:40:03.738326 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 15:40:03.741414 PCI: 00:19.1 scanning...
1004 15:40:03.745137 scan_static_bus for PCI: 00:19.1
1005 15:40:03.748432 I2C: 00:15 enabled
1006 15:40:03.751504 scan_static_bus for PCI: 00:19.1 done
1007 15:40:03.754766 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 15:40:03.757876 PCI: 00:1d.0 scanning...
1009 15:40:03.761198 do_pci_scan_bridge for PCI: 00:1d.0
1010 15:40:03.765022 PCI: pci_scan_bus for bus 01
1011 15:40:03.768248 PCI: 01:00.0 [1c5c/174a] enabled
1012 15:40:03.771386 GENERIC: 0.0 enabled
1013 15:40:03.774619 Enabling Common Clock Configuration
1014 15:40:03.777835 L1 Sub-State supported from root port 29
1015 15:40:03.781874 L1 Sub-State Support = 0xf
1016 15:40:03.785041 CommonModeRestoreTime = 0x28
1017 15:40:03.788104 Power On Value = 0x16, Power On Scale = 0x0
1018 15:40:03.791258 ASPM: Enabled L1
1019 15:40:03.794395 PCIe: Max_Payload_Size adjusted to 128
1020 15:40:03.801422 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 15:40:03.801554 PCI: 00:1e.2 scanning...
1022 15:40:03.804588 scan_generic_bus for PCI: 00:1e.2
1023 15:40:03.807888 SPI: 00 enabled
1024 15:40:03.814786 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 15:40:03.817966 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 15:40:03.821250 PCI: 00:1e.3 scanning...
1027 15:40:03.824454 scan_generic_bus for PCI: 00:1e.3
1028 15:40:03.828243 SPI: 00 enabled
1029 15:40:03.831440 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 15:40:03.837798 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 15:40:03.840964 PCI: 00:1f.0 scanning...
1032 15:40:03.844546 scan_static_bus for PCI: 00:1f.0
1033 15:40:03.844657 PNP: 0c09.0 enabled
1034 15:40:03.847834 PNP: 0c09.0 scanning...
1035 15:40:03.851021 scan_static_bus for PNP: 0c09.0
1036 15:40:03.854227 scan_static_bus for PNP: 0c09.0 done
1037 15:40:03.861220 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 15:40:03.864230 scan_static_bus for PCI: 00:1f.0 done
1039 15:40:03.867481 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 15:40:03.870862 PCI: 00:1f.2 scanning...
1041 15:40:03.873968 scan_static_bus for PCI: 00:1f.2
1042 15:40:03.877294 GENERIC: 0.0 enabled
1043 15:40:03.877407 GENERIC: 0.0 scanning...
1044 15:40:03.881288 scan_static_bus for GENERIC: 0.0
1045 15:40:03.884539 GENERIC: 0.0 enabled
1046 15:40:03.887694 GENERIC: 1.0 enabled
1047 15:40:03.890891 scan_static_bus for GENERIC: 0.0 done
1048 15:40:03.894463 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 15:40:03.900692 scan_static_bus for PCI: 00:1f.2 done
1050 15:40:03.904400 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 15:40:03.907530 PCI: 00:1f.3 scanning...
1052 15:40:03.910767 scan_static_bus for PCI: 00:1f.3
1053 15:40:03.913939 scan_static_bus for PCI: 00:1f.3 done
1054 15:40:03.917203 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 15:40:03.921064 PCI: 00:1f.5 scanning...
1056 15:40:03.923797 scan_generic_bus for PCI: 00:1f.5
1057 15:40:03.927519 scan_generic_bus for PCI: 00:1f.5 done
1058 15:40:03.933987 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 15:40:03.937135 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 15:40:03.940877 scan_static_bus for Root Device done
1061 15:40:03.947150 scan_bus: bus Root Device finished in 736 msecs
1062 15:40:03.947335 done
1063 15:40:03.953588 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 15:40:03.957424 Chrome EC: UHEPI supported
1065 15:40:03.963810 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 15:40:03.970330 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 15:40:03.973459 SPI flash protection: WPSW=0 SRP0=0
1068 15:40:03.976757 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 15:40:03.983918 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 15:40:03.987160 found VGA at PCI: 00:02.0
1071 15:40:03.990321 Setting up VGA for PCI: 00:02.0
1072 15:40:03.993535 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 15:40:04.000488 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 15:40:04.003741 Allocating resources...
1075 15:40:04.003915 Reading resources...
1076 15:40:04.006867 Root Device read_resources bus 0 link: 0
1077 15:40:04.013198 DOMAIN: 0000 read_resources bus 0 link: 0
1078 15:40:04.016966 PCI: 00:04.0 read_resources bus 1 link: 0
1079 15:40:04.023518 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 15:40:04.026528 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 15:40:04.033596 USB0 port 0 read_resources bus 0 link: 0
1082 15:40:04.036899 USB0 port 0 read_resources bus 0 link: 0 done
1083 15:40:04.043266 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 15:40:04.046343 PCI: 00:14.0 read_resources bus 0 link: 0
1085 15:40:04.050196 USB0 port 0 read_resources bus 0 link: 0
1086 15:40:04.057176 USB0 port 0 read_resources bus 0 link: 0 done
1087 15:40:04.060999 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 15:40:04.067417 PCI: 00:14.3 read_resources bus 0 link: 0
1089 15:40:04.071275 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 15:40:04.077626 PCI: 00:15.0 read_resources bus 0 link: 0
1091 15:40:04.080940 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 15:40:04.087426 PCI: 00:15.1 read_resources bus 0 link: 0
1093 15:40:04.090602 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 15:40:04.098158 PCI: 00:19.1 read_resources bus 0 link: 0
1095 15:40:04.101253 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 15:40:04.108229 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 15:40:04.111474 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 15:40:04.117972 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 15:40:04.121203 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 15:40:04.127495 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 15:40:04.131294 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 15:40:04.137861 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 15:40:04.140974 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 15:40:04.147388 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 15:40:04.151248 GENERIC: 0.0 read_resources bus 0 link: 0
1106 15:40:04.157543 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 15:40:04.160640 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 15:40:04.167442 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 15:40:04.170506 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 15:40:04.177468 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 15:40:04.180587 Root Device read_resources bus 0 link: 0 done
1112 15:40:04.183803 Done reading resources.
1113 15:40:04.190272 Show resources in subtree (Root Device)...After reading.
1114 15:40:04.194242 Root Device child on link 0 DOMAIN: 0000
1115 15:40:04.197508 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 15:40:04.206902 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 15:40:04.217093 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 15:40:04.217275 PCI: 00:00.0
1119 15:40:04.226791 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 15:40:04.237149 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 15:40:04.246640 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 15:40:04.256785 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 15:40:04.267106 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 15:40:04.276599 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 15:40:04.283180 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 15:40:04.293567 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 15:40:04.303417 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 15:40:04.313316 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 15:40:04.323448 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 15:40:04.333090 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 15:40:04.339405 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 15:40:04.349490 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 15:40:04.359587 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 15:40:04.370011 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 15:40:04.379445 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 15:40:04.389670 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 15:40:04.396318 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 15:40:04.405950 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 15:40:04.409675 PCI: 00:02.0
1140 15:40:04.419251 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 15:40:04.429347 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 15:40:04.439041 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 15:40:04.442805 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 15:40:04.452536 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 15:40:04.455648 GENERIC: 0.0
1146 15:40:04.455797 PCI: 00:05.0
1147 15:40:04.465858 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 15:40:04.469143 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 15:40:04.472350 GENERIC: 0.0
1150 15:40:04.472482 PCI: 00:08.0
1151 15:40:04.482530 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:40:04.485721 PCI: 00:0a.0
1153 15:40:04.488965 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 15:40:04.498607 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 15:40:04.505646 USB0 port 0 child on link 0 USB3 port 0
1156 15:40:04.505786 USB3 port 0
1157 15:40:04.508808 USB3 port 1
1158 15:40:04.508907 USB3 port 2
1159 15:40:04.511933 USB3 port 3
1160 15:40:04.515687 PCI: 00:14.0 child on link 0 USB0 port 0
1161 15:40:04.525365 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 15:40:04.531698 USB0 port 0 child on link 0 USB2 port 0
1163 15:40:04.531838 USB2 port 0
1164 15:40:04.534963 USB2 port 1
1165 15:40:04.535079 USB2 port 2
1166 15:40:04.538817 USB2 port 3
1167 15:40:04.538921 USB2 port 4
1168 15:40:04.542064 USB2 port 5
1169 15:40:04.542163 USB2 port 6
1170 15:40:04.545235 USB2 port 7
1171 15:40:04.545335 USB2 port 8
1172 15:40:04.548375 USB2 port 9
1173 15:40:04.548474 USB3 port 0
1174 15:40:04.551475 USB3 port 1
1175 15:40:04.551579 USB3 port 2
1176 15:40:04.555190 USB3 port 3
1177 15:40:04.555291 PCI: 00:14.2
1178 15:40:04.565426 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 15:40:04.575135 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 15:40:04.581451 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 15:40:04.592001 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 15:40:04.592148 GENERIC: 0.0
1183 15:40:04.598602 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 15:40:04.608177 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 15:40:04.608320 I2C: 00:1a
1186 15:40:04.611324 I2C: 00:31
1187 15:40:04.611422 I2C: 00:32
1188 15:40:04.615056 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 15:40:04.624727 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 15:40:04.627934 I2C: 00:10
1191 15:40:04.628059 PCI: 00:15.2
1192 15:40:04.638097 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 15:40:04.641397 PCI: 00:15.3
1194 15:40:04.651517 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 15:40:04.651684 PCI: 00:16.0
1196 15:40:04.661520 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 15:40:04.664847 PCI: 00:19.0
1198 15:40:04.668062 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 15:40:04.677841 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 15:40:04.680967 I2C: 00:15
1201 15:40:04.684847 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 15:40:04.694701 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 15:40:04.704457 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 15:40:04.710816 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 15:40:04.714562 GENERIC: 0.0
1206 15:40:04.714709 PCI: 01:00.0
1207 15:40:04.724290 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 15:40:04.734550 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 15:40:04.744105 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 15:40:04.744250 PCI: 00:1e.0
1211 15:40:04.757519 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 15:40:04.760540 PCI: 00:1e.2 child on link 0 SPI: 00
1213 15:40:04.770495 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 15:40:04.770630 SPI: 00
1215 15:40:04.777472 PCI: 00:1e.3 child on link 0 SPI: 00
1216 15:40:04.787039 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 15:40:04.787180 SPI: 00
1218 15:40:04.790299 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 15:40:04.800652 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 15:40:04.800793 PNP: 0c09.0
1221 15:40:04.810517 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 15:40:04.813817 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 15:40:04.823350 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 15:40:04.833609 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 15:40:04.839914 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 15:40:04.840060 GENERIC: 0.0
1227 15:40:04.843825 GENERIC: 1.0
1228 15:40:04.843925 PCI: 00:1f.3
1229 15:40:04.853446 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 15:40:04.863458 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 15:40:04.866565 PCI: 00:1f.5
1232 15:40:04.873122 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 15:40:04.880027 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 15:40:04.880169 APIC: 00
1235 15:40:04.883215 APIC: 01
1236 15:40:04.883306 APIC: 06
1237 15:40:04.883374 APIC: 03
1238 15:40:04.886251 APIC: 05
1239 15:40:04.886343 APIC: 04
1240 15:40:04.886450 APIC: 07
1241 15:40:04.890127 APIC: 02
1242 15:40:04.896590 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 15:40:04.903122 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 15:40:04.909578 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 15:40:04.916561 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 15:40:04.919703 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 15:40:04.922918 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 15:40:04.926022 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 15:40:04.936240 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 15:40:04.942747 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 15:40:04.949580 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 15:40:04.956033 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 15:40:04.962972 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 15:40:04.969352 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 15:40:04.979457 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 15:40:04.985869 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 15:40:04.988969 DOMAIN: 0000: Resource ranges:
1258 15:40:04.992894 * Base: 1000, Size: 800, Tag: 100
1259 15:40:04.996127 * Base: 1900, Size: e700, Tag: 100
1260 15:40:05.002458 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 15:40:05.009480 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 15:40:05.015648 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 15:40:05.022612 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 15:40:05.029044 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 15:40:05.038896 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 15:40:05.045354 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 15:40:05.052397 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 15:40:05.061952 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 15:40:05.068792 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 15:40:05.075264 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 15:40:05.085610 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 15:40:05.091795 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 15:40:05.098831 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 15:40:05.108567 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 15:40:05.114978 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 15:40:05.121914 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 15:40:05.132174 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 15:40:05.138482 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 15:40:05.144927 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 15:40:05.155115 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 15:40:05.161525 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 15:40:05.168193 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 15:40:05.178263 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 15:40:05.184681 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 15:40:05.188514 DOMAIN: 0000: Resource ranges:
1286 15:40:05.191774 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 15:40:05.197927 * Base: d0000000, Size: 28000000, Tag: 200
1288 15:40:05.201847 * Base: fa000000, Size: 1000000, Tag: 200
1289 15:40:05.205153 * Base: fb001000, Size: 2fff000, Tag: 200
1290 15:40:05.208436 * Base: fe010000, Size: 2e000, Tag: 200
1291 15:40:05.214915 * Base: fe03f000, Size: d41000, Tag: 200
1292 15:40:05.218172 * Base: fed88000, Size: 8000, Tag: 200
1293 15:40:05.221278 * Base: fed93000, Size: d000, Tag: 200
1294 15:40:05.224402 * Base: feda2000, Size: 1e000, Tag: 200
1295 15:40:05.231482 * Base: fede0000, Size: 1220000, Tag: 200
1296 15:40:05.234724 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 15:40:05.241033 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 15:40:05.247929 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 15:40:05.254289 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 15:40:05.261222 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 15:40:05.267526 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 15:40:05.274408 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 15:40:05.281389 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 15:40:05.287705 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 15:40:05.294704 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 15:40:05.301001 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 15:40:05.307394 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 15:40:05.314589 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 15:40:05.320990 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 15:40:05.327335 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 15:40:05.334248 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 15:40:05.340697 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 15:40:05.347646 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 15:40:05.353936 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 15:40:05.360821 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 15:40:05.367277 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 15:40:05.373739 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 15:40:05.380726 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 15:40:05.387116 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 15:40:05.397135 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 15:40:05.400367 PCI: 00:1d.0: Resource ranges:
1322 15:40:05.403457 * Base: 7fc00000, Size: 100000, Tag: 200
1323 15:40:05.410725 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 15:40:05.417259 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 15:40:05.423552 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 15:40:05.433632 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 15:40:05.440193 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 15:40:05.443956 Root Device assign_resources, bus 0 link: 0
1329 15:40:05.450420 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 15:40:05.456925 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 15:40:05.467057 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 15:40:05.473366 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 15:40:05.479810 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 15:40:05.486858 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 15:40:05.490014 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 15:40:05.499511 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 15:40:05.506741 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 15:40:05.516434 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 15:40:05.519752 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 15:40:05.526011 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 15:40:05.533083 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 15:40:05.536188 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 15:40:05.542549 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 15:40:05.549559 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 15:40:05.558999 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 15:40:05.565886 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 15:40:05.572417 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 15:40:05.575555 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 15:40:05.585911 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 15:40:05.588969 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 15:40:05.592270 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 15:40:05.602318 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 15:40:05.605570 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 15:40:05.612016 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 15:40:05.618620 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 15:40:05.628799 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 15:40:05.635070 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 15:40:05.645252 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 15:40:05.648453 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 15:40:05.651657 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 15:40:05.661794 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 15:40:05.671483 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 15:40:05.681517 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 15:40:05.684747 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 15:40:05.691680 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 15:40:05.701191 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 15:40:05.708212 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 15:40:05.714534 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 15:40:05.721051 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 15:40:05.727529 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 15:40:05.731318 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 15:40:05.737713 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 15:40:05.744117 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 15:40:05.747299 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 15:40:05.754322 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 15:40:05.757516 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 15:40:05.763830 LPC: Trying to open IO window from 800 size 1ff
1378 15:40:05.770946 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 15:40:05.780897 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 15:40:05.787272 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 15:40:05.790468 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 15:40:05.797472 Root Device assign_resources, bus 0 link: 0
1383 15:40:05.800595 Done setting resources.
1384 15:40:05.807419 Show resources in subtree (Root Device)...After assigning values.
1385 15:40:05.810757 Root Device child on link 0 DOMAIN: 0000
1386 15:40:05.813905 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 15:40:05.824201 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 15:40:05.833783 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 15:40:05.833892 PCI: 00:00.0
1390 15:40:05.843958 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 15:40:05.853986 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 15:40:05.863896 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 15:40:05.873620 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 15:40:05.883867 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 15:40:05.890143 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 15:40:05.900267 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 15:40:05.910088 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 15:40:05.919852 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 15:40:05.930384 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 15:40:05.939818 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 15:40:05.946701 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 15:40:05.956823 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 15:40:05.966847 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 15:40:05.976184 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 15:40:05.986717 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 15:40:05.996363 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 15:40:06.002808 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 15:40:06.012881 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 15:40:06.023214 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 15:40:06.026346 PCI: 00:02.0
1411 15:40:06.036190 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 15:40:06.046218 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 15:40:06.056292 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 15:40:06.059388 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 15:40:06.069760 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 15:40:06.072887 GENERIC: 0.0
1417 15:40:06.072986 PCI: 00:05.0
1418 15:40:06.086093 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 15:40:06.089122 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 15:40:06.093004 GENERIC: 0.0
1421 15:40:06.093098 PCI: 00:08.0
1422 15:40:06.102461 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 15:40:06.105569 PCI: 00:0a.0
1424 15:40:06.109431 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 15:40:06.118964 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 15:40:06.122643 USB0 port 0 child on link 0 USB3 port 0
1427 15:40:06.125981 USB3 port 0
1428 15:40:06.126074 USB3 port 1
1429 15:40:06.129257 USB3 port 2
1430 15:40:06.132397 USB3 port 3
1431 15:40:06.135718 PCI: 00:14.0 child on link 0 USB0 port 0
1432 15:40:06.145860 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 15:40:06.148899 USB0 port 0 child on link 0 USB2 port 0
1434 15:40:06.152169 USB2 port 0
1435 15:40:06.152258 USB2 port 1
1436 15:40:06.155423 USB2 port 2
1437 15:40:06.158855 USB2 port 3
1438 15:40:06.158950 USB2 port 4
1439 15:40:06.161958 USB2 port 5
1440 15:40:06.162052 USB2 port 6
1441 15:40:06.165221 USB2 port 7
1442 15:40:06.165310 USB2 port 8
1443 15:40:06.169013 USB2 port 9
1444 15:40:06.169102 USB3 port 0
1445 15:40:06.172159 USB3 port 1
1446 15:40:06.172246 USB3 port 2
1447 15:40:06.175273 USB3 port 3
1448 15:40:06.175362 PCI: 00:14.2
1449 15:40:06.185270 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 15:40:06.198469 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 15:40:06.201731 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 15:40:06.211808 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 15:40:06.215473 GENERIC: 0.0
1454 15:40:06.218810 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 15:40:06.228472 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 15:40:06.228575 I2C: 00:1a
1457 15:40:06.231769 I2C: 00:31
1458 15:40:06.231857 I2C: 00:32
1459 15:40:06.238157 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 15:40:06.248130 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 15:40:06.248247 I2C: 00:10
1462 15:40:06.251962 PCI: 00:15.2
1463 15:40:06.261574 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 15:40:06.261719 PCI: 00:15.3
1465 15:40:06.274847 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 15:40:06.274972 PCI: 00:16.0
1467 15:40:06.284975 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 15:40:06.288106 PCI: 00:19.0
1469 15:40:06.291332 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 15:40:06.301400 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 15:40:06.304593 I2C: 00:15
1472 15:40:06.308346 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 15:40:06.317837 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 15:40:06.328005 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 15:40:06.337777 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 15:40:06.341531 GENERIC: 0.0
1477 15:40:06.341628 PCI: 01:00.0
1478 15:40:06.354820 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 15:40:06.364430 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 15:40:06.374519 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 15:40:06.374631 PCI: 00:1e.0
1482 15:40:06.387779 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 15:40:06.390873 PCI: 00:1e.2 child on link 0 SPI: 00
1484 15:40:06.401117 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 15:40:06.401226 SPI: 00
1486 15:40:06.407653 PCI: 00:1e.3 child on link 0 SPI: 00
1487 15:40:06.417740 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 15:40:06.417859 SPI: 00
1489 15:40:06.424160 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 15:40:06.430582 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 15:40:06.433797 PNP: 0c09.0
1492 15:40:06.440888 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 15:40:06.447182 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 15:40:06.457144 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 15:40:06.464115 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 15:40:06.470581 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 15:40:06.470723 GENERIC: 0.0
1498 15:40:06.473802 GENERIC: 1.0
1499 15:40:06.473890 PCI: 00:1f.3
1500 15:40:06.484102 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 15:40:06.496812 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 15:40:06.496943 PCI: 00:1f.5
1503 15:40:06.506943 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 15:40:06.510119 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 15:40:06.513355 APIC: 00
1506 15:40:06.513497 APIC: 01
1507 15:40:06.517056 APIC: 06
1508 15:40:06.517147 APIC: 03
1509 15:40:06.517213 APIC: 05
1510 15:40:06.520194 APIC: 04
1511 15:40:06.520280 APIC: 07
1512 15:40:06.523345 APIC: 02
1513 15:40:06.523431 Done allocating resources.
1514 15:40:06.530406 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 15:40:06.537008 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 15:40:06.540207 Configure GPIOs for I2S audio on UP4.
1517 15:40:06.547256 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 15:40:06.550457 Enabling resources...
1519 15:40:06.553485 PCI: 00:00.0 subsystem <- 8086/9a12
1520 15:40:06.557274 PCI: 00:00.0 cmd <- 06
1521 15:40:06.560361 PCI: 00:02.0 subsystem <- 8086/9a40
1522 15:40:06.563710 PCI: 00:02.0 cmd <- 03
1523 15:40:06.566831 PCI: 00:04.0 subsystem <- 8086/9a03
1524 15:40:06.569927 PCI: 00:04.0 cmd <- 02
1525 15:40:06.573138 PCI: 00:05.0 subsystem <- 8086/9a19
1526 15:40:06.573231 PCI: 00:05.0 cmd <- 02
1527 15:40:06.580124 PCI: 00:08.0 subsystem <- 8086/9a11
1528 15:40:06.580217 PCI: 00:08.0 cmd <- 06
1529 15:40:06.583921 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 15:40:06.587110 PCI: 00:0d.0 cmd <- 02
1531 15:40:06.590373 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 15:40:06.593453 PCI: 00:14.0 cmd <- 02
1533 15:40:06.596687 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 15:40:06.599757 PCI: 00:14.2 cmd <- 02
1535 15:40:06.602955 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 15:40:06.606809 PCI: 00:14.3 cmd <- 02
1537 15:40:06.609984 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 15:40:06.613139 PCI: 00:15.0 cmd <- 02
1539 15:40:06.616264 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 15:40:06.619419 PCI: 00:15.1 cmd <- 02
1541 15:40:06.623118 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 15:40:06.623213 PCI: 00:15.2 cmd <- 02
1543 15:40:06.630088 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 15:40:06.630188 PCI: 00:15.3 cmd <- 02
1545 15:40:06.633274 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 15:40:06.636595 PCI: 00:16.0 cmd <- 02
1547 15:40:06.639757 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 15:40:06.642971 PCI: 00:19.1 cmd <- 02
1549 15:40:06.646219 PCI: 00:1d.0 bridge ctrl <- 0013
1550 15:40:06.649391 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 15:40:06.653068 PCI: 00:1d.0 cmd <- 06
1552 15:40:06.656182 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 15:40:06.659281 PCI: 00:1e.0 cmd <- 06
1554 15:40:06.663170 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 15:40:06.666332 PCI: 00:1e.2 cmd <- 06
1556 15:40:06.669408 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 15:40:06.672603 PCI: 00:1e.3 cmd <- 02
1558 15:40:06.675728 PCI: 00:1f.0 subsystem <- 8086/a087
1559 15:40:06.678984 PCI: 00:1f.0 cmd <- 407
1560 15:40:06.682829 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 15:40:06.682923 PCI: 00:1f.3 cmd <- 02
1562 15:40:06.689063 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 15:40:06.689161 PCI: 00:1f.5 cmd <- 406
1564 15:40:06.694830 PCI: 01:00.0 cmd <- 02
1565 15:40:06.699192 done.
1566 15:40:06.702278 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 15:40:06.705427 Initializing devices...
1568 15:40:06.708666 Root Device init
1569 15:40:06.712480 Chrome EC: Set SMI mask to 0x0000000000000000
1570 15:40:06.718913 Chrome EC: clear events_b mask to 0x0000000000000000
1571 15:40:06.725817 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 15:40:06.729007 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 15:40:06.735383 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 15:40:06.742436 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 15:40:06.745781 fw_config match found: DB_USB=USB3_ACTIVE
1576 15:40:06.752233 Configure Right Type-C port orientation for retimer
1577 15:40:06.755331 Root Device init finished in 43 msecs
1578 15:40:06.759167 PCI: 00:00.0 init
1579 15:40:06.762211 CPU TDP = 9 Watts
1580 15:40:06.762322 CPU PL1 = 9 Watts
1581 15:40:06.765407 CPU PL2 = 40 Watts
1582 15:40:06.765494 CPU PL4 = 83 Watts
1583 15:40:06.771896 PCI: 00:00.0 init finished in 8 msecs
1584 15:40:06.771987 PCI: 00:02.0 init
1585 15:40:06.775041 GMA: Found VBT in CBFS
1586 15:40:06.778910 GMA: Found valid VBT in CBFS
1587 15:40:06.785307 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 15:40:06.791652 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 15:40:06.794935 PCI: 00:02.0 init finished in 18 msecs
1590 15:40:06.798042 PCI: 00:05.0 init
1591 15:40:06.801871 PCI: 00:05.0 init finished in 0 msecs
1592 15:40:06.805148 PCI: 00:08.0 init
1593 15:40:06.808370 PCI: 00:08.0 init finished in 0 msecs
1594 15:40:06.811532 PCI: 00:14.0 init
1595 15:40:06.814819 PCI: 00:14.0 init finished in 0 msecs
1596 15:40:06.814908 PCI: 00:14.2 init
1597 15:40:06.821234 PCI: 00:14.2 init finished in 0 msecs
1598 15:40:06.821342 PCI: 00:15.0 init
1599 15:40:06.825005 I2C bus 0 version 0x3230302a
1600 15:40:06.828118 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 15:40:06.834414 PCI: 00:15.0 init finished in 6 msecs
1602 15:40:06.834573 PCI: 00:15.1 init
1603 15:40:06.838197 I2C bus 1 version 0x3230302a
1604 15:40:06.841593 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 15:40:06.844801 PCI: 00:15.1 init finished in 6 msecs
1606 15:40:06.848006 PCI: 00:15.2 init
1607 15:40:06.851209 I2C bus 2 version 0x3230302a
1608 15:40:06.854402 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 15:40:06.857523 PCI: 00:15.2 init finished in 6 msecs
1610 15:40:06.861147 PCI: 00:15.3 init
1611 15:40:06.864430 I2C bus 3 version 0x3230302a
1612 15:40:06.867458 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 15:40:06.871217 PCI: 00:15.3 init finished in 6 msecs
1614 15:40:06.874354 PCI: 00:16.0 init
1615 15:40:06.877564 PCI: 00:16.0 init finished in 0 msecs
1616 15:40:06.880928 PCI: 00:19.1 init
1617 15:40:06.881016 I2C bus 5 version 0x3230302a
1618 15:40:06.887876 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 15:40:06.891041 PCI: 00:19.1 init finished in 6 msecs
1620 15:40:06.891130 PCI: 00:1d.0 init
1621 15:40:06.894351 Initializing PCH PCIe bridge.
1622 15:40:06.897512 PCI: 00:1d.0 init finished in 3 msecs
1623 15:40:06.901915 PCI: 00:1f.0 init
1624 15:40:06.905076 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 15:40:06.912154 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 15:40:06.912261 IOAPIC: ID = 0x02
1627 15:40:06.915214 IOAPIC: Dumping registers
1628 15:40:06.918488 reg 0x0000: 0x02000000
1629 15:40:06.921635 reg 0x0001: 0x00770020
1630 15:40:06.921732 reg 0x0002: 0x00000000
1631 15:40:06.928625 PCI: 00:1f.0 init finished in 21 msecs
1632 15:40:06.928736 PCI: 00:1f.2 init
1633 15:40:06.931784 Disabling ACPI via APMC.
1634 15:40:06.934862 APMC done.
1635 15:40:06.938069 PCI: 00:1f.2 init finished in 5 msecs
1636 15:40:06.950199 PCI: 01:00.0 init
1637 15:40:06.953556 PCI: 01:00.0 init finished in 0 msecs
1638 15:40:06.956707 PNP: 0c09.0 init
1639 15:40:06.960528 Google Chrome EC uptime: 8.431 seconds
1640 15:40:06.966743 Google Chrome AP resets since EC boot: 1
1641 15:40:06.970357 Google Chrome most recent AP reset causes:
1642 15:40:06.973737 0.379: 32775 shutdown: entering G3
1643 15:40:06.980159 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 15:40:06.983504 PNP: 0c09.0 init finished in 22 msecs
1645 15:40:06.989346 Devices initialized
1646 15:40:06.992490 Show all devs... After init.
1647 15:40:06.995587 Root Device: enabled 1
1648 15:40:06.995670 DOMAIN: 0000: enabled 1
1649 15:40:06.999441 CPU_CLUSTER: 0: enabled 1
1650 15:40:07.002537 PCI: 00:00.0: enabled 1
1651 15:40:07.005816 PCI: 00:02.0: enabled 1
1652 15:40:07.005913 PCI: 00:04.0: enabled 1
1653 15:40:07.008886 PCI: 00:05.0: enabled 1
1654 15:40:07.012274 PCI: 00:06.0: enabled 0
1655 15:40:07.015432 PCI: 00:07.0: enabled 0
1656 15:40:07.015532 PCI: 00:07.1: enabled 0
1657 15:40:07.019228 PCI: 00:07.2: enabled 0
1658 15:40:07.022424 PCI: 00:07.3: enabled 0
1659 15:40:07.025583 PCI: 00:08.0: enabled 1
1660 15:40:07.025666 PCI: 00:09.0: enabled 0
1661 15:40:07.028843 PCI: 00:0a.0: enabled 0
1662 15:40:07.032583 PCI: 00:0d.0: enabled 1
1663 15:40:07.035856 PCI: 00:0d.1: enabled 0
1664 15:40:07.035941 PCI: 00:0d.2: enabled 0
1665 15:40:07.038932 PCI: 00:0d.3: enabled 0
1666 15:40:07.042265 PCI: 00:0e.0: enabled 0
1667 15:40:07.042353 PCI: 00:10.2: enabled 1
1668 15:40:07.045500 PCI: 00:10.6: enabled 0
1669 15:40:07.048728 PCI: 00:10.7: enabled 0
1670 15:40:07.052505 PCI: 00:12.0: enabled 0
1671 15:40:07.052587 PCI: 00:12.6: enabled 0
1672 15:40:07.055872 PCI: 00:13.0: enabled 0
1673 15:40:07.059123 PCI: 00:14.0: enabled 1
1674 15:40:07.062248 PCI: 00:14.1: enabled 0
1675 15:40:07.062328 PCI: 00:14.2: enabled 1
1676 15:40:07.065341 PCI: 00:14.3: enabled 1
1677 15:40:07.068693 PCI: 00:15.0: enabled 1
1678 15:40:07.072012 PCI: 00:15.1: enabled 1
1679 15:40:07.072102 PCI: 00:15.2: enabled 1
1680 15:40:07.075285 PCI: 00:15.3: enabled 1
1681 15:40:07.079103 PCI: 00:16.0: enabled 1
1682 15:40:07.079191 PCI: 00:16.1: enabled 0
1683 15:40:07.082148 PCI: 00:16.2: enabled 0
1684 15:40:07.085385 PCI: 00:16.3: enabled 0
1685 15:40:07.089194 PCI: 00:16.4: enabled 0
1686 15:40:07.089283 PCI: 00:16.5: enabled 0
1687 15:40:07.092426 PCI: 00:17.0: enabled 0
1688 15:40:07.095561 PCI: 00:19.0: enabled 0
1689 15:40:07.098743 PCI: 00:19.1: enabled 1
1690 15:40:07.098825 PCI: 00:19.2: enabled 0
1691 15:40:07.102134 PCI: 00:1c.0: enabled 1
1692 15:40:07.105290 PCI: 00:1c.1: enabled 0
1693 15:40:07.108467 PCI: 00:1c.2: enabled 0
1694 15:40:07.108549 PCI: 00:1c.3: enabled 0
1695 15:40:07.112285 PCI: 00:1c.4: enabled 0
1696 15:40:07.115361 PCI: 00:1c.5: enabled 0
1697 15:40:07.118720 PCI: 00:1c.6: enabled 1
1698 15:40:07.118796 PCI: 00:1c.7: enabled 0
1699 15:40:07.121731 PCI: 00:1d.0: enabled 1
1700 15:40:07.125583 PCI: 00:1d.1: enabled 0
1701 15:40:07.125662 PCI: 00:1d.2: enabled 1
1702 15:40:07.128795 PCI: 00:1d.3: enabled 0
1703 15:40:07.131980 PCI: 00:1e.0: enabled 1
1704 15:40:07.135087 PCI: 00:1e.1: enabled 0
1705 15:40:07.135164 PCI: 00:1e.2: enabled 1
1706 15:40:07.138996 PCI: 00:1e.3: enabled 1
1707 15:40:07.142120 PCI: 00:1f.0: enabled 1
1708 15:40:07.145240 PCI: 00:1f.1: enabled 0
1709 15:40:07.145332 PCI: 00:1f.2: enabled 1
1710 15:40:07.148466 PCI: 00:1f.3: enabled 1
1711 15:40:07.151678 PCI: 00:1f.4: enabled 0
1712 15:40:07.155496 PCI: 00:1f.5: enabled 1
1713 15:40:07.155586 PCI: 00:1f.6: enabled 0
1714 15:40:07.158918 PCI: 00:1f.7: enabled 0
1715 15:40:07.162012 APIC: 00: enabled 1
1716 15:40:07.162100 GENERIC: 0.0: enabled 1
1717 15:40:07.165124 GENERIC: 0.0: enabled 1
1718 15:40:07.168341 GENERIC: 1.0: enabled 1
1719 15:40:07.171491 GENERIC: 0.0: enabled 1
1720 15:40:07.171615 GENERIC: 1.0: enabled 1
1721 15:40:07.175319 USB0 port 0: enabled 1
1722 15:40:07.178545 GENERIC: 0.0: enabled 1
1723 15:40:07.178642 USB0 port 0: enabled 1
1724 15:40:07.181725 GENERIC: 0.0: enabled 1
1725 15:40:07.184866 I2C: 00:1a: enabled 1
1726 15:40:07.188082 I2C: 00:31: enabled 1
1727 15:40:07.188169 I2C: 00:32: enabled 1
1728 15:40:07.192043 I2C: 00:10: enabled 1
1729 15:40:07.195130 I2C: 00:15: enabled 1
1730 15:40:07.195216 GENERIC: 0.0: enabled 0
1731 15:40:07.198393 GENERIC: 1.0: enabled 0
1732 15:40:07.201615 GENERIC: 0.0: enabled 1
1733 15:40:07.201688 SPI: 00: enabled 1
1734 15:40:07.204744 SPI: 00: enabled 1
1735 15:40:07.208457 PNP: 0c09.0: enabled 1
1736 15:40:07.208532 GENERIC: 0.0: enabled 1
1737 15:40:07.211507 USB3 port 0: enabled 1
1738 15:40:07.214800 USB3 port 1: enabled 1
1739 15:40:07.218080 USB3 port 2: enabled 0
1740 15:40:07.218158 USB3 port 3: enabled 0
1741 15:40:07.221851 USB2 port 0: enabled 0
1742 15:40:07.225114 USB2 port 1: enabled 1
1743 15:40:07.225225 USB2 port 2: enabled 1
1744 15:40:07.228308 USB2 port 3: enabled 0
1745 15:40:07.231440 USB2 port 4: enabled 1
1746 15:40:07.231554 USB2 port 5: enabled 0
1747 15:40:07.234638 USB2 port 6: enabled 0
1748 15:40:07.238534 USB2 port 7: enabled 0
1749 15:40:07.241723 USB2 port 8: enabled 0
1750 15:40:07.241802 USB2 port 9: enabled 0
1751 15:40:07.244790 USB3 port 0: enabled 0
1752 15:40:07.247975 USB3 port 1: enabled 1
1753 15:40:07.248055 USB3 port 2: enabled 0
1754 15:40:07.251801 USB3 port 3: enabled 0
1755 15:40:07.254943 GENERIC: 0.0: enabled 1
1756 15:40:07.258163 GENERIC: 1.0: enabled 1
1757 15:40:07.258240 APIC: 01: enabled 1
1758 15:40:07.261278 APIC: 06: enabled 1
1759 15:40:07.261351 APIC: 03: enabled 1
1760 15:40:07.264530 APIC: 05: enabled 1
1761 15:40:07.268430 APIC: 04: enabled 1
1762 15:40:07.268511 APIC: 07: enabled 1
1763 15:40:07.271572 APIC: 02: enabled 1
1764 15:40:07.274802 PCI: 01:00.0: enabled 1
1765 15:40:07.278047 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1766 15:40:07.284466 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 15:40:07.287748 ELOG: NV offset 0xf30000 size 0x1000
1768 15:40:07.294802 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 15:40:07.301129 ELOG: Event(17) added with size 13 at 2022-09-30 14:29:00 UTC
1770 15:40:07.308120 ELOG: Event(16) added with size 11 at 2022-09-30 14:29:00 UTC
1771 15:40:07.310779 Erasing flash addr f30000 + 4 KiB
1772 15:40:07.365825 ELOG: Event(92) added with size 9 at 2022-09-30 14:29:00 UTC
1773 15:40:07.372781 ELOG: Event(93) added with size 9 at 2022-09-30 14:29:00 UTC
1774 15:40:07.379098 ELOG: Event(9E) added with size 10 at 2022-09-30 14:29:00 UTC
1775 15:40:07.385509 ELOG: Event(9F) added with size 14 at 2022-09-30 14:29:00 UTC
1776 15:40:07.392554 BS: BS_DEV_INIT exit times (exec / console): 29 / 55 ms
1777 15:40:07.398884 ELOG: Event(A1) added with size 10 at 2022-09-30 14:29:00 UTC
1778 15:40:07.405808 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1779 15:40:07.408917 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1780 15:40:07.411980 Finalize devices...
1781 15:40:07.412072 Devices finalized
1782 15:40:07.418887 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1783 15:40:07.425931 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1784 15:40:07.428490 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1785 15:40:07.435362 ME: HFSTS1 : 0x80030055
1786 15:40:07.438549 ME: HFSTS2 : 0x30280116
1787 15:40:07.445021 ME: HFSTS3 : 0x00000050
1788 15:40:07.448829 ME: HFSTS4 : 0x00004000
1789 15:40:07.451944 ME: HFSTS5 : 0x00000000
1790 15:40:07.458350 ME: HFSTS6 : 0x00400006
1791 15:40:07.462248 ME: Manufacturing Mode : YES
1792 15:40:07.465535 ME: SPI Protection Mode Enabled : NO
1793 15:40:07.468662 ME: FW Partition Table : OK
1794 15:40:07.471767 ME: Bringup Loader Failure : NO
1795 15:40:07.474952 ME: Firmware Init Complete : NO
1796 15:40:07.478617 ME: Boot Options Present : NO
1797 15:40:07.481839 ME: Update In Progress : NO
1798 15:40:07.488225 ME: D0i3 Support : YES
1799 15:40:07.491943 ME: Low Power State Enabled : NO
1800 15:40:07.495124 ME: CPU Replaced : YES
1801 15:40:07.498280 ME: CPU Replacement Valid : YES
1802 15:40:07.501497 ME: Current Working State : 5
1803 15:40:07.505289 ME: Current Operation State : 1
1804 15:40:07.508451 ME: Current Operation Mode : 3
1805 15:40:07.511609 ME: Error Code : 0
1806 15:40:07.514712 ME: Enhanced Debug Mode : NO
1807 15:40:07.521671 ME: CPU Debug Disabled : YES
1808 15:40:07.524838 ME: TXT Support : NO
1809 15:40:07.531763 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1810 15:40:07.538066 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1811 15:40:07.541320 CBFS: 'fallback/slic' not found.
1812 15:40:07.544485 ACPI: Writing ACPI tables at 76b01000.
1813 15:40:07.547821 ACPI: * FACS
1814 15:40:07.547905 ACPI: * DSDT
1815 15:40:07.551505 Ramoops buffer: 0x100000@0x76a00000.
1816 15:40:07.558055 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1817 15:40:07.561280 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1818 15:40:07.564507 Google Chrome EC: version:
1819 15:40:07.567697 ro: voema_v2.0.7540-147f8d37d1
1820 15:40:07.571480 rw: voema_v2.0.7540-147f8d37d1
1821 15:40:07.574622 running image: 2
1822 15:40:07.580863 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1823 15:40:07.584867 ACPI: * FADT
1824 15:40:07.584952 SCI is IRQ9
1825 15:40:07.588142 ACPI: added table 1/32, length now 40
1826 15:40:07.591204 ACPI: * SSDT
1827 15:40:07.594445 Found 1 CPU(s) with 8 core(s) each.
1828 15:40:07.597659 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1829 15:40:07.600860 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1830 15:40:07.607752 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1831 15:40:07.610972 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1832 15:40:07.617831 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1833 15:40:07.621020 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1834 15:40:07.627290 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1835 15:40:07.634257 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1836 15:40:07.640626 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1837 15:40:07.644075 \_SB.PCI0.RP09: Added StorageD3Enable property
1838 15:40:07.647192 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1839 15:40:07.654198 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1840 15:40:07.660548 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1841 15:40:07.663757 PS2K: Passing 80 keymaps to kernel
1842 15:40:07.670689 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1843 15:40:07.677208 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1844 15:40:07.684024 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1845 15:40:07.690405 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1846 15:40:07.697370 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1847 15:40:07.703470 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1848 15:40:07.710676 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1849 15:40:07.717021 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1850 15:40:07.720146 ACPI: added table 2/32, length now 44
1851 15:40:07.720229 ACPI: * MCFG
1852 15:40:07.723783 ACPI: added table 3/32, length now 48
1853 15:40:07.727096 ACPI: * TPM2
1854 15:40:07.730175 TPM2 log created at 0x769f0000
1855 15:40:07.733384 ACPI: added table 4/32, length now 52
1856 15:40:07.737065 ACPI: * MADT
1857 15:40:07.737160 SCI is IRQ9
1858 15:40:07.740352 ACPI: added table 5/32, length now 56
1859 15:40:07.743454 current = 76b09850
1860 15:40:07.743585 ACPI: * DMAR
1861 15:40:07.746773 ACPI: added table 6/32, length now 60
1862 15:40:07.750014 ACPI: added table 7/32, length now 64
1863 15:40:07.753209 ACPI: * HPET
1864 15:40:07.756880 ACPI: added table 8/32, length now 68
1865 15:40:07.756962 ACPI: done.
1866 15:40:07.760182 ACPI tables: 35216 bytes.
1867 15:40:07.763350 smbios_write_tables: 769ef000
1868 15:40:07.766596 EC returned error result code 3
1869 15:40:07.769826 Couldn't obtain OEM name from CBI
1870 15:40:07.773678 Create SMBIOS type 16
1871 15:40:07.776768 Create SMBIOS type 17
1872 15:40:07.779992 GENERIC: 0.0 (WIFI Device)
1873 15:40:07.780076 SMBIOS tables: 1750 bytes.
1874 15:40:07.786934 Writing table forward entry at 0x00000500
1875 15:40:07.793408 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1876 15:40:07.796496 Writing coreboot table at 0x76b25000
1877 15:40:07.803055 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1878 15:40:07.806351 1. 0000000000001000-000000000009ffff: RAM
1879 15:40:07.810174 2. 00000000000a0000-00000000000fffff: RESERVED
1880 15:40:07.816523 3. 0000000000100000-00000000769eefff: RAM
1881 15:40:07.819701 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1882 15:40:07.826556 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1883 15:40:07.833043 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1884 15:40:07.836188 7. 0000000077000000-000000007fbfffff: RESERVED
1885 15:40:07.840037 8. 00000000c0000000-00000000cfffffff: RESERVED
1886 15:40:07.846367 9. 00000000f8000000-00000000f9ffffff: RESERVED
1887 15:40:07.849489 10. 00000000fb000000-00000000fb000fff: RESERVED
1888 15:40:07.856691 11. 00000000fe000000-00000000fe00ffff: RESERVED
1889 15:40:07.859860 12. 00000000fed80000-00000000fed87fff: RESERVED
1890 15:40:07.866211 13. 00000000fed90000-00000000fed92fff: RESERVED
1891 15:40:07.869480 14. 00000000feda0000-00000000feda1fff: RESERVED
1892 15:40:07.876486 15. 00000000fedc0000-00000000feddffff: RESERVED
1893 15:40:07.879811 16. 0000000100000000-00000002803fffff: RAM
1894 15:40:07.883006 Passing 4 GPIOs to payload:
1895 15:40:07.886144 NAME | PORT | POLARITY | VALUE
1896 15:40:07.893140 lid | undefined | high | high
1897 15:40:07.896352 power | undefined | high | low
1898 15:40:07.902833 oprom | undefined | high | low
1899 15:40:07.909103 EC in RW | 0x000000e5 | high | high
1900 15:40:07.916014 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ae7f
1901 15:40:07.916127 coreboot table: 1576 bytes.
1902 15:40:07.923029 IMD ROOT 0. 0x76fff000 0x00001000
1903 15:40:07.926149 IMD SMALL 1. 0x76ffe000 0x00001000
1904 15:40:07.929308 FSP MEMORY 2. 0x76c4e000 0x003b0000
1905 15:40:07.932403 VPD 3. 0x76c4d000 0x00000367
1906 15:40:07.936305 RO MCACHE 4. 0x76c4c000 0x00000fdc
1907 15:40:07.939406 CONSOLE 5. 0x76c2c000 0x00020000
1908 15:40:07.942604 FMAP 6. 0x76c2b000 0x00000578
1909 15:40:07.945735 TIME STAMP 7. 0x76c2a000 0x00000910
1910 15:40:07.949660 VBOOT WORK 8. 0x76c16000 0x00014000
1911 15:40:07.956013 ROMSTG STCK 9. 0x76c15000 0x00001000
1912 15:40:07.959176 AFTER CAR 10. 0x76c0a000 0x0000b000
1913 15:40:07.962436 RAMSTAGE 11. 0x76b97000 0x00073000
1914 15:40:07.965716 REFCODE 12. 0x76b42000 0x00055000
1915 15:40:07.969459 SMM BACKUP 13. 0x76b32000 0x00010000
1916 15:40:07.972633 4f444749 14. 0x76b30000 0x00002000
1917 15:40:07.975873 EXT VBT15. 0x76b2d000 0x0000219f
1918 15:40:07.979155 COREBOOT 16. 0x76b25000 0x00008000
1919 15:40:07.982282 ACPI 17. 0x76b01000 0x00024000
1920 15:40:07.989212 ACPI GNVS 18. 0x76b00000 0x00001000
1921 15:40:07.992524 RAMOOPS 19. 0x76a00000 0x00100000
1922 15:40:07.995635 TPM2 TCGLOG20. 0x769f0000 0x00010000
1923 15:40:07.999432 SMBIOS 21. 0x769ef000 0x00000800
1924 15:40:08.002653 IMD small region:
1925 15:40:08.005702 IMD ROOT 0. 0x76ffec00 0x00000400
1926 15:40:08.008875 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1927 15:40:08.012517 POWER STATE 2. 0x76ffeb80 0x00000044
1928 15:40:08.015781 ROMSTAGE 3. 0x76ffeb60 0x00000004
1929 15:40:08.018994 MEM INFO 4. 0x76ffe980 0x000001e0
1930 15:40:08.025353 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1931 15:40:08.028648 MTRR: Physical address space:
1932 15:40:08.035494 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1933 15:40:08.041963 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1934 15:40:08.049052 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1935 15:40:08.055492 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1936 15:40:08.061846 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1937 15:40:08.065052 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1938 15:40:08.071650 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1939 15:40:08.078663 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 15:40:08.081939 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 15:40:08.085249 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 15:40:08.088356 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 15:40:08.095222 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 15:40:08.098426 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 15:40:08.101564 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 15:40:08.105436 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 15:40:08.108688 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 15:40:08.115015 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 15:40:08.118112 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 15:40:08.121376 call enable_fixed_mtrr()
1951 15:40:08.124690 CPU physical address size: 39 bits
1952 15:40:08.128358 MTRR: default type WB/UC MTRR counts: 6/6.
1953 15:40:08.134672 MTRR: UC selected as default type.
1954 15:40:08.138713 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1955 15:40:08.145201 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 15:40:08.151737 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 15:40:08.157983 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 15:40:08.165037 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1959 15:40:08.171478 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1960 15:40:08.171595
1961 15:40:08.174717 MTRR check
1962 15:40:08.174829 Fixed MTRRs : Enabled
1963 15:40:08.177933 Variable MTRRs: Enabled
1964 15:40:08.178027
1965 15:40:08.181234 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 15:40:08.188313 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 15:40:08.191433 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 15:40:08.194635 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 15:40:08.197877 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 15:40:08.204210 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 15:40:08.208046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 15:40:08.211259 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 15:40:08.214370 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 15:40:08.220871 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 15:40:08.224091 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 15:40:08.230984 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1977 15:40:08.234147 call enable_fixed_mtrr()
1978 15:40:08.238143 Checking cr50 for pending updates
1979 15:40:08.242059 CPU physical address size: 39 bits
1980 15:40:08.244675 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 15:40:08.248456 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 15:40:08.251556 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 15:40:08.254801 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 15:40:08.261789 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 15:40:08.264973 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 15:40:08.268162 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 15:40:08.271432 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 15:40:08.278137 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 15:40:08.281390 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 15:40:08.284624 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 15:40:08.287834 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 15:40:08.295450 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 15:40:08.295557 call enable_fixed_mtrr()
1994 15:40:08.302161 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 15:40:08.305515 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 15:40:08.308733 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 15:40:08.311997 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 15:40:08.318541 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 15:40:08.321732 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 15:40:08.325632 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 15:40:08.328826 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 15:40:08.335443 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 15:40:08.338698 CPU physical address size: 39 bits
2004 15:40:08.341871 call enable_fixed_mtrr()
2005 15:40:08.345000 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 15:40:08.351882 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 15:40:08.355114 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 15:40:08.358382 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 15:40:08.361675 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 15:40:08.364778 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 15:40:08.371893 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 15:40:08.375003 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 15:40:08.378238 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 15:40:08.381447 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 15:40:08.388525 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 15:40:08.391674 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 15:40:08.394861 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 15:40:08.398075 call enable_fixed_mtrr()
2019 15:40:08.401299 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 15:40:08.408317 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 15:40:08.411624 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 15:40:08.414735 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 15:40:08.417997 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 15:40:08.425102 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 15:40:08.428341 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 15:40:08.431517 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 15:40:08.434516 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 15:40:08.438908 CPU physical address size: 39 bits
2029 15:40:08.445876 call enable_fixed_mtrr()
2030 15:40:08.445996 Reading cr50 TPM mode
2031 15:40:08.449140 CPU physical address size: 39 bits
2032 15:40:08.452293 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 15:40:08.459333 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 15:40:08.462441 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 15:40:08.465742 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 15:40:08.468855 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 15:40:08.475828 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 15:40:08.479046 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 15:40:08.482216 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 15:40:08.486029 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 15:40:08.492347 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 15:40:08.495527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 15:40:08.498741 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 15:40:08.505706 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 15:40:08.508838 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 15:40:08.512018 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 15:40:08.515827 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 15:40:08.519018 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 15:40:08.525313 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 15:40:08.528691 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 15:40:08.532374 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 15:40:08.535510 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 15:40:08.541837 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 15:40:08.545083 call enable_fixed_mtrr()
2055 15:40:08.548815 call enable_fixed_mtrr()
2056 15:40:08.551990 CPU physical address size: 39 bits
2057 15:40:08.555142 CPU physical address size: 39 bits
2058 15:40:08.558296 CPU physical address size: 39 bits
2059 15:40:08.565091 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2060 15:40:08.572055 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2061 15:40:08.575205 Checking segment from ROM address 0xffc02b38
2062 15:40:08.581649 Checking segment from ROM address 0xffc02b54
2063 15:40:08.584948 Loading segment from ROM address 0xffc02b38
2064 15:40:08.588155 code (compression=0)
2065 15:40:08.595205 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2066 15:40:08.604719 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2067 15:40:08.608503 it's not compressed!
2068 15:40:08.746293 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2069 15:40:08.752824 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2070 15:40:08.759152 Loading segment from ROM address 0xffc02b54
2071 15:40:08.759270 Entry Point 0x30000000
2072 15:40:08.762903 Loaded segments
2073 15:40:08.769091 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2074 15:40:08.812476 Finalizing chipset.
2075 15:40:08.815804 Finalizing SMM.
2076 15:40:08.815926 APMC done.
2077 15:40:08.822219 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2078 15:40:08.825364 mp_park_aps done after 0 msecs.
2079 15:40:08.829109 Jumping to boot code at 0x30000000(0x76b25000)
2080 15:40:08.838650 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2081 15:40:08.838765
2082 15:40:08.841940 Starting depthcharge on Voema...
2083 15:40:08.842327 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2084 15:40:08.842437 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2085 15:40:08.842526 Setting prompt string to ['volteer:']
2086 15:40:08.842621 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2087 15:40:08.852058 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2088 15:40:08.858649 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 15:40:08.865028 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 15:40:08.868322 Failed to find eMMC card reader
2091 15:40:08.868434 Wipe memory regions:
2092 15:40:08.875089 [0x00000000001000, 0x000000000a0000)
2093 15:40:08.878386 [0x00000000100000, 0x00000030000000)
2094 15:40:08.906852 [0x00000032662db0, 0x000000769ef000)
2095 15:40:08.945705 [0x00000100000000, 0x00000280400000)
2096 15:40:09.151760 ec_init: CrosEC protocol v3 supported (256, 256)
2097 15:40:09.158422 update_port_state: port C0 state: usb enable 1 mux conn 0
2098 15:40:09.168099 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2099 15:40:09.171921 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2100 15:40:09.178199 send_conn_disc_msg: pmc_send_cmd succeeded
2101 15:40:09.609584 R8152: Initializing
2102 15:40:09.612694 Version 6 (ocp_data = 5c30)
2103 15:40:09.616545 R8152: Done initializing
2104 15:40:09.619725 Adding net device
2105 15:40:09.924821 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2106 15:40:09.924959
2107 15:40:09.928326 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 15:40:10.029118 volteer: tftpboot 192.168.201.1 7463479/tftp-deploy-e5zlq1e5/kernel/bzImage 7463479/tftp-deploy-e5zlq1e5/kernel/cmdline 7463479/tftp-deploy-e5zlq1e5/ramdisk/ramdisk.cpio.gz
2110 15:40:10.029295 Setting prompt string to 'Starting kernel'
2111 15:40:10.029393 Setting prompt string to ['Starting kernel']
2112 15:40:10.029464 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 15:40:10.029541 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2114 15:40:10.034179 tftpboot 192.168.201.1 7463479/tftp-deploy-e5zlq1e5/kernel/bzImoy-e5zlq1e5/kernel/cmdline 7463479/tftp-deploy-e5zlq1e5/ramdisk/ramdisk.cpio.gz
2115 15:40:10.034273 Waiting for link
2116 15:40:10.238144 done.
2117 15:40:10.238292 MAC: 00:24:32:30:7c:e4
2118 15:40:10.241269 Sending DHCP discover... done.
2119 15:40:10.244531 Waiting for reply... done.
2120 15:40:10.248182 Sending DHCP request... done.
2121 15:40:10.251430 Waiting for reply... done.
2122 15:40:10.254736 My ip is 192.168.201.23
2123 15:40:10.257994 The DHCP server ip is 192.168.201.1
2124 15:40:10.264357 TFTP server IP predefined by user: 192.168.201.1
2125 15:40:10.271437 Bootfile predefined by user: 7463479/tftp-deploy-e5zlq1e5/kernel/bzImage
2126 15:40:10.274793 Sending tftp read request... done.
2127 15:40:10.277955 Waiting for the transfer...
2128 15:40:10.818813 00000000 ################################################################
2129 15:40:11.363728 00080000 ################################################################
2130 15:40:11.890668 00100000 ################################################################
2131 15:40:12.424087 00180000 ################################################################
2132 15:40:12.963682 00200000 ################################################################
2133 15:40:13.507511 00280000 ################################################################
2134 15:40:14.057818 00300000 ################################################################
2135 15:40:14.585198 00380000 ################################################################
2136 15:40:15.108174 00400000 ################################################################
2137 15:40:15.630203 00480000 ################################################################
2138 15:40:16.150115 00500000 ################################################################
2139 15:40:16.671561 00580000 ################################################################
2140 15:40:17.190102 00600000 ################################################################
2141 15:40:17.499917 00680000 ###################################### done.
2142 15:40:17.503179 The bootfile was 7126928 bytes long.
2143 15:40:17.506576 Sending tftp read request... done.
2144 15:40:17.510001 Waiting for the transfer...
2145 15:40:18.038053 00000000 ################################################################
2146 15:40:18.576874 00080000 ################################################################
2147 15:40:19.144302 00100000 ################################################################
2148 15:40:19.681724 00180000 ################################################################
2149 15:40:20.194998 00200000 ################################################################
2150 15:40:20.712749 00280000 ################################################################
2151 15:40:21.227517 00300000 ################################################################
2152 15:40:21.739290 00380000 ################################################################
2153 15:40:22.255706 00400000 ################################################################
2154 15:40:22.769712 00480000 ################################################################
2155 15:40:23.281197 00500000 ################################################################
2156 15:40:23.794293 00580000 ################################################################
2157 15:40:24.304641 00600000 ################################################################
2158 15:40:24.814943 00680000 ################################################################
2159 15:40:25.327482 00700000 ################################################################
2160 15:40:25.838315 00780000 ################################################################
2161 15:40:25.994386 00800000 #################### done.
2162 15:40:25.997844 Sending tftp read request... done.
2163 15:40:26.001474 Waiting for the transfer...
2164 15:40:26.001567 00000000 # done.
2165 15:40:26.011241 Command line loaded dynamically from TFTP file: 7463479/tftp-deploy-e5zlq1e5/kernel/cmdline
2166 15:40:26.024630 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2167 15:40:26.032000 Shutting down all USB controllers.
2168 15:40:26.032097 Removing current net device
2169 15:40:26.034865 Finalizing coreboot
2170 15:40:26.041915 Exiting depthcharge with code 4 at timestamp: 25893009
2171 15:40:26.042003
2172 15:40:26.042073 Starting kernel ...
2173 15:40:26.042137
2174 15:40:26.042210
2175 15:40:26.042608 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2176 15:40:26.042711 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2177 15:40:26.042788 Setting prompt string to ['Linux version [0-9]']
2178 15:40:26.042860 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 15:40:26.042932 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2181 15:44:53.042942 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2183 15:44:53.043153 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2185 15:44:53.043309 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2188 15:44:53.043604 end: 2 depthcharge-action (duration 00:05:00) [common]
2190 15:44:53.043796 Cleaning after the job
2191 15:44:53.043895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/ramdisk
2192 15:44:53.044543 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/kernel
2193 15:44:53.045097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463479/tftp-deploy-e5zlq1e5/modules
2194 15:44:53.045300 start: 5.1 power-off (timeout 00:00:30) [common]
2195 15:44:53.045450 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2196 15:44:53.064422 >> Command sent successfully.
2197 15:44:53.066386 Returned 0 in 0 seconds
2198 15:44:53.167223 end: 5.1 power-off (duration 00:00:00) [common]
2200 15:44:53.167562 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 15:44:53.167798 Listened to connection for namespace 'common' for up to 1s
2202 15:44:54.171669 Finalising connection for namespace 'common'
2203 15:44:54.171869 Disconnecting from shell: Finalise
2204 15:44:54.272610 end: 5.2 read-feedback (duration 00:00:01) [common]
2205 15:44:54.272776 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463479
2206 15:44:54.277814 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463479
2207 15:44:54.277932 JobError: Your job cannot terminate cleanly.