Boot log: dell-latitude-5400-8665U-sarien

    1 15:40:06.252476  lava-dispatcher, installed at version: 2022.06
    2 15:40:06.252689  start: 0 validate
    3 15:40:06.252840  Start time: 2022-09-30 15:40:06.252831+00:00 (UTC)
    4 15:40:06.252994  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:40:06.253144  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220919.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:40:06.542394  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:40:06.542574  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:40:11.548332  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:40:11.548525  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:40:11.551358  validate duration: 5.30
   12 15:40:11.551662  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:40:11.551788  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:40:11.551892  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:40:11.552023  Not decompressing ramdisk as can be used compressed.
   16 15:40:11.552124  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220919.0/x86/rootfs.cpio.gz
   17 15:40:11.552200  saving as /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/ramdisk/rootfs.cpio.gz
   18 15:40:11.552270  total size: 8415689 (8MB)
   19 15:40:11.553514  progress   0% (0MB)
   20 15:40:11.555982  progress   5% (0MB)
   21 15:40:11.558529  progress  10% (0MB)
   22 15:40:11.561017  progress  15% (1MB)
   23 15:40:11.563611  progress  20% (1MB)
   24 15:40:11.566337  progress  25% (2MB)
   25 15:40:11.569016  progress  30% (2MB)
   26 15:40:11.571558  progress  35% (2MB)
   27 15:40:11.574235  progress  40% (3MB)
   28 15:40:11.576957  progress  45% (3MB)
   29 15:40:11.579639  progress  50% (4MB)
   30 15:40:11.582331  progress  55% (4MB)
   31 15:40:11.585057  progress  60% (4MB)
   32 15:40:11.587635  progress  65% (5MB)
   33 15:40:11.590353  progress  70% (5MB)
   34 15:40:11.593018  progress  75% (6MB)
   35 15:40:11.595763  progress  80% (6MB)
   36 15:40:11.598110  progress  85% (6MB)
   37 15:40:11.600788  progress  90% (7MB)
   38 15:40:11.602928  progress  95% (7MB)
   39 15:40:11.605480  progress 100% (8MB)
   40 15:40:11.605782  8MB downloaded in 0.05s (150.00MB/s)
   41 15:40:11.605952  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 15:40:11.606231  end: 1.1 download-retry (duration 00:00:00) [common]
   44 15:40:11.606345  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 15:40:11.606451  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 15:40:11.606569  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 15:40:11.606648  saving as /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/kernel/bzImage
   48 15:40:11.606731  total size: 7126928 (6MB)
   49 15:40:11.606801  No compression specified
   50 15:40:11.608162  progress   0% (0MB)
   51 15:40:11.610115  progress   5% (0MB)
   52 15:40:11.612397  progress  10% (0MB)
   53 15:40:11.614539  progress  15% (1MB)
   54 15:40:11.616871  progress  20% (1MB)
   55 15:40:11.618993  progress  25% (1MB)
   56 15:40:11.621305  progress  30% (2MB)
   57 15:40:11.623654  progress  35% (2MB)
   58 15:40:11.625532  progress  40% (2MB)
   59 15:40:11.627832  progress  45% (3MB)
   60 15:40:11.629905  progress  50% (3MB)
   61 15:40:11.632223  progress  55% (3MB)
   62 15:40:11.634309  progress  60% (4MB)
   63 15:40:11.637202  progress  65% (4MB)
   64 15:40:11.639280  progress  70% (4MB)
   65 15:40:11.641625  progress  75% (5MB)
   66 15:40:11.643649  progress  80% (5MB)
   67 15:40:11.645834  progress  85% (5MB)
   68 15:40:11.648237  progress  90% (6MB)
   69 15:40:11.650349  progress  95% (6MB)
   70 15:40:11.652693  progress 100% (6MB)
   71 15:40:11.652960  6MB downloaded in 0.05s (147.04MB/s)
   72 15:40:11.653148  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:40:11.653437  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:40:11.653552  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 15:40:11.653653  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 15:40:11.653791  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 15:40:11.653872  saving as /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/modules/modules.tar
   79 15:40:11.653946  total size: 51896 (0MB)
   80 15:40:11.654033  Using unxz to decompress xz
   81 15:40:11.657841  progress  63% (0MB)
   82 15:40:11.658281  progress 100% (0MB)
   83 15:40:11.662051  0MB downloaded in 0.01s (6.12MB/s)
   84 15:40:11.662350  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 15:40:11.662725  end: 1.3 download-retry (duration 00:00:00) [common]
   87 15:40:11.662853  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   88 15:40:11.662980  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   89 15:40:11.663107  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 15:40:11.663218  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   91 15:40:11.663448  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e
   92 15:40:11.663591  makedir: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin
   93 15:40:11.663707  makedir: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/tests
   94 15:40:11.663828  makedir: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/results
   95 15:40:11.663968  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-add-keys
   96 15:40:11.664137  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-add-sources
   97 15:40:11.664286  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-background-process-start
   98 15:40:11.664461  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-background-process-stop
   99 15:40:11.664603  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-common-functions
  100 15:40:11.664760  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-echo-ipv4
  101 15:40:11.664917  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-install-packages
  102 15:40:11.665099  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-installed-packages
  103 15:40:11.665235  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-os-build
  104 15:40:11.665406  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-probe-channel
  105 15:40:11.665549  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-probe-ip
  106 15:40:11.665702  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-target-ip
  107 15:40:11.665853  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-target-mac
  108 15:40:11.666007  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-target-storage
  109 15:40:11.666180  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-case
  110 15:40:11.666329  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-event
  111 15:40:11.666469  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-feedback
  112 15:40:11.666637  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-raise
  113 15:40:11.666792  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-reference
  114 15:40:11.666948  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-runner
  115 15:40:11.667100  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-set
  116 15:40:11.667247  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-test-shell
  117 15:40:11.667386  Updating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-install-packages (oe)
  118 15:40:11.667557  Updating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/bin/lava-installed-packages (oe)
  119 15:40:11.667693  Creating /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/environment
  120 15:40:11.667824  LAVA metadata
  121 15:40:11.667916  - LAVA_JOB_ID=7463495
  122 15:40:11.668016  - LAVA_DISPATCHER_IP=192.168.201.1
  123 15:40:11.668156  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  124 15:40:11.668239  skipped lava-vland-overlay
  125 15:40:11.668350  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 15:40:11.668461  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  127 15:40:11.668537  skipped lava-multinode-overlay
  128 15:40:11.668654  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 15:40:11.668759  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  130 15:40:11.668880  Loading test definitions
  131 15:40:11.669008  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  132 15:40:11.669126  Using /lava-7463495 at stage 0
  133 15:40:11.669504  uuid=7463495_1.4.2.3.1 testdef=None
  134 15:40:11.669614  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 15:40:11.669746  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  136 15:40:11.670406  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 15:40:11.670725  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  139 15:40:11.671502  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 15:40:11.671830  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  142 15:40:11.672574  runner path: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/0/tests/0_dmesg test_uuid 7463495_1.4.2.3.1
  143 15:40:11.672768  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 15:40:11.673139  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  146 15:40:11.673264  Using /lava-7463495 at stage 1
  147 15:40:11.673559  uuid=7463495_1.4.2.3.5 testdef=None
  148 15:40:11.673665  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 15:40:11.673781  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  150 15:40:11.674299  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 15:40:11.674562  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  153 15:40:11.675236  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 15:40:11.675561  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  156 15:40:11.676255  runner path: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/1/tests/1_bootrr test_uuid 7463495_1.4.2.3.5
  157 15:40:11.676436  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 15:40:11.676711  Creating lava-test-runner.conf files
  160 15:40:11.676792  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/0 for stage 0
  161 15:40:11.676910  - 0_dmesg
  162 15:40:11.677001  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463495/lava-overlay-la5ckx7e/lava-7463495/1 for stage 1
  163 15:40:11.677121  - 1_bootrr
  164 15:40:11.677236  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 15:40:11.677360  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  166 15:40:11.684579  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 15:40:11.684718  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  168 15:40:11.684827  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 15:40:11.684930  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 15:40:11.685036  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  171 15:40:11.894681  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 15:40:11.895050  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  173 15:40:11.895187  extracting modules file /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463495/extract-overlay-ramdisk-5aic5h8v/ramdisk
  174 15:40:11.900453  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 15:40:11.900612  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  176 15:40:11.900723  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463495/compress-overlay-0a8_ezni/overlay-1.4.2.4.tar.gz to ramdisk
  177 15:40:11.900817  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463495/compress-overlay-0a8_ezni/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463495/extract-overlay-ramdisk-5aic5h8v/ramdisk
  178 15:40:11.905330  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 15:40:11.905475  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  180 15:40:11.905582  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 15:40:11.905699  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  182 15:40:11.905794  Building ramdisk /var/lib/lava/dispatcher/tmp/7463495/extract-overlay-ramdisk-5aic5h8v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463495/extract-overlay-ramdisk-5aic5h8v/ramdisk
  183 15:40:11.980163  >> 48008 blocks

  184 15:40:12.866408  rename /var/lib/lava/dispatcher/tmp/7463495/extract-overlay-ramdisk-5aic5h8v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/ramdisk/ramdisk.cpio.gz
  185 15:40:12.866856  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 15:40:12.867014  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  187 15:40:12.867145  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  188 15:40:12.867266  No mkimage arch provided, not using FIT.
  189 15:40:12.867387  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 15:40:12.867520  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 15:40:12.867646  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 15:40:12.867798  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  193 15:40:12.867923  No LXC device requested
  194 15:40:12.868056  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 15:40:12.868199  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  196 15:40:12.868316  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 15:40:12.868401  Checking files for TFTP limit of 4294967296 bytes.
  198 15:40:12.868822  end: 1 tftp-deploy (duration 00:00:01) [common]
  199 15:40:12.868943  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 15:40:12.869054  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 15:40:12.869209  substitutions:
  202 15:40:12.869289  - {DTB}: None
  203 15:40:12.869364  - {INITRD}: 7463495/tftp-deploy-s4uxarsv/ramdisk/ramdisk.cpio.gz
  204 15:40:12.869435  - {KERNEL}: 7463495/tftp-deploy-s4uxarsv/kernel/bzImage
  205 15:40:12.869502  - {LAVA_MAC}: None
  206 15:40:12.869568  - {PRESEED_CONFIG}: None
  207 15:40:12.869635  - {PRESEED_LOCAL}: None
  208 15:40:12.869700  - {RAMDISK}: 7463495/tftp-deploy-s4uxarsv/ramdisk/ramdisk.cpio.gz
  209 15:40:12.869765  - {ROOT_PART}: None
  210 15:40:12.869829  - {ROOT}: None
  211 15:40:12.869893  - {SERVER_IP}: 192.168.201.1
  212 15:40:12.869956  - {TEE}: None
  213 15:40:12.870020  Parsed boot commands:
  214 15:40:12.870083  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 15:40:12.870249  Parsed boot commands: tftpboot 192.168.201.1 7463495/tftp-deploy-s4uxarsv/kernel/bzImage 7463495/tftp-deploy-s4uxarsv/kernel/cmdline 7463495/tftp-deploy-s4uxarsv/ramdisk/ramdisk.cpio.gz
  216 15:40:12.870353  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 15:40:12.870468  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 15:40:12.870589  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 15:40:12.870689  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 15:40:12.870770  Not connected, no need to disconnect.
  221 15:40:12.870860  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 15:40:12.870957  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 15:40:12.871036  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-0'
  224 15:40:12.874216  Setting prompt string to ['lava-test: # ']
  225 15:40:12.874549  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 15:40:12.874682  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 15:40:12.874816  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 15:40:12.874936  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 15:40:12.875161  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
  230 15:40:12.896242  >> Command sent successfully.

  231 15:40:12.898608  Returned 0 in 0 seconds
  232 15:40:12.999409  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 15:40:13.000056  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 15:40:13.000230  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 15:40:13.000361  Setting prompt string to 'Starting depthcharge on sarien...'
  237 15:40:13.000445  Changing prompt to 'Starting depthcharge on sarien...'
  238 15:40:13.000528  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  239 15:40:13.000820  [Enter `^Ec?' for help]
  240 15:40:26.761759  
  241 15:40:26.762287  
  242 15:40:26.770313  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  243 15:40:26.774285  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
  244 15:40:26.779068  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  245 15:40:26.783882  CPU: AES supported, TXT supported, VT supported
  246 15:40:26.789278  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
  247 15:40:26.794826  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  248 15:40:26.799474  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
  249 15:40:26.802899  VBOOT: Loading verstage.
  250 15:40:26.805930  CBFS @ 1d00000 size 300000
  251 15:40:26.812544  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  252 15:40:26.815535  CBFS: Locating 'fallback/verstage'
  253 15:40:26.819408  CBFS: Found @ offset 10f6c0 size 1435c
  254 15:40:26.834178  
  255 15:40:26.834989  
  256 15:40:26.843378  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  257 15:40:26.850399  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  258 15:40:26.852871  done! DID_VID 0x00281ae0
  259 15:40:26.855020  TPM ready after 0 ms
  260 15:40:26.859798  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  261 15:40:26.961624  tlcl_send_startup: Startup return code is 0
  262 15:40:26.963305  TPM: setup succeeded
  263 15:40:26.982795  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  264 15:40:26.985509  Checking cr50 for recovery request
  265 15:40:26.994918  Phase 1
  266 15:40:26.999858  FMAP: Found \"FLASH\" version 1.1 at 1c10000.
  267 15:40:27.004761  FMAP: base = fe000000 size = 2000000 #areas = 37
  268 15:40:27.009234  FMAP: area GBB found @ 1c11000 (978944 bytes)
  269 15:40:27.016806  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  270 15:40:27.017736  Phase 2
  271 15:40:27.018847  Phase 3
  272 15:40:27.023118  FMAP: area GBB found @ 1c11000 (978944 bytes)
  273 15:40:27.030670  VB2:vb2_report_dev_firmware() This is developer signed firmware
  274 15:40:27.035272  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  275 15:40:27.040518  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  276 15:40:27.047028  VB2:vb2_verify_keyblock() Checking key block signature...
  277 15:40:27.060823  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  278 15:40:27.065955  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  279 15:40:27.071233  VB2:vb2_verify_fw_preamble() Verifying preamble.
  280 15:40:27.074503  Phase 4
  281 15:40:27.079985  FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
  282 15:40:27.086710  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  283 15:40:27.257255  VB2:vb2_rsa_verify_digest() Digest check failed!
  284 15:40:27.261816  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
  285 15:40:27.263360  Saving nvdata
  286 15:40:27.266620  Reboot requested (10020007)
  287 15:40:27.269076  board_reset() called!
  288 15:40:27.271528  full_reset() called!
  289 15:40:31.878890  
  290 15:40:31.879394  
  291 15:40:31.887322  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  292 15:40:31.892465  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
  293 15:40:31.896637  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  294 15:40:31.902295  CPU: AES supported, TXT supported, VT supported
  295 15:40:31.906997  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
  296 15:40:31.912388  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  297 15:40:31.917178  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
  298 15:40:31.921020  VBOOT: Loading verstage.
  299 15:40:31.923335  CBFS @ 1d00000 size 300000
  300 15:40:31.929877  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  301 15:40:31.933028  CBFS: Locating 'fallback/verstage'
  302 15:40:31.937287  CBFS: Found @ offset 10f6c0 size 1435c
  303 15:40:31.952398  
  304 15:40:31.952796  
  305 15:40:31.961116  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  306 15:40:31.967596  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  307 15:40:32.092624  .done! DID_VID 0x00281ae0
  308 15:40:32.094779  TPM ready after 0 ms
  309 15:40:32.098660  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  310 15:40:32.200993  tlcl_send_startup: Startup return code is 0
  311 15:40:32.203858  TPM: setup succeeded
  312 15:40:32.221298  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  313 15:40:32.225230  Checking cr50 for recovery request
  314 15:40:32.234875  Phase 1
  315 15:40:32.239474  FMAP: Found \"FLASH\" version 1.1 at 1c10000.
  316 15:40:32.244757  FMAP: base = fe000000 size = 2000000 #areas = 37
  317 15:40:32.249422  FMAP: area GBB found @ 1c11000 (978944 bytes)
  318 15:40:32.256791  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  319 15:40:32.262914  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  320 15:40:32.266342  Recovery requested (1009000e)
  321 15:40:32.267090  Saving nvdata
  322 15:40:32.284436  tlcl_extend: response is 0
  323 15:40:32.298468  tlcl_extend: response is 0
  324 15:40:32.301434  CBFS @ 1d00000 size 300000
  325 15:40:32.308013  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  326 15:40:32.311608  CBFS: Locating 'fallback/romstage'
  327 15:40:32.314801  CBFS: Found @ offset 80 size 15b2c
  328 15:40:32.317163  
  329 15:40:32.317621  
  330 15:40:32.324917  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
  331 15:40:32.329630  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
  332 15:40:32.334035  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  333 15:40:32.338184  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  334 15:40:32.342512  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  335 15:40:32.347234  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
  336 15:40:32.348696  TCO_STS:   0000 0004
  337 15:40:32.352114  GEN_PMCON: d0015209 00002200
  338 15:40:32.355097  GBLRST_CAUSE: 00000000 00000000
  339 15:40:32.357341  prev_sleep_state 5
  340 15:40:32.361025  Boot Count incremented to 10142
  341 15:40:32.363971  CBFS @ 1d00000 size 300000
  342 15:40:32.369901  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  343 15:40:32.372730  CBFS: Locating 'fspm.bin'
  344 15:40:32.376116  CBFS: Found @ offset 60fc0 size 70000
  345 15:40:32.382643  FMAP: Found \"FLASH\" version 1.1 at 1c10000.
  346 15:40:32.386916  FMAP: base = fe000000 size = 2000000 #areas = 37
  347 15:40:32.392583  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
  348 15:40:32.399260  Probing TPM I2C: done! DID_VID 0x00281ae0
  349 15:40:32.401909  Locality already claimed
  350 15:40:32.404949  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  351 15:40:32.424604  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  352 15:40:32.431100  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  353 15:40:32.434443  MRC cache found, size 18e0
  354 15:40:32.435972  bootmode is set to :2
  355 15:40:50.393454  CBMEM:
  356 15:40:50.396183  IMD: root @ 89fff000 254 entries.
  357 15:40:50.399697  IMD: root @ 89ffec00 62 entries.
  358 15:40:50.402283  External stage cache:
  359 15:40:50.406238  IMD: root @ 8abff000 254 entries.
  360 15:40:50.410055  IMD: root @ 8abfec00 62 entries.
  361 15:40:50.415487  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
  362 15:40:50.419413  creating vboot_handoff structure
  363 15:40:50.441309  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  364 15:40:50.506324  tlcl_write: response is 0
  365 15:40:50.526726  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  366 15:40:50.530195  MRC: TPM MRC hash updated successfully.
  367 15:40:50.532138  1 DIMMs found
  368 15:40:50.534570  top_of_ram = 0x8a000000
  369 15:40:50.539436  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
  370 15:40:50.544801  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  371 15:40:50.547016  CBFS @ 1d00000 size 300000
  372 15:40:50.553091  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  373 15:40:50.557672  CBFS: Locating 'fallback/postcar'
  374 15:40:50.560841  CBFS: Found @ offset 107000 size 41a4
  375 15:40:50.567471  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
  376 15:40:50.577163  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
  377 15:40:50.581484  Processing 126 relocs. Offset value of 0x87cdd000
  378 15:40:50.584471  
  379 15:40:50.584744  
  380 15:40:50.592860  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
  381 15:40:50.596505  CBFS @ 1d00000 size 300000
  382 15:40:50.602138  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  383 15:40:50.605813  CBFS: Locating 'fallback/ramstage'
  384 15:40:50.610060  CBFS: Found @ offset 458c0 size 1a8a8
  385 15:40:50.615945  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
  386 15:40:50.644662  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
  387 15:40:50.649067  Processing 3754 relocs. Offset value of 0x88e81000
  388 15:40:50.655094  
  389 15:40:50.655368  
  390 15:40:50.663665  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
  391 15:40:50.668613  FMAP: Found \"FLASH\" version 1.1 at 1c10000.
  392 15:40:50.673909  FMAP: base = fe000000 size = 2000000 #areas = 37
  393 15:40:50.678954  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
  394 15:40:50.682607  WARNING: RO_VPD is uninitialized or empty.
  395 15:40:50.687591  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  396 15:40:50.691687  WARNING: RW_VPD is uninitialized or empty.
  397 15:40:50.692889  Normal boot.
  398 15:40:50.700168  BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1164
  399 15:40:50.702262  CBFS @ 1d00000 size 300000
  400 15:40:50.708774  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  401 15:40:50.712894  CBFS: Locating 'cpu_microcode_blob.bin'
  402 15:40:50.716642  CBFS: Found @ offset 15c40 size 2fc00
  403 15:40:50.721087  microcode: sig=0x806ec pf=0x80 revision=0xb7
  404 15:40:50.723648  Skip microcode update
  405 15:40:50.726353  CBFS @ 1d00000 size 300000
  406 15:40:50.731940  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  407 15:40:50.735019  CBFS: Locating 'fsps.bin'
  408 15:40:50.738596  CBFS: Found @ offset d1fc0 size 35000
  409 15:40:50.768728  Detected 4 core, 8 thread CPU.
  410 15:40:50.771076  Setting up SMI for CPU
  411 15:40:50.773145  IED base = 0x8ac00000
  412 15:40:50.775855  IED size = 0x00400000
  413 15:40:50.779271  Will perform SMM setup.
  414 15:40:50.783559  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
  415 15:40:50.791290  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  416 15:40:50.796175  Processing 16 relocs. Offset value of 0x00030000
  417 15:40:50.799085  Attempting to start 7 APs
  418 15:40:50.802750  Waiting for 10ms after sending INIT.
  419 15:40:50.818159  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
  420 15:40:50.819840  done.
  421 15:40:50.821999  AP: slot 2 apic_id 7.
  422 15:40:50.823402  AP: slot 5 apic_id 6.
  423 15:40:50.825552  AP: slot 6 apic_id 2.
  424 15:40:50.828226  AP: slot 7 apic_id 3.
  425 15:40:50.830058  AP: slot 4 apic_id 5.
  426 15:40:50.832915  AP: slot 1 apic_id 4.
  427 15:40:50.836403  Waiting for 2nd SIPI to complete...done.
  428 15:40:50.844107  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  429 15:40:50.848945  Processing 13 relocs. Offset value of 0x00038000
  430 15:40:50.855908  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
  431 15:40:50.859667  Installing SMM handler to 0x8a000000
  432 15:40:50.867489  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
  433 15:40:50.873511  Processing 867 relocs. Offset value of 0x8a010000
  434 15:40:50.881074  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
  435 15:40:50.885634  Processing 13 relocs. Offset value of 0x8a008000
  436 15:40:50.891812  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
  437 15:40:50.897045  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
  438 15:40:50.903119  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
  439 15:40:50.909002  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
  440 15:40:50.914758  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
  441 15:40:50.920563  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
  442 15:40:50.926192  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
  443 15:40:50.932823  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
  444 15:40:50.936693  Clearing SMI status registers
  445 15:40:50.937323  SMI_STS: PM1 
  446 15:40:50.939946  PM1_STS: WAK PWRBTN TMROF 
  447 15:40:50.942686  TCO_STS: BOOT SECOND_TO 
  448 15:40:50.944599  GPE0 STD STS: eSPI 
  449 15:40:50.946757  New SMBASE 0x8a000000
  450 15:40:50.950589  In relocation handler: CPU 0
  451 15:40:50.954285  New SMBASE=0x8a000000 IEDBASE=0x8ac00000
  452 15:40:50.958963  Writing SMRR. base = 0x8a000006, mask=0xff000800
  453 15:40:50.961245  Relocation complete.
  454 15:40:50.963647  New SMBASE 0x89fff400
  455 15:40:50.966021  In relocation handler: CPU 3
  456 15:40:50.970101  New SMBASE=0x89fff400 IEDBASE=0x8ac00000
  457 15:40:50.975384  Writing SMRR. base = 0x8a000006, mask=0xff000800
  458 15:40:50.977608  Relocation complete.
  459 15:40:50.980242  New SMBASE 0x89fffc00
  460 15:40:50.982539  In relocation handler: CPU 1
  461 15:40:50.986757  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
  462 15:40:50.991886  Writing SMRR. base = 0x8a000006, mask=0xff000800
  463 15:40:50.994032  Relocation complete.
  464 15:40:50.995851  New SMBASE 0x89fff000
  465 15:40:50.999148  In relocation handler: CPU 4
  466 15:40:51.002899  New SMBASE=0x89fff000 IEDBASE=0x8ac00000
  467 15:40:51.008308  Writing SMRR. base = 0x8a000006, mask=0xff000800
  468 15:40:51.010025  Relocation complete.
  469 15:40:51.012128  New SMBASE 0x89fff800
  470 15:40:51.015401  In relocation handler: CPU 2
  471 15:40:51.019608  New SMBASE=0x89fff800 IEDBASE=0x8ac00000
  472 15:40:51.024643  Writing SMRR. base = 0x8a000006, mask=0xff000800
  473 15:40:51.026867  Relocation complete.
  474 15:40:51.029025  New SMBASE 0x89ffec00
  475 15:40:51.031967  In relocation handler: CPU 5
  476 15:40:51.035857  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
  477 15:40:51.040266  Writing SMRR. base = 0x8a000006, mask=0xff000800
  478 15:40:51.043198  Relocation complete.
  479 15:40:51.044913  New SMBASE 0x89ffe400
  480 15:40:51.048054  In relocation handler: CPU 7
  481 15:40:51.052236  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
  482 15:40:51.057018  Writing SMRR. base = 0x8a000006, mask=0xff000800
  483 15:40:51.059373  Relocation complete.
  484 15:40:51.061399  New SMBASE 0x89ffe800
  485 15:40:51.064767  In relocation handler: CPU 6
  486 15:40:51.068043  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
  487 15:40:51.073580  Writing SMRR. base = 0x8a000006, mask=0xff000800
  488 15:40:51.075172  Relocation complete.
  489 15:40:51.077434  Initializing CPU #0
  490 15:40:51.080945  CPU: vendor Intel device 806ec
  491 15:40:51.084774  CPU: family 06, model 8e, stepping 0c
  492 15:40:51.086929  Clearing out pending MCEs
  493 15:40:51.091525  Setting up local APIC... apic_id: 0x00 done.
  494 15:40:51.094882  Turbo is available but hidden
  495 15:40:51.096828  Turbo has been enabled
  496 15:40:51.098965  VMX status: enabled
  497 15:40:51.102770  IA32_FEATURE_CONTROL status: locked
  498 15:40:51.105313  Skip microcode update
  499 15:40:51.106792  CPU #0 initialized
  500 15:40:51.109120  Initializing CPU #3
  501 15:40:51.111307  Initializing CPU #2
  502 15:40:51.113458  Initializing CPU #7
  503 15:40:51.114778  Initializing CPU #6
  504 15:40:51.117990  CPU: vendor Intel device 806ec
  505 15:40:51.122310  CPU: family 06, model 8e, stepping 0c
  506 15:40:51.124908  CPU: vendor Intel device 806ec
  507 15:40:51.129637  CPU: family 06, model 8e, stepping 0c
  508 15:40:51.131355  Clearing out pending MCEs
  509 15:40:51.134183  Clearing out pending MCEs
  510 15:40:51.139156  Setting up local APIC...Initializing CPU #4
  511 15:40:51.140801  Initializing CPU #1
  512 15:40:51.143523  CPU: vendor Intel device 806ec
  513 15:40:51.147238  CPU: family 06, model 8e, stepping 0c
  514 15:40:51.150698  CPU: vendor Intel device 806ec
  515 15:40:51.154454  CPU: family 06, model 8e, stepping 0c
  516 15:40:51.157285  Clearing out pending MCEs
  517 15:40:51.160215  Clearing out pending MCEs
  518 15:40:51.168915  Setting up local APIC...Setting up local APIC...Setting up local APIC...Initializing CPU #5
  519 15:40:51.172080  CPU: vendor Intel device 806ec
  520 15:40:51.175843  CPU: family 06, model 8e, stepping 0c
  521 15:40:51.179115  CPU: vendor Intel device 806ec
  522 15:40:51.183181  CPU: family 06, model 8e, stepping 0c
  523 15:40:51.184944  Clearing out pending MCEs
  524 15:40:51.188021  Clearing out pending MCEs
  525 15:40:51.192176  Setting up local APIC... apic_id: 0x04 done.
  526 15:40:51.194757   apic_id: 0x05 done.
  527 15:40:51.196534  VMX status: enabled
  528 15:40:51.198730  VMX status: enabled
  529 15:40:51.202691  IA32_FEATURE_CONTROL status: locked
  530 15:40:51.205779  IA32_FEATURE_CONTROL status: locked
  531 15:40:51.207623  Skip microcode update
  532 15:40:51.210124  Skip microcode update
  533 15:40:51.212403  CPU #1 initialized
  534 15:40:51.214171  CPU #4 initialized
  535 15:40:51.216174   apic_id: 0x07 done.
  536 15:40:51.221533  Setting up local APIC...CPU: vendor Intel device 806ec
  537 15:40:51.225158  CPU: family 06, model 8e, stepping 0c
  538 15:40:51.227705   apic_id: 0x02 done.
  539 15:40:51.229881   apic_id: 0x03 done.
  540 15:40:51.232329  VMX status: enabled
  541 15:40:51.233654  VMX status: enabled
  542 15:40:51.237609  IA32_FEATURE_CONTROL status: locked
  543 15:40:51.240850  IA32_FEATURE_CONTROL status: locked
  544 15:40:51.243043  Skip microcode update
  545 15:40:51.245167  Skip microcode update
  546 15:40:51.247561  CPU #6 initialized
  547 15:40:51.249501  CPU #7 initialized
  548 15:40:51.251815  Clearing out pending MCEs
  549 15:40:51.253802  VMX status: enabled
  550 15:40:51.256116   apic_id: 0x06 done.
  551 15:40:51.260209  IA32_FEATURE_CONTROL status: locked
  552 15:40:51.261887  VMX status: enabled
  553 15:40:51.263834  Skip microcode update
  554 15:40:51.267957  IA32_FEATURE_CONTROL status: locked
  555 15:40:51.269647  CPU #2 initialized
  556 15:40:51.271880  Skip microcode update
  557 15:40:51.276319  Setting up local APIC...CPU #5 initialized
  558 15:40:51.278447   apic_id: 0x01 done.
  559 15:40:51.280664  VMX status: enabled
  560 15:40:51.283566  IA32_FEATURE_CONTROL status: locked
  561 15:40:51.286219  Skip microcode update
  562 15:40:51.288124  CPU #3 initialized
  563 15:40:51.292532  bsp_do_flight_plan done after 451 msecs.
  564 15:40:51.295384  CPU: frequency set to 4800 MHz
  565 15:40:51.297055  Enabling SMIs.
  566 15:40:51.298249  Locking SMM.
  567 15:40:51.301338  CBFS @ 1d00000 size 300000
  568 15:40:51.307682  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  569 15:40:51.310321  CBFS: Locating 'vbt.bin'
  570 15:40:51.314205  CBFS: Found @ offset 60a40 size 4a0
  571 15:40:51.319206  Found a VBT of 4608 bytes after decompression
  572 15:40:51.332383  FMAP: area GBB found @ 1c11000 (978944 bytes)
  573 15:40:51.364658  Detected 4 core, 8 thread CPU.
  574 15:40:51.366919  Detected 4 core, 8 thread CPU.
  575 15:40:51.594870  Display FSP Version Info HOB
  576 15:40:51.597819  Reference Code - CPU = 7.0.5e.40
  577 15:40:51.599643  uCode Version = 0.0.0.b8
  578 15:40:51.602763  Display FSP Version Info HOB
  579 15:40:51.606180  Reference Code - ME = 7.0.5e.40
  580 15:40:51.608128  MEBx version = 0.0.0.0
  581 15:40:51.611885  ME Firmware Version = Consumer SKU
  582 15:40:51.614924  Display FSP Version Info HOB
  583 15:40:51.618508  Reference Code - CNL PCH = 7.0.5e.40
  584 15:40:51.621911  PCH-CRID Status = Disabled
  585 15:40:51.625151  CNL PCH H A0 Hsio Version = 2.0.0.0
  586 15:40:51.628825  CNL PCH H Ax Hsio Version = 9.0.0.0
  587 15:40:51.632308  CNL PCH H Bx Hsio Version = a.0.0.0
  588 15:40:51.636289  CNL PCH LP B0 Hsio Version = 7.0.0.0
  589 15:40:51.639148  CNL PCH LP Bx Hsio Version = 6.0.0.0
  590 15:40:51.643256  CNL PCH LP Dx Hsio Version = 7.0.0.0
  591 15:40:51.646369  Display FSP Version Info HOB
  592 15:40:51.651351  Reference Code - SA - System Agent = 7.0.5e.40
  593 15:40:51.653790  Reference Code - MRC = 0.7.1.68
  594 15:40:51.656979  SA - PCIe Version = 7.0.5e.40
  595 15:40:51.660085  SA-CRID Status = Disabled
  596 15:40:51.662971  SA-CRID Original Value = 0.0.0.c
  597 15:40:51.665943  SA-CRID New Value = 0.0.0.c
  598 15:40:51.684160  RTC Init
  599 15:40:51.688252  Set power off after power failure.
  600 15:40:51.689839  Disabling Deep S3
  601 15:40:51.691535  Disabling Deep S3
  602 15:40:51.693203  Disabling Deep S4
  603 15:40:51.695284  Disabling Deep S4
  604 15:40:51.696807  Disabling Deep S5
  605 15:40:51.698492  Disabling Deep S5
  606 15:40:51.705678  BS: BS_DEV_INIT_CHIPS times (us): entry 598802 run 384105 exit 16235
  607 15:40:51.708278  Enumerating buses...
  608 15:40:51.711960  Show all devs... Before device enumeration.
  609 15:40:51.714268  Root Device: enabled 1
  610 15:40:51.717163  CPU_CLUSTER: 0: enabled 1
  611 15:40:51.719702  DOMAIN: 0000: enabled 1
  612 15:40:51.721546  APIC: 00: enabled 1
  613 15:40:51.724600  PCI: 00:00.0: enabled 1
  614 15:40:51.726721  PCI: 00:02.0: enabled 1
  615 15:40:51.728769  PCI: 00:04.0: enabled 1
  616 15:40:51.731689  PCI: 00:12.0: enabled 1
  617 15:40:51.733795  PCI: 00:12.5: enabled 0
  618 15:40:51.736763  PCI: 00:12.6: enabled 0
  619 15:40:51.738961  PCI: 00:13.0: enabled 0
  620 15:40:51.741208  PCI: 00:14.0: enabled 1
  621 15:40:51.744105  PCI: 00:14.1: enabled 0
  622 15:40:51.746186  PCI: 00:14.3: enabled 1
  623 15:40:51.748602  PCI: 00:14.5: enabled 0
  624 15:40:51.751241  PCI: 00:15.0: enabled 1
  625 15:40:51.753956  PCI: 00:15.1: enabled 1
  626 15:40:51.755520  PCI: 00:15.2: enabled 0
  627 15:40:51.758322  PCI: 00:15.3: enabled 0
  628 15:40:51.760639  PCI: 00:16.0: enabled 1
  629 15:40:51.762943  PCI: 00:16.1: enabled 0
  630 15:40:51.765345  PCI: 00:16.2: enabled 0
  631 15:40:51.767887  PCI: 00:16.3: enabled 0
  632 15:40:51.770240  PCI: 00:16.4: enabled 0
  633 15:40:51.772773  PCI: 00:16.5: enabled 0
  634 15:40:51.775730  PCI: 00:17.0: enabled 1
  635 15:40:51.777797  PCI: 00:19.0: enabled 1
  636 15:40:51.780649  PCI: 00:19.1: enabled 0
  637 15:40:51.782497  PCI: 00:19.2: enabled 1
  638 15:40:51.785360  PCI: 00:1a.0: enabled 0
  639 15:40:51.787616  PCI: 00:1c.0: enabled 1
  640 15:40:51.790258  PCI: 00:1c.1: enabled 0
  641 15:40:51.792417  PCI: 00:1c.2: enabled 0
  642 15:40:51.794837  PCI: 00:1c.3: enabled 0
  643 15:40:51.797362  PCI: 00:1c.4: enabled 0
  644 15:40:51.799700  PCI: 00:1c.5: enabled 0
  645 15:40:51.801908  PCI: 00:1c.6: enabled 0
  646 15:40:51.804702  PCI: 00:1c.7: enabled 1
  647 15:40:51.806566  PCI: 00:1d.0: enabled 1
  648 15:40:51.809027  PCI: 00:1d.1: enabled 1
  649 15:40:51.812119  PCI: 00:1d.2: enabled 0
  650 15:40:51.814290  PCI: 00:1d.3: enabled 0
  651 15:40:51.816763  PCI: 00:1d.4: enabled 1
  652 15:40:51.819212  PCI: 00:1e.0: enabled 0
  653 15:40:51.821051  PCI: 00:1e.1: enabled 0
  654 15:40:51.823552  PCI: 00:1e.2: enabled 0
  655 15:40:51.826361  PCI: 00:1e.3: enabled 0
  656 15:40:51.829107  PCI: 00:1f.0: enabled 1
  657 15:40:51.830952  PCI: 00:1f.1: enabled 1
  658 15:40:51.833435  PCI: 00:1f.2: enabled 1
  659 15:40:51.836295  PCI: 00:1f.3: enabled 1
  660 15:40:51.838331  PCI: 00:1f.4: enabled 1
  661 15:40:51.841319  PCI: 00:1f.5: enabled 1
  662 15:40:51.843492  PCI: 00:1f.6: enabled 1
  663 15:40:51.845412  USB0 port 0: enabled 1
  664 15:40:51.847860  I2C: 00:10: enabled 1
  665 15:40:51.849905  I2C: 00:10: enabled 1
  666 15:40:51.852519  I2C: 00:34: enabled 1
  667 15:40:51.854711  I2C: 00:2c: enabled 1
  668 15:40:51.856879  I2C: 00:50: enabled 1
  669 15:40:51.858925  PNP: 0c09.0: enabled 1
  670 15:40:51.861407  USB2 port 0: enabled 1
  671 15:40:51.863651  USB2 port 1: enabled 1
  672 15:40:51.865861  USB2 port 2: enabled 1
  673 15:40:51.868495  USB2 port 4: enabled 1
  674 15:40:51.870575  USB2 port 5: enabled 1
  675 15:40:51.873621  USB2 port 6: enabled 1
  676 15:40:51.875451  USB2 port 7: enabled 1
  677 15:40:51.877699  USB2 port 8: enabled 1
  678 15:40:51.880457  USB2 port 9: enabled 1
  679 15:40:51.883239  USB3 port 0: enabled 1
  680 15:40:51.884876  USB3 port 1: enabled 1
  681 15:40:51.886935  USB3 port 2: enabled 1
  682 15:40:51.889908  USB3 port 3: enabled 1
  683 15:40:51.891905  USB3 port 4: enabled 1
  684 15:40:51.893970  APIC: 04: enabled 1
  685 15:40:51.895662  APIC: 07: enabled 1
  686 15:40:51.897926  APIC: 01: enabled 1
  687 15:40:51.900598  APIC: 05: enabled 1
  688 15:40:51.902245  APIC: 06: enabled 1
  689 15:40:51.904154  APIC: 02: enabled 1
  690 15:40:51.905969  APIC: 03: enabled 1
  691 15:40:51.908496  Compare with tree...
  692 15:40:51.910239  Root Device: enabled 1
  693 15:40:51.913096   CPU_CLUSTER: 0: enabled 1
  694 15:40:51.915575    APIC: 00: enabled 1
  695 15:40:51.918203    APIC: 04: enabled 1
  696 15:40:51.919726    APIC: 07: enabled 1
  697 15:40:51.922529    APIC: 01: enabled 1
  698 15:40:51.924431    APIC: 05: enabled 1
  699 15:40:51.926647    APIC: 06: enabled 1
  700 15:40:51.929602    APIC: 02: enabled 1
  701 15:40:51.931262    APIC: 03: enabled 1
  702 15:40:51.933957   DOMAIN: 0000: enabled 1
  703 15:40:51.936379    PCI: 00:00.0: enabled 1
  704 15:40:51.938601    PCI: 00:02.0: enabled 1
  705 15:40:51.942215    PCI: 00:04.0: enabled 1
  706 15:40:51.944316    PCI: 00:12.0: enabled 1
  707 15:40:51.946806    PCI: 00:12.5: enabled 0
  708 15:40:51.949271    PCI: 00:12.6: enabled 0
  709 15:40:51.952639    PCI: 00:13.0: enabled 0
  710 15:40:51.954824    PCI: 00:14.0: enabled 1
  711 15:40:51.957151     USB0 port 0: enabled 1
  712 15:40:51.959905      USB2 port 0: enabled 1
  713 15:40:51.962477      USB2 port 1: enabled 1
  714 15:40:51.965931      USB2 port 2: enabled 1
  715 15:40:51.968552      USB2 port 4: enabled 1
  716 15:40:51.970674      USB2 port 5: enabled 1
  717 15:40:51.973378      USB2 port 6: enabled 1
  718 15:40:51.976223      USB2 port 7: enabled 1
  719 15:40:51.979200      USB2 port 8: enabled 1
  720 15:40:51.981879      USB2 port 9: enabled 1
  721 15:40:51.984988      USB3 port 0: enabled 1
  722 15:40:51.987846      USB3 port 1: enabled 1
  723 15:40:51.990567      USB3 port 2: enabled 1
  724 15:40:51.992460      USB3 port 3: enabled 1
  725 15:40:51.995725      USB3 port 4: enabled 1
  726 15:40:51.997955    PCI: 00:14.1: enabled 0
  727 15:40:52.000298    PCI: 00:14.3: enabled 1
  728 15:40:52.003330    PCI: 00:14.5: enabled 0
  729 15:40:52.006037    PCI: 00:15.0: enabled 1
  730 15:40:52.009120     I2C: 00:10: enabled 1
  731 15:40:52.010826     I2C: 00:10: enabled 1
  732 15:40:52.013380     I2C: 00:34: enabled 1
  733 15:40:52.015845    PCI: 00:15.1: enabled 1
  734 15:40:52.018947     I2C: 00:2c: enabled 1
  735 15:40:52.021218    PCI: 00:15.2: enabled 0
  736 15:40:52.024339    PCI: 00:15.3: enabled 0
  737 15:40:52.026732    PCI: 00:16.0: enabled 1
  738 15:40:52.028920    PCI: 00:16.1: enabled 0
  739 15:40:52.031931    PCI: 00:16.2: enabled 0
  740 15:40:52.034298    PCI: 00:16.3: enabled 0
  741 15:40:52.037421    PCI: 00:16.4: enabled 0
  742 15:40:52.039437    PCI: 00:16.5: enabled 0
  743 15:40:52.042036    PCI: 00:17.0: enabled 1
  744 15:40:52.045387    PCI: 00:19.0: enabled 1
  745 15:40:52.047122     I2C: 00:50: enabled 1
  746 15:40:52.049753    PCI: 00:19.1: enabled 0
  747 15:40:52.052587    PCI: 00:19.2: enabled 1
  748 15:40:52.055213    PCI: 00:1a.0: enabled 0
  749 15:40:52.058394    PCI: 00:1c.0: enabled 1
  750 15:40:52.060545    PCI: 00:1c.1: enabled 0
  751 15:40:52.063027    PCI: 00:1c.2: enabled 0
  752 15:40:52.065612    PCI: 00:1c.3: enabled 0
  753 15:40:52.068551    PCI: 00:1c.4: enabled 0
  754 15:40:52.070695    PCI: 00:1c.5: enabled 0
  755 15:40:52.073447    PCI: 00:1c.6: enabled 0
  756 15:40:52.076495    PCI: 00:1c.7: enabled 1
  757 15:40:52.079427    PCI: 00:1d.0: enabled 1
  758 15:40:52.081779    PCI: 00:1d.1: enabled 1
  759 15:40:52.083866    PCI: 00:1d.2: enabled 0
  760 15:40:52.086919    PCI: 00:1d.3: enabled 0
  761 15:40:52.089646    PCI: 00:1d.4: enabled 1
  762 15:40:52.091888    PCI: 00:1e.0: enabled 0
  763 15:40:52.094852    PCI: 00:1e.1: enabled 0
  764 15:40:52.097451    PCI: 00:1e.2: enabled 0
  765 15:40:52.099910    PCI: 00:1e.3: enabled 0
  766 15:40:52.103043    PCI: 00:1f.0: enabled 1
  767 15:40:52.105522     PNP: 0c09.0: enabled 1
  768 15:40:52.107861    PCI: 00:1f.1: enabled 1
  769 15:40:52.111091    PCI: 00:1f.2: enabled 1
  770 15:40:52.113223    PCI: 00:1f.3: enabled 1
  771 15:40:52.116088    PCI: 00:1f.4: enabled 1
  772 15:40:52.118795    PCI: 00:1f.5: enabled 1
  773 15:40:52.121154    PCI: 00:1f.6: enabled 1
  774 15:40:52.123569  Root Device scanning...
  775 15:40:52.126925  root_dev_scan_bus for Root Device
  776 15:40:52.129537  CPU_CLUSTER: 0 enabled
  777 15:40:52.131745  DOMAIN: 0000 enabled
  778 15:40:52.133983  DOMAIN: 0000 scanning...
  779 15:40:52.137733  PCI: pci_scan_bus for bus 00
  780 15:40:52.140083  PCI: 00:00.0 [8086/0000] ops
  781 15:40:52.143790  PCI: 00:00.0 [8086/3e34] enabled
  782 15:40:52.146474  PCI: 00:02.0 [8086/0000] ops
  783 15:40:52.150030  PCI: 00:02.0 [8086/3ea0] enabled
  784 15:40:52.153092  PCI: 00:04.0 [8086/1903] enabled
  785 15:40:52.156278  PCI: 00:08.0 [8086/1911] enabled
  786 15:40:52.160226  PCI: 00:12.0 [8086/9df9] enabled
  787 15:40:52.163453  PCI: 00:14.0 [8086/0000] bus ops
  788 15:40:52.166656  PCI: 00:14.0 [8086/9ded] enabled
  789 15:40:52.169518  PCI: 00:14.2 [8086/9def] enabled
  790 15:40:52.173244  PCI: 00:14.3 [8086/9df0] enabled
  791 15:40:52.176133  PCI: 00:15.0 [8086/0000] bus ops
  792 15:40:52.179876  PCI: 00:15.0 [8086/9de8] enabled
  793 15:40:52.182856  PCI: 00:15.1 [8086/0000] bus ops
  794 15:40:52.186030  PCI: 00:15.1 [8086/9de9] enabled
  795 15:40:52.192163  PCI: Static device PCI: 00:16.0 not found, disabling it.
  796 15:40:52.194907  PCI: 00:17.0 [8086/0000] ops
  797 15:40:52.198207  PCI: 00:17.0 [8086/9dd3] enabled
  798 15:40:52.201642  PCI: 00:19.0 [8086/0000] bus ops
  799 15:40:52.205247  PCI: 00:19.0 [8086/9dc5] enabled
  800 15:40:52.208551  PCI: 00:19.2 [8086/0000] ops
  801 15:40:52.210937  PCI: 00:19.2 [8086/9dc7] enabled
  802 15:40:52.214238  PCI: 00:1c.0 [8086/0000] bus ops
  803 15:40:52.218101  PCI: 00:1c.0 [8086/9dbf] enabled
  804 15:40:52.223564  PCI: Static device PCI: 00:1c.7 not found, disabling it.
  805 15:40:52.226620  PCI: 00:1d.0 [8086/0000] bus ops
  806 15:40:52.229918  PCI: 00:1d.0 [8086/9db4] enabled
  807 15:40:52.235807  PCI: Static device PCI: 00:1d.1 not found, disabling it.
  808 15:40:52.241896  PCI: Static device PCI: 00:1d.4 not found, disabling it.
  809 15:40:52.245297  PCI: 00:1f.0 [8086/0000] bus ops
  810 15:40:52.248040  PCI: 00:1f.0 [8086/9d84] enabled
  811 15:40:52.253778  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  812 15:40:52.259848  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  813 15:40:52.263085  PCI: 00:1f.3 [8086/0000] bus ops
  814 15:40:52.266348  PCI: 00:1f.3 [8086/9dc8] enabled
  815 15:40:52.269460  PCI: 00:1f.4 [8086/0000] bus ops
  816 15:40:52.272231  PCI: 00:1f.4 [8086/9da3] enabled
  817 15:40:52.275785  PCI: 00:1f.5 [8086/0000] bus ops
  818 15:40:52.279832  PCI: 00:1f.5 [8086/9da4] enabled
  819 15:40:52.283095  PCI: 00:1f.6 [8086/15be] enabled
  820 15:40:52.285458  PCI: Leftover static devices:
  821 15:40:52.287364  PCI: 00:12.5
  822 15:40:52.288740  PCI: 00:12.6
  823 15:40:52.289947  PCI: 00:13.0
  824 15:40:52.290955  PCI: 00:14.1
  825 15:40:52.292235  PCI: 00:14.5
  826 15:40:52.293885  PCI: 00:15.2
  827 15:40:52.295138  PCI: 00:15.3
  828 15:40:52.296975  PCI: 00:16.0
  829 15:40:52.298241  PCI: 00:16.1
  830 15:40:52.299486  PCI: 00:16.2
  831 15:40:52.300282  PCI: 00:16.3
  832 15:40:52.301676  PCI: 00:16.4
  833 15:40:52.303883  PCI: 00:16.5
  834 15:40:52.304688  PCI: 00:19.1
  835 15:40:52.306614  PCI: 00:1a.0
  836 15:40:52.307702  PCI: 00:1c.1
  837 15:40:52.309351  PCI: 00:1c.2
  838 15:40:52.310365  PCI: 00:1c.3
  839 15:40:52.312065  PCI: 00:1c.4
  840 15:40:52.313117  PCI: 00:1c.5
  841 15:40:52.314007  PCI: 00:1c.6
  842 15:40:52.316355  PCI: 00:1c.7
  843 15:40:52.317491  PCI: 00:1d.1
  844 15:40:52.319162  PCI: 00:1d.2
  845 15:40:52.320373  PCI: 00:1d.3
  846 15:40:52.321480  PCI: 00:1d.4
  847 15:40:52.323049  PCI: 00:1e.0
  848 15:40:52.323999  PCI: 00:1e.1
  849 15:40:52.325720  PCI: 00:1e.2
  850 15:40:52.326598  PCI: 00:1e.3
  851 15:40:52.328497  PCI: 00:1f.1
  852 15:40:52.329496  PCI: 00:1f.2
  853 15:40:52.332439  PCI: Check your devicetree.cb.
  854 15:40:52.334664  PCI: 00:14.0 scanning...
  855 15:40:52.338842  scan_usb_bus for PCI: 00:14.0
  856 15:40:52.340470  USB0 port 0 enabled
  857 15:40:52.342845  USB0 port 0 scanning...
  858 15:40:52.345705  scan_usb_bus for USB0 port 0
  859 15:40:52.347877  USB2 port 0 enabled
  860 15:40:52.350491  USB2 port 1 enabled
  861 15:40:52.352354  USB2 port 2 enabled
  862 15:40:52.354345  USB2 port 4 enabled
  863 15:40:52.356073  USB2 port 5 enabled
  864 15:40:52.358753  USB2 port 6 enabled
  865 15:40:52.360072  USB2 port 7 enabled
  866 15:40:52.362180  USB2 port 8 enabled
  867 15:40:52.364884  USB2 port 9 enabled
  868 15:40:52.366595  USB3 port 0 enabled
  869 15:40:52.368757  USB3 port 1 enabled
  870 15:40:52.370498  USB3 port 2 enabled
  871 15:40:52.372572  USB3 port 3 enabled
  872 15:40:52.374887  USB3 port 4 enabled
  873 15:40:52.377027  USB2 port 0 scanning...
  874 15:40:52.379924  scan_usb_bus for USB2 port 0
  875 15:40:52.383446  scan_usb_bus for USB2 port 0 done
  876 15:40:52.388825  scan_bus: scanning of bus USB2 port 0 took 9057 usecs
  877 15:40:52.391694  USB2 port 1 scanning...
  878 15:40:52.395090  scan_usb_bus for USB2 port 1
  879 15:40:52.398274  scan_usb_bus for USB2 port 1 done
  880 15:40:52.403068  scan_bus: scanning of bus USB2 port 1 took 9064 usecs
  881 15:40:52.406423  USB2 port 2 scanning...
  882 15:40:52.409164  scan_usb_bus for USB2 port 2
  883 15:40:52.412219  scan_usb_bus for USB2 port 2 done
  884 15:40:52.417650  scan_bus: scanning of bus USB2 port 2 took 9064 usecs
  885 15:40:52.420558  USB2 port 4 scanning...
  886 15:40:52.423785  scan_usb_bus for USB2 port 4
  887 15:40:52.426993  scan_usb_bus for USB2 port 4 done
  888 15:40:52.432152  scan_bus: scanning of bus USB2 port 4 took 9063 usecs
  889 15:40:52.434782  USB2 port 5 scanning...
  890 15:40:52.437674  scan_usb_bus for USB2 port 5
  891 15:40:52.440858  scan_usb_bus for USB2 port 5 done
  892 15:40:52.446684  scan_bus: scanning of bus USB2 port 5 took 9064 usecs
  893 15:40:52.448823  USB2 port 6 scanning...
  894 15:40:52.452427  scan_usb_bus for USB2 port 6
  895 15:40:52.455472  scan_usb_bus for USB2 port 6 done
  896 15:40:52.461373  scan_bus: scanning of bus USB2 port 6 took 9064 usecs
  897 15:40:52.463469  USB2 port 7 scanning...
  898 15:40:52.466489  scan_usb_bus for USB2 port 7
  899 15:40:52.470170  scan_usb_bus for USB2 port 7 done
  900 15:40:52.475316  scan_bus: scanning of bus USB2 port 7 took 9066 usecs
  901 15:40:52.477847  USB2 port 8 scanning...
  902 15:40:52.480913  scan_usb_bus for USB2 port 8
  903 15:40:52.484940  scan_usb_bus for USB2 port 8 done
  904 15:40:52.490374  scan_bus: scanning of bus USB2 port 8 took 9064 usecs
  905 15:40:52.492346  USB2 port 9 scanning...
  906 15:40:52.495475  scan_usb_bus for USB2 port 9
  907 15:40:52.498790  scan_usb_bus for USB2 port 9 done
  908 15:40:52.504544  scan_bus: scanning of bus USB2 port 9 took 9063 usecs
  909 15:40:52.506726  USB3 port 0 scanning...
  910 15:40:52.509656  scan_usb_bus for USB3 port 0
  911 15:40:52.513093  scan_usb_bus for USB3 port 0 done
  912 15:40:52.518654  scan_bus: scanning of bus USB3 port 0 took 9064 usecs
  913 15:40:52.521476  USB3 port 1 scanning...
  914 15:40:52.524047  scan_usb_bus for USB3 port 1
  915 15:40:52.528270  scan_usb_bus for USB3 port 1 done
  916 15:40:52.532879  scan_bus: scanning of bus USB3 port 1 took 9061 usecs
  917 15:40:52.535766  USB3 port 2 scanning...
  918 15:40:52.539120  scan_usb_bus for USB3 port 2
  919 15:40:52.542015  scan_usb_bus for USB3 port 2 done
  920 15:40:52.547526  scan_bus: scanning of bus USB3 port 2 took 9063 usecs
  921 15:40:52.549728  USB3 port 3 scanning...
  922 15:40:52.552863  scan_usb_bus for USB3 port 3
  923 15:40:52.556747  scan_usb_bus for USB3 port 3 done
  924 15:40:52.561743  scan_bus: scanning of bus USB3 port 3 took 9064 usecs
  925 15:40:52.564828  USB3 port 4 scanning...
  926 15:40:52.567667  scan_usb_bus for USB3 port 4
  927 15:40:52.570965  scan_usb_bus for USB3 port 4 done
  928 15:40:52.576135  scan_bus: scanning of bus USB3 port 4 took 9058 usecs
  929 15:40:52.579899  scan_usb_bus for USB0 port 0 done
  930 15:40:52.585163  scan_bus: scanning of bus USB0 port 0 took 239370 usecs
  931 15:40:52.588448  scan_usb_bus for PCI: 00:14.0 done
  932 15:40:52.594826  scan_bus: scanning of bus PCI: 00:14.0 took 256308 usecs
  933 15:40:52.596793  PCI: 00:15.0 scanning...
  934 15:40:52.600966  scan_generic_bus for PCI: 00:15.0
  935 15:40:52.604678  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
  936 15:40:52.609240  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
  937 15:40:52.613010  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
  938 15:40:52.617447  scan_generic_bus for PCI: 00:15.0 done
  939 15:40:52.622542  scan_bus: scanning of bus PCI: 00:15.0 took 22389 usecs
  940 15:40:52.624828  PCI: 00:15.1 scanning...
  941 15:40:52.628262  scan_generic_bus for PCI: 00:15.1
  942 15:40:52.632798  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
  943 15:40:52.636624  scan_generic_bus for PCI: 00:15.1 done
  944 15:40:52.642479  scan_bus: scanning of bus PCI: 00:15.1 took 14218 usecs
  945 15:40:52.644552  PCI: 00:19.0 scanning...
  946 15:40:52.648412  scan_generic_bus for PCI: 00:19.0
  947 15:40:52.652400  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
  948 15:40:52.656079  scan_generic_bus for PCI: 00:19.0 done
  949 15:40:52.661868  scan_bus: scanning of bus PCI: 00:19.0 took 14219 usecs
  950 15:40:52.664576  PCI: 00:1c.0 scanning...
  951 15:40:52.668042  do_pci_scan_bridge for PCI: 00:1c.0
  952 15:40:52.671317  PCI: pci_scan_bus for bus 01
  953 15:40:52.674721  PCI: 01:00.0 [10ec/525a] enabled
  954 15:40:52.677957  Capability: type 0x01 @ 0x80
  955 15:40:52.680490  Capability: type 0x05 @ 0x90
  956 15:40:52.684027  Capability: type 0x10 @ 0xb0
  957 15:40:52.686718  Capability: type 0x10 @ 0x40
  958 15:40:52.690161  Enabling Common Clock Configuration
  959 15:40:52.694106  L1 Sub-State supported from root port 28
  960 15:40:52.696885  L1 Sub-State Support = 0xf
  961 15:40:52.700020  CommonModeRestoreTime = 0x3c
  962 15:40:52.704623  Power On Value = 0x6, Power On Scale = 0x1
  963 15:40:52.706489  ASPM: Enabled L0s and L1
  964 15:40:52.709892  Capability: type 0x01 @ 0x80
  965 15:40:52.712592  Capability: type 0x05 @ 0x90
  966 15:40:52.715794  Capability: type 0x10 @ 0xb0
  967 15:40:52.720896  scan_bus: scanning of bus PCI: 00:1c.0 took 53686 usecs
  968 15:40:52.723591  PCI: 00:1d.0 scanning...
  969 15:40:52.727574  do_pci_scan_bridge for PCI: 00:1d.0
  970 15:40:52.730328  PCI: pci_scan_bus for bus 02
  971 15:40:52.733645  PCI: 02:00.0 [1217/8620] enabled
  972 15:40:52.737032  Capability: type 0x01 @ 0x6c
  973 15:40:52.739888  Capability: type 0x05 @ 0x48
  974 15:40:52.743117  Capability: type 0x10 @ 0x80
  975 15:40:52.746165  Capability: type 0x10 @ 0x40
  976 15:40:52.750297  L1 Sub-State supported from root port 29
  977 15:40:52.752748  L1 Sub-State Support = 0xf
  978 15:40:52.755923  CommonModeRestoreTime = 0x78
  979 15:40:52.759968  Power On Value = 0x16, Power On Scale = 0x0
  980 15:40:52.761291  ASPM: Enabled L1
  981 15:40:52.766257  Capability: type 0x01 @ 0x6c
  982 15:40:52.770626  Capability: type 0x05 @ 0x48
  983 15:40:52.775756  Capability: type 0x10 @ 0x80
  984 15:40:52.783313  scan_bus: scanning of bus PCI: 00:1d.0 took 56035 usecs
  985 15:40:52.785276  PCI: 00:1f.0 scanning...
  986 15:40:52.788286  scan_lpc_bus for PCI: 00:1f.0
  987 15:40:52.790409  PNP: 0c09.0 enabled
  988 15:40:52.794223  scan_lpc_bus for PCI: 00:1f.0 done
  989 15:40:52.799754  scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs
  990 15:40:52.802249  PCI: 00:1f.3 scanning...
  991 15:40:52.807632  scan_bus: scanning of bus PCI: 00:1f.3 took 2834 usecs
  992 15:40:52.810801  PCI: 00:1f.4 scanning...
  993 15:40:52.814095  scan_generic_bus for PCI: 00:1f.4
  994 15:40:52.818085  scan_generic_bus for PCI: 00:1f.4 done
  995 15:40:52.823446  scan_bus: scanning of bus PCI: 00:1f.4 took 10129 usecs
  996 15:40:52.825982  PCI: 00:1f.5 scanning...
  997 15:40:52.829799  scan_generic_bus for PCI: 00:1f.5
  998 15:40:52.834042  scan_generic_bus for PCI: 00:1f.5 done
  999 15:40:52.839324  scan_bus: scanning of bus PCI: 00:1f.5 took 10130 usecs
 1000 15:40:52.845242  scan_bus: scanning of bus DOMAIN: 0000 took 707728 usecs
 1001 15:40:52.848748  root_dev_scan_bus for Root Device done
 1002 15:40:52.854917  scan_bus: scanning of bus Root Device took 727865 usecs
 1003 15:40:52.855462  done
 1004 15:40:52.861058  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
 1005 15:40:52.867094  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1006 15:40:52.875250  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
 1007 15:40:52.881517  MRC: cache data 'RECOVERY_MRC_CACHE' needs update.
 1008 15:40:52.897910  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
 1009 15:40:52.902045  ELOG: NV offset 0x1bf0000 size 0x4000
 1010 15:40:52.909326  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1011 15:40:52.915911  ELOG: Event(17) added with size 13 at 2022-09-30 15:39:39 UTC
 1012 15:40:52.921240  POST: Unexpected post code in previous boot: 0x92
 1013 15:40:52.927097  ELOG: Event(A3) added with size 11 at 2022-09-30 15:39:39 UTC
 1014 15:40:52.933805  ELOG: Event(AA) added with size 11 at 2022-09-30 15:39:39 UTC
 1015 15:40:52.939894  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
 1016 15:40:52.942966  SPI flash protection: WPSW=0 SRP0=0
 1017 15:40:52.948082  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1018 15:40:52.954276  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149666 exit 86795
 1019 15:40:52.957495  found VGA at PCI: 00:02.0
 1020 15:40:52.960755  Setting up VGA for PCI: 00:02.0
 1021 15:40:52.964868  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1022 15:40:52.970309  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1023 15:40:52.972951  Allocating resources...
 1024 15:40:52.974457  Reading resources...
 1025 15:40:52.978977  Root Device read_resources bus 0 link: 0
 1026 15:40:52.983600  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1027 15:40:52.988841  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1028 15:40:52.993241  DOMAIN: 0000 read_resources bus 0 link: 0
 1029 15:40:52.999705  PCI: 00:14.0 read_resources bus 0 link: 0
 1030 15:40:53.003442  USB0 port 0 read_resources bus 0 link: 0
 1031 15:40:53.013035  USB0 port 0 read_resources bus 0 link: 0 done
 1032 15:40:53.017940  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1033 15:40:53.023399  PCI: 00:15.0 read_resources bus 1 link: 0
 1034 15:40:53.028977  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1035 15:40:53.033693  PCI: 00:15.1 read_resources bus 2 link: 0
 1036 15:40:53.039474  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1037 15:40:53.044649  PCI: 00:19.0 read_resources bus 3 link: 0
 1038 15:40:53.049469  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1039 15:40:53.053812  PCI: 00:1c.0 read_resources bus 1 link: 0
 1040 15:40:53.059370  PCI: 00:1c.0 read_resources bus 1 link: 0 done
 1041 15:40:53.064393  PCI: 00:1d.0 read_resources bus 2 link: 0
 1042 15:40:53.071488  PCI: 00:1d.0 read_resources bus 2 link: 0 done
 1043 15:40:53.075337  PCI: 00:1f.0 read_resources bus 0 link: 0
 1044 15:40:53.080520  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1045 15:40:53.087153  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1046 15:40:53.092550  Root Device read_resources bus 0 link: 0 done
 1047 15:40:53.094666  Done reading resources.
 1048 15:40:53.100544  Show resources in subtree (Root Device)...After reading.
 1049 15:40:53.104471   Root Device child on link 0 CPU_CLUSTER: 0
 1050 15:40:53.108923    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1051 15:40:53.110070     APIC: 00
 1052 15:40:53.111114     APIC: 04
 1053 15:40:53.112494     APIC: 07
 1054 15:40:53.114173     APIC: 01
 1055 15:40:53.115353     APIC: 05
 1056 15:40:53.116957     APIC: 06
 1057 15:40:53.117766     APIC: 02
 1058 15:40:53.118772     APIC: 03
 1059 15:40:53.123362    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1060 15:40:53.132477    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1061 15:40:53.141937    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1062 15:40:53.143941     PCI: 00:00.0
 1063 15:40:53.153494     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1064 15:40:53.163004     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1065 15:40:53.172056     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1066 15:40:53.181391     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1067 15:40:53.190942     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1068 15:40:53.200391     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1069 15:40:53.209353     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1070 15:40:53.218947     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1071 15:40:53.228019     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1072 15:40:53.237074     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1073 15:40:53.246992     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1074 15:40:53.256595     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1075 15:40:53.265936     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1076 15:40:53.275002     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1077 15:40:53.276945     PCI: 00:02.0
 1078 15:40:53.287391     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1079 15:40:53.297094     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1080 15:40:53.305673     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1081 15:40:53.307425     PCI: 00:04.0
 1082 15:40:53.317797     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
 1083 15:40:53.319376     PCI: 00:08.0
 1084 15:40:53.328774     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1085 15:40:53.330888     PCI: 00:12.0
 1086 15:40:53.340950     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1087 15:40:53.344465     PCI: 00:14.0 child on link 0 USB0 port 0
 1088 15:40:53.355131     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1089 15:40:53.359225      USB0 port 0 child on link 0 USB2 port 0
 1090 15:40:53.361253       USB2 port 0
 1091 15:40:53.363134       USB2 port 1
 1092 15:40:53.364527       USB2 port 2
 1093 15:40:53.366165       USB2 port 4
 1094 15:40:53.367900       USB2 port 5
 1095 15:40:53.369804       USB2 port 6
 1096 15:40:53.371155       USB2 port 7
 1097 15:40:53.373019       USB2 port 8
 1098 15:40:53.374792       USB2 port 9
 1099 15:40:53.376980       USB3 port 0
 1100 15:40:53.378239       USB3 port 1
 1101 15:40:53.380218       USB3 port 2
 1102 15:40:53.381543       USB3 port 3
 1103 15:40:53.383364       USB3 port 4
 1104 15:40:53.385161     PCI: 00:14.2
 1105 15:40:53.395053     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1106 15:40:53.404911     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1107 15:40:53.407023     PCI: 00:14.3
 1108 15:40:53.417321     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1109 15:40:53.421089     PCI: 00:15.0 child on link 0 I2C: 01:10
 1110 15:40:53.430654     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1111 15:40:53.432232      I2C: 01:10
 1112 15:40:53.434377      I2C: 01:10
 1113 15:40:53.435556      I2C: 01:34
 1114 15:40:53.439567     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1115 15:40:53.449999     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1116 15:40:53.451511      I2C: 02:2c
 1117 15:40:53.452780     PCI: 00:17.0
 1118 15:40:53.462191     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1119 15:40:53.471062     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1120 15:40:53.478965     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1121 15:40:53.487600     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1122 15:40:53.496269     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1123 15:40:53.504664     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1124 15:40:53.509423     PCI: 00:19.0 child on link 0 I2C: 03:50
 1125 15:40:53.518956     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1126 15:40:53.529474     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1127 15:40:53.530722      I2C: 03:50
 1128 15:40:53.532404     PCI: 00:19.2
 1129 15:40:53.543551     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1130 15:40:53.553850     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1131 15:40:53.558208     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1132 15:40:53.566604     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1133 15:40:53.576131     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1134 15:40:53.585330     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1135 15:40:53.586795      PCI: 01:00.0
 1136 15:40:53.596248      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
 1137 15:40:53.600915     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1138 15:40:53.609118     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1139 15:40:53.618966     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1140 15:40:53.628074     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1141 15:40:53.630278      PCI: 02:00.0
 1142 15:40:53.639559      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1143 15:40:53.648072      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
 1144 15:40:53.652950     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1145 15:40:53.661423     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1146 15:40:53.670356     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1147 15:40:53.672408      PNP: 0c09.0
 1148 15:40:53.680469      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1149 15:40:53.689201      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1150 15:40:53.697342      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1151 15:40:53.699103     PCI: 00:1f.3
 1152 15:40:53.709046     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1153 15:40:53.719324     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1154 15:40:53.721358     PCI: 00:1f.4
 1155 15:40:53.730222     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1156 15:40:53.740224     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1157 15:40:53.741865     PCI: 00:1f.5
 1158 15:40:53.750535     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1159 15:40:53.752462     PCI: 00:1f.6
 1160 15:40:53.761733     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
 1161 15:40:53.767765  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1162 15:40:53.774867  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1163 15:40:53.781676  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1164 15:40:53.787731  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1165 15:40:53.794630  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1166 15:40:53.797469  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1167 15:40:53.801876  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1168 15:40:53.805079  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1169 15:40:53.808633  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1170 15:40:53.814926  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1171 15:40:53.822122  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1172 15:40:53.829875  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1173 15:40:53.838064  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1174 15:40:53.844970  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1175 15:40:53.848630  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem
 1176 15:40:53.856929  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1177 15:40:53.864685  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1178 15:40:53.873295  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1179 15:40:53.880095  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1180 15:40:53.883861  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem
 1181 15:40:53.888249  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem
 1182 15:40:53.896675  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1183 15:40:53.900267  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1184 15:40:53.905366  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1185 15:40:53.910202  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem
 1186 15:40:53.915067  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem
 1187 15:40:53.920033  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem
 1188 15:40:53.924984  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem
 1189 15:40:53.929842  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem
 1190 15:40:53.934923  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem
 1191 15:40:53.939001  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem
 1192 15:40:53.944425  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem
 1193 15:40:53.948871  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem
 1194 15:40:53.953691  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem
 1195 15:40:53.958432  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem
 1196 15:40:53.964085  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem
 1197 15:40:53.968659  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem
 1198 15:40:53.973597  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem
 1199 15:40:53.978229  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem
 1200 15:40:53.983148  PCI: 00:19.0 10 *  [0x11349000 - 0x11349fff] mem
 1201 15:40:53.987941  PCI: 00:19.0 18 *  [0x1134a000 - 0x1134afff] mem
 1202 15:40:53.992519  PCI: 00:19.2 18 *  [0x1134b000 - 0x1134bfff] mem
 1203 15:40:53.998170  PCI: 00:1f.5 10 *  [0x1134c000 - 0x1134cfff] mem
 1204 15:40:54.002464  PCI: 00:17.0 24 *  [0x1134d000 - 0x1134d7ff] mem
 1205 15:40:54.007026  PCI: 00:17.0 14 *  [0x1134e000 - 0x1134e0ff] mem
 1206 15:40:54.012207  PCI: 00:1f.4 10 *  [0x1134f000 - 0x1134f0ff] mem
 1207 15:40:54.020867  DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done
 1208 15:40:54.024919  avoid_fixed_resources: DOMAIN: 0000
 1209 15:40:54.030138  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1210 15:40:54.036449  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1211 15:40:54.043624  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1212 15:40:54.051277  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
 1213 15:40:54.059502  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
 1214 15:40:54.067087  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
 1215 15:40:54.074648  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
 1216 15:40:54.082389  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1217 15:40:54.089616  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1218 15:40:54.097650  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1219 15:40:54.104864  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1220 15:40:54.112390  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1221 15:40:54.114022  Setting resources...
 1222 15:40:54.120153  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1223 15:40:54.124405  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1224 15:40:54.128157  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1225 15:40:54.132274  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1226 15:40:54.136234  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1227 15:40:54.142439  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1228 15:40:54.148487  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1229 15:40:54.155090  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1230 15:40:54.161376  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1231 15:40:54.167420  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1232 15:40:54.175220  DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff
 1233 15:40:54.180736  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1234 15:40:54.185404  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1235 15:40:54.189978  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1236 15:40:54.195719  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem
 1237 15:40:54.200571  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem
 1238 15:40:54.204874  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem
 1239 15:40:54.209812  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem
 1240 15:40:54.214292  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem
 1241 15:40:54.219010  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem
 1242 15:40:54.223852  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem
 1243 15:40:54.229097  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem
 1244 15:40:54.234494  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem
 1245 15:40:54.238581  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem
 1246 15:40:54.243463  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem
 1247 15:40:54.248469  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem
 1248 15:40:54.253109  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem
 1249 15:40:54.258467  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem
 1250 15:40:54.262758  PCI: 00:19.0 10 *  [0xd1349000 - 0xd1349fff] mem
 1251 15:40:54.268012  PCI: 00:19.0 18 *  [0xd134a000 - 0xd134afff] mem
 1252 15:40:54.272956  PCI: 00:19.2 18 *  [0xd134b000 - 0xd134bfff] mem
 1253 15:40:54.277595  PCI: 00:1f.5 10 *  [0xd134c000 - 0xd134cfff] mem
 1254 15:40:54.282329  PCI: 00:17.0 24 *  [0xd134d000 - 0xd134d7ff] mem
 1255 15:40:54.287754  PCI: 00:17.0 14 *  [0xd134e000 - 0xd134e0ff] mem
 1256 15:40:54.292457  PCI: 00:1f.4 10 *  [0xd134f000 - 0xd134f0ff] mem
 1257 15:40:54.299927  DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done
 1258 15:40:54.306870  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1259 15:40:54.314625  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1260 15:40:54.321560  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1261 15:40:54.327019  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem
 1262 15:40:54.334586  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
 1263 15:40:54.341177  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1264 15:40:54.348932  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1265 15:40:54.355904  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
 1266 15:40:54.360880  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem
 1267 15:40:54.366139  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem
 1268 15:40:54.373716  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
 1269 15:40:54.377472  Root Device assign_resources, bus 0 link: 0
 1270 15:40:54.382409  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1271 15:40:54.391854  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1272 15:40:54.399747  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1273 15:40:54.407729  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1274 15:40:54.415896  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
 1275 15:40:54.423815  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
 1276 15:40:54.432476  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
 1277 15:40:54.440604  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
 1278 15:40:54.444511  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1279 15:40:54.449405  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1280 15:40:54.458262  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
 1281 15:40:54.465920  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
 1282 15:40:54.474043  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
 1283 15:40:54.482520  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
 1284 15:40:54.486929  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1285 15:40:54.491433  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1286 15:40:54.499701  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
 1287 15:40:54.504840  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1288 15:40:54.509040  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1289 15:40:54.516954  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
 1290 15:40:54.524840  PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem
 1291 15:40:54.532439  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1292 15:40:54.540096  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1293 15:40:54.547861  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1294 15:40:54.556277  PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem
 1295 15:40:54.563868  PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
 1296 15:40:54.571653  PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
 1297 15:40:54.576967  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1298 15:40:54.580954  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1299 15:40:54.589768  PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
 1300 15:40:54.598385  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1301 15:40:54.607537  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1302 15:40:54.615533  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1303 15:40:54.620497  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1304 15:40:54.628200  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
 1305 15:40:54.632665  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1306 15:40:54.641358  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
 1307 15:40:54.650232  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
 1308 15:40:54.658450  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
 1309 15:40:54.663301  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1310 15:40:54.673101  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
 1311 15:40:54.682391  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
 1312 15:40:54.688897  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1313 15:40:54.693932  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1314 15:40:54.698986  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1315 15:40:54.703527  LPC: Trying to open IO window from 930 size 8
 1316 15:40:54.708342  LPC: Trying to open IO window from 940 size 8
 1317 15:40:54.712927  LPC: Trying to open IO window from 950 size 10
 1318 15:40:54.721413  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
 1319 15:40:54.728689  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
 1320 15:40:54.737247  PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64
 1321 15:40:54.745709  PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem
 1322 15:40:54.753783  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
 1323 15:40:54.758018  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1324 15:40:54.762957  Root Device assign_resources, bus 0 link: 0
 1325 15:40:54.765285  Done setting resources.
 1326 15:40:54.771616  Show resources in subtree (Root Device)...After assigning values.
 1327 15:40:54.776467   Root Device child on link 0 CPU_CLUSTER: 0
 1328 15:40:54.780698    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1329 15:40:54.782033     APIC: 00
 1330 15:40:54.783288     APIC: 04
 1331 15:40:54.784080     APIC: 07
 1332 15:40:54.785088     APIC: 01
 1333 15:40:54.786893     APIC: 05
 1334 15:40:54.788164     APIC: 06
 1335 15:40:54.789673     APIC: 02
 1336 15:40:54.790813     APIC: 03
 1337 15:40:54.795132    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1338 15:40:54.804196    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1339 15:40:54.815526    DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1340 15:40:54.817976     PCI: 00:00.0
 1341 15:40:54.827206     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1342 15:40:54.836482     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1343 15:40:54.845555     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1344 15:40:54.854942     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1345 15:40:54.864520     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1346 15:40:54.873845     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1347 15:40:54.882909     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1348 15:40:54.892082     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1349 15:40:54.901571     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1350 15:40:54.910521     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1351 15:40:54.920530     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1352 15:40:54.930411     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1353 15:40:54.939273     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1354 15:40:54.949153     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1355 15:40:54.950415     PCI: 00:02.0
 1356 15:40:54.960667     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1357 15:40:54.971712     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1358 15:40:54.980439     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1359 15:40:54.982119     PCI: 00:04.0
 1360 15:40:54.992647     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
 1361 15:40:54.993995     PCI: 00:08.0
 1362 15:40:55.004374     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
 1363 15:40:55.006154     PCI: 00:12.0
 1364 15:40:55.016991     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
 1365 15:40:55.020577     PCI: 00:14.0 child on link 0 USB0 port 0
 1366 15:40:55.031692     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
 1367 15:40:55.035652      USB0 port 0 child on link 0 USB2 port 0
 1368 15:40:55.037418       USB2 port 0
 1369 15:40:55.039600       USB2 port 1
 1370 15:40:55.041116       USB2 port 2
 1371 15:40:55.042877       USB2 port 4
 1372 15:40:55.044508       USB2 port 5
 1373 15:40:55.046548       USB2 port 6
 1374 15:40:55.047912       USB2 port 7
 1375 15:40:55.050443       USB2 port 8
 1376 15:40:55.051542       USB2 port 9
 1377 15:40:55.053554       USB3 port 0
 1378 15:40:55.055167       USB3 port 1
 1379 15:40:55.056716       USB3 port 2
 1380 15:40:55.058484       USB3 port 3
 1381 15:40:55.060790       USB3 port 4
 1382 15:40:55.062317     PCI: 00:14.2
 1383 15:40:55.072074     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
 1384 15:40:55.082470     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
 1385 15:40:55.084249     PCI: 00:14.3
 1386 15:40:55.094238     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
 1387 15:40:55.098732     PCI: 00:15.0 child on link 0 I2C: 01:10
 1388 15:40:55.108832     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
 1389 15:40:55.110418      I2C: 01:10
 1390 15:40:55.111850      I2C: 01:10
 1391 15:40:55.113909      I2C: 01:34
 1392 15:40:55.118585     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1393 15:40:55.128414     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
 1394 15:40:55.129550      I2C: 02:2c
 1395 15:40:55.132056     PCI: 00:17.0
 1396 15:40:55.141996     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
 1397 15:40:55.151908     PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14
 1398 15:40:55.160614     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1399 15:40:55.170075     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1400 15:40:55.178804     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1401 15:40:55.189105     PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24
 1402 15:40:55.193629     PCI: 00:19.0 child on link 0 I2C: 03:50
 1403 15:40:55.203640     PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
 1404 15:40:55.214330     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18
 1405 15:40:55.216038      I2C: 03:50
 1406 15:40:55.217585     PCI: 00:19.2
 1407 15:40:55.228730     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1408 15:40:55.238789     PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
 1409 15:40:55.243109     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1410 15:40:55.252922     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1411 15:40:55.262122     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1412 15:40:55.273468     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1413 15:40:55.275109      PCI: 01:00.0
 1414 15:40:55.285177      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
 1415 15:40:55.289729     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1416 15:40:55.298595     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1417 15:40:55.308549     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1418 15:40:55.319411     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
 1419 15:40:55.321577      PCI: 02:00.0
 1420 15:40:55.331398      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
 1421 15:40:55.342050      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
 1422 15:40:55.345902     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1423 15:40:55.354449     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1424 15:40:55.363444     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1425 15:40:55.365597      PNP: 0c09.0
 1426 15:40:55.373802      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1427 15:40:55.382960      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1428 15:40:55.390806      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1429 15:40:55.392467     PCI: 00:1f.3
 1430 15:40:55.403162     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
 1431 15:40:55.413456     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
 1432 15:40:55.415464     PCI: 00:1f.4
 1433 15:40:55.424335     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1434 15:40:55.434054     PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10
 1435 15:40:55.436545     PCI: 00:1f.5
 1436 15:40:55.446763     PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10
 1437 15:40:55.448263     PCI: 00:1f.6
 1438 15:40:55.458617     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
 1439 15:40:55.461270  Done allocating resources.
 1440 15:40:55.467237  BS: BS_DEV_RESOURCES times (us): entry 0 run 2506988 exit 15
 1441 15:40:55.470175  Enabling resources...
 1442 15:40:55.474482  PCI: 00:00.0 subsystem <- 1028/3e34
 1443 15:40:55.476648  PCI: 00:00.0 cmd <- 06
 1444 15:40:55.480562  PCI: 00:02.0 subsystem <- 1028/3ea0
 1445 15:40:55.483348  PCI: 00:02.0 cmd <- 03
 1446 15:40:55.487194  PCI: 00:04.0 subsystem <- 1028/1903
 1447 15:40:55.489500  PCI: 00:04.0 cmd <- 02
 1448 15:40:55.492008  PCI: 00:08.0 cmd <- 06
 1449 15:40:55.495493  PCI: 00:12.0 subsystem <- 1028/9df9
 1450 15:40:55.497992  PCI: 00:12.0 cmd <- 02
 1451 15:40:55.501921  PCI: 00:14.0 subsystem <- 1028/9ded
 1452 15:40:55.504031  PCI: 00:14.0 cmd <- 02
 1453 15:40:55.507377  PCI: 00:14.2 cmd <- 02
 1454 15:40:55.510789  PCI: 00:14.3 subsystem <- 1028/9df0
 1455 15:40:55.513427  PCI: 00:14.3 cmd <- 02
 1456 15:40:55.516928  PCI: 00:15.0 subsystem <- 1028/9de8
 1457 15:40:55.520081  PCI: 00:15.0 cmd <- 02
 1458 15:40:55.523183  PCI: 00:15.1 subsystem <- 1028/9de9
 1459 15:40:55.525473  PCI: 00:15.1 cmd <- 02
 1460 15:40:55.529821  PCI: 00:17.0 subsystem <- 1028/9dd3
 1461 15:40:55.532064  PCI: 00:17.0 cmd <- 03
 1462 15:40:55.535629  PCI: 00:19.0 subsystem <- 1028/9dc5
 1463 15:40:55.538411  PCI: 00:19.0 cmd <- 06
 1464 15:40:55.542100  PCI: 00:19.2 subsystem <- 1028/9dc7
 1465 15:40:55.544976  PCI: 00:19.2 cmd <- 06
 1466 15:40:55.547918  PCI: 00:1c.0 bridge ctrl <- 0003
 1467 15:40:55.551912  PCI: 00:1c.0 subsystem <- 1028/9dbf
 1468 15:40:55.554823  Capability: type 0x10 @ 0x40
 1469 15:40:55.557527  Capability: type 0x05 @ 0x80
 1470 15:40:55.560346  Capability: type 0x0d @ 0x90
 1471 15:40:55.562982  PCI: 00:1c.0 cmd <- 06
 1472 15:40:55.566214  PCI: 00:1d.0 bridge ctrl <- 0003
 1473 15:40:55.570110  PCI: 00:1d.0 subsystem <- 1028/9db4
 1474 15:40:55.573319  Capability: type 0x10 @ 0x40
 1475 15:40:55.575588  Capability: type 0x05 @ 0x80
 1476 15:40:55.578736  Capability: type 0x0d @ 0x90
 1477 15:40:55.581238  PCI: 00:1d.0 cmd <- 06
 1478 15:40:55.584871  PCI: 00:1f.0 subsystem <- 1028/9d84
 1479 15:40:55.587440  PCI: 00:1f.0 cmd <- 407
 1480 15:40:55.591155  PCI: 00:1f.3 subsystem <- 1028/9dc8
 1481 15:40:55.593416  PCI: 00:1f.3 cmd <- 02
 1482 15:40:55.597258  PCI: 00:1f.4 subsystem <- 1028/9da3
 1483 15:40:55.599989  PCI: 00:1f.4 cmd <- 03
 1484 15:40:55.604351  PCI: 00:1f.5 subsystem <- 1028/9da4
 1485 15:40:55.606343  PCI: 00:1f.5 cmd <- 406
 1486 15:40:55.610233  PCI: 00:1f.6 subsystem <- 1028/15be
 1487 15:40:55.612788  PCI: 00:1f.6 cmd <- 02
 1488 15:40:55.623300  PCI: 01:00.0 cmd <- 02
 1489 15:40:55.627403  PCI: 02:00.0 cmd <- 06
 1490 15:40:55.631427  done.
 1491 15:40:55.637279  BS: BS_DEV_ENABLE times (us): entry 398 run 164111 exit 0
 1492 15:40:55.640195  Initializing devices...
 1493 15:40:55.642438  Root Device init ...
 1494 15:40:55.646139  Root Device init finished in 2137 usecs
 1495 15:40:55.648877  CPU_CLUSTER: 0 init ...
 1496 15:40:55.653344  CPU_CLUSTER: 0 init finished in 2429 usecs
 1497 15:40:55.659477  PCI: 00:00.0 init ...
 1498 15:40:55.662711  CPU TDP: 15 Watts
 1499 15:40:55.664027  CPU PL2 = 51 Watts
 1500 15:40:55.668533  PCI: 00:00.0 init finished in 7035 usecs
 1501 15:40:55.671619  PCI: 00:02.0 init ...
 1502 15:40:55.674995  PCI: 00:02.0 init finished in 2236 usecs
 1503 15:40:55.677714  PCI: 00:04.0 init ...
 1504 15:40:55.681683  PCI: 00:04.0 init finished in 2235 usecs
 1505 15:40:55.684104  PCI: 00:08.0 init ...
 1506 15:40:55.688219  PCI: 00:08.0 init finished in 2235 usecs
 1507 15:40:55.691497  PCI: 00:12.0 init ...
 1508 15:40:55.694847  PCI: 00:12.0 init finished in 2235 usecs
 1509 15:40:55.697649  PCI: 00:14.0 init ...
 1510 15:40:55.702375  PCI: 00:14.0 init finished in 2236 usecs
 1511 15:40:55.704586  PCI: 00:14.2 init ...
 1512 15:40:55.708732  PCI: 00:14.2 init finished in 2235 usecs
 1513 15:40:55.711033  PCI: 00:14.3 init ...
 1514 15:40:55.715680  PCI: 00:14.3 init finished in 2240 usecs
 1515 15:40:55.718315  PCI: 00:15.0 init ...
 1516 15:40:55.721908  DW I2C bus 0 at 0xd1347000 (400 KHz)
 1517 15:40:55.725855  PCI: 00:15.0 init finished in 5932 usecs
 1518 15:40:55.728285  PCI: 00:15.1 init ...
 1519 15:40:55.731849  DW I2C bus 1 at 0xd1348000 (400 KHz)
 1520 15:40:55.735890  PCI: 00:15.1 init finished in 5924 usecs
 1521 15:40:55.739045  PCI: 00:19.0 init ...
 1522 15:40:55.742714  DW I2C bus 4 at 0xd1349000 (400 KHz)
 1523 15:40:55.747423  PCI: 00:19.0 init finished in 5932 usecs
 1524 15:40:55.749913  PCI: 00:1c.0 init ...
 1525 15:40:55.752832  Initializing PCH PCIe bridge.
 1526 15:40:55.757363  PCI: 00:1c.0 init finished in 5247 usecs
 1527 15:40:55.760115  PCI: 00:1d.0 init ...
 1528 15:40:55.762944  Initializing PCH PCIe bridge.
 1529 15:40:55.767072  PCI: 00:1d.0 init finished in 5247 usecs
 1530 15:40:55.769566  PCI: 00:1f.0 init ...
 1531 15:40:55.773540  IOAPIC: Initializing IOAPIC at 0xfec00000
 1532 15:40:55.778499  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1533 15:40:55.779965  IOAPIC: ID = 0x02
 1534 15:40:55.782406  IOAPIC: Dumping registers
 1535 15:40:55.785441    reg 0x0000: 0x02000000
 1536 15:40:55.787861    reg 0x0001: 0x00770020
 1537 15:40:55.790453    reg 0x0002: 0x00000000
 1538 15:40:55.796545  PCI: 00:1f.0 init finished in 25018 usecs
 1539 15:40:55.799388  PCI: 00:1f.3 init ...
 1540 15:40:55.803940  HDA: codec_mask = 05
 1541 15:40:55.807126  HDA: Initializing codec #2
 1542 15:40:55.810328  HDA: codec viddid: 8086280b
 1543 15:40:55.812662  HDA: No verb table entry found
 1544 15:40:55.815529  HDA: Initializing codec #0
 1545 15:40:55.818389  HDA: codec viddid: 10ec0236
 1546 15:40:55.825403  HDA: verb loaded.
 1547 15:40:55.830264  PCI: 00:1f.3 init finished in 28831 usecs
 1548 15:40:55.832124  PCI: 00:1f.4 init ...
 1549 15:40:55.836556  PCI: 00:1f.4 init finished in 2245 usecs
 1550 15:40:55.840042  PCI: 00:1f.6 init ...
 1551 15:40:55.843846  PCI: 00:1f.6 init finished in 2235 usecs
 1552 15:40:55.854620  PCI: 01:00.0 init ...
 1553 15:40:55.858242  PCI: 01:00.0 init finished in 2234 usecs
 1554 15:40:55.860644  PCI: 02:00.0 init ...
 1555 15:40:55.865379  PCI: 02:00.0 init finished in 2235 usecs
 1556 15:40:55.867658  PNP: 0c09.0 init ...
 1557 15:40:55.872108  EC Label      : 00.00.20
 1558 15:40:55.875579  EC Revision   : 9ca674bba
 1559 15:40:55.879156  EC Model Num  : 08B9
 1560 15:40:55.882679  EC Build Date : 05/10/19
 1561 15:40:55.891553  PNP: 0c09.0 init finished in 21735 usecs
 1562 15:40:55.894286  Devices initialized
 1563 15:40:55.896601  Show all devs... After init.
 1564 15:40:55.899066  Root Device: enabled 1
 1565 15:40:55.902463  CPU_CLUSTER: 0: enabled 1
 1566 15:40:55.904505  DOMAIN: 0000: enabled 1
 1567 15:40:55.906223  APIC: 00: enabled 1
 1568 15:40:55.908228  PCI: 00:00.0: enabled 1
 1569 15:40:55.911083  PCI: 00:02.0: enabled 1
 1570 15:40:55.913886  PCI: 00:04.0: enabled 1
 1571 15:40:55.915743  PCI: 00:12.0: enabled 1
 1572 15:40:55.918037  PCI: 00:12.5: enabled 0
 1573 15:40:55.920689  PCI: 00:12.6: enabled 0
 1574 15:40:55.922779  PCI: 00:13.0: enabled 0
 1575 15:40:55.925586  PCI: 00:14.0: enabled 1
 1576 15:40:55.928389  PCI: 00:14.1: enabled 0
 1577 15:40:55.930123  PCI: 00:14.3: enabled 1
 1578 15:40:55.932872  PCI: 00:14.5: enabled 0
 1579 15:40:55.934833  PCI: 00:15.0: enabled 1
 1580 15:40:55.937848  PCI: 00:15.1: enabled 1
 1581 15:40:55.940071  PCI: 00:15.2: enabled 0
 1582 15:40:55.942842  PCI: 00:15.3: enabled 0
 1583 15:40:55.944959  PCI: 00:16.0: enabled 0
 1584 15:40:55.947487  PCI: 00:16.1: enabled 0
 1585 15:40:55.949573  PCI: 00:16.2: enabled 0
 1586 15:40:55.952410  PCI: 00:16.3: enabled 0
 1587 15:40:55.954479  PCI: 00:16.4: enabled 0
 1588 15:40:55.957033  PCI: 00:16.5: enabled 0
 1589 15:40:55.959839  PCI: 00:17.0: enabled 1
 1590 15:40:55.962221  PCI: 00:19.0: enabled 1
 1591 15:40:55.964815  PCI: 00:19.1: enabled 0
 1592 15:40:55.967052  PCI: 00:19.2: enabled 1
 1593 15:40:55.969373  PCI: 00:1a.0: enabled 0
 1594 15:40:55.972068  PCI: 00:1c.0: enabled 1
 1595 15:40:55.974251  PCI: 00:1c.1: enabled 0
 1596 15:40:55.976207  PCI: 00:1c.2: enabled 0
 1597 15:40:55.979073  PCI: 00:1c.3: enabled 0
 1598 15:40:55.981226  PCI: 00:1c.4: enabled 0
 1599 15:40:55.983798  PCI: 00:1c.5: enabled 0
 1600 15:40:55.986269  PCI: 00:1c.6: enabled 0
 1601 15:40:55.988489  PCI: 00:1c.7: enabled 0
 1602 15:40:55.990938  PCI: 00:1d.0: enabled 1
 1603 15:40:55.993689  PCI: 00:1d.1: enabled 0
 1604 15:40:55.995811  PCI: 00:1d.2: enabled 0
 1605 15:40:55.998973  PCI: 00:1d.3: enabled 0
 1606 15:40:56.000763  PCI: 00:1d.4: enabled 0
 1607 15:40:56.003047  PCI: 00:1e.0: enabled 0
 1608 15:40:56.006018  PCI: 00:1e.1: enabled 0
 1609 15:40:56.008325  PCI: 00:1e.2: enabled 0
 1610 15:40:56.010649  PCI: 00:1e.3: enabled 0
 1611 15:40:56.012795  PCI: 00:1f.0: enabled 1
 1612 15:40:56.015181  PCI: 00:1f.1: enabled 0
 1613 15:40:56.017712  PCI: 00:1f.2: enabled 0
 1614 15:40:56.020269  PCI: 00:1f.3: enabled 1
 1615 15:40:56.022709  PCI: 00:1f.4: enabled 1
 1616 15:40:56.025324  PCI: 00:1f.5: enabled 1
 1617 15:40:56.027728  PCI: 00:1f.6: enabled 1
 1618 15:40:56.030185  USB0 port 0: enabled 1
 1619 15:40:56.031675  I2C: 01:10: enabled 1
 1620 15:40:56.034455  I2C: 01:10: enabled 1
 1621 15:40:56.037046  I2C: 01:34: enabled 1
 1622 15:40:56.038827  I2C: 02:2c: enabled 1
 1623 15:40:56.041477  I2C: 03:50: enabled 1
 1624 15:40:56.043609  PNP: 0c09.0: enabled 1
 1625 15:40:56.045736  USB2 port 0: enabled 1
 1626 15:40:56.047799  USB2 port 1: enabled 1
 1627 15:40:56.050308  USB2 port 2: enabled 1
 1628 15:40:56.053404  USB2 port 4: enabled 1
 1629 15:40:56.055121  USB2 port 5: enabled 1
 1630 15:40:56.057162  USB2 port 6: enabled 1
 1631 15:40:56.059485  USB2 port 7: enabled 1
 1632 15:40:56.061762  USB2 port 8: enabled 1
 1633 15:40:56.064011  USB2 port 9: enabled 1
 1634 15:40:56.066504  USB3 port 0: enabled 1
 1635 15:40:56.069340  USB3 port 1: enabled 1
 1636 15:40:56.071461  USB3 port 2: enabled 1
 1637 15:40:56.073346  USB3 port 3: enabled 1
 1638 15:40:56.075799  USB3 port 4: enabled 1
 1639 15:40:56.077887  APIC: 04: enabled 1
 1640 15:40:56.079923  APIC: 07: enabled 1
 1641 15:40:56.082576  APIC: 01: enabled 1
 1642 15:40:56.084262  APIC: 05: enabled 1
 1643 15:40:56.086070  APIC: 06: enabled 1
 1644 15:40:56.088006  APIC: 02: enabled 1
 1645 15:40:56.090342  APIC: 03: enabled 1
 1646 15:40:56.092635  PCI: 00:08.0: enabled 1
 1647 15:40:56.094775  PCI: 00:14.2: enabled 1
 1648 15:40:56.097860  PCI: 01:00.0: enabled 1
 1649 15:40:56.099986  PCI: 02:00.0: enabled 1
 1650 15:40:56.105116  Disabling ACPI via APMC:
 1651 15:40:56.107623  done.
 1652 15:40:56.113165  ELOG: Event(92) added with size 9 at 2022-09-30 15:39:43 UTC
 1653 15:40:56.121349  ELOG: Event(93) added with size 9 at 2022-09-30 15:39:43 UTC
 1654 15:40:56.125664  ELOG: Event(9A) added with size 9 at 2022-09-30 15:39:43 UTC
 1655 15:40:56.132251  ELOG: Event(9E) added with size 10 at 2022-09-30 15:39:43 UTC
 1656 15:40:56.138613  ELOG: Event(9F) added with size 14 at 2022-09-30 15:39:43 UTC
 1657 15:40:56.144064  BS: BS_DEV_INIT times (us): entry 0 run 462597 exit 38290
 1658 15:40:56.150867  ELOG: Event(A1) added with size 10 at 2022-09-30 15:39:43 UTC
 1659 15:40:56.158241  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1660 15:40:56.165039  ELOG: Event(A0) added with size 9 at 2022-09-30 15:39:43 UTC
 1661 15:40:56.169086  elog_add_boot_reason: Logged dev mode boot
 1662 15:40:56.171554  Finalize devices...
 1663 15:40:56.173774  PCI: 00:17.0 final
 1664 15:40:56.174769  Devices finalized
 1665 15:40:56.179924  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
 1666 15:40:56.186005  BS: BS_POST_DEVICE times (us): entry 24742 run 5933 exit 5366
 1667 15:40:56.192315  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
 1668 15:40:56.200743  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
 1669 15:40:56.205176  disable_unused_touchscreen: Disable ACPI0C50
 1670 15:40:56.209167  disable_unused_touchscreen: Enable ELAN900C
 1671 15:40:56.212467  CBFS @ 1d00000 size 300000
 1672 15:40:56.219104  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1673 15:40:56.221802  CBFS: Locating 'fallback/dsdt.aml'
 1674 15:40:56.226601  CBFS: Found @ offset 10b200 size 4448
 1675 15:40:56.228648  CBFS @ 1d00000 size 300000
 1676 15:40:56.235409  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1677 15:40:56.238277  CBFS: Locating 'fallback/slic'
 1678 15:40:56.243683  CBFS: 'fallback/slic' not found.
 1679 15:40:56.247398  ACPI: Writing ACPI tables at 89c0f000.
 1680 15:40:56.249137  ACPI:    * FACS
 1681 15:40:56.250657  ACPI:    * DSDT
 1682 15:40:56.254558  Ramoops buffer: 0x100000@0x89b0e000.
 1683 15:40:56.258861  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
 1684 15:40:56.263746  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
 1685 15:40:56.267841  ACPI:    * FADT
 1686 15:40:56.268953  SCI is IRQ9
 1687 15:40:56.272569  ACPI: added table 1/32, length now 40
 1688 15:40:56.274196  ACPI:     * SSDT
 1689 15:40:56.278309  Found 1 CPU(s) with 8 core(s) each.
 1690 15:40:56.283085  Error: Could not locate 'wifi_sar' in VPD.
 1691 15:40:56.286176  Error: failed from getting SAR limits!
 1692 15:40:56.289831  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
 1693 15:40:56.293857  dw_i2c: bad counts. hcnt = -14 lcnt = 30
 1694 15:40:56.298624  dw_i2c: bad counts. hcnt = -20 lcnt = 40
 1695 15:40:56.302462  dw_i2c: bad counts. hcnt = -18 lcnt = 48
 1696 15:40:56.307256  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
 1697 15:40:56.312587  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
 1698 15:40:56.318148  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
 1699 15:40:56.322408  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
 1700 15:40:56.327928  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1701 15:40:56.334398  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
 1702 15:40:56.339528  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
 1703 15:40:56.345232  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
 1704 15:40:56.350639  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
 1705 15:40:56.355024  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
 1706 15:40:56.359583  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
 1707 15:40:56.364269  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
 1708 15:40:56.369752  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1709 15:40:56.375478  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1710 15:40:56.381182  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
 1711 15:40:56.386814  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1712 15:40:56.393170  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
 1713 15:40:56.397922  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
 1714 15:40:56.401562  ACPI: added table 2/32, length now 44
 1715 15:40:56.403545  ACPI:    * MCFG
 1716 15:40:56.406971  ACPI: added table 3/32, length now 48
 1717 15:40:56.408270  ACPI:    * TPM2
 1718 15:40:56.412093  TPM2 log created at 89afe000
 1719 15:40:56.415308  ACPI: added table 4/32, length now 52
 1720 15:40:56.417056  ACPI:    * MADT
 1721 15:40:56.417793  SCI is IRQ9
 1722 15:40:56.421779  ACPI: added table 5/32, length now 56
 1723 15:40:56.424024  current = 89c14bd0
 1724 15:40:56.426079  ACPI:    * IGD OpRegion
 1725 15:40:56.428867  GMA: Found VBT in CBFS
 1726 15:40:56.431618  GMA: Found valid VBT in CBFS
 1727 15:40:56.435296  ACPI: added table 6/32, length now 60
 1728 15:40:56.437273  ACPI:    * HPET
 1729 15:40:56.441046  ACPI: added table 7/32, length now 64
 1730 15:40:56.441951  ACPI: done.
 1731 15:40:56.444539  ACPI tables: 31872 bytes.
 1732 15:40:56.448233  smbios_write_tables: 89afd000
 1733 15:40:56.449891  recv_ec_data: 0x01
 1734 15:40:56.452595  Create SMBIOS type 17
 1735 15:40:56.454632  PCI: 00:14.3 (Intel WiFi)
 1736 15:40:56.457920  SMBIOS tables: 708 bytes.
 1737 15:40:56.462433  Writing table forward entry at 0x00000500
 1738 15:40:56.467882  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
 1739 15:40:56.471799  Writing coreboot table at 0x89c33000
 1740 15:40:56.477359   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1741 15:40:56.481567   1. 0000000000001000-000000000009ffff: RAM
 1742 15:40:56.486664   2. 00000000000a0000-00000000000fffff: RESERVED
 1743 15:40:56.491186   3. 0000000000100000-0000000089afcfff: RAM
 1744 15:40:56.496670   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
 1745 15:40:56.501669   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
 1746 15:40:56.507189   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
 1747 15:40:56.512117   7. 000000008a000000-000000008f7fffff: RESERVED
 1748 15:40:56.516395   8. 00000000e0000000-00000000efffffff: RESERVED
 1749 15:40:56.521729   9. 00000000fc000000-00000000fc000fff: RESERVED
 1750 15:40:56.525923  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1751 15:40:56.530686  11. 00000000fed10000-00000000fed17fff: RESERVED
 1752 15:40:56.536068  12. 00000000fed80000-00000000fed83fff: RESERVED
 1753 15:40:56.540698  13. 00000000feda0000-00000000feda1fff: RESERVED
 1754 15:40:56.545388  14. 0000000100000000-000000026e7fffff: RAM
 1755 15:40:56.549310  Graphics framebuffer located at 0xc0000000
 1756 15:40:56.551712  Passing 6 GPIOs to payload:
 1757 15:40:56.557259              NAME |       PORT | POLARITY |     VALUE
 1758 15:40:56.562782     write protect | 0x000000dc |     high |       low
 1759 15:40:56.568094          recovery | 0x000000d5 |      low |      high
 1760 15:40:56.572521               lid |  undefined |     high |      high
 1761 15:40:56.578595             power |  undefined |     high |       low
 1762 15:40:56.583769             oprom |  undefined |     high |       low
 1763 15:40:56.589052          EC in RW |  undefined |     high |       low
 1764 15:40:56.590824  recv_ec_data: 0x01
 1765 15:40:56.592012  SKU ID: 3
 1766 15:40:56.594763  CBFS @ 1d00000 size 300000
 1767 15:40:56.601224  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1768 15:40:56.607551  Wrote coreboot table at: 89c33000, 0x58c bytes, checksum a83b
 1769 15:40:56.609985  coreboot table: 1444 bytes.
 1770 15:40:56.613811  IMD ROOT    0. 89fff000 00001000
 1771 15:40:56.617128  IMD SMALL   1. 89ffe000 00001000
 1772 15:40:56.619791  FSP MEMORY  2. 89d0e000 002f0000
 1773 15:40:56.623593  CONSOLE     3. 89cee000 00020000
 1774 15:40:56.626533  TIME STAMP  4. 89ced000 00000910
 1775 15:40:56.630143  VBOOT WORK  5. 89cea000 00003000
 1776 15:40:56.633117  VBOOT       6. 89ce9000 00000c0c
 1777 15:40:56.636742  MRC DATA    7. 89ce7000 000018f0
 1778 15:40:56.639676  ROMSTG STCK 8. 89ce6000 00000400
 1779 15:40:56.643307  AFTER CAR   9. 89cdc000 0000a000
 1780 15:40:56.646184  RAMSTAGE   10. 89c80000 0005c000
 1781 15:40:56.649964  REFCODE    11. 89c4b000 00035000
 1782 15:40:56.653045  SMM BACKUP 12. 89c3b000 00010000
 1783 15:40:56.656395  COREBOOT   13. 89c33000 00008000
 1784 15:40:56.659460  ACPI       14. 89c0f000 00024000
 1785 15:40:56.662799  ACPI GNVS  15. 89c0e000 00001000
 1786 15:40:56.665992  RAMOOPS    16. 89b0e000 00100000
 1787 15:40:56.669593  TPM2 TCGLOG17. 89afe000 00010000
 1788 15:40:56.673242  SMBIOS     18. 89afd000 00000800
 1789 15:40:56.674452  IMD small region:
 1790 15:40:56.678048    IMD ROOT    0. 89ffec00 00000400
 1791 15:40:56.682080    FSP RUNTIME 1. 89ffebe0 00000004
 1792 15:40:56.685894    POWER STATE 2. 89ffeba0 00000040
 1793 15:40:56.688768    ROMSTAGE    3. 89ffeb80 00000004
 1794 15:40:56.692405    MEM INFO    4. 89ffe9c0 000001a9
 1795 15:40:56.696187    COREBOOTFWD 5. 89ffe980 00000028
 1796 15:40:56.698648  MTRR: Physical address space:
 1797 15:40:56.704911  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1798 15:40:56.711165  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1799 15:40:56.717160  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
 1800 15:40:56.723379  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
 1801 15:40:56.729834  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1802 15:40:56.736019  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1803 15:40:56.742600  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
 1804 15:40:56.746390  MTRR: Fixed MSR 0x250 0x0606060606060606
 1805 15:40:56.750688  MTRR: Fixed MSR 0x258 0x0606060606060606
 1806 15:40:56.754881  MTRR: Fixed MSR 0x259 0x0000000000000000
 1807 15:40:56.758680  MTRR: Fixed MSR 0x268 0x0606060606060606
 1808 15:40:56.763045  MTRR: Fixed MSR 0x269 0x0606060606060606
 1809 15:40:56.767310  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1810 15:40:56.770778  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1811 15:40:56.775007  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1812 15:40:56.779314  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1813 15:40:56.783192  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1814 15:40:56.787593  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1815 15:40:56.790428  call enable_fixed_mtrr()
 1816 15:40:56.794364  CPU physical address size: 39 bits
 1817 15:40:56.798387  MTRR: default type WB/UC MTRR counts: 7/7.
 1818 15:40:56.802125  MTRR: UC selected as default type.
 1819 15:40:56.808530  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 1820 15:40:56.814059  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
 1821 15:40:56.820874  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
 1822 15:40:56.826940  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
 1823 15:40:56.833363  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1824 15:40:56.839247  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 1825 15:40:56.845727  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
 1826 15:40:56.846645  
 1827 15:40:56.848097  MTRR check
 1828 15:40:56.850070  Fixed MTRRs   : Enabled
 1829 15:40:56.852539  Variable MTRRs: Enabled
 1830 15:40:56.852636  
 1831 15:40:56.857395  MTRR: Fixed MSR 0x250 0x0606060606060606
 1832 15:40:56.860848  MTRR: Fixed MSR 0x258 0x0606060606060606
 1833 15:40:56.865522  MTRR: Fixed MSR 0x259 0x0000000000000000
 1834 15:40:56.869174  MTRR: Fixed MSR 0x268 0x0606060606060606
 1835 15:40:56.873156  MTRR: Fixed MSR 0x269 0x0606060606060606
 1836 15:40:56.878004  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1837 15:40:56.881214  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1838 15:40:56.885734  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1839 15:40:56.889970  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1840 15:40:56.894124  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1841 15:40:56.897607  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1842 15:40:56.904813  BS: BS_WRITE_TABLES times (us): entry 17190 run 486557 exit 157148
 1843 15:40:56.907492  call enable_fixed_mtrr()
 1844 15:40:56.910111  CBFS @ 1d00000 size 300000
 1845 15:40:56.913360  CPU physical address size: 39 bits
 1846 15:40:56.920127  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1847 15:40:56.924280  MTRR: Fixed MSR 0x250 0x0606060606060606
 1848 15:40:56.928104  MTRR: Fixed MSR 0x250 0x0606060606060606
 1849 15:40:56.932400  MTRR: Fixed MSR 0x258 0x0606060606060606
 1850 15:40:56.935935  MTRR: Fixed MSR 0x259 0x0000000000000000
 1851 15:40:56.940784  MTRR: Fixed MSR 0x268 0x0606060606060606
 1852 15:40:56.944472  MTRR: Fixed MSR 0x269 0x0606060606060606
 1853 15:40:56.948635  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1854 15:40:56.953191  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1855 15:40:56.957392  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1856 15:40:56.960829  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1857 15:40:56.964823  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1858 15:40:56.968705  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1859 15:40:56.973499  MTRR: Fixed MSR 0x250 0x0606060606060606
 1860 15:40:56.977910  MTRR: Fixed MSR 0x258 0x0606060606060606
 1861 15:40:56.981386  MTRR: Fixed MSR 0x259 0x0000000000000000
 1862 15:40:56.985672  MTRR: Fixed MSR 0x268 0x0606060606060606
 1863 15:40:56.989858  MTRR: Fixed MSR 0x269 0x0606060606060606
 1864 15:40:56.994162  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1865 15:40:56.998008  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1866 15:40:57.002610  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1867 15:40:57.006396  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1868 15:40:57.011049  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1869 15:40:57.013924  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1870 15:40:57.017181  call enable_fixed_mtrr()
 1871 15:40:57.019820  call enable_fixed_mtrr()
 1872 15:40:57.023837  MTRR: Fixed MSR 0x250 0x0606060606060606
 1873 15:40:57.028107  MTRR: Fixed MSR 0x258 0x0606060606060606
 1874 15:40:57.032299  MTRR: Fixed MSR 0x259 0x0000000000000000
 1875 15:40:57.035617  MTRR: Fixed MSR 0x268 0x0606060606060606
 1876 15:40:57.040074  MTRR: Fixed MSR 0x269 0x0606060606060606
 1877 15:40:57.044512  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1878 15:40:57.048543  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1879 15:40:57.052513  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1880 15:40:57.056559  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1881 15:40:57.061113  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1882 15:40:57.064909  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1883 15:40:57.069252  MTRR: Fixed MSR 0x258 0x0606060606060606
 1884 15:40:57.071593  call enable_fixed_mtrr()
 1885 15:40:57.075386  MTRR: Fixed MSR 0x259 0x0000000000000000
 1886 15:40:57.079811  MTRR: Fixed MSR 0x268 0x0606060606060606
 1887 15:40:57.084082  MTRR: Fixed MSR 0x269 0x0606060606060606
 1888 15:40:57.088300  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1889 15:40:57.092303  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1890 15:40:57.096223  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1891 15:40:57.100489  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1892 15:40:57.104316  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1893 15:40:57.108380  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1894 15:40:57.112481  CPU physical address size: 39 bits
 1895 15:40:57.114748  call enable_fixed_mtrr()
 1896 15:40:57.118670  CPU physical address size: 39 bits
 1897 15:40:57.122301  CPU physical address size: 39 bits
 1898 15:40:57.125975  CBFS: Locating 'fallback/payload'
 1899 15:40:57.129904  MTRR: Fixed MSR 0x250 0x0606060606060606
 1900 15:40:57.133647  MTRR: Fixed MSR 0x250 0x0606060606060606
 1901 15:40:57.138390  MTRR: Fixed MSR 0x258 0x0606060606060606
 1902 15:40:57.141936  MTRR: Fixed MSR 0x259 0x0000000000000000
 1903 15:40:57.146068  MTRR: Fixed MSR 0x268 0x0606060606060606
 1904 15:40:57.149906  MTRR: Fixed MSR 0x269 0x0606060606060606
 1905 15:40:57.154361  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1906 15:40:57.158538  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1907 15:40:57.162187  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1908 15:40:57.166934  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1909 15:40:57.171002  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1910 15:40:57.175138  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1911 15:40:57.179847  MTRR: Fixed MSR 0x258 0x0606060606060606
 1912 15:40:57.181968  call enable_fixed_mtrr()
 1913 15:40:57.186092  MTRR: Fixed MSR 0x259 0x0000000000000000
 1914 15:40:57.189962  MTRR: Fixed MSR 0x268 0x0606060606060606
 1915 15:40:57.193895  MTRR: Fixed MSR 0x269 0x0606060606060606
 1916 15:40:57.197804  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1917 15:40:57.202329  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1918 15:40:57.206031  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1919 15:40:57.210341  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1920 15:40:57.214193  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1921 15:40:57.218739  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1922 15:40:57.222165  CPU physical address size: 39 bits
 1923 15:40:57.225497  CPU physical address size: 39 bits
 1924 15:40:57.228390  call enable_fixed_mtrr()
 1925 15:40:57.232212  CBFS: Found @ offset 1cf4c0 size 3a954
 1926 15:40:57.235371  CPU physical address size: 39 bits
 1927 15:40:57.240363  Checking segment from ROM address 0xffecf4f8
 1928 15:40:57.245142  Checking segment from ROM address 0xffecf514
 1929 15:40:57.249583  Loading segment from ROM address 0xffecf4f8
 1930 15:40:57.251943    code (compression=0)
 1931 15:40:57.259763    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
 1932 15:40:57.268427  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
 1933 15:40:57.270680  it's not compressed!
 1934 15:40:57.352440  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
 1935 15:40:57.358713  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
 1936 15:40:57.367264  Loading segment from ROM address 0xffecf514
 1937 15:40:57.369700    Entry Point 0x30100018
 1938 15:40:57.371606  Loaded segments
 1939 15:40:57.375575  Finalizing chipset.
 1940 15:40:57.377419  Finalizing SMM.
 1941 15:40:57.382973  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466464 exit 5981
 1942 15:40:57.386556  mp_park_aps done after 0 msecs.
 1943 15:40:57.390500  Jumping to boot code at 30100018(89c33000)
 1944 15:40:57.399461  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
 1945 15:40:57.399773  
 1946 15:40:57.399859  
 1947 15:40:57.403427  end: 2.2.3 depthcharge-start (duration 00:00:44) [common]
 1948 15:40:57.403560  start: 2.2.4 bootloader-commands (timeout 00:04:15) [common]
 1949 15:40:57.403666  Setting prompt string to ['sarien:']
 1950 15:40:57.403759  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:15)
 1951 15:40:57.403930  Starting depthcharge on sarien...
 1952 15:40:57.410831  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 1953 15:40:57.418623  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 1954 15:40:57.425820  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
 1955 15:40:57.427931  BIOS MMAP details:
 1956 15:40:57.431051  IFD Base Offset  : 0x1000000
 1957 15:40:57.433722  IFD End Offset   : 0x2000000
 1958 15:40:57.436570  MMAP Size        : 0x1000000
 1959 15:40:57.440011  MMAP Start       : 0xff000000
 1960 15:40:57.446884  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
 1961 15:40:57.455034  New NVMe Controller 0x3214e128 @ 00:1d:04
 1962 15:40:57.459473  New NVMe Controller 0x3214e1f0 @ 00:1d:00
 1963 15:40:57.465519  The GBB signature is at 0x30000014 and is:  24 47 42 42
 1964 15:40:57.471717  Wipe memory regions:
 1965 15:40:57.475123  	[0x00000000001000, 0x000000000a0000)
 1966 15:40:57.478773  	[0x00000000100000, 0x00000030000000)
 1967 15:40:57.564945  	[0x00000032751910, 0x00000089afd000)
 1968 15:40:57.718732  	[0x00000100000000, 0x0000026e800000)
 1969 15:40:58.729742  R8152: Initializing
 1970 15:40:58.732500  Version 6 (ocp_data = 5c30)
 1971 15:40:58.736399  R8152: Done initializing
 1972 15:40:58.738010  Adding net device
 1973 15:40:58.743508  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38
 1974 15:40:58.744086  
 1975 15:40:58.744602  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1977 15:40:58.845416  sarien: tftpboot 192.168.201.1 7463495/tftp-deploy-s4uxarsv/kernel/bzImage 7463495/tftp-deploy-s4uxarsv/kernel/cmdline 7463495/tftp-deploy-s4uxarsv/ramdisk/ramdisk.cpio.gz
 1978 15:40:58.845579  Setting prompt string to 'Starting kernel'
 1979 15:40:58.845703  Setting prompt string to ['Starting kernel']
 1980 15:40:58.845789  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1981 15:40:58.845916  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:14)
 1982 15:40:58.846615  tftpboot 192.168.201.1 7463495/tftp-deploy-s4uxarsv/kernel/bzImage 7463495/tftp-deploy-s4uxarsv/kernel/cmdline 7463495/tftp-deploy-s4uxarsv/ramdisk/ramdisk.cpio.gz
 1983 15:40:58.848736  Waiting for link
 1984 15:40:59.049474  done.
 1985 15:40:59.050988  MAC: 00:24:32:30:7b:ce
 1986 15:40:59.054528  Sending DHCP discover... done.
 1987 15:40:59.056995  Waiting for reply... done.
 1988 15:40:59.059984  Sending DHCP request... done.
 1989 15:40:59.065108  Waiting for reply... done.
 1990 15:40:59.067889  My ip is 192.168.201.162
 1991 15:40:59.071926  The DHCP server ip is 192.168.201.1
 1992 15:40:59.076622  TFTP server IP predefined by user: 192.168.201.1
 1993 15:40:59.084028  Bootfile predefined by user: 7463495/tftp-deploy-s4uxarsv/kernel/bzImage
 1994 15:40:59.087237  Sending tftp read request... done.
 1995 15:40:59.090509  Waiting for the transfer... 
 1996 15:40:59.699659  00000000 ################################################################
 1997 15:41:00.299434  00080000 ################################################################
 1998 15:41:00.910654  00100000 ################################################################
 1999 15:41:01.511406  00180000 ################################################################
 2000 15:41:02.100607  00200000 ################################################################
 2001 15:41:02.754582  00280000 ################################################################
 2002 15:41:03.346494  00300000 ################################################################
 2003 15:41:04.011959  00380000 ################################################################
 2004 15:41:04.657037  00400000 ################################################################
 2005 15:41:05.310889  00480000 ################################################################
 2006 15:41:05.972738  00500000 ################################################################
 2007 15:41:06.611613  00580000 ################################################################
 2008 15:41:07.190519  00600000 ################################################################
 2009 15:41:07.536879  00680000 ###################################### done.
 2010 15:41:07.540575  The bootfile was 7126928 bytes long.
 2011 15:41:07.544147  Sending tftp read request... done.
 2012 15:41:07.546497  Waiting for the transfer... 
 2013 15:41:08.121594  00000000 ################################################################
 2014 15:41:08.702122  00080000 ################################################################
 2015 15:41:09.316528  00100000 ################################################################
 2016 15:41:09.913780  00180000 ################################################################
 2017 15:41:10.503456  00200000 ################################################################
 2018 15:41:11.050142  00280000 ################################################################
 2019 15:41:11.594944  00300000 ################################################################
 2020 15:41:12.131121  00380000 ################################################################
 2021 15:41:12.657993  00400000 ################################################################
 2022 15:41:13.182230  00480000 ################################################################
 2023 15:41:13.701708  00500000 ################################################################
 2024 15:41:14.238872  00580000 ################################################################
 2025 15:41:14.763014  00600000 ################################################################
 2026 15:41:15.286038  00680000 ################################################################
 2027 15:41:15.829970  00700000 ################################################################
 2028 15:41:16.355212  00780000 ################################################################
 2029 15:41:16.515665  00800000 #################### done.
 2030 15:41:16.518763  Sending tftp read request... done.
 2031 15:41:16.521338  Waiting for the transfer... 
 2032 15:41:16.523810  00000000 # done.
 2033 15:41:16.532255  Command line loaded dynamically from TFTP file: 7463495/tftp-deploy-s4uxarsv/kernel/cmdline
 2034 15:41:16.549704  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2035 15:41:16.556890  Shutting down all USB controllers.
 2036 15:41:16.559624  Removing current net device
 2037 15:41:16.563621  EC: exit firmware mode
 2038 15:41:16.566869  Finalizing coreboot
 2039 15:41:16.572878  Exiting depthcharge with code 4 at timestamp: 44711920
 2040 15:41:16.572983  
 2041 15:41:16.574928  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2042 15:41:16.575048  start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
 2043 15:41:16.575143  Setting prompt string to ['Linux version [0-9]']
 2044 15:41:16.575225  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2045 15:41:16.575307  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2046 15:41:16.575520  Starting kernel ...
 2047 15:41:16.575610  
 2048 15:41:16.575684  
 2050 15:45:12.575297  end: 2.2.5 auto-login-action (duration 00:03:56) [common]
 2052 15:45:12.575546  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 236 seconds'
 2054 15:45:12.575732  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2057 15:45:12.576040  end: 2 depthcharge-action (duration 00:05:00) [common]
 2059 15:45:12.576264  Cleaning after the job
 2060 15:45:12.576363  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/ramdisk
 2061 15:45:12.577163  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/kernel
 2062 15:45:12.577767  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463495/tftp-deploy-s4uxarsv/modules
 2063 15:45:12.578029  start: 5.1 power-off (timeout 00:00:30) [common]
 2064 15:45:12.578223  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
 2065 15:45:12.600233  >> Command sent successfully.

 2066 15:45:12.602373  Returned 0 in 0 seconds
 2067 15:45:12.703156  end: 5.1 power-off (duration 00:00:00) [common]
 2069 15:45:12.703527  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2070 15:45:12.703804  Listened to connection for namespace 'common' for up to 1s
 2071 15:45:13.705135  Finalising connection for namespace 'common'
 2072 15:45:13.705342  Disconnecting from shell: Finalise
 2073 15:45:13.806081  end: 5.2 read-feedback (duration 00:00:01) [common]
 2074 15:45:13.806249  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463495
 2075 15:45:13.811980  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463495
 2076 15:45:13.812127  JobError: Your job cannot terminate cleanly.