Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:39:51.786109 lava-dispatcher, installed at version: 2022.06
2 15:39:51.786301 start: 0 validate
3 15:39:51.786455 Start time: 2022-09-30 15:39:51.786448+00:00 (UTC)
4 15:39:51.786600 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:39:51.786733 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Finitrd.cpio.gz exists
6 15:39:51.789616 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:39:51.789739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:39:51.797202 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:39:51.797315 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:39:51.806725 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:39:51.807187 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:39:51.815171 validate duration: 0.03
14 15:39:51.815895 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:39:51.816199 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:39:51.816482 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:39:51.816762 Not decompressing ramdisk as can be used compressed.
18 15:39:51.817005 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/initrd.cpio.gz
19 15:39:51.817199 saving as /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/ramdisk/initrd.cpio.gz
20 15:39:51.817398 total size: 5431599 (5MB)
21 15:39:51.829488 progress 0% (0MB)
22 15:39:51.847676 progress 5% (0MB)
23 15:39:51.859984 progress 10% (0MB)
24 15:39:51.868917 progress 15% (0MB)
25 15:39:51.880206 progress 20% (1MB)
26 15:39:51.892857 progress 25% (1MB)
27 15:39:51.908338 progress 30% (1MB)
28 15:39:51.924419 progress 35% (1MB)
29 15:39:51.937014 progress 40% (2MB)
30 15:39:51.951093 progress 45% (2MB)
31 15:39:51.967408 progress 50% (2MB)
32 15:39:51.979590 progress 55% (2MB)
33 15:39:51.991436 progress 60% (3MB)
34 15:39:52.008842 progress 65% (3MB)
35 15:39:52.024023 progress 70% (3MB)
36 15:39:52.037358 progress 75% (3MB)
37 15:39:52.046407 progress 80% (4MB)
38 15:39:52.056263 progress 85% (4MB)
39 15:39:52.071816 progress 90% (4MB)
40 15:39:52.083562 progress 95% (4MB)
41 15:39:52.095175 progress 100% (5MB)
42 15:39:52.095482 5MB downloaded in 0.28s (18.63MB/s)
43 15:39:52.095643 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:39:52.095929 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:39:52.096019 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:39:52.096108 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:39:52.096211 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:39:52.096280 saving as /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/kernel/bzImage
50 15:39:52.096344 total size: 7126928 (6MB)
51 15:39:52.096408 No compression specified
52 15:39:52.122607 progress 0% (0MB)
53 15:39:52.168046 progress 5% (0MB)
54 15:39:52.200725 progress 10% (0MB)
55 15:39:52.219148 progress 15% (1MB)
56 15:39:52.258010 progress 20% (1MB)
57 15:39:52.303120 progress 25% (1MB)
58 15:39:52.349518 progress 30% (2MB)
59 15:39:52.381829 progress 35% (2MB)
60 15:39:52.426484 progress 40% (2MB)
61 15:39:52.464941 progress 45% (3MB)
62 15:39:52.502655 progress 50% (3MB)
63 15:39:52.547588 progress 55% (3MB)
64 15:39:52.592759 progress 60% (4MB)
65 15:39:52.633085 progress 65% (4MB)
66 15:39:52.670113 progress 70% (4MB)
67 15:39:52.716700 progress 75% (5MB)
68 15:39:52.759823 progress 80% (5MB)
69 15:39:52.797533 progress 85% (5MB)
70 15:39:52.835644 progress 90% (6MB)
71 15:39:52.879565 progress 95% (6MB)
72 15:39:52.915847 progress 100% (6MB)
73 15:39:52.916233 6MB downloaded in 0.82s (8.29MB/s)
74 15:39:52.916481 end: 1.2.1 http-download (duration 00:00:01) [common]
76 15:39:52.916875 end: 1.2 download-retry (duration 00:00:01) [common]
77 15:39:52.917023 start: 1.3 download-retry (timeout 00:09:59) [common]
78 15:39:52.917169 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 15:39:52.917339 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/full.rootfs.tar.xz
80 15:39:52.917453 saving as /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/nfsrootfs/full.rootfs.tar
81 15:39:52.917557 total size: 133274540 (127MB)
82 15:39:52.917660 Using unxz to decompress xz
83 15:39:52.964634 progress 0% (0MB)
84 15:39:53.742162 progress 5% (6MB)
85 15:39:54.222288 progress 10% (12MB)
86 15:39:54.613615 progress 15% (19MB)
87 15:39:55.162215 progress 20% (25MB)
88 15:39:55.949746 progress 25% (31MB)
89 15:39:56.522724 progress 30% (38MB)
90 15:39:56.876188 progress 35% (44MB)
91 15:39:57.270696 progress 40% (50MB)
92 15:39:57.657903 progress 45% (57MB)
93 15:39:58.014355 progress 50% (63MB)
94 15:39:58.386108 progress 55% (69MB)
95 15:39:58.747532 progress 60% (76MB)
96 15:39:59.107292 progress 65% (82MB)
97 15:39:59.469041 progress 70% (89MB)
98 15:39:59.830682 progress 75% (95MB)
99 15:40:00.264454 progress 80% (101MB)
100 15:40:00.700793 progress 85% (108MB)
101 15:40:00.964977 progress 90% (114MB)
102 15:40:01.305344 progress 95% (120MB)
103 15:40:01.696868 progress 100% (127MB)
104 15:40:01.701924 127MB downloaded in 8.78s (14.47MB/s)
105 15:40:01.702205 end: 1.3.1 http-download (duration 00:00:09) [common]
107 15:40:01.702467 end: 1.3 download-retry (duration 00:00:09) [common]
108 15:40:01.702565 start: 1.4 download-retry (timeout 00:09:50) [common]
109 15:40:01.702655 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 15:40:01.702772 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:40:01.702845 saving as /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/modules/modules.tar
112 15:40:01.702909 total size: 51896 (0MB)
113 15:40:01.702972 Using unxz to decompress xz
114 15:40:01.707181 progress 63% (0MB)
115 15:40:01.707647 progress 100% (0MB)
116 15:40:01.710788 0MB downloaded in 0.01s (6.29MB/s)
117 15:40:01.710999 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:40:01.711257 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:40:01.711353 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 15:40:01.711455 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 15:40:02.920371 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7463481/extract-nfsrootfs-mpgar4g8
123 15:40:02.920574 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 15:40:02.920678 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 15:40:02.920812 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy
126 15:40:02.920912 makedir: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin
127 15:40:02.921001 makedir: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/tests
128 15:40:02.921084 makedir: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/results
129 15:40:02.921182 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-add-keys
130 15:40:02.921309 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-add-sources
131 15:40:02.921422 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-background-process-start
132 15:40:02.921533 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-background-process-stop
133 15:40:02.921642 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-common-functions
134 15:40:02.921748 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-echo-ipv4
135 15:40:02.921855 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-install-packages
136 15:40:02.921962 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-installed-packages
137 15:40:02.922067 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-os-build
138 15:40:02.922174 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-probe-channel
139 15:40:02.922280 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-probe-ip
140 15:40:02.922386 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-target-ip
141 15:40:02.922492 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-target-mac
142 15:40:02.922598 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-target-storage
143 15:40:02.922716 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-case
144 15:40:02.922825 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-event
145 15:40:02.922930 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-feedback
146 15:40:02.923038 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-raise
147 15:40:02.923143 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-reference
148 15:40:02.923249 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-runner
149 15:40:02.923355 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-set
150 15:40:02.923459 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-test-shell
151 15:40:02.923565 Updating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-install-packages (oe)
152 15:40:02.923678 Updating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/bin/lava-installed-packages (oe)
153 15:40:02.923871 Creating /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/environment
154 15:40:02.923957 LAVA metadata
155 15:40:02.924022 - LAVA_JOB_ID=7463481
156 15:40:02.924084 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:40:02.924181 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 15:40:02.924245 skipped lava-vland-overlay
159 15:40:02.924321 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:40:02.924401 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 15:40:02.924462 skipped lava-multinode-overlay
162 15:40:02.924535 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:40:02.924615 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 15:40:02.924685 Loading test definitions
165 15:40:02.924775 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 15:40:02.924858 Using /lava-7463481 at stage 0
167 15:40:02.925107 uuid=7463481_1.5.2.3.1 testdef=None
168 15:40:02.925196 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 15:40:02.925283 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 15:40:02.925755 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 15:40:02.925982 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 15:40:02.926535 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 15:40:02.926769 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 15:40:02.927302 runner path: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/0/tests/0_dmesg test_uuid 7463481_1.5.2.3.1
177 15:40:02.927446 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 15:40:02.927677 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 15:40:02.927806 Using /lava-7463481 at stage 1
181 15:40:02.928063 uuid=7463481_1.5.2.3.5 testdef=None
182 15:40:02.928152 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 15:40:02.928239 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 15:40:02.928676 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 15:40:02.928898 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 15:40:02.929468 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 15:40:02.929702 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 15:40:02.930245 runner path: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/1/tests/1_bootrr test_uuid 7463481_1.5.2.3.5
191 15:40:02.930384 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 15:40:02.930594 Creating lava-test-runner.conf files
194 15:40:02.930658 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/0 for stage 0
195 15:40:02.930737 - 0_dmesg
196 15:40:02.930811 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463481/lava-overlay-9vt0z7oy/lava-7463481/1 for stage 1
197 15:40:02.930891 - 1_bootrr
198 15:40:02.930980 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 15:40:02.931064 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 15:40:02.936571 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 15:40:02.936675 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 15:40:02.936763 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 15:40:02.936848 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 15:40:02.936933 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 15:40:03.038719 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 15:40:03.039057 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 15:40:03.039164 extracting modules file /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463481/extract-nfsrootfs-mpgar4g8
208 15:40:03.043233 extracting modules file /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463481/extract-overlay-ramdisk-2yqlephr/ramdisk
209 15:40:03.046942 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 15:40:03.047050 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 15:40:03.047134 [common] Applying overlay to NFS
212 15:40:03.047204 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463481/compress-overlay-9vnquvat/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463481/extract-nfsrootfs-mpgar4g8
213 15:40:03.050999 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 15:40:03.051102 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 15:40:03.051192 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 15:40:03.051281 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 15:40:03.051360 Building ramdisk /var/lib/lava/dispatcher/tmp/7463481/extract-overlay-ramdisk-2yqlephr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463481/extract-overlay-ramdisk-2yqlephr/ramdisk
218 15:40:03.084205 >> 24546 blocks
219 15:40:03.550817 rename /var/lib/lava/dispatcher/tmp/7463481/extract-overlay-ramdisk-2yqlephr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/ramdisk/ramdisk.cpio.gz
220 15:40:03.551203 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 15:40:03.551323 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
222 15:40:03.551428 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
223 15:40:03.551527 No mkimage arch provided, not using FIT.
224 15:40:03.551615 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 15:40:03.551700 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 15:40:03.551805 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 15:40:03.551898 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
228 15:40:03.551977 No LXC device requested
229 15:40:03.552060 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 15:40:03.552148 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
231 15:40:03.552231 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 15:40:03.552299 Checking files for TFTP limit of 4294967296 bytes.
233 15:40:03.552715 end: 1 tftp-deploy (duration 00:00:12) [common]
234 15:40:03.552826 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 15:40:03.552922 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 15:40:03.553051 substitutions:
237 15:40:03.553120 - {DTB}: None
238 15:40:03.553186 - {INITRD}: 7463481/tftp-deploy-7uiin20h/ramdisk/ramdisk.cpio.gz
239 15:40:03.553247 - {KERNEL}: 7463481/tftp-deploy-7uiin20h/kernel/bzImage
240 15:40:03.553308 - {LAVA_MAC}: None
241 15:40:03.553367 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7463481/extract-nfsrootfs-mpgar4g8
242 15:40:03.553426 - {NFS_SERVER_IP}: 192.168.201.1
243 15:40:03.553482 - {PRESEED_CONFIG}: None
244 15:40:03.553539 - {PRESEED_LOCAL}: None
245 15:40:03.553595 - {RAMDISK}: 7463481/tftp-deploy-7uiin20h/ramdisk/ramdisk.cpio.gz
246 15:40:03.553653 - {ROOT_PART}: None
247 15:40:03.553708 - {ROOT}: None
248 15:40:03.553765 - {SERVER_IP}: 192.168.201.1
249 15:40:03.553820 - {TEE}: None
250 15:40:03.553875 Parsed boot commands:
251 15:40:03.553930 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 15:40:03.554079 Parsed boot commands: tftpboot 192.168.201.1 7463481/tftp-deploy-7uiin20h/kernel/bzImage 7463481/tftp-deploy-7uiin20h/kernel/cmdline 7463481/tftp-deploy-7uiin20h/ramdisk/ramdisk.cpio.gz
253 15:40:03.554173 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 15:40:03.554264 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 15:40:03.554356 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 15:40:03.554441 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 15:40:03.554513 Not connected, no need to disconnect.
258 15:40:03.554598 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 15:40:03.554687 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 15:40:03.554758 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
261 15:40:03.557286 Setting prompt string to ['lava-test: # ']
262 15:40:03.557571 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 15:40:03.557674 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 15:40:03.557774 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 15:40:03.557867 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 15:40:03.558043 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
267 15:40:03.576577 >> Command sent successfully.
268 15:40:03.578418 Returned 0 in 0 seconds
269 15:40:03.679526 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 15:40:03.680866 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 15:40:03.681336 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 15:40:03.681734 Setting prompt string to 'Starting depthcharge on Voema...'
274 15:40:03.682038 Changing prompt to 'Starting depthcharge on Voema...'
275 15:40:03.682395 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 15:40:03.683515 [Enter `^Ec?' for help]
277 15:40:10.848339
278 15:40:10.848974
279 15:40:10.858291 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 15:40:10.861395 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 15:40:10.868105 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 15:40:10.872567 CPU: AES supported, TXT NOT supported, VT supported
283 15:40:10.878284 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 15:40:10.881669 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 15:40:10.888460 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 15:40:10.891798 VBOOT: Loading verstage.
287 15:40:10.895230 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 15:40:10.901737 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 15:40:10.905405 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 15:40:10.914990 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 15:40:10.921587 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 15:40:10.922176
293 15:40:10.922563
294 15:40:10.931980 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 15:40:10.948608 Probing TPM: . done!
296 15:40:10.951808 TPM ready after 0 ms
297 15:40:10.955193 Connected to device vid:did:rid of 1ae0:0028:00
298 15:40:10.966003 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 15:40:10.972657 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 15:40:10.976455 Initialized TPM device CR50 revision 0
301 15:40:11.032882 tlcl_send_startup: Startup return code is 0
302 15:40:11.033411 TPM: setup succeeded
303 15:40:11.048350 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 15:40:11.062374 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 15:40:11.075408 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 15:40:11.085295 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 15:40:11.089239 Chrome EC: UHEPI supported
308 15:40:11.091951 Phase 1
309 15:40:11.095599 FMAP: area GBB found @ 1805000 (458752 bytes)
310 15:40:11.105639 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 15:40:11.112475 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 15:40:11.119070 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 15:40:11.125186 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 15:40:11.128476 Recovery requested (1009000e)
315 15:40:11.132456 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 15:40:11.143665 tlcl_extend: response is 0
317 15:40:11.150379 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 15:40:11.160589 tlcl_extend: response is 0
319 15:40:11.166490 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 15:40:11.173165 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 15:40:11.180292 BS: verstage times (exec / console): total (unknown) / 142 ms
322 15:40:11.180906
323 15:40:11.181304
324 15:40:11.192716 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 15:40:11.199538 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 15:40:11.203139 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 15:40:11.206387 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 15:40:11.212859 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 15:40:11.216199 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 15:40:11.219825 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 15:40:11.222882 TCO_STS: 0000 0000
332 15:40:11.226345 GEN_PMCON: d0015038 00002200
333 15:40:11.229685 GBLRST_CAUSE: 00000000 00000000
334 15:40:11.232562 HPR_CAUSE0: 00000000
335 15:40:11.233005 prev_sleep_state 5
336 15:40:11.236110 Boot Count incremented to 8445
337 15:40:11.242550 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 15:40:11.249302 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 15:40:11.259385 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 15:40:11.266624 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 15:40:11.268996 Chrome EC: UHEPI supported
342 15:40:11.275758 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 15:40:11.286715 Probing TPM: done!
344 15:40:11.293662 Connected to device vid:did:rid of 1ae0:0028:00
345 15:40:11.303489 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 15:40:11.306767 Initialized TPM device CR50 revision 0
347 15:40:11.321923 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 15:40:11.328493 MRC: Hash idx 0x100b comparison successful.
349 15:40:11.331918 MRC cache found, size faa8
350 15:40:11.332496 bootmode is set to: 2
351 15:40:11.334842 SPD index = 2
352 15:40:11.341244 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 15:40:11.345046 SPD: module type is LPDDR4X
354 15:40:11.348226 SPD: module part number is MT53D1G64D4NW-046
355 15:40:11.354586 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 15:40:11.358631 SPD: device width 16 bits, bus width 16 bits
357 15:40:11.365507 SPD: module size is 2048 MB (per channel)
358 15:40:11.794862 CBMEM:
359 15:40:11.798097 IMD: root @ 0x76fff000 254 entries.
360 15:40:11.801697 IMD: root @ 0x76ffec00 62 entries.
361 15:40:11.804611 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 15:40:11.811468 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 15:40:11.814913 External stage cache:
364 15:40:11.818346 IMD: root @ 0x7b3ff000 254 entries.
365 15:40:11.821131 IMD: root @ 0x7b3fec00 62 entries.
366 15:40:11.836305 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 15:40:11.843079 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 15:40:11.849305 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 15:40:11.863124 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 15:40:11.869968 cse_lite: Skip switching to RW in the recovery path
371 15:40:11.870087 8 DIMMs found
372 15:40:11.870161 SMM Memory Map
373 15:40:11.876193 SMRAM : 0x7b000000 0x800000
374 15:40:11.879531 Subregion 0: 0x7b000000 0x200000
375 15:40:11.882867 Subregion 1: 0x7b200000 0x200000
376 15:40:11.886405 Subregion 2: 0x7b400000 0x400000
377 15:40:11.886493 top_of_ram = 0x77000000
378 15:40:11.892690 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 15:40:11.899464 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 15:40:11.902918 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 15:40:11.909786 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 15:40:11.916025 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 15:40:11.922259 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 15:40:11.933495 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 15:40:11.937378 Processing 211 relocs. Offset value of 0x74c0b000
386 15:40:11.945808 BS: romstage times (exec / console): total (unknown) / 277 ms
387 15:40:11.951955
388 15:40:11.952120
389 15:40:11.961696 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 15:40:11.964789 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 15:40:11.975457 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 15:40:11.981614 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 15:40:11.988549 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 15:40:11.994956 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 15:40:12.038678 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 15:40:12.045368 Processing 5008 relocs. Offset value of 0x75d98000
397 15:40:12.048871 BS: postcar times (exec / console): total (unknown) / 59 ms
398 15:40:12.052093
399 15:40:12.052539
400 15:40:12.061709 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 15:40:12.062237 Normal boot
402 15:40:12.065088 FW_CONFIG value is 0x804c02
403 15:40:12.068339 PCI: 00:07.0 disabled by fw_config
404 15:40:12.071646 PCI: 00:07.1 disabled by fw_config
405 15:40:12.074924 PCI: 00:0d.2 disabled by fw_config
406 15:40:12.081460 PCI: 00:1c.7 disabled by fw_config
407 15:40:12.084707 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 15:40:12.091191 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 15:40:12.097922 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 15:40:12.101356 GENERIC: 0.0 disabled by fw_config
411 15:40:12.104545 GENERIC: 1.0 disabled by fw_config
412 15:40:12.107742 fw_config match found: DB_USB=USB3_ACTIVE
413 15:40:12.111157 fw_config match found: DB_USB=USB3_ACTIVE
414 15:40:12.117841 fw_config match found: DB_USB=USB3_ACTIVE
415 15:40:12.121474 fw_config match found: DB_USB=USB3_ACTIVE
416 15:40:12.124754 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 15:40:12.134344 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 15:40:12.140992 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 15:40:12.147664 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 15:40:12.154356 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 15:40:12.157340 microcode: Update skipped, already up-to-date
422 15:40:12.164422 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 15:40:12.192835 Detected 4 core, 8 thread CPU.
424 15:40:12.196093 Setting up SMI for CPU
425 15:40:12.199159 IED base = 0x7b400000
426 15:40:12.199649 IED size = 0x00400000
427 15:40:12.202614 Will perform SMM setup.
428 15:40:12.209073 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
429 15:40:12.216001 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 15:40:12.222259 Processing 16 relocs. Offset value of 0x00030000
431 15:40:12.225555 Attempting to start 7 APs
432 15:40:12.228930 Waiting for 10ms after sending INIT.
433 15:40:12.244107 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 15:40:12.247616 AP: slot 6 apic_id 4.
435 15:40:12.251043 AP: slot 3 apic_id 3.
436 15:40:12.251489 AP: slot 7 apic_id 2.
437 15:40:12.251878 done.
438 15:40:12.254387 AP: slot 5 apic_id 6.
439 15:40:12.257333 AP: slot 4 apic_id 7.
440 15:40:12.260866 Waiting for 2nd SIPI to complete...done.
441 15:40:12.263890 AP: slot 2 apic_id 5.
442 15:40:12.270811 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 15:40:12.277134 Processing 13 relocs. Offset value of 0x00038000
444 15:40:12.280499 Unable to locate Global NVS
445 15:40:12.287335 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 15:40:12.290124 Installing permanent SMM handler to 0x7b000000
447 15:40:12.300521 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 15:40:12.303907 Processing 794 relocs. Offset value of 0x7b010000
449 15:40:12.313672 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 15:40:12.317152 Processing 13 relocs. Offset value of 0x7b008000
451 15:40:12.323634 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 15:40:12.330392 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 15:40:12.333283 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 15:40:12.339934 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 15:40:12.346514 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 15:40:12.353456 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 15:40:12.360091 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 15:40:12.360189 Unable to locate Global NVS
459 15:40:12.370027 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 15:40:12.372961 Clearing SMI status registers
461 15:40:12.373040 SMI_STS: PM1
462 15:40:12.376296 PM1_STS: PWRBTN
463 15:40:12.383409 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 15:40:12.386049 In relocation handler: CPU 0
465 15:40:12.389623 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 15:40:12.396519 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 15:40:12.396633 Relocation complete.
468 15:40:12.406445 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 15:40:12.409380 In relocation handler: CPU 1
470 15:40:12.412793 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 15:40:12.412893 Relocation complete.
472 15:40:12.422518 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
473 15:40:12.422625 In relocation handler: CPU 4
474 15:40:12.429431 New SMBASE=0x7afff000 IEDBASE=0x7b400000
475 15:40:12.429526 Relocation complete.
476 15:40:12.439650 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
477 15:40:12.439802 In relocation handler: CPU 5
478 15:40:12.445860 New SMBASE=0x7affec00 IEDBASE=0x7b400000
479 15:40:12.449235 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 15:40:12.452716 Relocation complete.
481 15:40:12.459037 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 15:40:12.462606 In relocation handler: CPU 3
483 15:40:12.465716 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 15:40:12.469215 Relocation complete.
485 15:40:12.475734 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 15:40:12.478973 In relocation handler: CPU 7
487 15:40:12.482145 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 15:40:12.488818 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 15:40:12.488921 Relocation complete.
490 15:40:12.495222 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
491 15:40:12.498762 In relocation handler: CPU 6
492 15:40:12.505265 New SMBASE=0x7affe800 IEDBASE=0x7b400000
493 15:40:12.508651 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 15:40:12.511681 Relocation complete.
495 15:40:12.518552 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
496 15:40:12.521985 In relocation handler: CPU 2
497 15:40:12.525566 New SMBASE=0x7afff800 IEDBASE=0x7b400000
498 15:40:12.528317 Relocation complete.
499 15:40:12.528406 Initializing CPU #0
500 15:40:12.531896 CPU: vendor Intel device 806c1
501 15:40:12.538637 CPU: family 06, model 8c, stepping 01
502 15:40:12.538731 Clearing out pending MCEs
503 15:40:12.541833 Setting up local APIC...
504 15:40:12.545229 apic_id: 0x00 done.
505 15:40:12.548309 Turbo is available but hidden
506 15:40:12.552189 Turbo is available and visible
507 15:40:12.555124 microcode: Update skipped, already up-to-date
508 15:40:12.558282 CPU #0 initialized
509 15:40:12.558371 Initializing CPU #6
510 15:40:12.561858 Initializing CPU #2
511 15:40:12.565021 CPU: vendor Intel device 806c1
512 15:40:12.568506 CPU: family 06, model 8c, stepping 01
513 15:40:12.572150 Initializing CPU #7
514 15:40:12.574762 CPU: vendor Intel device 806c1
515 15:40:12.578153 CPU: family 06, model 8c, stepping 01
516 15:40:12.581377 Clearing out pending MCEs
517 15:40:12.581466 Clearing out pending MCEs
518 15:40:12.585081 Setting up local APIC...
519 15:40:12.588094 CPU: vendor Intel device 806c1
520 15:40:12.591352 CPU: family 06, model 8c, stepping 01
521 15:40:12.595435 Initializing CPU #3
522 15:40:12.595523 Clearing out pending MCEs
523 15:40:12.598827 CPU: vendor Intel device 806c1
524 15:40:12.602906 CPU: family 06, model 8c, stepping 01
525 15:40:12.606237 Setting up local APIC...
526 15:40:12.609173 Initializing CPU #1
527 15:40:12.609262 Initializing CPU #5
528 15:40:12.612567 Initializing CPU #4
529 15:40:12.615963 CPU: vendor Intel device 806c1
530 15:40:12.619359 CPU: family 06, model 8c, stepping 01
531 15:40:12.622869 CPU: vendor Intel device 806c1
532 15:40:12.625931 CPU: family 06, model 8c, stepping 01
533 15:40:12.629193 Clearing out pending MCEs
534 15:40:12.632646 Clearing out pending MCEs
535 15:40:12.632733 Clearing out pending MCEs
536 15:40:12.635933 apic_id: 0x02 done.
537 15:40:12.639369 Setting up local APIC...
538 15:40:12.642772 Setting up local APIC...
539 15:40:12.646039 CPU: vendor Intel device 806c1
540 15:40:12.649425 CPU: family 06, model 8c, stepping 01
541 15:40:12.649544 apic_id: 0x03 done.
542 15:40:12.655640 microcode: Update skipped, already up-to-date
543 15:40:12.659289 Clearing out pending MCEs
544 15:40:12.659380 Setting up local APIC...
545 15:40:12.662744 Setting up local APIC...
546 15:40:12.665890 apic_id: 0x07 done.
547 15:40:12.665974 apic_id: 0x06 done.
548 15:40:12.672760 microcode: Update skipped, already up-to-date
549 15:40:12.675627 microcode: Update skipped, already up-to-date
550 15:40:12.679430 CPU #4 initialized
551 15:40:12.679517 CPU #5 initialized
552 15:40:12.686084 microcode: Update skipped, already up-to-date
553 15:40:12.686192 CPU #7 initialized
554 15:40:12.689439 CPU #3 initialized
555 15:40:12.692156 apic_id: 0x01 done.
556 15:40:12.692266 Setting up local APIC...
557 15:40:12.698996 microcode: Update skipped, already up-to-date
558 15:40:12.699102 apic_id: 0x05 done.
559 15:40:12.702602 apic_id: 0x04 done.
560 15:40:12.705422 microcode: Update skipped, already up-to-date
561 15:40:12.712342 microcode: Update skipped, already up-to-date
562 15:40:12.712442 CPU #2 initialized
563 15:40:12.715682 CPU #6 initialized
564 15:40:12.715799 CPU #1 initialized
565 15:40:12.722028 bsp_do_flight_plan done after 456 msecs.
566 15:40:12.725452 CPU: frequency set to 4400 MHz
567 15:40:12.725547 Enabling SMIs.
568 15:40:12.732408 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
569 15:40:12.748569 SATAXPCIE1 indicates PCIe NVMe is present
570 15:40:12.751918 Probing TPM: done!
571 15:40:12.755359 Connected to device vid:did:rid of 1ae0:0028:00
572 15:40:12.765810 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
573 15:40:12.768999 Initialized TPM device CR50 revision 0
574 15:40:12.772470 Enabling S0i3.4
575 15:40:12.779053 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 15:40:12.782320 Found a VBT of 8704 bytes after decompression
577 15:40:12.788828 cse_lite: CSE RO boot. HybridStorageMode disabled
578 15:40:12.795121 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 15:40:12.870864 FSPS returned 0
580 15:40:12.874217 Executing Phase 1 of FspMultiPhaseSiInit
581 15:40:12.883989 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 15:40:12.887219 port C0 DISC req: usage 1 usb3 1 usb2 5
583 15:40:12.891147 Raw Buffer output 0 00000511
584 15:40:12.894244 Raw Buffer output 1 00000000
585 15:40:12.897699 pmc_send_ipc_cmd succeeded
586 15:40:12.904681 port C1 DISC req: usage 1 usb3 2 usb2 3
587 15:40:12.904814 Raw Buffer output 0 00000321
588 15:40:12.907545 Raw Buffer output 1 00000000
589 15:40:12.911909 pmc_send_ipc_cmd succeeded
590 15:40:12.916961 Detected 4 core, 8 thread CPU.
591 15:40:12.920433 Detected 4 core, 8 thread CPU.
592 15:40:13.121378 Display FSP Version Info HOB
593 15:40:13.124722 Reference Code - CPU = a.0.4c.31
594 15:40:13.128163 uCode Version = 0.0.0.86
595 15:40:13.131004 TXT ACM version = ff.ff.ff.ffff
596 15:40:13.134576 Reference Code - ME = a.0.4c.31
597 15:40:13.137934 MEBx version = 0.0.0.0
598 15:40:13.141342 ME Firmware Version = Consumer SKU
599 15:40:13.144148 Reference Code - PCH = a.0.4c.31
600 15:40:13.147423 PCH-CRID Status = Disabled
601 15:40:13.150851 PCH-CRID Original Value = ff.ff.ff.ffff
602 15:40:13.154175 PCH-CRID New Value = ff.ff.ff.ffff
603 15:40:13.157521 OPROM - RST - RAID = ff.ff.ff.ffff
604 15:40:13.160748 PCH Hsio Version = 4.0.0.0
605 15:40:13.164608 Reference Code - SA - System Agent = a.0.4c.31
606 15:40:13.167579 Reference Code - MRC = 2.0.0.1
607 15:40:13.170983 SA - PCIe Version = a.0.4c.31
608 15:40:13.174568 SA-CRID Status = Disabled
609 15:40:13.178498 SA-CRID Original Value = 0.0.0.1
610 15:40:13.178593 SA-CRID New Value = 0.0.0.1
611 15:40:13.181910 OPROM - VBIOS = ff.ff.ff.ffff
612 15:40:13.189021 IO Manageability Engine FW Version = 11.1.4.0
613 15:40:13.192387 PHY Build Version = 0.0.0.e0
614 15:40:13.195510 Thunderbolt(TM) FW Version = 0.0.0.0
615 15:40:13.201995 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 15:40:13.202103 ITSS IRQ Polarities Before:
617 15:40:13.204992 IPC0: 0xffffffff
618 15:40:13.205097 IPC1: 0xffffffff
619 15:40:13.208643 IPC2: 0xffffffff
620 15:40:13.211622 IPC3: 0xffffffff
621 15:40:13.211717 ITSS IRQ Polarities After:
622 15:40:13.214918 IPC0: 0xffffffff
623 15:40:13.215005 IPC1: 0xffffffff
624 15:40:13.218137 IPC2: 0xffffffff
625 15:40:13.218224 IPC3: 0xffffffff
626 15:40:13.225599 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 15:40:13.235039 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 15:40:13.248180 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 15:40:13.261715 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 15:40:13.265292 BS: BS_DEV_INIT_CHIPS run times (exec / console): 292 / 236 ms
631 15:40:13.268252 Enumerating buses...
632 15:40:13.271529 Show all devs... Before device enumeration.
633 15:40:13.274890 Root Device: enabled 1
634 15:40:13.278139 DOMAIN: 0000: enabled 1
635 15:40:13.281541 CPU_CLUSTER: 0: enabled 1
636 15:40:13.281684 PCI: 00:00.0: enabled 1
637 15:40:13.284498 PCI: 00:02.0: enabled 1
638 15:40:13.288119 PCI: 00:04.0: enabled 1
639 15:40:13.291456 PCI: 00:05.0: enabled 1
640 15:40:13.291539 PCI: 00:06.0: enabled 0
641 15:40:13.294727 PCI: 00:07.0: enabled 0
642 15:40:13.297896 PCI: 00:07.1: enabled 0
643 15:40:13.301357 PCI: 00:07.2: enabled 0
644 15:40:13.301470 PCI: 00:07.3: enabled 0
645 15:40:13.304491 PCI: 00:08.0: enabled 1
646 15:40:13.308051 PCI: 00:09.0: enabled 0
647 15:40:13.311357 PCI: 00:0a.0: enabled 0
648 15:40:13.311494 PCI: 00:0d.0: enabled 1
649 15:40:13.314761 PCI: 00:0d.1: enabled 0
650 15:40:13.317598 PCI: 00:0d.2: enabled 0
651 15:40:13.321539 PCI: 00:0d.3: enabled 0
652 15:40:13.321640 PCI: 00:0e.0: enabled 0
653 15:40:13.324380 PCI: 00:10.2: enabled 1
654 15:40:13.327639 PCI: 00:10.6: enabled 0
655 15:40:13.327768 PCI: 00:10.7: enabled 0
656 15:40:13.331257 PCI: 00:12.0: enabled 0
657 15:40:13.334784 PCI: 00:12.6: enabled 0
658 15:40:13.337576 PCI: 00:13.0: enabled 0
659 15:40:13.337656 PCI: 00:14.0: enabled 1
660 15:40:13.340971 PCI: 00:14.1: enabled 0
661 15:40:13.344579 PCI: 00:14.2: enabled 1
662 15:40:13.348006 PCI: 00:14.3: enabled 1
663 15:40:13.348102 PCI: 00:15.0: enabled 1
664 15:40:13.351319 PCI: 00:15.1: enabled 1
665 15:40:13.354251 PCI: 00:15.2: enabled 1
666 15:40:13.358117 PCI: 00:15.3: enabled 1
667 15:40:13.358224 PCI: 00:16.0: enabled 1
668 15:40:13.361326 PCI: 00:16.1: enabled 0
669 15:40:13.364108 PCI: 00:16.2: enabled 0
670 15:40:13.367984 PCI: 00:16.3: enabled 0
671 15:40:13.368091 PCI: 00:16.4: enabled 0
672 15:40:13.370807 PCI: 00:16.5: enabled 0
673 15:40:13.374355 PCI: 00:17.0: enabled 1
674 15:40:13.374441 PCI: 00:19.0: enabled 0
675 15:40:13.377319 PCI: 00:19.1: enabled 1
676 15:40:13.380687 PCI: 00:19.2: enabled 0
677 15:40:13.384177 PCI: 00:1c.0: enabled 1
678 15:40:13.384266 PCI: 00:1c.1: enabled 0
679 15:40:13.387723 PCI: 00:1c.2: enabled 0
680 15:40:13.391031 PCI: 00:1c.3: enabled 0
681 15:40:13.394184 PCI: 00:1c.4: enabled 0
682 15:40:13.394275 PCI: 00:1c.5: enabled 0
683 15:40:13.397508 PCI: 00:1c.6: enabled 1
684 15:40:13.400868 PCI: 00:1c.7: enabled 0
685 15:40:13.404101 PCI: 00:1d.0: enabled 1
686 15:40:13.404189 PCI: 00:1d.1: enabled 0
687 15:40:13.407445 PCI: 00:1d.2: enabled 1
688 15:40:13.410870 PCI: 00:1d.3: enabled 0
689 15:40:13.410961 PCI: 00:1e.0: enabled 1
690 15:40:13.414101 PCI: 00:1e.1: enabled 0
691 15:40:13.417484 PCI: 00:1e.2: enabled 1
692 15:40:13.420811 PCI: 00:1e.3: enabled 1
693 15:40:13.420899 PCI: 00:1f.0: enabled 1
694 15:40:13.424261 PCI: 00:1f.1: enabled 0
695 15:40:13.427889 PCI: 00:1f.2: enabled 1
696 15:40:13.430695 PCI: 00:1f.3: enabled 1
697 15:40:13.430783 PCI: 00:1f.4: enabled 0
698 15:40:13.434289 PCI: 00:1f.5: enabled 1
699 15:40:13.437657 PCI: 00:1f.6: enabled 0
700 15:40:13.440591 PCI: 00:1f.7: enabled 0
701 15:40:13.440680 APIC: 00: enabled 1
702 15:40:13.443930 GENERIC: 0.0: enabled 1
703 15:40:13.447453 GENERIC: 0.0: enabled 1
704 15:40:13.447545 GENERIC: 1.0: enabled 1
705 15:40:13.450794 GENERIC: 0.0: enabled 1
706 15:40:13.453694 GENERIC: 1.0: enabled 1
707 15:40:13.457541 USB0 port 0: enabled 1
708 15:40:13.457639 GENERIC: 0.0: enabled 1
709 15:40:13.460977 USB0 port 0: enabled 1
710 15:40:13.463779 GENERIC: 0.0: enabled 1
711 15:40:13.463871 I2C: 00:1a: enabled 1
712 15:40:13.467079 I2C: 00:31: enabled 1
713 15:40:13.470377 I2C: 00:32: enabled 1
714 15:40:13.470469 I2C: 00:10: enabled 1
715 15:40:13.473790 I2C: 00:15: enabled 1
716 15:40:13.477379 GENERIC: 0.0: enabled 0
717 15:40:13.480756 GENERIC: 1.0: enabled 0
718 15:40:13.480849 GENERIC: 0.0: enabled 1
719 15:40:13.483691 SPI: 00: enabled 1
720 15:40:13.487338 SPI: 00: enabled 1
721 15:40:13.487430 PNP: 0c09.0: enabled 1
722 15:40:13.490541 GENERIC: 0.0: enabled 1
723 15:40:13.493944 USB3 port 0: enabled 1
724 15:40:13.494035 USB3 port 1: enabled 1
725 15:40:13.497199 USB3 port 2: enabled 0
726 15:40:13.500557 USB3 port 3: enabled 0
727 15:40:13.503576 USB2 port 0: enabled 0
728 15:40:13.503669 USB2 port 1: enabled 1
729 15:40:13.506790 USB2 port 2: enabled 1
730 15:40:13.510225 USB2 port 3: enabled 0
731 15:40:13.510322 USB2 port 4: enabled 1
732 15:40:13.513731 USB2 port 5: enabled 0
733 15:40:13.516965 USB2 port 6: enabled 0
734 15:40:13.517060 USB2 port 7: enabled 0
735 15:40:13.520542 USB2 port 8: enabled 0
736 15:40:13.523809 USB2 port 9: enabled 0
737 15:40:13.526605 USB3 port 0: enabled 0
738 15:40:13.526695 USB3 port 1: enabled 1
739 15:40:13.530003 USB3 port 2: enabled 0
740 15:40:13.533210 USB3 port 3: enabled 0
741 15:40:13.533300 GENERIC: 0.0: enabled 1
742 15:40:13.536934 GENERIC: 1.0: enabled 1
743 15:40:13.539750 APIC: 01: enabled 1
744 15:40:13.539841 APIC: 05: enabled 1
745 15:40:13.543135 APIC: 03: enabled 1
746 15:40:13.546691 APIC: 07: enabled 1
747 15:40:13.546784 APIC: 06: enabled 1
748 15:40:13.550183 APIC: 04: enabled 1
749 15:40:13.553086 APIC: 02: enabled 1
750 15:40:13.553176 Compare with tree...
751 15:40:13.556385 Root Device: enabled 1
752 15:40:13.559691 DOMAIN: 0000: enabled 1
753 15:40:13.559790 PCI: 00:00.0: enabled 1
754 15:40:13.563065 PCI: 00:02.0: enabled 1
755 15:40:13.566379 PCI: 00:04.0: enabled 1
756 15:40:13.569749 GENERIC: 0.0: enabled 1
757 15:40:13.573001 PCI: 00:05.0: enabled 1
758 15:40:13.573106 PCI: 00:06.0: enabled 0
759 15:40:13.576714 PCI: 00:07.0: enabled 0
760 15:40:13.579935 GENERIC: 0.0: enabled 1
761 15:40:13.583457 PCI: 00:07.1: enabled 0
762 15:40:13.586339 GENERIC: 1.0: enabled 1
763 15:40:13.586436 PCI: 00:07.2: enabled 0
764 15:40:13.589912 GENERIC: 0.0: enabled 1
765 15:40:13.592833 PCI: 00:07.3: enabled 0
766 15:40:13.596187 GENERIC: 1.0: enabled 1
767 15:40:13.599540 PCI: 00:08.0: enabled 1
768 15:40:13.602692 PCI: 00:09.0: enabled 0
769 15:40:13.602786 PCI: 00:0a.0: enabled 0
770 15:40:13.606549 PCI: 00:0d.0: enabled 1
771 15:40:13.609824 USB0 port 0: enabled 1
772 15:40:13.612702 USB3 port 0: enabled 1
773 15:40:13.616458 USB3 port 1: enabled 1
774 15:40:13.616554 USB3 port 2: enabled 0
775 15:40:13.619485 USB3 port 3: enabled 0
776 15:40:13.623263 PCI: 00:0d.1: enabled 0
777 15:40:13.626100 PCI: 00:0d.2: enabled 0
778 15:40:13.629590 GENERIC: 0.0: enabled 1
779 15:40:13.629683 PCI: 00:0d.3: enabled 0
780 15:40:13.632905 PCI: 00:0e.0: enabled 0
781 15:40:13.635787 PCI: 00:10.2: enabled 1
782 15:40:13.639277 PCI: 00:10.6: enabled 0
783 15:40:13.642808 PCI: 00:10.7: enabled 0
784 15:40:13.642907 PCI: 00:12.0: enabled 0
785 15:40:13.646234 PCI: 00:12.6: enabled 0
786 15:40:13.649008 PCI: 00:13.0: enabled 0
787 15:40:13.652575 PCI: 00:14.0: enabled 1
788 15:40:13.655859 USB0 port 0: enabled 1
789 15:40:13.655951 USB2 port 0: enabled 0
790 15:40:13.659415 USB2 port 1: enabled 1
791 15:40:13.662732 USB2 port 2: enabled 1
792 15:40:13.666121 USB2 port 3: enabled 0
793 15:40:13.669407 USB2 port 4: enabled 1
794 15:40:13.672359 USB2 port 5: enabled 0
795 15:40:13.672451 USB2 port 6: enabled 0
796 15:40:13.675628 USB2 port 7: enabled 0
797 15:40:13.679053 USB2 port 8: enabled 0
798 15:40:13.682314 USB2 port 9: enabled 0
799 15:40:13.685658 USB3 port 0: enabled 0
800 15:40:13.688786 USB3 port 1: enabled 1
801 15:40:13.688882 USB3 port 2: enabled 0
802 15:40:13.692143 USB3 port 3: enabled 0
803 15:40:13.695396 PCI: 00:14.1: enabled 0
804 15:40:13.698726 PCI: 00:14.2: enabled 1
805 15:40:13.702028 PCI: 00:14.3: enabled 1
806 15:40:13.702123 GENERIC: 0.0: enabled 1
807 15:40:13.705424 PCI: 00:15.0: enabled 1
808 15:40:13.709083 I2C: 00:1a: enabled 1
809 15:40:13.712428 I2C: 00:31: enabled 1
810 15:40:13.715317 I2C: 00:32: enabled 1
811 15:40:13.715416 PCI: 00:15.1: enabled 1
812 15:40:13.718676 I2C: 00:10: enabled 1
813 15:40:13.722162 PCI: 00:15.2: enabled 1
814 15:40:13.725034 PCI: 00:15.3: enabled 1
815 15:40:13.728463 PCI: 00:16.0: enabled 1
816 15:40:13.728556 PCI: 00:16.1: enabled 0
817 15:40:13.731669 PCI: 00:16.2: enabled 0
818 15:40:13.735229 PCI: 00:16.3: enabled 0
819 15:40:13.738670 PCI: 00:16.4: enabled 0
820 15:40:13.738760 PCI: 00:16.5: enabled 0
821 15:40:13.741568 PCI: 00:17.0: enabled 1
822 15:40:13.744982 PCI: 00:19.0: enabled 0
823 15:40:13.748587 PCI: 00:19.1: enabled 1
824 15:40:13.751986 I2C: 00:15: enabled 1
825 15:40:13.752078 PCI: 00:19.2: enabled 0
826 15:40:13.755487 PCI: 00:1d.0: enabled 1
827 15:40:13.758261 GENERIC: 0.0: enabled 1
828 15:40:13.761732 PCI: 00:1e.0: enabled 1
829 15:40:13.765110 PCI: 00:1e.1: enabled 0
830 15:40:13.765201 PCI: 00:1e.2: enabled 1
831 15:40:13.768308 SPI: 00: enabled 1
832 15:40:13.771630 PCI: 00:1e.3: enabled 1
833 15:40:13.774914 SPI: 00: enabled 1
834 15:40:13.775006 PCI: 00:1f.0: enabled 1
835 15:40:13.778075 PNP: 0c09.0: enabled 1
836 15:40:13.781567 PCI: 00:1f.1: enabled 0
837 15:40:13.785082 PCI: 00:1f.2: enabled 1
838 15:40:13.788262 GENERIC: 0.0: enabled 1
839 15:40:13.788373 GENERIC: 0.0: enabled 1
840 15:40:13.791137 GENERIC: 1.0: enabled 1
841 15:40:13.794803 PCI: 00:1f.3: enabled 1
842 15:40:13.798008 PCI: 00:1f.4: enabled 0
843 15:40:13.801128 PCI: 00:1f.5: enabled 1
844 15:40:13.852935 PCI: 00:1f.6: enabled 0
845 15:40:13.853095 PCI: 00:1f.7: enabled 0
846 15:40:13.853185 CPU_CLUSTER: 0: enabled 1
847 15:40:13.853253 APIC: 00: enabled 1
848 15:40:13.853330 APIC: 01: enabled 1
849 15:40:13.853393 APIC: 05: enabled 1
850 15:40:13.853681 APIC: 03: enabled 1
851 15:40:13.853795 APIC: 07: enabled 1
852 15:40:13.853877 APIC: 06: enabled 1
853 15:40:13.853941 APIC: 04: enabled 1
854 15:40:13.854001 APIC: 02: enabled 1
855 15:40:13.854079 Root Device scanning...
856 15:40:13.854142 scan_static_bus for Root Device
857 15:40:13.854395 DOMAIN: 0000 enabled
858 15:40:13.854482 CPU_CLUSTER: 0 enabled
859 15:40:13.854544 DOMAIN: 0000 scanning...
860 15:40:13.854799 PCI: pci_scan_bus for bus 00
861 15:40:13.854899 PCI: 00:00.0 [8086/0000] ops
862 15:40:13.854962 PCI: 00:00.0 [8086/9a12] enabled
863 15:40:13.855036 PCI: 00:02.0 [8086/0000] bus ops
864 15:40:13.903513 PCI: 00:02.0 [8086/9a40] enabled
865 15:40:13.903711 PCI: 00:04.0 [8086/0000] bus ops
866 15:40:13.904037 PCI: 00:04.0 [8086/9a03] enabled
867 15:40:13.904128 PCI: 00:05.0 [8086/9a19] enabled
868 15:40:13.904226 PCI: 00:07.0 [0000/0000] hidden
869 15:40:13.904303 PCI: 00:08.0 [8086/9a11] enabled
870 15:40:13.904383 PCI: 00:0a.0 [8086/9a0d] disabled
871 15:40:13.904678 PCI: 00:0d.0 [8086/0000] bus ops
872 15:40:13.904805 PCI: 00:0d.0 [8086/9a13] enabled
873 15:40:13.904932 PCI: 00:14.0 [8086/0000] bus ops
874 15:40:13.905014 PCI: 00:14.0 [8086/a0ed] enabled
875 15:40:13.905266 PCI: 00:14.2 [8086/a0ef] enabled
876 15:40:13.905371 PCI: 00:14.3 [8086/0000] bus ops
877 15:40:13.905644 PCI: 00:14.3 [8086/a0f0] enabled
878 15:40:13.905740 PCI: 00:15.0 [8086/0000] bus ops
879 15:40:13.953171 PCI: 00:15.0 [8086/a0e8] enabled
880 15:40:13.953329 PCI: 00:15.1 [8086/0000] bus ops
881 15:40:13.953738 PCI: 00:15.1 [8086/a0e9] enabled
882 15:40:13.953813 PCI: 00:15.2 [8086/0000] bus ops
883 15:40:13.954070 PCI: 00:15.2 [8086/a0ea] enabled
884 15:40:13.954139 PCI: 00:15.3 [8086/0000] bus ops
885 15:40:13.954201 PCI: 00:15.3 [8086/a0eb] enabled
886 15:40:13.954273 PCI: 00:16.0 [8086/0000] ops
887 15:40:13.954521 PCI: 00:16.0 [8086/a0e0] enabled
888 15:40:13.954587 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 15:40:13.954647 PCI: 00:19.0 [8086/0000] bus ops
890 15:40:13.954890 PCI: 00:19.0 [8086/a0c5] disabled
891 15:40:13.954966 PCI: 00:19.1 [8086/0000] bus ops
892 15:40:13.955209 PCI: 00:19.1 [8086/a0c6] enabled
893 15:40:13.964757 PCI: 00:1d.0 [8086/0000] bus ops
894 15:40:13.964871 PCI: 00:1d.0 [8086/a0b0] enabled
895 15:40:13.967927 PCI: 00:1e.0 [8086/0000] ops
896 15:40:13.968086 PCI: 00:1e.0 [8086/a0a8] enabled
897 15:40:13.971144 PCI: 00:1e.2 [8086/0000] bus ops
898 15:40:13.971231 PCI: 00:1e.2 [8086/a0aa] enabled
899 15:40:13.974355 PCI: 00:1e.3 [8086/0000] bus ops
900 15:40:13.977702 PCI: 00:1e.3 [8086/a0ab] enabled
901 15:40:13.980806 PCI: 00:1f.0 [8086/0000] bus ops
902 15:40:13.984445 PCI: 00:1f.0 [8086/a087] enabled
903 15:40:13.987251 RTC Init
904 15:40:13.991146 Set power on after power failure.
905 15:40:13.991256 Disabling Deep S3
906 15:40:13.994072 Disabling Deep S3
907 15:40:13.994163 Disabling Deep S4
908 15:40:13.997252 Disabling Deep S4
909 15:40:14.000680 Disabling Deep S5
910 15:40:14.000786 Disabling Deep S5
911 15:40:14.004048 PCI: 00:1f.2 [0000/0000] hidden
912 15:40:14.007869 PCI: 00:1f.3 [8086/0000] bus ops
913 15:40:14.010558 PCI: 00:1f.3 [8086/a0c8] enabled
914 15:40:14.013958 PCI: 00:1f.5 [8086/0000] bus ops
915 15:40:14.017478 PCI: 00:1f.5 [8086/a0a4] enabled
916 15:40:14.020534 PCI: Leftover static devices:
917 15:40:14.020625 PCI: 00:10.2
918 15:40:14.024056 PCI: 00:10.6
919 15:40:14.024183 PCI: 00:10.7
920 15:40:14.027488 PCI: 00:06.0
921 15:40:14.027579 PCI: 00:07.1
922 15:40:14.030367 PCI: 00:07.2
923 15:40:14.030452 PCI: 00:07.3
924 15:40:14.030535 PCI: 00:09.0
925 15:40:14.033779 PCI: 00:0d.1
926 15:40:14.033864 PCI: 00:0d.2
927 15:40:14.037088 PCI: 00:0d.3
928 15:40:14.037166 PCI: 00:0e.0
929 15:40:14.037246 PCI: 00:12.0
930 15:40:14.040560 PCI: 00:12.6
931 15:40:14.040640 PCI: 00:13.0
932 15:40:14.043875 PCI: 00:14.1
933 15:40:14.043962 PCI: 00:16.1
934 15:40:14.044031 PCI: 00:16.2
935 15:40:14.047378 PCI: 00:16.3
936 15:40:14.047456 PCI: 00:16.4
937 15:40:14.050454 PCI: 00:16.5
938 15:40:14.050533 PCI: 00:17.0
939 15:40:14.053773 PCI: 00:19.2
940 15:40:14.053853 PCI: 00:1e.1
941 15:40:14.053917 PCI: 00:1f.1
942 15:40:14.057214 PCI: 00:1f.4
943 15:40:14.057324 PCI: 00:1f.6
944 15:40:14.060634 PCI: 00:1f.7
945 15:40:14.063471 PCI: Check your devicetree.cb.
946 15:40:14.063557 PCI: 00:02.0 scanning...
947 15:40:14.066969 scan_generic_bus for PCI: 00:02.0
948 15:40:14.073596 scan_generic_bus for PCI: 00:02.0 done
949 15:40:14.076833 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 15:40:14.080105 PCI: 00:04.0 scanning...
951 15:40:14.083275 scan_generic_bus for PCI: 00:04.0
952 15:40:14.086736 GENERIC: 0.0 enabled
953 15:40:14.090192 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 15:40:14.096732 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 15:40:14.100203 PCI: 00:0d.0 scanning...
956 15:40:14.103509 scan_static_bus for PCI: 00:0d.0
957 15:40:14.103597 USB0 port 0 enabled
958 15:40:14.106461 USB0 port 0 scanning...
959 15:40:14.109728 scan_static_bus for USB0 port 0
960 15:40:14.112985 USB3 port 0 enabled
961 15:40:14.113067 USB3 port 1 enabled
962 15:40:14.116404 USB3 port 2 disabled
963 15:40:14.119642 USB3 port 3 disabled
964 15:40:14.119749 USB3 port 0 scanning...
965 15:40:14.123104 scan_static_bus for USB3 port 0
966 15:40:14.129987 scan_static_bus for USB3 port 0 done
967 15:40:14.132953 scan_bus: bus USB3 port 0 finished in 6 msecs
968 15:40:14.136322 USB3 port 1 scanning...
969 15:40:14.139640 scan_static_bus for USB3 port 1
970 15:40:14.142936 scan_static_bus for USB3 port 1 done
971 15:40:14.146409 scan_bus: bus USB3 port 1 finished in 6 msecs
972 15:40:14.149988 scan_static_bus for USB0 port 0 done
973 15:40:14.156279 scan_bus: bus USB0 port 0 finished in 43 msecs
974 15:40:14.159619 scan_static_bus for PCI: 00:0d.0 done
975 15:40:14.163059 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 15:40:14.165947 PCI: 00:14.0 scanning...
977 15:40:14.169980 scan_static_bus for PCI: 00:14.0
978 15:40:14.173102 USB0 port 0 enabled
979 15:40:14.176383 USB0 port 0 scanning...
980 15:40:14.179460 scan_static_bus for USB0 port 0
981 15:40:14.179561 USB2 port 0 disabled
982 15:40:14.182634 USB2 port 1 enabled
983 15:40:14.182724 USB2 port 2 enabled
984 15:40:14.185916 USB2 port 3 disabled
985 15:40:14.189252 USB2 port 4 enabled
986 15:40:14.189339 USB2 port 5 disabled
987 15:40:14.192824 USB2 port 6 disabled
988 15:40:14.196169 USB2 port 7 disabled
989 15:40:14.196258 USB2 port 8 disabled
990 15:40:14.199228 USB2 port 9 disabled
991 15:40:14.202685 USB3 port 0 disabled
992 15:40:14.202774 USB3 port 1 enabled
993 15:40:14.206196 USB3 port 2 disabled
994 15:40:14.209437 USB3 port 3 disabled
995 15:40:14.209525 USB2 port 1 scanning...
996 15:40:14.212352 scan_static_bus for USB2 port 1
997 15:40:14.215516 scan_static_bus for USB2 port 1 done
998 15:40:14.222511 scan_bus: bus USB2 port 1 finished in 6 msecs
999 15:40:14.225603 USB2 port 2 scanning...
1000 15:40:14.229085 scan_static_bus for USB2 port 2
1001 15:40:14.232223 scan_static_bus for USB2 port 2 done
1002 15:40:14.235670 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 15:40:14.239245 USB2 port 4 scanning...
1004 15:40:14.242012 scan_static_bus for USB2 port 4
1005 15:40:14.245854 scan_static_bus for USB2 port 4 done
1006 15:40:14.248654 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 15:40:14.252192 USB3 port 1 scanning...
1008 15:40:14.255647 scan_static_bus for USB3 port 1
1009 15:40:14.258971 scan_static_bus for USB3 port 1 done
1010 15:40:14.265322 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 15:40:14.268739 scan_static_bus for USB0 port 0 done
1012 15:40:14.271969 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 15:40:14.275675 scan_static_bus for PCI: 00:14.0 done
1014 15:40:14.282020 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1015 15:40:14.285076 PCI: 00:14.3 scanning...
1016 15:40:14.288552 scan_static_bus for PCI: 00:14.3
1017 15:40:14.288645 GENERIC: 0.0 enabled
1018 15:40:14.295159 scan_static_bus for PCI: 00:14.3 done
1019 15:40:14.298769 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 15:40:14.301491 PCI: 00:15.0 scanning...
1021 15:40:14.304681 scan_static_bus for PCI: 00:15.0
1022 15:40:14.304772 I2C: 00:1a enabled
1023 15:40:14.308422 I2C: 00:31 enabled
1024 15:40:14.311408 I2C: 00:32 enabled
1025 15:40:14.315412 scan_static_bus for PCI: 00:15.0 done
1026 15:40:14.318470 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 15:40:14.321686 PCI: 00:15.1 scanning...
1028 15:40:14.325018 scan_static_bus for PCI: 00:15.1
1029 15:40:14.328265 I2C: 00:10 enabled
1030 15:40:14.331213 scan_static_bus for PCI: 00:15.1 done
1031 15:40:14.335063 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 15:40:14.337792 PCI: 00:15.2 scanning...
1033 15:40:14.341279 scan_static_bus for PCI: 00:15.2
1034 15:40:14.344703 scan_static_bus for PCI: 00:15.2 done
1035 15:40:14.351504 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 15:40:14.351618 PCI: 00:15.3 scanning...
1037 15:40:14.354786 scan_static_bus for PCI: 00:15.3
1038 15:40:14.361237 scan_static_bus for PCI: 00:15.3 done
1039 15:40:14.364280 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 15:40:14.367567 PCI: 00:19.1 scanning...
1041 15:40:14.370874 scan_static_bus for PCI: 00:19.1
1042 15:40:14.370963 I2C: 00:15 enabled
1043 15:40:14.377729 scan_static_bus for PCI: 00:19.1 done
1044 15:40:14.380989 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 15:40:14.384144 PCI: 00:1d.0 scanning...
1046 15:40:14.387383 do_pci_scan_bridge for PCI: 00:1d.0
1047 15:40:14.390656 PCI: pci_scan_bus for bus 01
1048 15:40:14.394043 PCI: 01:00.0 [15b7/5009] enabled
1049 15:40:14.397431 GENERIC: 0.0 enabled
1050 15:40:14.400851 Enabling Common Clock Configuration
1051 15:40:14.404229 L1 Sub-State supported from root port 29
1052 15:40:14.407590 L1 Sub-State Support = 0x5
1053 15:40:14.410745 CommonModeRestoreTime = 0x28
1054 15:40:14.414807 Power On Value = 0x16, Power On Scale = 0x0
1055 15:40:14.414905 ASPM: Enabled L1
1056 15:40:14.418074 PCIe: Max_Payload_Size adjusted to 128
1057 15:40:14.424715 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 15:40:14.427923 PCI: 00:1e.2 scanning...
1059 15:40:14.430943 scan_generic_bus for PCI: 00:1e.2
1060 15:40:14.431036 SPI: 00 enabled
1061 15:40:14.437886 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 15:40:14.444577 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 15:40:14.444702 PCI: 00:1e.3 scanning...
1064 15:40:14.447413 scan_generic_bus for PCI: 00:1e.3
1065 15:40:14.450685 SPI: 00 enabled
1066 15:40:14.457919 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 15:40:14.461104 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 15:40:14.463963 PCI: 00:1f.0 scanning...
1069 15:40:14.467385 scan_static_bus for PCI: 00:1f.0
1070 15:40:14.470838 PNP: 0c09.0 enabled
1071 15:40:14.470929 PNP: 0c09.0 scanning...
1072 15:40:14.474365 scan_static_bus for PNP: 0c09.0
1073 15:40:14.480908 scan_static_bus for PNP: 0c09.0 done
1074 15:40:14.484154 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 15:40:14.487806 scan_static_bus for PCI: 00:1f.0 done
1076 15:40:14.494304 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 15:40:14.494405 PCI: 00:1f.2 scanning...
1078 15:40:14.497665 scan_static_bus for PCI: 00:1f.2
1079 15:40:14.501114 GENERIC: 0.0 enabled
1080 15:40:14.504211 GENERIC: 0.0 scanning...
1081 15:40:14.507365 scan_static_bus for GENERIC: 0.0
1082 15:40:14.510741 GENERIC: 0.0 enabled
1083 15:40:14.510831 GENERIC: 1.0 enabled
1084 15:40:14.514116 scan_static_bus for GENERIC: 0.0 done
1085 15:40:14.520935 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 15:40:14.524431 scan_static_bus for PCI: 00:1f.2 done
1087 15:40:14.527324 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 15:40:14.530883 PCI: 00:1f.3 scanning...
1089 15:40:14.533864 scan_static_bus for PCI: 00:1f.3
1090 15:40:14.537190 scan_static_bus for PCI: 00:1f.3 done
1091 15:40:14.543557 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 15:40:14.546765 PCI: 00:1f.5 scanning...
1093 15:40:14.550406 scan_generic_bus for PCI: 00:1f.5
1094 15:40:14.553507 scan_generic_bus for PCI: 00:1f.5 done
1095 15:40:14.557065 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 15:40:14.563370 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1097 15:40:14.566995 scan_static_bus for Root Device done
1098 15:40:14.570264 scan_bus: bus Root Device finished in 736 msecs
1099 15:40:14.573156 done
1100 15:40:14.577055 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1101 15:40:14.580424 Chrome EC: UHEPI supported
1102 15:40:14.586896 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 15:40:14.593311 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 15:40:14.596918 SPI flash protection: WPSW=0 SRP0=1
1105 15:40:14.603653 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 15:40:14.606985 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 15:40:14.610333 found VGA at PCI: 00:02.0
1108 15:40:14.613279 Setting up VGA for PCI: 00:02.0
1109 15:40:14.619773 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 15:40:14.623785 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 15:40:14.626460 Allocating resources...
1112 15:40:14.629752 Reading resources...
1113 15:40:14.633540 Root Device read_resources bus 0 link: 0
1114 15:40:14.636410 DOMAIN: 0000 read_resources bus 0 link: 0
1115 15:40:14.643407 PCI: 00:04.0 read_resources bus 1 link: 0
1116 15:40:14.646639 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 15:40:14.652935 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 15:40:14.656254 USB0 port 0 read_resources bus 0 link: 0
1119 15:40:14.662568 USB0 port 0 read_resources bus 0 link: 0 done
1120 15:40:14.666076 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 15:40:14.672409 PCI: 00:14.0 read_resources bus 0 link: 0
1122 15:40:14.675758 USB0 port 0 read_resources bus 0 link: 0
1123 15:40:14.682344 USB0 port 0 read_resources bus 0 link: 0 done
1124 15:40:14.685872 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 15:40:14.692466 PCI: 00:14.3 read_resources bus 0 link: 0
1126 15:40:14.695712 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 15:40:14.699045 PCI: 00:15.0 read_resources bus 0 link: 0
1128 15:40:14.706472 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 15:40:14.709692 PCI: 00:15.1 read_resources bus 0 link: 0
1130 15:40:14.716594 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 15:40:14.720051 PCI: 00:19.1 read_resources bus 0 link: 0
1132 15:40:14.727009 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 15:40:14.730323 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 15:40:14.736905 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 15:40:14.739952 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 15:40:14.746684 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 15:40:14.749885 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 15:40:14.756710 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 15:40:14.760152 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 15:40:14.766654 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 15:40:14.770269 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 15:40:14.773164 GENERIC: 0.0 read_resources bus 0 link: 0
1143 15:40:14.780702 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 15:40:14.783372 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 15:40:14.790841 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 15:40:14.794043 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 15:40:14.800890 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 15:40:14.803625 Root Device read_resources bus 0 link: 0 done
1149 15:40:14.807125 Done reading resources.
1150 15:40:14.813802 Show resources in subtree (Root Device)...After reading.
1151 15:40:14.817255 Root Device child on link 0 DOMAIN: 0000
1152 15:40:14.820453 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 15:40:14.830635 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 15:40:14.840657 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 15:40:14.844266 PCI: 00:00.0
1156 15:40:14.853813 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 15:40:14.860621 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 15:40:14.870032 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 15:40:14.880325 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 15:40:14.890290 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 15:40:14.900326 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 15:40:14.909995 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 15:40:14.916676 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 15:40:14.926842 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 15:40:14.936345 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 15:40:14.946571 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 15:40:14.956212 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 15:40:14.962979 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 15:40:14.972862 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 15:40:14.983318 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 15:40:14.992905 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 15:40:15.002843 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 15:40:15.012939 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 15:40:15.022679 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 15:40:15.029169 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 15:40:15.032623 PCI: 00:02.0
1177 15:40:15.042712 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 15:40:15.052483 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 15:40:15.062405 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 15:40:15.065978 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 15:40:15.075600 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 15:40:15.079194 GENERIC: 0.0
1183 15:40:15.079285 PCI: 00:05.0
1184 15:40:15.088763 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 15:40:15.095632 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 15:40:15.095793 GENERIC: 0.0
1187 15:40:15.099003 PCI: 00:08.0
1188 15:40:15.108688 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 15:40:15.108787 PCI: 00:0a.0
1190 15:40:15.112144 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 15:40:15.121821 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 15:40:15.128608 USB0 port 0 child on link 0 USB3 port 0
1193 15:40:15.128697 USB3 port 0
1194 15:40:15.131757 USB3 port 1
1195 15:40:15.131842 USB3 port 2
1196 15:40:15.135294 USB3 port 3
1197 15:40:15.138886 PCI: 00:14.0 child on link 0 USB0 port 0
1198 15:40:15.148524 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 15:40:15.155050 USB0 port 0 child on link 0 USB2 port 0
1200 15:40:15.155144 USB2 port 0
1201 15:40:15.158504 USB2 port 1
1202 15:40:15.158590 USB2 port 2
1203 15:40:15.161970 USB2 port 3
1204 15:40:15.162056 USB2 port 4
1205 15:40:15.165374 USB2 port 5
1206 15:40:15.165459 USB2 port 6
1207 15:40:15.168266 USB2 port 7
1208 15:40:15.168350 USB2 port 8
1209 15:40:15.171695 USB2 port 9
1210 15:40:15.175279 USB3 port 0
1211 15:40:15.175363 USB3 port 1
1212 15:40:15.178139 USB3 port 2
1213 15:40:15.178224 USB3 port 3
1214 15:40:15.181673 PCI: 00:14.2
1215 15:40:15.191605 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 15:40:15.201406 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 15:40:15.204611 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 15:40:15.214817 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 15:40:15.218153 GENERIC: 0.0
1220 15:40:15.221614 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 15:40:15.231002 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:40:15.231097 I2C: 00:1a
1223 15:40:15.234468 I2C: 00:31
1224 15:40:15.234555 I2C: 00:32
1225 15:40:15.241253 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 15:40:15.251316 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 15:40:15.251423 I2C: 00:10
1228 15:40:15.254302 PCI: 00:15.2
1229 15:40:15.264397 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 15:40:15.264494 PCI: 00:15.3
1231 15:40:15.274886 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 15:40:15.277747 PCI: 00:16.0
1233 15:40:15.288016 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 15:40:15.288117 PCI: 00:19.0
1235 15:40:15.290760 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 15:40:15.300951 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 15:40:15.304101 I2C: 00:15
1238 15:40:15.307448 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 15:40:15.317496 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 15:40:15.327629 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 15:40:15.334207 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 15:40:15.337507 GENERIC: 0.0
1243 15:40:15.340664 PCI: 01:00.0
1244 15:40:15.350316 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 15:40:15.360398 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1246 15:40:15.360530 PCI: 00:1e.0
1247 15:40:15.370402 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 15:40:15.376734 PCI: 00:1e.2 child on link 0 SPI: 00
1249 15:40:15.386643 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 15:40:15.386741 SPI: 00
1251 15:40:15.390095 PCI: 00:1e.3 child on link 0 SPI: 00
1252 15:40:15.400331 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 15:40:15.403561 SPI: 00
1254 15:40:15.406869 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1255 15:40:15.416597 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1256 15:40:15.416697 PNP: 0c09.0
1257 15:40:15.426648 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1258 15:40:15.430001 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1259 15:40:15.440070 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1260 15:40:15.449496 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1261 15:40:15.452891 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1262 15:40:15.456250 GENERIC: 0.0
1263 15:40:15.456336 GENERIC: 1.0
1264 15:40:15.459802 PCI: 00:1f.3
1265 15:40:15.469332 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1266 15:40:15.479690 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1267 15:40:15.479817 PCI: 00:1f.5
1268 15:40:15.489080 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1269 15:40:15.492626 CPU_CLUSTER: 0 child on link 0 APIC: 00
1270 15:40:15.496058 APIC: 00
1271 15:40:15.496147 APIC: 01
1272 15:40:15.499388 APIC: 05
1273 15:40:15.499474 APIC: 03
1274 15:40:15.499554 APIC: 07
1275 15:40:15.502609 APIC: 06
1276 15:40:15.502695 APIC: 04
1277 15:40:15.505810 APIC: 02
1278 15:40:15.512296 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1279 15:40:15.519137 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1280 15:40:15.522372 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1281 15:40:15.528699 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1282 15:40:15.532102 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1283 15:40:15.538716 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1284 15:40:15.545808 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1285 15:40:15.551983 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1286 15:40:15.561772 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1287 15:40:15.568618 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1288 15:40:15.575157 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1289 15:40:15.582224 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 15:40:15.588429 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1291 15:40:15.595111 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1292 15:40:15.598726 DOMAIN: 0000: Resource ranges:
1293 15:40:15.601943 * Base: 1000, Size: 800, Tag: 100
1294 15:40:15.608391 * Base: 1900, Size: e700, Tag: 100
1295 15:40:15.611598 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1296 15:40:15.618283 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1297 15:40:15.624492 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1298 15:40:15.634730 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1299 15:40:15.641471 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1300 15:40:15.647932 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1301 15:40:15.658111 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1302 15:40:15.664426 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1303 15:40:15.671194 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1304 15:40:15.681024 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1305 15:40:15.687529 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1306 15:40:15.694334 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1307 15:40:15.704610 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1308 15:40:15.710756 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1309 15:40:15.717398 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1310 15:40:15.727147 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1311 15:40:15.733909 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1312 15:40:15.740676 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1313 15:40:15.750668 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1314 15:40:15.756898 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1315 15:40:15.763894 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1316 15:40:15.773780 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1317 15:40:15.779977 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1318 15:40:15.786787 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1319 15:40:15.796580 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1320 15:40:15.800025 DOMAIN: 0000: Resource ranges:
1321 15:40:15.803623 * Base: 7fc00000, Size: 40400000, Tag: 200
1322 15:40:15.806777 * Base: d0000000, Size: 28000000, Tag: 200
1323 15:40:15.810211 * Base: fa000000, Size: 1000000, Tag: 200
1324 15:40:15.816649 * Base: fb001000, Size: 2fff000, Tag: 200
1325 15:40:15.819904 * Base: fe010000, Size: 2e000, Tag: 200
1326 15:40:15.823356 * Base: fe03f000, Size: d41000, Tag: 200
1327 15:40:15.829992 * Base: fed88000, Size: 8000, Tag: 200
1328 15:40:15.833374 * Base: fed93000, Size: d000, Tag: 200
1329 15:40:15.836189 * Base: feda2000, Size: 1e000, Tag: 200
1330 15:40:15.839837 * Base: fede0000, Size: 1220000, Tag: 200
1331 15:40:15.846418 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1332 15:40:15.852819 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1333 15:40:15.859395 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1334 15:40:15.866233 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1335 15:40:15.872994 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1336 15:40:15.879379 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1337 15:40:15.886274 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1338 15:40:15.892579 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1339 15:40:15.899486 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1340 15:40:15.905878 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1341 15:40:15.912472 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1342 15:40:15.919321 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1343 15:40:15.925382 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 15:40:15.932150 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1345 15:40:15.938876 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1346 15:40:15.945658 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1347 15:40:15.951886 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1348 15:40:15.958991 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1349 15:40:15.965412 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1350 15:40:15.971850 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1351 15:40:15.978636 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1352 15:40:15.985212 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1353 15:40:15.991494 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1354 15:40:15.998449 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1355 15:40:16.008092 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1356 15:40:16.011590 PCI: 00:1d.0: Resource ranges:
1357 15:40:16.014996 * Base: 7fc00000, Size: 100000, Tag: 200
1358 15:40:16.021408 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1359 15:40:16.028065 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1360 15:40:16.034703 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1361 15:40:16.044555 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1362 15:40:16.048268 Root Device assign_resources, bus 0 link: 0
1363 15:40:16.051575 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 15:40:16.061249 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1365 15:40:16.067970 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1366 15:40:16.077614 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1367 15:40:16.084442 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1368 15:40:16.090900 PCI: 00:04.0 assign_resources, bus 1 link: 0
1369 15:40:16.094454 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 15:40:16.104160 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1371 15:40:16.110753 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1372 15:40:16.120470 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1373 15:40:16.123709 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1374 15:40:16.127260 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 15:40:16.137391 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1376 15:40:16.140808 PCI: 00:14.0 assign_resources, bus 0 link: 0
1377 15:40:16.147109 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 15:40:16.153872 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1379 15:40:16.160628 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1380 15:40:16.170501 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1381 15:40:16.173954 PCI: 00:14.3 assign_resources, bus 0 link: 0
1382 15:40:16.180685 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 15:40:16.186877 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1384 15:40:16.193328 PCI: 00:15.0 assign_resources, bus 0 link: 0
1385 15:40:16.196791 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 15:40:16.203737 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1387 15:40:16.210163 PCI: 00:15.1 assign_resources, bus 0 link: 0
1388 15:40:16.213435 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 15:40:16.223336 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1390 15:40:16.229933 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1391 15:40:16.239432 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1392 15:40:16.246243 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1393 15:40:16.252694 PCI: 00:19.1 assign_resources, bus 0 link: 0
1394 15:40:16.256053 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 15:40:16.266010 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1396 15:40:16.275657 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1397 15:40:16.282521 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1398 15:40:16.289506 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 15:40:16.295621 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1400 15:40:16.305626 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1401 15:40:16.309064 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 15:40:16.318633 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1403 15:40:16.321841 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1404 15:40:16.325370 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1405 15:40:16.335580 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1406 15:40:16.338832 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1407 15:40:16.345436 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1408 15:40:16.348828 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1409 15:40:16.355377 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1410 15:40:16.358727 LPC: Trying to open IO window from 800 size 1ff
1411 15:40:16.368477 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1412 15:40:16.375007 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1413 15:40:16.382007 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1414 15:40:16.388174 DOMAIN: 0000 assign_resources, bus 0 link: 0
1415 15:40:16.391349 Root Device assign_resources, bus 0 link: 0
1416 15:40:16.394900 Done setting resources.
1417 15:40:16.401801 Show resources in subtree (Root Device)...After assigning values.
1418 15:40:16.404785 Root Device child on link 0 DOMAIN: 0000
1419 15:40:16.411672 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1420 15:40:16.417946 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1421 15:40:16.427849 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1422 15:40:16.431281 PCI: 00:00.0
1423 15:40:16.441511 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1424 15:40:16.450987 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1425 15:40:16.457733 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1426 15:40:16.467725 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1427 15:40:16.477792 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1428 15:40:16.487565 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1429 15:40:16.497348 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1430 15:40:16.507151 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1431 15:40:16.514107 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1432 15:40:16.524349 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1433 15:40:16.533724 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1434 15:40:16.543972 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1435 15:40:16.553619 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1436 15:40:16.560116 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1437 15:40:16.570618 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1438 15:40:16.580079 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1439 15:40:16.589813 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1440 15:40:16.600191 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1441 15:40:16.609876 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1442 15:40:16.619648 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1443 15:40:16.619799 PCI: 00:02.0
1444 15:40:16.629708 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1445 15:40:16.642843 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1446 15:40:16.649491 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1447 15:40:16.656302 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1448 15:40:16.666559 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1449 15:40:16.666689 GENERIC: 0.0
1450 15:40:16.669691 PCI: 00:05.0
1451 15:40:16.679231 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1452 15:40:16.686235 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1453 15:40:16.686334 GENERIC: 0.0
1454 15:40:16.689571 PCI: 00:08.0
1455 15:40:16.699112 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1456 15:40:16.699205 PCI: 00:0a.0
1457 15:40:16.705974 PCI: 00:0d.0 child on link 0 USB0 port 0
1458 15:40:16.715702 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1459 15:40:16.719010 USB0 port 0 child on link 0 USB3 port 0
1460 15:40:16.722468 USB3 port 0
1461 15:40:16.722582 USB3 port 1
1462 15:40:16.725750 USB3 port 2
1463 15:40:16.725849 USB3 port 3
1464 15:40:16.731996 PCI: 00:14.0 child on link 0 USB0 port 0
1465 15:40:16.742177 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1466 15:40:16.745648 USB0 port 0 child on link 0 USB2 port 0
1467 15:40:16.748859 USB2 port 0
1468 15:40:16.748949 USB2 port 1
1469 15:40:16.751683 USB2 port 2
1470 15:40:16.751803 USB2 port 3
1471 15:40:16.755133 USB2 port 4
1472 15:40:16.755235 USB2 port 5
1473 15:40:16.758418 USB2 port 6
1474 15:40:16.758494 USB2 port 7
1475 15:40:16.761877 USB2 port 8
1476 15:40:16.761964 USB2 port 9
1477 15:40:16.765096 USB3 port 0
1478 15:40:16.765182 USB3 port 1
1479 15:40:16.768581 USB3 port 2
1480 15:40:16.768668 USB3 port 3
1481 15:40:16.771924 PCI: 00:14.2
1482 15:40:16.781746 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1483 15:40:16.791680 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1484 15:40:16.798584 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1485 15:40:16.808492 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1486 15:40:16.808591 GENERIC: 0.0
1487 15:40:16.814888 PCI: 00:15.0 child on link 0 I2C: 00:1a
1488 15:40:16.824850 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1489 15:40:16.824943 I2C: 00:1a
1490 15:40:16.828276 I2C: 00:31
1491 15:40:16.828364 I2C: 00:32
1492 15:40:16.831237 PCI: 00:15.1 child on link 0 I2C: 00:10
1493 15:40:16.844761 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1494 15:40:16.844865 I2C: 00:10
1495 15:40:16.844934 PCI: 00:15.2
1496 15:40:16.858104 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1497 15:40:16.858219 PCI: 00:15.3
1498 15:40:16.867919 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1499 15:40:16.871233 PCI: 00:16.0
1500 15:40:16.881158 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1501 15:40:16.881266 PCI: 00:19.0
1502 15:40:16.887785 PCI: 00:19.1 child on link 0 I2C: 00:15
1503 15:40:16.897699 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1504 15:40:16.897830 I2C: 00:15
1505 15:40:16.904446 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1506 15:40:16.910685 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1507 15:40:16.923945 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1508 15:40:16.934263 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1509 15:40:16.937296 GENERIC: 0.0
1510 15:40:16.937427 PCI: 01:00.0
1511 15:40:16.947079 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1512 15:40:16.957514 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1513 15:40:16.960851 PCI: 00:1e.0
1514 15:40:16.970481 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 15:40:16.973747 PCI: 00:1e.2 child on link 0 SPI: 00
1516 15:40:16.987595 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 15:40:16.987731 SPI: 00
1518 15:40:16.990606 PCI: 00:1e.3 child on link 0 SPI: 00
1519 15:40:17.000433 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 15:40:17.003664 SPI: 00
1521 15:40:17.006675 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 15:40:17.016667 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 15:40:17.016798 PNP: 0c09.0
1524 15:40:17.026461 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 15:40:17.029606 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 15:40:17.039596 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 15:40:17.049584 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 15:40:17.052834 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 15:40:17.056312 GENERIC: 0.0
1530 15:40:17.056404 GENERIC: 1.0
1531 15:40:17.059737 PCI: 00:1f.3
1532 15:40:17.069813 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 15:40:17.079601 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 15:40:17.082922 PCI: 00:1f.5
1535 15:40:17.092474 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1536 15:40:17.095982 CPU_CLUSTER: 0 child on link 0 APIC: 00
1537 15:40:17.096121 APIC: 00
1538 15:40:17.099194 APIC: 01
1539 15:40:17.099281 APIC: 05
1540 15:40:17.102661 APIC: 03
1541 15:40:17.102747 APIC: 07
1542 15:40:17.102812 APIC: 06
1543 15:40:17.105884 APIC: 04
1544 15:40:17.105969 APIC: 02
1545 15:40:17.109432 Done allocating resources.
1546 15:40:17.115945 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1547 15:40:17.122282 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1548 15:40:17.125533 Configure GPIOs for I2S audio on UP4.
1549 15:40:17.132471 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1550 15:40:17.135804 Enabling resources...
1551 15:40:17.139204 PCI: 00:00.0 subsystem <- 8086/9a12
1552 15:40:17.141886 PCI: 00:00.0 cmd <- 06
1553 15:40:17.145448 PCI: 00:02.0 subsystem <- 8086/9a40
1554 15:40:17.145534 PCI: 00:02.0 cmd <- 03
1555 15:40:17.152040 PCI: 00:04.0 subsystem <- 8086/9a03
1556 15:40:17.152132 PCI: 00:04.0 cmd <- 02
1557 15:40:17.155303 PCI: 00:05.0 subsystem <- 8086/9a19
1558 15:40:17.158819 PCI: 00:05.0 cmd <- 02
1559 15:40:17.162183 PCI: 00:08.0 subsystem <- 8086/9a11
1560 15:40:17.164948 PCI: 00:08.0 cmd <- 06
1561 15:40:17.168194 PCI: 00:0d.0 subsystem <- 8086/9a13
1562 15:40:17.172106 PCI: 00:0d.0 cmd <- 02
1563 15:40:17.175184 PCI: 00:14.0 subsystem <- 8086/a0ed
1564 15:40:17.178490 PCI: 00:14.0 cmd <- 02
1565 15:40:17.181816 PCI: 00:14.2 subsystem <- 8086/a0ef
1566 15:40:17.185335 PCI: 00:14.2 cmd <- 02
1567 15:40:17.188117 PCI: 00:14.3 subsystem <- 8086/a0f0
1568 15:40:17.191518 PCI: 00:14.3 cmd <- 02
1569 15:40:17.195102 PCI: 00:15.0 subsystem <- 8086/a0e8
1570 15:40:17.195188 PCI: 00:15.0 cmd <- 02
1571 15:40:17.201904 PCI: 00:15.1 subsystem <- 8086/a0e9
1572 15:40:17.201986 PCI: 00:15.1 cmd <- 02
1573 15:40:17.204763 PCI: 00:15.2 subsystem <- 8086/a0ea
1574 15:40:17.207988 PCI: 00:15.2 cmd <- 02
1575 15:40:17.211461 PCI: 00:15.3 subsystem <- 8086/a0eb
1576 15:40:17.214993 PCI: 00:15.3 cmd <- 02
1577 15:40:17.217791 PCI: 00:16.0 subsystem <- 8086/a0e0
1578 15:40:17.221260 PCI: 00:16.0 cmd <- 02
1579 15:40:17.224750 PCI: 00:19.1 subsystem <- 8086/a0c6
1580 15:40:17.228125 PCI: 00:19.1 cmd <- 02
1581 15:40:17.231047 PCI: 00:1d.0 bridge ctrl <- 0013
1582 15:40:17.234581 PCI: 00:1d.0 subsystem <- 8086/a0b0
1583 15:40:17.237655 PCI: 00:1d.0 cmd <- 06
1584 15:40:17.241061 PCI: 00:1e.0 subsystem <- 8086/a0a8
1585 15:40:17.244686 PCI: 00:1e.0 cmd <- 06
1586 15:40:17.247666 PCI: 00:1e.2 subsystem <- 8086/a0aa
1587 15:40:17.247851 PCI: 00:1e.2 cmd <- 06
1588 15:40:17.254649 PCI: 00:1e.3 subsystem <- 8086/a0ab
1589 15:40:17.254737 PCI: 00:1e.3 cmd <- 02
1590 15:40:17.258002 PCI: 00:1f.0 subsystem <- 8086/a087
1591 15:40:17.261307 PCI: 00:1f.0 cmd <- 407
1592 15:40:17.264832 PCI: 00:1f.3 subsystem <- 8086/a0c8
1593 15:40:17.267612 PCI: 00:1f.3 cmd <- 02
1594 15:40:17.270956 PCI: 00:1f.5 subsystem <- 8086/a0a4
1595 15:40:17.274361 PCI: 00:1f.5 cmd <- 406
1596 15:40:17.278222 PCI: 01:00.0 cmd <- 02
1597 15:40:17.283218 done.
1598 15:40:17.286538 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1599 15:40:17.289322 Initializing devices...
1600 15:40:17.292783 Root Device init
1601 15:40:17.295978 Chrome EC: Set SMI mask to 0x0000000000000000
1602 15:40:17.302895 Chrome EC: clear events_b mask to 0x0000000000000000
1603 15:40:17.309606 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1604 15:40:17.316018 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1605 15:40:17.323064 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1606 15:40:17.325915 Chrome EC: Set WAKE mask to 0x0000000000000000
1607 15:40:17.333514 fw_config match found: DB_USB=USB3_ACTIVE
1608 15:40:17.336792 Configure Right Type-C port orientation for retimer
1609 15:40:17.340121 Root Device init finished in 45 msecs
1610 15:40:17.344152 PCI: 00:00.0 init
1611 15:40:17.347311 CPU TDP = 9 Watts
1612 15:40:17.347398 CPU PL1 = 9 Watts
1613 15:40:17.350740 CPU PL2 = 40 Watts
1614 15:40:17.354110 CPU PL4 = 83 Watts
1615 15:40:17.357492 PCI: 00:00.0 init finished in 8 msecs
1616 15:40:17.357597 PCI: 00:02.0 init
1617 15:40:17.360865 GMA: Found VBT in CBFS
1618 15:40:17.364155 GMA: Found valid VBT in CBFS
1619 15:40:17.370659 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1620 15:40:17.377177 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1621 15:40:17.380732 PCI: 00:02.0 init finished in 18 msecs
1622 15:40:17.383729 PCI: 00:05.0 init
1623 15:40:17.387287 PCI: 00:05.0 init finished in 0 msecs
1624 15:40:17.390382 PCI: 00:08.0 init
1625 15:40:17.394027 PCI: 00:08.0 init finished in 0 msecs
1626 15:40:17.397363 PCI: 00:14.0 init
1627 15:40:17.400294 PCI: 00:14.0 init finished in 0 msecs
1628 15:40:17.403645 PCI: 00:14.2 init
1629 15:40:17.407149 PCI: 00:14.2 init finished in 0 msecs
1630 15:40:17.410387 PCI: 00:15.0 init
1631 15:40:17.413879 I2C bus 0 version 0x3230302a
1632 15:40:17.416854 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1633 15:40:17.420075 PCI: 00:15.0 init finished in 6 msecs
1634 15:40:17.420163 PCI: 00:15.1 init
1635 15:40:17.423484 I2C bus 1 version 0x3230302a
1636 15:40:17.426515 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 15:40:17.433598 PCI: 00:15.1 init finished in 6 msecs
1638 15:40:17.433689 PCI: 00:15.2 init
1639 15:40:17.436798 I2C bus 2 version 0x3230302a
1640 15:40:17.440241 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1641 15:40:17.443172 PCI: 00:15.2 init finished in 6 msecs
1642 15:40:17.446488 PCI: 00:15.3 init
1643 15:40:17.450045 I2C bus 3 version 0x3230302a
1644 15:40:17.453555 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1645 15:40:17.456339 PCI: 00:15.3 init finished in 6 msecs
1646 15:40:17.459634 PCI: 00:16.0 init
1647 15:40:17.463228 PCI: 00:16.0 init finished in 0 msecs
1648 15:40:17.466358 PCI: 00:19.1 init
1649 15:40:17.469819 I2C bus 5 version 0x3230302a
1650 15:40:17.473375 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1651 15:40:17.476185 PCI: 00:19.1 init finished in 6 msecs
1652 15:40:17.479761 PCI: 00:1d.0 init
1653 15:40:17.482697 Initializing PCH PCIe bridge.
1654 15:40:17.486523 PCI: 00:1d.0 init finished in 3 msecs
1655 15:40:17.489489 PCI: 00:1f.0 init
1656 15:40:17.492744 IOAPIC: Initializing IOAPIC at 0xfec00000
1657 15:40:17.496365 IOAPIC: Bootstrap Processor Local APIC = 0x00
1658 15:40:17.499232 IOAPIC: ID = 0x02
1659 15:40:17.502668 IOAPIC: Dumping registers
1660 15:40:17.502750 reg 0x0000: 0x02000000
1661 15:40:17.505973 reg 0x0001: 0x00770020
1662 15:40:17.509397 reg 0x0002: 0x00000000
1663 15:40:17.512702 PCI: 00:1f.0 init finished in 21 msecs
1664 15:40:17.516208 PCI: 00:1f.2 init
1665 15:40:17.519690 Disabling ACPI via APMC.
1666 15:40:17.522763 APMC done.
1667 15:40:17.526224 PCI: 00:1f.2 init finished in 6 msecs
1668 15:40:17.537487 PCI: 01:00.0 init
1669 15:40:17.540872 PCI: 01:00.0 init finished in 0 msecs
1670 15:40:17.544350 PNP: 0c09.0 init
1671 15:40:17.547585 Google Chrome EC uptime: 8.311 seconds
1672 15:40:17.554204 Google Chrome AP resets since EC boot: 1
1673 15:40:17.557184 Google Chrome most recent AP reset causes:
1674 15:40:17.560589 0.455: 32775 shutdown: entering G3
1675 15:40:17.567197 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1676 15:40:17.570715 PNP: 0c09.0 init finished in 22 msecs
1677 15:40:17.576329 Devices initialized
1678 15:40:17.579718 Show all devs... After init.
1679 15:40:17.583226 Root Device: enabled 1
1680 15:40:17.583315 DOMAIN: 0000: enabled 1
1681 15:40:17.586454 CPU_CLUSTER: 0: enabled 1
1682 15:40:17.589756 PCI: 00:00.0: enabled 1
1683 15:40:17.593031 PCI: 00:02.0: enabled 1
1684 15:40:17.593120 PCI: 00:04.0: enabled 1
1685 15:40:17.596319 PCI: 00:05.0: enabled 1
1686 15:40:17.599302 PCI: 00:06.0: enabled 0
1687 15:40:17.603208 PCI: 00:07.0: enabled 0
1688 15:40:17.603298 PCI: 00:07.1: enabled 0
1689 15:40:17.605907 PCI: 00:07.2: enabled 0
1690 15:40:17.609853 PCI: 00:07.3: enabled 0
1691 15:40:17.612628 PCI: 00:08.0: enabled 1
1692 15:40:17.612715 PCI: 00:09.0: enabled 0
1693 15:40:17.615962 PCI: 00:0a.0: enabled 0
1694 15:40:17.619371 PCI: 00:0d.0: enabled 1
1695 15:40:17.623271 PCI: 00:0d.1: enabled 0
1696 15:40:17.623353 PCI: 00:0d.2: enabled 0
1697 15:40:17.626510 PCI: 00:0d.3: enabled 0
1698 15:40:17.629347 PCI: 00:0e.0: enabled 0
1699 15:40:17.629435 PCI: 00:10.2: enabled 1
1700 15:40:17.632934 PCI: 00:10.6: enabled 0
1701 15:40:17.636279 PCI: 00:10.7: enabled 0
1702 15:40:17.639715 PCI: 00:12.0: enabled 0
1703 15:40:17.639805 PCI: 00:12.6: enabled 0
1704 15:40:17.642431 PCI: 00:13.0: enabled 0
1705 15:40:17.646119 PCI: 00:14.0: enabled 1
1706 15:40:17.649568 PCI: 00:14.1: enabled 0
1707 15:40:17.649660 PCI: 00:14.2: enabled 1
1708 15:40:17.653060 PCI: 00:14.3: enabled 1
1709 15:40:17.655643 PCI: 00:15.0: enabled 1
1710 15:40:17.659085 PCI: 00:15.1: enabled 1
1711 15:40:17.659173 PCI: 00:15.2: enabled 1
1712 15:40:17.662589 PCI: 00:15.3: enabled 1
1713 15:40:17.666049 PCI: 00:16.0: enabled 1
1714 15:40:17.669307 PCI: 00:16.1: enabled 0
1715 15:40:17.669399 PCI: 00:16.2: enabled 0
1716 15:40:17.672702 PCI: 00:16.3: enabled 0
1717 15:40:17.675525 PCI: 00:16.4: enabled 0
1718 15:40:17.675612 PCI: 00:16.5: enabled 0
1719 15:40:17.679081 PCI: 00:17.0: enabled 0
1720 15:40:17.682371 PCI: 00:19.0: enabled 0
1721 15:40:17.685656 PCI: 00:19.1: enabled 1
1722 15:40:17.685736 PCI: 00:19.2: enabled 0
1723 15:40:17.688902 PCI: 00:1c.0: enabled 1
1724 15:40:17.692372 PCI: 00:1c.1: enabled 0
1725 15:40:17.695632 PCI: 00:1c.2: enabled 0
1726 15:40:17.695720 PCI: 00:1c.3: enabled 0
1727 15:40:17.699033 PCI: 00:1c.4: enabled 0
1728 15:40:17.702047 PCI: 00:1c.5: enabled 0
1729 15:40:17.705359 PCI: 00:1c.6: enabled 1
1730 15:40:17.705462 PCI: 00:1c.7: enabled 0
1731 15:40:17.708932 PCI: 00:1d.0: enabled 1
1732 15:40:17.712243 PCI: 00:1d.1: enabled 0
1733 15:40:17.715635 PCI: 00:1d.2: enabled 1
1734 15:40:17.715755 PCI: 00:1d.3: enabled 0
1735 15:40:17.719361 PCI: 00:1e.0: enabled 1
1736 15:40:17.722144 PCI: 00:1e.1: enabled 0
1737 15:40:17.722255 PCI: 00:1e.2: enabled 1
1738 15:40:17.725496 PCI: 00:1e.3: enabled 1
1739 15:40:17.728954 PCI: 00:1f.0: enabled 1
1740 15:40:17.732477 PCI: 00:1f.1: enabled 0
1741 15:40:17.732569 PCI: 00:1f.2: enabled 1
1742 15:40:17.735181 PCI: 00:1f.3: enabled 1
1743 15:40:17.738636 PCI: 00:1f.4: enabled 0
1744 15:40:17.741649 PCI: 00:1f.5: enabled 1
1745 15:40:17.741728 PCI: 00:1f.6: enabled 0
1746 15:40:17.745030 PCI: 00:1f.7: enabled 0
1747 15:40:17.748450 APIC: 00: enabled 1
1748 15:40:17.751668 GENERIC: 0.0: enabled 1
1749 15:40:17.751788 GENERIC: 0.0: enabled 1
1750 15:40:17.755135 GENERIC: 1.0: enabled 1
1751 15:40:17.758249 GENERIC: 0.0: enabled 1
1752 15:40:17.758329 GENERIC: 1.0: enabled 1
1753 15:40:17.761694 USB0 port 0: enabled 1
1754 15:40:17.765182 GENERIC: 0.0: enabled 1
1755 15:40:17.768473 USB0 port 0: enabled 1
1756 15:40:17.768559 GENERIC: 0.0: enabled 1
1757 15:40:17.772015 I2C: 00:1a: enabled 1
1758 15:40:17.774847 I2C: 00:31: enabled 1
1759 15:40:17.774932 I2C: 00:32: enabled 1
1760 15:40:17.778116 I2C: 00:10: enabled 1
1761 15:40:17.781605 I2C: 00:15: enabled 1
1762 15:40:17.781705 GENERIC: 0.0: enabled 0
1763 15:40:17.785190 GENERIC: 1.0: enabled 0
1764 15:40:17.788750 GENERIC: 0.0: enabled 1
1765 15:40:17.791665 SPI: 00: enabled 1
1766 15:40:17.791789 SPI: 00: enabled 1
1767 15:40:17.795252 PNP: 0c09.0: enabled 1
1768 15:40:17.798107 GENERIC: 0.0: enabled 1
1769 15:40:17.798192 USB3 port 0: enabled 1
1770 15:40:17.801562 USB3 port 1: enabled 1
1771 15:40:17.804883 USB3 port 2: enabled 0
1772 15:40:17.804992 USB3 port 3: enabled 0
1773 15:40:17.807855 USB2 port 0: enabled 0
1774 15:40:17.811185 USB2 port 1: enabled 1
1775 15:40:17.814447 USB2 port 2: enabled 1
1776 15:40:17.814532 USB2 port 3: enabled 0
1777 15:40:17.817729 USB2 port 4: enabled 1
1778 15:40:17.821107 USB2 port 5: enabled 0
1779 15:40:17.821192 USB2 port 6: enabled 0
1780 15:40:17.824782 USB2 port 7: enabled 0
1781 15:40:17.828037 USB2 port 8: enabled 0
1782 15:40:17.830989 USB2 port 9: enabled 0
1783 15:40:17.831074 USB3 port 0: enabled 0
1784 15:40:17.834549 USB3 port 1: enabled 1
1785 15:40:17.837851 USB3 port 2: enabled 0
1786 15:40:17.837937 USB3 port 3: enabled 0
1787 15:40:17.841495 GENERIC: 0.0: enabled 1
1788 15:40:17.844685 GENERIC: 1.0: enabled 1
1789 15:40:17.844773 APIC: 01: enabled 1
1790 15:40:17.847997 APIC: 05: enabled 1
1791 15:40:17.850936 APIC: 03: enabled 1
1792 15:40:17.851023 APIC: 07: enabled 1
1793 15:40:17.854216 APIC: 06: enabled 1
1794 15:40:17.857761 APIC: 04: enabled 1
1795 15:40:17.857847 APIC: 02: enabled 1
1796 15:40:17.860826 PCI: 01:00.0: enabled 1
1797 15:40:17.867630 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1798 15:40:17.871018 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1799 15:40:17.873857 ELOG: NV offset 0xf30000 size 0x1000
1800 15:40:17.881981 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1801 15:40:17.887902 ELOG: Event(17) added with size 13 at 2022-09-30 15:38:28 UTC
1802 15:40:17.894621 ELOG: Event(92) added with size 9 at 2022-09-30 15:38:28 UTC
1803 15:40:17.901259 ELOG: Event(93) added with size 9 at 2022-09-30 15:38:28 UTC
1804 15:40:17.908173 ELOG: Event(9E) added with size 10 at 2022-09-30 15:38:28 UTC
1805 15:40:17.914717 ELOG: Event(9F) added with size 14 at 2022-09-30 15:38:28 UTC
1806 15:40:17.920868 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1807 15:40:17.928023 ELOG: Event(A1) added with size 10 at 2022-09-30 15:38:28 UTC
1808 15:40:17.934347 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1809 15:40:17.940668 ELOG: Event(A0) added with size 9 at 2022-09-30 15:38:28 UTC
1810 15:40:17.943999 elog_add_boot_reason: Logged dev mode boot
1811 15:40:17.951084 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1812 15:40:17.951185 Finalize devices...
1813 15:40:17.953812 Devices finalized
1814 15:40:17.960499 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 15:40:17.963897 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 15:40:17.970845 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 15:40:17.974132 ME: HFSTS1 : 0x80030055
1818 15:40:17.980882 ME: HFSTS2 : 0x30280116
1819 15:40:17.983621 ME: HFSTS3 : 0x00000050
1820 15:40:17.987127 ME: HFSTS4 : 0x00004000
1821 15:40:17.993546 ME: HFSTS5 : 0x00000000
1822 15:40:17.997080 ME: HFSTS6 : 0x40400006
1823 15:40:18.000765 ME: Manufacturing Mode : YES
1824 15:40:18.003623 ME: SPI Protection Mode Enabled : NO
1825 15:40:18.010603 ME: FW Partition Table : OK
1826 15:40:18.013572 ME: Bringup Loader Failure : NO
1827 15:40:18.017092 ME: Firmware Init Complete : NO
1828 15:40:18.020512 ME: Boot Options Present : NO
1829 15:40:18.023602 ME: Update In Progress : NO
1830 15:40:18.027062 ME: D0i3 Support : YES
1831 15:40:18.030594 ME: Low Power State Enabled : NO
1832 15:40:18.033830 ME: CPU Replaced : YES
1833 15:40:18.040338 ME: CPU Replacement Valid : YES
1834 15:40:18.043669 ME: Current Working State : 5
1835 15:40:18.046824 ME: Current Operation State : 1
1836 15:40:18.050485 ME: Current Operation Mode : 3
1837 15:40:18.053362 ME: Error Code : 0
1838 15:40:18.056739 ME: Enhanced Debug Mode : NO
1839 15:40:18.060146 ME: CPU Debug Disabled : YES
1840 15:40:18.063460 ME: TXT Support : NO
1841 15:40:18.070263 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 15:40:18.076457 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 15:40:18.079918 CBFS: 'fallback/slic' not found.
1844 15:40:18.086599 ACPI: Writing ACPI tables at 76b01000.
1845 15:40:18.086698 ACPI: * FACS
1846 15:40:18.090070 ACPI: * DSDT
1847 15:40:18.093276 Ramoops buffer: 0x100000@0x76a00000.
1848 15:40:18.096585 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 15:40:18.103030 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 15:40:18.106606 Google Chrome EC: version:
1851 15:40:18.109912 ro: voema_v2.0.10114-a447f03e46
1852 15:40:18.113176 rw: voema_v2.0.10114-a447f03e46
1853 15:40:18.116129 running image: 2
1854 15:40:18.119889 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1855 15:40:18.124962 ACPI: * FADT
1856 15:40:18.125048 SCI is IRQ9
1857 15:40:18.131815 ACPI: added table 1/32, length now 40
1858 15:40:18.131905 ACPI: * SSDT
1859 15:40:18.135279 Found 1 CPU(s) with 8 core(s) each.
1860 15:40:18.141681 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1861 15:40:18.145189 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1862 15:40:18.147814 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1863 15:40:18.151520 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1864 15:40:18.157732 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1865 15:40:18.164265 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1866 15:40:18.167878 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1867 15:40:18.174317 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1868 15:40:18.180773 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1869 15:40:18.184461 \_SB.PCI0.RP09: Added StorageD3Enable property
1870 15:40:18.190669 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1871 15:40:18.194508 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1872 15:40:18.201303 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1873 15:40:18.204524 PS2K: Passing 80 keymaps to kernel
1874 15:40:18.211400 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1875 15:40:18.218332 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1876 15:40:18.224818 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1877 15:40:18.231018 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1878 15:40:18.237794 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1879 15:40:18.244740 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1880 15:40:18.251626 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1881 15:40:18.258089 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1882 15:40:18.261036 ACPI: added table 2/32, length now 44
1883 15:40:18.264277 ACPI: * MCFG
1884 15:40:18.267639 ACPI: added table 3/32, length now 48
1885 15:40:18.267725 ACPI: * TPM2
1886 15:40:18.271009 TPM2 log created at 0x769f0000
1887 15:40:18.274570 ACPI: added table 4/32, length now 52
1888 15:40:18.277898 ACPI: * MADT
1889 15:40:18.277984 SCI is IRQ9
1890 15:40:18.281304 ACPI: added table 5/32, length now 56
1891 15:40:18.284150 current = 76b09850
1892 15:40:18.284237 ACPI: * DMAR
1893 15:40:18.290787 ACPI: added table 6/32, length now 60
1894 15:40:18.294153 ACPI: added table 7/32, length now 64
1895 15:40:18.294241 ACPI: * HPET
1896 15:40:18.297606 ACPI: added table 8/32, length now 68
1897 15:40:18.300901 ACPI: done.
1898 15:40:18.304124 ACPI tables: 35216 bytes.
1899 15:40:18.304210 smbios_write_tables: 769ef000
1900 15:40:18.307611 EC returned error result code 3
1901 15:40:18.310838 Couldn't obtain OEM name from CBI
1902 15:40:18.315455 Create SMBIOS type 16
1903 15:40:18.318810 Create SMBIOS type 17
1904 15:40:18.322254 GENERIC: 0.0 (WIFI Device)
1905 15:40:18.325838 SMBIOS tables: 1734 bytes.
1906 15:40:18.328978 Writing table forward entry at 0x00000500
1907 15:40:18.335116 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1908 15:40:18.338560 Writing coreboot table at 0x76b25000
1909 15:40:18.345521 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1910 15:40:18.348419 1. 0000000000001000-000000000009ffff: RAM
1911 15:40:18.351975 2. 00000000000a0000-00000000000fffff: RESERVED
1912 15:40:18.358396 3. 0000000000100000-00000000769eefff: RAM
1913 15:40:18.362142 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1914 15:40:18.368850 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1915 15:40:18.375231 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1916 15:40:18.378498 7. 0000000077000000-000000007fbfffff: RESERVED
1917 15:40:18.385144 8. 00000000c0000000-00000000cfffffff: RESERVED
1918 15:40:18.388612 9. 00000000f8000000-00000000f9ffffff: RESERVED
1919 15:40:18.391363 10. 00000000fb000000-00000000fb000fff: RESERVED
1920 15:40:18.398181 11. 00000000fe000000-00000000fe00ffff: RESERVED
1921 15:40:18.401482 12. 00000000fed80000-00000000fed87fff: RESERVED
1922 15:40:18.408125 13. 00000000fed90000-00000000fed92fff: RESERVED
1923 15:40:18.411487 14. 00000000feda0000-00000000feda1fff: RESERVED
1924 15:40:18.418441 15. 00000000fedc0000-00000000feddffff: RESERVED
1925 15:40:18.421318 16. 0000000100000000-00000004803fffff: RAM
1926 15:40:18.424740 Passing 4 GPIOs to payload:
1927 15:40:18.428266 NAME | PORT | POLARITY | VALUE
1928 15:40:18.434472 lid | undefined | high | high
1929 15:40:18.441391 power | undefined | high | low
1930 15:40:18.444439 oprom | undefined | high | low
1931 15:40:18.451242 EC in RW | 0x000000e5 | high | high
1932 15:40:18.457764 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1933 15:40:18.461139 coreboot table: 1576 bytes.
1934 15:40:18.464738 IMD ROOT 0. 0x76fff000 0x00001000
1935 15:40:18.467947 IMD SMALL 1. 0x76ffe000 0x00001000
1936 15:40:18.470785 FSP MEMORY 2. 0x76c4e000 0x003b0000
1937 15:40:18.474123 VPD 3. 0x76c4d000 0x00000367
1938 15:40:18.477385 RO MCACHE 4. 0x76c4c000 0x00000fdc
1939 15:40:18.480980 CONSOLE 5. 0x76c2c000 0x00020000
1940 15:40:18.484345 FMAP 6. 0x76c2b000 0x00000578
1941 15:40:18.490770 TIME STAMP 7. 0x76c2a000 0x00000910
1942 15:40:18.494380 VBOOT WORK 8. 0x76c16000 0x00014000
1943 15:40:18.497598 ROMSTG STCK 9. 0x76c15000 0x00001000
1944 15:40:18.500395 AFTER CAR 10. 0x76c0a000 0x0000b000
1945 15:40:18.503820 RAMSTAGE 11. 0x76b97000 0x00073000
1946 15:40:18.507130 REFCODE 12. 0x76b42000 0x00055000
1947 15:40:18.510630 SMM BACKUP 13. 0x76b32000 0x00010000
1948 15:40:18.513767 4f444749 14. 0x76b30000 0x00002000
1949 15:40:18.517289 EXT VBT15. 0x76b2d000 0x0000219f
1950 15:40:18.523526 COREBOOT 16. 0x76b25000 0x00008000
1951 15:40:18.526909 ACPI 17. 0x76b01000 0x00024000
1952 15:40:18.530274 ACPI GNVS 18. 0x76b00000 0x00001000
1953 15:40:18.533608 RAMOOPS 19. 0x76a00000 0x00100000
1954 15:40:18.537084 TPM2 TCGLOG20. 0x769f0000 0x00010000
1955 15:40:18.540656 SMBIOS 21. 0x769ef000 0x00000800
1956 15:40:18.543486 IMD small region:
1957 15:40:18.546747 IMD ROOT 0. 0x76ffec00 0x00000400
1958 15:40:18.550233 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1959 15:40:18.553627 POWER STATE 2. 0x76ffeb80 0x00000044
1960 15:40:18.560005 ROMSTAGE 3. 0x76ffeb60 0x00000004
1961 15:40:18.563595 MEM INFO 4. 0x76ffe980 0x000001e0
1962 15:40:18.569790 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1963 15:40:18.573091 MTRR: Physical address space:
1964 15:40:18.576541 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1965 15:40:18.583143 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1966 15:40:18.589596 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1967 15:40:18.596227 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1968 15:40:18.603107 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1969 15:40:18.609464 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1970 15:40:18.616071 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1971 15:40:18.619527 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 15:40:18.622734 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 15:40:18.626297 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 15:40:18.632944 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 15:40:18.636318 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 15:40:18.639124 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 15:40:18.642652 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 15:40:18.649392 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 15:40:18.652311 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 15:40:18.655803 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 15:40:18.659364 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 15:40:18.664107 call enable_fixed_mtrr()
1983 15:40:18.667387 CPU physical address size: 39 bits
1984 15:40:18.674259 MTRR: default type WB/UC MTRR counts: 6/7.
1985 15:40:18.677561 MTRR: WB selected as default type.
1986 15:40:18.684387 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1987 15:40:18.687577 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1988 15:40:18.693722 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1989 15:40:18.700691 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1990 15:40:18.707291 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1991 15:40:18.713620 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1992 15:40:18.717778
1993 15:40:18.717867 MTRR check
1994 15:40:18.720714 Fixed MTRRs : Enabled
1995 15:40:18.720796 Variable MTRRs: Enabled
1996 15:40:18.720889
1997 15:40:18.727414 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 15:40:18.730800 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 15:40:18.734254 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 15:40:18.737025 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 15:40:18.744061 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 15:40:18.747384 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 15:40:18.750857 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 15:40:18.753748 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 15:40:18.760805 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 15:40:18.764315 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 15:40:18.767143 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 15:40:18.774429 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2009 15:40:18.777811 call enable_fixed_mtrr()
2010 15:40:18.781111 Checking cr50 for pending updates
2011 15:40:18.784602 CPU physical address size: 39 bits
2012 15:40:18.788550 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 15:40:18.792164 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 15:40:18.795445 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 15:40:18.801725 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 15:40:18.805057 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 15:40:18.808214 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 15:40:18.811589 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 15:40:18.818467 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 15:40:18.821754 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 15:40:18.825300 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 15:40:18.828031 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 15:40:18.834967 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 15:40:18.838381 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 15:40:18.844622 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 15:40:18.848078 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 15:40:18.851436 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 15:40:18.854420 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 15:40:18.861458 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 15:40:18.864585 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 15:40:18.867639 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 15:40:18.871050 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 15:40:18.877852 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 15:40:18.881159 call enable_fixed_mtrr()
2035 15:40:18.884530 call enable_fixed_mtrr()
2036 15:40:18.887331 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 15:40:18.890675 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 15:40:18.894109 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 15:40:18.900892 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 15:40:18.904538 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 15:40:18.907261 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 15:40:18.910478 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 15:40:18.917227 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 15:40:18.920536 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 15:40:18.923999 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 15:40:18.926918 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 15:40:18.933702 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 15:40:18.936909 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 15:40:18.940417 call enable_fixed_mtrr()
2050 15:40:18.943834 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 15:40:18.950619 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 15:40:18.953260 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 15:40:18.956792 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 15:40:18.960247 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 15:40:18.966446 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 15:40:18.970219 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 15:40:18.973203 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 15:40:18.976391 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 15:40:18.981177 CPU physical address size: 39 bits
2060 15:40:18.987862 call enable_fixed_mtrr()
2061 15:40:18.987951 Reading cr50 TPM mode
2062 15:40:18.991665 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 15:40:18.998471 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 15:40:19.001816 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 15:40:19.005334 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 15:40:19.008638 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 15:40:19.015015 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 15:40:19.018708 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 15:40:19.021996 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 15:40:19.025480 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 15:40:19.031465 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 15:40:19.034813 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 15:40:19.038079 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 15:40:19.045431 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 15:40:19.048807 MTRR: Fixed MSR 0x259 0x0000000000000000
2076 15:40:19.051684 MTRR: Fixed MSR 0x268 0x0606060606060606
2077 15:40:19.054980 MTRR: Fixed MSR 0x269 0x0606060606060606
2078 15:40:19.061747 MTRR: Fixed MSR 0x26a 0x0606060606060606
2079 15:40:19.065173 MTRR: Fixed MSR 0x26b 0x0606060606060606
2080 15:40:19.068619 MTRR: Fixed MSR 0x26c 0x0606060606060606
2081 15:40:19.071559 MTRR: Fixed MSR 0x26d 0x0606060606060606
2082 15:40:19.078310 MTRR: Fixed MSR 0x26e 0x0606060606060606
2083 15:40:19.081900 MTRR: Fixed MSR 0x26f 0x0606060606060606
2084 15:40:19.085227 call enable_fixed_mtrr()
2085 15:40:19.088104 call enable_fixed_mtrr()
2086 15:40:19.094761 BS: BS_PAYLOAD_LOAD entry times (exec / console): 213 / 6 ms
2087 15:40:19.098209 CPU physical address size: 39 bits
2088 15:40:19.101223 CPU physical address size: 39 bits
2089 15:40:19.104639 CPU physical address size: 39 bits
2090 15:40:19.111186 CPU physical address size: 39 bits
2091 15:40:19.114622 CPU physical address size: 39 bits
2092 15:40:19.124725 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2093 15:40:19.127913 Checking segment from ROM address 0xffc02b38
2094 15:40:19.130837 Checking segment from ROM address 0xffc02b54
2095 15:40:19.137451 Loading segment from ROM address 0xffc02b38
2096 15:40:19.137539 code (compression=0)
2097 15:40:19.147498 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2098 15:40:19.157225 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2099 15:40:19.157342 it's not compressed!
2100 15:40:19.298088 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2101 15:40:19.304452 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2102 15:40:19.311383 Loading segment from ROM address 0xffc02b54
2103 15:40:19.314706 Entry Point 0x30000000
2104 15:40:19.314808 Loaded segments
2105 15:40:19.321249 BS: BS_PAYLOAD_LOAD run times (exec / console): 158 / 63 ms
2106 15:40:19.366246 Finalizing chipset.
2107 15:40:19.369660 Finalizing SMM.
2108 15:40:19.369767 APMC done.
2109 15:40:19.375931 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2110 15:40:19.379837 mp_park_aps done after 0 msecs.
2111 15:40:19.383077 Jumping to boot code at 0x30000000(0x76b25000)
2112 15:40:19.392573 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2113 15:40:19.392697
2114 15:40:19.396348 Starting depthcharge on Voema...
2115 15:40:19.396733 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2116 15:40:19.396840 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2117 15:40:19.396926 Setting prompt string to ['volteer:']
2118 15:40:19.397007 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2119 15:40:19.405989 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2120 15:40:19.412823 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2121 15:40:19.419663 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2122 15:40:19.422335 Failed to find eMMC card reader
2123 15:40:19.422426 Wipe memory regions:
2124 15:40:19.429024 [0x00000000001000, 0x000000000a0000)
2125 15:40:19.432401 [0x00000000100000, 0x00000030000000)
2126 15:40:19.470096 [0x00000032662db0, 0x000000769ef000)
2127 15:40:19.520850 [0x00000100000000, 0x00000480400000)
2128 15:40:20.140988 ec_init: CrosEC protocol v3 supported (256, 256)
2129 15:40:20.572018 R8152: Initializing
2130 15:40:20.575324 Version 6 (ocp_data = 5c30)
2131 15:40:20.578645 R8152: Done initializing
2132 15:40:20.581558 Adding net device
2133 15:40:20.886527 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2134 15:40:20.886675
2135 15:40:20.889796 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2137 15:40:20.990564 volteer: tftpboot 192.168.201.1 7463481/tftp-deploy-7uiin20h/kernel/bzImage 7463481/tftp-deploy-7uiin20h/kernel/cmdline 7463481/tftp-deploy-7uiin20h/ramdisk/ramdisk.cpio.gz
2138 15:40:20.990749 Setting prompt string to 'Starting kernel'
2139 15:40:20.990834 Setting prompt string to ['Starting kernel']
2140 15:40:20.990923 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2141 15:40:20.991007 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2142 15:40:20.995278 tftpboot 192.168.201.1 7463481/tftp-deploy-7uiin20h/kernel/bzImoy-7uiin20h/kernel/cmdline 7463481/tftp-deploy-7uiin20h/ramdisk/ramdisk.cpio.gz
2143 15:40:20.995372 Waiting for link
2144 15:40:21.198437 done.
2145 15:40:21.198597 MAC: 00:24:32:30:78:e4
2146 15:40:21.201926 Sending DHCP discover... done.
2147 15:40:21.204809 Waiting for reply... done.
2148 15:40:21.208320 Sending DHCP request... done.
2149 15:40:21.215095 Waiting for reply... done.
2150 15:40:21.215183 My ip is 192.168.201.15
2151 15:40:21.221219 The DHCP server ip is 192.168.201.1
2152 15:40:21.224646 TFTP server IP predefined by user: 192.168.201.1
2153 15:40:21.231266 Bootfile predefined by user: 7463481/tftp-deploy-7uiin20h/kernel/bzImage
2154 15:40:21.234286 Sending tftp read request... done.
2155 15:40:21.237460 Waiting for the transfer...
2156 15:40:21.839102 00000000 ################################################################
2157 15:40:22.451098 00080000 ################################################################
2158 15:40:23.071621 00100000 ################################################################
2159 15:40:23.703344 00180000 ################################################################
2160 15:40:24.354542 00200000 ################################################################
2161 15:40:25.002553 00280000 ################################################################
2162 15:40:25.594905 00300000 ################################################################
2163 15:40:26.179656 00380000 ################################################################
2164 15:40:26.783606 00400000 ################################################################
2165 15:40:27.383421 00480000 ################################################################
2166 15:40:27.946608 00500000 ################################################################
2167 15:40:28.517241 00580000 ################################################################
2168 15:40:29.085624 00600000 ################################################################
2169 15:40:29.440983 00680000 ###################################### done.
2170 15:40:29.444291 The bootfile was 7126928 bytes long.
2171 15:40:29.447598 Sending tftp read request... done.
2172 15:40:29.450452 Waiting for the transfer...
2173 15:40:30.060254 00000000 ################################################################
2174 15:40:30.607062 00080000 ################################################################
2175 15:40:31.178243 00100000 ################################################################
2176 15:40:31.770159 00180000 ################################################################
2177 15:40:32.358421 00200000 ################################################################
2178 15:40:32.946040 00280000 ################################################################
2179 15:40:33.519605 00300000 ################################################################
2180 15:40:34.155826 00380000 ################################################################
2181 15:40:34.819376 00400000 ################################################################
2182 15:40:35.525580 00480000 ################################################################
2183 15:40:35.873771 00500000 ############################### done.
2184 15:40:35.876922 Sending tftp read request... done.
2185 15:40:35.880251 Waiting for the transfer...
2186 15:40:35.880701 00000000 # done.
2187 15:40:35.890504 Command line loaded dynamically from TFTP file: 7463481/tftp-deploy-7uiin20h/kernel/cmdline
2188 15:40:35.912969 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7463481/extract-nfsrootfs-mpgar4g8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2189 15:40:35.916612 Shutting down all USB controllers.
2190 15:40:35.919743 Removing current net device
2191 15:40:35.923078 Finalizing coreboot
2192 15:40:35.929655 Exiting depthcharge with code 4 at timestamp: 25107926
2193 15:40:35.930103
2194 15:40:35.930456 Starting kernel ...
2195 15:40:35.930781
2196 15:40:35.931094
2197 15:40:35.932247 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2198 15:40:35.932740 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2199 15:40:35.933131 Setting prompt string to ['Linux version [0-9]']
2200 15:40:35.933503 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2201 15:40:35.933869 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2203 15:45:03.933671 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2205 15:45:03.934823 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2207 15:45:03.935755 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2210 15:45:03.937301 end: 2 depthcharge-action (duration 00:05:00) [common]
2212 15:45:03.938282 Cleaning after the job
2213 15:45:03.938368 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/ramdisk
2214 15:45:03.938830 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/kernel
2215 15:45:03.939377 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/nfsrootfs
2216 15:45:03.969992 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463481/tftp-deploy-7uiin20h/modules
2217 15:45:03.970300 start: 5.1 power-off (timeout 00:00:30) [common]
2218 15:45:03.970492 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2219 15:45:03.989145 >> Command sent successfully.
2220 15:45:03.990969 Returned 0 in 0 seconds
2221 15:45:04.092170 end: 5.1 power-off (duration 00:00:00) [common]
2223 15:45:04.093765 start: 5.2 read-feedback (timeout 00:10:00) [common]
2224 15:45:04.094960 Listened to connection for namespace 'common' for up to 1s
2225 15:45:05.099794 Finalising connection for namespace 'common'
2226 15:45:05.100523 Disconnecting from shell: Finalise
2227 15:45:05.202127 end: 5.2 read-feedback (duration 00:00:01) [common]
2228 15:45:05.202812 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463481
2229 15:45:05.334065 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463481
2230 15:45:05.334267 JobError: Your job cannot terminate cleanly.