Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:39:54.797527 lava-dispatcher, installed at version: 2022.06
2 15:39:54.797724 start: 0 validate
3 15:39:54.797902 Start time: 2022-09-30 15:39:54.797896+00:00 (UTC)
4 15:39:54.798032 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:39:54.798166 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20220923.1%2Famd64%2Frootfs.cpio.gz exists
6 15:39:54.801027 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:39:54.801208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:39:54.809293 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:39:54.809408 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:39:54.812469 validate duration: 0.01
12 15:39:54.812703 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:39:54.812809 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:39:54.812909 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:39:54.813005 Not decompressing ramdisk as can be used compressed.
16 15:39:54.813090 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20220923.1/amd64/rootfs.cpio.gz
17 15:39:54.813157 saving as /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/ramdisk/rootfs.cpio.gz
18 15:39:54.813219 total size: 35715292 (34MB)
19 15:39:54.816062 progress 0% (0MB)
20 15:39:54.866312 progress 5% (1MB)
21 15:39:54.916968 progress 10% (3MB)
22 15:39:54.968433 progress 15% (5MB)
23 15:39:55.019336 progress 20% (6MB)
24 15:39:55.070609 progress 25% (8MB)
25 15:39:55.120788 progress 30% (10MB)
26 15:39:55.171250 progress 35% (11MB)
27 15:39:55.221443 progress 40% (13MB)
28 15:39:55.273904 progress 45% (15MB)
29 15:39:55.324750 progress 50% (17MB)
30 15:39:55.375040 progress 55% (18MB)
31 15:39:55.427085 progress 60% (20MB)
32 15:39:55.478104 progress 65% (22MB)
33 15:39:55.528649 progress 70% (23MB)
34 15:39:55.580486 progress 75% (25MB)
35 15:39:55.628636 progress 80% (27MB)
36 15:39:55.679941 progress 85% (28MB)
37 15:39:55.727912 progress 90% (30MB)
38 15:39:55.779401 progress 95% (32MB)
39 15:39:55.827067 progress 100% (34MB)
40 15:39:55.827415 34MB downloaded in 1.01s (33.58MB/s)
41 15:39:55.827592 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:39:55.827873 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:39:55.827980 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:39:55.828082 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:39:55.828205 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:39:55.828280 saving as /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/kernel/bzImage
48 15:39:55.828361 total size: 7126928 (6MB)
49 15:39:55.828441 No compression specified
50 15:39:55.854177 progress 0% (0MB)
51 15:39:55.896740 progress 5% (0MB)
52 15:39:55.914592 progress 10% (0MB)
53 15:39:55.938700 progress 15% (1MB)
54 15:39:55.961597 progress 20% (1MB)
55 15:39:55.985771 progress 25% (1MB)
56 15:39:56.003503 progress 30% (2MB)
57 15:39:56.027719 progress 35% (2MB)
58 15:39:56.052106 progress 40% (2MB)
59 15:39:56.069290 progress 45% (3MB)
60 15:39:56.093678 progress 50% (3MB)
61 15:39:56.117681 progress 55% (3MB)
62 15:39:56.140754 progress 60% (4MB)
63 15:39:56.158673 progress 65% (4MB)
64 15:39:56.182628 progress 70% (4MB)
65 15:39:56.205500 progress 75% (5MB)
66 15:39:56.223855 progress 80% (5MB)
67 15:39:56.247434 progress 85% (5MB)
68 15:39:56.270976 progress 90% (6MB)
69 15:39:56.293640 progress 95% (6MB)
70 15:39:56.316318 progress 100% (6MB)
71 15:39:56.317413 6MB downloaded in 0.49s (13.90MB/s)
72 15:39:56.318142 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:39:56.319364 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:39:56.319828 start: 1.3 download-retry (timeout 00:09:58) [common]
76 15:39:56.320281 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 15:39:56.320787 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:39:56.321143 saving as /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/modules/modules.tar
79 15:39:56.321469 total size: 51896 (0MB)
80 15:39:56.321849 Using unxz to decompress xz
81 15:39:56.336166 progress 63% (0MB)
82 15:39:56.338127 progress 100% (0MB)
83 15:39:56.354302 0MB downloaded in 0.03s (1.51MB/s)
84 15:39:56.355490 end: 1.3.1 http-download (duration 00:00:00) [common]
86 15:39:56.356906 end: 1.3 download-retry (duration 00:00:00) [common]
87 15:39:56.357441 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 15:39:56.358011 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 15:39:56.358504 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 15:39:56.358973 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 15:39:56.359800 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9
92 15:39:56.360375 makedir: /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin
93 15:39:56.360841 makedir: /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/tests
94 15:39:56.361277 makedir: /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/results
95 15:39:56.361841 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-add-keys
96 15:39:56.362543 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-add-sources
97 15:39:56.363174 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-background-process-start
98 15:39:56.363822 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-background-process-stop
99 15:39:56.364444 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-common-functions
100 15:39:56.365062 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-echo-ipv4
101 15:39:56.365653 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-install-packages
102 15:39:56.366313 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-installed-packages
103 15:39:56.366908 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-os-build
104 15:39:56.367488 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-probe-channel
105 15:39:56.368108 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-probe-ip
106 15:39:56.368704 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-target-ip
107 15:39:56.369300 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-target-mac
108 15:39:56.369943 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-target-storage
109 15:39:56.370597 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-case
110 15:39:56.371182 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-event
111 15:39:56.371758 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-feedback
112 15:39:56.372270 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-raise
113 15:39:56.372711 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-reference
114 15:39:56.373123 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-runner
115 15:39:56.373563 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-set
116 15:39:56.374007 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-test-shell
117 15:39:56.374457 Updating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-install-packages (oe)
118 15:39:56.374907 Updating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/bin/lava-installed-packages (oe)
119 15:39:56.375297 Creating /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/environment
120 15:39:56.375654 LAVA metadata
121 15:39:56.375923 - LAVA_JOB_ID=7463488
122 15:39:56.376193 - LAVA_DISPATCHER_IP=192.168.201.1
123 15:39:56.376587 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 15:39:56.376834 skipped lava-vland-overlay
125 15:39:56.377106 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 15:39:56.377342 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 15:39:56.377519 skipped lava-multinode-overlay
128 15:39:56.377757 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 15:39:56.377997 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 15:39:56.378210 Loading test definitions
131 15:39:56.378478 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 15:39:56.378693 Using /lava-7463488 at stage 0
133 15:39:56.379399 uuid=7463488_1.4.2.3.1 testdef=None
134 15:39:56.379672 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 15:39:56.379944 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 15:39:56.381286 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 15:39:56.381994 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 15:39:56.383313 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 15:39:56.383867 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 15:39:56.385139 runner path: /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/0/tests/0_cros-ec test_uuid 7463488_1.4.2.3.1
143 15:39:56.385479 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 15:39:56.386013 Creating lava-test-runner.conf files
146 15:39:56.386165 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463488/lava-overlay-rcjbj0i9/lava-7463488/0 for stage 0
147 15:39:56.386369 - 0_cros-ec
148 15:39:56.386593 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 15:39:56.386796 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
150 15:39:56.395763 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 15:39:56.396073 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
152 15:39:56.396228 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 15:39:56.396371 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 15:39:56.396519 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
155 15:39:57.152314 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 15:39:57.152659 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
157 15:39:57.152772 extracting modules file /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463488/extract-overlay-ramdisk-5sbwmkhi/ramdisk
158 15:39:57.157328 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 15:39:57.157445 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
160 15:39:57.157535 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463488/compress-overlay-i2r0o230/overlay-1.4.2.4.tar.gz to ramdisk
161 15:39:57.157613 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463488/compress-overlay-i2r0o230/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463488/extract-overlay-ramdisk-5sbwmkhi/ramdisk
162 15:39:57.161040 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 15:39:57.161149 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
164 15:39:57.161242 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 15:39:57.161351 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
166 15:39:57.161440 Building ramdisk /var/lib/lava/dispatcher/tmp/7463488/extract-overlay-ramdisk-5sbwmkhi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463488/extract-overlay-ramdisk-5sbwmkhi/ramdisk
167 15:39:57.406963 >> 182339 blocks
168 15:40:00.557923 rename /var/lib/lava/dispatcher/tmp/7463488/extract-overlay-ramdisk-5sbwmkhi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/ramdisk/ramdisk.cpio.gz
169 15:40:00.558320 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 15:40:00.558439 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
171 15:40:00.558540 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
172 15:40:00.558632 No mkimage arch provided, not using FIT.
173 15:40:00.558721 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 15:40:00.558803 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 15:40:00.558904 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 15:40:00.558999 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
177 15:40:00.559073 No LXC device requested
178 15:40:00.559153 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 15:40:00.559237 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
180 15:40:00.559321 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 15:40:00.559395 Checking files for TFTP limit of 4294967296 bytes.
182 15:40:00.559780 end: 1 tftp-deploy (duration 00:00:06) [common]
183 15:40:00.559889 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 15:40:00.559983 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 15:40:00.560105 substitutions:
186 15:40:00.560172 - {DTB}: None
187 15:40:00.560237 - {INITRD}: 7463488/tftp-deploy-bkj_8q2m/ramdisk/ramdisk.cpio.gz
188 15:40:00.560297 - {KERNEL}: 7463488/tftp-deploy-bkj_8q2m/kernel/bzImage
189 15:40:00.560355 - {LAVA_MAC}: None
190 15:40:00.560411 - {PRESEED_CONFIG}: None
191 15:40:00.560469 - {PRESEED_LOCAL}: None
192 15:40:00.560524 - {RAMDISK}: 7463488/tftp-deploy-bkj_8q2m/ramdisk/ramdisk.cpio.gz
193 15:40:00.560579 - {ROOT_PART}: None
194 15:40:00.560634 - {ROOT}: None
195 15:40:00.560688 - {SERVER_IP}: 192.168.201.1
196 15:40:00.560742 - {TEE}: None
197 15:40:00.560797 Parsed boot commands:
198 15:40:00.560851 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 15:40:00.561013 Parsed boot commands: tftpboot 192.168.201.1 7463488/tftp-deploy-bkj_8q2m/kernel/bzImage 7463488/tftp-deploy-bkj_8q2m/kernel/cmdline 7463488/tftp-deploy-bkj_8q2m/ramdisk/ramdisk.cpio.gz
200 15:40:00.561118 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 15:40:00.561207 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 15:40:00.561296 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 15:40:00.561396 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 15:40:00.561464 Not connected, no need to disconnect.
205 15:40:00.561541 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 15:40:00.561624 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 15:40:00.561690 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
208 15:40:00.564352 Setting prompt string to ['lava-test: # ']
209 15:40:00.564662 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 15:40:00.564783 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 15:40:00.564881 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 15:40:00.564972 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 15:40:00.565144 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
214 15:40:00.584776 >> Command sent successfully.
215 15:40:00.586644 Returned 0 in 0 seconds
216 15:40:00.687435 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 15:40:00.687746 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 15:40:00.687844 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 15:40:00.687931 Setting prompt string to 'Starting depthcharge on Voema...'
221 15:40:00.687997 Changing prompt to 'Starting depthcharge on Voema...'
222 15:40:00.688063 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 15:40:00.688328 [Enter `^Ec?' for help]
224 15:40:08.005133
225 15:40:08.005308
226 15:40:08.014541 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 15:40:08.017952 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 15:40:08.024463 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 15:40:08.027850 CPU: AES supported, TXT NOT supported, VT supported
230 15:40:08.034615 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 15:40:08.041204 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 15:40:08.044590 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 15:40:08.047807 VBOOT: Loading verstage.
234 15:40:08.051125 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
235 15:40:08.057740 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 15:40:08.061137 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 15:40:08.071755 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 15:40:08.078284 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 15:40:08.078368
240 15:40:08.078483
241 15:40:08.091544 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 15:40:08.105367 Probing TPM: . done!
243 15:40:08.108765 TPM ready after 0 ms
244 15:40:08.112292 Connected to device vid:did:rid of 1ae0:0028:00
245 15:40:08.123064 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 15:40:08.129856 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 15:40:08.133097 Initialized TPM device CR50 revision 0
248 15:40:08.184698 tlcl_send_startup: Startup return code is 0
249 15:40:08.184788 TPM: setup succeeded
250 15:40:08.200634 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 15:40:08.214364 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 15:40:08.227420 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 15:40:08.236966 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 15:40:08.240902 Chrome EC: UHEPI supported
255 15:40:08.244337 Phase 1
256 15:40:08.247945 FMAP: area GBB found @ 1805000 (458752 bytes)
257 15:40:08.257876 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 15:40:08.264302 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 15:40:08.270518 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 15:40:08.277502 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 15:40:08.280742 Recovery requested (1009000e)
262 15:40:08.283832 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 15:40:08.295873 tlcl_extend: response is 0
264 15:40:08.302555 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 15:40:08.312664 tlcl_extend: response is 0
266 15:40:08.318642 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 15:40:08.325513 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 15:40:08.331937 BS: verstage times (exec / console): total (unknown) / 142 ms
269 15:40:08.332022
270 15:40:08.332089
271 15:40:08.345253 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 15:40:08.351944 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 15:40:08.355169 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 15:40:08.358424 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 15:40:08.365001 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 15:40:08.368691 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 15:40:08.371760 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 15:40:08.375667 TCO_STS: 0000 0000
279 15:40:08.378392 GEN_PMCON: d0015038 00002200
280 15:40:08.381887 GBLRST_CAUSE: 00000000 00000000
281 15:40:08.381970 HPR_CAUSE0: 00000000
282 15:40:08.385517 prev_sleep_state 5
283 15:40:08.388512 Boot Count incremented to 10247
284 15:40:08.395269 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 15:40:08.401929 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 15:40:08.408171 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 15:40:08.415304 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 15:40:08.419443 Chrome EC: UHEPI supported
289 15:40:08.426245 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 15:40:08.439287 Probing TPM: done!
291 15:40:08.446313 Connected to device vid:did:rid of 1ae0:0028:00
292 15:40:08.456869 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
293 15:40:08.464731 Initialized TPM device CR50 revision 0
294 15:40:08.474602 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 15:40:08.481120 MRC: Hash idx 0x100b comparison successful.
296 15:40:08.484005 MRC cache found, size faa8
297 15:40:08.484090 bootmode is set to: 2
298 15:40:08.487359 SPD index = 0
299 15:40:08.493991 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 15:40:08.497380 SPD: module type is LPDDR4X
301 15:40:08.500862 SPD: module part number is MT53E512M64D4NW-046
302 15:40:08.507222 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
303 15:40:08.513971 SPD: device width 16 bits, bus width 16 bits
304 15:40:08.517245 SPD: module size is 1024 MB (per channel)
305 15:40:08.949646 CBMEM:
306 15:40:08.952919 IMD: root @ 0x76fff000 254 entries.
307 15:40:08.956004 IMD: root @ 0x76ffec00 62 entries.
308 15:40:08.959550 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 15:40:08.966073 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 15:40:08.969338 External stage cache:
311 15:40:08.972688 IMD: root @ 0x7b3ff000 254 entries.
312 15:40:08.976247 IMD: root @ 0x7b3fec00 62 entries.
313 15:40:08.991423 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 15:40:08.998121 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 15:40:09.004950 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 15:40:09.019163 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 15:40:09.022441 cse_lite: Skip switching to RW in the recovery path
318 15:40:09.026061 8 DIMMs found
319 15:40:09.026148 SMM Memory Map
320 15:40:09.029564 SMRAM : 0x7b000000 0x800000
321 15:40:09.032746 Subregion 0: 0x7b000000 0x200000
322 15:40:09.036016 Subregion 1: 0x7b200000 0x200000
323 15:40:09.039298 Subregion 2: 0x7b400000 0x400000
324 15:40:09.042646 top_of_ram = 0x77000000
325 15:40:09.049037 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 15:40:09.052512 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 15:40:09.059317 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 15:40:09.062401 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 15:40:09.072569 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 15:40:09.079173 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 15:40:09.088960 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 15:40:09.092976 Processing 211 relocs. Offset value of 0x74c0b000
333 15:40:09.101195 BS: romstage times (exec / console): total (unknown) / 277 ms
334 15:40:09.107724
335 15:40:09.107811
336 15:40:09.117958 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 15:40:09.120683 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 15:40:09.130752 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 15:40:09.137420 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 15:40:09.144059 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 15:40:09.150442 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 15:40:09.197392 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 15:40:09.204176 Processing 5008 relocs. Offset value of 0x75d98000
344 15:40:09.207351 BS: postcar times (exec / console): total (unknown) / 59 ms
345 15:40:09.210644
346 15:40:09.210730
347 15:40:09.221377 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 15:40:09.221467 Normal boot
349 15:40:09.224647 FW_CONFIG value is 0x804c02
350 15:40:09.227620 PCI: 00:07.0 disabled by fw_config
351 15:40:09.231242 PCI: 00:07.1 disabled by fw_config
352 15:40:09.234753 PCI: 00:0d.2 disabled by fw_config
353 15:40:09.237713 PCI: 00:1c.7 disabled by fw_config
354 15:40:09.244324 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 15:40:09.250879 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 15:40:09.254231 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 15:40:09.257513 GENERIC: 0.0 disabled by fw_config
358 15:40:09.261203 GENERIC: 1.0 disabled by fw_config
359 15:40:09.267386 fw_config match found: DB_USB=USB3_ACTIVE
360 15:40:09.270759 fw_config match found: DB_USB=USB3_ACTIVE
361 15:40:09.274155 fw_config match found: DB_USB=USB3_ACTIVE
362 15:40:09.277274 fw_config match found: DB_USB=USB3_ACTIVE
363 15:40:09.284098 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 15:40:09.290826 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 15:40:09.297726 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 15:40:09.307437 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 15:40:09.310848 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 15:40:09.317599 microcode: Update skipped, already up-to-date
369 15:40:09.323940 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 15:40:09.351322 Detected 4 core, 8 thread CPU.
371 15:40:09.354855 Setting up SMI for CPU
372 15:40:09.357467 IED base = 0x7b400000
373 15:40:09.357573 IED size = 0x00400000
374 15:40:09.360968 Will perform SMM setup.
375 15:40:09.367603 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
376 15:40:09.374157 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 15:40:09.380947 Processing 16 relocs. Offset value of 0x00030000
378 15:40:09.384126 Attempting to start 7 APs
379 15:40:09.387515 Waiting for 10ms after sending INIT.
380 15:40:09.403137 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 15:40:09.406382 AP: slot 5 apic_id 6.
382 15:40:09.409870 AP: slot 4 apic_id 7.
383 15:40:09.409954 AP: slot 3 apic_id 5.
384 15:40:09.412684 AP: slot 7 apic_id 4.
385 15:40:09.416255 AP: slot 6 apic_id 2.
386 15:40:09.416339 AP: slot 2 apic_id 3.
387 15:40:09.416405 done.
388 15:40:09.422878 Waiting for 2nd SIPI to complete...done.
389 15:40:09.429496 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 15:40:09.436258 Processing 13 relocs. Offset value of 0x00038000
391 15:40:09.439227 Unable to locate Global NVS
392 15:40:09.446595 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 15:40:09.449616 Installing permanent SMM handler to 0x7b000000
394 15:40:09.459418 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 15:40:09.463120 Processing 794 relocs. Offset value of 0x7b010000
396 15:40:09.472662 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 15:40:09.475955 Processing 13 relocs. Offset value of 0x7b008000
398 15:40:09.482706 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 15:40:09.489516 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 15:40:09.492512 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 15:40:09.499061 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 15:40:09.505818 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 15:40:09.512543 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 15:40:09.519086 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 15:40:09.519170 Unable to locate Global NVS
406 15:40:09.529067 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 15:40:09.532308 Clearing SMI status registers
408 15:40:09.532392 SMI_STS: PM1
409 15:40:09.535816 PM1_STS: PWRBTN
410 15:40:09.542335 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 15:40:09.545447 In relocation handler: CPU 0
412 15:40:09.549044 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 15:40:09.555980 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 15:40:09.556068 Relocation complete.
415 15:40:09.565608 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 15:40:09.565711 In relocation handler: CPU 1
417 15:40:09.572075 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 15:40:09.572160 Relocation complete.
419 15:40:09.581965 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
420 15:40:09.582050 In relocation handler: CPU 4
421 15:40:09.588717 New SMBASE=0x7afff000 IEDBASE=0x7b400000
422 15:40:09.588802 Relocation complete.
423 15:40:09.598738 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
424 15:40:09.598823 In relocation handler: CPU 5
425 15:40:09.605330 New SMBASE=0x7affec00 IEDBASE=0x7b400000
426 15:40:09.608767 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 15:40:09.611788 Relocation complete.
428 15:40:09.618739 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
429 15:40:09.621916 In relocation handler: CPU 2
430 15:40:09.625416 New SMBASE=0x7afff800 IEDBASE=0x7b400000
431 15:40:09.629107 Relocation complete.
432 15:40:09.635280 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
433 15:40:09.638450 In relocation handler: CPU 6
434 15:40:09.641711 New SMBASE=0x7affe800 IEDBASE=0x7b400000
435 15:40:09.648294 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 15:40:09.648379 Relocation complete.
437 15:40:09.655403 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
438 15:40:09.658662 In relocation handler: CPU 3
439 15:40:09.661698 New SMBASE=0x7afff400 IEDBASE=0x7b400000
440 15:40:09.665480 Relocation complete.
441 15:40:09.671540 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 15:40:09.675085 In relocation handler: CPU 7
443 15:40:09.678364 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 15:40:09.685408 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 15:40:09.685493 Relocation complete.
446 15:40:09.689078 Initializing CPU #0
447 15:40:09.692438 CPU: vendor Intel device 806c1
448 15:40:09.695585 CPU: family 06, model 8c, stepping 01
449 15:40:09.699389 Clearing out pending MCEs
450 15:40:09.702107 Setting up local APIC...
451 15:40:09.702190 apic_id: 0x00 done.
452 15:40:09.705896 Turbo is available but hidden
453 15:40:09.708990 Turbo is available and visible
454 15:40:09.715406 microcode: Update skipped, already up-to-date
455 15:40:09.715491 CPU #0 initialized
456 15:40:09.718965 Initializing CPU #1
457 15:40:09.722225 Initializing CPU #2
458 15:40:09.722309 Initializing CPU #6
459 15:40:09.725647 CPU: vendor Intel device 806c1
460 15:40:09.728843 CPU: family 06, model 8c, stepping 01
461 15:40:09.732164 CPU: vendor Intel device 806c1
462 15:40:09.735410 CPU: family 06, model 8c, stepping 01
463 15:40:09.739169 Clearing out pending MCEs
464 15:40:09.742667 CPU: vendor Intel device 806c1
465 15:40:09.745566 CPU: family 06, model 8c, stepping 01
466 15:40:09.748831 Setting up local APIC...
467 15:40:09.752011 Initializing CPU #3
468 15:40:09.752095 Initializing CPU #7
469 15:40:09.755246 CPU: vendor Intel device 806c1
470 15:40:09.758533 CPU: family 06, model 8c, stepping 01
471 15:40:09.762076 CPU: vendor Intel device 806c1
472 15:40:09.765153 CPU: family 06, model 8c, stepping 01
473 15:40:09.768978 Clearing out pending MCEs
474 15:40:09.772372 Clearing out pending MCEs
475 15:40:09.775249 Setting up local APIC...
476 15:40:09.778516 Clearing out pending MCEs
477 15:40:09.778591 apic_id: 0x03 done.
478 15:40:09.782217 Setting up local APIC...
479 15:40:09.784964 microcode: Update skipped, already up-to-date
480 15:40:09.788668 apic_id: 0x02 done.
481 15:40:09.791704 CPU #2 initialized
482 15:40:09.795124 microcode: Update skipped, already up-to-date
483 15:40:09.799117 Initializing CPU #5
484 15:40:09.799196 Initializing CPU #4
485 15:40:09.801862 CPU #6 initialized
486 15:40:09.805094 CPU: vendor Intel device 806c1
487 15:40:09.808724 CPU: family 06, model 8c, stepping 01
488 15:40:09.812182 CPU: vendor Intel device 806c1
489 15:40:09.815178 CPU: family 06, model 8c, stepping 01
490 15:40:09.818210 Clearing out pending MCEs
491 15:40:09.821984 Clearing out pending MCEs
492 15:40:09.822061 Setting up local APIC...
493 15:40:09.825326 Setting up local APIC...
494 15:40:09.828741 apic_id: 0x07 done.
495 15:40:09.828817 Setting up local APIC...
496 15:40:09.831999 Clearing out pending MCEs
497 15:40:09.835125 apic_id: 0x04 done.
498 15:40:09.838289 apic_id: 0x05 done.
499 15:40:09.841747 microcode: Update skipped, already up-to-date
500 15:40:09.845058 microcode: Update skipped, already up-to-date
501 15:40:09.848192 CPU #7 initialized
502 15:40:09.851533 CPU #3 initialized
503 15:40:09.855008 microcode: Update skipped, already up-to-date
504 15:40:09.858084 apic_id: 0x06 done.
505 15:40:09.858167 CPU #4 initialized
506 15:40:09.861601 microcode: Update skipped, already up-to-date
507 15:40:09.865191 Setting up local APIC...
508 15:40:09.868881 CPU #5 initialized
509 15:40:09.868956 apic_id: 0x01 done.
510 15:40:09.875010 microcode: Update skipped, already up-to-date
511 15:40:09.878530 CPU #1 initialized
512 15:40:09.882137 bsp_do_flight_plan done after 455 msecs.
513 15:40:09.885062 CPU: frequency set to 4000 MHz
514 15:40:09.885137 Enabling SMIs.
515 15:40:09.891592 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 15:40:09.908063 SATAXPCIE1 indicates PCIe NVMe is present
517 15:40:09.911237 Probing TPM: done!
518 15:40:09.915176 Connected to device vid:did:rid of 1ae0:0028:00
519 15:40:09.925306 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
520 15:40:09.928514 Initialized TPM device CR50 revision 0
521 15:40:09.932018 Enabling S0i3.4
522 15:40:09.939131 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 15:40:09.941860 Found a VBT of 8704 bytes after decompression
524 15:40:09.948492 cse_lite: CSE RO boot. HybridStorageMode disabled
525 15:40:09.955278 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 15:40:10.030959 FSPS returned 0
527 15:40:10.034354 Executing Phase 1 of FspMultiPhaseSiInit
528 15:40:10.043856 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 15:40:10.047090 port C0 DISC req: usage 1 usb3 1 usb2 5
530 15:40:10.050516 Raw Buffer output 0 00000511
531 15:40:10.053750 Raw Buffer output 1 00000000
532 15:40:10.057985 pmc_send_ipc_cmd succeeded
533 15:40:10.064498 port C1 DISC req: usage 1 usb3 2 usb2 3
534 15:40:10.064583 Raw Buffer output 0 00000321
535 15:40:10.067397 Raw Buffer output 1 00000000
536 15:40:10.071778 pmc_send_ipc_cmd succeeded
537 15:40:10.076945 Detected 4 core, 8 thread CPU.
538 15:40:10.080429 Detected 4 core, 8 thread CPU.
539 15:40:10.314674 Display FSP Version Info HOB
540 15:40:10.317582 Reference Code - CPU = a.0.4c.31
541 15:40:10.321462 uCode Version = 0.0.0.86
542 15:40:10.324568 TXT ACM version = ff.ff.ff.ffff
543 15:40:10.327612 Reference Code - ME = a.0.4c.31
544 15:40:10.330825 MEBx version = 0.0.0.0
545 15:40:10.334221 ME Firmware Version = Consumer SKU
546 15:40:10.337672 Reference Code - PCH = a.0.4c.31
547 15:40:10.340858 PCH-CRID Status = Disabled
548 15:40:10.344025 PCH-CRID Original Value = ff.ff.ff.ffff
549 15:40:10.347779 PCH-CRID New Value = ff.ff.ff.ffff
550 15:40:10.351048 OPROM - RST - RAID = ff.ff.ff.ffff
551 15:40:10.354265 PCH Hsio Version = 4.0.0.0
552 15:40:10.357654 Reference Code - SA - System Agent = a.0.4c.31
553 15:40:10.361183 Reference Code - MRC = 2.0.0.1
554 15:40:10.364034 SA - PCIe Version = a.0.4c.31
555 15:40:10.367499 SA-CRID Status = Disabled
556 15:40:10.371032 SA-CRID Original Value = 0.0.0.1
557 15:40:10.374446 SA-CRID New Value = 0.0.0.1
558 15:40:10.377848 OPROM - VBIOS = ff.ff.ff.ffff
559 15:40:10.381002 IO Manageability Engine FW Version = 11.1.4.0
560 15:40:10.384124 PHY Build Version = 0.0.0.e0
561 15:40:10.387466 Thunderbolt(TM) FW Version = 0.0.0.0
562 15:40:10.394704 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 15:40:10.397533 ITSS IRQ Polarities Before:
564 15:40:10.398075 IPC0: 0xffffffff
565 15:40:10.401254 IPC1: 0xffffffff
566 15:40:10.401722 IPC2: 0xffffffff
567 15:40:10.404227 IPC3: 0xffffffff
568 15:40:10.407708 ITSS IRQ Polarities After:
569 15:40:10.408233 IPC0: 0xffffffff
570 15:40:10.411017 IPC1: 0xffffffff
571 15:40:10.411466 IPC2: 0xffffffff
572 15:40:10.414343 IPC3: 0xffffffff
573 15:40:10.417988 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 15:40:10.430624 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 15:40:10.440556 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 15:40:10.454221 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 15:40:10.460375 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
578 15:40:10.460456 Enumerating buses...
579 15:40:10.466982 Show all devs... Before device enumeration.
580 15:40:10.467071 Root Device: enabled 1
581 15:40:10.470669 DOMAIN: 0000: enabled 1
582 15:40:10.473550 CPU_CLUSTER: 0: enabled 1
583 15:40:10.477514 PCI: 00:00.0: enabled 1
584 15:40:10.477591 PCI: 00:02.0: enabled 1
585 15:40:10.480196 PCI: 00:04.0: enabled 1
586 15:40:10.484133 PCI: 00:05.0: enabled 1
587 15:40:10.487485 PCI: 00:06.0: enabled 0
588 15:40:10.487560 PCI: 00:07.0: enabled 0
589 15:40:10.490244 PCI: 00:07.1: enabled 0
590 15:40:10.493823 PCI: 00:07.2: enabled 0
591 15:40:10.496964 PCI: 00:07.3: enabled 0
592 15:40:10.497040 PCI: 00:08.0: enabled 1
593 15:40:10.500340 PCI: 00:09.0: enabled 0
594 15:40:10.503494 PCI: 00:0a.0: enabled 0
595 15:40:10.503579 PCI: 00:0d.0: enabled 1
596 15:40:10.506894 PCI: 00:0d.1: enabled 0
597 15:40:10.510276 PCI: 00:0d.2: enabled 0
598 15:40:10.513573 PCI: 00:0d.3: enabled 0
599 15:40:10.513650 PCI: 00:0e.0: enabled 0
600 15:40:10.516818 PCI: 00:10.2: enabled 1
601 15:40:10.520293 PCI: 00:10.6: enabled 0
602 15:40:10.523862 PCI: 00:10.7: enabled 0
603 15:40:10.523938 PCI: 00:12.0: enabled 0
604 15:40:10.527003 PCI: 00:12.6: enabled 0
605 15:40:10.530676 PCI: 00:13.0: enabled 0
606 15:40:10.534202 PCI: 00:14.0: enabled 1
607 15:40:10.534281 PCI: 00:14.1: enabled 0
608 15:40:10.537112 PCI: 00:14.2: enabled 1
609 15:40:10.540433 PCI: 00:14.3: enabled 1
610 15:40:10.543611 PCI: 00:15.0: enabled 1
611 15:40:10.543682 PCI: 00:15.1: enabled 1
612 15:40:10.547039 PCI: 00:15.2: enabled 1
613 15:40:10.550504 PCI: 00:15.3: enabled 1
614 15:40:10.550583 PCI: 00:16.0: enabled 1
615 15:40:10.553686 PCI: 00:16.1: enabled 0
616 15:40:10.557000 PCI: 00:16.2: enabled 0
617 15:40:10.560460 PCI: 00:16.3: enabled 0
618 15:40:10.560542 PCI: 00:16.4: enabled 0
619 15:40:10.563734 PCI: 00:16.5: enabled 0
620 15:40:10.567006 PCI: 00:17.0: enabled 1
621 15:40:10.570598 PCI: 00:19.0: enabled 0
622 15:40:10.570673 PCI: 00:19.1: enabled 1
623 15:40:10.573718 PCI: 00:19.2: enabled 0
624 15:40:10.577142 PCI: 00:1c.0: enabled 1
625 15:40:10.580334 PCI: 00:1c.1: enabled 0
626 15:40:10.580411 PCI: 00:1c.2: enabled 0
627 15:40:10.583674 PCI: 00:1c.3: enabled 0
628 15:40:10.587040 PCI: 00:1c.4: enabled 0
629 15:40:10.587125 PCI: 00:1c.5: enabled 0
630 15:40:10.590002 PCI: 00:1c.6: enabled 1
631 15:40:10.593347 PCI: 00:1c.7: enabled 0
632 15:40:10.597135 PCI: 00:1d.0: enabled 1
633 15:40:10.597209 PCI: 00:1d.1: enabled 0
634 15:40:10.599947 PCI: 00:1d.2: enabled 1
635 15:40:10.603586 PCI: 00:1d.3: enabled 0
636 15:40:10.606786 PCI: 00:1e.0: enabled 1
637 15:40:10.606871 PCI: 00:1e.1: enabled 0
638 15:40:10.610176 PCI: 00:1e.2: enabled 1
639 15:40:10.613968 PCI: 00:1e.3: enabled 1
640 15:40:10.616999 PCI: 00:1f.0: enabled 1
641 15:40:10.617078 PCI: 00:1f.1: enabled 0
642 15:40:10.620459 PCI: 00:1f.2: enabled 1
643 15:40:10.623699 PCI: 00:1f.3: enabled 1
644 15:40:10.623775 PCI: 00:1f.4: enabled 0
645 15:40:10.626791 PCI: 00:1f.5: enabled 1
646 15:40:10.630630 PCI: 00:1f.6: enabled 0
647 15:40:10.633668 PCI: 00:1f.7: enabled 0
648 15:40:10.633791 APIC: 00: enabled 1
649 15:40:10.636979 GENERIC: 0.0: enabled 1
650 15:40:10.640115 GENERIC: 0.0: enabled 1
651 15:40:10.640191 GENERIC: 1.0: enabled 1
652 15:40:10.643597 GENERIC: 0.0: enabled 1
653 15:40:10.647139 GENERIC: 1.0: enabled 1
654 15:40:10.650000 USB0 port 0: enabled 1
655 15:40:10.650074 GENERIC: 0.0: enabled 1
656 15:40:10.653488 USB0 port 0: enabled 1
657 15:40:10.656879 GENERIC: 0.0: enabled 1
658 15:40:10.660117 I2C: 00:1a: enabled 1
659 15:40:10.660201 I2C: 00:31: enabled 1
660 15:40:10.663454 I2C: 00:32: enabled 1
661 15:40:10.666486 I2C: 00:10: enabled 1
662 15:40:10.666566 I2C: 00:15: enabled 1
663 15:40:10.670479 GENERIC: 0.0: enabled 0
664 15:40:10.673255 GENERIC: 1.0: enabled 0
665 15:40:10.673328 GENERIC: 0.0: enabled 1
666 15:40:10.676479 SPI: 00: enabled 1
667 15:40:10.680295 SPI: 00: enabled 1
668 15:40:10.680372 PNP: 0c09.0: enabled 1
669 15:40:10.683321 GENERIC: 0.0: enabled 1
670 15:40:10.686863 USB3 port 0: enabled 1
671 15:40:10.686938 USB3 port 1: enabled 1
672 15:40:10.689821 USB3 port 2: enabled 0
673 15:40:10.693452 USB3 port 3: enabled 0
674 15:40:10.696456 USB2 port 0: enabled 0
675 15:40:10.696535 USB2 port 1: enabled 1
676 15:40:10.699840 USB2 port 2: enabled 1
677 15:40:10.703290 USB2 port 3: enabled 0
678 15:40:10.703373 USB2 port 4: enabled 1
679 15:40:10.706542 USB2 port 5: enabled 0
680 15:40:10.709924 USB2 port 6: enabled 0
681 15:40:10.713255 USB2 port 7: enabled 0
682 15:40:10.713339 USB2 port 8: enabled 0
683 15:40:10.716352 USB2 port 9: enabled 0
684 15:40:10.719989 USB3 port 0: enabled 0
685 15:40:10.720074 USB3 port 1: enabled 1
686 15:40:10.723220 USB3 port 2: enabled 0
687 15:40:10.726687 USB3 port 3: enabled 0
688 15:40:10.726761 GENERIC: 0.0: enabled 1
689 15:40:10.729753 GENERIC: 1.0: enabled 1
690 15:40:10.733177 APIC: 01: enabled 1
691 15:40:10.733259 APIC: 03: enabled 1
692 15:40:10.736429 APIC: 05: enabled 1
693 15:40:10.739784 APIC: 07: enabled 1
694 15:40:10.739867 APIC: 06: enabled 1
695 15:40:10.743242 APIC: 02: enabled 1
696 15:40:10.746292 APIC: 04: enabled 1
697 15:40:10.746367 Compare with tree...
698 15:40:10.749692 Root Device: enabled 1
699 15:40:10.753076 DOMAIN: 0000: enabled 1
700 15:40:10.753151 PCI: 00:00.0: enabled 1
701 15:40:10.756428 PCI: 00:02.0: enabled 1
702 15:40:10.759746 PCI: 00:04.0: enabled 1
703 15:40:10.763528 GENERIC: 0.0: enabled 1
704 15:40:10.766177 PCI: 00:05.0: enabled 1
705 15:40:10.766253 PCI: 00:06.0: enabled 0
706 15:40:10.769688 PCI: 00:07.0: enabled 0
707 15:40:10.773100 GENERIC: 0.0: enabled 1
708 15:40:10.776468 PCI: 00:07.1: enabled 0
709 15:40:10.779702 GENERIC: 1.0: enabled 1
710 15:40:10.779778 PCI: 00:07.2: enabled 0
711 15:40:10.783422 GENERIC: 0.0: enabled 1
712 15:40:10.786503 PCI: 00:07.3: enabled 0
713 15:40:10.790007 GENERIC: 1.0: enabled 1
714 15:40:10.793017 PCI: 00:08.0: enabled 1
715 15:40:10.796670 PCI: 00:09.0: enabled 0
716 15:40:10.796784 PCI: 00:0a.0: enabled 0
717 15:40:10.799659 PCI: 00:0d.0: enabled 1
718 15:40:10.803225 USB0 port 0: enabled 1
719 15:40:10.806468 USB3 port 0: enabled 1
720 15:40:10.809932 USB3 port 1: enabled 1
721 15:40:10.810008 USB3 port 2: enabled 0
722 15:40:10.812972 USB3 port 3: enabled 0
723 15:40:10.816522 PCI: 00:0d.1: enabled 0
724 15:40:10.819385 PCI: 00:0d.2: enabled 0
725 15:40:10.822730 GENERIC: 0.0: enabled 1
726 15:40:10.822809 PCI: 00:0d.3: enabled 0
727 15:40:10.826822 PCI: 00:0e.0: enabled 0
728 15:40:10.829600 PCI: 00:10.2: enabled 1
729 15:40:10.832555 PCI: 00:10.6: enabled 0
730 15:40:10.836135 PCI: 00:10.7: enabled 0
731 15:40:10.836207 PCI: 00:12.0: enabled 0
732 15:40:10.840185 PCI: 00:12.6: enabled 0
733 15:40:10.842861 PCI: 00:13.0: enabled 0
734 15:40:10.846324 PCI: 00:14.0: enabled 1
735 15:40:10.849566 USB0 port 0: enabled 1
736 15:40:10.849636 USB2 port 0: enabled 0
737 15:40:10.852637 USB2 port 1: enabled 1
738 15:40:10.855992 USB2 port 2: enabled 1
739 15:40:10.859491 USB2 port 3: enabled 0
740 15:40:10.862528 USB2 port 4: enabled 1
741 15:40:10.862599 USB2 port 5: enabled 0
742 15:40:10.866162 USB2 port 6: enabled 0
743 15:40:10.869281 USB2 port 7: enabled 0
744 15:40:10.872670 USB2 port 8: enabled 0
745 15:40:10.875885 USB2 port 9: enabled 0
746 15:40:10.879244 USB3 port 0: enabled 0
747 15:40:10.879314 USB3 port 1: enabled 1
748 15:40:10.882699 USB3 port 2: enabled 0
749 15:40:10.885960 USB3 port 3: enabled 0
750 15:40:10.889614 PCI: 00:14.1: enabled 0
751 15:40:10.893001 PCI: 00:14.2: enabled 1
752 15:40:10.893070 PCI: 00:14.3: enabled 1
753 15:40:10.895979 GENERIC: 0.0: enabled 1
754 15:40:10.899358 PCI: 00:15.0: enabled 1
755 15:40:10.903023 I2C: 00:1a: enabled 1
756 15:40:10.905877 I2C: 00:31: enabled 1
757 15:40:10.905971 I2C: 00:32: enabled 1
758 15:40:10.909450 PCI: 00:15.1: enabled 1
759 15:40:10.912412 I2C: 00:10: enabled 1
760 15:40:10.916603 PCI: 00:15.2: enabled 1
761 15:40:10.916712 PCI: 00:15.3: enabled 1
762 15:40:10.919338 PCI: 00:16.0: enabled 1
763 15:40:10.922821 PCI: 00:16.1: enabled 0
764 15:40:10.926570 PCI: 00:16.2: enabled 0
765 15:40:10.930435 PCI: 00:16.3: enabled 0
766 15:40:10.930579 PCI: 00:16.4: enabled 0
767 15:40:10.934328 PCI: 00:16.5: enabled 0
768 15:40:10.937174 PCI: 00:17.0: enabled 1
769 15:40:10.937370 PCI: 00:19.0: enabled 0
770 15:40:10.940557 PCI: 00:19.1: enabled 1
771 15:40:10.943929 I2C: 00:15: enabled 1
772 15:40:10.947633 PCI: 00:19.2: enabled 0
773 15:40:10.950549 PCI: 00:1d.0: enabled 1
774 15:40:10.950840 GENERIC: 0.0: enabled 1
775 15:40:10.954031 PCI: 00:1e.0: enabled 1
776 15:40:10.957583 PCI: 00:1e.1: enabled 0
777 15:40:10.960676 PCI: 00:1e.2: enabled 1
778 15:40:10.963994 SPI: 00: enabled 1
779 15:40:10.964400 PCI: 00:1e.3: enabled 1
780 15:40:10.967837 SPI: 00: enabled 1
781 15:40:10.970409 PCI: 00:1f.0: enabled 1
782 15:40:11.021834 PNP: 0c09.0: enabled 1
783 15:40:11.022358 PCI: 00:1f.1: enabled 0
784 15:40:11.022818 PCI: 00:1f.2: enabled 1
785 15:40:11.023626 GENERIC: 0.0: enabled 1
786 15:40:11.024013 GENERIC: 0.0: enabled 1
787 15:40:11.024444 GENERIC: 1.0: enabled 1
788 15:40:11.024870 PCI: 00:1f.3: enabled 1
789 15:40:11.025291 PCI: 00:1f.4: enabled 0
790 15:40:11.025698 PCI: 00:1f.5: enabled 1
791 15:40:11.026141 PCI: 00:1f.6: enabled 0
792 15:40:11.026544 PCI: 00:1f.7: enabled 0
793 15:40:11.026956 CPU_CLUSTER: 0: enabled 1
794 15:40:11.027352 APIC: 00: enabled 1
795 15:40:11.027746 APIC: 01: enabled 1
796 15:40:11.028134 APIC: 03: enabled 1
797 15:40:11.028523 APIC: 05: enabled 1
798 15:40:11.028914 APIC: 07: enabled 1
799 15:40:11.029301 APIC: 06: enabled 1
800 15:40:11.030046 APIC: 02: enabled 1
801 15:40:11.030418 APIC: 04: enabled 1
802 15:40:11.072847 Root Device scanning...
803 15:40:11.073312 scan_static_bus for Root Device
804 15:40:11.073802 DOMAIN: 0000 enabled
805 15:40:11.074240 CPU_CLUSTER: 0 enabled
806 15:40:11.074692 DOMAIN: 0000 scanning...
807 15:40:11.075459 PCI: pci_scan_bus for bus 00
808 15:40:11.075864 PCI: 00:00.0 [8086/0000] ops
809 15:40:11.076283 PCI: 00:00.0 [8086/9a12] enabled
810 15:40:11.076698 PCI: 00:02.0 [8086/0000] bus ops
811 15:40:11.077123 PCI: 00:02.0 [8086/9a40] enabled
812 15:40:11.077544 PCI: 00:04.0 [8086/0000] bus ops
813 15:40:11.077961 PCI: 00:04.0 [8086/9a03] enabled
814 15:40:11.078362 PCI: 00:05.0 [8086/9a19] enabled
815 15:40:11.078760 PCI: 00:07.0 [0000/0000] hidden
816 15:40:11.079151 PCI: 00:08.0 [8086/9a11] enabled
817 15:40:11.079541 PCI: 00:0a.0 [8086/9a0d] disabled
818 15:40:11.079932 PCI: 00:0d.0 [8086/0000] bus ops
819 15:40:11.080679 PCI: 00:0d.0 [8086/9a13] enabled
820 15:40:11.081398 PCI: 00:14.0 [8086/0000] bus ops
821 15:40:11.084673 PCI: 00:14.0 [8086/a0ed] enabled
822 15:40:11.088158 PCI: 00:14.2 [8086/a0ef] enabled
823 15:40:11.091245 PCI: 00:14.3 [8086/0000] bus ops
824 15:40:11.094600 PCI: 00:14.3 [8086/a0f0] enabled
825 15:40:11.097694 PCI: 00:15.0 [8086/0000] bus ops
826 15:40:11.101471 PCI: 00:15.0 [8086/a0e8] enabled
827 15:40:11.104657 PCI: 00:15.1 [8086/0000] bus ops
828 15:40:11.107799 PCI: 00:15.1 [8086/a0e9] enabled
829 15:40:11.111177 PCI: 00:15.2 [8086/0000] bus ops
830 15:40:11.114313 PCI: 00:15.2 [8086/a0ea] enabled
831 15:40:11.117851 PCI: 00:15.3 [8086/0000] bus ops
832 15:40:11.121261 PCI: 00:15.3 [8086/a0eb] enabled
833 15:40:11.124509 PCI: 00:16.0 [8086/0000] ops
834 15:40:11.127509 PCI: 00:16.0 [8086/a0e0] enabled
835 15:40:11.131047 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 15:40:11.134521 PCI: 00:19.0 [8086/0000] bus ops
837 15:40:11.140944 PCI: 00:19.0 [8086/a0c5] disabled
838 15:40:11.143982 PCI: 00:19.1 [8086/0000] bus ops
839 15:40:11.147436 PCI: 00:19.1 [8086/a0c6] enabled
840 15:40:11.151073 PCI: 00:1d.0 [8086/0000] bus ops
841 15:40:11.154194 PCI: 00:1d.0 [8086/a0b0] enabled
842 15:40:11.154588 PCI: 00:1e.0 [8086/0000] ops
843 15:40:11.157887 PCI: 00:1e.0 [8086/a0a8] enabled
844 15:40:11.160906 PCI: 00:1e.2 [8086/0000] bus ops
845 15:40:11.164093 PCI: 00:1e.2 [8086/a0aa] enabled
846 15:40:11.167484 PCI: 00:1e.3 [8086/0000] bus ops
847 15:40:11.170983 PCI: 00:1e.3 [8086/a0ab] enabled
848 15:40:11.174025 PCI: 00:1f.0 [8086/0000] bus ops
849 15:40:11.177569 PCI: 00:1f.0 [8086/a087] enabled
850 15:40:11.181253 RTC Init
851 15:40:11.184077 Set power on after power failure.
852 15:40:11.184460 Disabling Deep S3
853 15:40:11.187702 Disabling Deep S3
854 15:40:11.190917 Disabling Deep S4
855 15:40:11.191304 Disabling Deep S4
856 15:40:11.194205 Disabling Deep S5
857 15:40:11.194581 Disabling Deep S5
858 15:40:11.197382 PCI: 00:1f.2 [0000/0000] hidden
859 15:40:11.200959 PCI: 00:1f.3 [8086/0000] bus ops
860 15:40:11.204622 PCI: 00:1f.3 [8086/a0c8] enabled
861 15:40:11.207154 PCI: 00:1f.5 [8086/0000] bus ops
862 15:40:11.210450 PCI: 00:1f.5 [8086/a0a4] enabled
863 15:40:11.214300 PCI: Leftover static devices:
864 15:40:11.217105 PCI: 00:10.2
865 15:40:11.217481 PCI: 00:10.6
866 15:40:11.217849 PCI: 00:10.7
867 15:40:11.220484 PCI: 00:06.0
868 15:40:11.220854 PCI: 00:07.1
869 15:40:11.223834 PCI: 00:07.2
870 15:40:11.224216 PCI: 00:07.3
871 15:40:11.227697 PCI: 00:09.0
872 15:40:11.228080 PCI: 00:0d.1
873 15:40:11.228429 PCI: 00:0d.2
874 15:40:11.230783 PCI: 00:0d.3
875 15:40:11.231154 PCI: 00:0e.0
876 15:40:11.234020 PCI: 00:12.0
877 15:40:11.234398 PCI: 00:12.6
878 15:40:11.234719 PCI: 00:13.0
879 15:40:11.237524 PCI: 00:14.1
880 15:40:11.237942 PCI: 00:16.1
881 15:40:11.240527 PCI: 00:16.2
882 15:40:11.240923 PCI: 00:16.3
883 15:40:11.241243 PCI: 00:16.4
884 15:40:11.243964 PCI: 00:16.5
885 15:40:11.244359 PCI: 00:17.0
886 15:40:11.247204 PCI: 00:19.2
887 15:40:11.247654 PCI: 00:1e.1
888 15:40:11.250378 PCI: 00:1f.1
889 15:40:11.250828 PCI: 00:1f.4
890 15:40:11.251186 PCI: 00:1f.6
891 15:40:11.254156 PCI: 00:1f.7
892 15:40:11.257171 PCI: Check your devicetree.cb.
893 15:40:11.257623 PCI: 00:02.0 scanning...
894 15:40:11.264190 scan_generic_bus for PCI: 00:02.0
895 15:40:11.267157 scan_generic_bus for PCI: 00:02.0 done
896 15:40:11.271029 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 15:40:11.274007 PCI: 00:04.0 scanning...
898 15:40:11.277521 scan_generic_bus for PCI: 00:04.0
899 15:40:11.280805 GENERIC: 0.0 enabled
900 15:40:11.284198 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 15:40:11.290558 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 15:40:11.294471 PCI: 00:0d.0 scanning...
903 15:40:11.297979 scan_static_bus for PCI: 00:0d.0
904 15:40:11.298442 USB0 port 0 enabled
905 15:40:11.300454 USB0 port 0 scanning...
906 15:40:11.303594 scan_static_bus for USB0 port 0
907 15:40:11.307461 USB3 port 0 enabled
908 15:40:11.307908 USB3 port 1 enabled
909 15:40:11.310218 USB3 port 2 disabled
910 15:40:11.313978 USB3 port 3 disabled
911 15:40:11.314425 USB3 port 0 scanning...
912 15:40:11.317251 scan_static_bus for USB3 port 0
913 15:40:11.323710 scan_static_bus for USB3 port 0 done
914 15:40:11.327108 scan_bus: bus USB3 port 0 finished in 6 msecs
915 15:40:11.330371 USB3 port 1 scanning...
916 15:40:11.333525 scan_static_bus for USB3 port 1
917 15:40:11.337137 scan_static_bus for USB3 port 1 done
918 15:40:11.340834 scan_bus: bus USB3 port 1 finished in 6 msecs
919 15:40:11.343942 scan_static_bus for USB0 port 0 done
920 15:40:11.350094 scan_bus: bus USB0 port 0 finished in 43 msecs
921 15:40:11.353612 scan_static_bus for PCI: 00:0d.0 done
922 15:40:11.356887 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 15:40:11.360326 PCI: 00:14.0 scanning...
924 15:40:11.363451 scan_static_bus for PCI: 00:14.0
925 15:40:11.366171 USB0 port 0 enabled
926 15:40:11.369585 USB0 port 0 scanning...
927 15:40:11.373261 scan_static_bus for USB0 port 0
928 15:40:11.373336 USB2 port 0 disabled
929 15:40:11.376239 USB2 port 1 enabled
930 15:40:11.379416 USB2 port 2 enabled
931 15:40:11.379489 USB2 port 3 disabled
932 15:40:11.383255 USB2 port 4 enabled
933 15:40:11.383328 USB2 port 5 disabled
934 15:40:11.386135 USB2 port 6 disabled
935 15:40:11.389862 USB2 port 7 disabled
936 15:40:11.389934 USB2 port 8 disabled
937 15:40:11.392988 USB2 port 9 disabled
938 15:40:11.396095 USB3 port 0 disabled
939 15:40:11.396172 USB3 port 1 enabled
940 15:40:11.399461 USB3 port 2 disabled
941 15:40:11.402875 USB3 port 3 disabled
942 15:40:11.402949 USB2 port 1 scanning...
943 15:40:11.406423 scan_static_bus for USB2 port 1
944 15:40:11.409895 scan_static_bus for USB2 port 1 done
945 15:40:11.416397 scan_bus: bus USB2 port 1 finished in 6 msecs
946 15:40:11.419276 USB2 port 2 scanning...
947 15:40:11.422956 scan_static_bus for USB2 port 2
948 15:40:11.426569 scan_static_bus for USB2 port 2 done
949 15:40:11.429425 scan_bus: bus USB2 port 2 finished in 6 msecs
950 15:40:11.432631 USB2 port 4 scanning...
951 15:40:11.436261 scan_static_bus for USB2 port 4
952 15:40:11.439614 scan_static_bus for USB2 port 4 done
953 15:40:11.442852 scan_bus: bus USB2 port 4 finished in 6 msecs
954 15:40:11.446186 USB3 port 1 scanning...
955 15:40:11.449568 scan_static_bus for USB3 port 1
956 15:40:11.452593 scan_static_bus for USB3 port 1 done
957 15:40:11.460345 scan_bus: bus USB3 port 1 finished in 6 msecs
958 15:40:11.462627 scan_static_bus for USB0 port 0 done
959 15:40:11.466322 scan_bus: bus USB0 port 0 finished in 93 msecs
960 15:40:11.469242 scan_static_bus for PCI: 00:14.0 done
961 15:40:11.475966 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
962 15:40:11.479154 PCI: 00:14.3 scanning...
963 15:40:11.482628 scan_static_bus for PCI: 00:14.3
964 15:40:11.482703 GENERIC: 0.0 enabled
965 15:40:11.485837 scan_static_bus for PCI: 00:14.3 done
966 15:40:11.492419 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 15:40:11.495576 PCI: 00:15.0 scanning...
968 15:40:11.499090 scan_static_bus for PCI: 00:15.0
969 15:40:11.499164 I2C: 00:1a enabled
970 15:40:11.502832 I2C: 00:31 enabled
971 15:40:11.502903 I2C: 00:32 enabled
972 15:40:11.506668 scan_static_bus for PCI: 00:15.0 done
973 15:40:11.513208 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
974 15:40:11.516568 PCI: 00:15.1 scanning...
975 15:40:11.519883 scan_static_bus for PCI: 00:15.1
976 15:40:11.519958 I2C: 00:10 enabled
977 15:40:11.522999 scan_static_bus for PCI: 00:15.1 done
978 15:40:11.529795 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 15:40:11.533247 PCI: 00:15.2 scanning...
980 15:40:11.536593 scan_static_bus for PCI: 00:15.2
981 15:40:11.539543 scan_static_bus for PCI: 00:15.2 done
982 15:40:11.543163 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 15:40:11.546508 PCI: 00:15.3 scanning...
984 15:40:11.549609 scan_static_bus for PCI: 00:15.3
985 15:40:11.553184 scan_static_bus for PCI: 00:15.3 done
986 15:40:11.559495 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 15:40:11.559573 PCI: 00:19.1 scanning...
988 15:40:11.563147 scan_static_bus for PCI: 00:19.1
989 15:40:11.566124 I2C: 00:15 enabled
990 15:40:11.569988 scan_static_bus for PCI: 00:19.1 done
991 15:40:11.576233 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 15:40:11.576313 PCI: 00:1d.0 scanning...
993 15:40:11.582793 do_pci_scan_bridge for PCI: 00:1d.0
994 15:40:11.582873 PCI: pci_scan_bus for bus 01
995 15:40:11.585947 PCI: 01:00.0 [1c5c/174a] enabled
996 15:40:11.589861 GENERIC: 0.0 enabled
997 15:40:11.592621 Enabling Common Clock Configuration
998 15:40:11.599649 L1 Sub-State supported from root port 29
999 15:40:11.599724 L1 Sub-State Support = 0xf
1000 15:40:11.602473 CommonModeRestoreTime = 0x28
1001 15:40:11.609366 Power On Value = 0x16, Power On Scale = 0x0
1002 15:40:11.609445 ASPM: Enabled L1
1003 15:40:11.612450 PCIe: Max_Payload_Size adjusted to 128
1004 15:40:11.619541 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 15:40:11.622651 PCI: 00:1e.2 scanning...
1006 15:40:11.625808 scan_generic_bus for PCI: 00:1e.2
1007 15:40:11.625881 SPI: 00 enabled
1008 15:40:11.632751 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 15:40:11.635740 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 15:40:11.638819 PCI: 00:1e.3 scanning...
1011 15:40:11.642726 scan_generic_bus for PCI: 00:1e.3
1012 15:40:11.645586 SPI: 00 enabled
1013 15:40:11.652423 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 15:40:11.655711 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 15:40:11.658966 PCI: 00:1f.0 scanning...
1016 15:40:11.662320 scan_static_bus for PCI: 00:1f.0
1017 15:40:11.665924 PNP: 0c09.0 enabled
1018 15:40:11.666001 PNP: 0c09.0 scanning...
1019 15:40:11.669117 scan_static_bus for PNP: 0c09.0
1020 15:40:11.672081 scan_static_bus for PNP: 0c09.0 done
1021 15:40:11.679146 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 15:40:11.682105 scan_static_bus for PCI: 00:1f.0 done
1023 15:40:11.685666 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 15:40:11.688715 PCI: 00:1f.2 scanning...
1025 15:40:11.691850 scan_static_bus for PCI: 00:1f.2
1026 15:40:11.695209 GENERIC: 0.0 enabled
1027 15:40:11.698747 GENERIC: 0.0 scanning...
1028 15:40:11.702441 scan_static_bus for GENERIC: 0.0
1029 15:40:11.702513 GENERIC: 0.0 enabled
1030 15:40:11.705203 GENERIC: 1.0 enabled
1031 15:40:11.708621 scan_static_bus for GENERIC: 0.0 done
1032 15:40:11.715252 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 15:40:11.718507 scan_static_bus for PCI: 00:1f.2 done
1034 15:40:11.722099 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 15:40:11.725177 PCI: 00:1f.3 scanning...
1036 15:40:11.728329 scan_static_bus for PCI: 00:1f.3
1037 15:40:11.731673 scan_static_bus for PCI: 00:1f.3 done
1038 15:40:11.738540 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 15:40:11.738617 PCI: 00:1f.5 scanning...
1040 15:40:11.745346 scan_generic_bus for PCI: 00:1f.5
1041 15:40:11.748129 scan_generic_bus for PCI: 00:1f.5 done
1042 15:40:11.751568 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 15:40:11.758114 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1044 15:40:11.761622 scan_static_bus for Root Device done
1045 15:40:11.764884 scan_bus: bus Root Device finished in 737 msecs
1046 15:40:11.764958 done
1047 15:40:11.771354 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1048 15:40:11.774840 Chrome EC: UHEPI supported
1049 15:40:11.781434 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 15:40:11.788392 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 15:40:11.791730 SPI flash protection: WPSW=0 SRP0=0
1052 15:40:11.795058 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 15:40:11.801586 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 15:40:11.804561 found VGA at PCI: 00:02.0
1055 15:40:11.807917 Setting up VGA for PCI: 00:02.0
1056 15:40:11.815021 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 15:40:11.818034 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 15:40:11.821324 Allocating resources...
1059 15:40:11.821401 Reading resources...
1060 15:40:11.827930 Root Device read_resources bus 0 link: 0
1061 15:40:11.831189 DOMAIN: 0000 read_resources bus 0 link: 0
1062 15:40:11.834558 PCI: 00:04.0 read_resources bus 1 link: 0
1063 15:40:11.841629 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 15:40:11.844772 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 15:40:11.851847 USB0 port 0 read_resources bus 0 link: 0
1066 15:40:11.854919 USB0 port 0 read_resources bus 0 link: 0 done
1067 15:40:11.861713 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 15:40:11.865310 PCI: 00:14.0 read_resources bus 0 link: 0
1069 15:40:11.868177 USB0 port 0 read_resources bus 0 link: 0
1070 15:40:11.875808 USB0 port 0 read_resources bus 0 link: 0 done
1071 15:40:11.879363 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 15:40:11.886284 PCI: 00:14.3 read_resources bus 0 link: 0
1073 15:40:11.889351 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 15:40:11.896423 PCI: 00:15.0 read_resources bus 0 link: 0
1075 15:40:11.899634 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 15:40:11.906647 PCI: 00:15.1 read_resources bus 0 link: 0
1077 15:40:11.909255 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 15:40:11.916744 PCI: 00:19.1 read_resources bus 0 link: 0
1079 15:40:11.920044 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 15:40:11.926678 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 15:40:11.930064 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 15:40:11.936457 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 15:40:11.940465 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 15:40:11.946600 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 15:40:11.949898 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 15:40:11.956810 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 15:40:11.959810 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 15:40:11.963037 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 15:40:11.970005 GENERIC: 0.0 read_resources bus 0 link: 0
1090 15:40:11.973535 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 15:40:11.979941 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 15:40:11.986746 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 15:40:11.990103 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 15:40:11.996409 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 15:40:12.000046 Root Device read_resources bus 0 link: 0 done
1096 15:40:12.003118 Done reading resources.
1097 15:40:12.006475 Show resources in subtree (Root Device)...After reading.
1098 15:40:12.013117 Root Device child on link 0 DOMAIN: 0000
1099 15:40:12.016445 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 15:40:12.026229 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 15:40:12.036096 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 15:40:12.036183 PCI: 00:00.0
1103 15:40:12.045981 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 15:40:12.056170 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 15:40:12.065999 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 15:40:12.076013 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 15:40:12.086450 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 15:40:12.092885 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 15:40:12.102482 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 15:40:12.112695 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 15:40:12.122992 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 15:40:12.132288 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 15:40:12.138983 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 15:40:12.148912 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 15:40:12.158734 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 15:40:12.169307 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 15:40:12.179065 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 15:40:12.188806 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 15:40:12.198941 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 15:40:12.205490 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 15:40:12.215328 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 15:40:12.225452 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 15:40:12.228432 PCI: 00:02.0
1124 15:40:12.238410 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 15:40:12.248467 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 15:40:12.254980 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 15:40:12.261495 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 15:40:12.272017 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 15:40:12.272105 GENERIC: 0.0
1130 15:40:12.274942 PCI: 00:05.0
1131 15:40:12.285241 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 15:40:12.288553 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 15:40:12.291860 GENERIC: 0.0
1134 15:40:12.291937 PCI: 00:08.0
1135 15:40:12.301657 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 15:40:12.305282 PCI: 00:0a.0
1137 15:40:12.308341 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 15:40:12.318279 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 15:40:12.321649 USB0 port 0 child on link 0 USB3 port 0
1140 15:40:12.325008 USB3 port 0
1141 15:40:12.325094 USB3 port 1
1142 15:40:12.328232 USB3 port 2
1143 15:40:12.331434 USB3 port 3
1144 15:40:12.334699 PCI: 00:14.0 child on link 0 USB0 port 0
1145 15:40:12.344979 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 15:40:12.348204 USB0 port 0 child on link 0 USB2 port 0
1147 15:40:12.351548 USB2 port 0
1148 15:40:12.351647 USB2 port 1
1149 15:40:12.355112 USB2 port 2
1150 15:40:12.355211 USB2 port 3
1151 15:40:12.358595 USB2 port 4
1152 15:40:12.358680 USB2 port 5
1153 15:40:12.361488 USB2 port 6
1154 15:40:12.361573 USB2 port 7
1155 15:40:12.364521 USB2 port 8
1156 15:40:12.368140 USB2 port 9
1157 15:40:12.368226 USB3 port 0
1158 15:40:12.371217 USB3 port 1
1159 15:40:12.371315 USB3 port 2
1160 15:40:12.374700 USB3 port 3
1161 15:40:12.374785 PCI: 00:14.2
1162 15:40:12.384711 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 15:40:12.394674 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 15:40:12.398238 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 15:40:12.407887 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 15:40:12.411311 GENERIC: 0.0
1167 15:40:12.414470 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 15:40:12.424522 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 15:40:12.428109 I2C: 00:1a
1170 15:40:12.428196 I2C: 00:31
1171 15:40:12.431471 I2C: 00:32
1172 15:40:12.434582 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 15:40:12.444474 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 15:40:12.444563 I2C: 00:10
1175 15:40:12.448159 PCI: 00:15.2
1176 15:40:12.458232 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 15:40:12.458327 PCI: 00:15.3
1178 15:40:12.467950 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 15:40:12.471201 PCI: 00:16.0
1180 15:40:12.480850 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:40:12.480955 PCI: 00:19.0
1182 15:40:12.487546 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 15:40:12.497528 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 15:40:12.497616 I2C: 00:15
1185 15:40:12.504115 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 15:40:12.510889 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 15:40:12.520802 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 15:40:12.531049 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 15:40:12.531135 GENERIC: 0.0
1190 15:40:12.534474 PCI: 01:00.0
1191 15:40:12.543863 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 15:40:12.553885 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1193 15:40:12.564173 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1194 15:40:12.564261 PCI: 00:1e.0
1195 15:40:12.573847 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 15:40:12.580851 PCI: 00:1e.2 child on link 0 SPI: 00
1197 15:40:12.590555 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 15:40:12.590641 SPI: 00
1199 15:40:12.594094 PCI: 00:1e.3 child on link 0 SPI: 00
1200 15:40:12.604021 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 15:40:12.607048 SPI: 00
1202 15:40:12.610905 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1203 15:40:12.620554 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1204 15:40:12.620633 PNP: 0c09.0
1205 15:40:12.630756 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 15:40:12.634067 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1207 15:40:12.643984 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 15:40:12.653609 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1209 15:40:12.657166 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1210 15:40:12.660506 GENERIC: 0.0
1211 15:40:12.660591 GENERIC: 1.0
1212 15:40:12.663953 PCI: 00:1f.3
1213 15:40:12.673708 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 15:40:12.683640 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 15:40:12.683726 PCI: 00:1f.5
1216 15:40:12.693605 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 15:40:12.696905 CPU_CLUSTER: 0 child on link 0 APIC: 00
1218 15:40:12.700015 APIC: 00
1219 15:40:12.700100 APIC: 01
1220 15:40:12.700185 APIC: 03
1221 15:40:12.703386 APIC: 05
1222 15:40:12.703471 APIC: 07
1223 15:40:12.706917 APIC: 06
1224 15:40:12.707005 APIC: 02
1225 15:40:12.707071 APIC: 04
1226 15:40:12.716732 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1227 15:40:12.719965 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1228 15:40:12.726601 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1229 15:40:12.733378 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1230 15:40:12.736984 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 15:40:12.743393 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1232 15:40:12.746974 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1233 15:40:12.753298 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1234 15:40:12.759903 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 15:40:12.770135 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 15:40:12.776721 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1237 15:40:12.783015 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1238 15:40:12.789684 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 15:40:12.796711 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1240 15:40:12.803395 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1241 15:40:12.806062 DOMAIN: 0000: Resource ranges:
1242 15:40:12.809961 * Base: 1000, Size: 800, Tag: 100
1243 15:40:12.816168 * Base: 1900, Size: e700, Tag: 100
1244 15:40:12.819650 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1245 15:40:12.826344 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1246 15:40:12.832697 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1247 15:40:12.842914 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1248 15:40:12.849508 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1249 15:40:12.855983 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1250 15:40:12.865852 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1251 15:40:12.872734 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1252 15:40:12.879484 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1253 15:40:12.889257 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1254 15:40:12.895669 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1255 15:40:12.902384 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1256 15:40:12.908981 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1257 15:40:12.919109 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1258 15:40:12.925542 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1259 15:40:12.932332 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1260 15:40:12.942056 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1261 15:40:12.949029 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1262 15:40:12.955345 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1263 15:40:12.965572 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1264 15:40:12.972291 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1265 15:40:12.979299 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1266 15:40:12.988979 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1267 15:40:12.995156 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1268 15:40:13.001962 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1269 15:40:13.005240 DOMAIN: 0000: Resource ranges:
1270 15:40:13.011834 * Base: 7fc00000, Size: 40400000, Tag: 200
1271 15:40:13.015064 * Base: d0000000, Size: 28000000, Tag: 200
1272 15:40:13.018362 * Base: fa000000, Size: 1000000, Tag: 200
1273 15:40:13.025164 * Base: fb001000, Size: 2fff000, Tag: 200
1274 15:40:13.028680 * Base: fe010000, Size: 2e000, Tag: 200
1275 15:40:13.031886 * Base: fe03f000, Size: d41000, Tag: 200
1276 15:40:13.035376 * Base: fed88000, Size: 8000, Tag: 200
1277 15:40:13.041890 * Base: fed93000, Size: d000, Tag: 200
1278 15:40:13.045292 * Base: feda2000, Size: 1e000, Tag: 200
1279 15:40:13.048589 * Base: fede0000, Size: 1220000, Tag: 200
1280 15:40:13.055541 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1281 15:40:13.061618 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1282 15:40:13.068574 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1283 15:40:13.074866 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1284 15:40:13.081580 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1285 15:40:13.088178 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1286 15:40:13.094958 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1287 15:40:13.101965 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1288 15:40:13.108294 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1289 15:40:13.114681 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1290 15:40:13.121319 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1291 15:40:13.127809 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1292 15:40:13.134508 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1293 15:40:13.141814 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1294 15:40:13.148116 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1295 15:40:13.154829 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1296 15:40:13.161272 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1297 15:40:13.167632 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1298 15:40:13.174384 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1299 15:40:13.181232 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1300 15:40:13.187735 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1301 15:40:13.194261 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1302 15:40:13.201124 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1303 15:40:13.207605 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1304 15:40:13.214336 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1305 15:40:13.217667 PCI: 00:1d.0: Resource ranges:
1306 15:40:13.220965 * Base: 7fc00000, Size: 100000, Tag: 200
1307 15:40:13.227457 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1308 15:40:13.234605 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1309 15:40:13.241005 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1310 15:40:13.251490 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1311 15:40:13.257701 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1312 15:40:13.261232 Root Device assign_resources, bus 0 link: 0
1313 15:40:13.267854 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 15:40:13.274538 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1315 15:40:13.284077 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1316 15:40:13.290741 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1317 15:40:13.300957 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1318 15:40:13.304201 PCI: 00:04.0 assign_resources, bus 1 link: 0
1319 15:40:13.310597 PCI: 00:04.0 assign_resources, bus 1 link: 0
1320 15:40:13.317054 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1321 15:40:13.327113 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1322 15:40:13.333659 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1323 15:40:13.337261 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1324 15:40:13.343712 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1325 15:40:13.350674 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1326 15:40:13.357154 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 15:40:13.360544 PCI: 00:14.0 assign_resources, bus 0 link: 0
1328 15:40:13.370761 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1329 15:40:13.377318 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1330 15:40:13.383741 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1331 15:40:13.390120 PCI: 00:14.3 assign_resources, bus 0 link: 0
1332 15:40:13.393709 PCI: 00:14.3 assign_resources, bus 0 link: 0
1333 15:40:13.403370 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1334 15:40:13.406701 PCI: 00:15.0 assign_resources, bus 0 link: 0
1335 15:40:13.413439 PCI: 00:15.0 assign_resources, bus 0 link: 0
1336 15:40:13.420088 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1337 15:40:13.423247 PCI: 00:15.1 assign_resources, bus 0 link: 0
1338 15:40:13.429691 PCI: 00:15.1 assign_resources, bus 0 link: 0
1339 15:40:13.436293 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1340 15:40:13.446965 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1341 15:40:13.453026 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1342 15:40:13.463093 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1343 15:40:13.466752 PCI: 00:19.1 assign_resources, bus 0 link: 0
1344 15:40:13.473145 PCI: 00:19.1 assign_resources, bus 0 link: 0
1345 15:40:13.479543 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1346 15:40:13.489886 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 15:40:13.499734 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1348 15:40:13.502733 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 15:40:13.512679 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1350 15:40:13.519162 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1351 15:40:13.525821 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1352 15:40:13.532816 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1353 15:40:13.539108 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1354 15:40:13.545658 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1355 15:40:13.549161 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1356 15:40:13.559201 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1357 15:40:13.562158 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1358 15:40:13.566255 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1359 15:40:13.572235 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 15:40:13.575529 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 15:40:13.582625 LPC: Trying to open IO window from 800 size 1ff
1362 15:40:13.588781 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1363 15:40:13.599092 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1364 15:40:13.605817 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1365 15:40:13.612154 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 15:40:13.615903 Root Device assign_resources, bus 0 link: 0
1367 15:40:13.619035 Done setting resources.
1368 15:40:13.625473 Show resources in subtree (Root Device)...After assigning values.
1369 15:40:13.628875 Root Device child on link 0 DOMAIN: 0000
1370 15:40:13.632549 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 15:40:13.642516 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1372 15:40:13.652109 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1373 15:40:13.655309 PCI: 00:00.0
1374 15:40:13.662207 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 15:40:13.671895 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 15:40:13.682156 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 15:40:13.692211 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 15:40:13.701835 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 15:40:13.711786 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 15:40:13.718365 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 15:40:13.728532 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 15:40:13.738614 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 15:40:13.748965 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1384 15:40:13.758393 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1385 15:40:13.768225 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1386 15:40:13.775030 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1387 15:40:13.785268 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1388 15:40:13.794674 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1389 15:40:13.805158 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1390 15:40:13.814589 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1391 15:40:13.824463 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1392 15:40:13.831089 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1393 15:40:13.841504 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1394 15:40:13.845041 PCI: 00:02.0
1395 15:40:13.854615 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1396 15:40:13.864335 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1397 15:40:13.874386 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1398 15:40:13.877893 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 15:40:13.887878 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1400 15:40:13.891173 GENERIC: 0.0
1401 15:40:13.894591 PCI: 00:05.0
1402 15:40:13.904386 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1403 15:40:13.907892 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1404 15:40:13.911004 GENERIC: 0.0
1405 15:40:13.911102 PCI: 00:08.0
1406 15:40:13.920665 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1407 15:40:13.924380 PCI: 00:0a.0
1408 15:40:13.927512 PCI: 00:0d.0 child on link 0 USB0 port 0
1409 15:40:13.937348 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1410 15:40:13.944197 USB0 port 0 child on link 0 USB3 port 0
1411 15:40:13.944291 USB3 port 0
1412 15:40:13.947791 USB3 port 1
1413 15:40:13.947889 USB3 port 2
1414 15:40:13.950785 USB3 port 3
1415 15:40:13.954309 PCI: 00:14.0 child on link 0 USB0 port 0
1416 15:40:13.963972 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1417 15:40:13.967622 USB0 port 0 child on link 0 USB2 port 0
1418 15:40:13.970877 USB2 port 0
1419 15:40:13.970971 USB2 port 1
1420 15:40:13.973996 USB2 port 2
1421 15:40:13.977619 USB2 port 3
1422 15:40:13.977738 USB2 port 4
1423 15:40:13.980886 USB2 port 5
1424 15:40:13.980994 USB2 port 6
1425 15:40:13.984026 USB2 port 7
1426 15:40:13.984134 USB2 port 8
1427 15:40:13.987454 USB2 port 9
1428 15:40:13.987570 USB3 port 0
1429 15:40:13.990723 USB3 port 1
1430 15:40:13.990841 USB3 port 2
1431 15:40:13.994182 USB3 port 3
1432 15:40:13.994306 PCI: 00:14.2
1433 15:40:14.004447 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1434 15:40:14.017391 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1435 15:40:14.020520 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1436 15:40:14.030934 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1437 15:40:14.034050 GENERIC: 0.0
1438 15:40:14.037704 PCI: 00:15.0 child on link 0 I2C: 00:1a
1439 15:40:14.047527 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1440 15:40:14.047931 I2C: 00:1a
1441 15:40:14.050471 I2C: 00:31
1442 15:40:14.050850 I2C: 00:32
1443 15:40:14.057138 PCI: 00:15.1 child on link 0 I2C: 00:10
1444 15:40:14.067336 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1445 15:40:14.067930 I2C: 00:10
1446 15:40:14.070632 PCI: 00:15.2
1447 15:40:14.080881 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1448 15:40:14.081393 PCI: 00:15.3
1449 15:40:14.090892 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1450 15:40:14.094097 PCI: 00:16.0
1451 15:40:14.104464 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1452 15:40:14.107174 PCI: 00:19.0
1453 15:40:14.110245 PCI: 00:19.1 child on link 0 I2C: 00:15
1454 15:40:14.120287 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1455 15:40:14.123811 I2C: 00:15
1456 15:40:14.126927 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1457 15:40:14.137031 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1458 15:40:14.147283 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1459 15:40:14.156954 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1460 15:40:14.160491 GENERIC: 0.0
1461 15:40:14.160923 PCI: 01:00.0
1462 15:40:14.173694 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1463 15:40:14.183298 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1464 15:40:14.193572 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1465 15:40:14.194046 PCI: 00:1e.0
1466 15:40:14.206956 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 15:40:14.210415 PCI: 00:1e.2 child on link 0 SPI: 00
1468 15:40:14.220309 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1469 15:40:14.220874 SPI: 00
1470 15:40:14.226704 PCI: 00:1e.3 child on link 0 SPI: 00
1471 15:40:14.236894 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1472 15:40:14.237483 SPI: 00
1473 15:40:14.240228 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 15:40:14.249873 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 15:40:14.253196 PNP: 0c09.0
1476 15:40:14.259913 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 15:40:14.266707 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1478 15:40:14.273622 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 15:40:14.283411 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1480 15:40:14.289847 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1481 15:40:14.290445 GENERIC: 0.0
1482 15:40:14.293203 GENERIC: 1.0
1483 15:40:14.293815 PCI: 00:1f.3
1484 15:40:14.303679 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1485 15:40:14.312983 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1486 15:40:14.316349 PCI: 00:1f.5
1487 15:40:14.326278 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1488 15:40:14.330073 CPU_CLUSTER: 0 child on link 0 APIC: 00
1489 15:40:14.333306 APIC: 00
1490 15:40:14.333917 APIC: 01
1491 15:40:14.334304 APIC: 03
1492 15:40:14.336425 APIC: 05
1493 15:40:14.336900 APIC: 07
1494 15:40:14.339817 APIC: 06
1495 15:40:14.340447 APIC: 02
1496 15:40:14.340831 APIC: 04
1497 15:40:14.342805 Done allocating resources.
1498 15:40:14.349391 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1499 15:40:14.356650 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1500 15:40:14.359283 Configure GPIOs for I2S audio on UP4.
1501 15:40:14.365886 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1502 15:40:14.369685 Enabling resources...
1503 15:40:14.373079 PCI: 00:00.0 subsystem <- 8086/9a12
1504 15:40:14.375823 PCI: 00:00.0 cmd <- 06
1505 15:40:14.379878 PCI: 00:02.0 subsystem <- 8086/9a40
1506 15:40:14.382772 PCI: 00:02.0 cmd <- 03
1507 15:40:14.386082 PCI: 00:04.0 subsystem <- 8086/9a03
1508 15:40:14.389539 PCI: 00:04.0 cmd <- 02
1509 15:40:14.392298 PCI: 00:05.0 subsystem <- 8086/9a19
1510 15:40:14.392843 PCI: 00:05.0 cmd <- 02
1511 15:40:14.399294 PCI: 00:08.0 subsystem <- 8086/9a11
1512 15:40:14.399973 PCI: 00:08.0 cmd <- 06
1513 15:40:14.402387 PCI: 00:0d.0 subsystem <- 8086/9a13
1514 15:40:14.405787 PCI: 00:0d.0 cmd <- 02
1515 15:40:14.408913 PCI: 00:14.0 subsystem <- 8086/a0ed
1516 15:40:14.412186 PCI: 00:14.0 cmd <- 02
1517 15:40:14.415456 PCI: 00:14.2 subsystem <- 8086/a0ef
1518 15:40:14.418672 PCI: 00:14.2 cmd <- 02
1519 15:40:14.422480 PCI: 00:14.3 subsystem <- 8086/a0f0
1520 15:40:14.425492 PCI: 00:14.3 cmd <- 02
1521 15:40:14.428849 PCI: 00:15.0 subsystem <- 8086/a0e8
1522 15:40:14.432350 PCI: 00:15.0 cmd <- 02
1523 15:40:14.435615 PCI: 00:15.1 subsystem <- 8086/a0e9
1524 15:40:14.438382 PCI: 00:15.1 cmd <- 02
1525 15:40:14.442174 PCI: 00:15.2 subsystem <- 8086/a0ea
1526 15:40:14.442626 PCI: 00:15.2 cmd <- 02
1527 15:40:14.448623 PCI: 00:15.3 subsystem <- 8086/a0eb
1528 15:40:14.449100 PCI: 00:15.3 cmd <- 02
1529 15:40:14.451800 PCI: 00:16.0 subsystem <- 8086/a0e0
1530 15:40:14.455508 PCI: 00:16.0 cmd <- 02
1531 15:40:14.458546 PCI: 00:19.1 subsystem <- 8086/a0c6
1532 15:40:14.462020 PCI: 00:19.1 cmd <- 02
1533 15:40:14.465656 PCI: 00:1d.0 bridge ctrl <- 0013
1534 15:40:14.468765 PCI: 00:1d.0 subsystem <- 8086/a0b0
1535 15:40:14.471967 PCI: 00:1d.0 cmd <- 06
1536 15:40:14.474840 PCI: 00:1e.0 subsystem <- 8086/a0a8
1537 15:40:14.478471 PCI: 00:1e.0 cmd <- 06
1538 15:40:14.481465 PCI: 00:1e.2 subsystem <- 8086/a0aa
1539 15:40:14.484809 PCI: 00:1e.2 cmd <- 06
1540 15:40:14.488261 PCI: 00:1e.3 subsystem <- 8086/a0ab
1541 15:40:14.491449 PCI: 00:1e.3 cmd <- 02
1542 15:40:14.494802 PCI: 00:1f.0 subsystem <- 8086/a087
1543 15:40:14.494878 PCI: 00:1f.0 cmd <- 407
1544 15:40:14.501248 PCI: 00:1f.3 subsystem <- 8086/a0c8
1545 15:40:14.501332 PCI: 00:1f.3 cmd <- 02
1546 15:40:14.505085 PCI: 00:1f.5 subsystem <- 8086/a0a4
1547 15:40:14.508402 PCI: 00:1f.5 cmd <- 406
1548 15:40:14.513341 PCI: 01:00.0 cmd <- 02
1549 15:40:14.517496 done.
1550 15:40:14.520573 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1551 15:40:14.524264 Initializing devices...
1552 15:40:14.527300 Root Device init
1553 15:40:14.530411 Chrome EC: Set SMI mask to 0x0000000000000000
1554 15:40:14.537961 Chrome EC: clear events_b mask to 0x0000000000000000
1555 15:40:14.544494 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 15:40:14.551811 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1557 15:40:14.558318 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1558 15:40:14.561223 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 15:40:14.569241 fw_config match found: DB_USB=USB3_ACTIVE
1560 15:40:14.572127 Configure Right Type-C port orientation for retimer
1561 15:40:14.575333 Root Device init finished in 46 msecs
1562 15:40:14.579864 PCI: 00:00.0 init
1563 15:40:14.582986 CPU TDP = 9 Watts
1564 15:40:14.583070 CPU PL1 = 9 Watts
1565 15:40:14.586451 CPU PL2 = 40 Watts
1566 15:40:14.589617 CPU PL4 = 83 Watts
1567 15:40:14.592907 PCI: 00:00.0 init finished in 8 msecs
1568 15:40:14.593020 PCI: 00:02.0 init
1569 15:40:14.596562 GMA: Found VBT in CBFS
1570 15:40:14.599675 GMA: Found valid VBT in CBFS
1571 15:40:14.606438 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1572 15:40:14.612902 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1573 15:40:14.615918 PCI: 00:02.0 init finished in 18 msecs
1574 15:40:14.619689 PCI: 00:05.0 init
1575 15:40:14.623049 PCI: 00:05.0 init finished in 0 msecs
1576 15:40:14.626121 PCI: 00:08.0 init
1577 15:40:14.629252 PCI: 00:08.0 init finished in 0 msecs
1578 15:40:14.632774 PCI: 00:14.0 init
1579 15:40:14.635844 PCI: 00:14.0 init finished in 0 msecs
1580 15:40:14.639387 PCI: 00:14.2 init
1581 15:40:14.642789 PCI: 00:14.2 init finished in 0 msecs
1582 15:40:14.646201 PCI: 00:15.0 init
1583 15:40:14.646285 I2C bus 0 version 0x3230302a
1584 15:40:14.652891 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1585 15:40:14.655916 PCI: 00:15.0 init finished in 6 msecs
1586 15:40:14.656000 PCI: 00:15.1 init
1587 15:40:14.659524 I2C bus 1 version 0x3230302a
1588 15:40:14.662526 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1589 15:40:14.669461 PCI: 00:15.1 init finished in 6 msecs
1590 15:40:14.669545 PCI: 00:15.2 init
1591 15:40:14.672745 I2C bus 2 version 0x3230302a
1592 15:40:14.676004 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1593 15:40:14.679482 PCI: 00:15.2 init finished in 6 msecs
1594 15:40:14.682789 PCI: 00:15.3 init
1595 15:40:14.686172 I2C bus 3 version 0x3230302a
1596 15:40:14.689857 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1597 15:40:14.693199 PCI: 00:15.3 init finished in 6 msecs
1598 15:40:14.696353 PCI: 00:16.0 init
1599 15:40:14.699792 PCI: 00:16.0 init finished in 0 msecs
1600 15:40:14.702678 PCI: 00:19.1 init
1601 15:40:14.706007 I2C bus 5 version 0x3230302a
1602 15:40:14.709715 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1603 15:40:14.712798 PCI: 00:19.1 init finished in 6 msecs
1604 15:40:14.713061 PCI: 00:1d.0 init
1605 15:40:14.715881 Initializing PCH PCIe bridge.
1606 15:40:14.723526 PCI: 00:1d.0 init finished in 3 msecs
1607 15:40:14.724023 PCI: 00:1f.0 init
1608 15:40:14.729848 IOAPIC: Initializing IOAPIC at 0xfec00000
1609 15:40:14.733042 IOAPIC: Bootstrap Processor Local APIC = 0x00
1610 15:40:14.736067 IOAPIC: ID = 0x02
1611 15:40:14.736562 IOAPIC: Dumping registers
1612 15:40:14.739830 reg 0x0000: 0x02000000
1613 15:40:14.742542 reg 0x0001: 0x00770020
1614 15:40:14.746653 reg 0x0002: 0x00000000
1615 15:40:14.749267 PCI: 00:1f.0 init finished in 21 msecs
1616 15:40:14.752669 PCI: 00:1f.2 init
1617 15:40:14.753103 Disabling ACPI via APMC.
1618 15:40:14.757121 APMC done.
1619 15:40:14.760569 PCI: 00:1f.2 init finished in 5 msecs
1620 15:40:14.772864 PCI: 01:00.0 init
1621 15:40:14.775913 PCI: 01:00.0 init finished in 0 msecs
1622 15:40:14.779256 PNP: 0c09.0 init
1623 15:40:14.782941 Google Chrome EC uptime: 8.451 seconds
1624 15:40:14.789261 Google Chrome AP resets since EC boot: 1
1625 15:40:14.792450 Google Chrome most recent AP reset causes:
1626 15:40:14.796118 0.379: 32775 shutdown: entering G3
1627 15:40:14.802326 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1628 15:40:14.806051 PNP: 0c09.0 init finished in 22 msecs
1629 15:40:14.811537 Devices initialized
1630 15:40:14.814721 Show all devs... After init.
1631 15:40:14.818042 Root Device: enabled 1
1632 15:40:14.818468 DOMAIN: 0000: enabled 1
1633 15:40:14.821428 CPU_CLUSTER: 0: enabled 1
1634 15:40:14.825045 PCI: 00:00.0: enabled 1
1635 15:40:14.827821 PCI: 00:02.0: enabled 1
1636 15:40:14.828252 PCI: 00:04.0: enabled 1
1637 15:40:14.831546 PCI: 00:05.0: enabled 1
1638 15:40:14.834855 PCI: 00:06.0: enabled 0
1639 15:40:14.838097 PCI: 00:07.0: enabled 0
1640 15:40:14.838525 PCI: 00:07.1: enabled 0
1641 15:40:14.841067 PCI: 00:07.2: enabled 0
1642 15:40:14.844652 PCI: 00:07.3: enabled 0
1643 15:40:14.848208 PCI: 00:08.0: enabled 1
1644 15:40:14.848775 PCI: 00:09.0: enabled 0
1645 15:40:14.851193 PCI: 00:0a.0: enabled 0
1646 15:40:14.854955 PCI: 00:0d.0: enabled 1
1647 15:40:14.855413 PCI: 00:0d.1: enabled 0
1648 15:40:14.858256 PCI: 00:0d.2: enabled 0
1649 15:40:14.861115 PCI: 00:0d.3: enabled 0
1650 15:40:14.864811 PCI: 00:0e.0: enabled 0
1651 15:40:14.865260 PCI: 00:10.2: enabled 1
1652 15:40:14.867946 PCI: 00:10.6: enabled 0
1653 15:40:14.871114 PCI: 00:10.7: enabled 0
1654 15:40:14.874900 PCI: 00:12.0: enabled 0
1655 15:40:14.875364 PCI: 00:12.6: enabled 0
1656 15:40:14.877824 PCI: 00:13.0: enabled 0
1657 15:40:14.881163 PCI: 00:14.0: enabled 1
1658 15:40:14.884497 PCI: 00:14.1: enabled 0
1659 15:40:14.884973 PCI: 00:14.2: enabled 1
1660 15:40:14.887905 PCI: 00:14.3: enabled 1
1661 15:40:14.891108 PCI: 00:15.0: enabled 1
1662 15:40:14.894419 PCI: 00:15.1: enabled 1
1663 15:40:14.894845 PCI: 00:15.2: enabled 1
1664 15:40:14.897844 PCI: 00:15.3: enabled 1
1665 15:40:14.901057 PCI: 00:16.0: enabled 1
1666 15:40:14.901527 PCI: 00:16.1: enabled 0
1667 15:40:14.904501 PCI: 00:16.2: enabled 0
1668 15:40:14.908215 PCI: 00:16.3: enabled 0
1669 15:40:14.911268 PCI: 00:16.4: enabled 0
1670 15:40:14.911699 PCI: 00:16.5: enabled 0
1671 15:40:14.914790 PCI: 00:17.0: enabled 0
1672 15:40:14.917908 PCI: 00:19.0: enabled 0
1673 15:40:14.921287 PCI: 00:19.1: enabled 1
1674 15:40:14.921863 PCI: 00:19.2: enabled 0
1675 15:40:14.924148 PCI: 00:1c.0: enabled 1
1676 15:40:14.927647 PCI: 00:1c.1: enabled 0
1677 15:40:14.931056 PCI: 00:1c.2: enabled 0
1678 15:40:14.931507 PCI: 00:1c.3: enabled 0
1679 15:40:14.934097 PCI: 00:1c.4: enabled 0
1680 15:40:14.938075 PCI: 00:1c.5: enabled 0
1681 15:40:14.938518 PCI: 00:1c.6: enabled 1
1682 15:40:14.940795 PCI: 00:1c.7: enabled 0
1683 15:40:14.944446 PCI: 00:1d.0: enabled 1
1684 15:40:14.947638 PCI: 00:1d.1: enabled 0
1685 15:40:14.948180 PCI: 00:1d.2: enabled 1
1686 15:40:14.951657 PCI: 00:1d.3: enabled 0
1687 15:40:14.954692 PCI: 00:1e.0: enabled 1
1688 15:40:14.957703 PCI: 00:1e.1: enabled 0
1689 15:40:14.958311 PCI: 00:1e.2: enabled 1
1690 15:40:14.960963 PCI: 00:1e.3: enabled 1
1691 15:40:14.964402 PCI: 00:1f.0: enabled 1
1692 15:40:14.967475 PCI: 00:1f.1: enabled 0
1693 15:40:14.967953 PCI: 00:1f.2: enabled 1
1694 15:40:14.970784 PCI: 00:1f.3: enabled 1
1695 15:40:14.974558 PCI: 00:1f.4: enabled 0
1696 15:40:14.977621 PCI: 00:1f.5: enabled 1
1697 15:40:14.978140 PCI: 00:1f.6: enabled 0
1698 15:40:14.981166 PCI: 00:1f.7: enabled 0
1699 15:40:14.984152 APIC: 00: enabled 1
1700 15:40:14.984631 GENERIC: 0.0: enabled 1
1701 15:40:14.987399 GENERIC: 0.0: enabled 1
1702 15:40:14.990533 GENERIC: 1.0: enabled 1
1703 15:40:14.994489 GENERIC: 0.0: enabled 1
1704 15:40:14.994920 GENERIC: 1.0: enabled 1
1705 15:40:14.997539 USB0 port 0: enabled 1
1706 15:40:15.000944 GENERIC: 0.0: enabled 1
1707 15:40:15.001376 USB0 port 0: enabled 1
1708 15:40:15.003843 GENERIC: 0.0: enabled 1
1709 15:40:15.007276 I2C: 00:1a: enabled 1
1710 15:40:15.010662 I2C: 00:31: enabled 1
1711 15:40:15.011093 I2C: 00:32: enabled 1
1712 15:40:15.014043 I2C: 00:10: enabled 1
1713 15:40:15.017781 I2C: 00:15: enabled 1
1714 15:40:15.018215 GENERIC: 0.0: enabled 0
1715 15:40:15.020846 GENERIC: 1.0: enabled 0
1716 15:40:15.023885 GENERIC: 0.0: enabled 1
1717 15:40:15.024313 SPI: 00: enabled 1
1718 15:40:15.027439 SPI: 00: enabled 1
1719 15:40:15.030519 PNP: 0c09.0: enabled 1
1720 15:40:15.030952 GENERIC: 0.0: enabled 1
1721 15:40:15.034143 USB3 port 0: enabled 1
1722 15:40:15.037072 USB3 port 1: enabled 1
1723 15:40:15.037491 USB3 port 2: enabled 0
1724 15:40:15.040488 USB3 port 3: enabled 0
1725 15:40:15.044143 USB2 port 0: enabled 0
1726 15:40:15.047408 USB2 port 1: enabled 1
1727 15:40:15.047830 USB2 port 2: enabled 1
1728 15:40:15.050705 USB2 port 3: enabled 0
1729 15:40:15.054530 USB2 port 4: enabled 1
1730 15:40:15.054948 USB2 port 5: enabled 0
1731 15:40:15.057172 USB2 port 6: enabled 0
1732 15:40:15.060744 USB2 port 7: enabled 0
1733 15:40:15.061166 USB2 port 8: enabled 0
1734 15:40:15.063881 USB2 port 9: enabled 0
1735 15:40:15.067580 USB3 port 0: enabled 0
1736 15:40:15.070656 USB3 port 1: enabled 1
1737 15:40:15.071078 USB3 port 2: enabled 0
1738 15:40:15.073948 USB3 port 3: enabled 0
1739 15:40:15.077199 GENERIC: 0.0: enabled 1
1740 15:40:15.077618 GENERIC: 1.0: enabled 1
1741 15:40:15.080592 APIC: 01: enabled 1
1742 15:40:15.084565 APIC: 03: enabled 1
1743 15:40:15.085095 APIC: 05: enabled 1
1744 15:40:15.087455 APIC: 07: enabled 1
1745 15:40:15.090471 APIC: 06: enabled 1
1746 15:40:15.090898 APIC: 02: enabled 1
1747 15:40:15.093671 APIC: 04: enabled 1
1748 15:40:15.097343 PCI: 01:00.0: enabled 1
1749 15:40:15.100561 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1750 15:40:15.107523 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1751 15:40:15.110427 ELOG: NV offset 0xf30000 size 0x1000
1752 15:40:15.117023 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1753 15:40:15.123834 ELOG: Event(17) added with size 13 at 2022-09-30 15:38:47 UTC
1754 15:40:15.130248 ELOG: Event(92) added with size 9 at 2022-09-30 15:38:47 UTC
1755 15:40:15.137091 ELOG: Event(93) added with size 9 at 2022-09-30 15:38:47 UTC
1756 15:40:15.143711 ELOG: Event(9E) added with size 10 at 2022-09-30 15:38:47 UTC
1757 15:40:15.150170 ELOG: Event(9F) added with size 14 at 2022-09-30 15:38:47 UTC
1758 15:40:15.153877 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1759 15:40:15.160559 ELOG: Event(A1) added with size 10 at 2022-09-30 15:38:47 UTC
1760 15:40:15.166764 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1761 15:40:15.173487 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1762 15:40:15.176527 Finalize devices...
1763 15:40:15.176996 Devices finalized
1764 15:40:15.184154 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1765 15:40:15.186914 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1766 15:40:15.193596 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1767 15:40:15.200006 ME: HFSTS1 : 0x80030055
1768 15:40:15.203318 ME: HFSTS2 : 0x30280116
1769 15:40:15.206794 ME: HFSTS3 : 0x00000050
1770 15:40:15.213474 ME: HFSTS4 : 0x00004000
1771 15:40:15.216664 ME: HFSTS5 : 0x00000000
1772 15:40:15.220287 ME: HFSTS6 : 0x00400006
1773 15:40:15.223170 ME: Manufacturing Mode : YES
1774 15:40:15.229721 ME: SPI Protection Mode Enabled : NO
1775 15:40:15.233430 ME: FW Partition Table : OK
1776 15:40:15.236771 ME: Bringup Loader Failure : NO
1777 15:40:15.239733 ME: Firmware Init Complete : NO
1778 15:40:15.243253 ME: Boot Options Present : NO
1779 15:40:15.246449 ME: Update In Progress : NO
1780 15:40:15.249590 ME: D0i3 Support : YES
1781 15:40:15.253651 ME: Low Power State Enabled : NO
1782 15:40:15.256463 ME: CPU Replaced : YES
1783 15:40:15.263057 ME: CPU Replacement Valid : YES
1784 15:40:15.266314 ME: Current Working State : 5
1785 15:40:15.269779 ME: Current Operation State : 1
1786 15:40:15.272965 ME: Current Operation Mode : 3
1787 15:40:15.276268 ME: Error Code : 0
1788 15:40:15.280014 ME: Enhanced Debug Mode : NO
1789 15:40:15.283224 ME: CPU Debug Disabled : YES
1790 15:40:15.286553 ME: TXT Support : NO
1791 15:40:15.293319 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1792 15:40:15.299726 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1793 15:40:15.303315 CBFS: 'fallback/slic' not found.
1794 15:40:15.309864 ACPI: Writing ACPI tables at 76b01000.
1795 15:40:15.310294 ACPI: * FACS
1796 15:40:15.313031 ACPI: * DSDT
1797 15:40:15.316516 Ramoops buffer: 0x100000@0x76a00000.
1798 15:40:15.319458 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1799 15:40:15.326334 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1800 15:40:15.329535 Google Chrome EC: version:
1801 15:40:15.332793 ro: voema_v2.0.7540-147f8d37d1
1802 15:40:15.336061 rw: voema_v2.0.7540-147f8d37d1
1803 15:40:15.336498 running image: 2
1804 15:40:15.342990 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1805 15:40:15.347391 ACPI: * FADT
1806 15:40:15.347833 SCI is IRQ9
1807 15:40:15.353957 ACPI: added table 1/32, length now 40
1808 15:40:15.354381 ACPI: * SSDT
1809 15:40:15.357898 Found 1 CPU(s) with 8 core(s) each.
1810 15:40:15.364591 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1811 15:40:15.367819 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1812 15:40:15.371108 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1813 15:40:15.374503 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1814 15:40:15.381098 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1815 15:40:15.387377 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1816 15:40:15.391007 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1817 15:40:15.397540 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1818 15:40:15.403997 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1819 15:40:15.407254 \_SB.PCI0.RP09: Added StorageD3Enable property
1820 15:40:15.413998 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1821 15:40:15.417382 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1822 15:40:15.424038 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1823 15:40:15.426948 PS2K: Passing 80 keymaps to kernel
1824 15:40:15.433827 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1825 15:40:15.440645 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1826 15:40:15.446802 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1827 15:40:15.453592 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1828 15:40:15.460486 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1829 15:40:15.467077 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1830 15:40:15.473532 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1831 15:40:15.480220 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1832 15:40:15.483816 ACPI: added table 2/32, length now 44
1833 15:40:15.484394 ACPI: * MCFG
1834 15:40:15.487437 ACPI: added table 3/32, length now 48
1835 15:40:15.489967 ACPI: * TPM2
1836 15:40:15.493306 TPM2 log created at 0x769f0000
1837 15:40:15.496615 ACPI: added table 4/32, length now 52
1838 15:40:15.497099 ACPI: * MADT
1839 15:40:15.500249 SCI is IRQ9
1840 15:40:15.503177 ACPI: added table 5/32, length now 56
1841 15:40:15.506219 current = 76b09850
1842 15:40:15.506672 ACPI: * DMAR
1843 15:40:15.510233 ACPI: added table 6/32, length now 60
1844 15:40:15.513508 ACPI: added table 7/32, length now 64
1845 15:40:15.516550 ACPI: * HPET
1846 15:40:15.520088 ACPI: added table 8/32, length now 68
1847 15:40:15.520526 ACPI: done.
1848 15:40:15.523360 ACPI tables: 35216 bytes.
1849 15:40:15.526933 smbios_write_tables: 769ef000
1850 15:40:15.530301 EC returned error result code 3
1851 15:40:15.533618 Couldn't obtain OEM name from CBI
1852 15:40:15.536788 Create SMBIOS type 16
1853 15:40:15.540058 Create SMBIOS type 17
1854 15:40:15.540497 GENERIC: 0.0 (WIFI Device)
1855 15:40:15.543831 SMBIOS tables: 1750 bytes.
1856 15:40:15.549924 Writing table forward entry at 0x00000500
1857 15:40:15.553138 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1858 15:40:15.559590 Writing coreboot table at 0x76b25000
1859 15:40:15.563319 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1860 15:40:15.569917 1. 0000000000001000-000000000009ffff: RAM
1861 15:40:15.573355 2. 00000000000a0000-00000000000fffff: RESERVED
1862 15:40:15.576705 3. 0000000000100000-00000000769eefff: RAM
1863 15:40:15.583800 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1864 15:40:15.589531 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1865 15:40:15.593165 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1866 15:40:15.599878 7. 0000000077000000-000000007fbfffff: RESERVED
1867 15:40:15.603022 8. 00000000c0000000-00000000cfffffff: RESERVED
1868 15:40:15.609510 9. 00000000f8000000-00000000f9ffffff: RESERVED
1869 15:40:15.613227 10. 00000000fb000000-00000000fb000fff: RESERVED
1870 15:40:15.619345 11. 00000000fe000000-00000000fe00ffff: RESERVED
1871 15:40:15.622809 12. 00000000fed80000-00000000fed87fff: RESERVED
1872 15:40:15.626511 13. 00000000fed90000-00000000fed92fff: RESERVED
1873 15:40:15.632686 14. 00000000feda0000-00000000feda1fff: RESERVED
1874 15:40:15.636385 15. 00000000fedc0000-00000000feddffff: RESERVED
1875 15:40:15.642736 16. 0000000100000000-00000002803fffff: RAM
1876 15:40:15.645789 Passing 4 GPIOs to payload:
1877 15:40:15.649515 NAME | PORT | POLARITY | VALUE
1878 15:40:15.656285 lid | undefined | high | high
1879 15:40:15.659594 power | undefined | high | low
1880 15:40:15.665960 oprom | undefined | high | low
1881 15:40:15.669325 EC in RW | 0x000000e5 | high | high
1882 15:40:15.676034 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 62a0
1883 15:40:15.679545 coreboot table: 1576 bytes.
1884 15:40:15.682690 IMD ROOT 0. 0x76fff000 0x00001000
1885 15:40:15.685866 IMD SMALL 1. 0x76ffe000 0x00001000
1886 15:40:15.692836 FSP MEMORY 2. 0x76c4e000 0x003b0000
1887 15:40:15.696263 VPD 3. 0x76c4d000 0x00000367
1888 15:40:15.699153 RO MCACHE 4. 0x76c4c000 0x00000fdc
1889 15:40:15.702593 CONSOLE 5. 0x76c2c000 0x00020000
1890 15:40:15.706592 FMAP 6. 0x76c2b000 0x00000578
1891 15:40:15.709241 TIME STAMP 7. 0x76c2a000 0x00000910
1892 15:40:15.712428 VBOOT WORK 8. 0x76c16000 0x00014000
1893 15:40:15.715773 ROMSTG STCK 9. 0x76c15000 0x00001000
1894 15:40:15.722468 AFTER CAR 10. 0x76c0a000 0x0000b000
1895 15:40:15.726229 RAMSTAGE 11. 0x76b97000 0x00073000
1896 15:40:15.729183 REFCODE 12. 0x76b42000 0x00055000
1897 15:40:15.732568 SMM BACKUP 13. 0x76b32000 0x00010000
1898 15:40:15.736108 4f444749 14. 0x76b30000 0x00002000
1899 15:40:15.739061 EXT VBT15. 0x76b2d000 0x0000219f
1900 15:40:15.742566 COREBOOT 16. 0x76b25000 0x00008000
1901 15:40:15.745726 ACPI 17. 0x76b01000 0x00024000
1902 15:40:15.748992 ACPI GNVS 18. 0x76b00000 0x00001000
1903 15:40:15.755780 RAMOOPS 19. 0x76a00000 0x00100000
1904 15:40:15.759586 TPM2 TCGLOG20. 0x769f0000 0x00010000
1905 15:40:15.762438 SMBIOS 21. 0x769ef000 0x00000800
1906 15:40:15.762872 IMD small region:
1907 15:40:15.765942 IMD ROOT 0. 0x76ffec00 0x00000400
1908 15:40:15.772749 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1909 15:40:15.776536 POWER STATE 2. 0x76ffeb80 0x00000044
1910 15:40:15.779275 ROMSTAGE 3. 0x76ffeb60 0x00000004
1911 15:40:15.782643 MEM INFO 4. 0x76ffe980 0x000001e0
1912 15:40:15.789477 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1913 15:40:15.792678 MTRR: Physical address space:
1914 15:40:15.799284 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1915 15:40:15.805817 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1916 15:40:15.812760 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1917 15:40:15.815700 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1918 15:40:15.822188 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1919 15:40:15.829168 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1920 15:40:15.835890 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1921 15:40:15.839326 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 15:40:15.842444 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 15:40:15.849051 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 15:40:15.852162 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 15:40:15.856000 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 15:40:15.858703 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 15:40:15.865809 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 15:40:15.869126 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 15:40:15.872481 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 15:40:15.875636 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 15:40:15.881849 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 15:40:15.885350 call enable_fixed_mtrr()
1933 15:40:15.888906 CPU physical address size: 39 bits
1934 15:40:15.892216 MTRR: default type WB/UC MTRR counts: 6/6.
1935 15:40:15.895081 MTRR: UC selected as default type.
1936 15:40:15.902346 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1937 15:40:15.908460 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1938 15:40:15.915375 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1939 15:40:15.921825 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1940 15:40:15.928322 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1941 15:40:15.935022 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1942 15:40:15.935597
1943 15:40:15.935981 MTRR check
1944 15:40:15.938499 Fixed MTRRs : Enabled
1945 15:40:15.941557 Variable MTRRs: Enabled
1946 15:40:15.942018
1947 15:40:15.944931 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 15:40:15.948468 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 15:40:15.954860 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 15:40:15.958101 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 15:40:15.961773 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 15:40:15.964714 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 15:40:15.972091 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 15:40:15.975422 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 15:40:15.978328 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 15:40:15.981398 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 15:40:15.984975 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 15:40:15.994623 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1959 15:40:15.995195 call enable_fixed_mtrr()
1960 15:40:15.998923 Checking cr50 for pending updates
1961 15:40:16.002221 CPU physical address size: 39 bits
1962 15:40:16.008733 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 15:40:16.011977 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 15:40:16.014982 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 15:40:16.018678 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 15:40:16.025281 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 15:40:16.028707 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 15:40:16.031469 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 15:40:16.035069 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 15:40:16.038300 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 15:40:16.044860 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 15:40:16.048667 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 15:40:16.051013 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 15:40:16.058066 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 15:40:16.058525 call enable_fixed_mtrr()
1976 15:40:16.064700 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 15:40:16.068574 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 15:40:16.071747 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 15:40:16.074688 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 15:40:16.081826 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 15:40:16.085039 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 15:40:16.088026 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 15:40:16.091478 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 15:40:16.097842 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 15:40:16.101400 CPU physical address size: 39 bits
1986 15:40:16.104902 call enable_fixed_mtrr()
1987 15:40:16.107997 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 15:40:16.111263 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 15:40:16.118288 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 15:40:16.121109 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 15:40:16.125050 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 15:40:16.127942 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 15:40:16.134506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 15:40:16.138086 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 15:40:16.141348 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 15:40:16.144930 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 15:40:16.151071 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 15:40:16.154760 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 15:40:16.158040 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 15:40:16.161307 call enable_fixed_mtrr()
2001 15:40:16.164420 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 15:40:16.171272 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 15:40:16.174625 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 15:40:16.178213 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 15:40:16.181033 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 15:40:16.188060 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 15:40:16.191397 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 15:40:16.194677 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 15:40:16.197673 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 15:40:16.201930 CPU physical address size: 39 bits
2011 15:40:16.207986 call enable_fixed_mtrr()
2012 15:40:16.211352 CPU physical address size: 39 bits
2013 15:40:16.214985 CPU physical address size: 39 bits
2014 15:40:16.218370 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 15:40:16.221219 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 15:40:16.224481 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 15:40:16.231237 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 15:40:16.234515 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 15:40:16.238284 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 15:40:16.241320 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 15:40:16.248016 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 15:40:16.251073 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 15:40:16.254935 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 15:40:16.258126 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 15:40:16.264324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 15:40:16.267788 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 15:40:16.271167 call enable_fixed_mtrr()
2028 15:40:16.275069 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 15:40:16.277844 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 15:40:16.284692 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 15:40:16.288032 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 15:40:16.290925 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 15:40:16.294218 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 15:40:16.297546 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 15:40:16.304233 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 15:40:16.307349 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 15:40:16.310579 CPU physical address size: 39 bits
2038 15:40:16.314921 call enable_fixed_mtrr()
2039 15:40:16.318514 Reading cr50 TPM mode
2040 15:40:16.321841 CPU physical address size: 39 bits
2041 15:40:16.328244 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2042 15:40:16.335270 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2043 15:40:16.342144 Checking segment from ROM address 0xffc02b38
2044 15:40:16.345358 Checking segment from ROM address 0xffc02b54
2045 15:40:16.348613 Loading segment from ROM address 0xffc02b38
2046 15:40:16.352055 code (compression=0)
2047 15:40:16.362253 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2048 15:40:16.368828 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2049 15:40:16.371918 it's not compressed!
2050 15:40:16.510348 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2051 15:40:16.517076 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2052 15:40:16.523803 Loading segment from ROM address 0xffc02b54
2053 15:40:16.524294 Entry Point 0x30000000
2054 15:40:16.526921 Loaded segments
2055 15:40:16.533465 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2056 15:40:16.577298 Finalizing chipset.
2057 15:40:16.580948 Finalizing SMM.
2058 15:40:16.581481 APMC done.
2059 15:40:16.587078 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2060 15:40:16.591082 mp_park_aps done after 0 msecs.
2061 15:40:16.594074 Jumping to boot code at 0x30000000(0x76b25000)
2062 15:40:16.603512 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2063 15:40:16.603960
2064 15:40:16.607022 Starting depthcharge on Voema...
2065 15:40:16.608352 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2066 15:40:16.608918 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2067 15:40:16.609354 Setting prompt string to ['volteer:']
2068 15:40:16.609787 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2069 15:40:16.616890 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2070 15:40:16.623551 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2071 15:40:16.630484 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2072 15:40:16.633565 Failed to find eMMC card reader
2073 15:40:16.634032 Wipe memory regions:
2074 15:40:16.640634 [0x00000000001000, 0x000000000a0000)
2075 15:40:16.643396 [0x00000000100000, 0x00000030000000)
2076 15:40:16.672266 [0x00000032662db0, 0x000000769ef000)
2077 15:40:16.712059 [0x00000100000000, 0x00000280400000)
2078 15:40:16.916830 ec_init: CrosEC protocol v3 supported (256, 256)
2079 15:40:16.923084 update_port_state: port C0 state: usb enable 1 mux conn 0
2080 15:40:16.929767 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2081 15:40:16.936833 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2082 15:40:16.943037 send_conn_disc_msg: pmc_send_cmd succeeded
2083 15:40:17.372364 R8152: Initializing
2084 15:40:17.376410 Version 6 (ocp_data = 5c30)
2085 15:40:17.379277 R8152: Done initializing
2086 15:40:17.382415 Adding net device
2087 15:40:17.686650 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2088 15:40:17.686908
2089 15:40:17.690441 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2091 15:40:17.791684 volteer: tftpboot 192.168.201.1 7463488/tftp-deploy-bkj_8q2m/kernel/bzImage 7463488/tftp-deploy-bkj_8q2m/kernel/cmdline 7463488/tftp-deploy-bkj_8q2m/ramdisk/ramdisk.cpio.gz
2092 15:40:17.792290 Setting prompt string to 'Starting kernel'
2093 15:40:17.792728 Setting prompt string to ['Starting kernel']
2094 15:40:17.793075 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2095 15:40:17.793448 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2096 15:40:17.797282 tftpboot 192.168.201.1 7463488/tftp-deploy-bkj_8q2m/kernel/bzImy-bkj_8q2m/kernel/cmdline 7463488/tftp-deploy-bkj_8q2m/ramdisk/ramdisk.cpio.gz
2097 15:40:17.797766 Waiting for link
2098 15:40:18.001131 done.
2099 15:40:18.001271 MAC: 00:24:32:30:7e:47
2100 15:40:18.004569 Sending DHCP discover... done.
2101 15:40:18.007421 Waiting for reply... done.
2102 15:40:18.011108 Sending DHCP request... done.
2103 15:40:18.014375 Waiting for reply... done.
2104 15:40:18.017969 My ip is 192.168.201.19
2105 15:40:18.021100 The DHCP server ip is 192.168.201.1
2106 15:40:18.027509 TFTP server IP predefined by user: 192.168.201.1
2107 15:40:18.033883 Bootfile predefined by user: 7463488/tftp-deploy-bkj_8q2m/kernel/bzImage
2108 15:40:18.037359 Sending tftp read request... done.
2109 15:40:18.040546 Waiting for the transfer...
2110 15:40:18.605008 00000000 ################################################################
2111 15:40:19.136488 00080000 ################################################################
2112 15:40:19.664537 00100000 ################################################################
2113 15:40:20.188174 00180000 ################################################################
2114 15:40:20.714662 00200000 ################################################################
2115 15:40:21.247295 00280000 ################################################################
2116 15:40:21.838136 00300000 ################################################################
2117 15:40:22.495949 00380000 ################################################################
2118 15:40:23.175949 00400000 ################################################################
2119 15:40:23.865968 00480000 ################################################################
2120 15:40:24.554124 00500000 ################################################################
2121 15:40:25.234112 00580000 ################################################################
2122 15:40:25.891040 00600000 ################################################################
2123 15:40:26.298107 00680000 ###################################### done.
2124 15:40:26.301691 The bootfile was 7126928 bytes long.
2125 15:40:26.304816 Sending tftp read request... done.
2126 15:40:26.308142 Waiting for the transfer...
2127 15:40:26.974103 00000000 ################################################################
2128 15:40:27.661853 00080000 ################################################################
2129 15:40:28.375081 00100000 ################################################################
2130 15:40:29.086204 00180000 ################################################################
2131 15:40:29.791689 00200000 ################################################################
2132 15:40:30.432879 00280000 ################################################################
2133 15:40:31.101120 00300000 ################################################################
2134 15:40:31.734041 00380000 ################################################################
2135 15:40:32.402577 00400000 ################################################################
2136 15:40:33.028862 00480000 ################################################################
2137 15:40:33.699570 00500000 ################################################################
2138 15:40:34.405203 00580000 ################################################################
2139 15:40:35.058158 00600000 ################################################################
2140 15:40:35.750917 00680000 ################################################################
2141 15:40:36.358992 00700000 ################################################################
2142 15:40:36.988816 00780000 ################################################################
2143 15:40:37.569483 00800000 ################################################################
2144 15:40:38.204970 00880000 ################################################################
2145 15:40:38.866398 00900000 ################################################################
2146 15:40:39.481289 00980000 ################################################################
2147 15:40:40.096790 00a00000 ################################################################
2148 15:40:40.674084 00a80000 ################################################################
2149 15:40:41.361845 00b00000 ################################################################
2150 15:40:42.057703 00b80000 ################################################################
2151 15:40:42.752076 00c00000 ################################################################
2152 15:40:43.436041 00c80000 ################################################################
2153 15:40:44.139859 00d00000 ################################################################
2154 15:40:44.846399 00d80000 ################################################################
2155 15:40:45.491110 00e00000 ################################################################
2156 15:40:46.206888 00e80000 ################################################################
2157 15:40:46.891594 00f00000 ################################################################
2158 15:40:47.584796 00f80000 ################################################################
2159 15:40:48.305442 01000000 ################################################################
2160 15:40:48.982916 01080000 ################################################################
2161 15:40:49.684029 01100000 ################################################################
2162 15:40:50.412042 01180000 ################################################################
2163 15:40:51.004076 01200000 ################################################################
2164 15:40:51.585918 01280000 ################################################################
2165 15:40:52.264506 01300000 ################################################################
2166 15:40:52.938995 01380000 ################################################################
2167 15:40:53.620546 01400000 ################################################################
2168 15:40:54.263627 01480000 ################################################################
2169 15:40:54.971125 01500000 ################################################################
2170 15:40:55.668401 01580000 ################################################################
2171 15:40:56.257600 01600000 ################################################################
2172 15:40:56.906806 01680000 ################################################################
2173 15:40:57.623291 01700000 ################################################################
2174 15:40:58.339014 01780000 ################################################################
2175 15:40:59.042579 01800000 ################################################################
2176 15:40:59.754742 01880000 ################################################################
2177 15:41:00.457561 01900000 ################################################################
2178 15:41:01.154472 01980000 ################################################################
2179 15:41:01.873085 01a00000 ################################################################
2180 15:41:02.579508 01a80000 ################################################################
2181 15:41:03.247925 01b00000 ################################################################
2182 15:41:03.831776 01b80000 ################################################################
2183 15:41:04.525329 01c00000 ################################################################
2184 15:41:05.229764 01c80000 ################################################################
2185 15:41:05.895952 01d00000 ################################################################
2186 15:41:06.578806 01d80000 ################################################################
2187 15:41:07.268489 01e00000 ################################################################
2188 15:41:07.883493 01e80000 ################################################################
2189 15:41:08.492986 01f00000 ################################################################
2190 15:41:09.179241 01f80000 ################################################################
2191 15:41:09.748937 02000000 ################################################################
2192 15:41:10.288195 02080000 ################################################################
2193 15:41:10.823720 02100000 ################################################################
2194 15:41:11.384348 02180000 ################################################################
2195 15:41:11.541367 02200000 ################## done.
2196 15:41:11.544767 Sending tftp read request... done.
2197 15:41:11.548443 Waiting for the transfer...
2198 15:41:11.548528 00000000 # done.
2199 15:41:11.558374 Command line loaded dynamically from TFTP file: 7463488/tftp-deploy-bkj_8q2m/kernel/cmdline
2200 15:41:11.571249 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2201 15:41:11.580664 Shutting down all USB controllers.
2202 15:41:11.580750 Removing current net device
2203 15:41:11.583450 Finalizing coreboot
2204 15:41:11.590474 Exiting depthcharge with code 4 at timestamp: 63640300
2205 15:41:11.590560
2206 15:41:11.590627 Starting kernel ...
2207 15:41:11.590688
2208 15:41:11.590748
2209 15:41:11.591228 end: 2.2.4 bootloader-commands (duration 00:00:55) [common]
2210 15:41:11.591326 start: 2.2.5 auto-login-action (timeout 00:03:49) [common]
2211 15:41:11.591400 Setting prompt string to ['Linux version [0-9]']
2212 15:41:11.591470 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 15:41:11.591539 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2215 15:45:00.591563 end: 2.2.5 auto-login-action (duration 00:03:49) [common]
2217 15:45:00.592133 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 229 seconds'
2219 15:45:00.592378 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 15:45:00.592657 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 15:45:00.592853 Cleaning after the job
2225 15:45:00.592933 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/ramdisk
2226 15:45:00.595125 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/kernel
2227 15:45:00.595639 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463488/tftp-deploy-bkj_8q2m/modules
2228 15:45:00.595832 start: 4.1 power-off (timeout 00:00:30) [common]
2229 15:45:00.595987 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2230 15:45:00.615239 >> Command sent successfully.
2231 15:45:00.617213 Returned 0 in 0 seconds
2232 15:45:00.717872 end: 4.1 power-off (duration 00:00:00) [common]
2234 15:45:00.718221 start: 4.2 read-feedback (timeout 00:10:00) [common]
2235 15:45:00.718475 Listened to connection for namespace 'common' for up to 1s
2236 15:45:01.721834 Finalising connection for namespace 'common'
2237 15:45:01.722012 Disconnecting from shell: Finalise
2238 15:45:01.822754 end: 4.2 read-feedback (duration 00:00:01) [common]
2239 15:45:01.822924 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463488
2240 15:45:01.846870 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463488
2241 15:45:01.847052 JobError: Your job cannot terminate cleanly.