Boot log: asus-C436FA-Flip-hatch

    1 15:40:05.786381  lava-dispatcher, installed at version: 2022.06
    2 15:40:05.786619  start: 0 validate
    3 15:40:05.786769  Start time: 2022-09-30 15:40:05.786761+00:00 (UTC)
    4 15:40:05.786920  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:40:05.787067  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220919.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:40:06.078570  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:40:06.078762  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:40:06.368197  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:40:06.368381  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220919.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:40:06.657890  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:40:06.658067  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:40:06.950854  validate duration: 1.16
   14 15:40:06.951164  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:40:06.951278  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:40:06.951378  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:40:06.951487  Not decompressing ramdisk as can be used compressed.
   18 15:40:06.951580  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220919.0/amd64/initrd.cpio.gz
   19 15:40:06.951657  saving as /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/ramdisk/initrd.cpio.gz
   20 15:40:06.951726  total size: 5431608 (5MB)
   21 15:40:06.952916  progress   0% (0MB)
   22 15:40:06.954527  progress   5% (0MB)
   23 15:40:06.955995  progress  10% (0MB)
   24 15:40:06.957510  progress  15% (0MB)
   25 15:40:06.959140  progress  20% (1MB)
   26 15:40:06.960575  progress  25% (1MB)
   27 15:40:06.962040  progress  30% (1MB)
   28 15:40:06.963647  progress  35% (1MB)
   29 15:40:06.965108  progress  40% (2MB)
   30 15:40:06.966559  progress  45% (2MB)
   31 15:40:06.967993  progress  50% (2MB)
   32 15:40:06.969647  progress  55% (2MB)
   33 15:40:06.971097  progress  60% (3MB)
   34 15:40:06.972548  progress  65% (3MB)
   35 15:40:06.974160  progress  70% (3MB)
   36 15:40:06.975601  progress  75% (3MB)
   37 15:40:06.977034  progress  80% (4MB)
   38 15:40:06.978489  progress  85% (4MB)
   39 15:40:06.980088  progress  90% (4MB)
   40 15:40:06.981533  progress  95% (4MB)
   41 15:40:06.982989  progress 100% (5MB)
   42 15:40:06.983267  5MB downloaded in 0.03s (164.25MB/s)
   43 15:40:06.983429  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:40:06.983712  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:40:06.983814  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:40:06.983913  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:40:06.984028  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:40:06.984105  saving as /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/kernel/bzImage
   50 15:40:06.984174  total size: 7126928 (6MB)
   51 15:40:06.984241  No compression specified
   52 15:40:11.485415  progress   0% (0MB)
   53 15:40:11.487463  progress   5% (0MB)
   54 15:40:11.489502  progress  10% (0MB)
   55 15:40:11.491547  progress  15% (1MB)
   56 15:40:11.493604  progress  20% (1MB)
   57 15:40:11.495584  progress  25% (1MB)
   58 15:40:11.497576  progress  30% (2MB)
   59 15:40:11.499539  progress  35% (2MB)
   60 15:40:11.501331  progress  40% (2MB)
   61 15:40:11.503278  progress  45% (3MB)
   62 15:40:11.505233  progress  50% (3MB)
   63 15:40:11.507174  progress  55% (3MB)
   64 15:40:11.509125  progress  60% (4MB)
   65 15:40:11.511066  progress  65% (4MB)
   66 15:40:11.513015  progress  70% (4MB)
   67 15:40:11.514960  progress  75% (5MB)
   68 15:40:11.516738  progress  80% (5MB)
   69 15:40:11.518738  progress  85% (5MB)
   70 15:40:11.520686  progress  90% (6MB)
   71 15:40:11.522641  progress  95% (6MB)
   72 15:40:11.524649  progress 100% (6MB)
   73 15:40:11.524890  6MB downloaded in 4.54s (1.50MB/s)
   74 15:40:11.525054  end: 1.2.1 http-download (duration 00:00:05) [common]
   76 15:40:11.525336  end: 1.2 download-retry (duration 00:00:05) [common]
   77 15:40:11.525436  start: 1.3 download-retry (timeout 00:09:55) [common]
   78 15:40:11.525533  start: 1.3.1 http-download (timeout 00:09:55) [common]
   79 15:40:11.525648  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220919.0/amd64/full.rootfs.tar.xz
   80 15:40:11.525722  saving as /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/nfsrootfs/full.rootfs.tar
   81 15:40:11.525791  total size: 207142660 (197MB)
   82 15:40:11.525857  Using unxz to decompress xz
   83 15:40:11.529314  progress   0% (0MB)
   84 15:40:12.158367  progress   5% (9MB)
   85 15:40:12.769848  progress  10% (19MB)
   86 15:40:13.452322  progress  15% (29MB)
   87 15:40:13.881844  progress  20% (39MB)
   88 15:40:14.286734  progress  25% (49MB)
   89 15:40:14.945787  progress  30% (59MB)
   90 15:40:15.557012  progress  35% (69MB)
   91 15:40:16.220939  progress  40% (79MB)
   92 15:40:16.836989  progress  45% (88MB)
   93 15:40:17.479285  progress  50% (98MB)
   94 15:40:18.170296  progress  55% (108MB)
   95 15:40:18.935553  progress  60% (118MB)
   96 15:40:19.104229  progress  65% (128MB)
   97 15:40:19.274333  progress  70% (138MB)
   98 15:40:19.376402  progress  75% (148MB)
   99 15:40:19.459495  progress  80% (158MB)
  100 15:40:19.535679  progress  85% (167MB)
  101 15:40:19.651217  progress  90% (177MB)
  102 15:40:19.953297  progress  95% (187MB)
  103 15:40:20.607651  progress 100% (197MB)
  104 15:40:20.613925  197MB downloaded in 9.09s (21.74MB/s)
  105 15:40:20.614289  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 15:40:20.614696  end: 1.3 download-retry (duration 00:00:09) [common]
  108 15:40:20.614841  start: 1.4 download-retry (timeout 00:09:46) [common]
  109 15:40:20.614965  start: 1.4.1 http-download (timeout 00:09:46) [common]
  110 15:40:20.615135  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:40:20.615262  saving as /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/modules/modules.tar
  112 15:40:20.615363  total size: 51896 (0MB)
  113 15:40:20.615479  Using unxz to decompress xz
  114 15:40:20.905151  progress  63% (0MB)
  115 15:40:20.905638  progress 100% (0MB)
  116 15:40:20.909257  0MB downloaded in 0.29s (0.17MB/s)
  117 15:40:20.909529  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 15:40:20.909830  end: 1.4 download-retry (duration 00:00:00) [common]
  120 15:40:20.909945  start: 1.5 prepare-tftp-overlay (timeout 00:09:46) [common]
  121 15:40:20.910063  start: 1.5.1 extract-nfsrootfs (timeout 00:09:46) [common]
  122 15:40:23.188566  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7463472/extract-nfsrootfs-nf36q4_t
  123 15:40:23.188778  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 15:40:23.188892  start: 1.5.2 lava-overlay (timeout 00:09:44) [common]
  125 15:40:23.189044  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw
  126 15:40:23.189173  makedir: /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin
  127 15:40:23.189269  makedir: /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/tests
  128 15:40:23.189358  makedir: /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/results
  129 15:40:23.189464  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-add-keys
  130 15:40:23.189604  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-add-sources
  131 15:40:23.189729  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-background-process-start
  132 15:40:23.189853  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-background-process-stop
  133 15:40:23.189975  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-common-functions
  134 15:40:23.190098  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-echo-ipv4
  135 15:40:23.190235  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-install-packages
  136 15:40:23.190371  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-installed-packages
  137 15:40:23.190497  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-os-build
  138 15:40:23.190629  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-probe-channel
  139 15:40:23.190767  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-probe-ip
  140 15:40:23.190893  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-target-ip
  141 15:40:23.191013  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-target-mac
  142 15:40:23.191133  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-target-storage
  143 15:40:23.191269  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-case
  144 15:40:23.191421  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-event
  145 15:40:23.191567  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-feedback
  146 15:40:23.191693  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-raise
  147 15:40:23.191813  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-reference
  148 15:40:23.191932  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-runner
  149 15:40:23.192068  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-set
  150 15:40:23.192201  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-test-shell
  151 15:40:23.192324  Updating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-add-keys (debian)
  152 15:40:23.192451  Updating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-add-sources (debian)
  153 15:40:23.192576  Updating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-install-packages (debian)
  154 15:40:23.192696  Updating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-installed-packages (debian)
  155 15:40:23.192815  Updating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/bin/lava-os-build (debian)
  156 15:40:23.192934  Creating /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/environment
  157 15:40:23.193037  LAVA metadata
  158 15:40:23.193153  - LAVA_JOB_ID=7463472
  159 15:40:23.193226  - LAVA_DISPATCHER_IP=192.168.201.1
  160 15:40:23.193341  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:44) [common]
  161 15:40:23.193430  skipped lava-vland-overlay
  162 15:40:23.193517  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 15:40:23.193607  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:44) [common]
  164 15:40:23.193675  skipped lava-multinode-overlay
  165 15:40:23.193756  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 15:40:23.193845  start: 1.5.2.3 test-definition (timeout 00:09:44) [common]
  167 15:40:23.193933  Loading test definitions
  168 15:40:23.194033  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:44) [common]
  169 15:40:23.194120  Using /lava-7463472 at stage 0
  170 15:40:23.194391  uuid=7463472_1.5.2.3.1 testdef=None
  171 15:40:23.194499  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 15:40:23.194596  start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
  173 15:40:23.195060  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 15:40:23.195331  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
  176 15:40:23.195885  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 15:40:23.196159  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
  179 15:40:23.196695  runner path: /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/0/tests/0_timesync-off test_uuid 7463472_1.5.2.3.1
  180 15:40:23.196869  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 15:40:23.197145  start: 1.5.2.3.5 git-repo-action (timeout 00:09:44) [common]
  183 15:40:23.197228  Using /lava-7463472 at stage 0
  184 15:40:23.197342  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 15:40:23.197452  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/0/tests/1_kselftest-alsa'
  186 15:40:41.033664  Running '/usr/bin/git checkout kernelci.org
  187 15:40:41.093040  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
  188 15:40:41.093818  uuid=7463472_1.5.2.3.5 testdef=None
  189 15:40:41.093998  end: 1.5.2.3.5 git-repo-action (duration 00:00:18) [common]
  191 15:40:41.094288  start: 1.5.2.3.6 test-overlay (timeout 00:09:26) [common]
  192 15:40:41.095077  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 15:40:41.095357  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:26) [common]
  195 15:40:41.096392  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 15:40:41.096672  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:26) [common]
  198 15:40:41.097711  runner path: /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/0/tests/1_kselftest-alsa test_uuid 7463472_1.5.2.3.5
  199 15:40:41.097811  BOARD='asus-C436FA-Flip-hatch'
  200 15:40:41.097885  BRANCH='cip'
  201 15:40:41.097970  SKIPFILE='skipfile-lkft.yaml'
  202 15:40:41.098053  TESTPROG_URL='None'
  203 15:40:41.098119  TST_CASENAME=''
  204 15:40:41.098182  TST_CMDFILES='alsa'
  205 15:40:41.098331  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 15:40:41.098578  Creating lava-test-runner.conf files
  208 15:40:41.098651  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463472/lava-overlay-tn6o13yw/lava-7463472/0 for stage 0
  209 15:40:41.098746  - 0_timesync-off
  210 15:40:41.098819  - 1_kselftest-alsa
  211 15:40:41.098926  end: 1.5.2.3 test-definition (duration 00:00:18) [common]
  212 15:40:41.099027  start: 1.5.2.4 compress-overlay (timeout 00:09:26) [common]
  213 15:40:49.094933  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  214 15:40:49.095107  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:18) [common]
  215 15:40:49.095214  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 15:40:49.095329  end: 1.5.2 lava-overlay (duration 00:00:26) [common]
  217 15:40:49.095432  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:18) [common]
  218 15:40:49.209912  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 15:40:49.210299  start: 1.5.4 extract-modules (timeout 00:09:18) [common]
  220 15:40:49.210425  extracting modules file /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463472/extract-nfsrootfs-nf36q4_t
  221 15:40:49.214930  extracting modules file /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463472/extract-overlay-ramdisk-lp4kc3ht/ramdisk
  222 15:40:49.219235  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 15:40:49.219362  start: 1.5.5 apply-overlay-tftp (timeout 00:09:18) [common]
  224 15:40:49.219464  [common] Applying overlay to NFS
  225 15:40:49.219545  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463472/compress-overlay-6x3080nm/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463472/extract-nfsrootfs-nf36q4_t
  226 15:40:49.715613  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 15:40:49.715797  start: 1.5.6 configure-preseed-file (timeout 00:09:17) [common]
  228 15:40:49.715905  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 15:40:49.716008  start: 1.5.7 compress-ramdisk (timeout 00:09:17) [common]
  230 15:40:49.716099  Building ramdisk /var/lib/lava/dispatcher/tmp/7463472/extract-overlay-ramdisk-lp4kc3ht/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463472/extract-overlay-ramdisk-lp4kc3ht/ramdisk
  231 15:40:49.753802  >> 24546 blocks

  232 15:40:50.290400  rename /var/lib/lava/dispatcher/tmp/7463472/extract-overlay-ramdisk-lp4kc3ht/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/ramdisk/ramdisk.cpio.gz
  233 15:40:50.290841  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 15:40:50.290976  start: 1.5.8 prepare-kernel (timeout 00:09:17) [common]
  235 15:40:50.291096  start: 1.5.8.1 prepare-fit (timeout 00:09:17) [common]
  236 15:40:50.291203  No mkimage arch provided, not using FIT.
  237 15:40:50.291300  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 15:40:50.291396  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 15:40:50.291508  end: 1.5 prepare-tftp-overlay (duration 00:00:29) [common]
  240 15:40:50.291608  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:17) [common]
  241 15:40:50.291692  No LXC device requested
  242 15:40:50.291783  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 15:40:50.291884  start: 1.7 deploy-device-env (timeout 00:09:17) [common]
  244 15:40:50.291977  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 15:40:50.292057  Checking files for TFTP limit of 4294967296 bytes.
  246 15:40:50.292476  end: 1 tftp-deploy (duration 00:00:43) [common]
  247 15:40:50.292596  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 15:40:50.292701  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 15:40:50.292846  substitutions:
  250 15:40:50.292922  - {DTB}: None
  251 15:40:50.292995  - {INITRD}: 7463472/tftp-deploy-x5pa_00i/ramdisk/ramdisk.cpio.gz
  252 15:40:50.293071  - {KERNEL}: 7463472/tftp-deploy-x5pa_00i/kernel/bzImage
  253 15:40:50.293143  - {LAVA_MAC}: None
  254 15:40:50.293209  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7463472/extract-nfsrootfs-nf36q4_t
  255 15:40:50.293276  - {NFS_SERVER_IP}: 192.168.201.1
  256 15:40:50.293340  - {PRESEED_CONFIG}: None
  257 15:40:50.293405  - {PRESEED_LOCAL}: None
  258 15:40:50.293467  - {RAMDISK}: 7463472/tftp-deploy-x5pa_00i/ramdisk/ramdisk.cpio.gz
  259 15:40:50.293529  - {ROOT_PART}: None
  260 15:40:50.293590  - {ROOT}: None
  261 15:40:50.293651  - {SERVER_IP}: 192.168.201.1
  262 15:40:50.293712  - {TEE}: None
  263 15:40:50.293782  Parsed boot commands:
  264 15:40:50.293851  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 15:40:50.294021  Parsed boot commands: tftpboot 192.168.201.1 7463472/tftp-deploy-x5pa_00i/kernel/bzImage 7463472/tftp-deploy-x5pa_00i/kernel/cmdline 7463472/tftp-deploy-x5pa_00i/ramdisk/ramdisk.cpio.gz
  266 15:40:50.294127  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 15:40:50.294224  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 15:40:50.294348  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 15:40:50.294454  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 15:40:50.294536  Not connected, no need to disconnect.
  271 15:40:50.294624  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 15:40:50.294718  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 15:40:50.294796  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  274 15:40:50.297885  Setting prompt string to ['lava-test: # ']
  275 15:40:50.298208  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 15:40:50.298328  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 15:40:50.298449  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 15:40:50.298557  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 15:40:50.298760  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  280 15:40:50.319935  >> Command sent successfully.

  281 15:40:50.321996  Returned 0 in 0 seconds
  282 15:40:50.422778  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 15:40:50.423122  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 15:40:50.423234  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 15:40:50.423333  Setting prompt string to 'Starting depthcharge on Helios...'
  287 15:40:50.423407  Changing prompt to 'Starting depthcharge on Helios...'
  288 15:40:50.423482  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 15:40:50.423767  [Enter `^Ec?' for help]
  290 15:40:57.009969  
  291 15:40:57.010137  
  292 15:40:57.019981  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 15:40:57.023290  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 15:40:57.029887  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 15:40:57.033075  CPU: AES supported, TXT NOT supported, VT supported
  296 15:40:57.039670  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 15:40:57.043187  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 15:40:57.049704  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 15:40:57.053006  VBOOT: Loading verstage.
  300 15:40:57.056175  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 15:40:57.062931  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 15:40:57.066657  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 15:40:57.069965  CBFS @ c08000 size 3f8000
  304 15:40:57.076546  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 15:40:57.079912  CBFS: Locating 'fallback/verstage'
  306 15:40:57.083069  CBFS: Found @ offset 10fb80 size 1072c
  307 15:40:57.086864  
  308 15:40:57.086951  
  309 15:40:57.096827  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 15:40:57.111047  Probing TPM: . done!
  311 15:40:57.114437  TPM ready after 0 ms
  312 15:40:57.117715  Connected to device vid:did:rid of 1ae0:0028:00
  313 15:40:57.127838  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 15:40:57.131179  Initialized TPM device CR50 revision 0
  315 15:40:57.178613  tlcl_send_startup: Startup return code is 0
  316 15:40:57.178742  TPM: setup succeeded
  317 15:40:57.192282  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 15:40:57.196177  Chrome EC: UHEPI supported
  319 15:40:57.199500  Phase 1
  320 15:40:57.202957  FMAP: area GBB found @ c05000 (12288 bytes)
  321 15:40:57.209387  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 15:40:57.212617  Phase 2
  323 15:40:57.212713  Phase 3
  324 15:40:57.215922  FMAP: area GBB found @ c05000 (12288 bytes)
  325 15:40:57.223058  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 15:40:57.229569  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  327 15:40:57.232975  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  328 15:40:57.239447  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 15:40:57.254945  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  330 15:40:57.258183  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  331 15:40:57.264896  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 15:40:57.269004  Phase 4
  333 15:40:57.272451  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  334 15:40:57.278930  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 15:40:57.458638  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 15:40:57.465163  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 15:40:57.465320  Saving nvdata
  338 15:40:57.468664  Reboot requested (10020007)
  339 15:40:57.472034  board_reset() called!
  340 15:40:57.472167  full_reset() called!
  341 15:41:01.976596  
  342 15:41:01.976806  
  343 15:41:01.987146  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 15:41:01.990098  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 15:41:01.996934  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 15:41:02.000283  CPU: AES supported, TXT NOT supported, VT supported
  347 15:41:02.006670  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 15:41:02.009935  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 15:41:02.016814  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 15:41:02.019638  VBOOT: Loading verstage.
  351 15:41:02.022842  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 15:41:02.029910  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 15:41:02.036441  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 15:41:02.036566  CBFS @ c08000 size 3f8000
  355 15:41:02.043112  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 15:41:02.046378  CBFS: Locating 'fallback/verstage'
  357 15:41:02.049470  CBFS: Found @ offset 10fb80 size 1072c
  358 15:41:02.053837  
  359 15:41:02.053960  
  360 15:41:02.063318  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 15:41:02.078312  Probing TPM: . done!
  362 15:41:02.081324  TPM ready after 0 ms
  363 15:41:02.084441  Connected to device vid:did:rid of 1ae0:0028:00
  364 15:41:02.094799  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 15:41:02.097976  Initialized TPM device CR50 revision 0
  366 15:41:02.144960  tlcl_send_startup: Startup return code is 0
  367 15:41:02.145125  TPM: setup succeeded
  368 15:41:02.158284  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 15:41:02.162203  Chrome EC: UHEPI supported
  370 15:41:02.164932  Phase 1
  371 15:41:02.168480  FMAP: area GBB found @ c05000 (12288 bytes)
  372 15:41:02.175166  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 15:41:02.181853  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 15:41:02.185265  Recovery requested (1009000e)
  375 15:41:02.190693  Saving nvdata
  376 15:41:02.196667  tlcl_extend: response is 0
  377 15:41:02.205869  tlcl_extend: response is 0
  378 15:41:02.212548  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 15:41:02.215961  CBFS @ c08000 size 3f8000
  380 15:41:02.222762  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 15:41:02.225951  CBFS: Locating 'fallback/romstage'
  382 15:41:02.229295  CBFS: Found @ offset 80 size 145fc
  383 15:41:02.232547  Accumulated console time in verstage 98 ms
  384 15:41:02.232890  
  385 15:41:02.233194  
  386 15:41:02.245636  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 15:41:02.252107  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 15:41:02.255996  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 15:41:02.258834  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 15:41:02.265423  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 15:41:02.268983  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 15:41:02.272404  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  393 15:41:02.275607  TCO_STS:   0000 0000
  394 15:41:02.278954  GEN_PMCON: e0015238 00000200
  395 15:41:02.282265  GBLRST_CAUSE: 00000000 00000000
  396 15:41:02.282642  prev_sleep_state 5
  397 15:41:02.285694  Boot Count incremented to 30355
  398 15:41:02.292824  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 15:41:02.295943  CBFS @ c08000 size 3f8000
  400 15:41:02.302238  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 15:41:02.302585  CBFS: Locating 'fspm.bin'
  402 15:41:02.309125  CBFS: Found @ offset 5ffc0 size 71000
  403 15:41:02.312472  Chrome EC: UHEPI supported
  404 15:41:02.318869  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 15:41:02.322735  Probing TPM:  done!
  406 15:41:02.329357  Connected to device vid:did:rid of 1ae0:0028:00
  407 15:41:02.338913  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 15:41:02.345273  Initialized TPM device CR50 revision 0
  409 15:41:02.354893  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 15:41:02.361860  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 15:41:02.365284  MRC cache found, size 1948
  412 15:41:02.368456  bootmode is set to: 2
  413 15:41:02.371733  PRMRR disabled by config.
  414 15:41:02.374659  SPD INDEX = 1
  415 15:41:02.378106  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 15:41:02.381386  CBFS @ c08000 size 3f8000
  417 15:41:02.388219  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 15:41:02.388506  CBFS: Locating 'spd.bin'
  419 15:41:02.391561  CBFS: Found @ offset 5fb80 size 400
  420 15:41:02.394804  SPD: module type is LPDDR3
  421 15:41:02.398287  SPD: module part is 
  422 15:41:02.404907  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 15:41:02.408236  SPD: device width 4 bits, bus width 8 bits
  424 15:41:02.411496  SPD: module size is 4096 MB (per channel)
  425 15:41:02.415013  memory slot: 0 configuration done.
  426 15:41:02.418225  memory slot: 2 configuration done.
  427 15:41:02.469994  CBMEM:
  428 15:41:02.473021  IMD: root @ 99fff000 254 entries.
  429 15:41:02.476320  IMD: root @ 99ffec00 62 entries.
  430 15:41:02.479489  External stage cache:
  431 15:41:02.482896  IMD: root @ 9abff000 254 entries.
  432 15:41:02.486148  IMD: root @ 9abfec00 62 entries.
  433 15:41:02.489443  Chrome EC: clear events_b mask to 0x0000000020004000
  434 15:41:02.506844  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 15:41:02.521768  tlcl_write: response is 0
  436 15:41:02.531236  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 15:41:02.537810  MRC: TPM MRC hash updated successfully.
  438 15:41:02.538208  2 DIMMs found
  439 15:41:02.541146  SMM Memory Map
  440 15:41:02.544388  SMRAM       : 0x9a000000 0x1000000
  441 15:41:02.548229   Subregion 0: 0x9a000000 0xa00000
  442 15:41:02.551662   Subregion 1: 0x9aa00000 0x200000
  443 15:41:02.554811   Subregion 2: 0x9ac00000 0x400000
  444 15:41:02.558225  top_of_ram = 0x9a000000
  445 15:41:02.561416  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 15:41:02.567385  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 15:41:02.570907  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 15:41:02.577881  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 15:41:02.581089  CBFS @ c08000 size 3f8000
  450 15:41:02.584459  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 15:41:02.587928  CBFS: Locating 'fallback/postcar'
  452 15:41:02.593915  CBFS: Found @ offset 107000 size 4b44
  453 15:41:02.597295  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 15:41:02.609894  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 15:41:02.612991  Processing 180 relocs. Offset value of 0x97c0c000
  456 15:41:02.621547  Accumulated console time in romstage 286 ms
  457 15:41:02.621887  
  458 15:41:02.622155  
  459 15:41:02.631291  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 15:41:02.637909  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 15:41:02.641562  CBFS @ c08000 size 3f8000
  462 15:41:02.644941  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 15:41:02.651549  CBFS: Locating 'fallback/ramstage'
  464 15:41:02.654973  CBFS: Found @ offset 43380 size 1b9e8
  465 15:41:02.661339  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 15:41:02.693373  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 15:41:02.696669  Processing 3976 relocs. Offset value of 0x98db0000
  468 15:41:02.703250  Accumulated console time in postcar 52 ms
  469 15:41:02.703586  
  470 15:41:02.703852  
  471 15:41:02.712940  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 15:41:02.719510  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 15:41:02.722793  WARNING: RO_VPD is uninitialized or empty.
  474 15:41:02.726100  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 15:41:02.732690  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 15:41:02.732802  Normal boot.
  477 15:41:02.739192  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 15:41:02.742523  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 15:41:02.746026  CBFS @ c08000 size 3f8000
  480 15:41:02.752683  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 15:41:02.755837  CBFS: Locating 'cpu_microcode_blob.bin'
  482 15:41:02.759442  CBFS: Found @ offset 14700 size 2ec00
  483 15:41:02.762910  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 15:41:02.766083  Skip microcode update
  485 15:41:02.772553  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 15:41:02.772896  CBFS @ c08000 size 3f8000
  487 15:41:02.779213  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 15:41:02.782533  CBFS: Locating 'fsps.bin'
  489 15:41:02.785997  CBFS: Found @ offset d1fc0 size 35000
  490 15:41:02.811237  Detected 4 core, 8 thread CPU.
  491 15:41:02.815130  Setting up SMI for CPU
  492 15:41:02.818202  IED base = 0x9ac00000
  493 15:41:02.818550  IED size = 0x00400000
  494 15:41:02.821519  Will perform SMM setup.
  495 15:41:02.827903  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 15:41:02.834381  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 15:41:02.837535  Processing 16 relocs. Offset value of 0x00030000
  498 15:41:02.841669  Attempting to start 7 APs
  499 15:41:02.844806  Waiting for 10ms after sending INIT.
  500 15:41:02.860693  Waiting for 1st SIPI to complete...done.
  501 15:41:02.860789  AP: slot 7 apic_id 7.
  502 15:41:02.864132  AP: slot 6 apic_id 6.
  503 15:41:02.867528  AP: slot 1 apic_id 2.
  504 15:41:02.867623  AP: slot 4 apic_id 3.
  505 15:41:02.870999  AP: slot 5 apic_id 4.
  506 15:41:02.874307  AP: slot 2 apic_id 5.
  507 15:41:02.877527  Waiting for 2nd SIPI to complete...done.
  508 15:41:02.880923  AP: slot 3 apic_id 1.
  509 15:41:02.887651  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 15:41:02.894264  Processing 13 relocs. Offset value of 0x00038000
  511 15:41:02.897422  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 15:41:02.904046  Installing SMM handler to 0x9a000000
  513 15:41:02.910710  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 15:41:02.916936  Processing 658 relocs. Offset value of 0x9a010000
  515 15:41:02.923761  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 15:41:02.926842  Processing 13 relocs. Offset value of 0x9a008000
  517 15:41:02.933404  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 15:41:02.940614  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 15:41:02.947116  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 15:41:02.950063  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 15:41:02.957001  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 15:41:02.963408  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 15:41:02.966594  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 15:41:02.973425  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 15:41:02.976793  Clearing SMI status registers
  526 15:41:02.980119  SMI_STS: PM1 
  527 15:41:02.980225  PM1_STS: PWRBTN 
  528 15:41:02.983486  TCO_STS: SECOND_TO 
  529 15:41:02.987001  New SMBASE 0x9a000000
  530 15:41:02.990190  In relocation handler: CPU 0
  531 15:41:02.993465  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 15:41:02.996833  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 15:41:03.000037  Relocation complete.
  534 15:41:03.003462  New SMBASE 0x99fff400
  535 15:41:03.003559  In relocation handler: CPU 3
  536 15:41:03.010079  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  537 15:41:03.013309  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 15:41:03.017048  Relocation complete.
  539 15:41:03.020132  New SMBASE 0x99ffe800
  540 15:41:03.020229  In relocation handler: CPU 6
  541 15:41:03.027120  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  542 15:41:03.030445  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 15:41:03.033705  Relocation complete.
  544 15:41:03.033805  New SMBASE 0x99ffe400
  545 15:41:03.036538  In relocation handler: CPU 7
  546 15:41:03.043283  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  547 15:41:03.047190  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 15:41:03.050586  Relocation complete.
  549 15:41:03.050682  New SMBASE 0x99fffc00
  550 15:41:03.053680  In relocation handler: CPU 1
  551 15:41:03.057081  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  552 15:41:03.063412  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 15:41:03.066519  Relocation complete.
  554 15:41:03.066615  New SMBASE 0x99fff000
  555 15:41:03.069830  In relocation handler: CPU 4
  556 15:41:03.073317  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  557 15:41:03.079836  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 15:41:03.083058  Relocation complete.
  559 15:41:03.083154  New SMBASE 0x99ffec00
  560 15:41:03.086631  In relocation handler: CPU 5
  561 15:41:03.089854  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  562 15:41:03.096459  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 15:41:03.096556  Relocation complete.
  564 15:41:03.099974  New SMBASE 0x99fff800
  565 15:41:03.103154  In relocation handler: CPU 2
  566 15:41:03.106635  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  567 15:41:03.113110  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 15:41:03.113206  Relocation complete.
  569 15:41:03.116505  Initializing CPU #0
  570 15:41:03.119733  CPU: vendor Intel device 806ec
  571 15:41:03.123007  CPU: family 06, model 8e, stepping 0c
  572 15:41:03.126286  Clearing out pending MCEs
  573 15:41:03.129699  Setting up local APIC...
  574 15:41:03.129781   apic_id: 0x00 done.
  575 15:41:03.132989  Turbo is available but hidden
  576 15:41:03.136129  Turbo is available and visible
  577 15:41:03.140000  VMX status: enabled
  578 15:41:03.143226  IA32_FEATURE_CONTROL status: locked
  579 15:41:03.146713  Skip microcode update
  580 15:41:03.146814  CPU #0 initialized
  581 15:41:03.149919  Initializing CPU #3
  582 15:41:03.150008  Initializing CPU #2
  583 15:41:03.153010  Initializing CPU #5
  584 15:41:03.156079  CPU: vendor Intel device 806ec
  585 15:41:03.159376  CPU: family 06, model 8e, stepping 0c
  586 15:41:03.162759  CPU: vendor Intel device 806ec
  587 15:41:03.166154  CPU: family 06, model 8e, stepping 0c
  588 15:41:03.169455  Clearing out pending MCEs
  589 15:41:03.172676  Initializing CPU #4
  590 15:41:03.172773  Initializing CPU #1
  591 15:41:03.176039  CPU: vendor Intel device 806ec
  592 15:41:03.179482  CPU: family 06, model 8e, stepping 0c
  593 15:41:03.182804  CPU: vendor Intel device 806ec
  594 15:41:03.186149  CPU: family 06, model 8e, stepping 0c
  595 15:41:03.189440  Clearing out pending MCEs
  596 15:41:03.192705  Clearing out pending MCEs
  597 15:41:03.195823  Setting up local APIC...
  598 15:41:03.199160  CPU: vendor Intel device 806ec
  599 15:41:03.202434  CPU: family 06, model 8e, stepping 0c
  600 15:41:03.205668  Clearing out pending MCEs
  601 15:41:03.205752   apic_id: 0x03 done.
  602 15:41:03.209529  Setting up local APIC...
  603 15:41:03.212456  Setting up local APIC...
  604 15:41:03.212543  VMX status: enabled
  605 15:41:03.216122   apic_id: 0x02 done.
  606 15:41:03.219518  IA32_FEATURE_CONTROL status: locked
  607 15:41:03.222613  VMX status: enabled
  608 15:41:03.225883  Skip microcode update
  609 15:41:03.229233  IA32_FEATURE_CONTROL status: locked
  610 15:41:03.229328  CPU #4 initialized
  611 15:41:03.232420   apic_id: 0x01 done.
  612 15:41:03.235912  Setting up local APIC...
  613 15:41:03.236007  Skip microcode update
  614 15:41:03.239196  Initializing CPU #6
  615 15:41:03.242606  Clearing out pending MCEs
  616 15:41:03.242694   apic_id: 0x05 done.
  617 15:41:03.245939  Setting up local APIC...
  618 15:41:03.249300  CPU #1 initialized
  619 15:41:03.249382   apic_id: 0x04 done.
  620 15:41:03.252600  VMX status: enabled
  621 15:41:03.255811  VMX status: enabled
  622 15:41:03.259275  IA32_FEATURE_CONTROL status: locked
  623 15:41:03.262419  IA32_FEATURE_CONTROL status: locked
  624 15:41:03.262516  Skip microcode update
  625 15:41:03.265637  Skip microcode update
  626 15:41:03.268936  CPU #2 initialized
  627 15:41:03.269039  CPU #5 initialized
  628 15:41:03.272367  VMX status: enabled
  629 15:41:03.275612  CPU: vendor Intel device 806ec
  630 15:41:03.278980  CPU: family 06, model 8e, stepping 0c
  631 15:41:03.282300  Initializing CPU #7
  632 15:41:03.282403  Clearing out pending MCEs
  633 15:41:03.285738  CPU: vendor Intel device 806ec
  634 15:41:03.289216  CPU: family 06, model 8e, stepping 0c
  635 15:41:03.291952  Setting up local APIC...
  636 15:41:03.295308  IA32_FEATURE_CONTROL status: locked
  637 15:41:03.298603   apic_id: 0x06 done.
  638 15:41:03.302034  Clearing out pending MCEs
  639 15:41:03.302187  VMX status: enabled
  640 15:41:03.305225  Setting up local APIC...
  641 15:41:03.308644  Skip microcode update
  642 15:41:03.308824   apic_id: 0x07 done.
  643 15:41:03.315155  IA32_FEATURE_CONTROL status: locked
  644 15:41:03.315334  VMX status: enabled
  645 15:41:03.318570  Skip microcode update
  646 15:41:03.321755  IA32_FEATURE_CONTROL status: locked
  647 15:41:03.325210  CPU #6 initialized
  648 15:41:03.325392  Skip microcode update
  649 15:41:03.328582  CPU #3 initialized
  650 15:41:03.328751  CPU #7 initialized
  651 15:41:03.335228  bsp_do_flight_plan done after 454 msecs.
  652 15:41:03.338658  CPU: frequency set to 4200 MHz
  653 15:41:03.338831  Enabling SMIs.
  654 15:41:03.338969  Locking SMM.
  655 15:41:03.354763  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 15:41:03.358065  CBFS @ c08000 size 3f8000
  657 15:41:03.364917  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 15:41:03.365351  CBFS: Locating 'vbt.bin'
  659 15:41:03.368187  CBFS: Found @ offset 5f5c0 size 499
  660 15:41:03.375448  Found a VBT of 4608 bytes after decompression
  661 15:41:03.558984  Display FSP Version Info HOB
  662 15:41:03.562069  Reference Code - CPU = 9.0.1e.30
  663 15:41:03.565479  uCode Version = 0.0.0.ca
  664 15:41:03.568950  TXT ACM version = ff.ff.ff.ffff
  665 15:41:03.572169  Display FSP Version Info HOB
  666 15:41:03.575401  Reference Code - ME = 9.0.1e.30
  667 15:41:03.578706  MEBx version = 0.0.0.0
  668 15:41:03.582293  ME Firmware Version = Consumer SKU
  669 15:41:03.585202  Display FSP Version Info HOB
  670 15:41:03.588496  Reference Code - CML PCH = 9.0.1e.30
  671 15:41:03.591917  PCH-CRID Status = Disabled
  672 15:41:03.595069  PCH-CRID Original Value = ff.ff.ff.ffff
  673 15:41:03.598461  PCH-CRID New Value = ff.ff.ff.ffff
  674 15:41:03.601875  OPROM - RST - RAID = ff.ff.ff.ffff
  675 15:41:03.605033  ChipsetInit Base Version = ff.ff.ff.ffff
  676 15:41:03.608607  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 15:41:03.611842  Display FSP Version Info HOB
  678 15:41:03.618112  Reference Code - SA - System Agent = 9.0.1e.30
  679 15:41:03.621421  Reference Code - MRC = 0.7.1.6c
  680 15:41:03.621786  SA - PCIe Version = 9.0.1e.30
  681 15:41:03.625221  SA-CRID Status = Disabled
  682 15:41:03.628444  SA-CRID Original Value = 0.0.0.c
  683 15:41:03.631627  SA-CRID New Value = 0.0.0.c
  684 15:41:03.635067  OPROM - VBIOS = ff.ff.ff.ffff
  685 15:41:03.638452  RTC Init
  686 15:41:03.641786  Set power on after power failure.
  687 15:41:03.642151  Disabling Deep S3
  688 15:41:03.645224  Disabling Deep S3
  689 15:41:03.645589  Disabling Deep S4
  690 15:41:03.648351  Disabling Deep S4
  691 15:41:03.648717  Disabling Deep S5
  692 15:41:03.651683  Disabling Deep S5
  693 15:41:03.658103  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
  694 15:41:03.658526  Enumerating buses...
  695 15:41:03.664630  Show all devs... Before device enumeration.
  696 15:41:03.665024  Root Device: enabled 1
  697 15:41:03.668109  CPU_CLUSTER: 0: enabled 1
  698 15:41:03.671427  DOMAIN: 0000: enabled 1
  699 15:41:03.674717  APIC: 00: enabled 1
  700 15:41:03.675108  PCI: 00:00.0: enabled 1
  701 15:41:03.678212  PCI: 00:02.0: enabled 1
  702 15:41:03.680995  PCI: 00:04.0: enabled 0
  703 15:41:03.684318  PCI: 00:05.0: enabled 0
  704 15:41:03.684711  PCI: 00:12.0: enabled 1
  705 15:41:03.687903  PCI: 00:12.5: enabled 0
  706 15:41:03.691076  PCI: 00:12.6: enabled 0
  707 15:41:03.694583  PCI: 00:14.0: enabled 1
  708 15:41:03.695034  PCI: 00:14.1: enabled 0
  709 15:41:03.697719  PCI: 00:14.3: enabled 1
  710 15:41:03.701094  PCI: 00:14.5: enabled 0
  711 15:41:03.701463  PCI: 00:15.0: enabled 1
  712 15:41:03.704531  PCI: 00:15.1: enabled 1
  713 15:41:03.707871  PCI: 00:15.2: enabled 0
  714 15:41:03.710742  PCI: 00:15.3: enabled 0
  715 15:41:03.711107  PCI: 00:16.0: enabled 1
  716 15:41:03.714053  PCI: 00:16.1: enabled 0
  717 15:41:03.717466  PCI: 00:16.2: enabled 0
  718 15:41:03.720786  PCI: 00:16.3: enabled 0
  719 15:41:03.721179  PCI: 00:16.4: enabled 0
  720 15:41:03.724170  PCI: 00:16.5: enabled 0
  721 15:41:03.727570  PCI: 00:17.0: enabled 1
  722 15:41:03.730896  PCI: 00:19.0: enabled 1
  723 15:41:03.731274  PCI: 00:19.1: enabled 0
  724 15:41:03.734143  PCI: 00:19.2: enabled 0
  725 15:41:03.737443  PCI: 00:1a.0: enabled 0
  726 15:41:03.737805  PCI: 00:1c.0: enabled 0
  727 15:41:03.740937  PCI: 00:1c.1: enabled 0
  728 15:41:03.744147  PCI: 00:1c.2: enabled 0
  729 15:41:03.747425  PCI: 00:1c.3: enabled 0
  730 15:41:03.747793  PCI: 00:1c.4: enabled 0
  731 15:41:03.750747  PCI: 00:1c.5: enabled 0
  732 15:41:03.753960  PCI: 00:1c.6: enabled 0
  733 15:41:03.757361  PCI: 00:1c.7: enabled 0
  734 15:41:03.757729  PCI: 00:1d.0: enabled 1
  735 15:41:03.760618  PCI: 00:1d.1: enabled 0
  736 15:41:03.763917  PCI: 00:1d.2: enabled 0
  737 15:41:03.767183  PCI: 00:1d.3: enabled 0
  738 15:41:03.767551  PCI: 00:1d.4: enabled 0
  739 15:41:03.770523  PCI: 00:1d.5: enabled 1
  740 15:41:03.773843  PCI: 00:1e.0: enabled 1
  741 15:41:03.774257  PCI: 00:1e.1: enabled 0
  742 15:41:03.777320  PCI: 00:1e.2: enabled 1
  743 15:41:03.780591  PCI: 00:1e.3: enabled 1
  744 15:41:03.783922  PCI: 00:1f.0: enabled 1
  745 15:41:03.784296  PCI: 00:1f.1: enabled 1
  746 15:41:03.787203  PCI: 00:1f.2: enabled 1
  747 15:41:03.790593  PCI: 00:1f.3: enabled 1
  748 15:41:03.793775  PCI: 00:1f.4: enabled 1
  749 15:41:03.794140  PCI: 00:1f.5: enabled 1
  750 15:41:03.797396  PCI: 00:1f.6: enabled 0
  751 15:41:03.800492  USB0 port 0: enabled 1
  752 15:41:03.800858  I2C: 00:15: enabled 1
  753 15:41:03.803748  I2C: 00:5d: enabled 1
  754 15:41:03.807078  GENERIC: 0.0: enabled 1
  755 15:41:03.810440  I2C: 00:1a: enabled 1
  756 15:41:03.810803  I2C: 00:38: enabled 1
  757 15:41:03.813770  I2C: 00:39: enabled 1
  758 15:41:03.817102  I2C: 00:3a: enabled 1
  759 15:41:03.817468  I2C: 00:3b: enabled 1
  760 15:41:03.820536  PCI: 00:00.0: enabled 1
  761 15:41:03.823709  SPI: 00: enabled 1
  762 15:41:03.824175  SPI: 01: enabled 1
  763 15:41:03.826971  PNP: 0c09.0: enabled 1
  764 15:41:03.830214  USB2 port 0: enabled 1
  765 15:41:03.830585  USB2 port 1: enabled 1
  766 15:41:03.833583  USB2 port 2: enabled 0
  767 15:41:03.836745  USB2 port 3: enabled 0
  768 15:41:03.837161  USB2 port 5: enabled 0
  769 15:41:03.840094  USB2 port 6: enabled 1
  770 15:41:03.843571  USB2 port 9: enabled 1
  771 15:41:03.846743  USB3 port 0: enabled 1
  772 15:41:03.847124  USB3 port 1: enabled 1
  773 15:41:03.850028  USB3 port 2: enabled 1
  774 15:41:03.853407  USB3 port 3: enabled 1
  775 15:41:03.853776  USB3 port 4: enabled 0
  776 15:41:03.856712  APIC: 02: enabled 1
  777 15:41:03.860034  APIC: 05: enabled 1
  778 15:41:03.860400  APIC: 01: enabled 1
  779 15:41:03.863472  APIC: 03: enabled 1
  780 15:41:03.863863  APIC: 04: enabled 1
  781 15:41:03.866829  APIC: 06: enabled 1
  782 15:41:03.870120  APIC: 07: enabled 1
  783 15:41:03.870484  Compare with tree...
  784 15:41:03.873443  Root Device: enabled 1
  785 15:41:03.876719   CPU_CLUSTER: 0: enabled 1
  786 15:41:03.880115    APIC: 00: enabled 1
  787 15:41:03.880482    APIC: 02: enabled 1
  788 15:41:03.883386    APIC: 05: enabled 1
  789 15:41:03.886784    APIC: 01: enabled 1
  790 15:41:03.887161    APIC: 03: enabled 1
  791 15:41:03.889952    APIC: 04: enabled 1
  792 15:41:03.893324    APIC: 06: enabled 1
  793 15:41:03.893691    APIC: 07: enabled 1
  794 15:41:03.896201   DOMAIN: 0000: enabled 1
  795 15:41:03.899523    PCI: 00:00.0: enabled 1
  796 15:41:03.902921    PCI: 00:02.0: enabled 1
  797 15:41:03.903312    PCI: 00:04.0: enabled 0
  798 15:41:03.906054    PCI: 00:05.0: enabled 0
  799 15:41:03.909584    PCI: 00:12.0: enabled 1
  800 15:41:03.912781    PCI: 00:12.5: enabled 0
  801 15:41:03.916349    PCI: 00:12.6: enabled 0
  802 15:41:03.916715    PCI: 00:14.0: enabled 1
  803 15:41:03.919550     USB0 port 0: enabled 1
  804 15:41:03.922942      USB2 port 0: enabled 1
  805 15:41:03.926077      USB2 port 1: enabled 1
  806 15:41:03.929575      USB2 port 2: enabled 0
  807 15:41:03.929940      USB2 port 3: enabled 0
  808 15:41:03.932722      USB2 port 5: enabled 0
  809 15:41:03.936097      USB2 port 6: enabled 1
  810 15:41:03.939491      USB2 port 9: enabled 1
  811 15:41:03.943004      USB3 port 0: enabled 1
  812 15:41:03.945962      USB3 port 1: enabled 1
  813 15:41:03.946342      USB3 port 2: enabled 1
  814 15:41:03.949283      USB3 port 3: enabled 1
  815 15:41:03.952525      USB3 port 4: enabled 0
  816 15:41:03.955862    PCI: 00:14.1: enabled 0
  817 15:41:03.959164    PCI: 00:14.3: enabled 1
  818 15:41:03.959580    PCI: 00:14.5: enabled 0
  819 15:41:03.962409    PCI: 00:15.0: enabled 1
  820 15:41:03.965966     I2C: 00:15: enabled 1
  821 15:41:03.969190    PCI: 00:15.1: enabled 1
  822 15:41:03.972519     I2C: 00:5d: enabled 1
  823 15:41:03.972913     GENERIC: 0.0: enabled 1
  824 15:41:03.975874    PCI: 00:15.2: enabled 0
  825 15:41:03.979360    PCI: 00:15.3: enabled 0
  826 15:41:03.982409    PCI: 00:16.0: enabled 1
  827 15:41:03.985963    PCI: 00:16.1: enabled 0
  828 15:41:03.986360    PCI: 00:16.2: enabled 0
  829 15:41:03.989200    PCI: 00:16.3: enabled 0
  830 15:41:03.992651    PCI: 00:16.4: enabled 0
  831 15:41:03.995895    PCI: 00:16.5: enabled 0
  832 15:41:03.998851    PCI: 00:17.0: enabled 1
  833 15:41:03.999221    PCI: 00:19.0: enabled 1
  834 15:41:04.002159     I2C: 00:1a: enabled 1
  835 15:41:04.005614     I2C: 00:38: enabled 1
  836 15:41:04.009173     I2C: 00:39: enabled 1
  837 15:41:04.009542     I2C: 00:3a: enabled 1
  838 15:41:04.012534     I2C: 00:3b: enabled 1
  839 15:41:04.015858    PCI: 00:19.1: enabled 0
  840 15:41:04.019124    PCI: 00:19.2: enabled 0
  841 15:41:04.022685    PCI: 00:1a.0: enabled 0
  842 15:41:04.023188    PCI: 00:1c.0: enabled 0
  843 15:41:04.025485    PCI: 00:1c.1: enabled 0
  844 15:41:04.028995    PCI: 00:1c.2: enabled 0
  845 15:41:04.032298    PCI: 00:1c.3: enabled 0
  846 15:41:04.032819    PCI: 00:1c.4: enabled 0
  847 15:41:04.035225    PCI: 00:1c.5: enabled 0
  848 15:41:04.039026    PCI: 00:1c.6: enabled 0
  849 15:41:04.042300    PCI: 00:1c.7: enabled 0
  850 15:41:04.045524    PCI: 00:1d.0: enabled 1
  851 15:41:04.045930    PCI: 00:1d.1: enabled 0
  852 15:41:04.048767    PCI: 00:1d.2: enabled 0
  853 15:41:04.052006    PCI: 00:1d.3: enabled 0
  854 15:41:04.055395    PCI: 00:1d.4: enabled 0
  855 15:41:04.058600    PCI: 00:1d.5: enabled 1
  856 15:41:04.059088     PCI: 00:00.0: enabled 1
  857 15:41:04.061901    PCI: 00:1e.0: enabled 1
  858 15:41:04.065378    PCI: 00:1e.1: enabled 0
  859 15:41:04.068623    PCI: 00:1e.2: enabled 1
  860 15:41:04.071855     SPI: 00: enabled 1
  861 15:41:04.072267    PCI: 00:1e.3: enabled 1
  862 15:41:04.075217     SPI: 01: enabled 1
  863 15:41:04.078573    PCI: 00:1f.0: enabled 1
  864 15:41:04.081641     PNP: 0c09.0: enabled 1
  865 15:41:04.082050    PCI: 00:1f.1: enabled 1
  866 15:41:04.084958    PCI: 00:1f.2: enabled 1
  867 15:41:04.088181    PCI: 00:1f.3: enabled 1
  868 15:41:04.091524    PCI: 00:1f.4: enabled 1
  869 15:41:04.094773    PCI: 00:1f.5: enabled 1
  870 15:41:04.095177    PCI: 00:1f.6: enabled 0
  871 15:41:04.098108  Root Device scanning...
  872 15:41:04.101339  scan_static_bus for Root Device
  873 15:41:04.104737  CPU_CLUSTER: 0 enabled
  874 15:41:04.105172  DOMAIN: 0000 enabled
  875 15:41:04.108270  DOMAIN: 0000 scanning...
  876 15:41:04.111589  PCI: pci_scan_bus for bus 00
  877 15:41:04.114994  PCI: 00:00.0 [8086/0000] ops
  878 15:41:04.118306  PCI: 00:00.0 [8086/9b61] enabled
  879 15:41:04.121530  PCI: 00:02.0 [8086/0000] bus ops
  880 15:41:04.124805  PCI: 00:02.0 [8086/9b41] enabled
  881 15:41:04.128224  PCI: 00:04.0 [8086/1903] disabled
  882 15:41:04.131418  PCI: 00:08.0 [8086/1911] enabled
  883 15:41:04.134675  PCI: 00:12.0 [8086/02f9] enabled
  884 15:41:04.137841  PCI: 00:14.0 [8086/0000] bus ops
  885 15:41:04.141422  PCI: 00:14.0 [8086/02ed] enabled
  886 15:41:04.144643  PCI: 00:14.2 [8086/02ef] enabled
  887 15:41:04.147882  PCI: 00:14.3 [8086/02f0] enabled
  888 15:41:04.151305  PCI: 00:15.0 [8086/0000] bus ops
  889 15:41:04.154510  PCI: 00:15.0 [8086/02e8] enabled
  890 15:41:04.157936  PCI: 00:15.1 [8086/0000] bus ops
  891 15:41:04.161158  PCI: 00:15.1 [8086/02e9] enabled
  892 15:41:04.164539  PCI: 00:16.0 [8086/0000] ops
  893 15:41:04.168065  PCI: 00:16.0 [8086/02e0] enabled
  894 15:41:04.171372  PCI: 00:17.0 [8086/0000] ops
  895 15:41:04.174714  PCI: 00:17.0 [8086/02d3] enabled
  896 15:41:04.177907  PCI: 00:19.0 [8086/0000] bus ops
  897 15:41:04.180791  PCI: 00:19.0 [8086/02c5] enabled
  898 15:41:04.184196  PCI: 00:1d.0 [8086/0000] bus ops
  899 15:41:04.187461  PCI: 00:1d.0 [8086/02b0] enabled
  900 15:41:04.194209  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 15:41:04.197458  PCI: 00:1e.0 [8086/0000] ops
  902 15:41:04.200918  PCI: 00:1e.0 [8086/02a8] enabled
  903 15:41:04.204433  PCI: 00:1e.2 [8086/0000] bus ops
  904 15:41:04.207498  PCI: 00:1e.2 [8086/02aa] enabled
  905 15:41:04.210859  PCI: 00:1e.3 [8086/0000] bus ops
  906 15:41:04.214135  PCI: 00:1e.3 [8086/02ab] enabled
  907 15:41:04.217631  PCI: 00:1f.0 [8086/0000] bus ops
  908 15:41:04.220810  PCI: 00:1f.0 [8086/0284] enabled
  909 15:41:04.224170  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 15:41:04.230771  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 15:41:04.234020  PCI: 00:1f.3 [8086/0000] bus ops
  912 15:41:04.237471  PCI: 00:1f.3 [8086/02c8] enabled
  913 15:41:04.240801  PCI: 00:1f.4 [8086/0000] bus ops
  914 15:41:04.244026  PCI: 00:1f.4 [8086/02a3] enabled
  915 15:41:04.247617  PCI: 00:1f.5 [8086/0000] bus ops
  916 15:41:04.250735  PCI: 00:1f.5 [8086/02a4] enabled
  917 15:41:04.254103  PCI: Leftover static devices:
  918 15:41:04.254547  PCI: 00:05.0
  919 15:41:04.257425  PCI: 00:12.5
  920 15:41:04.258004  PCI: 00:12.6
  921 15:41:04.260831  PCI: 00:14.1
  922 15:41:04.261309  PCI: 00:14.5
  923 15:41:04.261674  PCI: 00:15.2
  924 15:41:04.264000  PCI: 00:15.3
  925 15:41:04.264459  PCI: 00:16.1
  926 15:41:04.267557  PCI: 00:16.2
  927 15:41:04.268000  PCI: 00:16.3
  928 15:41:04.270793  PCI: 00:16.4
  929 15:41:04.271242  PCI: 00:16.5
  930 15:41:04.271591  PCI: 00:19.1
  931 15:41:04.274254  PCI: 00:19.2
  932 15:41:04.274709  PCI: 00:1a.0
  933 15:41:04.277012  PCI: 00:1c.0
  934 15:41:04.277485  PCI: 00:1c.1
  935 15:41:04.277829  PCI: 00:1c.2
  936 15:41:04.280416  PCI: 00:1c.3
  937 15:41:04.280877  PCI: 00:1c.4
  938 15:41:04.283701  PCI: 00:1c.5
  939 15:41:04.284133  PCI: 00:1c.6
  940 15:41:04.284473  PCI: 00:1c.7
  941 15:41:04.286972  PCI: 00:1d.1
  942 15:41:04.287403  PCI: 00:1d.2
  943 15:41:04.290423  PCI: 00:1d.3
  944 15:41:04.290853  PCI: 00:1d.4
  945 15:41:04.293614  PCI: 00:1d.5
  946 15:41:04.294046  PCI: 00:1e.1
  947 15:41:04.294382  PCI: 00:1f.1
  948 15:41:04.296972  PCI: 00:1f.2
  949 15:41:04.297436  PCI: 00:1f.6
  950 15:41:04.300406  PCI: Check your devicetree.cb.
  951 15:41:04.303612  PCI: 00:02.0 scanning...
  952 15:41:04.306987  scan_generic_bus for PCI: 00:02.0
  953 15:41:04.310300  scan_generic_bus for PCI: 00:02.0 done
  954 15:41:04.317130  scan_bus: scanning of bus PCI: 00:02.0 took 10177 usecs
  955 15:41:04.319967  PCI: 00:14.0 scanning...
  956 15:41:04.323394  scan_static_bus for PCI: 00:14.0
  957 15:41:04.323792  USB0 port 0 enabled
  958 15:41:04.326729  USB0 port 0 scanning...
  959 15:41:04.329885  scan_static_bus for USB0 port 0
  960 15:41:04.333370  USB2 port 0 enabled
  961 15:41:04.333768  USB2 port 1 enabled
  962 15:41:04.336721  USB2 port 2 disabled
  963 15:41:04.340206  USB2 port 3 disabled
  964 15:41:04.340623  USB2 port 5 disabled
  965 15:41:04.343305  USB2 port 6 enabled
  966 15:41:04.346567  USB2 port 9 enabled
  967 15:41:04.346962  USB3 port 0 enabled
  968 15:41:04.349837  USB3 port 1 enabled
  969 15:41:04.350237  USB3 port 2 enabled
  970 15:41:04.353491  USB3 port 3 enabled
  971 15:41:04.356546  USB3 port 4 disabled
  972 15:41:04.356943  USB2 port 0 scanning...
  973 15:41:04.359768  scan_static_bus for USB2 port 0
  974 15:41:04.366407  scan_static_bus for USB2 port 0 done
  975 15:41:04.369752  scan_bus: scanning of bus USB2 port 0 took 9705 usecs
  976 15:41:04.373126  USB2 port 1 scanning...
  977 15:41:04.376609  scan_static_bus for USB2 port 1
  978 15:41:04.379814  scan_static_bus for USB2 port 1 done
  979 15:41:04.386121  scan_bus: scanning of bus USB2 port 1 took 9704 usecs
  980 15:41:04.386216  USB2 port 6 scanning...
  981 15:41:04.389449  scan_static_bus for USB2 port 6
  982 15:41:04.395981  scan_static_bus for USB2 port 6 done
  983 15:41:04.399168  scan_bus: scanning of bus USB2 port 6 took 9698 usecs
  984 15:41:04.402960  USB2 port 9 scanning...
  985 15:41:04.405925  scan_static_bus for USB2 port 9
  986 15:41:04.409299  scan_static_bus for USB2 port 9 done
  987 15:41:04.415910  scan_bus: scanning of bus USB2 port 9 took 9706 usecs
  988 15:41:04.416004  USB3 port 0 scanning...
  989 15:41:04.419319  scan_static_bus for USB3 port 0
  990 15:41:04.426078  scan_static_bus for USB3 port 0 done
  991 15:41:04.429376  scan_bus: scanning of bus USB3 port 0 took 9699 usecs
  992 15:41:04.432743  USB3 port 1 scanning...
  993 15:41:04.436024  scan_static_bus for USB3 port 1
  994 15:41:04.439549  scan_static_bus for USB3 port 1 done
  995 15:41:04.446385  scan_bus: scanning of bus USB3 port 1 took 9707 usecs
  996 15:41:04.446582  USB3 port 2 scanning...
  997 15:41:04.450011  scan_static_bus for USB3 port 2
  998 15:41:04.456045  scan_static_bus for USB3 port 2 done
  999 15:41:04.459475  scan_bus: scanning of bus USB3 port 2 took 9697 usecs
 1000 15:41:04.462780  USB3 port 3 scanning...
 1001 15:41:04.466237  scan_static_bus for USB3 port 3
 1002 15:41:04.469462  scan_static_bus for USB3 port 3 done
 1003 15:41:04.476119  scan_bus: scanning of bus USB3 port 3 took 9697 usecs
 1004 15:41:04.479680  scan_static_bus for USB0 port 0 done
 1005 15:41:04.482910  scan_bus: scanning of bus USB0 port 0 took 155369 usecs
 1006 15:41:04.489538  scan_static_bus for PCI: 00:14.0 done
 1007 15:41:04.492334  scan_bus: scanning of bus PCI: 00:14.0 took 172981 usecs
 1008 15:41:04.496094  PCI: 00:15.0 scanning...
 1009 15:41:04.499539  scan_generic_bus for PCI: 00:15.0
 1010 15:41:04.502748  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 15:41:04.509013  scan_generic_bus for PCI: 00:15.0 done
 1012 15:41:04.512432  scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
 1013 15:41:04.515776  PCI: 00:15.1 scanning...
 1014 15:41:04.519301  scan_generic_bus for PCI: 00:15.1
 1015 15:41:04.522600  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 15:41:04.529424  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 15:41:04.532000  scan_generic_bus for PCI: 00:15.1 done
 1018 15:41:04.538832  scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
 1019 15:41:04.538935  PCI: 00:19.0 scanning...
 1020 15:41:04.542110  scan_generic_bus for PCI: 00:19.0
 1021 15:41:04.548669  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 15:41:04.551896  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 15:41:04.555350  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 15:41:04.558470  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 15:41:04.565274  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 15:41:04.568580  scan_generic_bus for PCI: 00:19.0 done
 1027 15:41:04.571908  scan_bus: scanning of bus PCI: 00:19.0 took 30737 usecs
 1028 15:41:04.575386  PCI: 00:1d.0 scanning...
 1029 15:41:04.578636  do_pci_scan_bridge for PCI: 00:1d.0
 1030 15:41:04.582083  PCI: pci_scan_bus for bus 01
 1031 15:41:04.585080  PCI: 01:00.0 [1c5c/1327] enabled
 1032 15:41:04.588365  Enabling Common Clock Configuration
 1033 15:41:04.595570  L1 Sub-State supported from root port 29
 1034 15:41:04.598947  L1 Sub-State Support = 0xf
 1035 15:41:04.599049  CommonModeRestoreTime = 0x28
 1036 15:41:04.605207  Power On Value = 0x16, Power On Scale = 0x0
 1037 15:41:04.605350  ASPM: Enabled L1
 1038 15:41:04.611914  scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
 1039 15:41:04.615208  PCI: 00:1e.2 scanning...
 1040 15:41:04.618796  scan_generic_bus for PCI: 00:1e.2
 1041 15:41:04.622004  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 15:41:04.625368  scan_generic_bus for PCI: 00:1e.2 done
 1043 15:41:04.632019  scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
 1044 15:41:04.635169  PCI: 00:1e.3 scanning...
 1045 15:41:04.638456  scan_generic_bus for PCI: 00:1e.3
 1046 15:41:04.641927  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 15:41:04.645059  scan_generic_bus for PCI: 00:1e.3 done
 1048 15:41:04.651816  scan_bus: scanning of bus PCI: 00:1e.3 took 13995 usecs
 1049 15:41:04.651924  PCI: 00:1f.0 scanning...
 1050 15:41:04.655076  scan_static_bus for PCI: 00:1f.0
 1051 15:41:04.658498  PNP: 0c09.0 enabled
 1052 15:41:04.661876  scan_static_bus for PCI: 00:1f.0 done
 1053 15:41:04.668607  scan_bus: scanning of bus PCI: 00:1f.0 took 12032 usecs
 1054 15:41:04.671812  PCI: 00:1f.3 scanning...
 1055 15:41:04.675178  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
 1056 15:41:04.678515  PCI: 00:1f.4 scanning...
 1057 15:41:04.681488  scan_generic_bus for PCI: 00:1f.4
 1058 15:41:04.684894  scan_generic_bus for PCI: 00:1f.4 done
 1059 15:41:04.691767  scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
 1060 15:41:04.695198  PCI: 00:1f.5 scanning...
 1061 15:41:04.698417  scan_generic_bus for PCI: 00:1f.5
 1062 15:41:04.701642  scan_generic_bus for PCI: 00:1f.5 done
 1063 15:41:04.708025  scan_bus: scanning of bus PCI: 00:1f.5 took 10179 usecs
 1064 15:41:04.714580  scan_bus: scanning of bus DOMAIN: 0000 took 604965 usecs
 1065 15:41:04.718006  scan_static_bus for Root Device done
 1066 15:41:04.721242  scan_bus: scanning of bus Root Device took 624844 usecs
 1067 15:41:04.724517  done
 1068 15:41:04.727976  Chrome EC: UHEPI supported
 1069 15:41:04.731673  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 15:41:04.738368  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 15:41:04.744450  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 15:41:04.751023  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 15:41:04.754749  SPI flash protection: WPSW=0 SRP0=0
 1074 15:41:04.761204  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 15:41:04.764635  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 15:41:04.768166  found VGA at PCI: 00:02.0
 1077 15:41:04.771394  Setting up VGA for PCI: 00:02.0
 1078 15:41:04.777728  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 15:41:04.780796  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 15:41:04.784131  Allocating resources...
 1081 15:41:04.787563  Reading resources...
 1082 15:41:04.790892  Root Device read_resources bus 0 link: 0
 1083 15:41:04.794229  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 15:41:04.800720  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 15:41:04.804130  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 15:41:04.811171  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 15:41:04.814369  USB0 port 0 read_resources bus 0 link: 0
 1088 15:41:04.822526  USB0 port 0 read_resources bus 0 link: 0 done
 1089 15:41:04.825914  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 15:41:04.833245  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 15:41:04.837254  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 15:41:04.843186  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 15:41:04.846526  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 15:41:04.854076  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 15:41:04.860842  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 15:41:04.863750  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 15:41:04.870457  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 15:41:04.873806  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 15:41:04.880526  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 15:41:04.883918  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 15:41:04.890368  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 15:41:04.893569  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 15:41:04.900294  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 15:41:04.907170  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 15:41:04.910489  Root Device read_resources bus 0 link: 0 done
 1106 15:41:04.913474  Done reading resources.
 1107 15:41:04.920320  Show resources in subtree (Root Device)...After reading.
 1108 15:41:04.923621   Root Device child on link 0 CPU_CLUSTER: 0
 1109 15:41:04.926894    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 15:41:04.930302     APIC: 00
 1111 15:41:04.930783     APIC: 02
 1112 15:41:04.931115     APIC: 05
 1113 15:41:04.933468     APIC: 01
 1114 15:41:04.933943     APIC: 03
 1115 15:41:04.934305     APIC: 04
 1116 15:41:04.936900     APIC: 06
 1117 15:41:04.937441     APIC: 07
 1118 15:41:04.943627    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 15:41:04.996706    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 15:41:04.997685    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 15:41:04.998076     PCI: 00:00.0
 1122 15:41:04.998451     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 15:41:04.998755     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 15:41:04.999078     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 15:41:05.046487     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 15:41:05.047541     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 15:41:05.048028     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 15:41:05.048388     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 15:41:05.048777     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 15:41:05.049556     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 15:41:05.096465     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 15:41:05.096980     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 15:41:05.097907     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 15:41:05.098337     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 15:41:05.098651     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 15:41:05.133354     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 15:41:05.134366     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 15:41:05.134788     PCI: 00:02.0
 1139 15:41:05.135190     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 15:41:05.135565     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 15:41:05.142828     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 15:41:05.146296     PCI: 00:04.0
 1143 15:41:05.146743     PCI: 00:08.0
 1144 15:41:05.156189     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 15:41:05.159340     PCI: 00:12.0
 1146 15:41:05.169387     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 15:41:05.172757     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 15:41:05.182180     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 15:41:05.185549      USB0 port 0 child on link 0 USB2 port 0
 1150 15:41:05.189349       USB2 port 0
 1151 15:41:05.189823       USB2 port 1
 1152 15:41:05.192135       USB2 port 2
 1153 15:41:05.192606       USB2 port 3
 1154 15:41:05.195567       USB2 port 5
 1155 15:41:05.199069       USB2 port 6
 1156 15:41:05.199562       USB2 port 9
 1157 15:41:05.202413       USB3 port 0
 1158 15:41:05.202873       USB3 port 1
 1159 15:41:05.205526       USB3 port 2
 1160 15:41:05.205956       USB3 port 3
 1161 15:41:05.208866       USB3 port 4
 1162 15:41:05.209334     PCI: 00:14.2
 1163 15:41:05.219135     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 15:41:05.229118     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 15:41:05.231937     PCI: 00:14.3
 1166 15:41:05.241687     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 15:41:05.245042     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 15:41:05.255098     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 15:41:05.255532      I2C: 01:15
 1170 15:41:05.261509     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 15:41:05.272011     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 15:41:05.272471      I2C: 02:5d
 1173 15:41:05.275228      GENERIC: 0.0
 1174 15:41:05.275824     PCI: 00:16.0
 1175 15:41:05.285190     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 15:41:05.288218     PCI: 00:17.0
 1177 15:41:05.297776     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 15:41:05.304262     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 15:41:05.314095     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 15:41:05.320842     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 15:41:05.330836     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 15:41:05.340670     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 15:41:05.343976     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 15:41:05.354028     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 15:41:05.354128      I2C: 03:1a
 1186 15:41:05.357390      I2C: 03:38
 1187 15:41:05.357485      I2C: 03:39
 1188 15:41:05.360680      I2C: 03:3a
 1189 15:41:05.360775      I2C: 03:3b
 1190 15:41:05.367261     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 15:41:05.373996     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 15:41:05.383996     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 15:41:05.393671     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 15:41:05.393768      PCI: 01:00.0
 1195 15:41:05.403709      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 15:41:05.406738     PCI: 00:1e.0
 1197 15:41:05.416767     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 15:41:05.427235     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 15:41:05.430034     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 15:41:05.439932     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 15:41:05.443197      SPI: 00
 1202 15:41:05.446598     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 15:41:05.456626     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 15:41:05.456723      SPI: 01
 1205 15:41:05.463220     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 15:41:05.469846     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 15:41:05.479777     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 15:41:05.483092      PNP: 0c09.0
 1209 15:41:05.489897      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 15:41:05.492951     PCI: 00:1f.3
 1211 15:41:05.502648     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 15:41:05.512945     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 15:41:05.513040     PCI: 00:1f.4
 1214 15:41:05.522842     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 15:41:05.532465     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 15:41:05.532555     PCI: 00:1f.5
 1217 15:41:05.542354     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 15:41:05.548923  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 15:41:05.555771  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 15:41:05.562649  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 15:41:05.565842  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 15:41:05.569176  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 15:41:05.572568  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 15:41:05.575722  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 15:41:05.585719  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 15:41:05.592374  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 15:41:05.599187  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 15:41:05.605991  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 15:41:05.615530  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 15:41:05.618856  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 15:41:05.625241  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 15:41:05.628613  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 15:41:05.635288  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 15:41:05.638856  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 15:41:05.645495  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 15:41:05.648723  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 15:41:05.655520  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 15:41:05.658860  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 15:41:05.665271  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 15:41:05.668449  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 15:41:05.675245  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 15:41:05.678282  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 15:41:05.685054  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 15:41:05.688329  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 15:41:05.694876  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 15:41:05.698255  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 15:41:05.704774  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 15:41:05.708142  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 15:41:05.711792  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 15:41:05.718288  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 15:41:05.721680  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 15:41:05.728200  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 15:41:05.731609  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 15:41:05.738360  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 15:41:05.744575  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 15:41:05.747611  avoid_fixed_resources: DOMAIN: 0000
 1257 15:41:05.754747  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 15:41:05.760937  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 15:41:05.767665  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 15:41:05.777810  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 15:41:05.784444  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 15:41:05.791327  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 15:41:05.800986  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 15:41:05.807643  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 15:41:05.813852  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 15:41:05.824236  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 15:41:05.830695  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 15:41:05.837218  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 15:41:05.840614  Setting resources...
 1270 15:41:05.847299  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 15:41:05.850742  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 15:41:05.853524  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 15:41:05.856672  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 15:41:05.860114  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 15:41:05.866934  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 15:41:05.873535  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 15:41:05.879784  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 15:41:05.886809  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 15:41:05.892973  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 15:41:05.896355  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 15:41:05.902969  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 15:41:05.906207  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 15:41:05.912456  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 15:41:05.915851  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 15:41:05.922602  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 15:41:05.925894  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 15:41:05.932326  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 15:41:05.935702  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 15:41:05.942327  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 15:41:05.945879  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 15:41:05.952467  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 15:41:05.955779  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 15:41:05.962554  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 15:41:05.965826  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 15:41:05.969040  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 15:41:05.975347  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 15:41:05.979206  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 15:41:05.985532  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 15:41:05.988902  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 15:41:05.995570  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 15:41:05.998431  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 15:41:06.008832  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 15:41:06.015057  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 15:41:06.021748  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 15:41:06.028342  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 15:41:06.034958  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 15:41:06.041792  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 15:41:06.045046  Root Device assign_resources, bus 0 link: 0
 1309 15:41:06.051726  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 15:41:06.058227  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 15:41:06.068059  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 15:41:06.074734  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 15:41:06.084548  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 15:41:06.091103  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 15:41:06.100968  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 15:41:06.104133  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 15:41:06.110954  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 15:41:06.117546  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 15:41:06.124243  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 15:41:06.134399  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 15:41:06.140976  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 15:41:06.147540  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 15:41:06.150850  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 15:41:06.160527  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 15:41:06.164144  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 15:41:06.170265  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 15:41:06.177217  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 15:41:06.187188  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 15:41:06.193814  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 15:41:06.200145  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 15:41:06.210140  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 15:41:06.216617  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 15:41:06.223117  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 15:41:06.233235  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 15:41:06.236621  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 15:41:06.243092  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 15:41:06.249854  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 15:41:06.259765  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 15:41:06.266470  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 15:41:06.272731  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 15:41:06.279336  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 15:41:06.285985  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 15:41:06.292404  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 15:41:06.302239  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 15:41:06.305769  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 15:41:06.312471  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 15:41:06.319005  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 15:41:06.321932  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 15:41:06.328937  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 15:41:06.332321  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 15:41:06.339001  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 15:41:06.342141  LPC: Trying to open IO window from 800 size 1ff
 1353 15:41:06.351954  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 15:41:06.358545  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 15:41:06.368428  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 15:41:06.375297  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 15:41:06.381950  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 15:41:06.385300  Root Device assign_resources, bus 0 link: 0
 1359 15:41:06.388612  Done setting resources.
 1360 15:41:06.395172  Show resources in subtree (Root Device)...After assigning values.
 1361 15:41:06.398559   Root Device child on link 0 CPU_CLUSTER: 0
 1362 15:41:06.401938    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 15:41:06.404960     APIC: 00
 1364 15:41:06.405050     APIC: 02
 1365 15:41:06.405140     APIC: 05
 1366 15:41:06.408256     APIC: 01
 1367 15:41:06.408341     APIC: 03
 1368 15:41:06.411673     APIC: 04
 1369 15:41:06.411758     APIC: 06
 1370 15:41:06.411829     APIC: 07
 1371 15:41:06.418487    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 15:41:06.427906    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 15:41:06.437959    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 15:41:06.438070     PCI: 00:00.0
 1375 15:41:06.448070     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 15:41:06.457864     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 15:41:06.467786     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 15:41:06.477788     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 15:41:06.487356     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 15:41:06.497522     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 15:41:06.504218     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 15:41:06.513763     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 15:41:06.523984     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 15:41:06.533547     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 15:41:06.543437     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 15:41:06.553477     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 15:41:06.559934     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 15:41:06.569956     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 15:41:06.579829     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 15:41:06.589694     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 15:41:06.589814     PCI: 00:02.0
 1392 15:41:06.602927     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 15:41:06.612974     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 15:41:06.622764     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 15:41:06.622890     PCI: 00:04.0
 1396 15:41:06.626208     PCI: 00:08.0
 1397 15:41:06.636042     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 15:41:06.636153     PCI: 00:12.0
 1399 15:41:06.645787     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 15:41:06.652299     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 15:41:06.662451     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 15:41:06.665802      USB0 port 0 child on link 0 USB2 port 0
 1403 15:41:06.669242       USB2 port 0
 1404 15:41:06.669340       USB2 port 1
 1405 15:41:06.672479       USB2 port 2
 1406 15:41:06.672572       USB2 port 3
 1407 15:41:06.675753       USB2 port 5
 1408 15:41:06.675847       USB2 port 6
 1409 15:41:06.678960       USB2 port 9
 1410 15:41:06.679056       USB3 port 0
 1411 15:41:06.682345       USB3 port 1
 1412 15:41:06.685771       USB3 port 2
 1413 15:41:06.685866       USB3 port 3
 1414 15:41:06.688924       USB3 port 4
 1415 15:41:06.689019     PCI: 00:14.2
 1416 15:41:06.698870     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 15:41:06.708858     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 15:41:06.712136     PCI: 00:14.3
 1419 15:41:06.722244     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 15:41:06.725384     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 15:41:06.734989     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 15:41:06.738151      I2C: 01:15
 1423 15:41:06.741570     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 15:41:06.751537     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 15:41:06.755058      I2C: 02:5d
 1426 15:41:06.755159      GENERIC: 0.0
 1427 15:41:06.758197     PCI: 00:16.0
 1428 15:41:06.768142     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 15:41:06.768272     PCI: 00:17.0
 1430 15:41:06.778061     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 15:41:06.791430     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 15:41:06.797839     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 15:41:06.807704     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 15:41:06.817829     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 15:41:06.827517     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 15:41:06.830816     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 15:41:06.840932     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 15:41:06.844134      I2C: 03:1a
 1439 15:41:06.844240      I2C: 03:38
 1440 15:41:06.847586      I2C: 03:39
 1441 15:41:06.847682      I2C: 03:3a
 1442 15:41:06.850902      I2C: 03:3b
 1443 15:41:06.854174     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 15:41:06.864228     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 15:41:06.873810     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 15:41:06.883593     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 15:41:06.886785      PCI: 01:00.0
 1448 15:41:06.897207      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 15:41:06.897347     PCI: 00:1e.0
 1450 15:41:06.909966     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 15:41:06.920259     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 15:41:06.923644     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 15:41:06.933278     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 15:41:06.933400      SPI: 00
 1455 15:41:06.939858     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 15:41:06.949712     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 15:41:06.949852      SPI: 01
 1458 15:41:06.953019     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 15:41:06.963117     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 15:41:06.972931     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 15:41:06.973059      PNP: 0c09.0
 1462 15:41:06.983158      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 15:41:06.983283     PCI: 00:1f.3
 1464 15:41:06.992753     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 15:41:07.006155     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 15:41:07.006284     PCI: 00:1f.4
 1467 15:41:07.016018     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 15:41:07.025784     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 15:41:07.025899     PCI: 00:1f.5
 1470 15:41:07.039071     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 15:41:07.039192  Done allocating resources.
 1472 15:41:07.045636  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 15:41:07.048899  Enabling resources...
 1474 15:41:07.052173  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 15:41:07.055485  PCI: 00:00.0 cmd <- 06
 1476 15:41:07.058898  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 15:41:07.062251  PCI: 00:02.0 cmd <- 03
 1478 15:41:07.065851  PCI: 00:08.0 cmd <- 06
 1479 15:41:07.068619  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 15:41:07.071946  PCI: 00:12.0 cmd <- 02
 1481 15:41:07.075170  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 15:41:07.078703  PCI: 00:14.0 cmd <- 02
 1483 15:41:07.078793  PCI: 00:14.2 cmd <- 02
 1484 15:41:07.085346  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 15:41:07.085450  PCI: 00:14.3 cmd <- 02
 1486 15:41:07.088609  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 15:41:07.091764  PCI: 00:15.0 cmd <- 02
 1488 15:41:07.095256  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 15:41:07.098044  PCI: 00:15.1 cmd <- 02
 1490 15:41:07.101980  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 15:41:07.104804  PCI: 00:16.0 cmd <- 02
 1492 15:41:07.108012  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 15:41:07.111486  PCI: 00:17.0 cmd <- 03
 1494 15:41:07.115147  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 15:41:07.118292  PCI: 00:19.0 cmd <- 02
 1496 15:41:07.121352  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 15:41:07.124970  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 15:41:07.127879  PCI: 00:1d.0 cmd <- 06
 1499 15:41:07.131262  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 15:41:07.134637  PCI: 00:1e.0 cmd <- 06
 1501 15:41:07.138021  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 15:41:07.138118  PCI: 00:1e.2 cmd <- 06
 1503 15:41:07.144496  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 15:41:07.144595  PCI: 00:1e.3 cmd <- 02
 1505 15:41:07.147780  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 15:41:07.151239  PCI: 00:1f.0 cmd <- 407
 1507 15:41:07.154604  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 15:41:07.157891  PCI: 00:1f.3 cmd <- 02
 1509 15:41:07.160801  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 15:41:07.164178  PCI: 00:1f.4 cmd <- 03
 1511 15:41:07.167642  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 15:41:07.170888  PCI: 00:1f.5 cmd <- 406
 1513 15:41:07.179784  PCI: 01:00.0 cmd <- 02
 1514 15:41:07.184702  done.
 1515 15:41:07.198650  ME: Version: 14.0.39.1367
 1516 15:41:07.205173  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
 1517 15:41:07.208247  Initializing devices...
 1518 15:41:07.208343  Root Device init ...
 1519 15:41:07.214840  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 15:41:07.218201  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 15:41:07.224838  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 15:41:07.231541  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 15:41:07.238226  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 15:41:07.241596  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 15:41:07.244948  Root Device init finished in 35227 usecs
 1526 15:41:07.248267  CPU_CLUSTER: 0 init ...
 1527 15:41:07.255110  CPU_CLUSTER: 0 init finished in 2448 usecs
 1528 15:41:07.258971  PCI: 00:00.0 init ...
 1529 15:41:07.262812  CPU TDP: 15 Watts
 1530 15:41:07.266048  CPU PL2 = 64 Watts
 1531 15:41:07.269437  PCI: 00:00.0 init finished in 7079 usecs
 1532 15:41:07.272241  PCI: 00:02.0 init ...
 1533 15:41:07.275500  PCI: 00:02.0 init finished in 2253 usecs
 1534 15:41:07.279355  PCI: 00:08.0 init ...
 1535 15:41:07.282681  PCI: 00:08.0 init finished in 2251 usecs
 1536 15:41:07.285435  PCI: 00:12.0 init ...
 1537 15:41:07.288742  PCI: 00:12.0 init finished in 2252 usecs
 1538 15:41:07.292096  PCI: 00:14.0 init ...
 1539 15:41:07.295404  PCI: 00:14.0 init finished in 2251 usecs
 1540 15:41:07.298854  PCI: 00:14.2 init ...
 1541 15:41:07.302069  PCI: 00:14.2 init finished in 2250 usecs
 1542 15:41:07.305500  PCI: 00:14.3 init ...
 1543 15:41:07.308642  PCI: 00:14.3 init finished in 2270 usecs
 1544 15:41:07.311889  PCI: 00:15.0 init ...
 1545 15:41:07.315375  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 15:41:07.318548  PCI: 00:15.0 init finished in 5976 usecs
 1547 15:41:07.321952  PCI: 00:15.1 init ...
 1548 15:41:07.325295  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 15:41:07.332096  PCI: 00:15.1 init finished in 5974 usecs
 1550 15:41:07.332200  PCI: 00:16.0 init ...
 1551 15:41:07.337997  PCI: 00:16.0 init finished in 2251 usecs
 1552 15:41:07.341365  PCI: 00:19.0 init ...
 1553 15:41:07.344609  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 15:41:07.348525  PCI: 00:19.0 init finished in 5974 usecs
 1555 15:41:07.351729  PCI: 00:1d.0 init ...
 1556 15:41:07.354992  Initializing PCH PCIe bridge.
 1557 15:41:07.358314  PCI: 00:1d.0 init finished in 5282 usecs
 1558 15:41:07.361175  PCI: 00:1f.0 init ...
 1559 15:41:07.364490  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 15:41:07.371141  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 15:41:07.371259  IOAPIC: ID = 0x02
 1562 15:41:07.374583  IOAPIC: Dumping registers
 1563 15:41:07.377896    reg 0x0000: 0x02000000
 1564 15:41:07.381166    reg 0x0001: 0x00770020
 1565 15:41:07.381264    reg 0x0002: 0x00000000
 1566 15:41:07.388052  PCI: 00:1f.0 init finished in 23531 usecs
 1567 15:41:07.391361  PCI: 00:1f.4 init ...
 1568 15:41:07.394084  PCI: 00:1f.4 init finished in 2261 usecs
 1569 15:41:07.405188  PCI: 01:00.0 init ...
 1570 15:41:07.408574  PCI: 01:00.0 init finished in 2242 usecs
 1571 15:41:07.413020  PNP: 0c09.0 init ...
 1572 15:41:07.416312  Google Chrome EC uptime: 11.071 seconds
 1573 15:41:07.423093  Google Chrome AP resets since EC boot: 0
 1574 15:41:07.426435  Google Chrome most recent AP reset causes:
 1575 15:41:07.432425  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 15:41:07.435642  PNP: 0c09.0 init finished in 20579 usecs
 1577 15:41:07.439029  Devices initialized
 1578 15:41:07.442234  Show all devs... After init.
 1579 15:41:07.442334  Root Device: enabled 1
 1580 15:41:07.445772  CPU_CLUSTER: 0: enabled 1
 1581 15:41:07.449178  DOMAIN: 0000: enabled 1
 1582 15:41:07.449275  APIC: 00: enabled 1
 1583 15:41:07.452329  PCI: 00:00.0: enabled 1
 1584 15:41:07.455643  PCI: 00:02.0: enabled 1
 1585 15:41:07.459035  PCI: 00:04.0: enabled 0
 1586 15:41:07.459134  PCI: 00:05.0: enabled 0
 1587 15:41:07.462221  PCI: 00:12.0: enabled 1
 1588 15:41:07.465372  PCI: 00:12.5: enabled 0
 1589 15:41:07.468766  PCI: 00:12.6: enabled 0
 1590 15:41:07.468865  PCI: 00:14.0: enabled 1
 1591 15:41:07.472171  PCI: 00:14.1: enabled 0
 1592 15:41:07.475627  PCI: 00:14.3: enabled 1
 1593 15:41:07.478461  PCI: 00:14.5: enabled 0
 1594 15:41:07.478561  PCI: 00:15.0: enabled 1
 1595 15:41:07.482205  PCI: 00:15.1: enabled 1
 1596 15:41:07.485096  PCI: 00:15.2: enabled 0
 1597 15:41:07.485231  PCI: 00:15.3: enabled 0
 1598 15:41:07.488354  PCI: 00:16.0: enabled 1
 1599 15:41:07.491784  PCI: 00:16.1: enabled 0
 1600 15:41:07.495145  PCI: 00:16.2: enabled 0
 1601 15:41:07.495275  PCI: 00:16.3: enabled 0
 1602 15:41:07.498902  PCI: 00:16.4: enabled 0
 1603 15:41:07.501614  PCI: 00:16.5: enabled 0
 1604 15:41:07.504937  PCI: 00:17.0: enabled 1
 1605 15:41:07.505071  PCI: 00:19.0: enabled 1
 1606 15:41:07.508288  PCI: 00:19.1: enabled 0
 1607 15:41:07.511662  PCI: 00:19.2: enabled 0
 1608 15:41:07.515039  PCI: 00:1a.0: enabled 0
 1609 15:41:07.515170  PCI: 00:1c.0: enabled 0
 1610 15:41:07.518129  PCI: 00:1c.1: enabled 0
 1611 15:41:07.521514  PCI: 00:1c.2: enabled 0
 1612 15:41:07.521643  PCI: 00:1c.3: enabled 0
 1613 15:41:07.524774  PCI: 00:1c.4: enabled 0
 1614 15:41:07.528200  PCI: 00:1c.5: enabled 0
 1615 15:41:07.531430  PCI: 00:1c.6: enabled 0
 1616 15:41:07.531561  PCI: 00:1c.7: enabled 0
 1617 15:41:07.534910  PCI: 00:1d.0: enabled 1
 1618 15:41:07.538257  PCI: 00:1d.1: enabled 0
 1619 15:41:07.541294  PCI: 00:1d.2: enabled 0
 1620 15:41:07.541428  PCI: 00:1d.3: enabled 0
 1621 15:41:07.544832  PCI: 00:1d.4: enabled 0
 1622 15:41:07.547771  PCI: 00:1d.5: enabled 0
 1623 15:41:07.551590  PCI: 00:1e.0: enabled 1
 1624 15:41:07.551721  PCI: 00:1e.1: enabled 0
 1625 15:41:07.554318  PCI: 00:1e.2: enabled 1
 1626 15:41:07.557856  PCI: 00:1e.3: enabled 1
 1627 15:41:07.561136  PCI: 00:1f.0: enabled 1
 1628 15:41:07.561265  PCI: 00:1f.1: enabled 0
 1629 15:41:07.564260  PCI: 00:1f.2: enabled 0
 1630 15:41:07.567655  PCI: 00:1f.3: enabled 1
 1631 15:41:07.567786  PCI: 00:1f.4: enabled 1
 1632 15:41:07.570939  PCI: 00:1f.5: enabled 1
 1633 15:41:07.574689  PCI: 00:1f.6: enabled 0
 1634 15:41:07.577994  USB0 port 0: enabled 1
 1635 15:41:07.578124  I2C: 01:15: enabled 1
 1636 15:41:07.581245  I2C: 02:5d: enabled 1
 1637 15:41:07.584744  GENERIC: 0.0: enabled 1
 1638 15:41:07.584874  I2C: 03:1a: enabled 1
 1639 15:41:07.587949  I2C: 03:38: enabled 1
 1640 15:41:07.590790  I2C: 03:39: enabled 1
 1641 15:41:07.590919  I2C: 03:3a: enabled 1
 1642 15:41:07.594103  I2C: 03:3b: enabled 1
 1643 15:41:07.597605  PCI: 00:00.0: enabled 1
 1644 15:41:07.597734  SPI: 00: enabled 1
 1645 15:41:07.600779  SPI: 01: enabled 1
 1646 15:41:07.604174  PNP: 0c09.0: enabled 1
 1647 15:41:07.604301  USB2 port 0: enabled 1
 1648 15:41:07.607520  USB2 port 1: enabled 1
 1649 15:41:07.610775  USB2 port 2: enabled 0
 1650 15:41:07.614023  USB2 port 3: enabled 0
 1651 15:41:07.614152  USB2 port 5: enabled 0
 1652 15:41:07.617304  USB2 port 6: enabled 1
 1653 15:41:07.620490  USB2 port 9: enabled 1
 1654 15:41:07.620618  USB3 port 0: enabled 1
 1655 15:41:07.623869  USB3 port 1: enabled 1
 1656 15:41:07.627277  USB3 port 2: enabled 1
 1657 15:41:07.630495  USB3 port 3: enabled 1
 1658 15:41:07.630625  USB3 port 4: enabled 0
 1659 15:41:07.633874  APIC: 02: enabled 1
 1660 15:41:07.634003  APIC: 05: enabled 1
 1661 15:41:07.637091  APIC: 01: enabled 1
 1662 15:41:07.640594  APIC: 03: enabled 1
 1663 15:41:07.640723  APIC: 04: enabled 1
 1664 15:41:07.643867  APIC: 06: enabled 1
 1665 15:41:07.647365  APIC: 07: enabled 1
 1666 15:41:07.647493  PCI: 00:08.0: enabled 1
 1667 15:41:07.650538  PCI: 00:14.2: enabled 1
 1668 15:41:07.653882  PCI: 01:00.0: enabled 1
 1669 15:41:07.657017  Disabling ACPI via APMC:
 1670 15:41:07.660272  done.
 1671 15:41:07.663681  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 15:41:07.667017  ELOG: NV offset 0xaf0000 size 0x4000
 1673 15:41:07.674333  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 15:41:07.680955  ELOG: Event(17) added with size 13 at 2022-09-30 15:41:05 UTC
 1675 15:41:07.687702  ELOG: Event(92) added with size 9 at 2022-09-30 15:41:05 UTC
 1676 15:41:07.694176  ELOG: Event(93) added with size 9 at 2022-09-30 15:41:05 UTC
 1677 15:41:07.700687  ELOG: Event(9A) added with size 9 at 2022-09-30 15:41:05 UTC
 1678 15:41:07.707797  ELOG: Event(9E) added with size 10 at 2022-09-30 15:41:05 UTC
 1679 15:41:07.714006  ELOG: Event(9F) added with size 14 at 2022-09-30 15:41:05 UTC
 1680 15:41:07.717229  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
 1681 15:41:07.724566  ELOG: Event(A1) added with size 10 at 2022-09-30 15:41:05 UTC
 1682 15:41:07.734457  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 15:41:07.741198  ELOG: Event(A0) added with size 9 at 2022-09-30 15:41:05 UTC
 1684 15:41:07.744358  elog_add_boot_reason: Logged dev mode boot
 1685 15:41:07.747678  Finalize devices...
 1686 15:41:07.747809  PCI: 00:17.0 final
 1687 15:41:07.751265  Devices finalized
 1688 15:41:07.754447  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 15:41:07.760524  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 15:41:07.764277  ME: HFSTS1                  : 0x90000245
 1691 15:41:07.767289  ME: HFSTS2                  : 0x3B850126
 1692 15:41:07.773880  ME: HFSTS3                  : 0x00000020
 1693 15:41:07.777143  ME: HFSTS4                  : 0x00004800
 1694 15:41:07.780663  ME: HFSTS5                  : 0x00000000
 1695 15:41:07.784050  ME: HFSTS6                  : 0x40400006
 1696 15:41:07.787346  ME: Manufacturing Mode      : NO
 1697 15:41:07.790700  ME: FW Partition Table      : OK
 1698 15:41:07.794077  ME: Bringup Loader Failure  : NO
 1699 15:41:07.797486  ME: Firmware Init Complete  : YES
 1700 15:41:07.800453  ME: Boot Options Present    : NO
 1701 15:41:07.803840  ME: Update In Progress      : NO
 1702 15:41:07.807239  ME: D0i3 Support            : YES
 1703 15:41:07.810675  ME: Low Power State Enabled : NO
 1704 15:41:07.813853  ME: CPU Replaced            : NO
 1705 15:41:07.817112  ME: CPU Replacement Valid   : YES
 1706 15:41:07.820255  ME: Current Working State   : 5
 1707 15:41:07.823562  ME: Current Operation State : 1
 1708 15:41:07.827091  ME: Current Operation Mode  : 0
 1709 15:41:07.830607  ME: Error Code              : 0
 1710 15:41:07.833718  ME: CPU Debug Disabled      : YES
 1711 15:41:07.836978  ME: TXT Support             : NO
 1712 15:41:07.843517  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 15:41:07.850267  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 15:41:07.850376  CBFS @ c08000 size 3f8000
 1715 15:41:07.856723  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 15:41:07.860268  CBFS: Locating 'fallback/dsdt.aml'
 1717 15:41:07.863073  CBFS: Found @ offset 10bb80 size 3fa5
 1718 15:41:07.869698  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 15:41:07.873013  CBFS @ c08000 size 3f8000
 1720 15:41:07.876445  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 15:41:07.879736  CBFS: Locating 'fallback/slic'
 1722 15:41:07.888088  CBFS: 'fallback/slic' not found.
 1723 15:41:07.891394  ACPI: Writing ACPI tables at 99b3e000.
 1724 15:41:07.891498  ACPI:    * FACS
 1725 15:41:07.894957  ACPI:    * DSDT
 1726 15:41:07.898258  Ramoops buffer: 0x100000@0x99a3d000.
 1727 15:41:07.901493  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 15:41:07.908205  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 15:41:07.911212  Google Chrome EC: version:
 1730 15:41:07.914357  	ro: helios_v2.0.2659-56403530b
 1731 15:41:07.917670  	rw: helios_v2.0.2849-c41de27e7d
 1732 15:41:07.917767    running image: 1
 1733 15:41:07.922365  ACPI:    * FADT
 1734 15:41:07.922468  SCI is IRQ9
 1735 15:41:07.929079  ACPI: added table 1/32, length now 40
 1736 15:41:07.929185  ACPI:     * SSDT
 1737 15:41:07.932275  Found 1 CPU(s) with 8 core(s) each.
 1738 15:41:07.935539  Error: Could not locate 'wifi_sar' in VPD.
 1739 15:41:07.942251  Checking CBFS for default SAR values
 1740 15:41:07.945613  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 15:41:07.948513  CBFS @ c08000 size 3f8000
 1742 15:41:07.955094  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 15:41:07.958387  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 15:41:07.961877  CBFS: Found @ offset 5fac0 size 77
 1745 15:41:07.965082  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 15:41:07.971816  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 15:41:07.975157  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 15:41:07.981740  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 15:41:07.985313  failed to find key in VPD: dsm_calib_r0_0
 1750 15:41:07.995213  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 15:41:07.998581  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 15:41:08.005295  failed to find key in VPD: dsm_calib_r0_1
 1753 15:41:08.011376  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 15:41:08.018226  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 15:41:08.021321  failed to find key in VPD: dsm_calib_r0_2
 1756 15:41:08.031199  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 15:41:08.034769  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 15:41:08.041051  failed to find key in VPD: dsm_calib_r0_3
 1759 15:41:08.047473  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 15:41:08.054124  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 15:41:08.057427  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 15:41:08.064283  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 15:41:08.067941  EC returned error result code 1
 1764 15:41:08.071447  EC returned error result code 1
 1765 15:41:08.075066  EC returned error result code 1
 1766 15:41:08.077915  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 15:41:08.084353  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 15:41:08.091121  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 15:41:08.094481  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 15:41:08.100974  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 15:41:08.104500  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 15:41:08.111091  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 15:41:08.117353  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 15:41:08.124038  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 15:41:08.127766  ACPI: added table 2/32, length now 44
 1776 15:41:08.127868  ACPI:    * MCFG
 1777 15:41:08.134034  ACPI: added table 3/32, length now 48
 1778 15:41:08.134129  ACPI:    * TPM2
 1779 15:41:08.137553  TPM2 log created at 99a2d000
 1780 15:41:08.140949  ACPI: added table 4/32, length now 52
 1781 15:41:08.144293  ACPI:    * MADT
 1782 15:41:08.144390  SCI is IRQ9
 1783 15:41:08.147200  ACPI: added table 5/32, length now 56
 1784 15:41:08.150483  current = 99b43ac0
 1785 15:41:08.150580  ACPI:    * DMAR
 1786 15:41:08.153848  ACPI: added table 6/32, length now 60
 1787 15:41:08.157039  ACPI:    * IGD OpRegion
 1788 15:41:08.160586  GMA: Found VBT in CBFS
 1789 15:41:08.163852  GMA: Found valid VBT in CBFS
 1790 15:41:08.167220  ACPI: added table 7/32, length now 64
 1791 15:41:08.167350  ACPI:    * HPET
 1792 15:41:08.170464  ACPI: added table 8/32, length now 68
 1793 15:41:08.174054  ACPI: done.
 1794 15:41:08.177313  ACPI tables: 31744 bytes.
 1795 15:41:08.180581  smbios_write_tables: 99a2c000
 1796 15:41:08.183937  EC returned error result code 3
 1797 15:41:08.187309  Couldn't obtain OEM name from CBI
 1798 15:41:08.190174  Create SMBIOS type 17
 1799 15:41:08.193555  PCI: 00:00.0 (Intel Cannonlake)
 1800 15:41:08.193660  PCI: 00:14.3 (Intel WiFi)
 1801 15:41:08.196638  SMBIOS tables: 939 bytes.
 1802 15:41:08.200448  Writing table forward entry at 0x00000500
 1803 15:41:08.206602  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 15:41:08.209965  Writing coreboot table at 0x99b62000
 1805 15:41:08.216502   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 15:41:08.219971   1. 0000000000001000-000000000009ffff: RAM
 1807 15:41:08.226818   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 15:41:08.230079   3. 0000000000100000-0000000099a2bfff: RAM
 1809 15:41:08.236720   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 15:41:08.239845   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 15:41:08.246515   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 15:41:08.252855   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 15:41:08.256044   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 15:41:08.262985   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 15:41:08.266181  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 15:41:08.269529  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 15:41:08.276403  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 15:41:08.279658  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 15:41:08.286149  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 15:41:08.289394  15. 0000000100000000-000000045e7fffff: RAM
 1821 15:41:08.292540  Graphics framebuffer located at 0xc0000000
 1822 15:41:08.295934  Passing 5 GPIOs to payload:
 1823 15:41:08.302533              NAME |       PORT | POLARITY |     VALUE
 1824 15:41:08.305940     write protect |  undefined |     high |       low
 1825 15:41:08.312614               lid |  undefined |     high |      high
 1826 15:41:08.319083             power |  undefined |     high |       low
 1827 15:41:08.322554             oprom |  undefined |     high |       low
 1828 15:41:08.328971          EC in RW | 0x000000cb |     high |       low
 1829 15:41:08.329087  Board ID: 4
 1830 15:41:08.336023  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 15:41:08.336125  CBFS @ c08000 size 3f8000
 1832 15:41:08.342443  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 15:41:08.348994  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
 1834 15:41:08.352183  coreboot table: 1492 bytes.
 1835 15:41:08.355702  IMD ROOT    0. 99fff000 00001000
 1836 15:41:08.358863  IMD SMALL   1. 99ffe000 00001000
 1837 15:41:08.362276  FSP MEMORY  2. 99c4e000 003b0000
 1838 15:41:08.365579  CONSOLE     3. 99c2e000 00020000
 1839 15:41:08.368893  FMAP        4. 99c2d000 0000054e
 1840 15:41:08.372249  TIME STAMP  5. 99c2c000 00000910
 1841 15:41:08.375620  VBOOT WORK  6. 99c18000 00014000
 1842 15:41:08.378922  MRC DATA    7. 99c16000 00001958
 1843 15:41:08.382383  ROMSTG STCK 8. 99c15000 00001000
 1844 15:41:08.385536  AFTER CAR   9. 99c0b000 0000a000
 1845 15:41:08.388897  RAMSTAGE   10. 99baf000 0005c000
 1846 15:41:08.391761  REFCODE    11. 99b7a000 00035000
 1847 15:41:08.395123  SMM BACKUP 12. 99b6a000 00010000
 1848 15:41:08.399002  COREBOOT   13. 99b62000 00008000
 1849 15:41:08.401916  ACPI       14. 99b3e000 00024000
 1850 15:41:08.405031  ACPI GNVS  15. 99b3d000 00001000
 1851 15:41:08.408569  RAMOOPS    16. 99a3d000 00100000
 1852 15:41:08.411831  TPM2 TCGLOG17. 99a2d000 00010000
 1853 15:41:08.415450  SMBIOS     18. 99a2c000 00000800
 1854 15:41:08.418854  IMD small region:
 1855 15:41:08.422204    IMD ROOT    0. 99ffec00 00000400
 1856 15:41:08.424997    FSP RUNTIME 1. 99ffebe0 00000004
 1857 15:41:08.428867    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 15:41:08.431792    POWER STATE 3. 99ffeb80 00000040
 1859 15:41:08.435157    ROMSTAGE    4. 99ffeb60 00000004
 1860 15:41:08.438253    MEM INFO    5. 99ffe9a0 000001b9
 1861 15:41:08.441667    VPD         6. 99ffe920 0000006c
 1862 15:41:08.444970  MTRR: Physical address space:
 1863 15:41:08.451821  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 15:41:08.458497  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 15:41:08.464727  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 15:41:08.468131  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 15:41:08.474583  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 15:41:08.481736  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 15:41:08.488047  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 15:41:08.491204  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 15:41:08.497958  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 15:41:08.500978  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 15:41:08.504657  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 15:41:08.508019  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 15:41:08.514148  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 15:41:08.517583  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 15:41:08.520875  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 15:41:08.524222  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 15:41:08.531068  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 15:41:08.534281  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 15:41:08.537510  call enable_fixed_mtrr()
 1882 15:41:08.540757  CPU physical address size: 39 bits
 1883 15:41:08.543829  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 15:41:08.547455  MTRR: WB selected as default type.
 1885 15:41:08.554062  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 15:41:08.560630  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 15:41:08.567248  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 15:41:08.573928  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 15:41:08.580699  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 15:41:08.587147  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 15:41:08.590041  MTRR: Fixed MSR 0x250 0x0606060606060606
 1892 15:41:08.593754  MTRR: Fixed MSR 0x258 0x0606060606060606
 1893 15:41:08.599857  MTRR: Fixed MSR 0x259 0x0000000000000000
 1894 15:41:08.603210  MTRR: Fixed MSR 0x268 0x0606060606060606
 1895 15:41:08.606539  MTRR: Fixed MSR 0x269 0x0606060606060606
 1896 15:41:08.610051  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1897 15:41:08.613420  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1898 15:41:08.620191  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1899 15:41:08.623337  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1900 15:41:08.626190  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1901 15:41:08.629833  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1902 15:41:08.633046  
 1903 15:41:08.633151  MTRR check
 1904 15:41:08.636407  Fixed MTRRs   : Enabled
 1905 15:41:08.636497  Variable MTRRs: Enabled
 1906 15:41:08.639700  
 1907 15:41:08.639787  call enable_fixed_mtrr()
 1908 15:41:08.645904  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1909 15:41:08.649792  CPU physical address size: 39 bits
 1910 15:41:08.655954  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1911 15:41:08.659236  MTRR: Fixed MSR 0x250 0x0606060606060606
 1912 15:41:08.662560  MTRR: Fixed MSR 0x250 0x0606060606060606
 1913 15:41:08.666179  MTRR: Fixed MSR 0x258 0x0606060606060606
 1914 15:41:08.672893  MTRR: Fixed MSR 0x259 0x0000000000000000
 1915 15:41:08.676214  MTRR: Fixed MSR 0x268 0x0606060606060606
 1916 15:41:08.679667  MTRR: Fixed MSR 0x269 0x0606060606060606
 1917 15:41:08.682887  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1918 15:41:08.685643  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1919 15:41:08.692436  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1920 15:41:08.695661  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1921 15:41:08.699317  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1922 15:41:08.702519  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1923 15:41:08.709025  MTRR: Fixed MSR 0x258 0x0606060606060606
 1924 15:41:08.712484  call enable_fixed_mtrr()
 1925 15:41:08.715635  MTRR: Fixed MSR 0x250 0x0606060606060606
 1926 15:41:08.719065  MTRR: Fixed MSR 0x250 0x0606060606060606
 1927 15:41:08.722488  MTRR: Fixed MSR 0x258 0x0606060606060606
 1928 15:41:08.725227  MTRR: Fixed MSR 0x259 0x0000000000000000
 1929 15:41:08.731916  MTRR: Fixed MSR 0x268 0x0606060606060606
 1930 15:41:08.735232  MTRR: Fixed MSR 0x269 0x0606060606060606
 1931 15:41:08.738943  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1932 15:41:08.742250  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1933 15:41:08.748859  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1934 15:41:08.751822  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1935 15:41:08.755094  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1936 15:41:08.758815  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1937 15:41:08.765222  MTRR: Fixed MSR 0x258 0x0606060606060606
 1938 15:41:08.768143  MTRR: Fixed MSR 0x259 0x0000000000000000
 1939 15:41:08.771392  MTRR: Fixed MSR 0x268 0x0606060606060606
 1940 15:41:08.774899  MTRR: Fixed MSR 0x269 0x0606060606060606
 1941 15:41:08.781748  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1942 15:41:08.785077  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1943 15:41:08.787921  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1944 15:41:08.791900  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1945 15:41:08.797885  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1946 15:41:08.801221  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1947 15:41:08.804964  call enable_fixed_mtrr()
 1948 15:41:08.805069  call enable_fixed_mtrr()
 1949 15:41:08.811192  CPU physical address size: 39 bits
 1950 15:41:08.814874  CPU physical address size: 39 bits
 1951 15:41:08.818125  MTRR: Fixed MSR 0x250 0x0606060606060606
 1952 15:41:08.821600  MTRR: Fixed MSR 0x250 0x0606060606060606
 1953 15:41:08.824850  MTRR: Fixed MSR 0x258 0x0606060606060606
 1954 15:41:08.831436  MTRR: Fixed MSR 0x259 0x0000000000000000
 1955 15:41:08.834214  MTRR: Fixed MSR 0x268 0x0606060606060606
 1956 15:41:08.837508  MTRR: Fixed MSR 0x269 0x0606060606060606
 1957 15:41:08.840911  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1958 15:41:08.847423  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1959 15:41:08.850715  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1960 15:41:08.854010  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1961 15:41:08.857577  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1962 15:41:08.863991  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1963 15:41:08.867400  MTRR: Fixed MSR 0x258 0x0606060606060606
 1964 15:41:08.870668  call enable_fixed_mtrr()
 1965 15:41:08.874170  MTRR: Fixed MSR 0x259 0x0000000000000000
 1966 15:41:08.877432  MTRR: Fixed MSR 0x268 0x0606060606060606
 1967 15:41:08.880945  MTRR: Fixed MSR 0x269 0x0606060606060606
 1968 15:41:08.887569  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1969 15:41:08.890785  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1970 15:41:08.894040  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1971 15:41:08.897652  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1972 15:41:08.903703  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1973 15:41:08.906957  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1974 15:41:08.910341  CPU physical address size: 39 bits
 1975 15:41:08.913618  call enable_fixed_mtrr()
 1976 15:41:08.916870  MTRR: Fixed MSR 0x259 0x0000000000000000
 1977 15:41:08.920390  MTRR: Fixed MSR 0x268 0x0606060606060606
 1978 15:41:08.923572  MTRR: Fixed MSR 0x269 0x0606060606060606
 1979 15:41:08.930502  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1980 15:41:08.933900  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1981 15:41:08.936978  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1982 15:41:08.940336  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1983 15:41:08.947008  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1984 15:41:08.950347  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1985 15:41:08.953766  CPU physical address size: 39 bits
 1986 15:41:08.956585  call enable_fixed_mtrr()
 1987 15:41:08.959813  CBFS @ c08000 size 3f8000
 1988 15:41:08.963147  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1989 15:41:08.970160  CPU physical address size: 39 bits
 1990 15:41:08.973377  CBFS: Locating 'fallback/payload'
 1991 15:41:08.976803  CPU physical address size: 39 bits
 1992 15:41:08.979631  CBFS: Found @ offset 1c96c0 size 3f798
 1993 15:41:08.983014  Checking segment from ROM address 0xffdd16f8
 1994 15:41:08.986308  Checking segment from ROM address 0xffdd1714
 1995 15:41:08.993087  Loading segment from ROM address 0xffdd16f8
 1996 15:41:08.996406    code (compression=0)
 1997 15:41:09.003035    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 15:41:09.012970  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 15:41:09.013080  it's not compressed!
 2000 15:41:09.106281  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 15:41:09.113222  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 15:41:09.115990  Loading segment from ROM address 0xffdd1714
 2003 15:41:09.119321    Entry Point 0x30000000
 2004 15:41:09.122574  Loaded segments
 2005 15:41:09.128163  Finalizing chipset.
 2006 15:41:09.131584  Finalizing SMM.
 2007 15:41:09.134822  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2008 15:41:09.138348  mp_park_aps done after 0 msecs.
 2009 15:41:09.144915  Jumping to boot code at 30000000(99b62000)
 2010 15:41:09.151107  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 15:41:09.151212  
 2012 15:41:09.154716  Starting depthcharge on Helios...
 2013 15:41:09.155081  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2014 15:41:09.155200  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2015 15:41:09.155295  Setting prompt string to ['hatch:']
 2016 15:41:09.155388  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2017 15:41:09.164892  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 15:41:09.171145  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 15:41:09.177844  board_setup: Info: eMMC controller not present; skipping
 2020 15:41:09.181041  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 15:41:09.187795  board_setup: Info: SDHCI controller not present; skipping
 2022 15:41:09.194123  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 15:41:09.194248  Wipe memory regions:
 2024 15:41:09.197375  	[0x00000000001000, 0x000000000a0000)
 2025 15:41:09.204166  	[0x00000000100000, 0x00000030000000)
 2026 15:41:09.270848  	[0x00000030657430, 0x00000099a2c000)
 2027 15:41:09.420608  	[0x00000100000000, 0x0000045e800000)
 2028 15:41:10.876854  R8152: Initializing
 2029 15:41:10.880059  Version 9 (ocp_data = 6010)
 2030 15:41:10.884070  R8152: Done initializing
 2031 15:41:10.887783  Adding net device
 2032 15:41:11.262665  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 15:41:11.262819  
 2034 15:41:11.263120  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2036 15:41:11.363910  hatch: tftpboot 192.168.201.1 7463472/tftp-deploy-x5pa_00i/kernel/bzImage 7463472/tftp-deploy-x5pa_00i/kernel/cmdline 7463472/tftp-deploy-x5pa_00i/ramdisk/ramdisk.cpio.gz
 2037 15:41:11.364107  Setting prompt string to 'Starting kernel'
 2038 15:41:11.364189  Setting prompt string to ['Starting kernel']
 2039 15:41:11.364263  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2040 15:41:11.364348  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2041 15:41:11.368203  tftpboot 192.168.201.1 7463472/tftp-deploy-x5pa_00i/kernel/bzImay-x5pa_00i/kernel/cmdline 7463472/tftp-deploy-x5pa_00i/ramdisk/ramdisk.cpio.gz
 2042 15:41:11.368309  Waiting for link
 2043 15:41:11.569494  done.
 2044 15:41:11.569655  MAC: f4:f5:e8:50:e3:ec
 2045 15:41:11.572352  Sending DHCP discover... done.
 2046 15:41:11.576065  Waiting for reply... done.
 2047 15:41:11.579188  Sending DHCP request... done.
 2048 15:41:11.582519  Waiting for reply... done.
 2049 15:41:11.585666  My ip is 192.168.201.14
 2050 15:41:11.589308  The DHCP server ip is 192.168.201.1
 2051 15:41:11.592623  TFTP server IP predefined by user: 192.168.201.1
 2052 15:41:11.599369  Bootfile predefined by user: 7463472/tftp-deploy-x5pa_00i/kernel/bzImage
 2053 15:41:11.602209  Sending tftp read request... done.
 2054 15:41:11.605379  Waiting for the transfer... 
 2055 15:41:11.864983  00000000 ################################################################
 2056 15:41:12.108785  00080000 ################################################################
 2057 15:41:12.357544  00100000 ################################################################
 2058 15:41:12.603966  00180000 ################################################################
 2059 15:41:12.848682  00200000 ################################################################
 2060 15:41:13.099673  00280000 ################################################################
 2061 15:41:13.339492  00300000 ################################################################
 2062 15:41:13.585129  00380000 ################################################################
 2063 15:41:13.840170  00400000 ################################################################
 2064 15:41:14.105380  00480000 ################################################################
 2065 15:41:14.355154  00500000 ################################################################
 2066 15:41:14.605564  00580000 ################################################################
 2067 15:41:14.850105  00600000 ################################################################
 2068 15:41:14.993058  00680000 ###################################### done.
 2069 15:41:14.996410  The bootfile was 7126928 bytes long.
 2070 15:41:14.999922  Sending tftp read request... done.
 2071 15:41:15.003023  Waiting for the transfer... 
 2072 15:41:15.256291  00000000 ################################################################
 2073 15:41:15.496584  00080000 ################################################################
 2074 15:41:15.746445  00100000 ################################################################
 2075 15:41:15.997568  00180000 ################################################################
 2076 15:41:16.246248  00200000 ################################################################
 2077 15:41:16.506532  00280000 ################################################################
 2078 15:41:16.760231  00300000 ################################################################
 2079 15:41:17.047690  00380000 ################################################################
 2080 15:41:17.353653  00400000 ################################################################
 2081 15:41:17.656245  00480000 ################################################################
 2082 15:41:17.808999  00500000 ############################### done.
 2083 15:41:17.812514  Sending tftp read request... done.
 2084 15:41:17.815617  Waiting for the transfer... 
 2085 15:41:17.815733  00000000 # done.
 2086 15:41:17.825759  Command line loaded dynamically from TFTP file: 7463472/tftp-deploy-x5pa_00i/kernel/cmdline
 2087 15:41:17.849191  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7463472/extract-nfsrootfs-nf36q4_t,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2088 15:41:17.855192  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2089 15:41:17.861923  Shutting down all USB controllers.
 2090 15:41:17.862092  Removing current net device
 2091 15:41:17.865600  Finalizing coreboot
 2092 15:41:17.872060  Exiting depthcharge with code 4 at timestamp: 15999937
 2093 15:41:17.872233  
 2094 15:41:17.872368  Starting kernel ...
 2095 15:41:17.872498  
 2096 15:41:17.873054  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2097 15:41:17.873279  start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
 2098 15:41:17.873437  Setting prompt string to ['Linux version [0-9]']
 2099 15:41:17.873585  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2100 15:41:17.873746  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2101 15:41:17.875479  
 2103 15:45:49.874186  end: 2.2.5 auto-login-action (duration 00:04:32) [common]
 2105 15:45:49.875374  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
 2107 15:45:49.876236  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2110 15:45:49.877788  end: 2 depthcharge-action (duration 00:05:00) [common]
 2112 15:45:49.878876  Cleaning after the job
 2113 15:45:49.878968  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/ramdisk
 2114 15:45:49.879500  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/kernel
 2115 15:45:49.880095  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/nfsrootfs
 2116 15:45:49.921797  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463472/tftp-deploy-x5pa_00i/modules
 2117 15:45:49.922130  start: 4.1 power-off (timeout 00:00:30) [common]
 2118 15:45:49.922319  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2119 15:45:49.943362  >> Command sent successfully.

 2120 15:45:49.945382  Returned 0 in 0 seconds
 2121 15:45:50.046625  end: 4.1 power-off (duration 00:00:00) [common]
 2123 15:45:50.048233  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2124 15:45:50.049465  Listened to connection for namespace 'common' for up to 1s
 2125 15:45:50.913678  Listened to connection for namespace 'common' for up to 1s
 2126 15:45:50.916863  Listened to connection for namespace 'common' for up to 1s
 2127 15:45:50.920172  Listened to connection for namespace 'common' for up to 1s
 2128 15:45:50.923531  Listened to connection for namespace 'common' for up to 1s
 2129 15:45:50.927228  Listened to connection for namespace 'common' for up to 1s
 2130 15:45:50.930476  Listened to connection for namespace 'common' for up to 1s
 2131 15:45:50.933941  Listened to connection for namespace 'common' for up to 1s
 2132 15:45:50.936960  Listened to connection for namespace 'common' for up to 1s
 2133 15:45:50.940673  Listened to connection for namespace 'common' for up to 1s
 2134 15:45:50.943968  Listened to connection for namespace 'common' for up to 1s
 2135 15:45:50.947391  Listened to connection for namespace 'common' for up to 1s
 2136 15:45:50.950571  Listened to connection for namespace 'common' for up to 1s
 2137 15:45:50.953840  Listened to connection for namespace 'common' for up to 1s
 2138 15:45:50.957617  Listened to connection for namespace 'common' for up to 1s
 2139 15:45:50.962350  Listened to connection for namespace 'common' for up to 1s
 2140 15:45:50.965950  Listened to connection for namespace 'common' for up to 1s
 2141 15:45:51.049555  Finalising connection for namespace 'common'
 2142 15:45:51.050252  Disconnecting from shell: Finalise
 2143 15:45:51.050717  
 2144 15:45:51.152272  end: 4.2 read-feedback (duration 00:00:01) [common]
 2145 15:45:51.152909  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463472
 2146 15:45:51.339212  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463472
 2147 15:45:51.339424  JobError: Your job cannot terminate cleanly.