Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:39:55.368248 lava-dispatcher, installed at version: 2022.06
2 15:39:55.368432 start: 0 validate
3 15:39:55.368562 Start time: 2022-09-30 15:39:55.368555+00:00 (UTC)
4 15:39:55.368686 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:39:55.368813 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:39:55.659202 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:39:55.659371 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:39:58.160419 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:39:58.160622 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:39:58.452915 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:39:58.453099 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:39:58.456246 validate duration: 3.09
14 15:39:58.456602 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:39:58.456745 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:39:58.456872 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:39:58.457001 Not decompressing ramdisk as can be used compressed.
18 15:39:58.457124 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 15:39:58.457226 saving as /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/ramdisk/initrd.cpio.gz
20 15:39:58.457324 total size: 5411075 (5MB)
21 15:39:58.458728 progress 0% (0MB)
22 15:39:58.460979 progress 5% (0MB)
23 15:39:58.463122 progress 10% (0MB)
24 15:39:58.465354 progress 15% (0MB)
25 15:39:58.467756 progress 20% (1MB)
26 15:39:58.469871 progress 25% (1MB)
27 15:39:58.471950 progress 30% (1MB)
28 15:39:58.474045 progress 35% (1MB)
29 15:39:58.476370 progress 40% (2MB)
30 15:39:58.478478 progress 45% (2MB)
31 15:39:58.480538 progress 50% (2MB)
32 15:39:58.482634 progress 55% (2MB)
33 15:39:58.484941 progress 60% (3MB)
34 15:39:58.487046 progress 65% (3MB)
35 15:39:58.489109 progress 70% (3MB)
36 15:39:58.491172 progress 75% (3MB)
37 15:39:58.493483 progress 80% (4MB)
38 15:39:58.495610 progress 85% (4MB)
39 15:39:58.497670 progress 90% (4MB)
40 15:39:58.499171 progress 95% (4MB)
41 15:39:58.500646 progress 100% (5MB)
42 15:39:58.500828 5MB downloaded in 0.04s (118.63MB/s)
43 15:39:58.501015 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:39:58.501260 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:39:58.501348 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:39:58.501456 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:39:58.501564 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:39:58.501632 saving as /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/kernel/bzImage
50 15:39:58.501695 total size: 7126928 (6MB)
51 15:39:58.501756 No compression specified
52 15:39:58.502950 progress 0% (0MB)
53 15:39:58.504892 progress 5% (0MB)
54 15:39:58.506809 progress 10% (0MB)
55 15:39:58.508641 progress 15% (1MB)
56 15:39:58.510466 progress 20% (1MB)
57 15:39:58.512435 progress 25% (1MB)
58 15:39:58.514326 progress 30% (2MB)
59 15:39:58.516129 progress 35% (2MB)
60 15:39:58.517839 progress 40% (2MB)
61 15:39:58.519721 progress 45% (3MB)
62 15:39:58.521518 progress 50% (3MB)
63 15:39:58.523351 progress 55% (3MB)
64 15:39:58.525166 progress 60% (4MB)
65 15:39:58.526967 progress 65% (4MB)
66 15:39:58.528821 progress 70% (4MB)
67 15:39:58.530681 progress 75% (5MB)
68 15:39:58.532379 progress 80% (5MB)
69 15:39:58.534232 progress 85% (5MB)
70 15:39:58.536055 progress 90% (6MB)
71 15:39:58.537831 progress 95% (6MB)
72 15:39:58.539643 progress 100% (6MB)
73 15:39:58.539968 6MB downloaded in 0.04s (177.67MB/s)
74 15:39:58.540134 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:39:58.540408 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:39:58.540496 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:39:58.540582 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:39:58.540689 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 15:39:58.540784 saving as /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/nfsrootfs/full.rootfs.tar
81 15:39:58.540844 total size: 122682368 (116MB)
82 15:39:58.540906 Using unxz to decompress xz
83 15:39:58.544309 progress 0% (0MB)
84 15:39:58.987985 progress 5% (5MB)
85 15:39:59.446023 progress 10% (11MB)
86 15:39:59.905843 progress 15% (17MB)
87 15:40:00.368097 progress 20% (23MB)
88 15:40:00.687041 progress 25% (29MB)
89 15:40:01.032555 progress 30% (35MB)
90 15:40:01.276553 progress 35% (40MB)
91 15:40:01.487478 progress 40% (46MB)
92 15:40:01.837960 progress 45% (52MB)
93 15:40:02.196890 progress 50% (58MB)
94 15:40:02.539840 progress 55% (64MB)
95 15:40:02.892218 progress 60% (70MB)
96 15:40:03.238401 progress 65% (76MB)
97 15:40:03.631054 progress 70% (81MB)
98 15:40:04.052416 progress 75% (87MB)
99 15:40:04.476961 progress 80% (93MB)
100 15:40:04.591083 progress 85% (99MB)
101 15:40:04.758910 progress 90% (105MB)
102 15:40:05.097996 progress 95% (111MB)
103 15:40:05.476269 progress 100% (116MB)
104 15:40:05.483164 116MB downloaded in 6.94s (16.85MB/s)
105 15:40:05.483463 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:40:05.483743 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:40:05.483838 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:40:05.483927 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:40:05.484043 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:40:05.484116 saving as /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/modules/modules.tar
112 15:40:05.484179 total size: 51896 (0MB)
113 15:40:05.484243 Using unxz to decompress xz
114 15:40:05.487420 progress 63% (0MB)
115 15:40:05.487807 progress 100% (0MB)
116 15:40:05.491189 0MB downloaded in 0.01s (7.07MB/s)
117 15:40:05.491429 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:40:05.491695 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:40:05.491794 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:40:05.491891 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:40:07.187970 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7463466/extract-nfsrootfs-zr6kht7z
123 15:40:07.188184 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:40:07.188315 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:40:07.188500 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si
126 15:40:07.188602 makedir: /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin
127 15:40:07.188705 makedir: /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/tests
128 15:40:07.188821 makedir: /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/results
129 15:40:07.188933 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-add-keys
130 15:40:07.189088 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-add-sources
131 15:40:07.189204 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-background-process-start
132 15:40:07.189347 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-background-process-stop
133 15:40:07.189486 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-common-functions
134 15:40:07.189595 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-echo-ipv4
135 15:40:07.189719 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-install-packages
136 15:40:07.190193 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-installed-packages
137 15:40:07.190331 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-os-build
138 15:40:07.190476 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-probe-channel
139 15:40:07.190599 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-probe-ip
140 15:40:07.190708 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-target-ip
141 15:40:07.190816 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-target-mac
142 15:40:07.190927 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-target-storage
143 15:40:07.191037 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-case
144 15:40:07.191148 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-event
145 15:40:07.191255 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-feedback
146 15:40:07.191363 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-raise
147 15:40:07.191470 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-reference
148 15:40:07.191578 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-runner
149 15:40:07.191685 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-set
150 15:40:07.191792 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-test-shell
151 15:40:07.191901 Updating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-install-packages (oe)
152 15:40:07.192013 Updating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/bin/lava-installed-packages (oe)
153 15:40:07.192109 Creating /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/environment
154 15:40:07.192195 LAVA metadata
155 15:40:07.192261 - LAVA_JOB_ID=7463466
156 15:40:07.192325 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:40:07.192423 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:40:07.192488 skipped lava-vland-overlay
159 15:40:07.192581 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:40:07.192678 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:40:07.192740 skipped lava-multinode-overlay
162 15:40:07.192843 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:40:07.192925 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:40:07.193013 Loading test definitions
165 15:40:07.193115 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:40:07.193218 Using /lava-7463466 at stage 0
167 15:40:07.193314 Fetching tests from https://github.com/kernelci/test-definitions
168 15:40:07.193422 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/0/tests/0_ltp-ipc'
169 15:40:10.513290 Running '/usr/bin/git checkout kernelci.org
170 15:40:10.648188 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 15:40:10.648908 uuid=7463466_1.5.2.3.1 testdef=None
172 15:40:10.649074 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 15:40:10.649327 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 15:40:10.650137 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:40:10.650380 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 15:40:10.651350 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:40:10.651603 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 15:40:10.652519 runner path: /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/0/tests/0_ltp-ipc test_uuid 7463466_1.5.2.3.1
182 15:40:10.652614 SKIPFILE='skipfile-lkft.yaml'
183 15:40:10.652681 SKIP_INSTALL='true'
184 15:40:10.652743 TST_CMDFILES='ipc'
185 15:40:10.652882 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:40:10.653098 Creating lava-test-runner.conf files
188 15:40:10.653164 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463466/lava-overlay-lz3pl_si/lava-7463466/0 for stage 0
189 15:40:10.653253 - 0_ltp-ipc
190 15:40:10.653354 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 15:40:10.653443 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
192 15:40:17.929529 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 15:40:17.929695 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
194 15:40:17.929859 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:40:17.929984 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 15:40:17.930092 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
197 15:40:18.033415 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:40:18.033771 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
199 15:40:18.033933 extracting modules file /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463466/extract-nfsrootfs-zr6kht7z
200 15:40:18.038418 extracting modules file /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463466/extract-overlay-ramdisk-yqpt4n93/ramdisk
201 15:40:18.042492 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:40:18.042614 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
203 15:40:18.042701 [common] Applying overlay to NFS
204 15:40:18.042779 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463466/compress-overlay-vk3pdw2u/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463466/extract-nfsrootfs-zr6kht7z
205 15:40:18.496316 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:40:18.496491 start: 1.5.6 configure-preseed-file (timeout 00:09:40) [common]
207 15:40:18.496591 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:40:18.496692 start: 1.5.7 compress-ramdisk (timeout 00:09:40) [common]
209 15:40:18.496776 Building ramdisk /var/lib/lava/dispatcher/tmp/7463466/extract-overlay-ramdisk-yqpt4n93/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463466/extract-overlay-ramdisk-yqpt4n93/ramdisk
210 15:40:18.529722 >> 24434 blocks
211 15:40:18.994827 rename /var/lib/lava/dispatcher/tmp/7463466/extract-overlay-ramdisk-yqpt4n93/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/ramdisk/ramdisk.cpio.gz
212 15:40:18.995256 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 15:40:18.995387 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
214 15:40:18.995503 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
215 15:40:18.995599 No mkimage arch provided, not using FIT.
216 15:40:18.995702 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:40:18.995791 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:40:18.995895 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 15:40:18.996004 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
220 15:40:18.996087 No LXC device requested
221 15:40:18.996175 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:40:18.996275 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
223 15:40:18.996364 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:40:18.996440 Checking files for TFTP limit of 4294967296 bytes.
225 15:40:18.996843 end: 1 tftp-deploy (duration 00:00:21) [common]
226 15:40:18.996954 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:40:18.997061 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:40:18.997196 substitutions:
229 15:40:18.997274 - {DTB}: None
230 15:40:18.997346 - {INITRD}: 7463466/tftp-deploy-8gwgsdrf/ramdisk/ramdisk.cpio.gz
231 15:40:18.997408 - {KERNEL}: 7463466/tftp-deploy-8gwgsdrf/kernel/bzImage
232 15:40:18.997468 - {LAVA_MAC}: None
233 15:40:18.997535 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7463466/extract-nfsrootfs-zr6kht7z
234 15:40:18.997602 - {NFS_SERVER_IP}: 192.168.201.1
235 15:40:18.997660 - {PRESEED_CONFIG}: None
236 15:40:18.997717 - {PRESEED_LOCAL}: None
237 15:40:18.997793 - {RAMDISK}: 7463466/tftp-deploy-8gwgsdrf/ramdisk/ramdisk.cpio.gz
238 15:40:18.997890 - {ROOT_PART}: None
239 15:40:18.997947 - {ROOT}: None
240 15:40:18.998006 - {SERVER_IP}: 192.168.201.1
241 15:40:18.998074 - {TEE}: None
242 15:40:18.998131 Parsed boot commands:
243 15:40:18.998186 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:40:18.998351 Parsed boot commands: tftpboot 192.168.201.1 7463466/tftp-deploy-8gwgsdrf/kernel/bzImage 7463466/tftp-deploy-8gwgsdrf/kernel/cmdline 7463466/tftp-deploy-8gwgsdrf/ramdisk/ramdisk.cpio.gz
245 15:40:18.998446 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:40:18.998547 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:40:18.998657 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:40:18.998762 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:40:18.998841 Not connected, no need to disconnect.
250 15:40:18.998922 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:40:18.999012 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:40:18.999088 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
253 15:40:19.001832 Setting prompt string to ['lava-test: # ']
254 15:40:19.002148 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:40:19.002262 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:40:19.002370 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:40:19.002462 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:40:19.002653 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
259 15:40:19.022221 >> Command sent successfully.
260 15:40:19.024076 Returned 0 in 0 seconds
261 15:40:19.124814 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 15:40:19.125126 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 15:40:19.125245 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 15:40:19.125336 Setting prompt string to 'Starting depthcharge on Voema...'
266 15:40:19.125404 Changing prompt to 'Starting depthcharge on Voema...'
267 15:40:19.125481 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 15:40:19.125769 [Enter `^Ec?' for help]
269 15:40:27.690069
270 15:40:27.690235
271 15:40:27.700313 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 15:40:27.703566 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 15:40:27.710007 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 15:40:27.713611 CPU: AES supported, TXT NOT supported, VT supported
275 15:40:27.720009 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 15:40:27.726597 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 15:40:27.729897 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 15:40:27.733554 VBOOT: Loading verstage.
279 15:40:27.736839 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
280 15:40:27.743366 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 15:40:27.746501 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 15:40:27.757344 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 15:40:27.763836 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 15:40:27.763925
285 15:40:27.763993
286 15:40:27.777005 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 15:40:27.790784 Probing TPM: . done!
288 15:40:27.794343 TPM ready after 0 ms
289 15:40:27.797575 Connected to device vid:did:rid of 1ae0:0028:00
290 15:40:27.808941 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
291 15:40:27.815508 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 15:40:27.818642 Initialized TPM device CR50 revision 0
293 15:40:27.869367 tlcl_send_startup: Startup return code is 0
294 15:40:27.869471 TPM: setup succeeded
295 15:40:27.884777 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 15:40:27.898940 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 15:40:27.911421 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 15:40:27.921474 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 15:40:27.925234 Chrome EC: UHEPI supported
300 15:40:27.928319 Phase 1
301 15:40:27.931870 FMAP: area GBB found @ 1805000 (458752 bytes)
302 15:40:27.941476 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 15:40:27.948108 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 15:40:27.954998 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 15:40:27.961565 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 15:40:27.965032 Recovery requested (1009000e)
307 15:40:27.968076 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 15:40:27.979950 tlcl_extend: response is 0
309 15:40:27.986373 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 15:40:27.996398 tlcl_extend: response is 0
311 15:40:28.002961 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 15:40:28.009624 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 15:40:28.016089 BS: verstage times (exec / console): total (unknown) / 142 ms
314 15:40:28.016177
315 15:40:28.016245
316 15:40:28.029819 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 15:40:28.036226 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 15:40:28.039409 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 15:40:28.042744 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 15:40:28.049469 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 15:40:28.052922 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 15:40:28.055992 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 15:40:28.059725 TCO_STS: 0000 0000
324 15:40:28.062929 GEN_PMCON: d0015038 00002200
325 15:40:28.066018 GBLRST_CAUSE: 00000000 00000000
326 15:40:28.066104 HPR_CAUSE0: 00000000
327 15:40:28.069406 prev_sleep_state 5
328 15:40:28.072997 Boot Count incremented to 12341
329 15:40:28.079364 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 15:40:28.086257 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 15:40:28.092951 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 15:40:28.099299 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 15:40:28.103962 Chrome EC: UHEPI supported
334 15:40:28.110424 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 15:40:28.123524 Probing TPM: done!
336 15:40:28.130857 Connected to device vid:did:rid of 1ae0:0028:00
337 15:40:28.141558 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
338 15:40:28.148474 Initialized TPM device CR50 revision 0
339 15:40:28.161616 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 15:40:28.164780 MRC: Hash idx 0x100b comparison successful.
341 15:40:28.168027 MRC cache found, size faa8
342 15:40:28.168109 bootmode is set to: 2
343 15:40:28.171658 SPD index = 0
344 15:40:28.178172 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 15:40:28.181437 SPD: module type is LPDDR4X
346 15:40:28.184984 SPD: module part number is MT53E512M64D4NW-046
347 15:40:28.191766 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 15:40:28.194900 SPD: device width 16 bits, bus width 16 bits
349 15:40:28.201389 SPD: module size is 1024 MB (per channel)
350 15:40:28.633964 CBMEM:
351 15:40:28.637509 IMD: root @ 0x76fff000 254 entries.
352 15:40:28.640774 IMD: root @ 0x76ffec00 62 entries.
353 15:40:28.643835 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 15:40:28.650823 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 15:40:28.653997 External stage cache:
356 15:40:28.657079 IMD: root @ 0x7b3ff000 254 entries.
357 15:40:28.660371 IMD: root @ 0x7b3fec00 62 entries.
358 15:40:28.675812 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 15:40:28.682417 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 15:40:28.688837 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 15:40:28.702813 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 15:40:28.706796 cse_lite: Skip switching to RW in the recovery path
363 15:40:28.710160 8 DIMMs found
364 15:40:28.710247 SMM Memory Map
365 15:40:28.713974 SMRAM : 0x7b000000 0x800000
366 15:40:28.717255 Subregion 0: 0x7b000000 0x200000
367 15:40:28.720658 Subregion 1: 0x7b200000 0x200000
368 15:40:28.724076 Subregion 2: 0x7b400000 0x400000
369 15:40:28.727282 top_of_ram = 0x77000000
370 15:40:28.733927 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
371 15:40:28.737419 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
372 15:40:28.743979 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
373 15:40:28.747247 MTRR Range: Start=ff000000 End=0 (Size 1000000)
374 15:40:28.757062 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
375 15:40:28.763686 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
376 15:40:28.773653 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
377 15:40:28.776879 Processing 211 relocs. Offset value of 0x74c0b000
378 15:40:28.785662 BS: romstage times (exec / console): total (unknown) / 277 ms
379 15:40:28.791761
380 15:40:28.791887
381 15:40:28.801616 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
382 15:40:28.805283 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 15:40:28.815006 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 15:40:28.821796 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 15:40:28.828612 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
386 15:40:28.834929 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
387 15:40:28.882209 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
388 15:40:28.888692 Processing 5008 relocs. Offset value of 0x75d98000
389 15:40:28.891924 BS: postcar times (exec / console): total (unknown) / 59 ms
390 15:40:28.895143
391 15:40:28.895225
392 15:40:28.905663 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
393 15:40:28.905755 Normal boot
394 15:40:28.909183 FW_CONFIG value is 0x804c02
395 15:40:28.912368 PCI: 00:07.0 disabled by fw_config
396 15:40:28.915575 PCI: 00:07.1 disabled by fw_config
397 15:40:28.918924 PCI: 00:0d.2 disabled by fw_config
398 15:40:28.922281 PCI: 00:1c.7 disabled by fw_config
399 15:40:28.928723 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
400 15:40:28.935189 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
401 15:40:28.938504 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 15:40:28.941972 GENERIC: 0.0 disabled by fw_config
403 15:40:28.945223 GENERIC: 1.0 disabled by fw_config
404 15:40:28.951770 fw_config match found: DB_USB=USB3_ACTIVE
405 15:40:28.955146 fw_config match found: DB_USB=USB3_ACTIVE
406 15:40:28.958832 fw_config match found: DB_USB=USB3_ACTIVE
407 15:40:28.965177 fw_config match found: DB_USB=USB3_ACTIVE
408 15:40:28.968305 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 15:40:28.975181 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 15:40:28.985108 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 15:40:28.991761 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
412 15:40:28.995214 microcode: sig=0x806c1 pf=0x80 revision=0x86
413 15:40:29.001698 microcode: Update skipped, already up-to-date
414 15:40:29.008181 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
415 15:40:29.035540 Detected 4 core, 8 thread CPU.
416 15:40:29.038768 Setting up SMI for CPU
417 15:40:29.042072 IED base = 0x7b400000
418 15:40:29.042159 IED size = 0x00400000
419 15:40:29.045665 Will perform SMM setup.
420 15:40:29.052194 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
421 15:40:29.058715 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
422 15:40:29.065627 Processing 16 relocs. Offset value of 0x00030000
423 15:40:29.068681 Attempting to start 7 APs
424 15:40:29.071852 Waiting for 10ms after sending INIT.
425 15:40:29.087606 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
426 15:40:29.091075 AP: slot 6 apic_id 2.
427 15:40:29.094121 AP: slot 2 apic_id 3.
428 15:40:29.094206 AP: slot 4 apic_id 7.
429 15:40:29.097677 AP: slot 5 apic_id 6.
430 15:40:29.101012 AP: slot 7 apic_id 4.
431 15:40:29.101097 AP: slot 3 apic_id 5.
432 15:40:29.101162 done.
433 15:40:29.107585 Waiting for 2nd SIPI to complete...done.
434 15:40:29.114138 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
435 15:40:29.120554 Processing 13 relocs. Offset value of 0x00038000
436 15:40:29.123926 Unable to locate Global NVS
437 15:40:29.130804 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
438 15:40:29.134096 Installing permanent SMM handler to 0x7b000000
439 15:40:29.144240 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
440 15:40:29.147517 Processing 794 relocs. Offset value of 0x7b010000
441 15:40:29.157401 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
442 15:40:29.160630 Processing 13 relocs. Offset value of 0x7b008000
443 15:40:29.167139 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
444 15:40:29.173951 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
445 15:40:29.177028 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
446 15:40:29.183920 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
447 15:40:29.190649 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
448 15:40:29.197382 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
449 15:40:29.203734 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
450 15:40:29.203820 Unable to locate Global NVS
451 15:40:29.213664 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
452 15:40:29.217146 Clearing SMI status registers
453 15:40:29.217230 SMI_STS: PM1
454 15:40:29.220325 PM1_STS: PWRBTN
455 15:40:29.226978 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 15:40:29.230254 In relocation handler: CPU 0
457 15:40:29.233921 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 15:40:29.240448 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 15:40:29.240536 Relocation complete.
460 15:40:29.250054 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 15:40:29.250141 In relocation handler: CPU 1
462 15:40:29.256814 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 15:40:29.256902 Relocation complete.
464 15:40:29.266677 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 15:40:29.266764 In relocation handler: CPU 3
466 15:40:29.273542 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 15:40:29.273628 Relocation complete.
468 15:40:29.280223 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
469 15:40:29.283499 In relocation handler: CPU 7
470 15:40:29.289969 New SMBASE=0x7affe400 IEDBASE=0x7b400000
471 15:40:29.293574 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 15:40:29.296997 Relocation complete.
473 15:40:29.303324 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
474 15:40:29.306635 In relocation handler: CPU 4
475 15:40:29.310202 New SMBASE=0x7afff000 IEDBASE=0x7b400000
476 15:40:29.313505 Relocation complete.
477 15:40:29.320162 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
478 15:40:29.323523 In relocation handler: CPU 5
479 15:40:29.326732 New SMBASE=0x7affec00 IEDBASE=0x7b400000
480 15:40:29.329958 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 15:40:29.333243 Relocation complete.
482 15:40:29.340117 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 15:40:29.343407 In relocation handler: CPU 6
484 15:40:29.346648 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 15:40:29.353446 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 15:40:29.353556 Relocation complete.
487 15:40:29.363745 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 15:40:29.366857 In relocation handler: CPU 2
489 15:40:29.370714 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 15:40:29.370800 Relocation complete.
491 15:40:29.374551 Initializing CPU #0
492 15:40:29.378109 CPU: vendor Intel device 806c1
493 15:40:29.381687 CPU: family 06, model 8c, stepping 01
494 15:40:29.384729 Clearing out pending MCEs
495 15:40:29.384815 Setting up local APIC...
496 15:40:29.388312 apic_id: 0x00 done.
497 15:40:29.391549 Turbo is available but hidden
498 15:40:29.394977 Turbo is available and visible
499 15:40:29.398391 microcode: Update skipped, already up-to-date
500 15:40:29.401219 CPU #0 initialized
501 15:40:29.404959 Initializing CPU #2
502 15:40:29.405039 Initializing CPU #6
503 15:40:29.408267 CPU: vendor Intel device 806c1
504 15:40:29.411378 CPU: family 06, model 8c, stepping 01
505 15:40:29.414561 CPU: vendor Intel device 806c1
506 15:40:29.418206 CPU: family 06, model 8c, stepping 01
507 15:40:29.421314 Clearing out pending MCEs
508 15:40:29.424574 Clearing out pending MCEs
509 15:40:29.427807 Setting up local APIC...
510 15:40:29.427890 Initializing CPU #3
511 15:40:29.431490 Initializing CPU #7
512 15:40:29.434732 CPU: vendor Intel device 806c1
513 15:40:29.437918 CPU: family 06, model 8c, stepping 01
514 15:40:29.441516 CPU: vendor Intel device 806c1
515 15:40:29.444816 CPU: family 06, model 8c, stepping 01
516 15:40:29.447925 Setting up local APIC...
517 15:40:29.448003 Initializing CPU #5
518 15:40:29.451300 Initializing CPU #4
519 15:40:29.454500 CPU: vendor Intel device 806c1
520 15:40:29.458093 CPU: family 06, model 8c, stepping 01
521 15:40:29.461213 apic_id: 0x02 done.
522 15:40:29.461296 apic_id: 0x03 done.
523 15:40:29.467738 microcode: Update skipped, already up-to-date
524 15:40:29.471305 microcode: Update skipped, already up-to-date
525 15:40:29.474561 CPU #6 initialized
526 15:40:29.474636 CPU #2 initialized
527 15:40:29.478053 Clearing out pending MCEs
528 15:40:29.481517 CPU: vendor Intel device 806c1
529 15:40:29.484862 CPU: family 06, model 8c, stepping 01
530 15:40:29.487785 Setting up local APIC...
531 15:40:29.491451 Clearing out pending MCEs
532 15:40:29.494485 Clearing out pending MCEs
533 15:40:29.494565 Setting up local APIC...
534 15:40:29.497718 Clearing out pending MCEs
535 15:40:29.501475 apic_id: 0x06 done.
536 15:40:29.504590 Setting up local APIC...
537 15:40:29.504674 apic_id: 0x04 done.
538 15:40:29.507908 Setting up local APIC...
539 15:40:29.511041 microcode: Update skipped, already up-to-date
540 15:40:29.514616 apic_id: 0x07 done.
541 15:40:29.517795 CPU #5 initialized
542 15:40:29.521316 microcode: Update skipped, already up-to-date
543 15:40:29.524555 Initializing CPU #1
544 15:40:29.527915 microcode: Update skipped, already up-to-date
545 15:40:29.530994 apic_id: 0x05 done.
546 15:40:29.531067 CPU #7 initialized
547 15:40:29.537842 microcode: Update skipped, already up-to-date
548 15:40:29.537918 CPU #4 initialized
549 15:40:29.541110 CPU #3 initialized
550 15:40:29.544280 CPU: vendor Intel device 806c1
551 15:40:29.547531 CPU: family 06, model 8c, stepping 01
552 15:40:29.550803 Clearing out pending MCEs
553 15:40:29.550883 Setting up local APIC...
554 15:40:29.554419 apic_id: 0x01 done.
555 15:40:29.557581 microcode: Update skipped, already up-to-date
556 15:40:29.561276 CPU #1 initialized
557 15:40:29.564534 bsp_do_flight_plan done after 455 msecs.
558 15:40:29.567842 CPU: frequency set to 4000 MHz
559 15:40:29.571015 Enabling SMIs.
560 15:40:29.577584 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
561 15:40:29.592811 SATAXPCIE1 indicates PCIe NVMe is present
562 15:40:29.596059 Probing TPM: done!
563 15:40:29.599659 Connected to device vid:did:rid of 1ae0:0028:00
564 15:40:29.609942 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
565 15:40:29.613542 Initialized TPM device CR50 revision 0
566 15:40:29.616760 Enabling S0i3.4
567 15:40:29.623455 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
568 15:40:29.626607 Found a VBT of 8704 bytes after decompression
569 15:40:29.633558 cse_lite: CSE RO boot. HybridStorageMode disabled
570 15:40:29.640057 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
571 15:40:29.716105 FSPS returned 0
572 15:40:29.719814 Executing Phase 1 of FspMultiPhaseSiInit
573 15:40:29.729507 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
574 15:40:29.732749 port C0 DISC req: usage 1 usb3 1 usb2 5
575 15:40:29.736036 Raw Buffer output 0 00000511
576 15:40:29.739332 Raw Buffer output 1 00000000
577 15:40:29.743132 pmc_send_ipc_cmd succeeded
578 15:40:29.749898 port C1 DISC req: usage 1 usb3 2 usb2 3
579 15:40:29.749978 Raw Buffer output 0 00000321
580 15:40:29.753185 Raw Buffer output 1 00000000
581 15:40:29.757272 pmc_send_ipc_cmd succeeded
582 15:40:29.762729 Detected 4 core, 8 thread CPU.
583 15:40:29.766060 Detected 4 core, 8 thread CPU.
584 15:40:30.000181 Display FSP Version Info HOB
585 15:40:30.003796 Reference Code - CPU = a.0.4c.31
586 15:40:30.006938 uCode Version = 0.0.0.86
587 15:40:30.010173 TXT ACM version = ff.ff.ff.ffff
588 15:40:30.013723 Reference Code - ME = a.0.4c.31
589 15:40:30.016995 MEBx version = 0.0.0.0
590 15:40:30.020263 ME Firmware Version = Consumer SKU
591 15:40:30.023547 Reference Code - PCH = a.0.4c.31
592 15:40:30.027136 PCH-CRID Status = Disabled
593 15:40:30.030318 PCH-CRID Original Value = ff.ff.ff.ffff
594 15:40:30.033667 PCH-CRID New Value = ff.ff.ff.ffff
595 15:40:30.036980 OPROM - RST - RAID = ff.ff.ff.ffff
596 15:40:30.040319 PCH Hsio Version = 4.0.0.0
597 15:40:30.043485 Reference Code - SA - System Agent = a.0.4c.31
598 15:40:30.047123 Reference Code - MRC = 2.0.0.1
599 15:40:30.050319 SA - PCIe Version = a.0.4c.31
600 15:40:30.053645 SA-CRID Status = Disabled
601 15:40:30.056917 SA-CRID Original Value = 0.0.0.1
602 15:40:30.060520 SA-CRID New Value = 0.0.0.1
603 15:40:30.064007 OPROM - VBIOS = ff.ff.ff.ffff
604 15:40:30.067227 IO Manageability Engine FW Version = 11.1.4.0
605 15:40:30.070452 PHY Build Version = 0.0.0.e0
606 15:40:30.073710 Thunderbolt(TM) FW Version = 0.0.0.0
607 15:40:30.080201 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
608 15:40:30.083875 ITSS IRQ Polarities Before:
609 15:40:30.083989 IPC0: 0xffffffff
610 15:40:30.087024 IPC1: 0xffffffff
611 15:40:30.087108 IPC2: 0xffffffff
612 15:40:30.090132 IPC3: 0xffffffff
613 15:40:30.093615 ITSS IRQ Polarities After:
614 15:40:30.093700 IPC0: 0xffffffff
615 15:40:30.096790 IPC1: 0xffffffff
616 15:40:30.096874 IPC2: 0xffffffff
617 15:40:30.100457 IPC3: 0xffffffff
618 15:40:30.103606 Found PCIe Root Port #9 at PCI: 00:1d.0.
619 15:40:30.116793 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
620 15:40:30.126823 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
621 15:40:30.139848 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
622 15:40:30.146956 BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
623 15:40:30.147042 Enumerating buses...
624 15:40:30.153267 Show all devs... Before device enumeration.
625 15:40:30.153351 Root Device: enabled 1
626 15:40:30.156590 DOMAIN: 0000: enabled 1
627 15:40:30.159832 CPU_CLUSTER: 0: enabled 1
628 15:40:30.163350 PCI: 00:00.0: enabled 1
629 15:40:30.163435 PCI: 00:02.0: enabled 1
630 15:40:30.166653 PCI: 00:04.0: enabled 1
631 15:40:30.169832 PCI: 00:05.0: enabled 1
632 15:40:30.173489 PCI: 00:06.0: enabled 0
633 15:40:30.173573 PCI: 00:07.0: enabled 0
634 15:40:30.176549 PCI: 00:07.1: enabled 0
635 15:40:30.179728 PCI: 00:07.2: enabled 0
636 15:40:30.183010 PCI: 00:07.3: enabled 0
637 15:40:30.183094 PCI: 00:08.0: enabled 1
638 15:40:30.186718 PCI: 00:09.0: enabled 0
639 15:40:30.190103 PCI: 00:0a.0: enabled 0
640 15:40:30.193239 PCI: 00:0d.0: enabled 1
641 15:40:30.193323 PCI: 00:0d.1: enabled 0
642 15:40:30.196593 PCI: 00:0d.2: enabled 0
643 15:40:30.199620 PCI: 00:0d.3: enabled 0
644 15:40:30.199705 PCI: 00:0e.0: enabled 0
645 15:40:30.203285 PCI: 00:10.2: enabled 1
646 15:40:30.206537 PCI: 00:10.6: enabled 0
647 15:40:30.209600 PCI: 00:10.7: enabled 0
648 15:40:30.209687 PCI: 00:12.0: enabled 0
649 15:40:30.213171 PCI: 00:12.6: enabled 0
650 15:40:30.216530 PCI: 00:13.0: enabled 0
651 15:40:30.219768 PCI: 00:14.0: enabled 1
652 15:40:30.219853 PCI: 00:14.1: enabled 0
653 15:40:30.223335 PCI: 00:14.2: enabled 1
654 15:40:30.226670 PCI: 00:14.3: enabled 1
655 15:40:30.229918 PCI: 00:15.0: enabled 1
656 15:40:30.230003 PCI: 00:15.1: enabled 1
657 15:40:30.233114 PCI: 00:15.2: enabled 1
658 15:40:30.236346 PCI: 00:15.3: enabled 1
659 15:40:30.239577 PCI: 00:16.0: enabled 1
660 15:40:30.239661 PCI: 00:16.1: enabled 0
661 15:40:30.242955 PCI: 00:16.2: enabled 0
662 15:40:30.246539 PCI: 00:16.3: enabled 0
663 15:40:30.246623 PCI: 00:16.4: enabled 0
664 15:40:30.249939 PCI: 00:16.5: enabled 0
665 15:40:30.253094 PCI: 00:17.0: enabled 1
666 15:40:30.256209 PCI: 00:19.0: enabled 0
667 15:40:30.256293 PCI: 00:19.1: enabled 1
668 15:40:30.259501 PCI: 00:19.2: enabled 0
669 15:40:30.263234 PCI: 00:1c.0: enabled 1
670 15:40:30.266391 PCI: 00:1c.1: enabled 0
671 15:40:30.266495 PCI: 00:1c.2: enabled 0
672 15:40:30.269617 PCI: 00:1c.3: enabled 0
673 15:40:30.272888 PCI: 00:1c.4: enabled 0
674 15:40:30.276102 PCI: 00:1c.5: enabled 0
675 15:40:30.276187 PCI: 00:1c.6: enabled 1
676 15:40:30.279408 PCI: 00:1c.7: enabled 0
677 15:40:30.283129 PCI: 00:1d.0: enabled 1
678 15:40:30.283213 PCI: 00:1d.1: enabled 0
679 15:40:30.286056 PCI: 00:1d.2: enabled 1
680 15:40:30.289707 PCI: 00:1d.3: enabled 0
681 15:40:30.292951 PCI: 00:1e.0: enabled 1
682 15:40:30.293035 PCI: 00:1e.1: enabled 0
683 15:40:30.296122 PCI: 00:1e.2: enabled 1
684 15:40:30.299526 PCI: 00:1e.3: enabled 1
685 15:40:30.303119 PCI: 00:1f.0: enabled 1
686 15:40:30.303204 PCI: 00:1f.1: enabled 0
687 15:40:30.306237 PCI: 00:1f.2: enabled 1
688 15:40:30.309429 PCI: 00:1f.3: enabled 1
689 15:40:30.313088 PCI: 00:1f.4: enabled 0
690 15:40:30.313173 PCI: 00:1f.5: enabled 1
691 15:40:30.316038 PCI: 00:1f.6: enabled 0
692 15:40:30.319535 PCI: 00:1f.7: enabled 0
693 15:40:30.319620 APIC: 00: enabled 1
694 15:40:30.322664 GENERIC: 0.0: enabled 1
695 15:40:30.326272 GENERIC: 0.0: enabled 1
696 15:40:30.329658 GENERIC: 1.0: enabled 1
697 15:40:30.329742 GENERIC: 0.0: enabled 1
698 15:40:30.332873 GENERIC: 1.0: enabled 1
699 15:40:30.335998 USB0 port 0: enabled 1
700 15:40:30.336083 GENERIC: 0.0: enabled 1
701 15:40:30.339724 USB0 port 0: enabled 1
702 15:40:30.342962 GENERIC: 0.0: enabled 1
703 15:40:30.346231 I2C: 00:1a: enabled 1
704 15:40:30.346315 I2C: 00:31: enabled 1
705 15:40:30.349486 I2C: 00:32: enabled 1
706 15:40:30.352786 I2C: 00:10: enabled 1
707 15:40:30.352870 I2C: 00:15: enabled 1
708 15:40:30.356000 GENERIC: 0.0: enabled 0
709 15:40:30.359658 GENERIC: 1.0: enabled 0
710 15:40:30.362972 GENERIC: 0.0: enabled 1
711 15:40:30.363056 SPI: 00: enabled 1
712 15:40:30.366207 SPI: 00: enabled 1
713 15:40:30.366291 PNP: 0c09.0: enabled 1
714 15:40:30.369319 GENERIC: 0.0: enabled 1
715 15:40:30.372673 USB3 port 0: enabled 1
716 15:40:30.375836 USB3 port 1: enabled 1
717 15:40:30.375921 USB3 port 2: enabled 0
718 15:40:30.379467 USB3 port 3: enabled 0
719 15:40:30.382680 USB2 port 0: enabled 0
720 15:40:30.382785 USB2 port 1: enabled 1
721 15:40:30.385962 USB2 port 2: enabled 1
722 15:40:30.389123 USB2 port 3: enabled 0
723 15:40:30.389208 USB2 port 4: enabled 1
724 15:40:30.392882 USB2 port 5: enabled 0
725 15:40:30.396125 USB2 port 6: enabled 0
726 15:40:30.399072 USB2 port 7: enabled 0
727 15:40:30.399156 USB2 port 8: enabled 0
728 15:40:30.402755 USB2 port 9: enabled 0
729 15:40:30.405910 USB3 port 0: enabled 0
730 15:40:30.405993 USB3 port 1: enabled 1
731 15:40:30.409028 USB3 port 2: enabled 0
732 15:40:30.412317 USB3 port 3: enabled 0
733 15:40:30.415844 GENERIC: 0.0: enabled 1
734 15:40:30.415929 GENERIC: 1.0: enabled 1
735 15:40:30.419066 APIC: 01: enabled 1
736 15:40:30.422661 APIC: 03: enabled 1
737 15:40:30.422746 APIC: 05: enabled 1
738 15:40:30.425807 APIC: 07: enabled 1
739 15:40:30.425905 APIC: 06: enabled 1
740 15:40:30.429088 APIC: 02: enabled 1
741 15:40:30.432772 APIC: 04: enabled 1
742 15:40:30.432857 Compare with tree...
743 15:40:30.435866 Root Device: enabled 1
744 15:40:30.439003 DOMAIN: 0000: enabled 1
745 15:40:30.442644 PCI: 00:00.0: enabled 1
746 15:40:30.442729 PCI: 00:02.0: enabled 1
747 15:40:30.445583 PCI: 00:04.0: enabled 1
748 15:40:30.449155 GENERIC: 0.0: enabled 1
749 15:40:30.452460 PCI: 00:05.0: enabled 1
750 15:40:30.455547 PCI: 00:06.0: enabled 0
751 15:40:30.455632 PCI: 00:07.0: enabled 0
752 15:40:30.458821 GENERIC: 0.0: enabled 1
753 15:40:30.462454 PCI: 00:07.1: enabled 0
754 15:40:30.465813 GENERIC: 1.0: enabled 1
755 15:40:30.468872 PCI: 00:07.2: enabled 0
756 15:40:30.468956 GENERIC: 0.0: enabled 1
757 15:40:30.472541 PCI: 00:07.3: enabled 0
758 15:40:30.475574 GENERIC: 1.0: enabled 1
759 15:40:30.478868 PCI: 00:08.0: enabled 1
760 15:40:30.482450 PCI: 00:09.0: enabled 0
761 15:40:30.482535 PCI: 00:0a.0: enabled 0
762 15:40:30.485603 PCI: 00:0d.0: enabled 1
763 15:40:30.488875 USB0 port 0: enabled 1
764 15:40:30.492313 USB3 port 0: enabled 1
765 15:40:30.495515 USB3 port 1: enabled 1
766 15:40:30.495600 USB3 port 2: enabled 0
767 15:40:30.499035 USB3 port 3: enabled 0
768 15:40:30.502421 PCI: 00:0d.1: enabled 0
769 15:40:30.505606 PCI: 00:0d.2: enabled 0
770 15:40:30.508832 GENERIC: 0.0: enabled 1
771 15:40:30.508918 PCI: 00:0d.3: enabled 0
772 15:40:30.512384 PCI: 00:0e.0: enabled 0
773 15:40:30.515660 PCI: 00:10.2: enabled 1
774 15:40:30.519090 PCI: 00:10.6: enabled 0
775 15:40:30.522300 PCI: 00:10.7: enabled 0
776 15:40:30.522385 PCI: 00:12.0: enabled 0
777 15:40:30.525382 PCI: 00:12.6: enabled 0
778 15:40:30.529087 PCI: 00:13.0: enabled 0
779 15:40:30.532153 PCI: 00:14.0: enabled 1
780 15:40:30.535531 USB0 port 0: enabled 1
781 15:40:30.535615 USB2 port 0: enabled 0
782 15:40:30.538793 USB2 port 1: enabled 1
783 15:40:30.542364 USB2 port 2: enabled 1
784 15:40:30.545377 USB2 port 3: enabled 0
785 15:40:30.548599 USB2 port 4: enabled 1
786 15:40:30.552305 USB2 port 5: enabled 0
787 15:40:30.552391 USB2 port 6: enabled 0
788 15:40:30.555539 USB2 port 7: enabled 0
789 15:40:30.558673 USB2 port 8: enabled 0
790 15:40:30.561958 USB2 port 9: enabled 0
791 15:40:30.565540 USB3 port 0: enabled 0
792 15:40:30.568841 USB3 port 1: enabled 1
793 15:40:30.568956 USB3 port 2: enabled 0
794 15:40:30.571823 USB3 port 3: enabled 0
795 15:40:30.575609 PCI: 00:14.1: enabled 0
796 15:40:30.578857 PCI: 00:14.2: enabled 1
797 15:40:30.582235 PCI: 00:14.3: enabled 1
798 15:40:30.582320 GENERIC: 0.0: enabled 1
799 15:40:30.585395 PCI: 00:15.0: enabled 1
800 15:40:30.588571 I2C: 00:1a: enabled 1
801 15:40:30.591856 I2C: 00:31: enabled 1
802 15:40:30.591941 I2C: 00:32: enabled 1
803 15:40:30.595248 PCI: 00:15.1: enabled 1
804 15:40:30.598846 I2C: 00:10: enabled 1
805 15:40:30.601909 PCI: 00:15.2: enabled 1
806 15:40:30.605540 PCI: 00:15.3: enabled 1
807 15:40:30.605624 PCI: 00:16.0: enabled 1
808 15:40:30.608766 PCI: 00:16.1: enabled 0
809 15:40:30.612339 PCI: 00:16.2: enabled 0
810 15:40:30.616150 PCI: 00:16.3: enabled 0
811 15:40:30.616235 PCI: 00:16.4: enabled 0
812 15:40:30.619216 PCI: 00:16.5: enabled 0
813 15:40:30.623126 PCI: 00:17.0: enabled 1
814 15:40:30.626316 PCI: 00:19.0: enabled 0
815 15:40:30.626401 PCI: 00:19.1: enabled 1
816 15:40:30.629542 I2C: 00:15: enabled 1
817 15:40:30.633101 PCI: 00:19.2: enabled 0
818 15:40:30.636270 PCI: 00:1d.0: enabled 1
819 15:40:30.639600 GENERIC: 0.0: enabled 1
820 15:40:30.639684 PCI: 00:1e.0: enabled 1
821 15:40:30.643255 PCI: 00:1e.1: enabled 0
822 15:40:30.646430 PCI: 00:1e.2: enabled 1
823 15:40:30.649709 SPI: 00: enabled 1
824 15:40:30.649835 PCI: 00:1e.3: enabled 1
825 15:40:30.652868 SPI: 00: enabled 1
826 15:40:30.656193 PCI: 00:1f.0: enabled 1
827 15:40:30.707441 PNP: 0c09.0: enabled 1
828 15:40:30.707532 PCI: 00:1f.1: enabled 0
829 15:40:30.707600 PCI: 00:1f.2: enabled 1
830 15:40:30.707951 GENERIC: 0.0: enabled 1
831 15:40:30.708039 GENERIC: 0.0: enabled 1
832 15:40:30.708296 GENERIC: 1.0: enabled 1
833 15:40:30.708367 PCI: 00:1f.3: enabled 1
834 15:40:30.708432 PCI: 00:1f.4: enabled 0
835 15:40:30.708494 PCI: 00:1f.5: enabled 1
836 15:40:30.708551 PCI: 00:1f.6: enabled 0
837 15:40:30.708802 PCI: 00:1f.7: enabled 0
838 15:40:30.708866 CPU_CLUSTER: 0: enabled 1
839 15:40:30.708925 APIC: 00: enabled 1
840 15:40:30.708985 APIC: 01: enabled 1
841 15:40:30.709047 APIC: 03: enabled 1
842 15:40:30.709103 APIC: 05: enabled 1
843 15:40:30.709159 APIC: 07: enabled 1
844 15:40:30.709214 APIC: 06: enabled 1
845 15:40:30.709270 APIC: 02: enabled 1
846 15:40:30.709325 APIC: 04: enabled 1
847 15:40:30.758438 Root Device scanning...
848 15:40:30.758531 scan_static_bus for Root Device
849 15:40:30.758599 DOMAIN: 0000 enabled
850 15:40:30.758861 CPU_CLUSTER: 0 enabled
851 15:40:30.758930 DOMAIN: 0000 scanning...
852 15:40:30.758991 PCI: pci_scan_bus for bus 00
853 15:40:30.759049 PCI: 00:00.0 [8086/0000] ops
854 15:40:30.759105 PCI: 00:00.0 [8086/9a12] enabled
855 15:40:30.759163 PCI: 00:02.0 [8086/0000] bus ops
856 15:40:30.759219 PCI: 00:02.0 [8086/9a40] enabled
857 15:40:30.759275 PCI: 00:04.0 [8086/0000] bus ops
858 15:40:30.759516 PCI: 00:04.0 [8086/9a03] enabled
859 15:40:30.759577 PCI: 00:05.0 [8086/9a19] enabled
860 15:40:30.759632 PCI: 00:07.0 [0000/0000] hidden
861 15:40:30.759687 PCI: 00:08.0 [8086/9a11] enabled
862 15:40:30.759742 PCI: 00:0a.0 [8086/9a0d] disabled
863 15:40:30.759796 PCI: 00:0d.0 [8086/0000] bus ops
864 15:40:30.808095 PCI: 00:0d.0 [8086/9a13] enabled
865 15:40:30.808381 PCI: 00:14.0 [8086/0000] bus ops
866 15:40:30.808456 PCI: 00:14.0 [8086/a0ed] enabled
867 15:40:30.808522 PCI: 00:14.2 [8086/a0ef] enabled
868 15:40:30.808583 PCI: 00:14.3 [8086/0000] bus ops
869 15:40:30.808832 PCI: 00:14.3 [8086/a0f0] enabled
870 15:40:30.808898 PCI: 00:15.0 [8086/0000] bus ops
871 15:40:30.808958 PCI: 00:15.0 [8086/a0e8] enabled
872 15:40:30.809019 PCI: 00:15.1 [8086/0000] bus ops
873 15:40:30.809080 PCI: 00:15.1 [8086/a0e9] enabled
874 15:40:30.809139 PCI: 00:15.2 [8086/0000] bus ops
875 15:40:30.809195 PCI: 00:15.2 [8086/a0ea] enabled
876 15:40:30.809251 PCI: 00:15.3 [8086/0000] bus ops
877 15:40:30.809496 PCI: 00:15.3 [8086/a0eb] enabled
878 15:40:30.809561 PCI: 00:16.0 [8086/0000] ops
879 15:40:30.812219 PCI: 00:16.0 [8086/a0e0] enabled
880 15:40:30.818694 PCI: Static device PCI: 00:17.0 not found, disabling it.
881 15:40:30.822290 PCI: 00:19.0 [8086/0000] bus ops
882 15:40:30.825476 PCI: 00:19.0 [8086/a0c5] disabled
883 15:40:30.828981 PCI: 00:19.1 [8086/0000] bus ops
884 15:40:30.832055 PCI: 00:19.1 [8086/a0c6] enabled
885 15:40:30.835572 PCI: 00:1d.0 [8086/0000] bus ops
886 15:40:30.838761 PCI: 00:1d.0 [8086/a0b0] enabled
887 15:40:30.842282 PCI: 00:1e.0 [8086/0000] ops
888 15:40:30.845380 PCI: 00:1e.0 [8086/a0a8] enabled
889 15:40:30.849067 PCI: 00:1e.2 [8086/0000] bus ops
890 15:40:30.852212 PCI: 00:1e.2 [8086/a0aa] enabled
891 15:40:30.855473 PCI: 00:1e.3 [8086/0000] bus ops
892 15:40:30.859190 PCI: 00:1e.3 [8086/a0ab] enabled
893 15:40:30.862314 PCI: 00:1f.0 [8086/0000] bus ops
894 15:40:30.865726 PCI: 00:1f.0 [8086/a087] enabled
895 15:40:30.865820 RTC Init
896 15:40:30.868730 Set power on after power failure.
897 15:40:30.871978 Disabling Deep S3
898 15:40:30.872063 Disabling Deep S3
899 15:40:30.875765 Disabling Deep S4
900 15:40:30.878872 Disabling Deep S4
901 15:40:30.878956 Disabling Deep S5
902 15:40:30.882057 Disabling Deep S5
903 15:40:30.885321 PCI: 00:1f.2 [0000/0000] hidden
904 15:40:30.888922 PCI: 00:1f.3 [8086/0000] bus ops
905 15:40:30.892283 PCI: 00:1f.3 [8086/a0c8] enabled
906 15:40:30.895267 PCI: 00:1f.5 [8086/0000] bus ops
907 15:40:30.898987 PCI: 00:1f.5 [8086/a0a4] enabled
908 15:40:30.902168 PCI: Leftover static devices:
909 15:40:30.902253 PCI: 00:10.2
910 15:40:30.902320 PCI: 00:10.6
911 15:40:30.905286 PCI: 00:10.7
912 15:40:30.905371 PCI: 00:06.0
913 15:40:30.908548 PCI: 00:07.1
914 15:40:30.908632 PCI: 00:07.2
915 15:40:30.908698 PCI: 00:07.3
916 15:40:30.911976 PCI: 00:09.0
917 15:40:30.912061 PCI: 00:0d.1
918 15:40:30.915635 PCI: 00:0d.2
919 15:40:30.915719 PCI: 00:0d.3
920 15:40:30.918776 PCI: 00:0e.0
921 15:40:30.918861 PCI: 00:12.0
922 15:40:30.918927 PCI: 00:12.6
923 15:40:30.922067 PCI: 00:13.0
924 15:40:30.922152 PCI: 00:14.1
925 15:40:30.925697 PCI: 00:16.1
926 15:40:30.925804 PCI: 00:16.2
927 15:40:30.925887 PCI: 00:16.3
928 15:40:30.928663 PCI: 00:16.4
929 15:40:30.928748 PCI: 00:16.5
930 15:40:30.931797 PCI: 00:17.0
931 15:40:30.931888 PCI: 00:19.2
932 15:40:30.931954 PCI: 00:1e.1
933 15:40:30.935423 PCI: 00:1f.1
934 15:40:30.935508 PCI: 00:1f.4
935 15:40:30.939086 PCI: 00:1f.6
936 15:40:30.939175 PCI: 00:1f.7
937 15:40:30.942241 PCI: Check your devicetree.cb.
938 15:40:30.945514 PCI: 00:02.0 scanning...
939 15:40:30.948731 scan_generic_bus for PCI: 00:02.0
940 15:40:30.951902 scan_generic_bus for PCI: 00:02.0 done
941 15:40:30.958863 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
942 15:40:30.958949 PCI: 00:04.0 scanning...
943 15:40:30.962114 scan_generic_bus for PCI: 00:04.0
944 15:40:30.965441 GENERIC: 0.0 enabled
945 15:40:30.971940 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
946 15:40:30.975137 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
947 15:40:30.978867 PCI: 00:0d.0 scanning...
948 15:40:30.982116 scan_static_bus for PCI: 00:0d.0
949 15:40:30.985217 USB0 port 0 enabled
950 15:40:30.985302 USB0 port 0 scanning...
951 15:40:30.988842 scan_static_bus for USB0 port 0
952 15:40:30.992173 USB3 port 0 enabled
953 15:40:30.995256 USB3 port 1 enabled
954 15:40:30.995340 USB3 port 2 disabled
955 15:40:30.998911 USB3 port 3 disabled
956 15:40:31.002189 USB3 port 0 scanning...
957 15:40:31.005357 scan_static_bus for USB3 port 0
958 15:40:31.008535 scan_static_bus for USB3 port 0 done
959 15:40:31.012089 scan_bus: bus USB3 port 0 finished in 6 msecs
960 15:40:31.015958 USB3 port 1 scanning...
961 15:40:31.018684 scan_static_bus for USB3 port 1
962 15:40:31.022076 scan_static_bus for USB3 port 1 done
963 15:40:31.028644 scan_bus: bus USB3 port 1 finished in 6 msecs
964 15:40:31.031833 scan_static_bus for USB0 port 0 done
965 15:40:31.035102 scan_bus: bus USB0 port 0 finished in 43 msecs
966 15:40:31.038755 scan_static_bus for PCI: 00:0d.0 done
967 15:40:31.045200 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
968 15:40:31.045286 PCI: 00:14.0 scanning...
969 15:40:31.048489 scan_static_bus for PCI: 00:14.0
970 15:40:31.052128 USB0 port 0 enabled
971 15:40:31.055387 USB0 port 0 scanning...
972 15:40:31.058605 scan_static_bus for USB0 port 0
973 15:40:31.061728 USB2 port 0 disabled
974 15:40:31.061820 USB2 port 1 enabled
975 15:40:31.065069 USB2 port 2 enabled
976 15:40:31.065154 USB2 port 3 disabled
977 15:40:31.068306 USB2 port 4 enabled
978 15:40:31.071916 USB2 port 5 disabled
979 15:40:31.072009 USB2 port 6 disabled
980 15:40:31.075217 USB2 port 7 disabled
981 15:40:31.078378 USB2 port 8 disabled
982 15:40:31.078463 USB2 port 9 disabled
983 15:40:31.081574 USB3 port 0 disabled
984 15:40:31.085243 USB3 port 1 enabled
985 15:40:31.085327 USB3 port 2 disabled
986 15:40:31.088361 USB3 port 3 disabled
987 15:40:31.091581 USB2 port 1 scanning...
988 15:40:31.094787 scan_static_bus for USB2 port 1
989 15:40:31.098363 scan_static_bus for USB2 port 1 done
990 15:40:31.101694 scan_bus: bus USB2 port 1 finished in 6 msecs
991 15:40:31.104874 USB2 port 2 scanning...
992 15:40:31.108573 scan_static_bus for USB2 port 2
993 15:40:31.111801 scan_static_bus for USB2 port 2 done
994 15:40:31.114813 scan_bus: bus USB2 port 2 finished in 6 msecs
995 15:40:31.118406 USB2 port 4 scanning...
996 15:40:31.121803 scan_static_bus for USB2 port 4
997 15:40:31.124755 scan_static_bus for USB2 port 4 done
998 15:40:31.131613 scan_bus: bus USB2 port 4 finished in 6 msecs
999 15:40:31.131699 USB3 port 1 scanning...
1000 15:40:31.134769 scan_static_bus for USB3 port 1
1001 15:40:31.141359 scan_static_bus for USB3 port 1 done
1002 15:40:31.144843 scan_bus: bus USB3 port 1 finished in 6 msecs
1003 15:40:31.148010 scan_static_bus for USB0 port 0 done
1004 15:40:31.151687 scan_bus: bus USB0 port 0 finished in 93 msecs
1005 15:40:31.158001 scan_static_bus for PCI: 00:14.0 done
1006 15:40:31.161282 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1007 15:40:31.164525 PCI: 00:14.3 scanning...
1008 15:40:31.168291 scan_static_bus for PCI: 00:14.3
1009 15:40:31.171615 GENERIC: 0.0 enabled
1010 15:40:31.174870 scan_static_bus for PCI: 00:14.3 done
1011 15:40:31.178177 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1012 15:40:31.181541 PCI: 00:15.0 scanning...
1013 15:40:31.184611 scan_static_bus for PCI: 00:15.0
1014 15:40:31.187845 I2C: 00:1a enabled
1015 15:40:31.187930 I2C: 00:31 enabled
1016 15:40:31.191610 I2C: 00:32 enabled
1017 15:40:31.195595 scan_static_bus for PCI: 00:15.0 done
1018 15:40:31.198743 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1019 15:40:31.202100 PCI: 00:15.1 scanning...
1020 15:40:31.205690 scan_static_bus for PCI: 00:15.1
1021 15:40:31.205781 I2C: 00:10 enabled
1022 15:40:31.212050 scan_static_bus for PCI: 00:15.1 done
1023 15:40:31.215195 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1024 15:40:31.218940 PCI: 00:15.2 scanning...
1025 15:40:31.221959 scan_static_bus for PCI: 00:15.2
1026 15:40:31.225065 scan_static_bus for PCI: 00:15.2 done
1027 15:40:31.228796 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1028 15:40:31.231950 PCI: 00:15.3 scanning...
1029 15:40:31.235015 scan_static_bus for PCI: 00:15.3
1030 15:40:31.238579 scan_static_bus for PCI: 00:15.3 done
1031 15:40:31.245328 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1032 15:40:31.248576 PCI: 00:19.1 scanning...
1033 15:40:31.251808 scan_static_bus for PCI: 00:19.1
1034 15:40:31.251897 I2C: 00:15 enabled
1035 15:40:31.254993 scan_static_bus for PCI: 00:19.1 done
1036 15:40:31.261751 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1037 15:40:31.265074 PCI: 00:1d.0 scanning...
1038 15:40:31.268258 do_pci_scan_bridge for PCI: 00:1d.0
1039 15:40:31.271419 PCI: pci_scan_bus for bus 01
1040 15:40:31.274719 PCI: 01:00.0 [1c5c/174a] enabled
1041 15:40:31.274805 GENERIC: 0.0 enabled
1042 15:40:31.281305 Enabling Common Clock Configuration
1043 15:40:31.284829 L1 Sub-State supported from root port 29
1044 15:40:31.288057 L1 Sub-State Support = 0xf
1045 15:40:31.291220 CommonModeRestoreTime = 0x28
1046 15:40:31.294831 Power On Value = 0x16, Power On Scale = 0x0
1047 15:40:31.294916 ASPM: Enabled L1
1048 15:40:31.301095 PCIe: Max_Payload_Size adjusted to 128
1049 15:40:31.304718 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1050 15:40:31.307529 PCI: 00:1e.2 scanning...
1051 15:40:31.311203 scan_generic_bus for PCI: 00:1e.2
1052 15:40:31.314319 SPI: 00 enabled
1053 15:40:31.317502 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1054 15:40:31.324225 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1055 15:40:31.327744 PCI: 00:1e.3 scanning...
1056 15:40:31.331060 scan_generic_bus for PCI: 00:1e.3
1057 15:40:31.331144 SPI: 00 enabled
1058 15:40:31.337341 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1059 15:40:31.340666 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1060 15:40:31.344171 PCI: 00:1f.0 scanning...
1061 15:40:31.347252 scan_static_bus for PCI: 00:1f.0
1062 15:40:31.350533 PNP: 0c09.0 enabled
1063 15:40:31.354200 PNP: 0c09.0 scanning...
1064 15:40:31.357276 scan_static_bus for PNP: 0c09.0
1065 15:40:31.360543 scan_static_bus for PNP: 0c09.0 done
1066 15:40:31.363801 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1067 15:40:31.367510 scan_static_bus for PCI: 00:1f.0 done
1068 15:40:31.373995 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1069 15:40:31.377259 PCI: 00:1f.2 scanning...
1070 15:40:31.380427 scan_static_bus for PCI: 00:1f.2
1071 15:40:31.380512 GENERIC: 0.0 enabled
1072 15:40:31.383602 GENERIC: 0.0 scanning...
1073 15:40:31.387320 scan_static_bus for GENERIC: 0.0
1074 15:40:31.390616 GENERIC: 0.0 enabled
1075 15:40:31.390701 GENERIC: 1.0 enabled
1076 15:40:31.397011 scan_static_bus for GENERIC: 0.0 done
1077 15:40:31.400044 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1078 15:40:31.403683 scan_static_bus for PCI: 00:1f.2 done
1079 15:40:31.410251 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1080 15:40:31.410335 PCI: 00:1f.3 scanning...
1081 15:40:31.413577 scan_static_bus for PCI: 00:1f.3
1082 15:40:31.420296 scan_static_bus for PCI: 00:1f.3 done
1083 15:40:31.423460 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1084 15:40:31.426754 PCI: 00:1f.5 scanning...
1085 15:40:31.430289 scan_generic_bus for PCI: 00:1f.5
1086 15:40:31.433588 scan_generic_bus for PCI: 00:1f.5 done
1087 15:40:31.436692 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1088 15:40:31.443505 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1089 15:40:31.446597 scan_static_bus for Root Device done
1090 15:40:31.453165 scan_bus: bus Root Device finished in 737 msecs
1091 15:40:31.453249 done
1092 15:40:31.460032 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1093 15:40:31.463281 Chrome EC: UHEPI supported
1094 15:40:31.469791 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1095 15:40:31.473543 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1096 15:40:31.479931 SPI flash protection: WPSW=0 SRP0=0
1097 15:40:31.483244 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1098 15:40:31.490159 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1099 15:40:31.493315 found VGA at PCI: 00:02.0
1100 15:40:31.496606 Setting up VGA for PCI: 00:02.0
1101 15:40:31.499854 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1102 15:40:31.506808 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1103 15:40:31.506893 Allocating resources...
1104 15:40:31.509843 Reading resources...
1105 15:40:31.513171 Root Device read_resources bus 0 link: 0
1106 15:40:31.519591 DOMAIN: 0000 read_resources bus 0 link: 0
1107 15:40:31.523094 PCI: 00:04.0 read_resources bus 1 link: 0
1108 15:40:31.529768 PCI: 00:04.0 read_resources bus 1 link: 0 done
1109 15:40:31.533078 PCI: 00:0d.0 read_resources bus 0 link: 0
1110 15:40:31.536403 USB0 port 0 read_resources bus 0 link: 0
1111 15:40:31.543676 USB0 port 0 read_resources bus 0 link: 0 done
1112 15:40:31.546745 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1113 15:40:31.553789 PCI: 00:14.0 read_resources bus 0 link: 0
1114 15:40:31.556539 USB0 port 0 read_resources bus 0 link: 0
1115 15:40:31.563272 USB0 port 0 read_resources bus 0 link: 0 done
1116 15:40:31.567053 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 15:40:31.573362 PCI: 00:14.3 read_resources bus 0 link: 0
1118 15:40:31.576529 PCI: 00:14.3 read_resources bus 0 link: 0 done
1119 15:40:31.583084 PCI: 00:15.0 read_resources bus 0 link: 0
1120 15:40:31.586230 PCI: 00:15.0 read_resources bus 0 link: 0 done
1121 15:40:31.593132 PCI: 00:15.1 read_resources bus 0 link: 0
1122 15:40:31.596441 PCI: 00:15.1 read_resources bus 0 link: 0 done
1123 15:40:31.603465 PCI: 00:19.1 read_resources bus 0 link: 0
1124 15:40:31.607097 PCI: 00:19.1 read_resources bus 0 link: 0 done
1125 15:40:31.613415 PCI: 00:1d.0 read_resources bus 1 link: 0
1126 15:40:31.616706 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1127 15:40:31.623581 PCI: 00:1e.2 read_resources bus 2 link: 0
1128 15:40:31.627130 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1129 15:40:31.633737 PCI: 00:1e.3 read_resources bus 3 link: 0
1130 15:40:31.637018 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1131 15:40:31.643790 PCI: 00:1f.0 read_resources bus 0 link: 0
1132 15:40:31.646953 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1133 15:40:31.650429 PCI: 00:1f.2 read_resources bus 0 link: 0
1134 15:40:31.657066 GENERIC: 0.0 read_resources bus 0 link: 0
1135 15:40:31.660346 GENERIC: 0.0 read_resources bus 0 link: 0 done
1136 15:40:31.667109 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1137 15:40:31.673653 DOMAIN: 0000 read_resources bus 0 link: 0 done
1138 15:40:31.676818 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1139 15:40:31.683746 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1140 15:40:31.687054 Root Device read_resources bus 0 link: 0 done
1141 15:40:31.690346 Done reading resources.
1142 15:40:31.693570 Show resources in subtree (Root Device)...After reading.
1143 15:40:31.700041 Root Device child on link 0 DOMAIN: 0000
1144 15:40:31.703346 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 15:40:31.713418 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 15:40:31.723735 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1147 15:40:31.723822 PCI: 00:00.0
1148 15:40:31.733253 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 15:40:31.743151 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 15:40:31.753102 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 15:40:31.763076 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 15:40:31.773304 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 15:40:31.779919 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 15:40:31.789572 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 15:40:31.799462 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 15:40:31.809533 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 15:40:31.819783 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1158 15:40:31.826454 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1159 15:40:31.836260 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1160 15:40:31.846281 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1161 15:40:31.856127 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1162 15:40:31.866177 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1163 15:40:31.875815 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1164 15:40:31.885756 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 15:40:31.892593 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 15:40:31.902349 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 15:40:31.912408 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 15:40:31.915613 PCI: 00:02.0
1169 15:40:31.925689 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 15:40:31.935715 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 15:40:31.942433 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 15:40:31.948771 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 15:40:31.958754 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 15:40:31.958841 GENERIC: 0.0
1175 15:40:31.962130 PCI: 00:05.0
1176 15:40:31.972317 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 15:40:31.975421 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 15:40:31.978725 GENERIC: 0.0
1179 15:40:31.978809 PCI: 00:08.0
1180 15:40:31.988620 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:40:31.992205 PCI: 00:0a.0
1182 15:40:31.995514 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 15:40:32.005364 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 15:40:32.008951 USB0 port 0 child on link 0 USB3 port 0
1185 15:40:32.012166 USB3 port 0
1186 15:40:32.012251 USB3 port 1
1187 15:40:32.015444 USB3 port 2
1188 15:40:32.018727 USB3 port 3
1189 15:40:32.021895 PCI: 00:14.0 child on link 0 USB0 port 0
1190 15:40:32.032002 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 15:40:32.035682 USB0 port 0 child on link 0 USB2 port 0
1192 15:40:32.038716 USB2 port 0
1193 15:40:32.038802 USB2 port 1
1194 15:40:32.042276 USB2 port 2
1195 15:40:32.042362 USB2 port 3
1196 15:40:32.045416 USB2 port 4
1197 15:40:32.045502 USB2 port 5
1198 15:40:32.048681 USB2 port 6
1199 15:40:32.048767 USB2 port 7
1200 15:40:32.052245 USB2 port 8
1201 15:40:32.052332 USB2 port 9
1202 15:40:32.055425 USB3 port 0
1203 15:40:32.058956 USB3 port 1
1204 15:40:32.059043 USB3 port 2
1205 15:40:32.061936 USB3 port 3
1206 15:40:32.062021 PCI: 00:14.2
1207 15:40:32.072271 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 15:40:32.081898 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 15:40:32.085232 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 15:40:32.095251 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 15:40:32.098483 GENERIC: 0.0
1212 15:40:32.102119 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 15:40:32.112007 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 15:40:32.115198 I2C: 00:1a
1215 15:40:32.115286 I2C: 00:31
1216 15:40:32.118294 I2C: 00:32
1217 15:40:32.121992 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 15:40:32.131751 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 15:40:32.131832 I2C: 00:10
1220 15:40:32.135124 PCI: 00:15.2
1221 15:40:32.145231 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:40:32.145328 PCI: 00:15.3
1223 15:40:32.154831 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 15:40:32.158365 PCI: 00:16.0
1225 15:40:32.168739 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 15:40:32.168833 PCI: 00:19.0
1227 15:40:32.174945 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 15:40:32.184826 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 15:40:32.184906 I2C: 00:15
1230 15:40:32.191807 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 15:40:32.198208 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 15:40:32.207925 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 15:40:32.218106 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 15:40:32.218197 GENERIC: 0.0
1235 15:40:32.221307 PCI: 01:00.0
1236 15:40:32.231556 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 15:40:32.241315 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 15:40:32.251005 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 15:40:32.251135 PCI: 00:1e.0
1240 15:40:32.261239 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 15:40:32.268120 PCI: 00:1e.2 child on link 0 SPI: 00
1242 15:40:32.277724 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 15:40:32.277844 SPI: 00
1244 15:40:32.281451 PCI: 00:1e.3 child on link 0 SPI: 00
1245 15:40:32.291093 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 15:40:32.294777 SPI: 00
1247 15:40:32.298008 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 15:40:32.304527 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 15:40:32.307706 PNP: 0c09.0
1250 15:40:32.317858 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 15:40:32.320915 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 15:40:32.331288 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 15:40:32.340765 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 15:40:32.344253 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 15:40:32.347914 GENERIC: 0.0
1256 15:40:32.347997 GENERIC: 1.0
1257 15:40:32.350919 PCI: 00:1f.3
1258 15:40:32.360847 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 15:40:32.370943 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 15:40:32.371028 PCI: 00:1f.5
1261 15:40:32.381050 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 15:40:32.384290 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 15:40:32.387606 APIC: 00
1264 15:40:32.387690 APIC: 01
1265 15:40:32.387755 APIC: 03
1266 15:40:32.391283 APIC: 05
1267 15:40:32.391366 APIC: 07
1268 15:40:32.391432 APIC: 06
1269 15:40:32.394513 APIC: 02
1270 15:40:32.394596 APIC: 04
1271 15:40:32.404579 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 15:40:32.407772 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 15:40:32.414119 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 15:40:32.421055 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 15:40:32.424197 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 15:40:32.427534 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 15:40:32.434038 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 15:40:32.440737 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 15:40:32.447615 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 15:40:32.454032 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 15:40:32.464233 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 15:40:32.467346 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 15:40:32.477492 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 15:40:32.483786 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 15:40:32.490650 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 15:40:32.493894 DOMAIN: 0000: Resource ranges:
1287 15:40:32.497171 * Base: 1000, Size: 800, Tag: 100
1288 15:40:32.500505 * Base: 1900, Size: e700, Tag: 100
1289 15:40:32.507430 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 15:40:32.513969 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 15:40:32.520406 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 15:40:32.527326 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 15:40:32.537385 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 15:40:32.543667 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 15:40:32.550293 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 15:40:32.560706 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 15:40:32.567136 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 15:40:32.573370 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 15:40:32.583738 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 15:40:32.590048 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 15:40:32.597004 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 15:40:32.606764 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 15:40:32.613629 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 15:40:32.620097 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 15:40:32.630115 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 15:40:32.636607 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 15:40:32.643531 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 15:40:32.653329 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 15:40:32.659949 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 15:40:32.666301 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 15:40:32.676423 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 15:40:32.683132 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 15:40:32.689893 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 15:40:32.693153 DOMAIN: 0000: Resource ranges:
1315 15:40:32.699535 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 15:40:32.702783 * Base: d0000000, Size: 28000000, Tag: 200
1317 15:40:32.706446 * Base: fa000000, Size: 1000000, Tag: 200
1318 15:40:32.709707 * Base: fb001000, Size: 2fff000, Tag: 200
1319 15:40:32.716314 * Base: fe010000, Size: 2e000, Tag: 200
1320 15:40:32.719650 * Base: fe03f000, Size: d41000, Tag: 200
1321 15:40:32.722795 * Base: fed88000, Size: 8000, Tag: 200
1322 15:40:32.726046 * Base: fed93000, Size: d000, Tag: 200
1323 15:40:32.732803 * Base: feda2000, Size: 1e000, Tag: 200
1324 15:40:32.736099 * Base: fede0000, Size: 1220000, Tag: 200
1325 15:40:32.739485 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 15:40:32.749420 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 15:40:32.756260 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 15:40:32.762446 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 15:40:32.769263 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 15:40:32.776068 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 15:40:32.782674 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 15:40:32.789051 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 15:40:32.795994 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 15:40:32.802649 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 15:40:32.808955 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 15:40:32.816052 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 15:40:32.822438 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 15:40:32.828916 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 15:40:32.835920 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 15:40:32.842325 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 15:40:32.848866 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 15:40:32.855740 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 15:40:32.861993 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 15:40:32.868664 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 15:40:32.875418 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 15:40:32.882365 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 15:40:32.888649 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 15:40:32.895321 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 15:40:32.902039 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 15:40:32.905335 PCI: 00:1d.0: Resource ranges:
1351 15:40:32.908663 * Base: 7fc00000, Size: 100000, Tag: 200
1352 15:40:32.915096 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 15:40:32.921999 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 15:40:32.928476 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 15:40:32.938501 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 15:40:32.945072 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 15:40:32.948228 Root Device assign_resources, bus 0 link: 0
1358 15:40:32.954965 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 15:40:32.961763 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 15:40:32.971643 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 15:40:32.978198 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 15:40:32.988091 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 15:40:32.991743 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 15:40:32.994887 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 15:40:33.004768 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 15:40:33.011604 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 15:40:33.021835 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 15:40:33.024906 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 15:40:33.031307 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 15:40:33.038182 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 15:40:33.044787 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 15:40:33.048003 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 15:40:33.054661 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 15:40:33.064871 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 15:40:33.071407 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 15:40:33.077749 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 15:40:33.081026 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 15:40:33.091049 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 15:40:33.094328 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 15:40:33.097449 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 15:40:33.107686 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 15:40:33.110880 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 15:40:33.117825 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 15:40:33.124237 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 15:40:33.133771 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 15:40:33.140609 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 15:40:33.150845 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 15:40:33.153906 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 15:40:33.157442 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 15:40:33.167390 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 15:40:33.177603 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 15:40:33.187276 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 15:40:33.190578 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 15:40:33.197408 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 15:40:33.207173 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 15:40:33.213723 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 15:40:33.220567 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 15:40:33.227133 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 15:40:33.230340 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 15:40:33.237259 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 15:40:33.244051 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 15:40:33.250427 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 15:40:33.253628 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 15:40:33.260558 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 15:40:33.263687 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 15:40:33.267169 LPC: Trying to open IO window from 800 size 1ff
1407 15:40:33.277725 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 15:40:33.284133 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 15:40:33.294001 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 15:40:33.297245 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 15:40:33.304051 Root Device assign_resources, bus 0 link: 0
1412 15:40:33.304213 Done setting resources.
1413 15:40:33.310414 Show resources in subtree (Root Device)...After assigning values.
1414 15:40:33.317394 Root Device child on link 0 DOMAIN: 0000
1415 15:40:33.320691 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 15:40:33.330315 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 15:40:33.340604 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 15:40:33.340795 PCI: 00:00.0
1419 15:40:33.350374 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 15:40:33.360518 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 15:40:33.369975 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 15:40:33.380148 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 15:40:33.386873 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 15:40:33.396550 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 15:40:33.406766 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 15:40:33.416356 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 15:40:33.426167 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 15:40:33.435899 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 15:40:33.442465 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 15:40:33.452510 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 15:40:33.462707 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 15:40:33.472612 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 15:40:33.482426 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 15:40:33.492531 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 15:40:33.502197 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 15:40:33.509075 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 15:40:33.518941 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 15:40:33.529039 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 15:40:33.532304 PCI: 00:02.0
1440 15:40:33.542379 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 15:40:33.551925 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 15:40:33.561709 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 15:40:33.565308 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 15:40:33.575249 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 15:40:33.578425 GENERIC: 0.0
1446 15:40:33.578509 PCI: 00:05.0
1447 15:40:33.592009 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 15:40:33.594831 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 15:40:33.594914 GENERIC: 0.0
1450 15:40:33.598511 PCI: 00:08.0
1451 15:40:33.608602 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1452 15:40:33.611968 PCI: 00:0a.0
1453 15:40:33.615143 PCI: 00:0d.0 child on link 0 USB0 port 0
1454 15:40:33.625295 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1455 15:40:33.628230 USB0 port 0 child on link 0 USB3 port 0
1456 15:40:33.631843 USB3 port 0
1457 15:40:33.631965 USB3 port 1
1458 15:40:33.635292 USB3 port 2
1459 15:40:33.638327 USB3 port 3
1460 15:40:33.641855 PCI: 00:14.0 child on link 0 USB0 port 0
1461 15:40:33.651923 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1462 15:40:33.654841 USB0 port 0 child on link 0 USB2 port 0
1463 15:40:33.658141 USB2 port 0
1464 15:40:33.658245 USB2 port 1
1465 15:40:33.661844 USB2 port 2
1466 15:40:33.661957 USB2 port 3
1467 15:40:33.664865 USB2 port 4
1468 15:40:33.664999 USB2 port 5
1469 15:40:33.668161 USB2 port 6
1470 15:40:33.671591 USB2 port 7
1471 15:40:33.671734 USB2 port 8
1472 15:40:33.674978 USB2 port 9
1473 15:40:33.675132 USB3 port 0
1474 15:40:33.678422 USB3 port 1
1475 15:40:33.678575 USB3 port 2
1476 15:40:33.681595 USB3 port 3
1477 15:40:33.681796 PCI: 00:14.2
1478 15:40:33.691570 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1479 15:40:33.701698 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1480 15:40:33.707975 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1481 15:40:33.718187 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1482 15:40:33.718541 GENERIC: 0.0
1483 15:40:33.724731 PCI: 00:15.0 child on link 0 I2C: 00:1a
1484 15:40:33.734975 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1485 15:40:33.735286 I2C: 00:1a
1486 15:40:33.738089 I2C: 00:31
1487 15:40:33.738416 I2C: 00:32
1488 15:40:33.744961 PCI: 00:15.1 child on link 0 I2C: 00:10
1489 15:40:33.754727 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1490 15:40:33.754968 I2C: 00:10
1491 15:40:33.757993 PCI: 00:15.2
1492 15:40:33.767703 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1493 15:40:33.767951 PCI: 00:15.3
1494 15:40:33.778007 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1495 15:40:33.781024 PCI: 00:16.0
1496 15:40:33.791365 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1497 15:40:33.794442 PCI: 00:19.0
1498 15:40:33.797553 PCI: 00:19.1 child on link 0 I2C: 00:15
1499 15:40:33.807867 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1500 15:40:33.808107 I2C: 00:15
1501 15:40:33.814386 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1502 15:40:33.824518 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1503 15:40:33.834505 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1504 15:40:33.844290 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1505 15:40:33.847565 GENERIC: 0.0
1506 15:40:33.847803 PCI: 01:00.0
1507 15:40:33.857807 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 15:40:33.871056 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1509 15:40:33.880605 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1510 15:40:33.880847 PCI: 00:1e.0
1511 15:40:33.894069 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1512 15:40:33.897253 PCI: 00:1e.2 child on link 0 SPI: 00
1513 15:40:33.907452 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1514 15:40:33.907694 SPI: 00
1515 15:40:33.910507 PCI: 00:1e.3 child on link 0 SPI: 00
1516 15:40:33.923909 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1517 15:40:33.924205 SPI: 00
1518 15:40:33.927233 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1519 15:40:33.937348 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1520 15:40:33.937588 PNP: 0c09.0
1521 15:40:33.947204 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1522 15:40:33.950360 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1523 15:40:33.960565 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 15:40:33.970585 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1525 15:40:33.973751 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1526 15:40:33.976912 GENERIC: 0.0
1527 15:40:33.980532 GENERIC: 1.0
1528 15:40:33.980766 PCI: 00:1f.3
1529 15:40:33.990453 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1530 15:40:34.000332 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1531 15:40:34.003776 PCI: 00:1f.5
1532 15:40:34.013644 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1533 15:40:34.016987 CPU_CLUSTER: 0 child on link 0 APIC: 00
1534 15:40:34.020260 APIC: 00
1535 15:40:34.020492 APIC: 01
1536 15:40:34.020678 APIC: 03
1537 15:40:34.023687 APIC: 05
1538 15:40:34.023923 APIC: 07
1539 15:40:34.026855 APIC: 06
1540 15:40:34.027086 APIC: 02
1541 15:40:34.027269 APIC: 04
1542 15:40:34.030053 Done allocating resources.
1543 15:40:34.037242 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1544 15:40:34.043625 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 15:40:34.046673 Configure GPIOs for I2S audio on UP4.
1546 15:40:34.053587 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 15:40:34.056708 Enabling resources...
1548 15:40:34.060065 PCI: 00:00.0 subsystem <- 8086/9a12
1549 15:40:34.063210 PCI: 00:00.0 cmd <- 06
1550 15:40:34.066478 PCI: 00:02.0 subsystem <- 8086/9a40
1551 15:40:34.069791 PCI: 00:02.0 cmd <- 03
1552 15:40:34.073071 PCI: 00:04.0 subsystem <- 8086/9a03
1553 15:40:34.073223 PCI: 00:04.0 cmd <- 02
1554 15:40:34.079970 PCI: 00:05.0 subsystem <- 8086/9a19
1555 15:40:34.080398 PCI: 00:05.0 cmd <- 02
1556 15:40:34.083235 PCI: 00:08.0 subsystem <- 8086/9a11
1557 15:40:34.086609 PCI: 00:08.0 cmd <- 06
1558 15:40:34.089750 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 15:40:34.093294 PCI: 00:0d.0 cmd <- 02
1560 15:40:34.096500 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 15:40:34.099579 PCI: 00:14.0 cmd <- 02
1562 15:40:34.102967 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 15:40:34.106034 PCI: 00:14.2 cmd <- 02
1564 15:40:34.109673 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 15:40:34.112836 PCI: 00:14.3 cmd <- 02
1566 15:40:34.116056 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 15:40:34.119757 PCI: 00:15.0 cmd <- 02
1568 15:40:34.122594 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 15:40:34.122712 PCI: 00:15.1 cmd <- 02
1570 15:40:34.129463 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 15:40:34.129573 PCI: 00:15.2 cmd <- 02
1572 15:40:34.132569 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 15:40:34.135954 PCI: 00:15.3 cmd <- 02
1574 15:40:34.139246 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 15:40:34.142930 PCI: 00:16.0 cmd <- 02
1576 15:40:34.146112 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 15:40:34.149498 PCI: 00:19.1 cmd <- 02
1578 15:40:34.152746 PCI: 00:1d.0 bridge ctrl <- 0013
1579 15:40:34.155970 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 15:40:34.159177 PCI: 00:1d.0 cmd <- 06
1581 15:40:34.162697 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 15:40:34.165944 PCI: 00:1e.0 cmd <- 06
1583 15:40:34.169256 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 15:40:34.172429 PCI: 00:1e.2 cmd <- 06
1585 15:40:34.175594 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 15:40:34.175742 PCI: 00:1e.3 cmd <- 02
1587 15:40:34.182386 PCI: 00:1f.0 subsystem <- 8086/a087
1588 15:40:34.182587 PCI: 00:1f.0 cmd <- 407
1589 15:40:34.185941 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 15:40:34.189031 PCI: 00:1f.3 cmd <- 02
1591 15:40:34.192778 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 15:40:34.196050 PCI: 00:1f.5 cmd <- 406
1593 15:40:34.200330 PCI: 01:00.0 cmd <- 02
1594 15:40:34.205020 done.
1595 15:40:34.208528 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 15:40:34.211803 Initializing devices...
1597 15:40:34.215095 Root Device init
1598 15:40:34.218510 Chrome EC: Set SMI mask to 0x0000000000000000
1599 15:40:34.225188 Chrome EC: clear events_b mask to 0x0000000000000000
1600 15:40:34.232011 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 15:40:34.238516 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 15:40:34.245574 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 15:40:34.248830 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 15:40:34.256597 fw_config match found: DB_USB=USB3_ACTIVE
1605 15:40:34.259754 Configure Right Type-C port orientation for retimer
1606 15:40:34.263258 Root Device init finished in 46 msecs
1607 15:40:34.267330 PCI: 00:00.0 init
1608 15:40:34.270692 CPU TDP = 9 Watts
1609 15:40:34.271132 CPU PL1 = 9 Watts
1610 15:40:34.273900 CPU PL2 = 40 Watts
1611 15:40:34.277392 CPU PL4 = 83 Watts
1612 15:40:34.280587 PCI: 00:00.0 init finished in 8 msecs
1613 15:40:34.281057 PCI: 00:02.0 init
1614 15:40:34.284246 GMA: Found VBT in CBFS
1615 15:40:34.287437 GMA: Found valid VBT in CBFS
1616 15:40:34.294121 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 15:40:34.300450 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 15:40:34.303872 PCI: 00:02.0 init finished in 18 msecs
1619 15:40:34.307097 PCI: 00:05.0 init
1620 15:40:34.310609 PCI: 00:05.0 init finished in 0 msecs
1621 15:40:34.313712 PCI: 00:08.0 init
1622 15:40:34.317063 PCI: 00:08.0 init finished in 0 msecs
1623 15:40:34.320642 PCI: 00:14.0 init
1624 15:40:34.323861 PCI: 00:14.0 init finished in 0 msecs
1625 15:40:34.327157 PCI: 00:14.2 init
1626 15:40:34.330253 PCI: 00:14.2 init finished in 0 msecs
1627 15:40:34.333559 PCI: 00:15.0 init
1628 15:40:34.333867 I2C bus 0 version 0x3230302a
1629 15:40:34.339841 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 15:40:34.343641 PCI: 00:15.0 init finished in 6 msecs
1631 15:40:34.343827 PCI: 00:15.1 init
1632 15:40:34.346736 I2C bus 1 version 0x3230302a
1633 15:40:34.350103 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 15:40:34.356639 PCI: 00:15.1 init finished in 6 msecs
1635 15:40:34.356853 PCI: 00:15.2 init
1636 15:40:34.359893 I2C bus 2 version 0x3230302a
1637 15:40:34.363334 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 15:40:34.366410 PCI: 00:15.2 init finished in 6 msecs
1639 15:40:34.369706 PCI: 00:15.3 init
1640 15:40:34.373228 I2C bus 3 version 0x3230302a
1641 15:40:34.376467 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 15:40:34.379997 PCI: 00:15.3 init finished in 6 msecs
1643 15:40:34.383318 PCI: 00:16.0 init
1644 15:40:34.386539 PCI: 00:16.0 init finished in 0 msecs
1645 15:40:34.389693 PCI: 00:19.1 init
1646 15:40:34.393263 I2C bus 5 version 0x3230302a
1647 15:40:34.396392 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 15:40:34.399638 PCI: 00:19.1 init finished in 6 msecs
1649 15:40:34.403080 PCI: 00:1d.0 init
1650 15:40:34.403314 Initializing PCH PCIe bridge.
1651 15:40:34.409772 PCI: 00:1d.0 init finished in 3 msecs
1652 15:40:34.412831 PCI: 00:1f.0 init
1653 15:40:34.415998 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 15:40:34.419839 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 15:40:34.423052 IOAPIC: ID = 0x02
1656 15:40:34.426197 IOAPIC: Dumping registers
1657 15:40:34.426417 reg 0x0000: 0x02000000
1658 15:40:34.429518 reg 0x0001: 0x00770020
1659 15:40:34.432627 reg 0x0002: 0x00000000
1660 15:40:34.436407 PCI: 00:1f.0 init finished in 21 msecs
1661 15:40:34.439488 PCI: 00:1f.2 init
1662 15:40:34.442829 Disabling ACPI via APMC.
1663 15:40:34.443095 APMC done.
1664 15:40:34.446551 PCI: 00:1f.2 init finished in 5 msecs
1665 15:40:34.459806 PCI: 01:00.0 init
1666 15:40:34.463146 PCI: 01:00.0 init finished in 0 msecs
1667 15:40:34.466684 PNP: 0c09.0 init
1668 15:40:34.469881 Google Chrome EC uptime: 8.459 seconds
1669 15:40:34.476406 Google Chrome AP resets since EC boot: 1
1670 15:40:34.480113 Google Chrome most recent AP reset causes:
1671 15:40:34.483232 0.380: 32775 shutdown: entering G3
1672 15:40:34.489560 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1673 15:40:34.493184 PNP: 0c09.0 init finished in 22 msecs
1674 15:40:34.498677 Devices initialized
1675 15:40:34.502257 Show all devs... After init.
1676 15:40:34.505598 Root Device: enabled 1
1677 15:40:34.506174 DOMAIN: 0000: enabled 1
1678 15:40:34.508912 CPU_CLUSTER: 0: enabled 1
1679 15:40:34.512394 PCI: 00:00.0: enabled 1
1680 15:40:34.515637 PCI: 00:02.0: enabled 1
1681 15:40:34.516218 PCI: 00:04.0: enabled 1
1682 15:40:34.518673 PCI: 00:05.0: enabled 1
1683 15:40:34.521934 PCI: 00:06.0: enabled 0
1684 15:40:34.525586 PCI: 00:07.0: enabled 0
1685 15:40:34.526064 PCI: 00:07.1: enabled 0
1686 15:40:34.528811 PCI: 00:07.2: enabled 0
1687 15:40:34.532207 PCI: 00:07.3: enabled 0
1688 15:40:34.535407 PCI: 00:08.0: enabled 1
1689 15:40:34.535837 PCI: 00:09.0: enabled 0
1690 15:40:34.538747 PCI: 00:0a.0: enabled 0
1691 15:40:34.541936 PCI: 00:0d.0: enabled 1
1692 15:40:34.545143 PCI: 00:0d.1: enabled 0
1693 15:40:34.545600 PCI: 00:0d.2: enabled 0
1694 15:40:34.548430 PCI: 00:0d.3: enabled 0
1695 15:40:34.552053 PCI: 00:0e.0: enabled 0
1696 15:40:34.552490 PCI: 00:10.2: enabled 1
1697 15:40:34.555182 PCI: 00:10.6: enabled 0
1698 15:40:34.558586 PCI: 00:10.7: enabled 0
1699 15:40:34.562004 PCI: 00:12.0: enabled 0
1700 15:40:34.562458 PCI: 00:12.6: enabled 0
1701 15:40:34.565245 PCI: 00:13.0: enabled 0
1702 15:40:34.568732 PCI: 00:14.0: enabled 1
1703 15:40:34.571709 PCI: 00:14.1: enabled 0
1704 15:40:34.572145 PCI: 00:14.2: enabled 1
1705 15:40:34.574988 PCI: 00:14.3: enabled 1
1706 15:40:34.578210 PCI: 00:15.0: enabled 1
1707 15:40:34.581989 PCI: 00:15.1: enabled 1
1708 15:40:34.582420 PCI: 00:15.2: enabled 1
1709 15:40:34.585152 PCI: 00:15.3: enabled 1
1710 15:40:34.588607 PCI: 00:16.0: enabled 1
1711 15:40:34.589060 PCI: 00:16.1: enabled 0
1712 15:40:34.592064 PCI: 00:16.2: enabled 0
1713 15:40:34.595227 PCI: 00:16.3: enabled 0
1714 15:40:34.598337 PCI: 00:16.4: enabled 0
1715 15:40:34.598784 PCI: 00:16.5: enabled 0
1716 15:40:34.601925 PCI: 00:17.0: enabled 0
1717 15:40:34.605023 PCI: 00:19.0: enabled 0
1718 15:40:34.608220 PCI: 00:19.1: enabled 1
1719 15:40:34.608694 PCI: 00:19.2: enabled 0
1720 15:40:34.611599 PCI: 00:1c.0: enabled 1
1721 15:40:34.615164 PCI: 00:1c.1: enabled 0
1722 15:40:34.618264 PCI: 00:1c.2: enabled 0
1723 15:40:34.618753 PCI: 00:1c.3: enabled 0
1724 15:40:34.621491 PCI: 00:1c.4: enabled 0
1725 15:40:34.625080 PCI: 00:1c.5: enabled 0
1726 15:40:34.628223 PCI: 00:1c.6: enabled 1
1727 15:40:34.628656 PCI: 00:1c.7: enabled 0
1728 15:40:34.631613 PCI: 00:1d.0: enabled 1
1729 15:40:34.634924 PCI: 00:1d.1: enabled 0
1730 15:40:34.635380 PCI: 00:1d.2: enabled 1
1731 15:40:34.638310 PCI: 00:1d.3: enabled 0
1732 15:40:34.641866 PCI: 00:1e.0: enabled 1
1733 15:40:34.645209 PCI: 00:1e.1: enabled 0
1734 15:40:34.645641 PCI: 00:1e.2: enabled 1
1735 15:40:34.648093 PCI: 00:1e.3: enabled 1
1736 15:40:34.651226 PCI: 00:1f.0: enabled 1
1737 15:40:34.654888 PCI: 00:1f.1: enabled 0
1738 15:40:34.654976 PCI: 00:1f.2: enabled 1
1739 15:40:34.657935 PCI: 00:1f.3: enabled 1
1740 15:40:34.661050 PCI: 00:1f.4: enabled 0
1741 15:40:34.664257 PCI: 00:1f.5: enabled 1
1742 15:40:34.664339 PCI: 00:1f.6: enabled 0
1743 15:40:34.667976 PCI: 00:1f.7: enabled 0
1744 15:40:34.671094 APIC: 00: enabled 1
1745 15:40:34.671177 GENERIC: 0.0: enabled 1
1746 15:40:34.674296 GENERIC: 0.0: enabled 1
1747 15:40:34.677931 GENERIC: 1.0: enabled 1
1748 15:40:34.681253 GENERIC: 0.0: enabled 1
1749 15:40:34.681422 GENERIC: 1.0: enabled 1
1750 15:40:34.684891 USB0 port 0: enabled 1
1751 15:40:34.688156 GENERIC: 0.0: enabled 1
1752 15:40:34.688339 USB0 port 0: enabled 1
1753 15:40:34.691257 GENERIC: 0.0: enabled 1
1754 15:40:34.694399 I2C: 00:1a: enabled 1
1755 15:40:34.698143 I2C: 00:31: enabled 1
1756 15:40:34.698322 I2C: 00:32: enabled 1
1757 15:40:34.701569 I2C: 00:10: enabled 1
1758 15:40:34.704744 I2C: 00:15: enabled 1
1759 15:40:34.704991 GENERIC: 0.0: enabled 0
1760 15:40:34.708011 GENERIC: 1.0: enabled 0
1761 15:40:34.711212 GENERIC: 0.0: enabled 1
1762 15:40:34.711368 SPI: 00: enabled 1
1763 15:40:34.714228 SPI: 00: enabled 1
1764 15:40:34.717714 PNP: 0c09.0: enabled 1
1765 15:40:34.718010 GENERIC: 0.0: enabled 1
1766 15:40:34.721159 USB3 port 0: enabled 1
1767 15:40:34.724455 USB3 port 1: enabled 1
1768 15:40:34.727656 USB3 port 2: enabled 0
1769 15:40:34.727910 USB3 port 3: enabled 0
1770 15:40:34.731304 USB2 port 0: enabled 0
1771 15:40:34.734656 USB2 port 1: enabled 1
1772 15:40:34.735058 USB2 port 2: enabled 1
1773 15:40:34.737879 USB2 port 3: enabled 0
1774 15:40:34.741072 USB2 port 4: enabled 1
1775 15:40:34.741474 USB2 port 5: enabled 0
1776 15:40:34.744289 USB2 port 6: enabled 0
1777 15:40:34.748034 USB2 port 7: enabled 0
1778 15:40:34.751323 USB2 port 8: enabled 0
1779 15:40:34.751723 USB2 port 9: enabled 0
1780 15:40:34.754335 USB3 port 0: enabled 0
1781 15:40:34.757731 USB3 port 1: enabled 1
1782 15:40:34.758166 USB3 port 2: enabled 0
1783 15:40:34.760867 USB3 port 3: enabled 0
1784 15:40:34.764920 GENERIC: 0.0: enabled 1
1785 15:40:34.767833 GENERIC: 1.0: enabled 1
1786 15:40:34.768236 APIC: 01: enabled 1
1787 15:40:34.771028 APIC: 03: enabled 1
1788 15:40:34.771429 APIC: 05: enabled 1
1789 15:40:34.774353 APIC: 07: enabled 1
1790 15:40:34.777941 APIC: 06: enabled 1
1791 15:40:34.778437 APIC: 02: enabled 1
1792 15:40:34.781712 APIC: 04: enabled 1
1793 15:40:34.784944 PCI: 01:00.0: enabled 1
1794 15:40:34.788019 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1795 15:40:34.794237 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1796 15:40:34.797457 ELOG: NV offset 0xf30000 size 0x1000
1797 15:40:34.804322 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1798 15:40:34.810858 ELOG: Event(17) added with size 13 at 2022-09-30 15:28:20 UTC
1799 15:40:34.817431 ELOG: Event(92) added with size 9 at 2022-09-30 15:28:20 UTC
1800 15:40:34.824292 ELOG: Event(93) added with size 9 at 2022-09-30 15:28:20 UTC
1801 15:40:34.831683 ELOG: Event(9E) added with size 10 at 2022-09-30 15:28:20 UTC
1802 15:40:34.837060 ELOG: Event(9F) added with size 14 at 2022-09-30 15:28:20 UTC
1803 15:40:34.843786 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1804 15:40:34.850484 ELOG: Event(A1) added with size 10 at 2022-09-30 15:28:21 UTC
1805 15:40:34.857379 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1806 15:40:34.864428 ELOG: Event(A0) added with size 9 at 2022-09-30 15:28:21 UTC
1807 15:40:34.867387 elog_add_boot_reason: Logged dev mode boot
1808 15:40:34.874301 BS: BS_POST_DEVICE entry times (exec / console): 2 / 24 ms
1809 15:40:34.877635 Finalize devices...
1810 15:40:34.878227 Devices finalized
1811 15:40:34.884358 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1812 15:40:34.887231 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1813 15:40:34.893631 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1814 15:40:34.900570 ME: HFSTS1 : 0x80030055
1815 15:40:34.904285 ME: HFSTS2 : 0x30280116
1816 15:40:34.907055 ME: HFSTS3 : 0x00000050
1817 15:40:34.913890 ME: HFSTS4 : 0x00004000
1818 15:40:34.917146 ME: HFSTS5 : 0x00000000
1819 15:40:34.920187 ME: HFSTS6 : 0x00400006
1820 15:40:34.923703 ME: Manufacturing Mode : YES
1821 15:40:34.930381 ME: SPI Protection Mode Enabled : NO
1822 15:40:34.933965 ME: FW Partition Table : OK
1823 15:40:34.937170 ME: Bringup Loader Failure : NO
1824 15:40:34.940106 ME: Firmware Init Complete : NO
1825 15:40:34.943865 ME: Boot Options Present : NO
1826 15:40:34.947267 ME: Update In Progress : NO
1827 15:40:34.950433 ME: D0i3 Support : YES
1828 15:40:34.953679 ME: Low Power State Enabled : NO
1829 15:40:34.959939 ME: CPU Replaced : YES
1830 15:40:34.963486 ME: CPU Replacement Valid : YES
1831 15:40:34.966892 ME: Current Working State : 5
1832 15:40:34.970073 ME: Current Operation State : 1
1833 15:40:34.973759 ME: Current Operation Mode : 3
1834 15:40:34.977081 ME: Error Code : 0
1835 15:40:34.980062 ME: Enhanced Debug Mode : NO
1836 15:40:34.983384 ME: CPU Debug Disabled : YES
1837 15:40:34.986654 ME: TXT Support : NO
1838 15:40:34.993118 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1839 15:40:35.003319 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1840 15:40:35.006716 CBFS: 'fallback/slic' not found.
1841 15:40:35.009890 ACPI: Writing ACPI tables at 76b01000.
1842 15:40:35.010424 ACPI: * FACS
1843 15:40:35.013617 ACPI: * DSDT
1844 15:40:35.016595 Ramoops buffer: 0x100000@0x76a00000.
1845 15:40:35.020047 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1846 15:40:35.026502 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1847 15:40:35.029614 Google Chrome EC: version:
1848 15:40:35.033657 ro: voema_v2.0.7540-147f8d37d1
1849 15:40:35.036773 rw: voema_v2.0.7540-147f8d37d1
1850 15:40:35.037351 running image: 2
1851 15:40:35.043507 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1852 15:40:35.048261 ACPI: * FADT
1853 15:40:35.048847 SCI is IRQ9
1854 15:40:35.054757 ACPI: added table 1/32, length now 40
1855 15:40:35.055337 ACPI: * SSDT
1856 15:40:35.057832 Found 1 CPU(s) with 8 core(s) each.
1857 15:40:35.065069 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1858 15:40:35.068325 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1859 15:40:35.071328 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1860 15:40:35.074704 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1861 15:40:35.081446 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1862 15:40:35.088195 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1863 15:40:35.091347 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1864 15:40:35.097997 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1865 15:40:35.104229 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1866 15:40:35.107518 \_SB.PCI0.RP09: Added StorageD3Enable property
1867 15:40:35.111096 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1868 15:40:35.117762 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1869 15:40:35.124698 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1870 15:40:35.127559 PS2K: Passing 80 keymaps to kernel
1871 15:40:35.134448 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1872 15:40:35.140878 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1873 15:40:35.147545 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1874 15:40:35.154727 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1875 15:40:35.161305 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1876 15:40:35.167796 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1877 15:40:35.174349 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1878 15:40:35.181099 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1879 15:40:35.184279 ACPI: added table 2/32, length now 44
1880 15:40:35.184876 ACPI: * MCFG
1881 15:40:35.191007 ACPI: added table 3/32, length now 48
1882 15:40:35.191597 ACPI: * TPM2
1883 15:40:35.194363 TPM2 log created at 0x769f0000
1884 15:40:35.197537 ACPI: added table 4/32, length now 52
1885 15:40:35.200665 ACPI: * MADT
1886 15:40:35.201284 SCI is IRQ9
1887 15:40:35.204100 ACPI: added table 5/32, length now 56
1888 15:40:35.207280 current = 76b09850
1889 15:40:35.207885 ACPI: * DMAR
1890 15:40:35.210481 ACPI: added table 6/32, length now 60
1891 15:40:35.217812 ACPI: added table 7/32, length now 64
1892 15:40:35.218405 ACPI: * HPET
1893 15:40:35.220946 ACPI: added table 8/32, length now 68
1894 15:40:35.223836 ACPI: done.
1895 15:40:35.224320 ACPI tables: 35216 bytes.
1896 15:40:35.227124 smbios_write_tables: 769ef000
1897 15:40:35.230722 EC returned error result code 3
1898 15:40:35.233748 Couldn't obtain OEM name from CBI
1899 15:40:35.238156 Create SMBIOS type 16
1900 15:40:35.241109 Create SMBIOS type 17
1901 15:40:35.244446 GENERIC: 0.0 (WIFI Device)
1902 15:40:35.244931 SMBIOS tables: 1750 bytes.
1903 15:40:35.251022 Writing table forward entry at 0x00000500
1904 15:40:35.257861 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1905 15:40:35.261097 Writing coreboot table at 0x76b25000
1906 15:40:35.267410 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1907 15:40:35.271008 1. 0000000000001000-000000000009ffff: RAM
1908 15:40:35.274362 2. 00000000000a0000-00000000000fffff: RESERVED
1909 15:40:35.280959 3. 0000000000100000-00000000769eefff: RAM
1910 15:40:35.284103 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1911 15:40:35.290992 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1912 15:40:35.297328 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1913 15:40:35.300570 7. 0000000077000000-000000007fbfffff: RESERVED
1914 15:40:35.307227 8. 00000000c0000000-00000000cfffffff: RESERVED
1915 15:40:35.310199 9. 00000000f8000000-00000000f9ffffff: RESERVED
1916 15:40:35.313687 10. 00000000fb000000-00000000fb000fff: RESERVED
1917 15:40:35.319963 11. 00000000fe000000-00000000fe00ffff: RESERVED
1918 15:40:35.323455 12. 00000000fed80000-00000000fed87fff: RESERVED
1919 15:40:35.330068 13. 00000000fed90000-00000000fed92fff: RESERVED
1920 15:40:35.333570 14. 00000000feda0000-00000000feda1fff: RESERVED
1921 15:40:35.339974 15. 00000000fedc0000-00000000feddffff: RESERVED
1922 15:40:35.343243 16. 0000000100000000-00000002803fffff: RAM
1923 15:40:35.346723 Passing 4 GPIOs to payload:
1924 15:40:35.350094 NAME | PORT | POLARITY | VALUE
1925 15:40:35.356485 lid | undefined | high | high
1926 15:40:35.363306 power | undefined | high | low
1927 15:40:35.366449 oprom | undefined | high | low
1928 15:40:35.372942 EC in RW | 0x000000e5 | high | high
1929 15:40:35.379848 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7690
1930 15:40:35.383035 coreboot table: 1576 bytes.
1931 15:40:35.386271 IMD ROOT 0. 0x76fff000 0x00001000
1932 15:40:35.389391 IMD SMALL 1. 0x76ffe000 0x00001000
1933 15:40:35.392919 FSP MEMORY 2. 0x76c4e000 0x003b0000
1934 15:40:35.396100 VPD 3. 0x76c4d000 0x00000367
1935 15:40:35.399273 RO MCACHE 4. 0x76c4c000 0x00000fdc
1936 15:40:35.402659 CONSOLE 5. 0x76c2c000 0x00020000
1937 15:40:35.406048 FMAP 6. 0x76c2b000 0x00000578
1938 15:40:35.412807 TIME STAMP 7. 0x76c2a000 0x00000910
1939 15:40:35.416270 VBOOT WORK 8. 0x76c16000 0x00014000
1940 15:40:35.419426 ROMSTG STCK 9. 0x76c15000 0x00001000
1941 15:40:35.422592 AFTER CAR 10. 0x76c0a000 0x0000b000
1942 15:40:35.426167 RAMSTAGE 11. 0x76b97000 0x00073000
1943 15:40:35.429444 REFCODE 12. 0x76b42000 0x00055000
1944 15:40:35.432668 SMM BACKUP 13. 0x76b32000 0x00010000
1945 15:40:35.436130 4f444749 14. 0x76b30000 0x00002000
1946 15:40:35.439718 EXT VBT15. 0x76b2d000 0x0000219f
1947 15:40:35.446034 COREBOOT 16. 0x76b25000 0x00008000
1948 15:40:35.449444 ACPI 17. 0x76b01000 0x00024000
1949 15:40:35.452694 ACPI GNVS 18. 0x76b00000 0x00001000
1950 15:40:35.456257 RAMOOPS 19. 0x76a00000 0x00100000
1951 15:40:35.459419 TPM2 TCGLOG20. 0x769f0000 0x00010000
1952 15:40:35.462573 SMBIOS 21. 0x769ef000 0x00000800
1953 15:40:35.466211 IMD small region:
1954 15:40:35.469328 IMD ROOT 0. 0x76ffec00 0x00000400
1955 15:40:35.472639 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1956 15:40:35.475945 POWER STATE 2. 0x76ffeb80 0x00000044
1957 15:40:35.479298 ROMSTAGE 3. 0x76ffeb60 0x00000004
1958 15:40:35.486150 MEM INFO 4. 0x76ffe980 0x000001e0
1959 15:40:35.489359 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1960 15:40:35.492575 MTRR: Physical address space:
1961 15:40:35.499489 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1962 15:40:35.505820 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1963 15:40:35.512542 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1964 15:40:35.519399 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1965 15:40:35.526123 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1966 15:40:35.532573 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1967 15:40:35.536135 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1968 15:40:35.542616 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 15:40:35.545906 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 15:40:35.549571 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 15:40:35.552819 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 15:40:35.559123 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 15:40:35.562307 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 15:40:35.565964 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 15:40:35.569085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 15:40:35.575976 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 15:40:35.579239 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 15:40:35.582478 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 15:40:35.585648 call enable_fixed_mtrr()
1980 15:40:35.589339 CPU physical address size: 39 bits
1981 15:40:35.595623 MTRR: default type WB/UC MTRR counts: 6/6.
1982 15:40:35.599030 MTRR: UC selected as default type.
1983 15:40:35.602959 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1984 15:40:35.609132 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 15:40:35.615700 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 15:40:35.622109 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 15:40:35.628914 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1988 15:40:35.635757 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1989 15:40:35.641896 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 15:40:35.645517 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 15:40:35.648738 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 15:40:35.652147 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 15:40:35.655525 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 15:40:35.661893 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 15:40:35.665283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 15:40:35.668578 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 15:40:35.672157 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 15:40:35.678702 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 15:40:35.681901 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 15:40:35.682037
2001 15:40:35.685044 MTRR check
2002 15:40:35.685129 call enable_fixed_mtrr()
2003 15:40:35.688560 Fixed MTRRs : Enabled
2004 15:40:35.691974 Variable MTRRs: Enabled
2005 15:40:35.692060
2006 15:40:35.695053 CPU physical address size: 39 bits
2007 15:40:35.702008 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2008 15:40:35.705180 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 15:40:35.711814 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 15:40:35.714952 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 15:40:35.718541 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 15:40:35.721748 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 15:40:35.728159 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 15:40:35.731737 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 15:40:35.734933 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 15:40:35.738192 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 15:40:35.741631 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 15:40:35.748384 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 15:40:35.751693 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 15:40:35.758184 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 15:40:35.758282 call enable_fixed_mtrr()
2022 15:40:35.765229 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 15:40:35.768321 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 15:40:35.771945 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 15:40:35.775044 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 15:40:35.778300 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 15:40:35.784892 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 15:40:35.788895 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 15:40:35.792230 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 15:40:35.794653 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 15:40:35.799369 CPU physical address size: 39 bits
2032 15:40:35.805974 call enable_fixed_mtrr()
2033 15:40:35.809104 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 15:40:35.812605 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 15:40:35.815812 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 15:40:35.822809 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 15:40:35.825878 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 15:40:35.829070 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 15:40:35.832190 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 15:40:35.835861 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 15:40:35.842053 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 15:40:35.845825 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 15:40:35.848631 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 15:40:35.852107 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 15:40:35.859546 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 15:40:35.859633 call enable_fixed_mtrr()
2047 15:40:35.866308 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 15:40:35.869599 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 15:40:35.872786 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 15:40:35.876182 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 15:40:35.882503 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 15:40:35.885751 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 15:40:35.889547 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 15:40:35.892648 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 15:40:35.899566 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 15:40:35.902921 CPU physical address size: 39 bits
2057 15:40:35.906002 call enable_fixed_mtrr()
2058 15:40:35.909799 Checking cr50 for pending updates
2059 15:40:35.913665 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 15:40:35.916828 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 15:40:35.923175 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 15:40:35.926929 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 15:40:35.929999 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 15:40:35.933278 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 15:40:35.936456 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 15:40:35.943097 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 15:40:35.946426 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 15:40:35.949731 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 15:40:35.953312 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 15:40:35.960007 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 15:40:35.963235 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 15:40:35.966413 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 15:40:35.973025 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 15:40:35.976720 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 15:40:35.979902 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 15:40:35.983115 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 15:40:35.989659 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 15:40:35.992849 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 15:40:35.996280 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 15:40:35.999399 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 15:40:36.003932 call enable_fixed_mtrr()
2082 15:40:36.007304 call enable_fixed_mtrr()
2083 15:40:36.010516 CPU physical address size: 39 bits
2084 15:40:36.013678 CPU physical address size: 39 bits
2085 15:40:36.016665 CPU physical address size: 39 bits
2086 15:40:36.023258 CPU physical address size: 39 bits
2087 15:40:36.023352 Reading cr50 TPM mode
2088 15:40:36.034069 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2089 15:40:36.044551 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2090 15:40:36.047435 Checking segment from ROM address 0xffc02b38
2091 15:40:36.050709 Checking segment from ROM address 0xffc02b54
2092 15:40:36.057527 Loading segment from ROM address 0xffc02b38
2093 15:40:36.057724 code (compression=0)
2094 15:40:36.067917 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2095 15:40:36.074331 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2096 15:40:36.077751 it's not compressed!
2097 15:40:36.217001 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2098 15:40:36.223975 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2099 15:40:36.230436 Loading segment from ROM address 0xffc02b54
2100 15:40:36.230682 Entry Point 0x30000000
2101 15:40:36.233609 Loaded segments
2102 15:40:36.240429 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2103 15:40:36.283040 Finalizing chipset.
2104 15:40:36.286638 Finalizing SMM.
2105 15:40:36.286779 APMC done.
2106 15:40:36.292894 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2107 15:40:36.296563 mp_park_aps done after 0 msecs.
2108 15:40:36.299860 Jumping to boot code at 0x30000000(0x76b25000)
2109 15:40:36.309440 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2110 15:40:36.309557
2111 15:40:36.313221 Starting depthcharge on Voema...
2112 15:40:36.313662 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2113 15:40:36.313825 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2114 15:40:36.313956 Setting prompt string to ['volteer:']
2115 15:40:36.314075 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2116 15:40:36.322929 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2117 15:40:36.329513 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2118 15:40:36.332748 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2119 15:40:36.339580 Failed to find eMMC card reader
2120 15:40:36.339665 Wipe memory regions:
2121 15:40:36.345871 [0x00000000001000, 0x000000000a0000)
2122 15:40:36.349363 [0x00000000100000, 0x00000030000000)
2123 15:40:36.377934 [0x00000032662db0, 0x000000769ef000)
2124 15:40:36.416728 [0x00000100000000, 0x00000280400000)
2125 15:40:36.620885 ec_init: CrosEC protocol v3 supported (256, 256)
2126 15:40:36.627394 update_port_state: port C0 state: usb enable 1 mux conn 0
2127 15:40:36.637533 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2128 15:40:36.643919 pmc_check_ipc_sts: STS_BUSY done after 1585 us
2129 15:40:36.647559 send_conn_disc_msg: pmc_send_cmd succeeded
2130 15:40:37.080811 R8152: Initializing
2131 15:40:37.084097 Version 6 (ocp_data = 5c30)
2132 15:40:37.087307 R8152: Done initializing
2133 15:40:37.090605 Adding net device
2134 15:40:37.395992 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2135 15:40:37.396503
2136 15:40:37.399652 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 15:40:37.501303 volteer: tftpboot 192.168.201.1 7463466/tftp-deploy-8gwgsdrf/kernel/bzImage 7463466/tftp-deploy-8gwgsdrf/kernel/cmdline 7463466/tftp-deploy-8gwgsdrf/ramdisk/ramdisk.cpio.gz
2139 15:40:37.501949 Setting prompt string to 'Starting kernel'
2140 15:40:37.502327 Setting prompt string to ['Starting kernel']
2141 15:40:37.502673 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2142 15:40:37.503034 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2143 15:40:37.506777 tftpboot 192.168.201.1 7463466/tftp-deploy-8gwgsdrf/kernel/bzImoy-8gwgsdrf/kernel/cmdline 7463466/tftp-deploy-8gwgsdrf/ramdisk/ramdisk.cpio.gz
2144 15:40:37.507219 Waiting for link
2145 15:40:37.711109 done.
2146 15:40:37.711613 MAC: 00:24:32:30:78:74
2147 15:40:37.714600 Sending DHCP discover... done.
2148 15:40:37.717857 Waiting for reply... done.
2149 15:40:37.721030 Sending DHCP request... done.
2150 15:40:37.728058 Waiting for reply... done.
2151 15:40:37.728573 My ip is 192.168.201.13
2152 15:40:37.731714 The DHCP server ip is 192.168.201.1
2153 15:40:37.738260 TFTP server IP predefined by user: 192.168.201.1
2154 15:40:37.744688 Bootfile predefined by user: 7463466/tftp-deploy-8gwgsdrf/kernel/bzImage
2155 15:40:37.748053 Sending tftp read request... done.
2156 15:40:37.751231 Waiting for the transfer...
2157 15:40:38.335939 00000000 ################################################################
2158 15:40:38.930022 00080000 ################################################################
2159 15:40:39.543810 00100000 ################################################################
2160 15:40:40.117912 00180000 ################################################################
2161 15:40:40.735837 00200000 ################################################################
2162 15:40:41.383427 00280000 ################################################################
2163 15:40:41.962803 00300000 ################################################################
2164 15:40:42.534003 00380000 ################################################################
2165 15:40:43.067551 00400000 ################################################################
2166 15:40:43.588450 00480000 ################################################################
2167 15:40:44.118533 00500000 ################################################################
2168 15:40:44.641292 00580000 ################################################################
2169 15:40:45.164893 00600000 ################################################################
2170 15:40:45.482850 00680000 ###################################### done.
2171 15:40:45.486417 The bootfile was 7126928 bytes long.
2172 15:40:45.489663 Sending tftp read request... done.
2173 15:40:45.492649 Waiting for the transfer...
2174 15:40:46.040073 00000000 ################################################################
2175 15:40:46.595307 00080000 ################################################################
2176 15:40:47.156808 00100000 ################################################################
2177 15:40:47.720148 00180000 ################################################################
2178 15:40:48.277427 00200000 ################################################################
2179 15:40:48.815070 00280000 ################################################################
2180 15:40:49.366403 00300000 ################################################################
2181 15:40:49.936414 00380000 ################################################################
2182 15:40:50.512778 00400000 ################################################################
2183 15:40:51.094724 00480000 ################################################################
2184 15:40:51.358307 00500000 ############################# done.
2185 15:40:51.362024 Sending tftp read request... done.
2186 15:40:51.365221 Waiting for the transfer...
2187 15:40:51.365311 00000000 # done.
2188 15:40:51.375195 Command line loaded dynamically from TFTP file: 7463466/tftp-deploy-8gwgsdrf/kernel/cmdline
2189 15:40:51.398140 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7463466/extract-nfsrootfs-zr6kht7z,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2190 15:40:51.401376 Shutting down all USB controllers.
2191 15:40:51.405053 Removing current net device
2192 15:40:51.408369 Finalizing coreboot
2193 15:40:51.414773 Exiting depthcharge with code 4 at timestamp: 23761202
2194 15:40:51.415085
2195 15:40:51.415332 Starting kernel ...
2196 15:40:51.415561
2197 15:40:51.415785
2198 15:40:51.416638 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2199 15:40:51.417148 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2200 15:40:51.417502 Setting prompt string to ['Linux version [0-9]']
2201 15:40:51.417908 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2202 15:40:51.418268 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2204 15:45:19.418077 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2206 15:45:19.419175 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2208 15:45:19.419984 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2211 15:45:19.421618 end: 2 depthcharge-action (duration 00:05:00) [common]
2213 15:45:19.422349 Cleaning after the job
2214 15:45:19.422433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/ramdisk
2215 15:45:19.422877 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/kernel
2216 15:45:19.423375 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/nfsrootfs
2217 15:45:19.471087 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463466/tftp-deploy-8gwgsdrf/modules
2218 15:45:19.471396 start: 4.1 power-off (timeout 00:00:30) [common]
2219 15:45:19.471564 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2220 15:45:19.490683 >> Command sent successfully.
2221 15:45:19.492559 Returned 0 in 0 seconds
2222 15:45:19.593665 end: 4.1 power-off (duration 00:00:00) [common]
2224 15:45:19.595222 start: 4.2 read-feedback (timeout 00:10:00) [common]
2225 15:45:19.596275 Listened to connection for namespace 'common' for up to 1s
2226 15:45:20.598118 Finalising connection for namespace 'common'
2227 15:45:20.598791 Disconnecting from shell: Finalise
2228 15:45:20.700221 end: 4.2 read-feedback (duration 00:00:01) [common]
2229 15:45:20.700794 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463466
2230 15:45:20.888473 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463466
2231 15:45:20.888666 JobError: Your job cannot terminate cleanly.