Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:39:46.615958 lava-dispatcher, installed at version: 2022.06
2 15:39:46.616147 start: 0 validate
3 15:39:46.616271 Start time: 2022-09-30 15:39:46.616264+00:00 (UTC)
4 15:39:46.616394 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:39:46.616518 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:39:46.915205 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:39:46.916046 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:39:47.220655 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:39:47.221438 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:39:47.513410 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:39:47.514238 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:39:47.823119 validate duration: 1.21
14 15:39:47.824613 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:39:47.825240 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:39:47.825759 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:39:47.826329 Not decompressing ramdisk as can be used compressed.
18 15:39:47.826820 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 15:39:47.827211 saving as /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/ramdisk/initrd.cpio.gz
20 15:39:47.827565 total size: 5411075 (5MB)
21 15:39:47.835151 progress 0% (0MB)
22 15:39:47.843611 progress 5% (0MB)
23 15:39:47.848766 progress 10% (0MB)
24 15:39:47.852719 progress 15% (0MB)
25 15:39:47.856240 progress 20% (1MB)
26 15:39:47.859114 progress 25% (1MB)
27 15:39:47.861732 progress 30% (1MB)
28 15:39:47.864075 progress 35% (1MB)
29 15:39:47.866647 progress 40% (2MB)
30 15:39:47.868785 progress 45% (2MB)
31 15:39:47.870714 progress 50% (2MB)
32 15:39:47.872520 progress 55% (2MB)
33 15:39:47.873980 progress 60% (3MB)
34 15:39:47.875298 progress 65% (3MB)
35 15:39:47.876632 progress 70% (3MB)
36 15:39:47.877935 progress 75% (3MB)
37 15:39:47.879371 progress 80% (4MB)
38 15:39:47.880680 progress 85% (4MB)
39 15:39:47.881981 progress 90% (4MB)
40 15:39:47.883279 progress 95% (4MB)
41 15:39:47.884745 progress 100% (5MB)
42 15:39:47.884924 5MB downloaded in 0.06s (89.96MB/s)
43 15:39:47.885076 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:39:47.885322 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:39:47.885410 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:39:47.885505 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:39:47.885616 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:39:47.885684 saving as /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/kernel/bzImage
50 15:39:47.885746 total size: 7126928 (6MB)
51 15:39:47.885806 No compression specified
52 15:39:49.391060 progress 0% (0MB)
53 15:39:49.400734 progress 5% (0MB)
54 15:39:49.411006 progress 10% (0MB)
55 15:39:49.424145 progress 15% (1MB)
56 15:39:49.437182 progress 20% (1MB)
57 15:39:49.451477 progress 25% (1MB)
58 15:39:49.472321 progress 30% (2MB)
59 15:39:49.492236 progress 35% (2MB)
60 15:39:49.524263 progress 40% (2MB)
61 15:39:49.569263 progress 45% (3MB)
62 15:39:49.602405 progress 50% (3MB)
63 15:39:49.641889 progress 55% (3MB)
64 15:39:49.679572 progress 60% (4MB)
65 15:39:49.737250 progress 65% (4MB)
66 15:39:49.789413 progress 70% (4MB)
67 15:39:49.853466 progress 75% (5MB)
68 15:39:49.927282 progress 80% (5MB)
69 15:39:50.021855 progress 85% (5MB)
70 15:39:50.092753 progress 90% (6MB)
71 15:39:50.127075 progress 95% (6MB)
72 15:39:50.163259 progress 100% (6MB)
73 15:39:50.164546 6MB downloaded in 2.28s (2.98MB/s)
74 15:39:50.165330 end: 1.2.1 http-download (duration 00:00:02) [common]
76 15:39:50.166658 end: 1.2 download-retry (duration 00:00:02) [common]
77 15:39:50.167162 start: 1.3 download-retry (timeout 00:09:58) [common]
78 15:39:50.167657 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 15:39:50.168266 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 15:39:50.168648 saving as /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/nfsrootfs/full.rootfs.tar
81 15:39:50.168996 total size: 122682368 (116MB)
82 15:39:50.169343 Using unxz to decompress xz
83 15:39:50.205919 progress 0% (0MB)
84 15:39:50.814768 progress 5% (5MB)
85 15:39:51.468719 progress 10% (11MB)
86 15:39:52.008380 progress 15% (17MB)
87 15:39:52.674797 progress 20% (23MB)
88 15:39:53.338063 progress 25% (29MB)
89 15:39:53.977447 progress 30% (35MB)
90 15:39:54.576747 progress 35% (40MB)
91 15:39:55.255822 progress 40% (46MB)
92 15:39:55.942829 progress 45% (52MB)
93 15:39:56.572351 progress 50% (58MB)
94 15:39:56.941854 progress 55% (64MB)
95 15:39:57.281300 progress 60% (70MB)
96 15:39:57.602734 progress 65% (76MB)
97 15:39:57.970294 progress 70% (81MB)
98 15:39:58.376416 progress 75% (87MB)
99 15:39:58.779400 progress 80% (93MB)
100 15:39:58.890357 progress 85% (99MB)
101 15:39:59.051119 progress 90% (105MB)
102 15:39:59.369790 progress 95% (111MB)
103 15:39:59.727317 progress 100% (116MB)
104 15:39:59.733787 116MB downloaded in 9.56s (12.23MB/s)
105 15:39:59.734053 end: 1.3.1 http-download (duration 00:00:10) [common]
107 15:39:59.734351 end: 1.3 download-retry (duration 00:00:10) [common]
108 15:39:59.734445 start: 1.4 download-retry (timeout 00:09:48) [common]
109 15:39:59.734535 start: 1.4.1 http-download (timeout 00:09:48) [common]
110 15:39:59.734653 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:39:59.734730 saving as /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/modules/modules.tar
112 15:39:59.734793 total size: 51896 (0MB)
113 15:39:59.734855 Using unxz to decompress xz
114 15:39:59.739207 progress 63% (0MB)
115 15:39:59.739645 progress 100% (0MB)
116 15:39:59.742845 0MB downloaded in 0.01s (6.15MB/s)
117 15:39:59.743078 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:39:59.743355 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:39:59.743461 start: 1.5 prepare-tftp-overlay (timeout 00:09:48) [common]
121 15:39:59.743560 start: 1.5.1 extract-nfsrootfs (timeout 00:09:48) [common]
122 15:40:01.385085 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7463454/extract-nfsrootfs-0avlm6lg
123 15:40:01.385309 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:40:01.385430 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
125 15:40:01.385579 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id
126 15:40:01.385698 makedir: /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin
127 15:40:01.385797 makedir: /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/tests
128 15:40:01.385895 makedir: /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/results
129 15:40:01.386010 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-add-keys
130 15:40:01.386157 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-add-sources
131 15:40:01.386293 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-background-process-start
132 15:40:01.386423 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-background-process-stop
133 15:40:01.386552 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-common-functions
134 15:40:01.386680 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-echo-ipv4
135 15:40:01.386811 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-install-packages
136 15:40:01.386938 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-installed-packages
137 15:40:01.387064 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-os-build
138 15:40:01.387189 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-probe-channel
139 15:40:01.387316 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-probe-ip
140 15:40:01.387443 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-target-ip
141 15:40:01.387569 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-target-mac
142 15:40:01.387695 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-target-storage
143 15:40:01.387824 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-case
144 15:40:01.388132 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-event
145 15:40:01.388259 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-feedback
146 15:40:01.388389 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-raise
147 15:40:01.388516 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-reference
148 15:40:01.388643 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-runner
149 15:40:01.388769 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-set
150 15:40:01.388895 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-test-shell
151 15:40:01.389022 Updating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-install-packages (oe)
152 15:40:01.389158 Updating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/bin/lava-installed-packages (oe)
153 15:40:01.389269 Creating /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/environment
154 15:40:01.389368 LAVA metadata
155 15:40:01.389441 - LAVA_JOB_ID=7463454
156 15:40:01.389521 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:40:01.389642 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
158 15:40:01.389713 skipped lava-vland-overlay
159 15:40:01.389813 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:40:01.389909 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
161 15:40:01.389979 skipped lava-multinode-overlay
162 15:40:01.390077 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:40:01.390176 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
164 15:40:01.390259 Loading test definitions
165 15:40:01.390370 start: 1.5.2.3.1 git-repo-action (timeout 00:09:46) [common]
166 15:40:01.390455 Using /lava-7463454 at stage 0
167 15:40:01.390574 Fetching tests from https://github.com/kernelci/test-definitions
168 15:40:01.390665 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/0/tests/0_ltp-mm'
169 15:40:07.574084 Running '/usr/bin/git checkout kernelci.org
170 15:40:07.707525 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 15:40:07.708329 uuid=7463454_1.5.2.3.1 testdef=None
172 15:40:07.708499 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
174 15:40:07.708751 start: 1.5.2.3.2 test-overlay (timeout 00:09:40) [common]
175 15:40:07.709531 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:40:07.709775 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:40) [common]
178 15:40:07.710805 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:40:07.711059 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:40) [common]
181 15:40:07.712063 runner path: /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/0/tests/0_ltp-mm test_uuid 7463454_1.5.2.3.1
182 15:40:07.712155 SKIPFILE='skipfile-lkft.yaml'
183 15:40:07.712227 SKIP_INSTALL='true'
184 15:40:07.712296 TST_CMDFILES='mm'
185 15:40:07.712443 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:40:07.712665 Creating lava-test-runner.conf files
188 15:40:07.712745 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463454/lava-overlay-obwzy2id/lava-7463454/0 for stage 0
189 15:40:07.712834 - 0_ltp-mm
190 15:40:07.712933 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
191 15:40:07.713026 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
192 15:40:14.817989 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 15:40:14.818160 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
194 15:40:14.818259 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:40:14.818363 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
196 15:40:14.818460 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
197 15:40:14.919672 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:40:14.920053 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
199 15:40:14.920166 extracting modules file /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463454/extract-nfsrootfs-0avlm6lg
200 15:40:14.924296 extracting modules file /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463454/extract-overlay-ramdisk-ky9r5ecr/ramdisk
201 15:40:14.928110 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:40:14.928221 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
203 15:40:14.928304 [common] Applying overlay to NFS
204 15:40:14.928375 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463454/compress-overlay-gcjl03o_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463454/extract-nfsrootfs-0avlm6lg
205 15:40:15.364421 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:40:15.364595 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
207 15:40:15.364691 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:40:15.364780 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
209 15:40:15.364860 Building ramdisk /var/lib/lava/dispatcher/tmp/7463454/extract-overlay-ramdisk-ky9r5ecr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463454/extract-overlay-ramdisk-ky9r5ecr/ramdisk
210 15:40:15.397032 >> 24434 blocks
211 15:40:15.856324 rename /var/lib/lava/dispatcher/tmp/7463454/extract-overlay-ramdisk-ky9r5ecr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/ramdisk/ramdisk.cpio.gz
212 15:40:15.856738 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 15:40:15.856863 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
214 15:40:15.856970 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
215 15:40:15.857067 No mkimage arch provided, not using FIT.
216 15:40:15.857159 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:40:15.857245 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:40:15.857346 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 15:40:15.857440 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
220 15:40:15.857519 No LXC device requested
221 15:40:15.857601 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:40:15.857689 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
223 15:40:15.857770 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:40:15.857842 Checking files for TFTP limit of 4294967296 bytes.
225 15:40:15.858228 end: 1 tftp-deploy (duration 00:00:28) [common]
226 15:40:15.858334 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:40:15.858432 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:40:15.858562 substitutions:
229 15:40:15.858631 - {DTB}: None
230 15:40:15.858698 - {INITRD}: 7463454/tftp-deploy-fyfgohr4/ramdisk/ramdisk.cpio.gz
231 15:40:15.858760 - {KERNEL}: 7463454/tftp-deploy-fyfgohr4/kernel/bzImage
232 15:40:15.858820 - {LAVA_MAC}: None
233 15:40:15.858879 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7463454/extract-nfsrootfs-0avlm6lg
234 15:40:15.858938 - {NFS_SERVER_IP}: 192.168.201.1
235 15:40:15.858996 - {PRESEED_CONFIG}: None
236 15:40:15.859054 - {PRESEED_LOCAL}: None
237 15:40:15.859110 - {RAMDISK}: 7463454/tftp-deploy-fyfgohr4/ramdisk/ramdisk.cpio.gz
238 15:40:15.859168 - {ROOT_PART}: None
239 15:40:15.859225 - {ROOT}: None
240 15:40:15.859282 - {SERVER_IP}: 192.168.201.1
241 15:40:15.859339 - {TEE}: None
242 15:40:15.859394 Parsed boot commands:
243 15:40:15.859450 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:40:15.859603 Parsed boot commands: tftpboot 192.168.201.1 7463454/tftp-deploy-fyfgohr4/kernel/bzImage 7463454/tftp-deploy-fyfgohr4/kernel/cmdline 7463454/tftp-deploy-fyfgohr4/ramdisk/ramdisk.cpio.gz
245 15:40:15.859695 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:40:15.859782 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:40:15.859903 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:40:15.860009 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:40:15.860081 Not connected, no need to disconnect.
250 15:40:15.860158 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:40:15.860241 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:40:15.860309 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
253 15:40:15.862857 Setting prompt string to ['lava-test: # ']
254 15:40:15.863147 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:40:15.863252 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:40:15.863352 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:40:15.863446 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:40:15.863625 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
259 15:40:15.882366 >> Command sent successfully.
260 15:40:15.884196 Returned 0 in 0 seconds
261 15:40:15.985399 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 15:40:15.986810 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 15:40:15.987329 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 15:40:15.987733 Setting prompt string to 'Starting depthcharge on Helios...'
266 15:40:15.988106 Changing prompt to 'Starting depthcharge on Helios...'
267 15:40:15.988457 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 15:40:15.989714 [Enter `^Ec?' for help]
269 15:40:15.990107 <6>[ 16.563178] udevd (167) used greatest stack depth: 13744 bytes left
270 15:40:22.595223
271 15:40:22.595882
272 15:40:22.605099 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 15:40:22.608599 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 15:40:22.615610 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 15:40:22.618648 CPU: AES supported, TXT NOT supported, VT supported
276 15:40:22.624762 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 15:40:22.628113 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 15:40:22.635185 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 15:40:22.638385 VBOOT: Loading verstage.
280 15:40:22.641609 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 15:40:22.648075 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 15:40:22.654862 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 15:40:22.655446 CBFS @ c08000 size 3f8000
284 15:40:22.661871 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 15:40:22.665112 CBFS: Locating 'fallback/verstage'
286 15:40:22.668361 CBFS: Found @ offset 10fb80 size 1072c
287 15:40:22.672631
288 15:40:22.673221
289 15:40:22.682454 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 15:40:22.696677 Probing TPM: . done!
291 15:40:22.700103 TPM ready after 0 ms
292 15:40:22.702724 Connected to device vid:did:rid of 1ae0:0028:00
293 15:40:22.713024 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 15:40:22.716597 Initialized TPM device CR50 revision 0
295 15:40:22.752142 tlcl_send_startup: Startup return code is 0
296 15:40:22.752727 TPM: setup succeeded
297 15:40:22.764708 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 15:40:22.769061 Chrome EC: UHEPI supported
299 15:40:22.771995 Phase 1
300 15:40:22.775829 FMAP: area GBB found @ c05000 (12288 bytes)
301 15:40:22.782552 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 15:40:22.785392 Phase 2
303 15:40:22.785970 Phase 3
304 15:40:22.788470 FMAP: area GBB found @ c05000 (12288 bytes)
305 15:40:22.795367 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 15:40:22.802630 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 15:40:22.805495 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 15:40:22.812150 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 15:40:22.827975 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 15:40:22.830504 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 15:40:22.837427 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 15:40:22.841461 Phase 4
313 15:40:22.844873 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 15:40:22.851360 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 15:40:23.031270 VB2:vb2_rsa_verify_digest() Digest check failed!
316 15:40:23.037576 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 15:40:23.038152 Saving nvdata
318 15:40:23.041242 Reboot requested (10020007)
319 15:40:23.044568 board_reset() called!
320 15:40:23.045075 full_reset() called!
321 15:40:27.562023
322 15:40:27.562605
323 15:40:27.572412 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 15:40:27.575260 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 15:40:27.581771 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 15:40:27.585190 CPU: AES supported, TXT NOT supported, VT supported
327 15:40:27.591631 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 15:40:27.595159 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 15:40:27.601695 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 15:40:27.605267 VBOOT: Loading verstage.
331 15:40:27.608340 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 15:40:27.615174 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 15:40:27.621621 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 15:40:27.622106 CBFS @ c08000 size 3f8000
335 15:40:27.628664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 15:40:27.631435 CBFS: Locating 'fallback/verstage'
337 15:40:27.635036 CBFS: Found @ offset 10fb80 size 1072c
338 15:40:27.639053
339 15:40:27.639621
340 15:40:27.648836 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 15:40:27.663009 Probing TPM: . done!
342 15:40:27.666366 TPM ready after 0 ms
343 15:40:27.669468 Connected to device vid:did:rid of 1ae0:0028:00
344 15:40:27.679956 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
345 15:40:27.683254 Initialized TPM device CR50 revision 0
346 15:40:27.718753 tlcl_send_startup: Startup return code is 0
347 15:40:27.719305 TPM: setup succeeded
348 15:40:27.732099 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 15:40:27.735410 Chrome EC: UHEPI supported
350 15:40:27.739084 Phase 1
351 15:40:27.741727 FMAP: area GBB found @ c05000 (12288 bytes)
352 15:40:27.748764 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 15:40:27.755176 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 15:40:27.758441 Recovery requested (1009000e)
355 15:40:27.764410 Saving nvdata
356 15:40:27.770318 tlcl_extend: response is 0
357 15:40:27.779300 tlcl_extend: response is 0
358 15:40:27.786337 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 15:40:27.789811 CBFS @ c08000 size 3f8000
360 15:40:27.793240 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 15:40:27.799665 CBFS: Locating 'fallback/romstage'
362 15:40:27.802973 CBFS: Found @ offset 80 size 145fc
363 15:40:27.806085 Accumulated console time in verstage 98 ms
364 15:40:27.806569
365 15:40:27.806946
366 15:40:27.819106 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 15:40:27.826011 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 15:40:27.828993 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 15:40:27.832352 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 15:40:27.839524 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 15:40:27.842793 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 15:40:27.845956 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 15:40:27.849108 TCO_STS: 0000 0000
374 15:40:27.852625 GEN_PMCON: e0015238 00000200
375 15:40:27.855444 GBLRST_CAUSE: 00000000 00000000
376 15:40:27.855966 prev_sleep_state 5
377 15:40:27.858984 Boot Count incremented to 40105
378 15:40:27.866512 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 15:40:27.869167 CBFS @ c08000 size 3f8000
380 15:40:27.875714 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 15:40:27.876271 CBFS: Locating 'fspm.bin'
382 15:40:27.882633 CBFS: Found @ offset 5ffc0 size 71000
383 15:40:27.886035 Chrome EC: UHEPI supported
384 15:40:27.892298 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 15:40:27.896103 Probing TPM: done!
386 15:40:27.902999 Connected to device vid:did:rid of 1ae0:0028:00
387 15:40:27.912332 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
388 15:40:27.918570 Initialized TPM device CR50 revision 0
389 15:40:27.928061 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 15:40:27.933983 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 15:40:27.937285 MRC cache found, size 1948
392 15:40:27.940665 bootmode is set to: 2
393 15:40:27.944530 PRMRR disabled by config.
394 15:40:27.947330 SPD INDEX = 1
395 15:40:27.950857 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 15:40:27.953957 CBFS @ c08000 size 3f8000
397 15:40:27.960532 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 15:40:27.961054 CBFS: Locating 'spd.bin'
399 15:40:27.963807 CBFS: Found @ offset 5fb80 size 400
400 15:40:27.967548 SPD: module type is LPDDR3
401 15:40:27.970340 SPD: module part is
402 15:40:27.977091 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 15:40:27.980357 SPD: device width 4 bits, bus width 8 bits
404 15:40:27.983654 SPD: module size is 4096 MB (per channel)
405 15:40:27.987181 memory slot: 0 configuration done.
406 15:40:27.990342 memory slot: 2 configuration done.
407 15:40:28.041828 CBMEM:
408 15:40:28.045142 IMD: root @ 99fff000 254 entries.
409 15:40:28.048146 IMD: root @ 99ffec00 62 entries.
410 15:40:28.051247 External stage cache:
411 15:40:28.054377 IMD: root @ 9abff000 254 entries.
412 15:40:28.057766 IMD: root @ 9abfec00 62 entries.
413 15:40:28.064518 Chrome EC: clear events_b mask to 0x0000000020004000
414 15:40:28.077622 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 15:40:28.090710 tlcl_write: response is 0
416 15:40:28.100499 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 15:40:28.106628 MRC: TPM MRC hash updated successfully.
418 15:40:28.107208 2 DIMMs found
419 15:40:28.109846 SMM Memory Map
420 15:40:28.113960 SMRAM : 0x9a000000 0x1000000
421 15:40:28.117007 Subregion 0: 0x9a000000 0xa00000
422 15:40:28.119775 Subregion 1: 0x9aa00000 0x200000
423 15:40:28.123340 Subregion 2: 0x9ac00000 0x400000
424 15:40:28.126572 top_of_ram = 0x9a000000
425 15:40:28.130220 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 15:40:28.136631 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 15:40:28.139831 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 15:40:28.146349 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 15:40:28.150264 CBFS @ c08000 size 3f8000
430 15:40:28.152864 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 15:40:28.156401 CBFS: Locating 'fallback/postcar'
432 15:40:28.159798 CBFS: Found @ offset 107000 size 4b44
433 15:40:28.166938 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 15:40:28.178758 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 15:40:28.182260 Processing 180 relocs. Offset value of 0x97c0c000
436 15:40:28.190375 Accumulated console time in romstage 286 ms
437 15:40:28.190846
438 15:40:28.191215
439 15:40:28.200712 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 15:40:28.207045 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 15:40:28.210233 CBFS @ c08000 size 3f8000
442 15:40:28.216908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 15:40:28.220634 CBFS: Locating 'fallback/ramstage'
444 15:40:28.223561 CBFS: Found @ offset 43380 size 1b9e8
445 15:40:28.229840 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 15:40:28.262847 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 15:40:28.265644 Processing 3976 relocs. Offset value of 0x98db0000
448 15:40:28.272202 Accumulated console time in postcar 52 ms
449 15:40:28.272672
450 15:40:28.273043
451 15:40:28.282152 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 15:40:28.289122 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 15:40:28.292440 WARNING: RO_VPD is uninitialized or empty.
454 15:40:28.295774 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 15:40:28.302439 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 15:40:28.302916 Normal boot.
457 15:40:28.309020 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 15:40:28.312397 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 15:40:28.315616 CBFS @ c08000 size 3f8000
460 15:40:28.322440 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 15:40:28.325484 CBFS: Locating 'cpu_microcode_blob.bin'
462 15:40:28.328685 CBFS: Found @ offset 14700 size 2ec00
463 15:40:28.332435 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 15:40:28.335500 Skip microcode update
465 15:40:28.341826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 15:40:28.342407 CBFS @ c08000 size 3f8000
467 15:40:28.348814 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 15:40:28.351873 CBFS: Locating 'fsps.bin'
469 15:40:28.355150 CBFS: Found @ offset d1fc0 size 35000
470 15:40:28.380586 Detected 4 core, 8 thread CPU.
471 15:40:28.383886 Setting up SMI for CPU
472 15:40:28.387313 IED base = 0x9ac00000
473 15:40:28.387826 IED size = 0x00400000
474 15:40:28.390548 Will perform SMM setup.
475 15:40:28.397337 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 15:40:28.403745 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 15:40:28.407757 Processing 16 relocs. Offset value of 0x00030000
478 15:40:28.410620 Attempting to start 7 APs
479 15:40:28.413995 Waiting for 10ms after sending INIT.
480 15:40:28.430574 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
481 15:40:28.431147 done.
482 15:40:28.433981 AP: slot 1 apic_id 3.
483 15:40:28.437100 AP: slot 2 apic_id 2.
484 15:40:28.440425 Waiting for 2nd SIPI to complete...done.
485 15:40:28.443956 AP: slot 4 apic_id 5.
486 15:40:28.444529 AP: slot 5 apic_id 4.
487 15:40:28.447101 AP: slot 6 apic_id 7.
488 15:40:28.450312 AP: slot 7 apic_id 6.
489 15:40:28.456460 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 15:40:28.460480 Processing 13 relocs. Offset value of 0x00038000
491 15:40:28.466940 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 15:40:28.473808 Installing SMM handler to 0x9a000000
493 15:40:28.480261 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 15:40:28.483301 Processing 658 relocs. Offset value of 0x9a010000
495 15:40:28.493557 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 15:40:28.496820 Processing 13 relocs. Offset value of 0x9a008000
497 15:40:28.503329 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 15:40:28.509992 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 15:40:28.513051 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 15:40:28.519785 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 15:40:28.527048 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 15:40:28.533189 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 15:40:28.536435 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 15:40:28.543202 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 15:40:28.546174 Clearing SMI status registers
506 15:40:28.550061 SMI_STS: PM1
507 15:40:28.550531 PM1_STS: PWRBTN
508 15:40:28.553054 TCO_STS: SECOND_TO
509 15:40:28.556199 New SMBASE 0x9a000000
510 15:40:28.559366 In relocation handler: CPU 0
511 15:40:28.563103 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 15:40:28.566569 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 15:40:28.569607 Relocation complete.
514 15:40:28.572715 New SMBASE 0x99fff400
515 15:40:28.573239 In relocation handler: CPU 3
516 15:40:28.580052 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 15:40:28.582574 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 15:40:28.585843 Relocation complete.
519 15:40:28.589605 New SMBASE 0x99fff800
520 15:40:28.590085 In relocation handler: CPU 2
521 15:40:28.596163 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
522 15:40:28.599896 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 15:40:28.602685 Relocation complete.
524 15:40:28.603157 New SMBASE 0x99fffc00
525 15:40:28.605879 In relocation handler: CPU 1
526 15:40:28.612992 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
527 15:40:28.616481 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 15:40:28.619416 Relocation complete.
529 15:40:28.619918 New SMBASE 0x99ffe400
530 15:40:28.623013 In relocation handler: CPU 7
531 15:40:28.626155 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
532 15:40:28.633096 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 15:40:28.635966 Relocation complete.
534 15:40:28.636439 New SMBASE 0x99ffe800
535 15:40:28.639580 In relocation handler: CPU 6
536 15:40:28.642710 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
537 15:40:28.649558 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 15:40:28.652572 Relocation complete.
539 15:40:28.653044 New SMBASE 0x99ffec00
540 15:40:28.655607 In relocation handler: CPU 5
541 15:40:28.659281 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
542 15:40:28.665978 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 15:40:28.666457 Relocation complete.
544 15:40:28.669351 New SMBASE 0x99fff000
545 15:40:28.672814 In relocation handler: CPU 4
546 15:40:28.675949 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 15:40:28.682366 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 15:40:28.682932 Relocation complete.
549 15:40:28.685889 Initializing CPU #0
550 15:40:28.689428 CPU: vendor Intel device 806ec
551 15:40:28.692691 CPU: family 06, model 8e, stepping 0c
552 15:40:28.696482 Clearing out pending MCEs
553 15:40:28.698895 Setting up local APIC...
554 15:40:28.699367 apic_id: 0x00 done.
555 15:40:28.702377 Turbo is available but hidden
556 15:40:28.706149 Turbo is available and visible
557 15:40:28.709090 VMX status: enabled
558 15:40:28.712399 IA32_FEATURE_CONTROL status: locked
559 15:40:28.715619 Skip microcode update
560 15:40:28.716122 CPU #0 initialized
561 15:40:28.719484 Initializing CPU #3
562 15:40:28.720102 Initializing CPU #2
563 15:40:28.722290 Initializing CPU #1
564 15:40:28.725735 CPU: vendor Intel device 806ec
565 15:40:28.728996 CPU: family 06, model 8e, stepping 0c
566 15:40:28.732635 CPU: vendor Intel device 806ec
567 15:40:28.735582 CPU: family 06, model 8e, stepping 0c
568 15:40:28.738886 Clearing out pending MCEs
569 15:40:28.742491 Clearing out pending MCEs
570 15:40:28.745792 Setting up local APIC...
571 15:40:28.748635 CPU: vendor Intel device 806ec
572 15:40:28.751965 CPU: family 06, model 8e, stepping 0c
573 15:40:28.752528 Clearing out pending MCEs
574 15:40:28.755394 Initializing CPU #6
575 15:40:28.758472 Initializing CPU #7
576 15:40:28.762091 CPU: vendor Intel device 806ec
577 15:40:28.765628 CPU: family 06, model 8e, stepping 0c
578 15:40:28.768660 Setting up local APIC...
579 15:40:28.769148 apic_id: 0x02 done.
580 15:40:28.771986 Setting up local APIC...
581 15:40:28.775659 Initializing CPU #4
582 15:40:28.776208 Clearing out pending MCEs
583 15:40:28.778781 CPU: vendor Intel device 806ec
584 15:40:28.781836 CPU: family 06, model 8e, stepping 0c
585 15:40:28.785264 Setting up local APIC...
586 15:40:28.788722 apic_id: 0x01 done.
587 15:40:28.792076 CPU: vendor Intel device 806ec
588 15:40:28.795621 CPU: family 06, model 8e, stepping 0c
589 15:40:28.798727 Initializing CPU #5
590 15:40:28.799307 Clearing out pending MCEs
591 15:40:28.802057 CPU: vendor Intel device 806ec
592 15:40:28.805362 CPU: family 06, model 8e, stepping 0c
593 15:40:28.808688 Setting up local APIC...
594 15:40:28.812400 apic_id: 0x07 done.
595 15:40:28.815739 Clearing out pending MCEs
596 15:40:28.816352 VMX status: enabled
597 15:40:28.818790 Setting up local APIC...
598 15:40:28.821753 apic_id: 0x03 done.
599 15:40:28.822255 VMX status: enabled
600 15:40:28.825515 VMX status: enabled
601 15:40:28.828614 IA32_FEATURE_CONTROL status: locked
602 15:40:28.831668 IA32_FEATURE_CONTROL status: locked
603 15:40:28.834908 Skip microcode update
604 15:40:28.835395 Skip microcode update
605 15:40:28.838381 CPU #2 initialized
606 15:40:28.841999 CPU #1 initialized
607 15:40:28.845184 IA32_FEATURE_CONTROL status: locked
608 15:40:28.845685 apic_id: 0x06 done.
609 15:40:28.848379 Skip microcode update
610 15:40:28.852023 VMX status: enabled
611 15:40:28.852621 CPU #6 initialized
612 15:40:28.854939 VMX status: enabled
613 15:40:28.858256 Clearing out pending MCEs
614 15:40:28.858675 apic_id: 0x05 done.
615 15:40:28.861732 Setting up local APIC...
616 15:40:28.865173 IA32_FEATURE_CONTROL status: locked
617 15:40:28.868348 IA32_FEATURE_CONTROL status: locked
618 15:40:28.871628 apic_id: 0x04 done.
619 15:40:28.872091 VMX status: enabled
620 15:40:28.874947 VMX status: enabled
621 15:40:28.878495 IA32_FEATURE_CONTROL status: locked
622 15:40:28.881614 IA32_FEATURE_CONTROL status: locked
623 15:40:28.884729 Skip microcode update
624 15:40:28.888118 Skip microcode update
625 15:40:28.888570 CPU #4 initialized
626 15:40:28.891230 CPU #5 initialized
627 15:40:28.891638 Skip microcode update
628 15:40:28.894821 Skip microcode update
629 15:40:28.898060 CPU #3 initialized
630 15:40:28.898504 CPU #7 initialized
631 15:40:28.904516 bsp_do_flight_plan done after 461 msecs.
632 15:40:28.904982 CPU: frequency set to 4200 MHz
633 15:40:28.908070 Enabling SMIs.
634 15:40:28.908504 Locking SMM.
635 15:40:28.923972 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 15:40:28.927342 CBFS @ c08000 size 3f8000
637 15:40:28.934033 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 15:40:28.934509 CBFS: Locating 'vbt.bin'
639 15:40:28.937236 CBFS: Found @ offset 5f5c0 size 499
640 15:40:28.943959 Found a VBT of 4608 bytes after decompression
641 15:40:29.128317 Display FSP Version Info HOB
642 15:40:29.131669 Reference Code - CPU = 9.0.1e.30
643 15:40:29.134995 uCode Version = 0.0.0.ca
644 15:40:29.138668 TXT ACM version = ff.ff.ff.ffff
645 15:40:29.141494 Display FSP Version Info HOB
646 15:40:29.145014 Reference Code - ME = 9.0.1e.30
647 15:40:29.148182 MEBx version = 0.0.0.0
648 15:40:29.151527 ME Firmware Version = Consumer SKU
649 15:40:29.154692 Display FSP Version Info HOB
650 15:40:29.158215 Reference Code - CML PCH = 9.0.1e.30
651 15:40:29.161365 PCH-CRID Status = Disabled
652 15:40:29.164466 PCH-CRID Original Value = ff.ff.ff.ffff
653 15:40:29.168016 PCH-CRID New Value = ff.ff.ff.ffff
654 15:40:29.171607 OPROM - RST - RAID = ff.ff.ff.ffff
655 15:40:29.174393 ChipsetInit Base Version = ff.ff.ff.ffff
656 15:40:29.178075 ChipsetInit Oem Version = ff.ff.ff.ffff
657 15:40:29.181595 Display FSP Version Info HOB
658 15:40:29.188173 Reference Code - SA - System Agent = 9.0.1e.30
659 15:40:29.191315 Reference Code - MRC = 0.7.1.6c
660 15:40:29.191869 SA - PCIe Version = 9.0.1e.30
661 15:40:29.194274 SA-CRID Status = Disabled
662 15:40:29.197665 SA-CRID Original Value = 0.0.0.c
663 15:40:29.201511 SA-CRID New Value = 0.0.0.c
664 15:40:29.204161 OPROM - VBIOS = ff.ff.ff.ffff
665 15:40:29.207619 RTC Init
666 15:40:29.210933 Set power on after power failure.
667 15:40:29.211420 Disabling Deep S3
668 15:40:29.214802 Disabling Deep S3
669 15:40:29.215390 Disabling Deep S4
670 15:40:29.217493 Disabling Deep S4
671 15:40:29.218045 Disabling Deep S5
672 15:40:29.221229 Disabling Deep S5
673 15:40:29.227595 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
674 15:40:29.228203 Enumerating buses...
675 15:40:29.234041 Show all devs... Before device enumeration.
676 15:40:29.234531 Root Device: enabled 1
677 15:40:29.237282 CPU_CLUSTER: 0: enabled 1
678 15:40:29.240674 DOMAIN: 0000: enabled 1
679 15:40:29.244397 APIC: 00: enabled 1
680 15:40:29.244880 PCI: 00:00.0: enabled 1
681 15:40:29.247661 PCI: 00:02.0: enabled 1
682 15:40:29.251363 PCI: 00:04.0: enabled 0
683 15:40:29.252047 PCI: 00:05.0: enabled 0
684 15:40:29.254584 PCI: 00:12.0: enabled 1
685 15:40:29.257353 PCI: 00:12.5: enabled 0
686 15:40:29.260978 PCI: 00:12.6: enabled 0
687 15:40:29.261647 PCI: 00:14.0: enabled 1
688 15:40:29.263921 PCI: 00:14.1: enabled 0
689 15:40:29.267431 PCI: 00:14.3: enabled 1
690 15:40:29.270558 PCI: 00:14.5: enabled 0
691 15:40:29.271056 PCI: 00:15.0: enabled 1
692 15:40:29.273824 PCI: 00:15.1: enabled 1
693 15:40:29.277218 PCI: 00:15.2: enabled 0
694 15:40:29.280785 PCI: 00:15.3: enabled 0
695 15:40:29.281277 PCI: 00:16.0: enabled 1
696 15:40:29.283744 PCI: 00:16.1: enabled 0
697 15:40:29.287409 PCI: 00:16.2: enabled 0
698 15:40:29.290686 PCI: 00:16.3: enabled 0
699 15:40:29.291176 PCI: 00:16.4: enabled 0
700 15:40:29.294277 PCI: 00:16.5: enabled 0
701 15:40:29.297289 PCI: 00:17.0: enabled 1
702 15:40:29.297781 PCI: 00:19.0: enabled 1
703 15:40:29.300448 PCI: 00:19.1: enabled 0
704 15:40:29.304138 PCI: 00:19.2: enabled 0
705 15:40:29.307123 PCI: 00:1a.0: enabled 0
706 15:40:29.307613 PCI: 00:1c.0: enabled 0
707 15:40:29.310771 PCI: 00:1c.1: enabled 0
708 15:40:29.314244 PCI: 00:1c.2: enabled 0
709 15:40:29.317460 PCI: 00:1c.3: enabled 0
710 15:40:29.317950 PCI: 00:1c.4: enabled 0
711 15:40:29.320741 PCI: 00:1c.5: enabled 0
712 15:40:29.324040 PCI: 00:1c.6: enabled 0
713 15:40:29.324530 PCI: 00:1c.7: enabled 0
714 15:40:29.327204 PCI: 00:1d.0: enabled 1
715 15:40:29.330545 PCI: 00:1d.1: enabled 0
716 15:40:29.334176 PCI: 00:1d.2: enabled 0
717 15:40:29.334769 PCI: 00:1d.3: enabled 0
718 15:40:29.337366 PCI: 00:1d.4: enabled 0
719 15:40:29.340079 PCI: 00:1d.5: enabled 1
720 15:40:29.343985 PCI: 00:1e.0: enabled 1
721 15:40:29.344642 PCI: 00:1e.1: enabled 0
722 15:40:29.347335 PCI: 00:1e.2: enabled 1
723 15:40:29.350842 PCI: 00:1e.3: enabled 1
724 15:40:29.353395 PCI: 00:1f.0: enabled 1
725 15:40:29.353885 PCI: 00:1f.1: enabled 1
726 15:40:29.356756 PCI: 00:1f.2: enabled 1
727 15:40:29.360190 PCI: 00:1f.3: enabled 1
728 15:40:29.363742 PCI: 00:1f.4: enabled 1
729 15:40:29.364295 PCI: 00:1f.5: enabled 1
730 15:40:29.367077 PCI: 00:1f.6: enabled 0
731 15:40:29.370220 USB0 port 0: enabled 1
732 15:40:29.370799 I2C: 00:15: enabled 1
733 15:40:29.373415 I2C: 00:5d: enabled 1
734 15:40:29.376690 GENERIC: 0.0: enabled 1
735 15:40:29.377187 I2C: 00:1a: enabled 1
736 15:40:29.380232 I2C: 00:38: enabled 1
737 15:40:29.383190 I2C: 00:39: enabled 1
738 15:40:29.383644 I2C: 00:3a: enabled 1
739 15:40:29.386782 I2C: 00:3b: enabled 1
740 15:40:29.390177 PCI: 00:00.0: enabled 1
741 15:40:29.390760 SPI: 00: enabled 1
742 15:40:29.393746 SPI: 01: enabled 1
743 15:40:29.396685 PNP: 0c09.0: enabled 1
744 15:40:29.397097 USB2 port 0: enabled 1
745 15:40:29.399640 USB2 port 1: enabled 1
746 15:40:29.403026 USB2 port 2: enabled 0
747 15:40:29.406332 USB2 port 3: enabled 0
748 15:40:29.406816 USB2 port 5: enabled 0
749 15:40:29.409814 USB2 port 6: enabled 1
750 15:40:29.413018 USB2 port 9: enabled 1
751 15:40:29.413527 USB3 port 0: enabled 1
752 15:40:29.416781 USB3 port 1: enabled 1
753 15:40:29.419779 USB3 port 2: enabled 1
754 15:40:29.423299 USB3 port 3: enabled 1
755 15:40:29.423937 USB3 port 4: enabled 0
756 15:40:29.426593 APIC: 03: enabled 1
757 15:40:29.427069 APIC: 02: enabled 1
758 15:40:29.429984 APIC: 01: enabled 1
759 15:40:29.433095 APIC: 05: enabled 1
760 15:40:29.433579 APIC: 04: enabled 1
761 15:40:29.436561 APIC: 07: enabled 1
762 15:40:29.439598 APIC: 06: enabled 1
763 15:40:29.440121 Compare with tree...
764 15:40:29.443008 Root Device: enabled 1
765 15:40:29.446709 CPU_CLUSTER: 0: enabled 1
766 15:40:29.447196 APIC: 00: enabled 1
767 15:40:29.449511 APIC: 03: enabled 1
768 15:40:29.453508 APIC: 02: enabled 1
769 15:40:29.454124 APIC: 01: enabled 1
770 15:40:29.456244 APIC: 05: enabled 1
771 15:40:29.459373 APIC: 04: enabled 1
772 15:40:29.459785 APIC: 07: enabled 1
773 15:40:29.462835 APIC: 06: enabled 1
774 15:40:29.466437 DOMAIN: 0000: enabled 1
775 15:40:29.469493 PCI: 00:00.0: enabled 1
776 15:40:29.469977 PCI: 00:02.0: enabled 1
777 15:40:29.472470 PCI: 00:04.0: enabled 0
778 15:40:29.476286 PCI: 00:05.0: enabled 0
779 15:40:29.479413 PCI: 00:12.0: enabled 1
780 15:40:29.482484 PCI: 00:12.5: enabled 0
781 15:40:29.482962 PCI: 00:12.6: enabled 0
782 15:40:29.486422 PCI: 00:14.0: enabled 1
783 15:40:29.489538 USB0 port 0: enabled 1
784 15:40:29.492724 USB2 port 0: enabled 1
785 15:40:29.496109 USB2 port 1: enabled 1
786 15:40:29.496709 USB2 port 2: enabled 0
787 15:40:29.499238 USB2 port 3: enabled 0
788 15:40:29.502789 USB2 port 5: enabled 0
789 15:40:29.506157 USB2 port 6: enabled 1
790 15:40:29.509469 USB2 port 9: enabled 1
791 15:40:29.512824 USB3 port 0: enabled 1
792 15:40:29.513400 USB3 port 1: enabled 1
793 15:40:29.515770 USB3 port 2: enabled 1
794 15:40:29.519471 USB3 port 3: enabled 1
795 15:40:29.522747 USB3 port 4: enabled 0
796 15:40:29.525839 PCI: 00:14.1: enabled 0
797 15:40:29.526323 PCI: 00:14.3: enabled 1
798 15:40:29.529271 PCI: 00:14.5: enabled 0
799 15:40:29.532496 PCI: 00:15.0: enabled 1
800 15:40:29.536190 I2C: 00:15: enabled 1
801 15:40:29.539508 PCI: 00:15.1: enabled 1
802 15:40:29.540132 I2C: 00:5d: enabled 1
803 15:40:29.542973 GENERIC: 0.0: enabled 1
804 15:40:29.545611 PCI: 00:15.2: enabled 0
805 15:40:29.549081 PCI: 00:15.3: enabled 0
806 15:40:29.552597 PCI: 00:16.0: enabled 1
807 15:40:29.553075 PCI: 00:16.1: enabled 0
808 15:40:29.555781 PCI: 00:16.2: enabled 0
809 15:40:29.559249 PCI: 00:16.3: enabled 0
810 15:40:29.562093 PCI: 00:16.4: enabled 0
811 15:40:29.565673 PCI: 00:16.5: enabled 0
812 15:40:29.566154 PCI: 00:17.0: enabled 1
813 15:40:29.568648 PCI: 00:19.0: enabled 1
814 15:40:29.572288 I2C: 00:1a: enabled 1
815 15:40:29.575708 I2C: 00:38: enabled 1
816 15:40:29.576263 I2C: 00:39: enabled 1
817 15:40:29.578612 I2C: 00:3a: enabled 1
818 15:40:29.581874 I2C: 00:3b: enabled 1
819 15:40:29.585430 PCI: 00:19.1: enabled 0
820 15:40:29.588677 PCI: 00:19.2: enabled 0
821 15:40:29.589161 PCI: 00:1a.0: enabled 0
822 15:40:29.592241 PCI: 00:1c.0: enabled 0
823 15:40:29.595085 PCI: 00:1c.1: enabled 0
824 15:40:29.598697 PCI: 00:1c.2: enabled 0
825 15:40:29.599279 PCI: 00:1c.3: enabled 0
826 15:40:29.601741 PCI: 00:1c.4: enabled 0
827 15:40:29.605022 PCI: 00:1c.5: enabled 0
828 15:40:29.609148 PCI: 00:1c.6: enabled 0
829 15:40:29.611755 PCI: 00:1c.7: enabled 0
830 15:40:29.612264 PCI: 00:1d.0: enabled 1
831 15:40:29.615312 PCI: 00:1d.1: enabled 0
832 15:40:29.618611 PCI: 00:1d.2: enabled 0
833 15:40:29.621839 PCI: 00:1d.3: enabled 0
834 15:40:29.625327 PCI: 00:1d.4: enabled 0
835 15:40:29.625812 PCI: 00:1d.5: enabled 1
836 15:40:29.628375 PCI: 00:00.0: enabled 1
837 15:40:29.631874 PCI: 00:1e.0: enabled 1
838 15:40:29.634874 PCI: 00:1e.1: enabled 0
839 15:40:29.638405 PCI: 00:1e.2: enabled 1
840 15:40:29.638976 SPI: 00: enabled 1
841 15:40:29.641744 PCI: 00:1e.3: enabled 1
842 15:40:29.644826 SPI: 01: enabled 1
843 15:40:29.648042 PCI: 00:1f.0: enabled 1
844 15:40:29.648477 PNP: 0c09.0: enabled 1
845 15:40:29.651776 PCI: 00:1f.1: enabled 1
846 15:40:29.654743 PCI: 00:1f.2: enabled 1
847 15:40:29.658271 PCI: 00:1f.3: enabled 1
848 15:40:29.661616 PCI: 00:1f.4: enabled 1
849 15:40:29.662056 PCI: 00:1f.5: enabled 1
850 15:40:29.664578 PCI: 00:1f.6: enabled 0
851 15:40:29.668099 Root Device scanning...
852 15:40:29.671370 scan_static_bus for Root Device
853 15:40:29.674860 CPU_CLUSTER: 0 enabled
854 15:40:29.675445 DOMAIN: 0000 enabled
855 15:40:29.677985 DOMAIN: 0000 scanning...
856 15:40:29.681909 PCI: pci_scan_bus for bus 00
857 15:40:29.685052 PCI: 00:00.0 [8086/0000] ops
858 15:40:29.688330 PCI: 00:00.0 [8086/9b61] enabled
859 15:40:29.691955 PCI: 00:02.0 [8086/0000] bus ops
860 15:40:29.694729 PCI: 00:02.0 [8086/9b41] enabled
861 15:40:29.698435 PCI: 00:04.0 [8086/1903] disabled
862 15:40:29.701695 PCI: 00:08.0 [8086/1911] enabled
863 15:40:29.704617 PCI: 00:12.0 [8086/02f9] enabled
864 15:40:29.708211 PCI: 00:14.0 [8086/0000] bus ops
865 15:40:29.711301 PCI: 00:14.0 [8086/02ed] enabled
866 15:40:29.714998 PCI: 00:14.2 [8086/02ef] enabled
867 15:40:29.718285 PCI: 00:14.3 [8086/02f0] enabled
868 15:40:29.721189 PCI: 00:15.0 [8086/0000] bus ops
869 15:40:29.725051 PCI: 00:15.0 [8086/02e8] enabled
870 15:40:29.728060 PCI: 00:15.1 [8086/0000] bus ops
871 15:40:29.730993 PCI: 00:15.1 [8086/02e9] enabled
872 15:40:29.734326 PCI: 00:16.0 [8086/0000] ops
873 15:40:29.738304 PCI: 00:16.0 [8086/02e0] enabled
874 15:40:29.741467 PCI: 00:17.0 [8086/0000] ops
875 15:40:29.744765 PCI: 00:17.0 [8086/02d3] enabled
876 15:40:29.747946 PCI: 00:19.0 [8086/0000] bus ops
877 15:40:29.751415 PCI: 00:19.0 [8086/02c5] enabled
878 15:40:29.754927 PCI: 00:1d.0 [8086/0000] bus ops
879 15:40:29.758352 PCI: 00:1d.0 [8086/02b0] enabled
880 15:40:29.761135 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 15:40:29.764540 PCI: 00:1e.0 [8086/0000] ops
882 15:40:29.768060 PCI: 00:1e.0 [8086/02a8] enabled
883 15:40:29.771215 PCI: 00:1e.2 [8086/0000] bus ops
884 15:40:29.774351 PCI: 00:1e.2 [8086/02aa] enabled
885 15:40:29.777830 PCI: 00:1e.3 [8086/0000] bus ops
886 15:40:29.781222 PCI: 00:1e.3 [8086/02ab] enabled
887 15:40:29.784489 PCI: 00:1f.0 [8086/0000] bus ops
888 15:40:29.788154 PCI: 00:1f.0 [8086/0284] enabled
889 15:40:29.794767 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 15:40:29.801102 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 15:40:29.804312 PCI: 00:1f.3 [8086/0000] bus ops
892 15:40:29.808046 PCI: 00:1f.3 [8086/02c8] enabled
893 15:40:29.811129 PCI: 00:1f.4 [8086/0000] bus ops
894 15:40:29.814597 PCI: 00:1f.4 [8086/02a3] enabled
895 15:40:29.817712 PCI: 00:1f.5 [8086/0000] bus ops
896 15:40:29.820962 PCI: 00:1f.5 [8086/02a4] enabled
897 15:40:29.824553 PCI: Leftover static devices:
898 15:40:29.825143 PCI: 00:05.0
899 15:40:29.825526 PCI: 00:12.5
900 15:40:29.827626 PCI: 00:12.6
901 15:40:29.828138 PCI: 00:14.1
902 15:40:29.831096 PCI: 00:14.5
903 15:40:29.831681 PCI: 00:15.2
904 15:40:29.832096 PCI: 00:15.3
905 15:40:29.834408 PCI: 00:16.1
906 15:40:29.834889 PCI: 00:16.2
907 15:40:29.837547 PCI: 00:16.3
908 15:40:29.838139 PCI: 00:16.4
909 15:40:29.841147 PCI: 00:16.5
910 15:40:29.841727 PCI: 00:19.1
911 15:40:29.842110 PCI: 00:19.2
912 15:40:29.844189 PCI: 00:1a.0
913 15:40:29.844676 PCI: 00:1c.0
914 15:40:29.847626 PCI: 00:1c.1
915 15:40:29.848236 PCI: 00:1c.2
916 15:40:29.848620 PCI: 00:1c.3
917 15:40:29.850956 PCI: 00:1c.4
918 15:40:29.851554 PCI: 00:1c.5
919 15:40:29.853818 PCI: 00:1c.6
920 15:40:29.854359 PCI: 00:1c.7
921 15:40:29.854809 PCI: 00:1d.1
922 15:40:29.857638 PCI: 00:1d.2
923 15:40:29.858044 PCI: 00:1d.3
924 15:40:29.860491 PCI: 00:1d.4
925 15:40:29.860887 PCI: 00:1d.5
926 15:40:29.863802 PCI: 00:1e.1
927 15:40:29.864231 PCI: 00:1f.1
928 15:40:29.864579 PCI: 00:1f.2
929 15:40:29.867160 PCI: 00:1f.6
930 15:40:29.870412 PCI: Check your devicetree.cb.
931 15:40:29.870894 PCI: 00:02.0 scanning...
932 15:40:29.877756 scan_generic_bus for PCI: 00:02.0
933 15:40:29.880945 scan_generic_bus for PCI: 00:02.0 done
934 15:40:29.884296 scan_bus: scanning of bus PCI: 00:02.0 took 10183 usecs
935 15:40:29.887430 PCI: 00:14.0 scanning...
936 15:40:29.890721 scan_static_bus for PCI: 00:14.0
937 15:40:29.894160 USB0 port 0 enabled
938 15:40:29.897781 USB0 port 0 scanning...
939 15:40:29.900552 scan_static_bus for USB0 port 0
940 15:40:29.901038 USB2 port 0 enabled
941 15:40:29.903881 USB2 port 1 enabled
942 15:40:29.907492 USB2 port 2 disabled
943 15:40:29.908140 USB2 port 3 disabled
944 15:40:29.910936 USB2 port 5 disabled
945 15:40:29.911421 USB2 port 6 enabled
946 15:40:29.914733 USB2 port 9 enabled
947 15:40:29.917723 USB3 port 0 enabled
948 15:40:29.918476 USB3 port 1 enabled
949 15:40:29.920946 USB3 port 2 enabled
950 15:40:29.924320 USB3 port 3 enabled
951 15:40:29.924918 USB3 port 4 disabled
952 15:40:29.927474 USB2 port 0 scanning...
953 15:40:29.930734 scan_static_bus for USB2 port 0
954 15:40:29.934185 scan_static_bus for USB2 port 0 done
955 15:40:29.940216 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
956 15:40:29.940705 USB2 port 1 scanning...
957 15:40:29.944128 scan_static_bus for USB2 port 1
958 15:40:29.951372 scan_static_bus for USB2 port 1 done
959 15:40:29.953583 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
960 15:40:29.957317 USB2 port 6 scanning...
961 15:40:29.960272 scan_static_bus for USB2 port 6
962 15:40:29.963921 scan_static_bus for USB2 port 6 done
963 15:40:29.970352 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
964 15:40:29.970891 USB2 port 9 scanning...
965 15:40:29.973841 scan_static_bus for USB2 port 9
966 15:40:29.980699 scan_static_bus for USB2 port 9 done
967 15:40:29.983773 scan_bus: scanning of bus USB2 port 9 took 9685 usecs
968 15:40:29.987312 USB3 port 0 scanning...
969 15:40:29.990517 scan_static_bus for USB3 port 0
970 15:40:29.993478 scan_static_bus for USB3 port 0 done
971 15:40:30.000557 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
972 15:40:30.001154 USB3 port 1 scanning...
973 15:40:30.003889 scan_static_bus for USB3 port 1
974 15:40:30.010929 scan_static_bus for USB3 port 1 done
975 15:40:30.014408 scan_bus: scanning of bus USB3 port 1 took 9677 usecs
976 15:40:30.017497 USB3 port 2 scanning...
977 15:40:30.020423 scan_static_bus for USB3 port 2
978 15:40:30.023702 scan_static_bus for USB3 port 2 done
979 15:40:30.030448 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
980 15:40:30.031046 USB3 port 3 scanning...
981 15:40:30.034110 scan_static_bus for USB3 port 3
982 15:40:30.040455 scan_static_bus for USB3 port 3 done
983 15:40:30.043954 scan_bus: scanning of bus USB3 port 3 took 9694 usecs
984 15:40:30.047162 scan_static_bus for USB0 port 0 done
985 15:40:30.054053 scan_bus: scanning of bus USB0 port 0 took 155280 usecs
986 15:40:30.056835 scan_static_bus for PCI: 00:14.0 done
987 15:40:30.063683 scan_bus: scanning of bus PCI: 00:14.0 took 172901 usecs
988 15:40:30.067136 PCI: 00:15.0 scanning...
989 15:40:30.069813 scan_generic_bus for PCI: 00:15.0
990 15:40:30.073248 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 15:40:30.076742 scan_generic_bus for PCI: 00:15.0 done
992 15:40:30.083460 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
993 15:40:30.086595 PCI: 00:15.1 scanning...
994 15:40:30.089638 scan_generic_bus for PCI: 00:15.1
995 15:40:30.093425 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 15:40:30.096282 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 15:40:30.099921 scan_generic_bus for PCI: 00:15.1 done
998 15:40:30.107034 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
999 15:40:30.109848 PCI: 00:19.0 scanning...
1000 15:40:30.113404 scan_generic_bus for PCI: 00:19.0
1001 15:40:30.117283 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 15:40:30.119632 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 15:40:30.126281 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 15:40:30.130049 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 15:40:30.133187 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 15:40:30.136556 scan_generic_bus for PCI: 00:19.0 done
1007 15:40:30.142856 scan_bus: scanning of bus PCI: 00:19.0 took 30716 usecs
1008 15:40:30.145878 PCI: 00:1d.0 scanning...
1009 15:40:30.149291 do_pci_scan_bridge for PCI: 00:1d.0
1010 15:40:30.152307 PCI: pci_scan_bus for bus 01
1011 15:40:30.155963 PCI: 01:00.0 [1c5c/1327] enabled
1012 15:40:30.159551 Enabling Common Clock Configuration
1013 15:40:30.162566 L1 Sub-State supported from root port 29
1014 15:40:30.165820 L1 Sub-State Support = 0xf
1015 15:40:30.168955 CommonModeRestoreTime = 0x28
1016 15:40:30.172647 Power On Value = 0x16, Power On Scale = 0x0
1017 15:40:30.175693 ASPM: Enabled L1
1018 15:40:30.179122 scan_bus: scanning of bus PCI: 00:1d.0 took 32778 usecs
1019 15:40:30.182629 PCI: 00:1e.2 scanning...
1020 15:40:30.185955 scan_generic_bus for PCI: 00:1e.2
1021 15:40:30.189413 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 15:40:30.195826 scan_generic_bus for PCI: 00:1e.2 done
1023 15:40:30.199097 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1024 15:40:30.202642 PCI: 00:1e.3 scanning...
1025 15:40:30.205606 scan_generic_bus for PCI: 00:1e.3
1026 15:40:30.209021 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 15:40:30.212838 scan_generic_bus for PCI: 00:1e.3 done
1028 15:40:30.219562 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1029 15:40:30.222432 PCI: 00:1f.0 scanning...
1030 15:40:30.226027 scan_static_bus for PCI: 00:1f.0
1031 15:40:30.229092 PNP: 0c09.0 enabled
1032 15:40:30.232369 scan_static_bus for PCI: 00:1f.0 done
1033 15:40:30.235386 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1034 15:40:30.239115 PCI: 00:1f.3 scanning...
1035 15:40:30.245431 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1036 15:40:30.248743 PCI: 00:1f.4 scanning...
1037 15:40:30.252546 scan_generic_bus for PCI: 00:1f.4
1038 15:40:30.255613 scan_generic_bus for PCI: 00:1f.4 done
1039 15:40:30.262210 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1040 15:40:30.262288 PCI: 00:1f.5 scanning...
1041 15:40:30.268691 scan_generic_bus for PCI: 00:1f.5
1042 15:40:30.272207 scan_generic_bus for PCI: 00:1f.5 done
1043 15:40:30.275514 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1044 15:40:30.281903 scan_bus: scanning of bus DOMAIN: 0000 took 604810 usecs
1045 15:40:30.285526 scan_static_bus for Root Device done
1046 15:40:30.291899 scan_bus: scanning of bus Root Device took 624651 usecs
1047 15:40:30.291981 done
1048 15:40:30.295413 Chrome EC: UHEPI supported
1049 15:40:30.302158 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 15:40:30.308568 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 15:40:30.312215 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 15:40:30.320266 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 15:40:30.324172 SPI flash protection: WPSW=0 SRP0=0
1054 15:40:30.329814 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 15:40:30.333185 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1056 15:40:30.337231 found VGA at PCI: 00:02.0
1057 15:40:30.339893 Setting up VGA for PCI: 00:02.0
1058 15:40:30.346526 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 15:40:30.350274 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 15:40:30.353421 Allocating resources...
1061 15:40:30.356299 Reading resources...
1062 15:40:30.359968 Root Device read_resources bus 0 link: 0
1063 15:40:30.363297 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 15:40:30.370182 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 15:40:30.373582 DOMAIN: 0000 read_resources bus 0 link: 0
1066 15:40:30.380504 PCI: 00:14.0 read_resources bus 0 link: 0
1067 15:40:30.383649 USB0 port 0 read_resources bus 0 link: 0
1068 15:40:30.392329 USB0 port 0 read_resources bus 0 link: 0 done
1069 15:40:30.395246 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 15:40:30.402314 PCI: 00:15.0 read_resources bus 1 link: 0
1071 15:40:30.405752 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 15:40:30.412448 PCI: 00:15.1 read_resources bus 2 link: 0
1073 15:40:30.416042 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 15:40:30.423688 PCI: 00:19.0 read_resources bus 3 link: 0
1075 15:40:30.430637 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 15:40:30.434351 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 15:40:30.440236 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 15:40:30.444090 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 15:40:30.449818 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 15:40:30.453579 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 15:40:30.460356 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 15:40:30.463396 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 15:40:30.470094 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 15:40:30.477030 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 15:40:30.479930 Root Device read_resources bus 0 link: 0 done
1086 15:40:30.483351 Done reading resources.
1087 15:40:30.486786 Show resources in subtree (Root Device)...After reading.
1088 15:40:30.493337 Root Device child on link 0 CPU_CLUSTER: 0
1089 15:40:30.496473 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 15:40:30.496969 APIC: 00
1091 15:40:30.499867 APIC: 03
1092 15:40:30.500472 APIC: 02
1093 15:40:30.503282 APIC: 01
1094 15:40:30.503820 APIC: 05
1095 15:40:30.504291 APIC: 04
1096 15:40:30.506744 APIC: 07
1097 15:40:30.507286 APIC: 06
1098 15:40:30.509562 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 15:40:30.519741 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 15:40:30.529837 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 15:40:30.579330 PCI: 00:00.0
1102 15:40:30.580404 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 15:40:30.580898 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 15:40:30.581703 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 15:40:30.582114 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 15:40:30.582466 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 15:40:30.629895 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 15:40:30.630808 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 15:40:30.631562 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 15:40:30.632538 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 15:40:30.632950 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 15:40:30.678861 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 15:40:30.679497 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 15:40:30.680339 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 15:40:30.681124 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 15:40:30.681552 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 15:40:30.728461 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 15:40:30.729088 PCI: 00:02.0
1119 15:40:30.729920 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 15:40:30.730355 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 15:40:30.731184 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 15:40:30.731590 PCI: 00:04.0
1123 15:40:30.731979 PCI: 00:08.0
1124 15:40:30.732371 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 15:40:30.732716 PCI: 00:12.0
1126 15:40:30.754632 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 15:40:30.755202 PCI: 00:14.0 child on link 0 USB0 port 0
1128 15:40:30.756011 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 15:40:30.758419 USB0 port 0 child on link 0 USB2 port 0
1130 15:40:30.758906 USB2 port 0
1131 15:40:30.759286 USB2 port 1
1132 15:40:30.761119 USB2 port 2
1133 15:40:30.761537 USB2 port 3
1134 15:40:30.764765 USB2 port 5
1135 15:40:30.767902 USB2 port 6
1136 15:40:30.768397 USB2 port 9
1137 15:40:30.771084 USB3 port 0
1138 15:40:30.771563 USB3 port 1
1139 15:40:30.774254 USB3 port 2
1140 15:40:30.774751 USB3 port 3
1141 15:40:30.777743 USB3 port 4
1142 15:40:30.778244 PCI: 00:14.2
1143 15:40:30.787519 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 15:40:30.797830 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 15:40:30.801263 PCI: 00:14.3
1146 15:40:30.810851 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 15:40:30.814626 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 15:40:30.824296 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 15:40:30.824869 I2C: 01:15
1150 15:40:30.831164 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 15:40:30.840644 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:40:30.841228 I2C: 02:5d
1153 15:40:30.844008 GENERIC: 0.0
1154 15:40:30.844513 PCI: 00:16.0
1155 15:40:30.853748 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 15:40:30.856962 PCI: 00:17.0
1157 15:40:30.866961 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 15:40:30.873788 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 15:40:30.884045 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 15:40:30.890652 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 15:40:30.900574 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 15:40:30.906789 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 15:40:30.913674 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 15:40:30.923444 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:40:30.923971 I2C: 03:1a
1166 15:40:30.926931 I2C: 03:38
1167 15:40:30.927413 I2C: 03:39
1168 15:40:30.930150 I2C: 03:3a
1169 15:40:30.930670 I2C: 03:3b
1170 15:40:30.933781 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 15:40:30.943529 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 15:40:30.953514 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 15:40:30.963103 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 15:40:30.963594 PCI: 01:00.0
1175 15:40:30.973314 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 15:40:30.976639 PCI: 00:1e.0
1177 15:40:30.986275 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 15:40:30.996717 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 15:40:30.999953 PCI: 00:1e.2 child on link 0 SPI: 00
1180 15:40:31.009881 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:40:31.013066 SPI: 00
1182 15:40:31.016298 PCI: 00:1e.3 child on link 0 SPI: 01
1183 15:40:31.026126 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 15:40:31.026630 SPI: 01
1185 15:40:31.032711 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 15:40:31.039460 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 15:40:31.049960 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 15:40:31.050546 PNP: 0c09.0
1189 15:40:31.059683 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 15:40:31.062566 PCI: 00:1f.3
1191 15:40:31.072828 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 15:40:31.082530 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 15:40:31.083159 PCI: 00:1f.4
1194 15:40:31.092751 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 15:40:31.102594 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 15:40:31.103172 PCI: 00:1f.5
1197 15:40:31.112533 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 15:40:31.119107 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 15:40:31.125801 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 15:40:31.132206 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 15:40:31.136005 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 15:40:31.138729 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 15:40:31.143066 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 15:40:31.145635 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 15:40:31.152306 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 15:40:31.158527 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 15:40:31.168526 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 15:40:31.175102 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 15:40:31.181695 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 15:40:31.185219 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 15:40:31.195091 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 15:40:31.198487 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 15:40:31.205191 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 15:40:31.208552 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 15:40:31.215207 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 15:40:31.218492 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 15:40:31.225315 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 15:40:31.229332 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 15:40:31.232025 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 15:40:31.238657 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 15:40:31.241972 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 15:40:31.248187 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 15:40:31.252200 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 15:40:31.258069 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 15:40:31.261629 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 15:40:31.268116 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 15:40:31.271403 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 15:40:31.278528 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 15:40:31.281521 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 15:40:31.287967 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 15:40:31.291543 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 15:40:31.294575 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 15:40:31.301645 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 15:40:31.304733 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 15:40:31.314735 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 15:40:31.318314 avoid_fixed_resources: DOMAIN: 0000
1237 15:40:31.324317 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 15:40:31.331024 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 15:40:31.337881 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 15:40:31.344234 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 15:40:31.354755 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 15:40:31.361140 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 15:40:31.367562 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 15:40:31.378013 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 15:40:31.384514 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 15:40:31.390866 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 15:40:31.397658 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 15:40:31.407318 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 15:40:31.407811 Setting resources...
1250 15:40:31.414594 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 15:40:31.417366 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 15:40:31.423918 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 15:40:31.427320 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 15:40:31.430352 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 15:40:31.437204 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 15:40:31.444080 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 15:40:31.450479 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 15:40:31.457184 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 15:40:31.463598 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 15:40:31.466915 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 15:40:31.470152 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 15:40:31.476557 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 15:40:31.479963 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 15:40:31.486353 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 15:40:31.490258 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 15:40:31.496852 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 15:40:31.500129 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 15:40:31.506765 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 15:40:31.509815 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 15:40:31.516662 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 15:40:31.519821 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 15:40:31.526793 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 15:40:31.529924 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 15:40:31.536369 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 15:40:31.539916 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 15:40:31.542975 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 15:40:31.549410 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 15:40:31.552665 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 15:40:31.559796 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 15:40:31.562955 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 15:40:31.569126 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 15:40:31.575678 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 15:40:31.582435 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 15:40:31.592767 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 15:40:31.599279 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 15:40:31.602235 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 15:40:31.612347 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 15:40:31.615626 Root Device assign_resources, bus 0 link: 0
1289 15:40:31.619049 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 15:40:31.629070 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 15:40:31.635260 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 15:40:31.645006 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 15:40:31.651711 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 15:40:31.662244 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 15:40:31.668527 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 15:40:31.675178 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 15:40:31.678716 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 15:40:31.688237 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 15:40:31.695325 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 15:40:31.701604 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 15:40:31.712173 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 15:40:31.715237 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 15:40:31.722117 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 15:40:31.728168 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 15:40:31.734718 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 15:40:31.738023 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 15:40:31.747982 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 15:40:31.754745 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 15:40:31.761388 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 15:40:31.771231 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 15:40:31.778039 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 15:40:31.784396 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 15:40:31.794703 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 15:40:31.801282 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 15:40:31.804943 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 15:40:31.811257 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 15:40:31.817707 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 15:40:31.828497 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 15:40:31.837663 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 15:40:31.841093 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 15:40:31.851280 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 15:40:31.854247 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 15:40:31.864008 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 15:40:31.870412 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 15:40:31.874296 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 15:40:31.880581 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 15:40:31.887243 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 15:40:31.894117 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 15:40:31.897292 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 15:40:31.903875 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 15:40:31.906864 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 15:40:31.914411 LPC: Trying to open IO window from 800 size 1ff
1333 15:40:31.920301 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 15:40:31.930466 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 15:40:31.936458 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 15:40:31.946785 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 15:40:31.950362 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 15:40:31.953358 Root Device assign_resources, bus 0 link: 0
1339 15:40:31.956863 Done setting resources.
1340 15:40:31.963170 Show resources in subtree (Root Device)...After assigning values.
1341 15:40:31.966701 Root Device child on link 0 CPU_CLUSTER: 0
1342 15:40:31.973193 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 15:40:31.973672 APIC: 00
1344 15:40:31.974047 APIC: 03
1345 15:40:31.976289 APIC: 02
1346 15:40:31.976763 APIC: 01
1347 15:40:31.979695 APIC: 05
1348 15:40:31.980305 APIC: 04
1349 15:40:31.980683 APIC: 07
1350 15:40:31.982972 APIC: 06
1351 15:40:31.985990 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 15:40:31.996445 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 15:40:32.005800 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 15:40:32.009247 PCI: 00:00.0
1355 15:40:32.019267 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 15:40:32.029127 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 15:40:32.035644 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 15:40:32.046214 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 15:40:32.056394 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 15:40:32.065203 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 15:40:32.075173 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 15:40:32.085181 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 15:40:32.091900 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 15:40:32.101875 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 15:40:32.111960 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 15:40:32.122017 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 15:40:32.131629 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 15:40:32.141834 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 15:40:32.148439 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 15:40:32.158179 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 15:40:32.161458 PCI: 00:02.0
1372 15:40:32.171410 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 15:40:32.180887 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 15:40:32.190848 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 15:40:32.191339 PCI: 00:04.0
1376 15:40:32.194454 PCI: 00:08.0
1377 15:40:32.204023 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 15:40:32.207115 PCI: 00:12.0
1379 15:40:32.217388 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 15:40:32.220257 PCI: 00:14.0 child on link 0 USB0 port 0
1381 15:40:32.230877 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 15:40:32.237126 USB0 port 0 child on link 0 USB2 port 0
1383 15:40:32.237696 USB2 port 0
1384 15:40:32.240777 USB2 port 1
1385 15:40:32.241422 USB2 port 2
1386 15:40:32.243711 USB2 port 3
1387 15:40:32.244230 USB2 port 5
1388 15:40:32.247484 USB2 port 6
1389 15:40:32.248108 USB2 port 9
1390 15:40:32.250715 USB3 port 0
1391 15:40:32.251306 USB3 port 1
1392 15:40:32.253826 USB3 port 2
1393 15:40:32.254313 USB3 port 3
1394 15:40:32.257313 USB3 port 4
1395 15:40:32.257796 PCI: 00:14.2
1396 15:40:32.267166 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 15:40:32.280247 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 15:40:32.280826 PCI: 00:14.3
1399 15:40:32.290183 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 15:40:32.296656 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 15:40:32.306599 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 15:40:32.307228 I2C: 01:15
1403 15:40:32.309616 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 15:40:32.323067 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 15:40:32.323663 I2C: 02:5d
1406 15:40:32.326847 GENERIC: 0.0
1407 15:40:32.327352 PCI: 00:16.0
1408 15:40:32.336652 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 15:40:32.339744 PCI: 00:17.0
1410 15:40:32.349902 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 15:40:32.359623 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 15:40:32.369169 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 15:40:32.375905 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 15:40:32.385642 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 15:40:32.395893 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 15:40:32.399109 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 15:40:32.412218 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 15:40:32.412710 I2C: 03:1a
1419 15:40:32.413116 I2C: 03:38
1420 15:40:32.415826 I2C: 03:39
1421 15:40:32.416294 I2C: 03:3a
1422 15:40:32.418745 I2C: 03:3b
1423 15:40:32.422110 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 15:40:32.431909 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 15:40:32.441902 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 15:40:32.451917 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 15:40:32.455297 PCI: 01:00.0
1428 15:40:32.465506 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 15:40:32.465992 PCI: 00:1e.0
1430 15:40:32.478454 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 15:40:32.488526 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 15:40:32.491708 PCI: 00:1e.2 child on link 0 SPI: 00
1433 15:40:32.501450 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 15:40:32.505142 SPI: 00
1435 15:40:32.508436 PCI: 00:1e.3 child on link 0 SPI: 01
1436 15:40:32.517978 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 15:40:32.518461 SPI: 01
1438 15:40:32.524802 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 15:40:32.531264 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 15:40:32.541313 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 15:40:32.541780 PNP: 0c09.0
1442 15:40:32.551242 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 15:40:32.554626 PCI: 00:1f.3
1444 15:40:32.564520 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 15:40:32.574269 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 15:40:32.574834 PCI: 00:1f.4
1447 15:40:32.584309 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 15:40:32.594213 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 15:40:32.597726 PCI: 00:1f.5
1450 15:40:32.607638 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 15:40:32.611184 Done allocating resources.
1452 15:40:32.614253 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 15:40:32.617513 Enabling resources...
1454 15:40:32.620874 PCI: 00:00.0 subsystem <- 8086/9b61
1455 15:40:32.623820 PCI: 00:00.0 cmd <- 06
1456 15:40:32.627114 PCI: 00:02.0 subsystem <- 8086/9b41
1457 15:40:32.630701 PCI: 00:02.0 cmd <- 03
1458 15:40:32.633573 PCI: 00:08.0 cmd <- 06
1459 15:40:32.637227 PCI: 00:12.0 subsystem <- 8086/02f9
1460 15:40:32.640404 PCI: 00:12.0 cmd <- 02
1461 15:40:32.643804 PCI: 00:14.0 subsystem <- 8086/02ed
1462 15:40:32.647054 PCI: 00:14.0 cmd <- 02
1463 15:40:32.650670 PCI: 00:14.2 cmd <- 02
1464 15:40:32.653396 PCI: 00:14.3 subsystem <- 8086/02f0
1465 15:40:32.653839 PCI: 00:14.3 cmd <- 02
1466 15:40:32.660799 PCI: 00:15.0 subsystem <- 8086/02e8
1467 15:40:32.661325 PCI: 00:15.0 cmd <- 02
1468 15:40:32.663622 PCI: 00:15.1 subsystem <- 8086/02e9
1469 15:40:32.666807 PCI: 00:15.1 cmd <- 02
1470 15:40:32.670542 PCI: 00:16.0 subsystem <- 8086/02e0
1471 15:40:32.673507 PCI: 00:16.0 cmd <- 02
1472 15:40:32.676512 PCI: 00:17.0 subsystem <- 8086/02d3
1473 15:40:32.679948 PCI: 00:17.0 cmd <- 03
1474 15:40:32.683147 PCI: 00:19.0 subsystem <- 8086/02c5
1475 15:40:32.686682 PCI: 00:19.0 cmd <- 02
1476 15:40:32.690522 PCI: 00:1d.0 bridge ctrl <- 0013
1477 15:40:32.693350 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 15:40:32.696768 PCI: 00:1d.0 cmd <- 06
1479 15:40:32.699904 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 15:40:32.703273 PCI: 00:1e.0 cmd <- 06
1481 15:40:32.706586 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 15:40:32.710627 PCI: 00:1e.2 cmd <- 06
1483 15:40:32.713135 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 15:40:32.713581 PCI: 00:1e.3 cmd <- 02
1485 15:40:32.720226 PCI: 00:1f.0 subsystem <- 8086/0284
1486 15:40:32.720669 PCI: 00:1f.0 cmd <- 407
1487 15:40:32.723166 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 15:40:32.726936 PCI: 00:1f.3 cmd <- 02
1489 15:40:32.730114 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 15:40:32.733149 PCI: 00:1f.4 cmd <- 03
1491 15:40:32.736495 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 15:40:32.739548 PCI: 00:1f.5 cmd <- 406
1493 15:40:32.749070 PCI: 01:00.0 cmd <- 02
1494 15:40:32.754185 done.
1495 15:40:32.764177 ME: Version: 14.0.39.1367
1496 15:40:32.771168 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1497 15:40:32.773909 Initializing devices...
1498 15:40:32.774351 Root Device init ...
1499 15:40:32.780108 Chrome EC: Set SMI mask to 0x0000000000000000
1500 15:40:32.783419 Chrome EC: clear events_b mask to 0x0000000000000000
1501 15:40:32.790509 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 15:40:32.797017 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 15:40:32.803617 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 15:40:32.806718 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 15:40:32.813252 Root Device init finished in 35256 usecs
1506 15:40:32.813693 CPU_CLUSTER: 0 init ...
1507 15:40:32.819951 CPU_CLUSTER: 0 init finished in 2448 usecs
1508 15:40:32.824723 PCI: 00:00.0 init ...
1509 15:40:32.828185 CPU TDP: 15 Watts
1510 15:40:32.831641 CPU PL2 = 64 Watts
1511 15:40:32.835102 PCI: 00:00.0 init finished in 7084 usecs
1512 15:40:32.838143 PCI: 00:02.0 init ...
1513 15:40:32.841703 PCI: 00:02.0 init finished in 2265 usecs
1514 15:40:32.844992 PCI: 00:08.0 init ...
1515 15:40:32.848309 PCI: 00:08.0 init finished in 2254 usecs
1516 15:40:32.851487 PCI: 00:12.0 init ...
1517 15:40:32.854914 PCI: 00:12.0 init finished in 2254 usecs
1518 15:40:32.857976 PCI: 00:14.0 init ...
1519 15:40:32.861126 PCI: 00:14.0 init finished in 2253 usecs
1520 15:40:32.864241 PCI: 00:14.2 init ...
1521 15:40:32.867676 PCI: 00:14.2 init finished in 2253 usecs
1522 15:40:32.871242 PCI: 00:14.3 init ...
1523 15:40:32.874484 PCI: 00:14.3 init finished in 2262 usecs
1524 15:40:32.877718 PCI: 00:15.0 init ...
1525 15:40:32.881110 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 15:40:32.884044 PCI: 00:15.0 init finished in 5981 usecs
1527 15:40:32.887784 PCI: 00:15.1 init ...
1528 15:40:32.891542 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 15:40:32.897858 PCI: 00:15.1 init finished in 5977 usecs
1530 15:40:32.898427 PCI: 00:16.0 init ...
1531 15:40:32.904061 PCI: 00:16.0 init finished in 2253 usecs
1532 15:40:32.907290 PCI: 00:19.0 init ...
1533 15:40:32.911113 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 15:40:32.913833 PCI: 00:19.0 init finished in 5981 usecs
1535 15:40:32.917245 PCI: 00:1d.0 init ...
1536 15:40:32.920909 Initializing PCH PCIe bridge.
1537 15:40:32.923870 PCI: 00:1d.0 init finished in 5288 usecs
1538 15:40:32.927081 PCI: 00:1f.0 init ...
1539 15:40:32.930816 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 15:40:32.937010 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 15:40:32.937623 IOAPIC: ID = 0x02
1542 15:40:32.940247 IOAPIC: Dumping registers
1543 15:40:32.943986 reg 0x0000: 0x02000000
1544 15:40:32.947023 reg 0x0001: 0x00770020
1545 15:40:32.947608 reg 0x0002: 0x00000000
1546 15:40:32.953766 PCI: 00:1f.0 init finished in 23556 usecs
1547 15:40:32.957234 PCI: 00:1f.4 init ...
1548 15:40:32.960187 PCI: 00:1f.4 init finished in 2262 usecs
1549 15:40:32.971227 PCI: 01:00.0 init ...
1550 15:40:32.974303 PCI: 01:00.0 init finished in 2253 usecs
1551 15:40:32.979030 PNP: 0c09.0 init ...
1552 15:40:32.981740 Google Chrome EC uptime: 11.089 seconds
1553 15:40:32.988608 Google Chrome AP resets since EC boot: 0
1554 15:40:32.991898 Google Chrome most recent AP reset causes:
1555 15:40:32.998306 Google Chrome EC reset flags at last EC boot: reset-pin
1556 15:40:33.001705 PNP: 0c09.0 init finished in 20577 usecs
1557 15:40:33.004887 Devices initialized
1558 15:40:33.008029 Show all devs... After init.
1559 15:40:33.008522 Root Device: enabled 1
1560 15:40:33.012002 CPU_CLUSTER: 0: enabled 1
1561 15:40:33.014982 DOMAIN: 0000: enabled 1
1562 15:40:33.015572 APIC: 00: enabled 1
1563 15:40:33.018480 PCI: 00:00.0: enabled 1
1564 15:40:33.022086 PCI: 00:02.0: enabled 1
1565 15:40:33.025113 PCI: 00:04.0: enabled 0
1566 15:40:33.025786 PCI: 00:05.0: enabled 0
1567 15:40:33.027938 PCI: 00:12.0: enabled 1
1568 15:40:33.031684 PCI: 00:12.5: enabled 0
1569 15:40:33.034829 PCI: 00:12.6: enabled 0
1570 15:40:33.035421 PCI: 00:14.0: enabled 1
1571 15:40:33.038325 PCI: 00:14.1: enabled 0
1572 15:40:33.041607 PCI: 00:14.3: enabled 1
1573 15:40:33.042200 PCI: 00:14.5: enabled 0
1574 15:40:33.045164 PCI: 00:15.0: enabled 1
1575 15:40:33.048293 PCI: 00:15.1: enabled 1
1576 15:40:33.051555 PCI: 00:15.2: enabled 0
1577 15:40:33.052177 PCI: 00:15.3: enabled 0
1578 15:40:33.054531 PCI: 00:16.0: enabled 1
1579 15:40:33.058198 PCI: 00:16.1: enabled 0
1580 15:40:33.061217 PCI: 00:16.2: enabled 0
1581 15:40:33.061706 PCI: 00:16.3: enabled 0
1582 15:40:33.064954 PCI: 00:16.4: enabled 0
1583 15:40:33.067619 PCI: 00:16.5: enabled 0
1584 15:40:33.071889 PCI: 00:17.0: enabled 1
1585 15:40:33.072471 PCI: 00:19.0: enabled 1
1586 15:40:33.074628 PCI: 00:19.1: enabled 0
1587 15:40:33.077822 PCI: 00:19.2: enabled 0
1588 15:40:33.078309 PCI: 00:1a.0: enabled 0
1589 15:40:33.081097 PCI: 00:1c.0: enabled 0
1590 15:40:33.084695 PCI: 00:1c.1: enabled 0
1591 15:40:33.088223 PCI: 00:1c.2: enabled 0
1592 15:40:33.088942 PCI: 00:1c.3: enabled 0
1593 15:40:33.090878 PCI: 00:1c.4: enabled 0
1594 15:40:33.094486 PCI: 00:1c.5: enabled 0
1595 15:40:33.097390 PCI: 00:1c.6: enabled 0
1596 15:40:33.097901 PCI: 00:1c.7: enabled 0
1597 15:40:33.100906 PCI: 00:1d.0: enabled 1
1598 15:40:33.104380 PCI: 00:1d.1: enabled 0
1599 15:40:33.107704 PCI: 00:1d.2: enabled 0
1600 15:40:33.108392 PCI: 00:1d.3: enabled 0
1601 15:40:33.110792 PCI: 00:1d.4: enabled 0
1602 15:40:33.114144 PCI: 00:1d.5: enabled 0
1603 15:40:33.117389 PCI: 00:1e.0: enabled 1
1604 15:40:33.117875 PCI: 00:1e.1: enabled 0
1605 15:40:33.120781 PCI: 00:1e.2: enabled 1
1606 15:40:33.124093 PCI: 00:1e.3: enabled 1
1607 15:40:33.124684 PCI: 00:1f.0: enabled 1
1608 15:40:33.128185 PCI: 00:1f.1: enabled 0
1609 15:40:33.131265 PCI: 00:1f.2: enabled 0
1610 15:40:33.133722 PCI: 00:1f.3: enabled 1
1611 15:40:33.134206 PCI: 00:1f.4: enabled 1
1612 15:40:33.137378 PCI: 00:1f.5: enabled 1
1613 15:40:33.140800 PCI: 00:1f.6: enabled 0
1614 15:40:33.144024 USB0 port 0: enabled 1
1615 15:40:33.144599 I2C: 01:15: enabled 1
1616 15:40:33.147761 I2C: 02:5d: enabled 1
1617 15:40:33.150652 GENERIC: 0.0: enabled 1
1618 15:40:33.151224 I2C: 03:1a: enabled 1
1619 15:40:33.154106 I2C: 03:38: enabled 1
1620 15:40:33.156878 I2C: 03:39: enabled 1
1621 15:40:33.157366 I2C: 03:3a: enabled 1
1622 15:40:33.160514 I2C: 03:3b: enabled 1
1623 15:40:33.163750 PCI: 00:00.0: enabled 1
1624 15:40:33.164361 SPI: 00: enabled 1
1625 15:40:33.167647 SPI: 01: enabled 1
1626 15:40:33.170267 PNP: 0c09.0: enabled 1
1627 15:40:33.170752 USB2 port 0: enabled 1
1628 15:40:33.173704 USB2 port 1: enabled 1
1629 15:40:33.176948 USB2 port 2: enabled 0
1630 15:40:33.180508 USB2 port 3: enabled 0
1631 15:40:33.180993 USB2 port 5: enabled 0
1632 15:40:33.184028 USB2 port 6: enabled 1
1633 15:40:33.186815 USB2 port 9: enabled 1
1634 15:40:33.187302 USB3 port 0: enabled 1
1635 15:40:33.190164 USB3 port 1: enabled 1
1636 15:40:33.193804 USB3 port 2: enabled 1
1637 15:40:33.194290 USB3 port 3: enabled 1
1638 15:40:33.196606 USB3 port 4: enabled 0
1639 15:40:33.200137 APIC: 03: enabled 1
1640 15:40:33.200625 APIC: 02: enabled 1
1641 15:40:33.203009 APIC: 01: enabled 1
1642 15:40:33.206789 APIC: 05: enabled 1
1643 15:40:33.207272 APIC: 04: enabled 1
1644 15:40:33.210014 APIC: 07: enabled 1
1645 15:40:33.213222 APIC: 06: enabled 1
1646 15:40:33.213700 PCI: 00:08.0: enabled 1
1647 15:40:33.217212 PCI: 00:14.2: enabled 1
1648 15:40:33.220078 PCI: 01:00.0: enabled 1
1649 15:40:33.223282 Disabling ACPI via APMC:
1650 15:40:33.226738 done.
1651 15:40:33.230645 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 15:40:33.233499 ELOG: NV offset 0xaf0000 size 0x4000
1653 15:40:33.239991 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 15:40:33.247359 ELOG: Event(17) added with size 13 at 2022-09-30 15:40:31 UTC
1655 15:40:33.253938 ELOG: Event(92) added with size 9 at 2022-09-30 15:40:31 UTC
1656 15:40:33.260389 ELOG: Event(93) added with size 9 at 2022-09-30 15:40:31 UTC
1657 15:40:33.266890 ELOG: Event(9A) added with size 9 at 2022-09-30 15:40:31 UTC
1658 15:40:33.273188 ELOG: Event(9E) added with size 10 at 2022-09-30 15:40:31 UTC
1659 15:40:33.280556 ELOG: Event(9F) added with size 14 at 2022-09-30 15:40:31 UTC
1660 15:40:33.283148 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1661 15:40:33.291238 ELOG: Event(A1) added with size 10 at 2022-09-30 15:40:31 UTC
1662 15:40:33.300420 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 15:40:33.307314 ELOG: Event(A0) added with size 9 at 2022-09-30 15:40:31 UTC
1664 15:40:33.310434 elog_add_boot_reason: Logged dev mode boot
1665 15:40:33.313646 Finalize devices...
1666 15:40:33.314163 PCI: 00:17.0 final
1667 15:40:33.317132 Devices finalized
1668 15:40:33.320371 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1669 15:40:33.327039 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1670 15:40:33.330535 ME: HFSTS1 : 0x90000245
1671 15:40:33.333942 ME: HFSTS2 : 0x3B850126
1672 15:40:33.339956 ME: HFSTS3 : 0x00000020
1673 15:40:33.343423 ME: HFSTS4 : 0x00004800
1674 15:40:33.346705 ME: HFSTS5 : 0x00000000
1675 15:40:33.350457 ME: HFSTS6 : 0x40400006
1676 15:40:33.353345 ME: Manufacturing Mode : NO
1677 15:40:33.356447 ME: FW Partition Table : OK
1678 15:40:33.360059 ME: Bringup Loader Failure : NO
1679 15:40:33.363354 ME: Firmware Init Complete : YES
1680 15:40:33.366736 ME: Boot Options Present : NO
1681 15:40:33.370190 ME: Update In Progress : NO
1682 15:40:33.373094 ME: D0i3 Support : YES
1683 15:40:33.376346 ME: Low Power State Enabled : NO
1684 15:40:33.380186 ME: CPU Replaced : NO
1685 15:40:33.383507 ME: CPU Replacement Valid : YES
1686 15:40:33.386974 ME: Current Working State : 5
1687 15:40:33.389767 ME: Current Operation State : 1
1688 15:40:33.393250 ME: Current Operation Mode : 0
1689 15:40:33.396451 ME: Error Code : 0
1690 15:40:33.399737 ME: CPU Debug Disabled : YES
1691 15:40:33.402821 ME: TXT Support : NO
1692 15:40:33.409718 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1693 15:40:33.416495 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 15:40:33.416970 CBFS @ c08000 size 3f8000
1695 15:40:33.422804 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 15:40:33.426314 CBFS: Locating 'fallback/dsdt.aml'
1697 15:40:33.429094 CBFS: Found @ offset 10bb80 size 3fa5
1698 15:40:33.435981 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 15:40:33.439156 CBFS @ c08000 size 3f8000
1700 15:40:33.445662 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 15:40:33.446098 CBFS: Locating 'fallback/slic'
1702 15:40:33.451187 CBFS: 'fallback/slic' not found.
1703 15:40:33.458078 ACPI: Writing ACPI tables at 99b3e000.
1704 15:40:33.458514 ACPI: * FACS
1705 15:40:33.461522 ACPI: * DSDT
1706 15:40:33.464894 Ramoops buffer: 0x100000@0x99a3d000.
1707 15:40:33.467860 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 15:40:33.474286 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 15:40:33.477664 Google Chrome EC: version:
1710 15:40:33.480989 ro: helios_v2.0.2659-56403530b
1711 15:40:33.483989 rw: helios_v2.0.2849-c41de27e7d
1712 15:40:33.484428 running image: 1
1713 15:40:33.488626 ACPI: * FADT
1714 15:40:33.489060 SCI is IRQ9
1715 15:40:33.495900 ACPI: added table 1/32, length now 40
1716 15:40:33.496353 ACPI: * SSDT
1717 15:40:33.498747 Found 1 CPU(s) with 8 core(s) each.
1718 15:40:33.502355 Error: Could not locate 'wifi_sar' in VPD.
1719 15:40:33.508709 Checking CBFS for default SAR values
1720 15:40:33.511570 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 15:40:33.514982 CBFS @ c08000 size 3f8000
1722 15:40:33.522175 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 15:40:33.525064 CBFS: Locating 'wifi_sar_defaults.hex'
1724 15:40:33.528798 CBFS: Found @ offset 5fac0 size 77
1725 15:40:33.531524 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1726 15:40:33.538272 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1727 15:40:33.541613 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1728 15:40:33.548427 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1729 15:40:33.551679 failed to find key in VPD: dsm_calib_r0_0
1730 15:40:33.561974 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1731 15:40:33.564821 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1732 15:40:33.568326 failed to find key in VPD: dsm_calib_r0_1
1733 15:40:33.577930 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1734 15:40:33.584818 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1735 15:40:33.587725 failed to find key in VPD: dsm_calib_r0_2
1736 15:40:33.598102 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1737 15:40:33.601466 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1738 15:40:33.607617 failed to find key in VPD: dsm_calib_r0_3
1739 15:40:33.614582 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1740 15:40:33.621046 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1741 15:40:33.624444 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1742 15:40:33.627266 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1743 15:40:33.631498 EC returned error result code 1
1744 15:40:33.635412 EC returned error result code 1
1745 15:40:33.639688 EC returned error result code 1
1746 15:40:33.646302 PS2K: Bad resp from EC. Vivaldi disabled!
1747 15:40:33.649804 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1748 15:40:33.656317 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1749 15:40:33.663221 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1750 15:40:33.666573 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1751 15:40:33.672396 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1752 15:40:33.679068 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1753 15:40:33.685468 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1754 15:40:33.689004 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1755 15:40:33.692462 ACPI: added table 2/32, length now 44
1756 15:40:33.695934 ACPI: * MCFG
1757 15:40:33.699129 ACPI: added table 3/32, length now 48
1758 15:40:33.702151 ACPI: * TPM2
1759 15:40:33.705637 TPM2 log created at 99a2d000
1760 15:40:33.709016 ACPI: added table 4/32, length now 52
1761 15:40:33.709516 ACPI: * MADT
1762 15:40:33.712029 SCI is IRQ9
1763 15:40:33.715552 ACPI: added table 5/32, length now 56
1764 15:40:33.716093 current = 99b43ac0
1765 15:40:33.719019 ACPI: * DMAR
1766 15:40:33.721933 ACPI: added table 6/32, length now 60
1767 15:40:33.725374 ACPI: * IGD OpRegion
1768 15:40:33.725871 GMA: Found VBT in CBFS
1769 15:40:33.728545 GMA: Found valid VBT in CBFS
1770 15:40:33.732406 ACPI: added table 7/32, length now 64
1771 15:40:33.735828 ACPI: * HPET
1772 15:40:33.738612 ACPI: added table 8/32, length now 68
1773 15:40:33.739101 ACPI: done.
1774 15:40:33.741802 ACPI tables: 31744 bytes.
1775 15:40:33.745324 smbios_write_tables: 99a2c000
1776 15:40:33.748539 EC returned error result code 3
1777 15:40:33.752136 Couldn't obtain OEM name from CBI
1778 15:40:33.755366 Create SMBIOS type 17
1779 15:40:33.758813 PCI: 00:00.0 (Intel Cannonlake)
1780 15:40:33.762600 PCI: 00:14.3 (Intel WiFi)
1781 15:40:33.765445 SMBIOS tables: 939 bytes.
1782 15:40:33.769077 Writing table forward entry at 0x00000500
1783 15:40:33.775401 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1784 15:40:33.779035 Writing coreboot table at 0x99b62000
1785 15:40:33.785250 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1786 15:40:33.788410 1. 0000000000001000-000000000009ffff: RAM
1787 15:40:33.791976 2. 00000000000a0000-00000000000fffff: RESERVED
1788 15:40:33.799026 3. 0000000000100000-0000000099a2bfff: RAM
1789 15:40:33.801612 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1790 15:40:33.808653 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1791 15:40:33.814786 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1792 15:40:33.818454 7. 000000009a000000-000000009f7fffff: RESERVED
1793 15:40:33.825364 8. 00000000e0000000-00000000efffffff: RESERVED
1794 15:40:33.828036 9. 00000000fc000000-00000000fc000fff: RESERVED
1795 15:40:33.831972 10. 00000000fe000000-00000000fe00ffff: RESERVED
1796 15:40:33.838431 11. 00000000fed10000-00000000fed17fff: RESERVED
1797 15:40:33.841397 12. 00000000fed80000-00000000fed83fff: RESERVED
1798 15:40:33.848396 13. 00000000fed90000-00000000fed91fff: RESERVED
1799 15:40:33.851803 14. 00000000feda0000-00000000feda1fff: RESERVED
1800 15:40:33.858819 15. 0000000100000000-000000045e7fffff: RAM
1801 15:40:33.861550 Graphics framebuffer located at 0xc0000000
1802 15:40:33.864587 Passing 5 GPIOs to payload:
1803 15:40:33.868004 NAME | PORT | POLARITY | VALUE
1804 15:40:33.874725 write protect | undefined | high | low
1805 15:40:33.878129 lid | undefined | high | high
1806 15:40:33.884446 power | undefined | high | low
1807 15:40:33.891062 oprom | undefined | high | low
1808 15:40:33.894397 EC in RW | 0x000000cb | high | low
1809 15:40:33.898027 Board ID: 4
1810 15:40:33.900835 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1811 15:40:33.904509 CBFS @ c08000 size 3f8000
1812 15:40:33.911108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1813 15:40:33.917357 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1814 15:40:33.917843 coreboot table: 1492 bytes.
1815 15:40:33.920790 IMD ROOT 0. 99fff000 00001000
1816 15:40:33.924344 IMD SMALL 1. 99ffe000 00001000
1817 15:40:33.927921 FSP MEMORY 2. 99c4e000 003b0000
1818 15:40:33.931443 CONSOLE 3. 99c2e000 00020000
1819 15:40:33.934382 FMAP 4. 99c2d000 0000054e
1820 15:40:33.937674 TIME STAMP 5. 99c2c000 00000910
1821 15:40:33.941010 VBOOT WORK 6. 99c18000 00014000
1822 15:40:33.944274 MRC DATA 7. 99c16000 00001958
1823 15:40:33.947417 ROMSTG STCK 8. 99c15000 00001000
1824 15:40:33.950863 AFTER CAR 9. 99c0b000 0000a000
1825 15:40:33.954415 RAMSTAGE 10. 99baf000 0005c000
1826 15:40:33.957315 REFCODE 11. 99b7a000 00035000
1827 15:40:33.960830 SMM BACKUP 12. 99b6a000 00010000
1828 15:40:33.964205 COREBOOT 13. 99b62000 00008000
1829 15:40:33.967121 ACPI 14. 99b3e000 00024000
1830 15:40:33.969965 ACPI GNVS 15. 99b3d000 00001000
1831 15:40:33.974324 RAMOOPS 16. 99a3d000 00100000
1832 15:40:33.977205 TPM2 TCGLOG17. 99a2d000 00010000
1833 15:40:33.983967 SMBIOS 18. 99a2c000 00000800
1834 15:40:33.984448 IMD small region:
1835 15:40:33.986818 IMD ROOT 0. 99ffec00 00000400
1836 15:40:33.990152 FSP RUNTIME 1. 99ffebe0 00000004
1837 15:40:33.994168 EC HOSTEVENT 2. 99ffebc0 00000008
1838 15:40:33.997393 POWER STATE 3. 99ffeb80 00000040
1839 15:40:34.000345 ROMSTAGE 4. 99ffeb60 00000004
1840 15:40:34.004259 MEM INFO 5. 99ffe9a0 000001b9
1841 15:40:34.010854 VPD 6. 99ffe920 0000006c
1842 15:40:34.011380 MTRR: Physical address space:
1843 15:40:34.017498 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1844 15:40:34.023612 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1845 15:40:34.030437 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1846 15:40:34.036735 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1847 15:40:34.043682 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1848 15:40:34.049759 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1849 15:40:34.057123 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1850 15:40:34.060298 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 15:40:34.063744 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 15:40:34.066454 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 15:40:34.072861 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 15:40:34.076580 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 15:40:34.079749 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 15:40:34.082818 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 15:40:34.089479 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 15:40:34.093176 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 15:40:34.096336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 15:40:34.099803 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 15:40:34.103149 call enable_fixed_mtrr()
1862 15:40:34.106828 CPU physical address size: 39 bits
1863 15:40:34.112984 MTRR: default type WB/UC MTRR counts: 6/8.
1864 15:40:34.116216 MTRR: WB selected as default type.
1865 15:40:34.122887 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1866 15:40:34.126619 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1867 15:40:34.133108 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1868 15:40:34.139340 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1869 15:40:34.146141 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1870 15:40:34.152852 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1871 15:40:34.155782 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 15:40:34.162423 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 15:40:34.166420 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 15:40:34.168864 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 15:40:34.172279 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 15:40:34.179181 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 15:40:34.182393 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 15:40:34.185731 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 15:40:34.189184 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 15:40:34.195362 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 15:40:34.198877 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 15:40:34.199384
1883 15:40:34.199790 MTRR check
1884 15:40:34.202164 Fixed MTRRs : Enabled
1885 15:40:34.206114 Variable MTRRs: Enabled
1886 15:40:34.206705
1887 15:40:34.209124 call enable_fixed_mtrr()
1888 15:40:34.212391 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1889 15:40:34.215305 CPU physical address size: 39 bits
1890 15:40:34.222593 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1891 15:40:34.226059 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 15:40:34.229068 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 15:40:34.235475 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 15:40:34.239169 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 15:40:34.242336 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 15:40:34.245504 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 15:40:34.252514 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 15:40:34.255729 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 15:40:34.258678 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 15:40:34.262253 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 15:40:34.265693 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 15:40:34.271827 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 15:40:34.275251 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 15:40:34.278771 call enable_fixed_mtrr()
1905 15:40:34.281894 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 15:40:34.285211 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 15:40:34.291672 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 15:40:34.295102 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 15:40:34.298930 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 15:40:34.301672 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 15:40:34.305243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 15:40:34.312199 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 15:40:34.315195 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 15:40:34.318243 CPU physical address size: 39 bits
1915 15:40:34.321851 call enable_fixed_mtrr()
1916 15:40:34.325461 CBFS @ c08000 size 3f8000
1917 15:40:34.328140 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1918 15:40:34.335162 CPU physical address size: 39 bits
1919 15:40:34.338300 CBFS: Locating 'fallback/payload'
1920 15:40:34.341803 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 15:40:34.344775 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 15:40:34.347956 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 15:40:34.354820 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 15:40:34.358651 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 15:40:34.361422 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 15:40:34.364407 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 15:40:34.368051 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 15:40:34.374899 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 15:40:34.378321 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 15:40:34.381203 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 15:40:34.387794 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 15:40:34.388320 call enable_fixed_mtrr()
1933 15:40:34.394557 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 15:40:34.397644 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 15:40:34.401649 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 15:40:34.404200 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 15:40:34.407677 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 15:40:34.414337 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 15:40:34.417314 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 15:40:34.420679 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 15:40:34.423946 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 15:40:34.430828 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 15:40:34.434462 CPU physical address size: 39 bits
1944 15:40:34.437790 call enable_fixed_mtrr()
1945 15:40:34.440896 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 15:40:34.444009 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 15:40:34.447372 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 15:40:34.454246 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 15:40:34.457208 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 15:40:34.460791 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 15:40:34.464146 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 15:40:34.470654 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 15:40:34.473764 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 15:40:34.477244 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 15:40:34.480662 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 15:40:34.486977 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 15:40:34.490051 MTRR: Fixed MSR 0x258 0x0606060606060606
1958 15:40:34.493481 MTRR: Fixed MSR 0x259 0x0000000000000000
1959 15:40:34.496874 MTRR: Fixed MSR 0x268 0x0606060606060606
1960 15:40:34.503650 MTRR: Fixed MSR 0x269 0x0606060606060606
1961 15:40:34.506726 MTRR: Fixed MSR 0x26a 0x0606060606060606
1962 15:40:34.510253 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 15:40:34.513490 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 15:40:34.520096 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 15:40:34.523133 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 15:40:34.526687 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 15:40:34.529938 call enable_fixed_mtrr()
1968 15:40:34.533282 call enable_fixed_mtrr()
1969 15:40:34.536610 CPU physical address size: 39 bits
1970 15:40:34.539905 CPU physical address size: 39 bits
1971 15:40:34.543221 CPU physical address size: 39 bits
1972 15:40:34.546918 CBFS: Found @ offset 1c96c0 size 3f798
1973 15:40:34.550081 Checking segment from ROM address 0xffdd16f8
1974 15:40:34.556309 Checking segment from ROM address 0xffdd1714
1975 15:40:34.559863 Loading segment from ROM address 0xffdd16f8
1976 15:40:34.563067 code (compression=0)
1977 15:40:34.569488 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1978 15:40:34.580129 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1979 15:40:34.582639 it's not compressed!
1980 15:40:34.673918 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1981 15:40:34.680619 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1982 15:40:34.683601 Loading segment from ROM address 0xffdd1714
1983 15:40:34.686994 Entry Point 0x30000000
1984 15:40:34.690601 Loaded segments
1985 15:40:34.696105 Finalizing chipset.
1986 15:40:34.699170 Finalizing SMM.
1987 15:40:34.702844 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1988 15:40:34.706158 mp_park_aps done after 0 msecs.
1989 15:40:34.712422 Jumping to boot code at 30000000(99b62000)
1990 15:40:34.719091 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1991 15:40:34.719676
1992 15:40:34.722242 Starting depthcharge on Helios...
1993 15:40:34.723454 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1994 15:40:34.724074 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1995 15:40:34.724615 Setting prompt string to ['hatch:']
1996 15:40:34.725079 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1997 15:40:34.732546 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1998 15:40:34.739318 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1999 15:40:34.746238 board_setup: Info: eMMC controller not present; skipping
2000 15:40:34.748541 New NVMe Controller 0x30053ac0 @ 00:1d:00
2001 15:40:34.755356 board_setup: Info: SDHCI controller not present; skipping
2002 15:40:34.762162 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2003 15:40:34.762799 Wipe memory regions:
2004 15:40:34.764817 [0x00000000001000, 0x000000000a0000)
2005 15:40:34.771956 [0x00000000100000, 0x00000030000000)
2006 15:40:34.837602 [0x00000030657430, 0x00000099a2c000)
2007 15:40:34.977935 [0x00000100000000, 0x0000045e800000)
2008 15:40:36.361267 R8152: Initializing
2009 15:40:36.364325 Version 9 (ocp_data = 6010)
2010 15:40:36.368494 R8152: Done initializing
2011 15:40:36.371725 Adding net device
2012 15:40:36.868770 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2013 15:40:36.869013
2014 15:40:36.869400 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2016 15:40:36.970372 hatch: tftpboot 192.168.201.1 7463454/tftp-deploy-fyfgohr4/kernel/bzImage 7463454/tftp-deploy-fyfgohr4/kernel/cmdline 7463454/tftp-deploy-fyfgohr4/ramdisk/ramdisk.cpio.gz
2017 15:40:36.970954 Setting prompt string to 'Starting kernel'
2018 15:40:36.971391 Setting prompt string to ['Starting kernel']
2019 15:40:36.971799 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 15:40:36.972230 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2021 15:40:36.975808 tftpboot 192.168.201.1 7463454/tftp-deploy-fyfgohr4/kernel/bzImy-fyfgohr4/kernel/cmdline 7463454/tftp-deploy-fyfgohr4/ramdisk/ramdisk.cpio.gz
2022 15:40:36.976369 Waiting for link
2023 15:40:37.176604 done.
2024 15:40:37.177201 MAC: f4:f5:e8:50:dc:f7
2025 15:40:37.180285 Sending DHCP discover... done.
2026 15:40:37.183827 Waiting for reply... done.
2027 15:40:37.187188 Sending DHCP request... done.
2028 15:40:37.193151 Waiting for reply... done.
2029 15:40:37.193678 My ip is 192.168.201.20
2030 15:40:37.196662 The DHCP server ip is 192.168.201.1
2031 15:40:37.203287 TFTP server IP predefined by user: 192.168.201.1
2032 15:40:37.209840 Bootfile predefined by user: 7463454/tftp-deploy-fyfgohr4/kernel/bzImage
2033 15:40:37.213445 Sending tftp read request... done.
2034 15:40:37.216502 Waiting for the transfer...
2035 15:40:37.568222 00000000 ################################################################
2036 15:40:37.860148 00080000 ################################################################
2037 15:40:38.142364 00100000 ################################################################
2038 15:40:38.430092 00180000 ################################################################
2039 15:40:38.717386 00200000 ################################################################
2040 15:40:38.953387 00280000 ################################################################
2041 15:40:39.237832 00300000 ################################################################
2042 15:40:39.526616 00380000 ################################################################
2043 15:40:39.813247 00400000 ################################################################
2044 15:40:40.101733 00480000 ################################################################
2045 15:40:40.351251 00500000 ################################################################
2046 15:40:40.624794 00580000 ################################################################
2047 15:40:40.866348 00600000 ################################################################
2048 15:40:41.023392 00680000 ###################################### done.
2049 15:40:41.027109 The bootfile was 7126928 bytes long.
2050 15:40:41.030309 Sending tftp read request... done.
2051 15:40:41.033228 Waiting for the transfer...
2052 15:40:41.276797 00000000 ################################################################
2053 15:40:41.532275 00080000 ################################################################
2054 15:40:41.823347 00100000 ################################################################
2055 15:40:42.110674 00180000 ################################################################
2056 15:40:42.393403 00200000 ################################################################
2057 15:40:42.644660 00280000 ################################################################
2058 15:40:42.928780 00300000 ################################################################
2059 15:40:43.220683 00380000 ################################################################
2060 15:40:43.506600 00400000 ################################################################
2061 15:40:43.796412 00480000 ################################################################
2062 15:40:43.926247 00500000 ############################# done.
2063 15:40:43.929412 Sending tftp read request... done.
2064 15:40:43.932808 Waiting for the transfer...
2065 15:40:43.932909 00000000 # done.
2066 15:40:43.942965 Command line loaded dynamically from TFTP file: 7463454/tftp-deploy-fyfgohr4/kernel/cmdline
2067 15:40:43.969646 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7463454/extract-nfsrootfs-0avlm6lg,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2068 15:40:43.975636 ec_init(0): CrosEC protocol v3 supported (256, 256)
2069 15:40:43.982886 Shutting down all USB controllers.
2070 15:40:43.983377 Removing current net device
2071 15:40:43.986416 Finalizing coreboot
2072 15:40:43.993279 Exiting depthcharge with code 4 at timestamp: 16538359
2073 15:40:43.993873
2074 15:40:43.994372 Starting kernel ...
2075 15:40:43.994831
2076 15:40:43.996284 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2077 15:40:43.996981 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2078 15:40:43.997436 Setting prompt string to ['Linux version [0-9]']
2079 15:40:43.997931 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 15:40:43.998413 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2081 15:40:43.999550
2083 15:45:15.997880 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2085 15:45:15.999725 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2087 15:45:16.001195 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2090 15:45:16.003127 end: 2 depthcharge-action (duration 00:05:00) [common]
2092 15:45:16.004308 Cleaning after the job
2093 15:45:16.004766 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/ramdisk
2094 15:45:16.007086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/kernel
2095 15:45:16.009779 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/nfsrootfs
2096 15:45:16.090470 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463454/tftp-deploy-fyfgohr4/modules
2097 15:45:16.090779 start: 4.1 power-off (timeout 00:00:30) [common]
2098 15:45:16.090945 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2099 15:45:16.109889 >> Command sent successfully.
2100 15:45:16.111633 Returned 0 in 0 seconds
2101 15:45:16.212842 end: 4.1 power-off (duration 00:00:00) [common]
2103 15:45:16.214656 start: 4.2 read-feedback (timeout 00:10:00) [common]
2104 15:45:16.215930 Listened to connection for namespace 'common' for up to 1s
2105 15:45:17.220711 Finalising connection for namespace 'common'
2106 15:45:17.221443 Disconnecting from shell: Finalise
2107 15:45:17.323091 end: 4.2 read-feedback (duration 00:00:01) [common]
2108 15:45:17.323728 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463454
2109 15:45:17.509746 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463454
2110 15:45:17.509943 JobError: Your job cannot terminate cleanly.