Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:45:46.770571 lava-dispatcher, installed at version: 2022.06
2 15:45:46.770756 start: 0 validate
3 15:45:46.770890 Start time: 2022-09-30 15:45:46.770882+00:00 (UTC)
4 15:45:46.771021 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:45:46.771145 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:45:47.065966 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:45:47.066736 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:45:47.360093 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:45:47.360935 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:45:47.656055 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:45:47.656806 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip70-98-g7f7838c92740f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:45:47.951956 validate duration: 1.18
14 15:45:47.953436 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:45:47.954060 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:45:47.954589 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:45:47.955143 Not decompressing ramdisk as can be used compressed.
18 15:45:47.955686 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 15:45:47.956136 saving as /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/ramdisk/initrd.cpio.gz
20 15:45:47.956512 total size: 5411075 (5MB)
21 15:45:47.964496 progress 0% (0MB)
22 15:45:47.972977 progress 5% (0MB)
23 15:45:47.980674 progress 10% (0MB)
24 15:45:47.985945 progress 15% (0MB)
25 15:45:47.990183 progress 20% (1MB)
26 15:45:47.993456 progress 25% (1MB)
27 15:45:47.996450 progress 30% (1MB)
28 15:45:48.001066 progress 35% (1MB)
29 15:45:48.005964 progress 40% (2MB)
30 15:45:48.010663 progress 45% (2MB)
31 15:45:48.015402 progress 50% (2MB)
32 15:45:48.020170 progress 55% (2MB)
33 15:45:48.026355 progress 60% (3MB)
34 15:45:48.031153 progress 65% (3MB)
35 15:45:48.036296 progress 70% (3MB)
36 15:45:48.041268 progress 75% (3MB)
37 15:45:48.046173 progress 80% (4MB)
38 15:45:48.050953 progress 85% (4MB)
39 15:45:48.056038 progress 90% (4MB)
40 15:45:48.060552 progress 95% (4MB)
41 15:45:48.065440 progress 100% (5MB)
42 15:45:48.065655 5MB downloaded in 0.11s (47.28MB/s)
43 15:45:48.065832 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:45:48.066133 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:45:48.066241 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:45:48.066345 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:45:48.066469 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:45:48.066552 saving as /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/kernel/bzImage
50 15:45:48.066627 total size: 7126928 (6MB)
51 15:45:48.066702 No compression specified
52 15:45:48.071646 progress 0% (0MB)
53 15:45:48.074532 progress 5% (0MB)
54 15:45:48.077982 progress 10% (0MB)
55 15:45:48.082828 progress 15% (1MB)
56 15:45:48.087786 progress 20% (1MB)
57 15:45:48.092162 progress 25% (1MB)
58 15:45:48.096753 progress 30% (2MB)
59 15:45:48.101616 progress 35% (2MB)
60 15:45:48.106480 progress 40% (2MB)
61 15:45:48.111617 progress 45% (3MB)
62 15:45:48.115901 progress 50% (3MB)
63 15:45:48.120434 progress 55% (3MB)
64 15:45:48.126355 progress 60% (4MB)
65 15:45:48.131566 progress 65% (4MB)
66 15:45:48.138407 progress 70% (4MB)
67 15:45:48.145045 progress 75% (5MB)
68 15:45:48.150492 progress 80% (5MB)
69 15:45:48.158151 progress 85% (5MB)
70 15:45:48.165186 progress 90% (6MB)
71 15:45:48.171498 progress 95% (6MB)
72 15:45:48.179062 progress 100% (6MB)
73 15:45:48.179287 6MB downloaded in 0.11s (60.33MB/s)
74 15:45:48.179444 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:45:48.179696 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:45:48.179789 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:45:48.179905 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:45:48.180029 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 15:45:48.180099 saving as /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/nfsrootfs/full.rootfs.tar
81 15:45:48.180164 total size: 122682368 (116MB)
82 15:45:48.180229 Using unxz to decompress xz
83 15:45:48.184790 progress 0% (0MB)
84 15:45:48.616119 progress 5% (5MB)
85 15:45:49.061030 progress 10% (11MB)
86 15:45:49.507161 progress 15% (17MB)
87 15:45:49.961640 progress 20% (23MB)
88 15:45:50.272202 progress 25% (29MB)
89 15:45:50.603218 progress 30% (35MB)
90 15:45:50.830561 progress 35% (40MB)
91 15:45:51.033844 progress 40% (46MB)
92 15:45:51.368324 progress 45% (52MB)
93 15:45:51.712093 progress 50% (58MB)
94 15:45:52.036276 progress 55% (64MB)
95 15:45:52.372130 progress 60% (70MB)
96 15:45:52.690730 progress 65% (76MB)
97 15:45:53.052643 progress 70% (81MB)
98 15:45:53.444498 progress 75% (87MB)
99 15:45:53.841558 progress 80% (93MB)
100 15:45:53.950849 progress 85% (99MB)
101 15:45:54.108805 progress 90% (105MB)
102 15:45:54.424871 progress 95% (111MB)
103 15:45:54.780264 progress 100% (116MB)
104 15:45:54.786607 116MB downloaded in 6.61s (17.71MB/s)
105 15:45:54.786877 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:45:54.787171 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:45:54.787279 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:45:54.787385 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:45:54.787518 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip70-98-g7f7838c92740f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:45:54.787597 saving as /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/modules/modules.tar
112 15:45:54.787678 total size: 51896 (0MB)
113 15:45:54.787759 Using unxz to decompress xz
114 15:45:54.793590 progress 63% (0MB)
115 15:45:54.795021 progress 100% (0MB)
116 15:45:54.803768 0MB downloaded in 0.02s (3.08MB/s)
117 15:45:54.804309 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:45:54.805002 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:45:54.805269 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:45:54.805538 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:45:56.456768 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7463491/extract-nfsrootfs-0oggbidr
123 15:45:56.456979 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:45:56.457085 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:45:56.457222 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t
126 15:45:56.457325 makedir: /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin
127 15:45:56.457412 makedir: /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/tests
128 15:45:56.457496 makedir: /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/results
129 15:45:56.457626 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-add-keys
130 15:45:56.457789 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-add-sources
131 15:45:56.457907 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-background-process-start
132 15:45:56.458024 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-background-process-stop
133 15:45:56.458137 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-common-functions
134 15:45:56.458250 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-echo-ipv4
135 15:45:56.458361 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-install-packages
136 15:45:56.458472 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-installed-packages
137 15:45:56.458581 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-os-build
138 15:45:56.458691 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-probe-channel
139 15:45:56.458802 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-probe-ip
140 15:45:56.458912 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-target-ip
141 15:45:56.459022 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-target-mac
142 15:45:56.459133 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-target-storage
143 15:45:56.459245 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-case
144 15:45:56.459357 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-event
145 15:45:56.459466 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-feedback
146 15:45:56.459577 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-raise
147 15:45:56.459712 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-reference
148 15:45:56.459824 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-runner
149 15:45:56.459984 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-set
150 15:45:56.460093 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-test-shell
151 15:45:56.460204 Updating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-install-packages (oe)
152 15:45:56.460319 Updating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/bin/lava-installed-packages (oe)
153 15:45:56.460418 Creating /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/environment
154 15:45:56.460508 LAVA metadata
155 15:45:56.460579 - LAVA_JOB_ID=7463491
156 15:45:56.460645 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:45:56.460744 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:45:56.460811 skipped lava-vland-overlay
159 15:45:56.460889 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:45:56.460973 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:45:56.461038 skipped lava-multinode-overlay
162 15:45:56.461114 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:45:56.461199 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:45:56.461272 Loading test definitions
165 15:45:56.461365 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:45:56.461441 Using /lava-7463491 at stage 0
167 15:45:56.461540 Fetching tests from https://github.com/kernelci/test-definitions
168 15:45:56.461623 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/0/tests/0_ltp-timers'
169 15:46:01.962562 Running '/usr/bin/git checkout kernelci.org
170 15:46:02.094479 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 15:46:02.095181 uuid=7463491_1.5.2.3.1 testdef=None
172 15:46:02.095346 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
174 15:46:02.095603 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 15:46:02.096298 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:46:02.096547 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 15:46:02.097330 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:46:02.097584 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 15:46:02.098340 runner path: /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/0/tests/0_ltp-timers test_uuid 7463491_1.5.2.3.1
182 15:46:02.098433 GRP_TEST='TMR'
183 15:46:02.098502 SKIPFILE='skipfile-lkft.yaml'
184 15:46:02.098567 SKIP_INSTALL='true'
185 15:46:02.098629 TST_CMDFILES=''
186 15:46:02.098766 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 15:46:02.099028 Creating lava-test-runner.conf files
189 15:46:02.099097 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7463491/lava-overlay-tdon856t/lava-7463491/0 for stage 0
190 15:46:02.099185 - 0_ltp-timers
191 15:46:02.099283 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
192 15:46:02.099376 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
193 15:46:09.108182 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 15:46:09.108347 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
195 15:46:09.108445 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 15:46:09.108550 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
197 15:46:09.108645 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
198 15:46:09.208738 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 15:46:09.209095 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
200 15:46:09.209204 extracting modules file /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463491/extract-nfsrootfs-0oggbidr
201 15:46:09.213249 extracting modules file /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7463491/extract-overlay-ramdisk-2wr2srrm/ramdisk
202 15:46:09.216925 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 15:46:09.217032 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
204 15:46:09.217117 [common] Applying overlay to NFS
205 15:46:09.217190 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7463491/compress-overlay-syzw67d1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7463491/extract-nfsrootfs-0oggbidr
206 15:46:09.650340 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 15:46:09.650516 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
208 15:46:09.650614 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 15:46:09.650710 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
210 15:46:09.650797 Building ramdisk /var/lib/lava/dispatcher/tmp/7463491/extract-overlay-ramdisk-2wr2srrm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7463491/extract-overlay-ramdisk-2wr2srrm/ramdisk
211 15:46:09.683309 >> 24434 blocks
212 15:46:10.139314 rename /var/lib/lava/dispatcher/tmp/7463491/extract-overlay-ramdisk-2wr2srrm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/ramdisk/ramdisk.cpio.gz
213 15:46:10.139729 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
214 15:46:10.139888 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
215 15:46:10.140012 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
216 15:46:10.140109 No mkimage arch provided, not using FIT.
217 15:46:10.140201 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 15:46:10.140287 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 15:46:10.140389 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
220 15:46:10.140486 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
221 15:46:10.140573 No LXC device requested
222 15:46:10.140661 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 15:46:10.140752 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
224 15:46:10.140837 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 15:46:10.140915 Checking files for TFTP limit of 4294967296 bytes.
226 15:46:10.141297 end: 1 tftp-deploy (duration 00:00:22) [common]
227 15:46:10.141405 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 15:46:10.141499 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 15:46:10.141632 substitutions:
230 15:46:10.141703 - {DTB}: None
231 15:46:10.141770 - {INITRD}: 7463491/tftp-deploy-l2q1j58k/ramdisk/ramdisk.cpio.gz
232 15:46:10.141835 - {KERNEL}: 7463491/tftp-deploy-l2q1j58k/kernel/bzImage
233 15:46:10.141897 - {LAVA_MAC}: None
234 15:46:10.141959 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7463491/extract-nfsrootfs-0oggbidr
235 15:46:10.142023 - {NFS_SERVER_IP}: 192.168.201.1
236 15:46:10.142084 - {PRESEED_CONFIG}: None
237 15:46:10.142143 - {PRESEED_LOCAL}: None
238 15:46:10.142202 - {RAMDISK}: 7463491/tftp-deploy-l2q1j58k/ramdisk/ramdisk.cpio.gz
239 15:46:10.142261 - {ROOT_PART}: None
240 15:46:10.142320 - {ROOT}: None
241 15:46:10.142378 - {SERVER_IP}: 192.168.201.1
242 15:46:10.142436 - {TEE}: None
243 15:46:10.142494 Parsed boot commands:
244 15:46:10.142551 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 15:46:10.142707 Parsed boot commands: tftpboot 192.168.201.1 7463491/tftp-deploy-l2q1j58k/kernel/bzImage 7463491/tftp-deploy-l2q1j58k/kernel/cmdline 7463491/tftp-deploy-l2q1j58k/ramdisk/ramdisk.cpio.gz
246 15:46:10.142804 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 15:46:10.142894 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 15:46:10.142990 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 15:46:10.143085 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 15:46:10.143161 Not connected, no need to disconnect.
251 15:46:10.143242 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 15:46:10.143328 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 15:46:10.143398 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 15:46:10.146093 Setting prompt string to ['lava-test: # ']
255 15:46:10.146383 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 15:46:10.146490 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 15:46:10.146589 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 15:46:10.146679 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 15:46:10.146859 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 15:46:10.165649 >> Command sent successfully.
261 15:46:10.167599 Returned 0 in 0 seconds
262 15:46:10.268347 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 15:46:10.269865 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 15:46:10.270378 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 15:46:10.270793 Setting prompt string to 'Starting depthcharge on Helios...'
267 15:46:10.271147 Changing prompt to 'Starting depthcharge on Helios...'
268 15:46:10.271512 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 15:46:10.272834 [Enter `^Ec?' for help]
270 15:46:17.422516
271 15:46:17.423182
272 15:46:17.432297 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 15:46:17.435711 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 15:46:17.442519 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 15:46:17.445768 CPU: AES supported, TXT NOT supported, VT supported
276 15:46:17.452364 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 15:46:17.455549 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 15:46:17.461820 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 15:46:17.465783 VBOOT: Loading verstage.
280 15:46:17.469176 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 15:46:17.475126 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 15:46:17.482405 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 15:46:17.483018 CBFS @ c08000 size 3f8000
284 15:46:17.488785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 15:46:17.492028 CBFS: Locating 'fallback/verstage'
286 15:46:17.495476 CBFS: Found @ offset 10fb80 size 1072c
287 15:46:17.499608
288 15:46:17.500148
289 15:46:17.509234 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 15:46:17.523251 Probing TPM: . done!
291 15:46:17.526866 TPM ready after 0 ms
292 15:46:17.529919 Connected to device vid:did:rid of 1ae0:0028:00
293 15:46:17.540221 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 15:46:17.543916 Initialized TPM device CR50 revision 0
295 15:46:17.579473 tlcl_send_startup: Startup return code is 0
296 15:46:17.580112 TPM: setup succeeded
297 15:46:17.592069 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 15:46:17.595916 Chrome EC: UHEPI supported
299 15:46:17.598761 Phase 1
300 15:46:17.602141 FMAP: area GBB found @ c05000 (12288 bytes)
301 15:46:17.609795 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 15:46:17.612725 Phase 2
303 15:46:17.613233 Phase 3
304 15:46:17.615968 FMAP: area GBB found @ c05000 (12288 bytes)
305 15:46:17.622623 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 15:46:17.629032 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 15:46:17.632266 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 15:46:17.638750 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 15:46:17.654569 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 15:46:17.657573 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 15:46:17.664536 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 15:46:17.668499 Phase 4
313 15:46:17.672417 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 15:46:17.678894 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 15:46:17.858187 VB2:vb2_rsa_verify_digest() Digest check failed!
316 15:46:17.865118 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 15:46:17.865716 Saving nvdata
318 15:46:17.868289 Reboot requested (10020007)
319 15:46:17.871106 board_reset() called!
320 15:46:17.871608 full_reset() called!
321 15:46:22.388880
322 15:46:22.389476
323 15:46:22.398735 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 15:46:22.402150 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 15:46:22.408743 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 15:46:22.412556 CPU: AES supported, TXT NOT supported, VT supported
327 15:46:22.419278 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 15:46:22.422364 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 15:46:22.429019 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 15:46:22.432327 VBOOT: Loading verstage.
331 15:46:22.435748 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 15:46:22.442558 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 15:46:22.445781 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 15:46:22.449095 CBFS @ c08000 size 3f8000
335 15:46:22.455668 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 15:46:22.459140 CBFS: Locating 'fallback/verstage'
337 15:46:22.461957 CBFS: Found @ offset 10fb80 size 1072c
338 15:46:22.465714
339 15:46:22.466215
340 15:46:22.475904 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 15:46:22.490000 Probing TPM: . done!
342 15:46:22.493105 TPM ready after 0 ms
343 15:46:22.496819 Connected to device vid:did:rid of 1ae0:0028:00
344 15:46:22.507264 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
345 15:46:22.510293 Initialized TPM device CR50 revision 0
346 15:46:22.546202 tlcl_send_startup: Startup return code is 0
347 15:46:22.546788 TPM: setup succeeded
348 15:46:22.558488 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 15:46:22.562462 Chrome EC: UHEPI supported
350 15:46:22.565700 Phase 1
351 15:46:22.569793 FMAP: area GBB found @ c05000 (12288 bytes)
352 15:46:22.576167 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 15:46:22.582712 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 15:46:22.585888 Recovery requested (1009000e)
355 15:46:22.586383 Saving nvdata
356 15:46:22.598028 tlcl_extend: response is 0
357 15:46:22.606196 tlcl_extend: response is 0
358 15:46:22.613275 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 15:46:22.616534 CBFS @ c08000 size 3f8000
360 15:46:22.623184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 15:46:22.626413 CBFS: Locating 'fallback/romstage'
362 15:46:22.629600 CBFS: Found @ offset 80 size 145fc
363 15:46:22.633052 Accumulated console time in verstage 98 ms
364 15:46:22.633575
365 15:46:22.633978
366 15:46:22.646467 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 15:46:22.652708 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 15:46:22.656437 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 15:46:22.659739 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 15:46:22.666349 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 15:46:22.669627 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 15:46:22.672963 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
373 15:46:22.675687 TCO_STS: 0000 0000
374 15:46:22.679723 GEN_PMCON: e0015238 00000200
375 15:46:22.682816 GBLRST_CAUSE: 00000000 00000000
376 15:46:22.683590 prev_sleep_state 5
377 15:46:22.685922 Boot Count incremented to 40106
378 15:46:22.692829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 15:46:22.696715 CBFS @ c08000 size 3f8000
380 15:46:22.702643 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 15:46:22.703229 CBFS: Locating 'fspm.bin'
382 15:46:22.709754 CBFS: Found @ offset 5ffc0 size 71000
383 15:46:22.712780 Chrome EC: UHEPI supported
384 15:46:22.719416 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 15:46:22.722969 Probing TPM: done!
386 15:46:22.729857 Connected to device vid:did:rid of 1ae0:0028:00
387 15:46:22.739901 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
388 15:46:22.745839 Initialized TPM device CR50 revision 0
389 15:46:22.755040 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 15:46:22.761788 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 15:46:22.764741 MRC cache found, size 1948
392 15:46:22.767994 bootmode is set to: 2
393 15:46:22.771490 PRMRR disabled by config.
394 15:46:22.774727 SPD INDEX = 1
395 15:46:22.777995 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 15:46:22.781160 CBFS @ c08000 size 3f8000
397 15:46:22.787823 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 15:46:22.788451 CBFS: Locating 'spd.bin'
399 15:46:22.791047 CBFS: Found @ offset 5fb80 size 400
400 15:46:22.794745 SPD: module type is LPDDR3
401 15:46:22.797790 SPD: module part is
402 15:46:22.804442 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 15:46:22.807974 SPD: device width 4 bits, bus width 8 bits
404 15:46:22.811096 SPD: module size is 4096 MB (per channel)
405 15:46:22.814953 memory slot: 0 configuration done.
406 15:46:22.817563 memory slot: 2 configuration done.
407 15:46:22.868749 CBMEM:
408 15:46:22.872178 IMD: root @ 99fff000 254 entries.
409 15:46:22.876085 IMD: root @ 99ffec00 62 entries.
410 15:46:22.878845 External stage cache:
411 15:46:22.882238 IMD: root @ 9abff000 254 entries.
412 15:46:22.885525 IMD: root @ 9abfec00 62 entries.
413 15:46:22.888821 Chrome EC: clear events_b mask to 0x0000000020004000
414 15:46:22.904995 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 15:46:22.915442 tlcl_write: response is 0
416 15:46:22.926973 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 15:46:22.933648 MRC: TPM MRC hash updated successfully.
418 15:46:22.934278 2 DIMMs found
419 15:46:22.937519 SMM Memory Map
420 15:46:22.940252 SMRAM : 0x9a000000 0x1000000
421 15:46:22.943926 Subregion 0: 0x9a000000 0xa00000
422 15:46:22.947128 Subregion 1: 0x9aa00000 0x200000
423 15:46:22.950247 Subregion 2: 0x9ac00000 0x400000
424 15:46:22.953566 top_of_ram = 0x9a000000
425 15:46:22.957229 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 15:46:22.963671 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 15:46:22.967084 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 15:46:22.973701 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 15:46:22.976871 CBFS @ c08000 size 3f8000
430 15:46:22.980436 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 15:46:22.983678 CBFS: Locating 'fallback/postcar'
432 15:46:22.989791 CBFS: Found @ offset 107000 size 4b44
433 15:46:22.993115 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 15:46:23.005983 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 15:46:23.009197 Processing 180 relocs. Offset value of 0x97c0c000
436 15:46:23.018051 Accumulated console time in romstage 286 ms
437 15:46:23.018646
438 15:46:23.019049
439 15:46:23.027732 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 15:46:23.034595 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 15:46:23.038076 CBFS @ c08000 size 3f8000
442 15:46:23.040892 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 15:46:23.048008 CBFS: Locating 'fallback/ramstage'
444 15:46:23.051031 CBFS: Found @ offset 43380 size 1b9e8
445 15:46:23.057488 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 15:46:23.089726 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 15:46:23.092609 Processing 3976 relocs. Offset value of 0x98db0000
448 15:46:23.099916 Accumulated console time in postcar 52 ms
449 15:46:23.100621
450 15:46:23.101105
451 15:46:23.110108 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 15:46:23.116369 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 15:46:23.120376 WARNING: RO_VPD is uninitialized or empty.
454 15:46:23.122926 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 15:46:23.129468 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 15:46:23.129967 Normal boot.
457 15:46:23.136097 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 15:46:23.139732 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 15:46:23.142973 CBFS @ c08000 size 3f8000
460 15:46:23.149261 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 15:46:23.153155 CBFS: Locating 'cpu_microcode_blob.bin'
462 15:46:23.155892 CBFS: Found @ offset 14700 size 2ec00
463 15:46:23.159293 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 15:46:23.162782 Skip microcode update
465 15:46:23.169025 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 15:46:23.169630 CBFS @ c08000 size 3f8000
467 15:46:23.175397 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 15:46:23.179105 CBFS: Locating 'fsps.bin'
469 15:46:23.182391 CBFS: Found @ offset d1fc0 size 35000
470 15:46:23.207924 Detected 4 core, 8 thread CPU.
471 15:46:23.211153 Setting up SMI for CPU
472 15:46:23.214307 IED base = 0x9ac00000
473 15:46:23.214906 IED size = 0x00400000
474 15:46:23.217602 Will perform SMM setup.
475 15:46:23.224455 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 15:46:23.230851 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 15:46:23.234718 Processing 16 relocs. Offset value of 0x00030000
478 15:46:23.237811 Attempting to start 7 APs
479 15:46:23.241372 Waiting for 10ms after sending INIT.
480 15:46:23.258000 Waiting for 1st SIPI to complete...done.
481 15:46:23.258612 AP: slot 3 apic_id 1.
482 15:46:23.264137 Waiting for 2nd SIPI to complete...done.
483 15:46:23.264736 AP: slot 1 apic_id 2.
484 15:46:23.267377 AP: slot 2 apic_id 3.
485 15:46:23.270916 AP: slot 7 apic_id 6.
486 15:46:23.271515 AP: slot 6 apic_id 7.
487 15:46:23.274140 AP: slot 5 apic_id 4.
488 15:46:23.277681 AP: slot 4 apic_id 5.
489 15:46:23.284025 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 15:46:23.287828 Processing 13 relocs. Offset value of 0x00038000
491 15:46:23.294073 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 15:46:23.300565 Installing SMM handler to 0x9a000000
493 15:46:23.307179 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 15:46:23.310486 Processing 658 relocs. Offset value of 0x9a010000
495 15:46:23.320478 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 15:46:23.323855 Processing 13 relocs. Offset value of 0x9a008000
497 15:46:23.330427 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 15:46:23.336683 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 15:46:23.340524 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 15:46:23.346856 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 15:46:23.353629 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 15:46:23.360210 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 15:46:23.363186 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 15:46:23.370133 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 15:46:23.373868 Clearing SMI status registers
506 15:46:23.376996 SMI_STS: PM1
507 15:46:23.377596 PM1_STS: PWRBTN
508 15:46:23.380775 TCO_STS: SECOND_TO
509 15:46:23.383307 New SMBASE 0x9a000000
510 15:46:23.386958 In relocation handler: CPU 0
511 15:46:23.390557 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 15:46:23.393272 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 15:46:23.397087 Relocation complete.
514 15:46:23.400005 New SMBASE 0x99fff400
515 15:46:23.403583 In relocation handler: CPU 3
516 15:46:23.406913 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 15:46:23.410049 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 15:46:23.413477 Relocation complete.
519 15:46:23.416643 New SMBASE 0x99ffe400
520 15:46:23.417143 In relocation handler: CPU 7
521 15:46:23.422996 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
522 15:46:23.426186 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 15:46:23.430029 Relocation complete.
524 15:46:23.430725 New SMBASE 0x99ffe800
525 15:46:23.433055 In relocation handler: CPU 6
526 15:46:23.440178 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
527 15:46:23.443973 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 15:46:23.446456 Relocation complete.
529 15:46:23.446951 New SMBASE 0x99fff000
530 15:46:23.449553 In relocation handler: CPU 4
531 15:46:23.456550 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
532 15:46:23.460015 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 15:46:23.462811 Relocation complete.
534 15:46:23.463320 New SMBASE 0x99ffec00
535 15:46:23.466633 In relocation handler: CPU 5
536 15:46:23.470190 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 15:46:23.476219 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 15:46:23.479756 Relocation complete.
539 15:46:23.480395 New SMBASE 0x99fffc00
540 15:46:23.483095 In relocation handler: CPU 1
541 15:46:23.486225 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
542 15:46:23.492852 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 15:46:23.495766 Relocation complete.
544 15:46:23.496294 New SMBASE 0x99fff800
545 15:46:23.499663 In relocation handler: CPU 2
546 15:46:23.502449 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
547 15:46:23.509346 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 15:46:23.509979 Relocation complete.
549 15:46:23.512492 Initializing CPU #0
550 15:46:23.516283 CPU: vendor Intel device 806ec
551 15:46:23.519724 CPU: family 06, model 8e, stepping 0c
552 15:46:23.522828 Clearing out pending MCEs
553 15:46:23.525818 Setting up local APIC...
554 15:46:23.526331 apic_id: 0x00 done.
555 15:46:23.529523 Turbo is available but hidden
556 15:46:23.532947 Turbo is available and visible
557 15:46:23.535646 VMX status: enabled
558 15:46:23.539274 IA32_FEATURE_CONTROL status: locked
559 15:46:23.543202 Skip microcode update
560 15:46:23.543797 CPU #0 initialized
561 15:46:23.545781 Initializing CPU #3
562 15:46:23.549662 Initializing CPU #7
563 15:46:23.550222 Initializing CPU #4
564 15:46:23.552323 CPU: vendor Intel device 806ec
565 15:46:23.556588 CPU: family 06, model 8e, stepping 0c
566 15:46:23.558746 Clearing out pending MCEs
567 15:46:23.562273 Initializing CPU #2
568 15:46:23.562775 Initializing CPU #1
569 15:46:23.565865 CPU: vendor Intel device 806ec
570 15:46:23.569424 CPU: family 06, model 8e, stepping 0c
571 15:46:23.572798 CPU: vendor Intel device 806ec
572 15:46:23.575805 CPU: family 06, model 8e, stepping 0c
573 15:46:23.579191 Clearing out pending MCEs
574 15:46:23.582829 Clearing out pending MCEs
575 15:46:23.585752 Setting up local APIC...
576 15:46:23.588992 Setting up local APIC...
577 15:46:23.589489 apic_id: 0x03 done.
578 15:46:23.592093 Setting up local APIC...
579 15:46:23.595751 apic_id: 0x01 done.
580 15:46:23.596285 apic_id: 0x02 done.
581 15:46:23.599745 VMX status: enabled
582 15:46:23.602202 VMX status: enabled
583 15:46:23.605958 IA32_FEATURE_CONTROL status: locked
584 15:46:23.608978 IA32_FEATURE_CONTROL status: locked
585 15:46:23.609599 Skip microcode update
586 15:46:23.612187 Skip microcode update
587 15:46:23.615132 CPU #2 initialized
588 15:46:23.615636 CPU #1 initialized
589 15:46:23.619528 VMX status: enabled
590 15:46:23.620167 Initializing CPU #6
591 15:46:23.622187 CPU: vendor Intel device 806ec
592 15:46:23.628759 CPU: family 06, model 8e, stepping 0c
593 15:46:23.629266 CPU: vendor Intel device 806ec
594 15:46:23.635029 CPU: family 06, model 8e, stepping 0c
595 15:46:23.635541 Clearing out pending MCEs
596 15:46:23.638367 Clearing out pending MCEs
597 15:46:23.642215 Setting up local APIC...
598 15:46:23.645012 Initializing CPU #5
599 15:46:23.648531 CPU: vendor Intel device 806ec
600 15:46:23.651832 CPU: family 06, model 8e, stepping 0c
601 15:46:23.655095 CPU: vendor Intel device 806ec
602 15:46:23.659123 CPU: family 06, model 8e, stepping 0c
603 15:46:23.661725 Clearing out pending MCEs
604 15:46:23.662261 Clearing out pending MCEs
605 15:46:23.664953 Setting up local APIC...
606 15:46:23.668562 Setting up local APIC...
607 15:46:23.672261 IA32_FEATURE_CONTROL status: locked
608 15:46:23.675769 apic_id: 0x05 done.
609 15:46:23.676435 Setting up local APIC...
610 15:46:23.678315 apic_id: 0x07 done.
611 15:46:23.682324 apic_id: 0x06 done.
612 15:46:23.682922 VMX status: enabled
613 15:46:23.685017 VMX status: enabled
614 15:46:23.688273 Skip microcode update
615 15:46:23.688872 apic_id: 0x04 done.
616 15:46:23.691350 VMX status: enabled
617 15:46:23.691860 VMX status: enabled
618 15:46:23.698702 IA32_FEATURE_CONTROL status: locked
619 15:46:23.701483 IA32_FEATURE_CONTROL status: locked
620 15:46:23.701982 Skip microcode update
621 15:46:23.704673 Skip microcode update
622 15:46:23.708204 CPU #4 initialized
623 15:46:23.708801 CPU #5 initialized
624 15:46:23.711374 CPU #3 initialized
625 15:46:23.714856 IA32_FEATURE_CONTROL status: locked
626 15:46:23.718443 IA32_FEATURE_CONTROL status: locked
627 15:46:23.721696 Skip microcode update
628 15:46:23.722301 Skip microcode update
629 15:46:23.724455 CPU #6 initialized
630 15:46:23.724969 CPU #7 initialized
631 15:46:23.731130 bsp_do_flight_plan done after 465 msecs.
632 15:46:23.734544 CPU: frequency set to 4200 MHz
633 15:46:23.735041 Enabling SMIs.
634 15:46:23.737560 Locking SMM.
635 15:46:23.751234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 15:46:23.754803 CBFS @ c08000 size 3f8000
637 15:46:23.761705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 15:46:23.762310 CBFS: Locating 'vbt.bin'
639 15:46:23.764593 CBFS: Found @ offset 5f5c0 size 499
640 15:46:23.771268 Found a VBT of 4608 bytes after decompression
641 15:46:23.956270 Display FSP Version Info HOB
642 15:46:23.959996 Reference Code - CPU = 9.0.1e.30
643 15:46:23.963181 uCode Version = 0.0.0.ca
644 15:46:23.966073 TXT ACM version = ff.ff.ff.ffff
645 15:46:23.969550 Display FSP Version Info HOB
646 15:46:23.972909 Reference Code - ME = 9.0.1e.30
647 15:46:23.976092 MEBx version = 0.0.0.0
648 15:46:23.980011 ME Firmware Version = Consumer SKU
649 15:46:23.982629 Display FSP Version Info HOB
650 15:46:23.986073 Reference Code - CML PCH = 9.0.1e.30
651 15:46:23.989617 PCH-CRID Status = Disabled
652 15:46:23.992541 PCH-CRID Original Value = ff.ff.ff.ffff
653 15:46:23.996031 PCH-CRID New Value = ff.ff.ff.ffff
654 15:46:23.999351 OPROM - RST - RAID = ff.ff.ff.ffff
655 15:46:24.002128 ChipsetInit Base Version = ff.ff.ff.ffff
656 15:46:24.005454 ChipsetInit Oem Version = ff.ff.ff.ffff
657 15:46:24.008742 Display FSP Version Info HOB
658 15:46:24.016267 Reference Code - SA - System Agent = 9.0.1e.30
659 15:46:24.019413 Reference Code - MRC = 0.7.1.6c
660 15:46:24.022173 SA - PCIe Version = 9.0.1e.30
661 15:46:24.022782 SA-CRID Status = Disabled
662 15:46:24.025257 SA-CRID Original Value = 0.0.0.c
663 15:46:24.028995 SA-CRID New Value = 0.0.0.c
664 15:46:24.032650 OPROM - VBIOS = ff.ff.ff.ffff
665 15:46:24.035190 RTC Init
666 15:46:24.038810 Set power on after power failure.
667 15:46:24.039315 Disabling Deep S3
668 15:46:24.041885 Disabling Deep S3
669 15:46:24.042387 Disabling Deep S4
670 15:46:24.045436 Disabling Deep S4
671 15:46:24.048833 Disabling Deep S5
672 15:46:24.049405 Disabling Deep S5
673 15:46:24.055228 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
674 15:46:24.058895 Enumerating buses...
675 15:46:24.061915 Show all devs... Before device enumeration.
676 15:46:24.065191 Root Device: enabled 1
677 15:46:24.065722 CPU_CLUSTER: 0: enabled 1
678 15:46:24.068465 DOMAIN: 0000: enabled 1
679 15:46:24.072112 APIC: 00: enabled 1
680 15:46:24.072707 PCI: 00:00.0: enabled 1
681 15:46:24.075331 PCI: 00:02.0: enabled 1
682 15:46:24.079159 PCI: 00:04.0: enabled 0
683 15:46:24.082396 PCI: 00:05.0: enabled 0
684 15:46:24.082997 PCI: 00:12.0: enabled 1
685 15:46:24.084616 PCI: 00:12.5: enabled 0
686 15:46:24.087916 PCI: 00:12.6: enabled 0
687 15:46:24.091958 PCI: 00:14.0: enabled 1
688 15:46:24.092553 PCI: 00:14.1: enabled 0
689 15:46:24.094953 PCI: 00:14.3: enabled 1
690 15:46:24.098052 PCI: 00:14.5: enabled 0
691 15:46:24.101743 PCI: 00:15.0: enabled 1
692 15:46:24.102343 PCI: 00:15.1: enabled 1
693 15:46:24.104647 PCI: 00:15.2: enabled 0
694 15:46:24.108211 PCI: 00:15.3: enabled 0
695 15:46:24.108836 PCI: 00:16.0: enabled 1
696 15:46:24.111970 PCI: 00:16.1: enabled 0
697 15:46:24.114840 PCI: 00:16.2: enabled 0
698 15:46:24.118021 PCI: 00:16.3: enabled 0
699 15:46:24.118537 PCI: 00:16.4: enabled 0
700 15:46:24.121067 PCI: 00:16.5: enabled 0
701 15:46:24.124604 PCI: 00:17.0: enabled 1
702 15:46:24.127935 PCI: 00:19.0: enabled 1
703 15:46:24.128433 PCI: 00:19.1: enabled 0
704 15:46:24.130977 PCI: 00:19.2: enabled 0
705 15:46:24.134259 PCI: 00:1a.0: enabled 0
706 15:46:24.137647 PCI: 00:1c.0: enabled 0
707 15:46:24.138170 PCI: 00:1c.1: enabled 0
708 15:46:24.140889 PCI: 00:1c.2: enabled 0
709 15:46:24.144780 PCI: 00:1c.3: enabled 0
710 15:46:24.148494 PCI: 00:1c.4: enabled 0
711 15:46:24.149097 PCI: 00:1c.5: enabled 0
712 15:46:24.151106 PCI: 00:1c.6: enabled 0
713 15:46:24.154473 PCI: 00:1c.7: enabled 0
714 15:46:24.155076 PCI: 00:1d.0: enabled 1
715 15:46:24.158403 PCI: 00:1d.1: enabled 0
716 15:46:24.160926 PCI: 00:1d.2: enabled 0
717 15:46:24.164246 PCI: 00:1d.3: enabled 0
718 15:46:24.164778 PCI: 00:1d.4: enabled 0
719 15:46:24.167394 PCI: 00:1d.5: enabled 1
720 15:46:24.171322 PCI: 00:1e.0: enabled 1
721 15:46:24.174778 PCI: 00:1e.1: enabled 0
722 15:46:24.175375 PCI: 00:1e.2: enabled 1
723 15:46:24.178040 PCI: 00:1e.3: enabled 1
724 15:46:24.181436 PCI: 00:1f.0: enabled 1
725 15:46:24.184760 PCI: 00:1f.1: enabled 1
726 15:46:24.185356 PCI: 00:1f.2: enabled 1
727 15:46:24.187581 PCI: 00:1f.3: enabled 1
728 15:46:24.190822 PCI: 00:1f.4: enabled 1
729 15:46:24.191412 PCI: 00:1f.5: enabled 1
730 15:46:24.194353 PCI: 00:1f.6: enabled 0
731 15:46:24.197719 USB0 port 0: enabled 1
732 15:46:24.201324 I2C: 00:15: enabled 1
733 15:46:24.201915 I2C: 00:5d: enabled 1
734 15:46:24.204055 GENERIC: 0.0: enabled 1
735 15:46:24.207938 I2C: 00:1a: enabled 1
736 15:46:24.208532 I2C: 00:38: enabled 1
737 15:46:24.211150 I2C: 00:39: enabled 1
738 15:46:24.214275 I2C: 00:3a: enabled 1
739 15:46:24.214769 I2C: 00:3b: enabled 1
740 15:46:24.217525 PCI: 00:00.0: enabled 1
741 15:46:24.220792 SPI: 00: enabled 1
742 15:46:24.221381 SPI: 01: enabled 1
743 15:46:24.224480 PNP: 0c09.0: enabled 1
744 15:46:24.227409 USB2 port 0: enabled 1
745 15:46:24.228087 USB2 port 1: enabled 1
746 15:46:24.231081 USB2 port 2: enabled 0
747 15:46:24.234085 USB2 port 3: enabled 0
748 15:46:24.234613 USB2 port 5: enabled 0
749 15:46:24.237428 USB2 port 6: enabled 1
750 15:46:24.241159 USB2 port 9: enabled 1
751 15:46:24.244023 USB3 port 0: enabled 1
752 15:46:24.244520 USB3 port 1: enabled 1
753 15:46:24.247722 USB3 port 2: enabled 1
754 15:46:24.250979 USB3 port 3: enabled 1
755 15:46:24.251573 USB3 port 4: enabled 0
756 15:46:24.254219 APIC: 02: enabled 1
757 15:46:24.257694 APIC: 03: enabled 1
758 15:46:24.258291 APIC: 01: enabled 1
759 15:46:24.260799 APIC: 05: enabled 1
760 15:46:24.261395 APIC: 04: enabled 1
761 15:46:24.263734 APIC: 07: enabled 1
762 15:46:24.267190 APIC: 06: enabled 1
763 15:46:24.267683 Compare with tree...
764 15:46:24.270757 Root Device: enabled 1
765 15:46:24.274386 CPU_CLUSTER: 0: enabled 1
766 15:46:24.274983 APIC: 00: enabled 1
767 15:46:24.277873 APIC: 02: enabled 1
768 15:46:24.280699 APIC: 03: enabled 1
769 15:46:24.284060 APIC: 01: enabled 1
770 15:46:24.284663 APIC: 05: enabled 1
771 15:46:24.287675 APIC: 04: enabled 1
772 15:46:24.290293 APIC: 07: enabled 1
773 15:46:24.290790 APIC: 06: enabled 1
774 15:46:24.293984 DOMAIN: 0000: enabled 1
775 15:46:24.297300 PCI: 00:00.0: enabled 1
776 15:46:24.300691 PCI: 00:02.0: enabled 1
777 15:46:24.301282 PCI: 00:04.0: enabled 0
778 15:46:24.304174 PCI: 00:05.0: enabled 0
779 15:46:24.307506 PCI: 00:12.0: enabled 1
780 15:46:24.310257 PCI: 00:12.5: enabled 0
781 15:46:24.313790 PCI: 00:12.6: enabled 0
782 15:46:24.314392 PCI: 00:14.0: enabled 1
783 15:46:24.316958 USB0 port 0: enabled 1
784 15:46:24.320712 USB2 port 0: enabled 1
785 15:46:24.323954 USB2 port 1: enabled 1
786 15:46:24.326909 USB2 port 2: enabled 0
787 15:46:24.327406 USB2 port 3: enabled 0
788 15:46:24.330903 USB2 port 5: enabled 0
789 15:46:24.333557 USB2 port 6: enabled 1
790 15:46:24.337343 USB2 port 9: enabled 1
791 15:46:24.339989 USB3 port 0: enabled 1
792 15:46:24.343413 USB3 port 1: enabled 1
793 15:46:24.343946 USB3 port 2: enabled 1
794 15:46:24.347078 USB3 port 3: enabled 1
795 15:46:24.349954 USB3 port 4: enabled 0
796 15:46:24.353336 PCI: 00:14.1: enabled 0
797 15:46:24.356816 PCI: 00:14.3: enabled 1
798 15:46:24.357419 PCI: 00:14.5: enabled 0
799 15:46:24.360663 PCI: 00:15.0: enabled 1
800 15:46:24.363674 I2C: 00:15: enabled 1
801 15:46:24.366920 PCI: 00:15.1: enabled 1
802 15:46:24.367419 I2C: 00:5d: enabled 1
803 15:46:24.370069 GENERIC: 0.0: enabled 1
804 15:46:24.373701 PCI: 00:15.2: enabled 0
805 15:46:24.376813 PCI: 00:15.3: enabled 0
806 15:46:24.379943 PCI: 00:16.0: enabled 1
807 15:46:24.380553 PCI: 00:16.1: enabled 0
808 15:46:24.383228 PCI: 00:16.2: enabled 0
809 15:46:24.386730 PCI: 00:16.3: enabled 0
810 15:46:24.389660 PCI: 00:16.4: enabled 0
811 15:46:24.393705 PCI: 00:16.5: enabled 0
812 15:46:24.394313 PCI: 00:17.0: enabled 1
813 15:46:24.396420 PCI: 00:19.0: enabled 1
814 15:46:24.399752 I2C: 00:1a: enabled 1
815 15:46:24.403392 I2C: 00:38: enabled 1
816 15:46:24.407110 I2C: 00:39: enabled 1
817 15:46:24.407717 I2C: 00:3a: enabled 1
818 15:46:24.409680 I2C: 00:3b: enabled 1
819 15:46:24.413305 PCI: 00:19.1: enabled 0
820 15:46:24.417241 PCI: 00:19.2: enabled 0
821 15:46:24.417840 PCI: 00:1a.0: enabled 0
822 15:46:24.420227 PCI: 00:1c.0: enabled 0
823 15:46:24.423183 PCI: 00:1c.1: enabled 0
824 15:46:24.425993 PCI: 00:1c.2: enabled 0
825 15:46:24.429688 PCI: 00:1c.3: enabled 0
826 15:46:24.430201 PCI: 00:1c.4: enabled 0
827 15:46:24.433332 PCI: 00:1c.5: enabled 0
828 15:46:24.436034 PCI: 00:1c.6: enabled 0
829 15:46:24.439597 PCI: 00:1c.7: enabled 0
830 15:46:24.442722 PCI: 00:1d.0: enabled 1
831 15:46:24.443225 PCI: 00:1d.1: enabled 0
832 15:46:24.445940 PCI: 00:1d.2: enabled 0
833 15:46:24.449073 PCI: 00:1d.3: enabled 0
834 15:46:24.452985 PCI: 00:1d.4: enabled 0
835 15:46:24.456610 PCI: 00:1d.5: enabled 1
836 15:46:24.457220 PCI: 00:00.0: enabled 1
837 15:46:24.459686 PCI: 00:1e.0: enabled 1
838 15:46:24.462899 PCI: 00:1e.1: enabled 0
839 15:46:24.466172 PCI: 00:1e.2: enabled 1
840 15:46:24.466841 SPI: 00: enabled 1
841 15:46:24.469581 PCI: 00:1e.3: enabled 1
842 15:46:24.472576 SPI: 01: enabled 1
843 15:46:24.476348 PCI: 00:1f.0: enabled 1
844 15:46:24.476851 PNP: 0c09.0: enabled 1
845 15:46:24.479459 PCI: 00:1f.1: enabled 1
846 15:46:24.483498 PCI: 00:1f.2: enabled 1
847 15:46:24.486488 PCI: 00:1f.3: enabled 1
848 15:46:24.489561 PCI: 00:1f.4: enabled 1
849 15:46:24.490169 PCI: 00:1f.5: enabled 1
850 15:46:24.492733 PCI: 00:1f.6: enabled 0
851 15:46:24.495822 Root Device scanning...
852 15:46:24.499092 scan_static_bus for Root Device
853 15:46:24.502467 CPU_CLUSTER: 0 enabled
854 15:46:24.503076 DOMAIN: 0000 enabled
855 15:46:24.505912 DOMAIN: 0000 scanning...
856 15:46:24.509452 PCI: pci_scan_bus for bus 00
857 15:46:24.512176 PCI: 00:00.0 [8086/0000] ops
858 15:46:24.515915 PCI: 00:00.0 [8086/9b61] enabled
859 15:46:24.519534 PCI: 00:02.0 [8086/0000] bus ops
860 15:46:24.522851 PCI: 00:02.0 [8086/9b41] enabled
861 15:46:24.525618 PCI: 00:04.0 [8086/1903] disabled
862 15:46:24.529320 PCI: 00:08.0 [8086/1911] enabled
863 15:46:24.532725 PCI: 00:12.0 [8086/02f9] enabled
864 15:46:24.535662 PCI: 00:14.0 [8086/0000] bus ops
865 15:46:24.538896 PCI: 00:14.0 [8086/02ed] enabled
866 15:46:24.542460 PCI: 00:14.2 [8086/02ef] enabled
867 15:46:24.545738 PCI: 00:14.3 [8086/02f0] enabled
868 15:46:24.548843 PCI: 00:15.0 [8086/0000] bus ops
869 15:46:24.552468 PCI: 00:15.0 [8086/02e8] enabled
870 15:46:24.555727 PCI: 00:15.1 [8086/0000] bus ops
871 15:46:24.559536 PCI: 00:15.1 [8086/02e9] enabled
872 15:46:24.562348 PCI: 00:16.0 [8086/0000] ops
873 15:46:24.565853 PCI: 00:16.0 [8086/02e0] enabled
874 15:46:24.568859 PCI: 00:17.0 [8086/0000] ops
875 15:46:24.572203 PCI: 00:17.0 [8086/02d3] enabled
876 15:46:24.575666 PCI: 00:19.0 [8086/0000] bus ops
877 15:46:24.578969 PCI: 00:19.0 [8086/02c5] enabled
878 15:46:24.582262 PCI: 00:1d.0 [8086/0000] bus ops
879 15:46:24.585443 PCI: 00:1d.0 [8086/02b0] enabled
880 15:46:24.592140 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 15:46:24.592750 PCI: 00:1e.0 [8086/0000] ops
882 15:46:24.595633 PCI: 00:1e.0 [8086/02a8] enabled
883 15:46:24.599017 PCI: 00:1e.2 [8086/0000] bus ops
884 15:46:24.602146 PCI: 00:1e.2 [8086/02aa] enabled
885 15:46:24.605507 PCI: 00:1e.3 [8086/0000] bus ops
886 15:46:24.608884 PCI: 00:1e.3 [8086/02ab] enabled
887 15:46:24.612532 PCI: 00:1f.0 [8086/0000] bus ops
888 15:46:24.615300 PCI: 00:1f.0 [8086/0284] enabled
889 15:46:24.621858 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 15:46:24.628613 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 15:46:24.632531 PCI: 00:1f.3 [8086/0000] bus ops
892 15:46:24.635460 PCI: 00:1f.3 [8086/02c8] enabled
893 15:46:24.638648 PCI: 00:1f.4 [8086/0000] bus ops
894 15:46:24.641987 PCI: 00:1f.4 [8086/02a3] enabled
895 15:46:24.645024 PCI: 00:1f.5 [8086/0000] bus ops
896 15:46:24.648524 PCI: 00:1f.5 [8086/02a4] enabled
897 15:46:24.652331 PCI: Leftover static devices:
898 15:46:24.652917 PCI: 00:05.0
899 15:46:24.655395 PCI: 00:12.5
900 15:46:24.655919 PCI: 00:12.6
901 15:46:24.656328 PCI: 00:14.1
902 15:46:24.658526 PCI: 00:14.5
903 15:46:24.659135 PCI: 00:15.2
904 15:46:24.661885 PCI: 00:15.3
905 15:46:24.662480 PCI: 00:16.1
906 15:46:24.664937 PCI: 00:16.2
907 15:46:24.665435 PCI: 00:16.3
908 15:46:24.665829 PCI: 00:16.4
909 15:46:24.668371 PCI: 00:16.5
910 15:46:24.668867 PCI: 00:19.1
911 15:46:24.671914 PCI: 00:19.2
912 15:46:24.672417 PCI: 00:1a.0
913 15:46:24.672833 PCI: 00:1c.0
914 15:46:24.675286 PCI: 00:1c.1
915 15:46:24.675784 PCI: 00:1c.2
916 15:46:24.678561 PCI: 00:1c.3
917 15:46:24.679159 PCI: 00:1c.4
918 15:46:24.679554 PCI: 00:1c.5
919 15:46:24.682144 PCI: 00:1c.6
920 15:46:24.682856 PCI: 00:1c.7
921 15:46:24.684917 PCI: 00:1d.1
922 15:46:24.685413 PCI: 00:1d.2
923 15:46:24.688874 PCI: 00:1d.3
924 15:46:24.689469 PCI: 00:1d.4
925 15:46:24.689868 PCI: 00:1d.5
926 15:46:24.691465 PCI: 00:1e.1
927 15:46:24.692098 PCI: 00:1f.1
928 15:46:24.695480 PCI: 00:1f.2
929 15:46:24.696119 PCI: 00:1f.6
930 15:46:24.698147 PCI: Check your devicetree.cb.
931 15:46:24.701201 PCI: 00:02.0 scanning...
932 15:46:24.704967 scan_generic_bus for PCI: 00:02.0
933 15:46:24.708071 scan_generic_bus for PCI: 00:02.0 done
934 15:46:24.714708 scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
935 15:46:24.715359 PCI: 00:14.0 scanning...
936 15:46:24.718017 scan_static_bus for PCI: 00:14.0
937 15:46:24.721323 USB0 port 0 enabled
938 15:46:24.725084 USB0 port 0 scanning...
939 15:46:24.728147 scan_static_bus for USB0 port 0
940 15:46:24.731518 USB2 port 0 enabled
941 15:46:24.732147 USB2 port 1 enabled
942 15:46:24.734672 USB2 port 2 disabled
943 15:46:24.735303 USB2 port 3 disabled
944 15:46:24.738350 USB2 port 5 disabled
945 15:46:24.741198 USB2 port 6 enabled
946 15:46:24.741709 USB2 port 9 enabled
947 15:46:24.744474 USB3 port 0 enabled
948 15:46:24.748597 USB3 port 1 enabled
949 15:46:24.749250 USB3 port 2 enabled
950 15:46:24.751197 USB3 port 3 enabled
951 15:46:24.751733 USB3 port 4 disabled
952 15:46:24.754334 USB2 port 0 scanning...
953 15:46:24.757956 scan_static_bus for USB2 port 0
954 15:46:24.761337 scan_static_bus for USB2 port 0 done
955 15:46:24.767997 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
956 15:46:24.771454 USB2 port 1 scanning...
957 15:46:24.774554 scan_static_bus for USB2 port 1
958 15:46:24.777907 scan_static_bus for USB2 port 1 done
959 15:46:24.781300 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
960 15:46:24.784751 USB2 port 6 scanning...
961 15:46:24.787963 scan_static_bus for USB2 port 6
962 15:46:24.791146 scan_static_bus for USB2 port 6 done
963 15:46:24.797789 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
964 15:46:24.801159 USB2 port 9 scanning...
965 15:46:24.804453 scan_static_bus for USB2 port 9
966 15:46:24.807982 scan_static_bus for USB2 port 9 done
967 15:46:24.814320 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
968 15:46:24.814931 USB3 port 0 scanning...
969 15:46:24.817652 scan_static_bus for USB3 port 0
970 15:46:24.820898 scan_static_bus for USB3 port 0 done
971 15:46:24.827818 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
972 15:46:24.831235 USB3 port 1 scanning...
973 15:46:24.834146 scan_static_bus for USB3 port 1
974 15:46:24.837267 scan_static_bus for USB3 port 1 done
975 15:46:24.844247 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
976 15:46:24.844850 USB3 port 2 scanning...
977 15:46:24.847388 scan_static_bus for USB3 port 2
978 15:46:24.851270 scan_static_bus for USB3 port 2 done
979 15:46:24.857229 scan_bus: scanning of bus USB3 port 2 took 9709 usecs
980 15:46:24.860410 USB3 port 3 scanning...
981 15:46:24.863963 scan_static_bus for USB3 port 3
982 15:46:24.867383 scan_static_bus for USB3 port 3 done
983 15:46:24.874491 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
984 15:46:24.877147 scan_static_bus for USB0 port 0 done
985 15:46:24.880789 scan_bus: scanning of bus USB0 port 0 took 155386 usecs
986 15:46:24.887495 scan_static_bus for PCI: 00:14.0 done
987 15:46:24.890729 scan_bus: scanning of bus PCI: 00:14.0 took 173000 usecs
988 15:46:24.893752 PCI: 00:15.0 scanning...
989 15:46:24.897203 scan_generic_bus for PCI: 00:15.0
990 15:46:24.900531 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 15:46:24.907455 scan_generic_bus for PCI: 00:15.0 done
992 15:46:24.910353 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
993 15:46:24.913792 PCI: 00:15.1 scanning...
994 15:46:24.916613 scan_generic_bus for PCI: 00:15.1
995 15:46:24.920523 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 15:46:24.926823 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 15:46:24.930131 scan_generic_bus for PCI: 00:15.1 done
998 15:46:24.936906 scan_bus: scanning of bus PCI: 00:15.1 took 18654 usecs
999 15:46:24.937615 PCI: 00:19.0 scanning...
1000 15:46:24.940448 scan_generic_bus for PCI: 00:19.0
1001 15:46:24.947073 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 15:46:24.950053 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 15:46:24.953130 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 15:46:24.956624 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 15:46:24.963350 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 15:46:24.966816 scan_generic_bus for PCI: 00:19.0 done
1007 15:46:24.969663 scan_bus: scanning of bus PCI: 00:19.0 took 30740 usecs
1008 15:46:24.973197 PCI: 00:1d.0 scanning...
1009 15:46:24.976785 do_pci_scan_bridge for PCI: 00:1d.0
1010 15:46:24.979954 PCI: pci_scan_bus for bus 01
1011 15:46:24.983556 PCI: 01:00.0 [1c5c/1327] enabled
1012 15:46:24.986640 Enabling Common Clock Configuration
1013 15:46:24.993065 L1 Sub-State supported from root port 29
1014 15:46:24.996539 L1 Sub-State Support = 0xf
1015 15:46:24.997153 CommonModeRestoreTime = 0x28
1016 15:46:25.003351 Power On Value = 0x16, Power On Scale = 0x0
1017 15:46:25.003997 ASPM: Enabled L1
1018 15:46:25.010089 scan_bus: scanning of bus PCI: 00:1d.0 took 32793 usecs
1019 15:46:25.013202 PCI: 00:1e.2 scanning...
1020 15:46:25.016271 scan_generic_bus for PCI: 00:1e.2
1021 15:46:25.019713 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 15:46:25.023337 scan_generic_bus for PCI: 00:1e.2 done
1023 15:46:25.029428 scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
1024 15:46:25.032755 PCI: 00:1e.3 scanning...
1025 15:46:25.036200 scan_generic_bus for PCI: 00:1e.3
1026 15:46:25.039411 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 15:46:25.042671 scan_generic_bus for PCI: 00:1e.3 done
1028 15:46:25.049625 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1029 15:46:25.050224 PCI: 00:1f.0 scanning...
1030 15:46:25.055908 scan_static_bus for PCI: 00:1f.0
1031 15:46:25.056412 PNP: 0c09.0 enabled
1032 15:46:25.059584 scan_static_bus for PCI: 00:1f.0 done
1033 15:46:25.066515 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1034 15:46:25.069504 PCI: 00:1f.3 scanning...
1035 15:46:25.072780 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1036 15:46:25.076121 PCI: 00:1f.4 scanning...
1037 15:46:25.079897 scan_generic_bus for PCI: 00:1f.4
1038 15:46:25.086363 scan_generic_bus for PCI: 00:1f.4 done
1039 15:46:25.089300 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1040 15:46:25.093172 PCI: 00:1f.5 scanning...
1041 15:46:25.095910 scan_generic_bus for PCI: 00:1f.5
1042 15:46:25.099205 scan_generic_bus for PCI: 00:1f.5 done
1043 15:46:25.105828 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1044 15:46:25.112216 scan_bus: scanning of bus DOMAIN: 0000 took 605101 usecs
1045 15:46:25.115911 scan_static_bus for Root Device done
1046 15:46:25.119119 scan_bus: scanning of bus Root Device took 625009 usecs
1047 15:46:25.122845 done
1048 15:46:25.126011 Chrome EC: UHEPI supported
1049 15:46:25.129290 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 15:46:25.136582 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 15:46:25.142952 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 15:46:25.149642 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 15:46:25.152373 SPI flash protection: WPSW=0 SRP0=0
1054 15:46:25.158989 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 15:46:25.162217 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 15:46:25.165611 found VGA at PCI: 00:02.0
1057 15:46:25.168770 Setting up VGA for PCI: 00:02.0
1058 15:46:25.175214 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 15:46:25.179308 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 15:46:25.182699 Allocating resources...
1061 15:46:25.185333 Reading resources...
1062 15:46:25.188713 Root Device read_resources bus 0 link: 0
1063 15:46:25.191883 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 15:46:25.199101 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 15:46:25.202103 DOMAIN: 0000 read_resources bus 0 link: 0
1066 15:46:25.209267 PCI: 00:14.0 read_resources bus 0 link: 0
1067 15:46:25.212345 USB0 port 0 read_resources bus 0 link: 0
1068 15:46:25.220823 USB0 port 0 read_resources bus 0 link: 0 done
1069 15:46:25.223780 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 15:46:25.231229 PCI: 00:15.0 read_resources bus 1 link: 0
1071 15:46:25.234375 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 15:46:25.240971 PCI: 00:15.1 read_resources bus 2 link: 0
1073 15:46:25.244128 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 15:46:25.252444 PCI: 00:19.0 read_resources bus 3 link: 0
1075 15:46:25.258617 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 15:46:25.262387 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 15:46:25.268440 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 15:46:25.271897 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 15:46:25.278659 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 15:46:25.282159 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 15:46:25.288612 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 15:46:25.292165 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 15:46:25.298484 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 15:46:25.305106 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 15:46:25.308450 Root Device read_resources bus 0 link: 0 done
1086 15:46:25.312367 Done reading resources.
1087 15:46:25.315220 Show resources in subtree (Root Device)...After reading.
1088 15:46:25.322330 Root Device child on link 0 CPU_CLUSTER: 0
1089 15:46:25.325347 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 15:46:25.325960 APIC: 00
1091 15:46:25.328760 APIC: 02
1092 15:46:25.329369 APIC: 03
1093 15:46:25.332126 APIC: 01
1094 15:46:25.332751 APIC: 05
1095 15:46:25.333156 APIC: 04
1096 15:46:25.335309 APIC: 07
1097 15:46:25.335963 APIC: 06
1098 15:46:25.338364 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 15:46:25.348291 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 15:46:25.404624 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 15:46:25.405235 PCI: 00:00.0
1102 15:46:25.406158 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 15:46:25.406604 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 15:46:25.407070 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 15:46:25.407825 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 15:46:25.454294 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 15:46:25.455414 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 15:46:25.456284 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 15:46:25.456711 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 15:46:25.457461 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 15:46:25.457862 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 15:46:25.504413 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 15:46:25.505376 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 15:46:25.505883 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 15:46:25.506282 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 15:46:25.507024 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 15:46:25.554156 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 15:46:25.554777 PCI: 00:02.0
1119 15:46:25.555679 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 15:46:25.556171 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 15:46:25.556559 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 15:46:25.556924 PCI: 00:04.0
1123 15:46:25.557278 PCI: 00:08.0
1124 15:46:25.557995 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 15:46:25.580233 PCI: 00:12.0
1126 15:46:25.580859 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 15:46:25.581665 PCI: 00:14.0 child on link 0 USB0 port 0
1128 15:46:25.582078 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 15:46:25.584235 USB0 port 0 child on link 0 USB2 port 0
1130 15:46:25.587180 USB2 port 0
1131 15:46:25.587776 USB2 port 1
1132 15:46:25.590804 USB2 port 2
1133 15:46:25.591397 USB2 port 3
1134 15:46:25.593908 USB2 port 5
1135 15:46:25.594505 USB2 port 6
1136 15:46:25.597450 USB2 port 9
1137 15:46:25.598046 USB3 port 0
1138 15:46:25.601219 USB3 port 1
1139 15:46:25.601848 USB3 port 2
1140 15:46:25.604089 USB3 port 3
1141 15:46:25.607188 USB3 port 4
1142 15:46:25.607819 PCI: 00:14.2
1143 15:46:25.617392 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 15:46:25.627279 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 15:46:25.630604 PCI: 00:14.3
1146 15:46:25.640601 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 15:46:25.643367 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 15:46:25.653234 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 15:46:25.653825 I2C: 01:15
1150 15:46:25.660272 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 15:46:25.670043 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:46:25.670661 I2C: 02:5d
1153 15:46:25.673375 GENERIC: 0.0
1154 15:46:25.673869 PCI: 00:16.0
1155 15:46:25.683390 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 15:46:25.686662 PCI: 00:17.0
1157 15:46:25.693364 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 15:46:25.703322 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 15:46:25.713988 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 15:46:25.719616 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 15:46:25.729939 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 15:46:25.736745 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 15:46:25.742864 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 15:46:25.752579 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:46:25.753078 I2C: 03:1a
1166 15:46:25.753590 I2C: 03:38
1167 15:46:25.755922 I2C: 03:39
1168 15:46:25.756440 I2C: 03:3a
1169 15:46:25.759512 I2C: 03:3b
1170 15:46:25.762839 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 15:46:25.773031 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 15:46:25.782753 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 15:46:25.792419 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 15:46:25.793017 PCI: 01:00.0
1175 15:46:25.802790 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 15:46:25.805579 PCI: 00:1e.0
1177 15:46:25.816074 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 15:46:25.826209 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 15:46:25.829181 PCI: 00:1e.2 child on link 0 SPI: 00
1180 15:46:25.839201 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:46:25.842476 SPI: 00
1182 15:46:25.845841 PCI: 00:1e.3 child on link 0 SPI: 01
1183 15:46:25.855432 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 15:46:25.856147 SPI: 01
1185 15:46:25.858656 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 15:46:25.868531 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 15:46:25.878838 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 15:46:25.879467 PNP: 0c09.0
1189 15:46:25.888271 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 15:46:25.888870 PCI: 00:1f.3
1191 15:46:25.898604 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 15:46:25.908364 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 15:46:25.911972 PCI: 00:1f.4
1194 15:46:25.921407 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 15:46:25.931523 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 15:46:25.932173 PCI: 00:1f.5
1197 15:46:25.942234 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 15:46:25.948122 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 15:46:25.954588 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 15:46:25.961190 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 15:46:25.965074 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 15:46:25.967866 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 15:46:25.970889 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 15:46:25.974527 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 15:46:25.981004 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 15:46:25.987807 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 15:46:25.997962 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 15:46:26.004689 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 15:46:26.011408 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 15:46:26.014232 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 15:46:26.024800 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 15:46:26.027582 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 15:46:26.034280 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 15:46:26.037662 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 15:46:26.043636 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 15:46:26.047059 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 15:46:26.053815 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 15:46:26.056985 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 15:46:26.063602 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 15:46:26.067495 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 15:46:26.070796 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 15:46:26.076758 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 15:46:26.080237 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 15:46:26.086850 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 15:46:26.090265 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 15:46:26.097026 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 15:46:26.100011 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 15:46:26.107041 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 15:46:26.109990 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 15:46:26.116832 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 15:46:26.119546 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 15:46:26.126577 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 15:46:26.129884 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 15:46:26.136627 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 15:46:26.142790 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 15:46:26.146369 avoid_fixed_resources: DOMAIN: 0000
1237 15:46:26.152892 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 15:46:26.159549 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 15:46:26.166257 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 15:46:26.173146 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 15:46:26.182925 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 15:46:26.189654 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 15:46:26.196385 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 15:46:26.206545 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 15:46:26.212965 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 15:46:26.219523 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 15:46:26.226012 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 15:46:26.236569 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 15:46:26.237169 Setting resources...
1250 15:46:26.242438 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 15:46:26.245640 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 15:46:26.252842 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 15:46:26.255973 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 15:46:26.259529 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 15:46:26.266116 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 15:46:26.272191 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 15:46:26.279328 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 15:46:26.285952 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 15:46:26.292409 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 15:46:26.295886 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 15:46:26.301950 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 15:46:26.305847 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 15:46:26.312221 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 15:46:26.315201 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 15:46:26.318409 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 15:46:26.325407 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 15:46:26.328750 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 15:46:26.335866 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 15:46:26.338982 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 15:46:26.345680 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 15:46:26.348282 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 15:46:26.355553 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 15:46:26.358737 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 15:46:26.365678 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 15:46:26.368301 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 15:46:26.375362 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 15:46:26.378368 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 15:46:26.385523 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 15:46:26.388448 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 15:46:26.392214 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 15:46:26.398301 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 15:46:26.405269 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 15:46:26.411463 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 15:46:26.421204 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 15:46:26.428022 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 15:46:26.431429 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 15:46:26.441016 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 15:46:26.444535 Root Device assign_resources, bus 0 link: 0
1289 15:46:26.447745 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 15:46:26.458002 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 15:46:26.464511 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 15:46:26.474870 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 15:46:26.481021 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 15:46:26.491222 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 15:46:26.497524 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 15:46:26.504308 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 15:46:26.507403 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 15:46:26.517573 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 15:46:26.524234 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 15:46:26.534332 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 15:46:26.541017 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 15:46:26.544007 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 15:46:26.550751 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 15:46:26.557336 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 15:46:26.563862 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 15:46:26.567123 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 15:46:26.576940 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 15:46:26.583755 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 15:46:26.590466 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 15:46:26.600558 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 15:46:26.606915 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 15:46:26.613830 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 15:46:26.623468 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 15:46:26.629889 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 15:46:26.636685 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 15:46:26.639954 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 15:46:26.650449 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 15:46:26.656293 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 15:46:26.666421 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 15:46:26.669477 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 15:46:26.679536 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 15:46:26.682578 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 15:46:26.692489 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 15:46:26.699506 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 15:46:26.705698 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 15:46:26.709433 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 15:46:26.719714 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 15:46:26.722729 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 15:46:26.725953 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 15:46:26.732634 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 15:46:26.736457 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 15:46:26.741969 LPC: Trying to open IO window from 800 size 1ff
1333 15:46:26.748854 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 15:46:26.758741 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 15:46:26.765763 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 15:46:26.775353 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 15:46:26.778524 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 15:46:26.785110 Root Device assign_resources, bus 0 link: 0
1339 15:46:26.785742 Done setting resources.
1340 15:46:26.791942 Show resources in subtree (Root Device)...After assigning values.
1341 15:46:26.798549 Root Device child on link 0 CPU_CLUSTER: 0
1342 15:46:26.801956 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 15:46:26.802733 APIC: 00
1344 15:46:26.804721 APIC: 02
1345 15:46:26.805207 APIC: 03
1346 15:46:26.805589 APIC: 01
1347 15:46:26.808070 APIC: 05
1348 15:46:26.808750 APIC: 04
1349 15:46:26.811574 APIC: 07
1350 15:46:26.812150 APIC: 06
1351 15:46:26.815097 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 15:46:26.825000 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 15:46:26.838347 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 15:46:26.838952 PCI: 00:00.0
1355 15:46:26.847910 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 15:46:26.858253 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 15:46:26.867953 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 15:46:26.874318 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 15:46:26.884695 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 15:46:26.894605 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 15:46:26.904685 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 15:46:26.913900 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 15:46:26.923987 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 15:46:26.930770 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 15:46:26.940572 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 15:46:26.950785 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 15:46:26.960754 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 15:46:26.970536 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 15:46:26.980117 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 15:46:26.987183 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 15:46:26.990317 PCI: 00:02.0
1372 15:46:27.000804 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 15:46:27.009797 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 15:46:27.019959 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 15:46:27.023295 PCI: 00:04.0
1376 15:46:27.023828 PCI: 00:08.0
1377 15:46:27.033148 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 15:46:27.036534 PCI: 00:12.0
1379 15:46:27.046289 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 15:46:27.050035 PCI: 00:14.0 child on link 0 USB0 port 0
1381 15:46:27.059534 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 15:46:27.066053 USB0 port 0 child on link 0 USB2 port 0
1383 15:46:27.066659 USB2 port 0
1384 15:46:27.069913 USB2 port 1
1385 15:46:27.070521 USB2 port 2
1386 15:46:27.072949 USB2 port 3
1387 15:46:27.073522 USB2 port 5
1388 15:46:27.076534 USB2 port 6
1389 15:46:27.077145 USB2 port 9
1390 15:46:27.079599 USB3 port 0
1391 15:46:27.080132 USB3 port 1
1392 15:46:27.083446 USB3 port 2
1393 15:46:27.085951 USB3 port 3
1394 15:46:27.086558 USB3 port 4
1395 15:46:27.089342 PCI: 00:14.2
1396 15:46:27.099160 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 15:46:27.109506 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 15:46:27.110122 PCI: 00:14.3
1399 15:46:27.119684 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 15:46:27.126032 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 15:46:27.135605 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 15:46:27.136259 I2C: 01:15
1403 15:46:27.142943 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 15:46:27.152421 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 15:46:27.153033 I2C: 02:5d
1406 15:46:27.155363 GENERIC: 0.0
1407 15:46:27.155923 PCI: 00:16.0
1408 15:46:27.165245 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 15:46:27.169251 PCI: 00:17.0
1410 15:46:27.178960 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 15:46:27.188751 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 15:46:27.198830 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 15:46:27.205263 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 15:46:27.214733 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 15:46:27.224637 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 15:46:27.231628 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 15:46:27.242070 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 15:46:27.242807 I2C: 03:1a
1419 15:46:27.244646 I2C: 03:38
1420 15:46:27.245154 I2C: 03:39
1421 15:46:27.248182 I2C: 03:3a
1422 15:46:27.248690 I2C: 03:3b
1423 15:46:27.251428 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 15:46:27.261373 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 15:46:27.271413 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 15:46:27.281033 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 15:46:27.284334 PCI: 01:00.0
1428 15:46:27.294197 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 15:46:27.297793 PCI: 00:1e.0
1430 15:46:27.307702 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 15:46:27.317488 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 15:46:27.320729 PCI: 00:1e.2 child on link 0 SPI: 00
1433 15:46:27.331323 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 15:46:27.334564 SPI: 00
1435 15:46:27.337300 PCI: 00:1e.3 child on link 0 SPI: 01
1436 15:46:27.347264 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 15:46:27.350370 SPI: 01
1438 15:46:27.354078 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 15:46:27.360715 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 15:46:27.371160 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 15:46:27.373746 PNP: 0c09.0
1442 15:46:27.380731 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 15:46:27.383963 PCI: 00:1f.3
1444 15:46:27.393813 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 15:46:27.403899 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 15:46:27.407154 PCI: 00:1f.4
1447 15:46:27.413435 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 15:46:27.424012 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 15:46:27.426735 PCI: 00:1f.5
1450 15:46:27.436838 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 15:46:27.440069 Done allocating resources.
1452 15:46:27.446138 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 15:46:27.446741 Enabling resources...
1454 15:46:27.453783 PCI: 00:00.0 subsystem <- 8086/9b61
1455 15:46:27.454406 PCI: 00:00.0 cmd <- 06
1456 15:46:27.456882 PCI: 00:02.0 subsystem <- 8086/9b41
1457 15:46:27.461334 PCI: 00:02.0 cmd <- 03
1458 15:46:27.463315 PCI: 00:08.0 cmd <- 06
1459 15:46:27.467114 PCI: 00:12.0 subsystem <- 8086/02f9
1460 15:46:27.470346 PCI: 00:12.0 cmd <- 02
1461 15:46:27.473467 PCI: 00:14.0 subsystem <- 8086/02ed
1462 15:46:27.476882 PCI: 00:14.0 cmd <- 02
1463 15:46:27.480281 PCI: 00:14.2 cmd <- 02
1464 15:46:27.483429 PCI: 00:14.3 subsystem <- 8086/02f0
1465 15:46:27.484074 PCI: 00:14.3 cmd <- 02
1466 15:46:27.490916 PCI: 00:15.0 subsystem <- 8086/02e8
1467 15:46:27.491423 PCI: 00:15.0 cmd <- 02
1468 15:46:27.493273 PCI: 00:15.1 subsystem <- 8086/02e9
1469 15:46:27.496956 PCI: 00:15.1 cmd <- 02
1470 15:46:27.500310 PCI: 00:16.0 subsystem <- 8086/02e0
1471 15:46:27.503984 PCI: 00:16.0 cmd <- 02
1472 15:46:27.506704 PCI: 00:17.0 subsystem <- 8086/02d3
1473 15:46:27.509804 PCI: 00:17.0 cmd <- 03
1474 15:46:27.513539 PCI: 00:19.0 subsystem <- 8086/02c5
1475 15:46:27.516778 PCI: 00:19.0 cmd <- 02
1476 15:46:27.519929 PCI: 00:1d.0 bridge ctrl <- 0013
1477 15:46:27.523319 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 15:46:27.526594 PCI: 00:1d.0 cmd <- 06
1479 15:46:27.529998 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 15:46:27.533688 PCI: 00:1e.0 cmd <- 06
1481 15:46:27.536859 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 15:46:27.540101 PCI: 00:1e.2 cmd <- 06
1483 15:46:27.542900 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 15:46:27.543506 PCI: 00:1e.3 cmd <- 02
1485 15:46:27.549615 PCI: 00:1f.0 subsystem <- 8086/0284
1486 15:46:27.550231 PCI: 00:1f.0 cmd <- 407
1487 15:46:27.557136 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 15:46:27.557760 PCI: 00:1f.3 cmd <- 02
1489 15:46:27.559939 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 15:46:27.563136 PCI: 00:1f.4 cmd <- 03
1491 15:46:27.567041 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 15:46:27.569540 PCI: 00:1f.5 cmd <- 406
1493 15:46:27.578710 PCI: 01:00.0 cmd <- 02
1494 15:46:27.584244 done.
1495 15:46:27.596116 ME: Version: 14.0.39.1367
1496 15:46:27.602483 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 11
1497 15:46:27.605604 Initializing devices...
1498 15:46:27.606181 Root Device init ...
1499 15:46:27.612587 Chrome EC: Set SMI mask to 0x0000000000000000
1500 15:46:27.615212 Chrome EC: clear events_b mask to 0x0000000000000000
1501 15:46:27.622092 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 15:46:27.629312 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 15:46:27.635582 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 15:46:27.639003 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 15:46:27.641747 Root Device init finished in 35183 usecs
1506 15:46:27.646090 CPU_CLUSTER: 0 init ...
1507 15:46:27.652202 CPU_CLUSTER: 0 init finished in 2439 usecs
1508 15:46:27.656581 PCI: 00:00.0 init ...
1509 15:46:27.659814 CPU TDP: 15 Watts
1510 15:46:27.663118 CPU PL2 = 64 Watts
1511 15:46:27.666730 PCI: 00:00.0 init finished in 7084 usecs
1512 15:46:27.670264 PCI: 00:02.0 init ...
1513 15:46:27.672927 PCI: 00:02.0 init finished in 2245 usecs
1514 15:46:27.676340 PCI: 00:08.0 init ...
1515 15:46:27.679504 PCI: 00:08.0 init finished in 2253 usecs
1516 15:46:27.682824 PCI: 00:12.0 init ...
1517 15:46:27.686085 PCI: 00:12.0 init finished in 2253 usecs
1518 15:46:27.689999 PCI: 00:14.0 init ...
1519 15:46:27.692773 PCI: 00:14.0 init finished in 2254 usecs
1520 15:46:27.696113 PCI: 00:14.2 init ...
1521 15:46:27.699521 PCI: 00:14.2 init finished in 2245 usecs
1522 15:46:27.702703 PCI: 00:14.3 init ...
1523 15:46:27.706030 PCI: 00:14.3 init finished in 2271 usecs
1524 15:46:27.709470 PCI: 00:15.0 init ...
1525 15:46:27.712972 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 15:46:27.715912 PCI: 00:15.0 init finished in 5969 usecs
1527 15:46:27.719479 PCI: 00:15.1 init ...
1528 15:46:27.722608 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 15:46:27.729032 PCI: 00:15.1 init finished in 5978 usecs
1530 15:46:27.729485 PCI: 00:16.0 init ...
1531 15:46:27.735749 PCI: 00:16.0 init finished in 2254 usecs
1532 15:46:27.738835 PCI: 00:19.0 init ...
1533 15:46:27.743324 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 15:46:27.745704 PCI: 00:19.0 init finished in 5979 usecs
1535 15:46:27.748635 PCI: 00:1d.0 init ...
1536 15:46:27.752675 Initializing PCH PCIe bridge.
1537 15:46:27.755794 PCI: 00:1d.0 init finished in 5289 usecs
1538 15:46:27.758705 PCI: 00:1f.0 init ...
1539 15:46:27.762438 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 15:46:27.769196 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 15:46:27.769796 IOAPIC: ID = 0x02
1542 15:46:27.772380 IOAPIC: Dumping registers
1543 15:46:27.775586 reg 0x0000: 0x02000000
1544 15:46:27.779060 reg 0x0001: 0x00770020
1545 15:46:27.779654 reg 0x0002: 0x00000000
1546 15:46:27.785780 PCI: 00:1f.0 init finished in 23553 usecs
1547 15:46:27.788845 PCI: 00:1f.4 init ...
1548 15:46:27.792019 PCI: 00:1f.4 init finished in 2263 usecs
1549 15:46:27.802812 PCI: 01:00.0 init ...
1550 15:46:27.805828 PCI: 01:00.0 init finished in 2252 usecs
1551 15:46:27.810302 PNP: 0c09.0 init ...
1552 15:46:27.813487 Google Chrome EC uptime: 11.095 seconds
1553 15:46:27.820197 Google Chrome AP resets since EC boot: 0
1554 15:46:27.823663 Google Chrome most recent AP reset causes:
1555 15:46:27.829769 Google Chrome EC reset flags at last EC boot: reset-pin
1556 15:46:27.833246 PNP: 0c09.0 init finished in 20602 usecs
1557 15:46:27.836632 Devices initialized
1558 15:46:27.840464 Show all devs... After init.
1559 15:46:27.841072 Root Device: enabled 1
1560 15:46:27.844475 CPU_CLUSTER: 0: enabled 1
1561 15:46:27.846867 DOMAIN: 0000: enabled 1
1562 15:46:27.847482 APIC: 00: enabled 1
1563 15:46:27.849766 PCI: 00:00.0: enabled 1
1564 15:46:27.852854 PCI: 00:02.0: enabled 1
1565 15:46:27.856324 PCI: 00:04.0: enabled 0
1566 15:46:27.856830 PCI: 00:05.0: enabled 0
1567 15:46:27.860030 PCI: 00:12.0: enabled 1
1568 15:46:27.863047 PCI: 00:12.5: enabled 0
1569 15:46:27.866416 PCI: 00:12.6: enabled 0
1570 15:46:27.866921 PCI: 00:14.0: enabled 1
1571 15:46:27.869771 PCI: 00:14.1: enabled 0
1572 15:46:27.873099 PCI: 00:14.3: enabled 1
1573 15:46:27.876080 PCI: 00:14.5: enabled 0
1574 15:46:27.876585 PCI: 00:15.0: enabled 1
1575 15:46:27.879683 PCI: 00:15.1: enabled 1
1576 15:46:27.882943 PCI: 00:15.2: enabled 0
1577 15:46:27.883584 PCI: 00:15.3: enabled 0
1578 15:46:27.886580 PCI: 00:16.0: enabled 1
1579 15:46:27.889561 PCI: 00:16.1: enabled 0
1580 15:46:27.893291 PCI: 00:16.2: enabled 0
1581 15:46:27.893887 PCI: 00:16.3: enabled 0
1582 15:46:27.895818 PCI: 00:16.4: enabled 0
1583 15:46:27.899740 PCI: 00:16.5: enabled 0
1584 15:46:27.902823 PCI: 00:17.0: enabled 1
1585 15:46:27.903439 PCI: 00:19.0: enabled 1
1586 15:46:27.906115 PCI: 00:19.1: enabled 0
1587 15:46:27.909063 PCI: 00:19.2: enabled 0
1588 15:46:27.912377 PCI: 00:1a.0: enabled 0
1589 15:46:27.912872 PCI: 00:1c.0: enabled 0
1590 15:46:27.915695 PCI: 00:1c.1: enabled 0
1591 15:46:27.919533 PCI: 00:1c.2: enabled 0
1592 15:46:27.920282 PCI: 00:1c.3: enabled 0
1593 15:46:27.922702 PCI: 00:1c.4: enabled 0
1594 15:46:27.925833 PCI: 00:1c.5: enabled 0
1595 15:46:27.929374 PCI: 00:1c.6: enabled 0
1596 15:46:27.930148 PCI: 00:1c.7: enabled 0
1597 15:46:27.932319 PCI: 00:1d.0: enabled 1
1598 15:46:27.936129 PCI: 00:1d.1: enabled 0
1599 15:46:27.939285 PCI: 00:1d.2: enabled 0
1600 15:46:27.939955 PCI: 00:1d.3: enabled 0
1601 15:46:27.942383 PCI: 00:1d.4: enabled 0
1602 15:46:27.946043 PCI: 00:1d.5: enabled 0
1603 15:46:27.949059 PCI: 00:1e.0: enabled 1
1604 15:46:27.949653 PCI: 00:1e.1: enabled 0
1605 15:46:27.952222 PCI: 00:1e.2: enabled 1
1606 15:46:27.955606 PCI: 00:1e.3: enabled 1
1607 15:46:27.958945 PCI: 00:1f.0: enabled 1
1608 15:46:27.959550 PCI: 00:1f.1: enabled 0
1609 15:46:27.962341 PCI: 00:1f.2: enabled 0
1610 15:46:27.965355 PCI: 00:1f.3: enabled 1
1611 15:46:27.965858 PCI: 00:1f.4: enabled 1
1612 15:46:27.969002 PCI: 00:1f.5: enabled 1
1613 15:46:27.972276 PCI: 00:1f.6: enabled 0
1614 15:46:27.975897 USB0 port 0: enabled 1
1615 15:46:27.976494 I2C: 01:15: enabled 1
1616 15:46:27.979281 I2C: 02:5d: enabled 1
1617 15:46:27.982492 GENERIC: 0.0: enabled 1
1618 15:46:27.983092 I2C: 03:1a: enabled 1
1619 15:46:27.985307 I2C: 03:38: enabled 1
1620 15:46:27.989418 I2C: 03:39: enabled 1
1621 15:46:27.990014 I2C: 03:3a: enabled 1
1622 15:46:27.992431 I2C: 03:3b: enabled 1
1623 15:46:27.995780 PCI: 00:00.0: enabled 1
1624 15:46:27.996416 SPI: 00: enabled 1
1625 15:46:27.998939 SPI: 01: enabled 1
1626 15:46:28.001694 PNP: 0c09.0: enabled 1
1627 15:46:28.002194 USB2 port 0: enabled 1
1628 15:46:28.005486 USB2 port 1: enabled 1
1629 15:46:28.008691 USB2 port 2: enabled 0
1630 15:46:28.012171 USB2 port 3: enabled 0
1631 15:46:28.012778 USB2 port 5: enabled 0
1632 15:46:28.015266 USB2 port 6: enabled 1
1633 15:46:28.018658 USB2 port 9: enabled 1
1634 15:46:28.019153 USB3 port 0: enabled 1
1635 15:46:28.021643 USB3 port 1: enabled 1
1636 15:46:28.024967 USB3 port 2: enabled 1
1637 15:46:28.025494 USB3 port 3: enabled 1
1638 15:46:28.028726 USB3 port 4: enabled 0
1639 15:46:28.031723 APIC: 02: enabled 1
1640 15:46:28.032250 APIC: 03: enabled 1
1641 15:46:28.034808 APIC: 01: enabled 1
1642 15:46:28.038064 APIC: 05: enabled 1
1643 15:46:28.038598 APIC: 04: enabled 1
1644 15:46:28.042111 APIC: 07: enabled 1
1645 15:46:28.045466 APIC: 06: enabled 1
1646 15:46:28.045966 PCI: 00:08.0: enabled 1
1647 15:46:28.048725 PCI: 00:14.2: enabled 1
1648 15:46:28.051376 PCI: 01:00.0: enabled 1
1649 15:46:28.055157 Disabling ACPI via APMC:
1650 15:46:28.058553 done.
1651 15:46:28.061657 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 15:46:28.064681 ELOG: NV offset 0xaf0000 size 0x4000
1653 15:46:28.072107 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 15:46:28.079000 ELOG: Event(17) added with size 13 at 2022-09-30 15:46:25 UTC
1655 15:46:28.085523 ELOG: Event(92) added with size 9 at 2022-09-30 15:46:25 UTC
1656 15:46:28.092218 ELOG: Event(93) added with size 9 at 2022-09-30 15:46:25 UTC
1657 15:46:28.098469 ELOG: Event(9A) added with size 9 at 2022-09-30 15:46:26 UTC
1658 15:46:28.104915 ELOG: Event(9E) added with size 10 at 2022-09-30 15:46:26 UTC
1659 15:46:28.112065 ELOG: Event(9F) added with size 14 at 2022-09-30 15:46:26 UTC
1660 15:46:28.115032 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1661 15:46:28.122604 ELOG: Event(A1) added with size 10 at 2022-09-30 15:46:26 UTC
1662 15:46:28.132671 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 15:46:28.138581 ELOG: Event(A0) added with size 9 at 2022-09-30 15:46:26 UTC
1664 15:46:28.142436 ELOG: Event(16) added with size 11 at 2022-09-30 15:46:26 UTC
1665 15:46:28.148735 Erasing flash addr af0000 + 4 KiB
1666 15:46:28.214866 elog_add_boot_reason: Logged dev mode boot
1667 15:46:28.215456 Finalize devices...
1668 15:46:28.218225 PCI: 00:17.0 final
1669 15:46:28.221438 Devices finalized
1670 15:46:28.224855 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 15:46:28.231321 BS: BS_POST_DEVICE times (ms): entry 55 run 0 exit 0
1672 15:46:28.234363 ME: HFSTS1 : 0x90000245
1673 15:46:28.238000 ME: HFSTS2 : 0x3B850126
1674 15:46:28.244356 ME: HFSTS3 : 0x00000020
1675 15:46:28.247947 ME: HFSTS4 : 0x00004800
1676 15:46:28.251593 ME: HFSTS5 : 0x00000000
1677 15:46:28.254358 ME: HFSTS6 : 0x40400006
1678 15:46:28.258103 ME: Manufacturing Mode : NO
1679 15:46:28.261015 ME: FW Partition Table : OK
1680 15:46:28.264162 ME: Bringup Loader Failure : NO
1681 15:46:28.268312 ME: Firmware Init Complete : YES
1682 15:46:28.270781 ME: Boot Options Present : NO
1683 15:46:28.274369 ME: Update In Progress : NO
1684 15:46:28.277778 ME: D0i3 Support : YES
1685 15:46:28.281072 ME: Low Power State Enabled : NO
1686 15:46:28.284492 ME: CPU Replaced : NO
1687 15:46:28.287756 ME: CPU Replacement Valid : YES
1688 15:46:28.290982 ME: Current Working State : 5
1689 15:46:28.294212 ME: Current Operation State : 1
1690 15:46:28.298019 ME: Current Operation Mode : 0
1691 15:46:28.300928 ME: Error Code : 0
1692 15:46:28.303912 ME: CPU Debug Disabled : YES
1693 15:46:28.307126 ME: TXT Support : NO
1694 15:46:28.314167 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 15:46:28.320583 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 15:46:28.321185 CBFS @ c08000 size 3f8000
1697 15:46:28.327280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 15:46:28.330522 CBFS: Locating 'fallback/dsdt.aml'
1699 15:46:28.333631 CBFS: Found @ offset 10bb80 size 3fa5
1700 15:46:28.340469 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 15:46:28.343433 CBFS @ c08000 size 3f8000
1702 15:46:28.346783 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 15:46:28.350524 CBFS: Locating 'fallback/slic'
1704 15:46:28.355279 CBFS: 'fallback/slic' not found.
1705 15:46:28.362356 ACPI: Writing ACPI tables at 99b3e000.
1706 15:46:28.362854 ACPI: * FACS
1707 15:46:28.365458 ACPI: * DSDT
1708 15:46:28.369070 Ramoops buffer: 0x100000@0x99a3d000.
1709 15:46:28.371669 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 15:46:28.378326 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 15:46:28.382054 Google Chrome EC: version:
1712 15:46:28.385144 ro: helios_v2.0.2659-56403530b
1713 15:46:28.388255 rw: helios_v2.0.2849-c41de27e7d
1714 15:46:28.388849 running image: 1
1715 15:46:28.392865 ACPI: * FADT
1716 15:46:28.393476 SCI is IRQ9
1717 15:46:28.399365 ACPI: added table 1/32, length now 40
1718 15:46:28.400001 ACPI: * SSDT
1719 15:46:28.403044 Found 1 CPU(s) with 8 core(s) each.
1720 15:46:28.406647 Error: Could not locate 'wifi_sar' in VPD.
1721 15:46:28.412528 Checking CBFS for default SAR values
1722 15:46:28.416165 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 15:46:28.419307 CBFS @ c08000 size 3f8000
1724 15:46:28.426139 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 15:46:28.429104 CBFS: Locating 'wifi_sar_defaults.hex'
1726 15:46:28.432609 CBFS: Found @ offset 5fac0 size 77
1727 15:46:28.436203 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 15:46:28.442930 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 15:46:28.445463 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 15:46:28.452800 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 15:46:28.455577 failed to find key in VPD: dsm_calib_r0_0
1732 15:46:28.466322 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 15:46:28.468853 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 15:46:28.471821 failed to find key in VPD: dsm_calib_r0_1
1735 15:46:28.482087 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 15:46:28.489102 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 15:46:28.492360 failed to find key in VPD: dsm_calib_r0_2
1738 15:46:28.502334 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 15:46:28.505153 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 15:46:28.511980 failed to find key in VPD: dsm_calib_r0_3
1741 15:46:28.518684 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 15:46:28.524745 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 15:46:28.528671 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 15:46:28.531917 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 15:46:28.535945 EC returned error result code 1
1746 15:46:28.539826 EC returned error result code 1
1747 15:46:28.543464 EC returned error result code 1
1748 15:46:28.549768 PS2K: Bad resp from EC. Vivaldi disabled!
1749 15:46:28.553546 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 15:46:28.560139 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 15:46:28.567026 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 15:46:28.569800 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 15:46:28.576319 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 15:46:28.583110 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 15:46:28.590141 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 15:46:28.593072 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 15:46:28.596373 ACPI: added table 2/32, length now 44
1758 15:46:28.600027 ACPI: * MCFG
1759 15:46:28.603280 ACPI: added table 3/32, length now 48
1760 15:46:28.606825 ACPI: * TPM2
1761 15:46:28.609844 TPM2 log created at 99a2d000
1762 15:46:28.612908 ACPI: added table 4/32, length now 52
1763 15:46:28.613476 ACPI: * MADT
1764 15:46:28.616182 SCI is IRQ9
1765 15:46:28.619811 ACPI: added table 5/32, length now 56
1766 15:46:28.620339 current = 99b43ac0
1767 15:46:28.622632 ACPI: * DMAR
1768 15:46:28.625825 ACPI: added table 6/32, length now 60
1769 15:46:28.629484 ACPI: * IGD OpRegion
1770 15:46:28.629981 GMA: Found VBT in CBFS
1771 15:46:28.632802 GMA: Found valid VBT in CBFS
1772 15:46:28.635912 ACPI: added table 7/32, length now 64
1773 15:46:28.639456 ACPI: * HPET
1774 15:46:28.642535 ACPI: added table 8/32, length now 68
1775 15:46:28.643040 ACPI: done.
1776 15:46:28.645993 ACPI tables: 31744 bytes.
1777 15:46:28.649580 smbios_write_tables: 99a2c000
1778 15:46:28.652629 EC returned error result code 3
1779 15:46:28.655981 Couldn't obtain OEM name from CBI
1780 15:46:28.659467 Create SMBIOS type 17
1781 15:46:28.663083 PCI: 00:00.0 (Intel Cannonlake)
1782 15:46:28.666261 PCI: 00:14.3 (Intel WiFi)
1783 15:46:28.669385 SMBIOS tables: 939 bytes.
1784 15:46:28.672463 Writing table forward entry at 0x00000500
1785 15:46:28.679195 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 15:46:28.682803 Writing coreboot table at 0x99b62000
1787 15:46:28.689225 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 15:46:28.692723 1. 0000000000001000-000000000009ffff: RAM
1789 15:46:28.695871 2. 00000000000a0000-00000000000fffff: RESERVED
1790 15:46:28.703365 3. 0000000000100000-0000000099a2bfff: RAM
1791 15:46:28.705845 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 15:46:28.712395 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 15:46:28.719119 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 15:46:28.721913 7. 000000009a000000-000000009f7fffff: RESERVED
1795 15:46:28.729084 8. 00000000e0000000-00000000efffffff: RESERVED
1796 15:46:28.732626 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 15:46:28.738699 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 15:46:28.741815 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 15:46:28.745389 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 15:46:28.751702 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 15:46:28.755477 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 15:46:28.761994 15. 0000000100000000-000000045e7fffff: RAM
1803 15:46:28.765030 Graphics framebuffer located at 0xc0000000
1804 15:46:28.768409 Passing 5 GPIOs to payload:
1805 15:46:28.771404 NAME | PORT | POLARITY | VALUE
1806 15:46:28.778500 write protect | undefined | high | low
1807 15:46:28.781573 lid | undefined | high | high
1808 15:46:28.788500 power | undefined | high | low
1809 15:46:28.795193 oprom | undefined | high | low
1810 15:46:28.798878 EC in RW | 0x000000cb | high | low
1811 15:46:28.801694 Board ID: 4
1812 15:46:28.805340 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 15:46:28.808743 CBFS @ c08000 size 3f8000
1814 15:46:28.815429 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 15:46:28.821973 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1816 15:46:28.822590 coreboot table: 1492 bytes.
1817 15:46:28.825093 IMD ROOT 0. 99fff000 00001000
1818 15:46:28.828076 IMD SMALL 1. 99ffe000 00001000
1819 15:46:28.831470 FSP MEMORY 2. 99c4e000 003b0000
1820 15:46:28.834970 CONSOLE 3. 99c2e000 00020000
1821 15:46:28.838167 FMAP 4. 99c2d000 0000054e
1822 15:46:28.841095 TIME STAMP 5. 99c2c000 00000910
1823 15:46:28.844593 VBOOT WORK 6. 99c18000 00014000
1824 15:46:28.847789 MRC DATA 7. 99c16000 00001958
1825 15:46:28.851522 ROMSTG STCK 8. 99c15000 00001000
1826 15:46:28.854548 AFTER CAR 9. 99c0b000 0000a000
1827 15:46:28.857701 RAMSTAGE 10. 99baf000 0005c000
1828 15:46:28.861195 REFCODE 11. 99b7a000 00035000
1829 15:46:28.864493 SMM BACKUP 12. 99b6a000 00010000
1830 15:46:28.867994 COREBOOT 13. 99b62000 00008000
1831 15:46:28.870952 ACPI 14. 99b3e000 00024000
1832 15:46:28.874443 ACPI GNVS 15. 99b3d000 00001000
1833 15:46:28.877581 RAMOOPS 16. 99a3d000 00100000
1834 15:46:28.880944 TPM2 TCGLOG17. 99a2d000 00010000
1835 15:46:28.888009 SMBIOS 18. 99a2c000 00000800
1836 15:46:28.888648 IMD small region:
1837 15:46:28.890924 IMD ROOT 0. 99ffec00 00000400
1838 15:46:28.894247 FSP RUNTIME 1. 99ffebe0 00000004
1839 15:46:28.897410 EC HOSTEVENT 2. 99ffebc0 00000008
1840 15:46:28.900828 POWER STATE 3. 99ffeb80 00000040
1841 15:46:28.904571 ROMSTAGE 4. 99ffeb60 00000004
1842 15:46:28.908190 MEM INFO 5. 99ffe9a0 000001b9
1843 15:46:28.914340 VPD 6. 99ffe920 0000006c
1844 15:46:28.914947 MTRR: Physical address space:
1845 15:46:28.920770 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 15:46:28.927322 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 15:46:28.934090 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 15:46:28.940440 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 15:46:28.946769 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 15:46:28.954067 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 15:46:28.960819 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 15:46:28.963635 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 15:46:28.966769 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 15:46:28.970453 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 15:46:28.977242 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 15:46:28.980198 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 15:46:28.984155 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 15:46:28.986702 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 15:46:28.993374 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 15:46:28.996655 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 15:46:29.000140 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 15:46:29.003399 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 15:46:29.006815 call enable_fixed_mtrr()
1864 15:46:29.010434 CPU physical address size: 39 bits
1865 15:46:29.016896 MTRR: default type WB/UC MTRR counts: 6/8.
1866 15:46:29.020229 MTRR: WB selected as default type.
1867 15:46:29.026609 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 15:46:29.029794 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 15:46:29.036595 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 15:46:29.043211 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 15:46:29.050015 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 15:46:29.056350 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 15:46:29.056966
1874 15:46:29.059432 MTRR check
1875 15:46:29.059979 Fixed MTRRs : Enabled
1876 15:46:29.062859 Variable MTRRs: Enabled
1877 15:46:29.063475
1878 15:46:29.066265 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 15:46:29.073021 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 15:46:29.076418 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 15:46:29.079497 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 15:46:29.083184 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 15:46:29.089573 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 15:46:29.093171 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 15:46:29.095767 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 15:46:29.099413 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 15:46:29.106558 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 15:46:29.109342 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 15:46:29.116121 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1890 15:46:29.116735 call enable_fixed_mtrr()
1891 15:46:29.122820 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1892 15:46:29.125739 CPU physical address size: 39 bits
1893 15:46:29.129518 CBFS @ c08000 size 3f8000
1894 15:46:29.136259 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1895 15:46:29.138857 CBFS: Locating 'fallback/payload'
1896 15:46:29.142267 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 15:46:29.145853 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 15:46:29.149360 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 15:46:29.152880 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 15:46:29.159047 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 15:46:29.161868 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 15:46:29.165442 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 15:46:29.168860 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 15:46:29.175444 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 15:46:29.179055 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 15:46:29.181938 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 15:46:29.186139 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 15:46:29.188306 call enable_fixed_mtrr()
1909 15:46:29.195412 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 15:46:29.198764 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 15:46:29.202082 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 15:46:29.205458 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 15:46:29.208296 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 15:46:29.215400 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 15:46:29.218693 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 15:46:29.221753 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 15:46:29.224728 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 15:46:29.231998 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 15:46:29.235035 CPU physical address size: 39 bits
1920 15:46:29.238426 call enable_fixed_mtrr()
1921 15:46:29.241237 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 15:46:29.244739 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 15:46:29.248571 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 15:46:29.254837 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 15:46:29.258192 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 15:46:29.261480 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 15:46:29.265238 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 15:46:29.271316 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 15:46:29.274467 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 15:46:29.277794 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 15:46:29.281542 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 15:46:29.284746 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 15:46:29.291408 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 15:46:29.294211 call enable_fixed_mtrr()
1935 15:46:29.297968 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 15:46:29.301246 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 15:46:29.304573 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 15:46:29.307734 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 15:46:29.314776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 15:46:29.317950 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 15:46:29.321128 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 15:46:29.324515 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 15:46:29.331126 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 15:46:29.334131 CPU physical address size: 39 bits
1945 15:46:29.337309 call enable_fixed_mtrr()
1946 15:46:29.340921 CBFS: Found @ offset 1c96c0 size 3f798
1947 15:46:29.344045 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 15:46:29.347313 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 15:46:29.354533 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 15:46:29.357657 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 15:46:29.360901 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 15:46:29.364413 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 15:46:29.370526 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 15:46:29.373946 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 15:46:29.377359 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 15:46:29.380439 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 15:46:29.384095 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 15:46:29.390232 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 15:46:29.393964 call enable_fixed_mtrr()
1960 15:46:29.397160 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 15:46:29.400089 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 15:46:29.403966 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 15:46:29.410612 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 15:46:29.413742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 15:46:29.417089 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 15:46:29.420442 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 15:46:29.423099 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 15:46:29.430248 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 15:46:29.433358 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 15:46:29.436936 CPU physical address size: 39 bits
1971 15:46:29.440147 call enable_fixed_mtrr()
1972 15:46:29.443462 CPU physical address size: 39 bits
1973 15:46:29.446750 CPU physical address size: 39 bits
1974 15:46:29.450217 CPU physical address size: 39 bits
1975 15:46:29.456613 Checking segment from ROM address 0xffdd16f8
1976 15:46:29.459648 Checking segment from ROM address 0xffdd1714
1977 15:46:29.463101 Loading segment from ROM address 0xffdd16f8
1978 15:46:29.466308 code (compression=0)
1979 15:46:29.473248 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 15:46:29.482949 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 15:46:29.486222 it's not compressed!
1982 15:46:29.577555 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 15:46:29.584399 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 15:46:29.588087 Loading segment from ROM address 0xffdd1714
1985 15:46:29.590611 Entry Point 0x30000000
1986 15:46:29.594098 Loaded segments
1987 15:46:29.599814 Finalizing chipset.
1988 15:46:29.603165 Finalizing SMM.
1989 15:46:29.606941 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1990 15:46:29.610112 mp_park_aps done after 0 msecs.
1991 15:46:29.616661 Jumping to boot code at 30000000(99b62000)
1992 15:46:29.622765 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 15:46:29.623385
1994 15:46:29.626473 Starting depthcharge on Helios...
1995 15:46:29.627786 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1996 15:46:29.628419 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1997 15:46:29.628950 Setting prompt string to ['hatch:']
1998 15:46:29.629520 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1999 15:46:29.636304 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2000 15:46:29.642772 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2001 15:46:29.649347 board_setup: Info: eMMC controller not present; skipping
2002 15:46:29.652540 New NVMe Controller 0x30053ac0 @ 00:1d:00
2003 15:46:29.659133 board_setup: Info: SDHCI controller not present; skipping
2004 15:46:29.665513 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2005 15:46:29.666023 Wipe memory regions:
2006 15:46:29.669505 [0x00000000001000, 0x000000000a0000)
2007 15:46:29.672749 [0x00000000100000, 0x00000030000000)
2008 15:46:29.742220 [0x00000030657430, 0x00000099a2c000)
2009 15:46:29.891767 [0x00000100000000, 0x0000045e800000)
2010 15:46:31.275706 R8152: Initializing
2011 15:46:31.278876 Version 9 (ocp_data = 6010)
2012 15:46:31.282876 R8152: Done initializing
2013 15:46:31.286655 Adding net device
2014 15:46:31.783481 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 15:46:31.784134
2016 15:46:31.785019 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2018 15:46:31.886679 hatch: tftpboot 192.168.201.1 7463491/tftp-deploy-l2q1j58k/kernel/bzImage 7463491/tftp-deploy-l2q1j58k/kernel/cmdline 7463491/tftp-deploy-l2q1j58k/ramdisk/ramdisk.cpio.gz
2019 15:46:31.887420 Setting prompt string to 'Starting kernel'
2020 15:46:31.887893 Setting prompt string to ['Starting kernel']
2021 15:46:31.888303 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 15:46:31.888715 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2023 15:46:31.892653 tftpboot 192.168.201.1 7463491/tftp-deploy-l2q1j58k/kernel/bzImy-l2q1j58k/kernel/cmdline 7463491/tftp-deploy-l2q1j58k/ramdisk/ramdisk.cpio.gz
2024 15:46:31.892773 Waiting for link
2025 15:46:32.093793 done.
2026 15:46:32.094399 MAC: f4:f5:e8:50:dc:f7
2027 15:46:32.096745 Sending DHCP discover... done.
2028 15:46:32.100534 Waiting for reply... done.
2029 15:46:32.103569 Sending DHCP request... done.
2030 15:46:32.107157 Waiting for reply... done.
2031 15:46:32.109947 My ip is 192.168.201.20
2032 15:46:32.113032 The DHCP server ip is 192.168.201.1
2033 15:46:32.116535 TFTP server IP predefined by user: 192.168.201.1
2034 15:46:32.122983 Bootfile predefined by user: 7463491/tftp-deploy-l2q1j58k/kernel/bzImage
2035 15:46:32.126765 Sending tftp read request... done.
2036 15:46:32.134514 Waiting for the transfer...
2037 15:46:32.530313 00000000 ################################################################
2038 15:46:32.897331 00080000 ################################################################
2039 15:46:33.213635 00100000 ################################################################
2040 15:46:33.530114 00180000 ################################################################
2041 15:46:33.852680 00200000 ################################################################
2042 15:46:34.177491 00280000 ################################################################
2043 15:46:34.499223 00300000 ################################################################
2044 15:46:34.824399 00380000 ################################################################
2045 15:46:35.148381 00400000 ################################################################
2046 15:46:35.466461 00480000 ################################################################
2047 15:46:35.783761 00500000 ################################################################
2048 15:46:36.105206 00580000 ################################################################
2049 15:46:36.419023 00600000 ################################################################
2050 15:46:36.610742 00680000 ###################################### done.
2051 15:46:36.613966 The bootfile was 7126928 bytes long.
2052 15:46:36.617350 Sending tftp read request... done.
2053 15:46:36.620463 Waiting for the transfer...
2054 15:46:36.924194 00000000 ################################################################
2055 15:46:37.217849 00080000 ################################################################
2056 15:46:37.513058 00100000 ################################################################
2057 15:46:37.798215 00180000 ################################################################
2058 15:46:38.060156 00200000 ################################################################
2059 15:46:38.289590 00280000 ################################################################
2060 15:46:38.519442 00300000 ################################################################
2061 15:46:38.749558 00380000 ################################################################
2062 15:46:38.979731 00400000 ################################################################
2063 15:46:39.210685 00480000 ################################################################
2064 15:46:39.316185 00500000 ############################# done.
2065 15:46:39.319050 Sending tftp read request... done.
2066 15:46:39.319143 Waiting for the transfer...
2067 15:46:39.322294 00000000 # done.
2068 15:46:39.332389 Command line loaded dynamically from TFTP file: 7463491/tftp-deploy-l2q1j58k/kernel/cmdline
2069 15:46:39.359785 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7463491/extract-nfsrootfs-0oggbidr,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2070 15:46:39.362082 ec_init(0): CrosEC protocol v3 supported (256, 256)
2071 15:46:39.371643 Shutting down all USB controllers.
2072 15:46:39.372179 Removing current net device
2073 15:46:39.375098 Finalizing coreboot
2074 15:46:39.382311 Exiting depthcharge with code 4 at timestamp: 17103406
2075 15:46:39.382914
2076 15:46:39.383476 Starting kernel ...
2077 15:46:39.383905
2078 15:46:39.385418 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2079 15:46:39.385997 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2080 15:46:39.386471 Setting prompt string to ['Linux version [0-9]']
2081 15:46:39.386908 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2082 15:46:39.387329 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2083 15:46:39.388361
2085 15:51:10.387182 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2087 15:51:10.388414 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2089 15:51:10.389303 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2092 15:51:10.391210 end: 2 depthcharge-action (duration 00:05:00) [common]
2094 15:51:10.391708 Cleaning after the job
2095 15:51:10.391793 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/ramdisk
2096 15:51:10.392281 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/kernel
2097 15:51:10.392865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/nfsrootfs
2098 15:51:10.445116 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7463491/tftp-deploy-l2q1j58k/modules
2099 15:51:10.445429 start: 4.1 power-off (timeout 00:00:30) [common]
2100 15:51:10.445596 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2101 15:51:10.464663 >> Command sent successfully.
2102 15:51:10.466507 Returned 0 in 0 seconds
2103 15:51:10.567728 end: 4.1 power-off (duration 00:00:00) [common]
2105 15:51:10.569521 start: 4.2 read-feedback (timeout 00:10:00) [common]
2106 15:51:10.570680 Listened to connection for namespace 'common' for up to 1s
2107 15:51:11.380856 Listened to connection for namespace 'common' for up to 1s
2108 15:51:11.384001 Listened to connection for namespace 'common' for up to 1s
2109 15:51:11.387466 Listened to connection for namespace 'common' for up to 1s
2110 15:51:11.390863 Listened to connection for namespace 'common' for up to 1s
2111 15:51:11.394569 Listened to connection for namespace 'common' for up to 1s
2112 15:51:11.397871 Listened to connection for namespace 'common' for up to 1s
2113 15:51:11.401109 Listened to connection for namespace 'common' for up to 1s
2114 15:51:11.404287 Listened to connection for namespace 'common' for up to 1s
2115 15:51:11.407783 Listened to connection for namespace 'common' for up to 1s
2116 15:51:11.411162 Listened to connection for namespace 'common' for up to 1s
2117 15:51:11.414744 Listened to connection for namespace 'common' for up to 1s
2118 15:51:11.418045 Listened to connection for namespace 'common' for up to 1s
2119 15:51:11.421156 Listened to connection for namespace 'common' for up to 1s
2120 15:51:11.424989 Listened to connection for namespace 'common' for up to 1s
2121 15:51:11.427780 Listened to connection for namespace 'common' for up to 1s
2122 15:51:11.431460 Listened to connection for namespace 'common' for up to 1s
2123 15:51:11.436592 Listened to connection for namespace 'common' for up to 1s
2124 15:51:11.440247 Listened to connection for namespace 'common' for up to 1s
2125 15:51:11.570580 Finalising connection for namespace 'common'
2126 15:51:11.571330 Disconnecting from shell: Finalise
2127 15:51:11.572025
2128 15:51:11.673721 end: 4.2 read-feedback (duration 00:00:01) [common]
2129 15:51:11.674549 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7463491
2130 15:51:11.830164 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7463491
2131 15:51:11.830361 JobError: Your job cannot terminate cleanly.