Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 20:57:58.345924 lava-dispatcher, installed at version: 2022.10
2 20:57:58.346132 start: 0 validate
3 20:57:58.346284 Start time: 2022-12-01 20:57:58.346276+00:00 (UTC)
4 20:57:58.346418 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:57:58.346560 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221125.0%2Fx86%2Frootfs.cpio.gz exists
6 20:57:58.350159 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:57:58.350341 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-1-g61333eee4869%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:57:58.352036 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:57:58.352156 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-1-g61333eee4869%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 20:57:58.361644 validate duration: 0.02
12 20:57:58.361915 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:57:58.362033 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:57:58.362141 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:57:58.362258 Not decompressing ramdisk as can be used compressed.
16 20:57:58.362346 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221125.0/x86/rootfs.cpio.gz
17 20:57:58.362424 saving as /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/ramdisk/rootfs.cpio.gz
18 20:57:58.362490 total size: 8415491 (8MB)
19 20:57:58.382807 progress 0% (0MB)
20 20:57:58.514380 progress 5% (0MB)
21 20:57:58.675822 progress 10% (0MB)
22 20:57:58.850568 progress 15% (1MB)
23 20:57:58.999770 progress 20% (1MB)
24 20:57:59.118350 progress 25% (2MB)
25 20:57:59.239974 progress 30% (2MB)
26 20:57:59.348021 progress 35% (2MB)
27 20:57:59.442842 progress 40% (3MB)
28 20:57:59.531186 progress 45% (3MB)
29 20:57:59.614201 progress 50% (4MB)
30 20:57:59.696940 progress 55% (4MB)
31 20:57:59.806548 progress 60% (4MB)
32 20:57:59.967393 progress 65% (5MB)
33 20:58:00.113603 progress 70% (5MB)
34 20:58:00.294549 progress 75% (6MB)
35 20:58:00.482989 progress 80% (6MB)
36 20:58:00.636531 progress 85% (6MB)
37 20:58:00.716739 progress 90% (7MB)
38 20:58:00.779188 progress 95% (7MB)
39 20:58:00.857000 progress 100% (8MB)
40 20:58:00.857354 8MB downloaded in 2.49s (3.22MB/s)
41 20:58:00.857535 end: 1.1.1 http-download (duration 00:00:02) [common]
43 20:58:00.857823 end: 1.1 download-retry (duration 00:00:02) [common]
44 20:58:00.857917 start: 1.2 download-retry (timeout 00:09:58) [common]
45 20:58:00.858007 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 20:58:00.858116 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-1-g61333eee4869/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 20:58:00.858187 saving as /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/kernel/bzImage
48 20:58:00.858260 total size: 7184272 (6MB)
49 20:58:00.858326 No compression specified
50 20:58:00.918888 progress 0% (0MB)
51 20:58:01.034678 progress 5% (0MB)
52 20:58:01.140165 progress 10% (0MB)
53 20:58:01.268607 progress 15% (1MB)
54 20:58:01.363188 progress 20% (1MB)
55 20:58:01.487281 progress 25% (1MB)
56 20:58:01.618473 progress 30% (2MB)
57 20:58:01.752498 progress 35% (2MB)
58 20:58:01.891825 progress 40% (2MB)
59 20:58:01.993587 progress 45% (3MB)
60 20:58:02.121513 progress 50% (3MB)
61 20:58:02.216841 progress 55% (3MB)
62 20:58:02.317796 progress 60% (4MB)
63 20:58:02.434989 progress 65% (4MB)
64 20:58:02.525145 progress 70% (4MB)
65 20:58:02.636619 progress 75% (5MB)
66 20:58:02.753674 progress 80% (5MB)
67 20:58:02.871021 progress 85% (5MB)
68 20:58:02.953819 progress 90% (6MB)
69 20:58:03.037912 progress 95% (6MB)
70 20:58:03.110935 progress 100% (6MB)
71 20:58:03.111246 6MB downloaded in 2.25s (3.04MB/s)
72 20:58:03.111415 end: 1.2.1 http-download (duration 00:00:02) [common]
74 20:58:03.111685 end: 1.2 download-retry (duration 00:00:02) [common]
75 20:58:03.111780 start: 1.3 download-retry (timeout 00:09:55) [common]
76 20:58:03.111878 start: 1.3.1 http-download (timeout 00:09:55) [common]
77 20:58:03.111990 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-1-g61333eee4869/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 20:58:03.112065 saving as /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/modules/modules.tar
79 20:58:03.112130 total size: 52052 (0MB)
80 20:58:03.112196 Using unxz to decompress xz
81 20:58:03.141630 progress 62% (0MB)
82 20:58:03.148722 progress 100% (0MB)
83 20:58:03.150807 0MB downloaded in 0.04s (1.28MB/s)
84 20:58:03.151158 end: 1.3.1 http-download (duration 00:00:00) [common]
86 20:58:03.151600 end: 1.3 download-retry (duration 00:00:00) [common]
87 20:58:03.151757 start: 1.4 prepare-tftp-overlay (timeout 00:09:55) [common]
88 20:58:03.151911 start: 1.4.1 extract-nfsrootfs (timeout 00:09:55) [common]
89 20:58:03.152051 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 20:58:03.152193 start: 1.4.2 lava-overlay (timeout 00:09:55) [common]
91 20:58:03.152450 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu
92 20:58:03.152622 makedir: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin
93 20:58:03.152764 makedir: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/tests
94 20:58:03.152901 makedir: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/results
95 20:58:03.153068 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-add-keys
96 20:58:03.153274 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-add-sources
97 20:58:03.153459 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-background-process-start
98 20:58:03.153642 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-background-process-stop
99 20:58:03.153825 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-common-functions
100 20:58:03.154005 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-echo-ipv4
101 20:58:03.154187 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-install-packages
102 20:58:03.154377 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-installed-packages
103 20:58:03.154558 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-os-build
104 20:58:03.154738 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-probe-channel
105 20:58:03.154920 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-probe-ip
106 20:58:03.155098 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-target-ip
107 20:58:03.155280 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-target-mac
108 20:58:03.155460 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-target-storage
109 20:58:03.155645 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-case
110 20:58:03.155825 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-event
111 20:58:03.156006 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-feedback
112 20:58:03.156188 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-raise
113 20:58:03.156374 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-reference
114 20:58:03.156552 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-runner
115 20:58:03.156731 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-set
116 20:58:03.156908 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-test-shell
117 20:58:03.157091 Updating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-install-packages (oe)
118 20:58:03.157294 Updating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/bin/lava-installed-packages (oe)
119 20:58:03.157461 Creating /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/environment
120 20:58:03.157608 LAVA metadata
121 20:58:03.157731 - LAVA_JOB_ID=8200507
122 20:58:03.157848 - LAVA_DISPATCHER_IP=192.168.201.1
123 20:58:03.158022 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:55) [common]
124 20:58:03.158101 skipped lava-vland-overlay
125 20:58:03.158188 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 20:58:03.158289 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
127 20:58:03.158359 skipped lava-multinode-overlay
128 20:58:03.158438 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 20:58:03.158524 start: 1.4.2.3 test-definition (timeout 00:09:55) [common]
130 20:58:03.158605 Loading test definitions
131 20:58:03.158711 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:55) [common]
132 20:58:03.158795 Using /lava-8200507 at stage 0
133 20:58:03.159082 uuid=8200507_1.4.2.3.1 testdef=None
134 20:58:03.159178 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 20:58:03.159268 start: 1.4.2.3.2 test-overlay (timeout 00:09:55) [common]
136 20:58:03.159779 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 20:58:03.160016 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:55) [common]
139 20:58:03.160632 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 20:58:03.160886 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
142 20:58:03.161463 runner path: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/0/tests/0_dmesg test_uuid 8200507_1.4.2.3.1
143 20:58:03.161623 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 20:58:03.161868 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:55) [common]
146 20:58:03.161944 Using /lava-8200507 at stage 1
147 20:58:03.162199 uuid=8200507_1.4.2.3.5 testdef=None
148 20:58:03.162312 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 20:58:03.162405 start: 1.4.2.3.6 test-overlay (timeout 00:09:55) [common]
150 20:58:03.162868 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 20:58:03.163103 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:55) [common]
153 20:58:03.163731 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 20:58:03.163982 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:55) [common]
156 20:58:03.164582 runner path: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/1/tests/1_bootrr test_uuid 8200507_1.4.2.3.5
157 20:58:03.164746 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 20:58:03.164992 Creating lava-test-runner.conf files
160 20:58:03.165065 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/0 for stage 0
161 20:58:03.165152 - 0_dmesg
162 20:58:03.165239 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8200507/lava-overlay-46tu5kpu/lava-8200507/1 for stage 1
163 20:58:03.165339 - 1_bootrr
164 20:58:03.165443 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 20:58:03.165543 start: 1.4.2.4 compress-overlay (timeout 00:09:55) [common]
166 20:58:03.172941 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 20:58:03.173101 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
168 20:58:03.173200 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 20:58:03.173309 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 20:58:03.173403 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
171 20:58:03.376953 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 20:58:03.377292 start: 1.4.4 extract-modules (timeout 00:09:55) [common]
173 20:58:03.377404 extracting modules file /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8200507/extract-overlay-ramdisk-rhozulf0/ramdisk
174 20:58:03.383347 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 20:58:03.383530 start: 1.4.5 apply-overlay-tftp (timeout 00:09:55) [common]
176 20:58:03.383656 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8200507/compress-overlay-jeoxnefz/overlay-1.4.2.4.tar.gz to ramdisk
177 20:58:03.383766 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8200507/compress-overlay-jeoxnefz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8200507/extract-overlay-ramdisk-rhozulf0/ramdisk
178 20:58:03.388118 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 20:58:03.388239 start: 1.4.6 configure-preseed-file (timeout 00:09:55) [common]
180 20:58:03.388333 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 20:58:03.388427 start: 1.4.7 compress-ramdisk (timeout 00:09:55) [common]
182 20:58:03.388507 Building ramdisk /var/lib/lava/dispatcher/tmp/8200507/extract-overlay-ramdisk-rhozulf0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8200507/extract-overlay-ramdisk-rhozulf0/ramdisk
183 20:58:03.455377 >> 48008 blocks
184 20:58:04.252846 rename /var/lib/lava/dispatcher/tmp/8200507/extract-overlay-ramdisk-rhozulf0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/ramdisk/ramdisk.cpio.gz
185 20:58:04.253285 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 20:58:04.253439 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
187 20:58:04.253574 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
188 20:58:04.253688 No mkimage arch provided, not using FIT.
189 20:58:04.253797 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 20:58:04.253902 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 20:58:04.254024 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 20:58:04.254141 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
193 20:58:04.254242 No LXC device requested
194 20:58:04.254348 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 20:58:04.254475 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
196 20:58:04.254575 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 20:58:04.254659 Checking files for TFTP limit of 4294967296 bytes.
198 20:58:04.255101 end: 1 tftp-deploy (duration 00:00:06) [common]
199 20:58:04.255226 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 20:58:04.255341 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 20:58:04.255488 substitutions:
202 20:58:04.255567 - {DTB}: None
203 20:58:04.255653 - {INITRD}: 8200507/tftp-deploy-_hx84shp/ramdisk/ramdisk.cpio.gz
204 20:58:04.255733 - {KERNEL}: 8200507/tftp-deploy-_hx84shp/kernel/bzImage
205 20:58:04.255813 - {LAVA_MAC}: None
206 20:58:04.255892 - {PRESEED_CONFIG}: None
207 20:58:04.255972 - {PRESEED_LOCAL}: None
208 20:58:04.256051 - {RAMDISK}: 8200507/tftp-deploy-_hx84shp/ramdisk/ramdisk.cpio.gz
209 20:58:04.256129 - {ROOT_PART}: None
210 20:58:04.256206 - {ROOT}: None
211 20:58:04.256283 - {SERVER_IP}: 192.168.201.1
212 20:58:04.256358 - {TEE}: None
213 20:58:04.256434 Parsed boot commands:
214 20:58:04.256516 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 20:58:04.256707 Parsed boot commands: tftpboot 192.168.201.1 8200507/tftp-deploy-_hx84shp/kernel/bzImage 8200507/tftp-deploy-_hx84shp/kernel/cmdline 8200507/tftp-deploy-_hx84shp/ramdisk/ramdisk.cpio.gz
216 20:58:04.256817 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 20:58:04.256928 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 20:58:04.257071 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 20:58:04.257190 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 20:58:04.257291 Not connected, no need to disconnect.
221 20:58:04.257399 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 20:58:04.257514 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 20:58:04.257599 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
224 20:58:04.260659 Setting prompt string to ['lava-test: # ']
225 20:58:04.261080 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 20:58:04.261250 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 20:58:04.261410 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 20:58:04.261549 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 20:58:04.261844 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
230 20:58:04.282781 >> Command sent successfully.
231 20:58:04.284965 Returned 0 in 0 seconds
232 20:58:04.385772 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 20:58:04.386356 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 20:58:04.386459 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 20:58:04.386547 Setting prompt string to 'Starting depthcharge on Voema...'
237 20:58:04.386615 Changing prompt to 'Starting depthcharge on Voema...'
238 20:58:04.386684 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 20:58:04.386952 [Enter `^Ec?' for help]
240 20:58:12.438510
241 20:58:12.438683
242 20:58:12.448132 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 20:58:12.451451 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 20:58:12.455076
245 20:58:12.458397 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
246 20:58:12.461697 CPU: AES supported, TXT NOT supported, VT supported
247 20:58:12.468275 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
248 20:58:12.474599 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
249 20:58:12.478359 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 20:58:12.481630 VBOOT: Loading verstage.
251 20:58:12.487950 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 20:58:12.491157 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 20:58:12.494462 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 20:58:12.505687 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 20:58:12.511893 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 20:58:12.512028
257 20:58:12.512117
258 20:58:12.525372 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 20:58:12.539347 Probing TPM: . done!
260 20:58:12.542500 TPM ready after 0 ms
261 20:58:12.545899 Connected to device vid:did:rid of 1ae0:0028:00
262 20:58:12.557131 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
263 20:58:12.563587 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 20:58:12.567136 Initialized TPM device CR50 revision 0
265 20:58:12.618552 tlcl_send_startup: Startup return code is 0
266 20:58:12.618707 TPM: setup succeeded
267 20:58:12.633890 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 20:58:12.648306 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 20:58:12.661018 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 20:58:12.670709 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 20:58:12.674346 Chrome EC: UHEPI supported
272 20:58:12.677646 Phase 1
273 20:58:12.680829 FMAP: area GBB found @ 1805000 (458752 bytes)
274 20:58:12.690806 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 20:58:12.697241 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 20:58:12.704239 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 20:58:12.710980 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 20:58:12.714081 Recovery requested (1009000e)
279 20:58:12.717291 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 20:58:12.729255 tlcl_extend: response is 0
281 20:58:12.735831 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 20:58:12.746091 tlcl_extend: response is 0
283 20:58:12.752465 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 20:58:12.759068 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 20:58:12.766052 BS: verstage times (exec / console): total (unknown) / 142 ms
286 20:58:12.766209
287 20:58:12.766292
288 20:58:12.779033 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 20:58:12.785378 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 20:58:12.789292 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 20:58:12.792238 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 20:58:12.798642 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 20:58:12.802310 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 20:58:12.805708 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 20:58:12.808431 TCO_STS: 0000 0000
296 20:58:12.812219 GEN_PMCON: d0015038 00002200
297 20:58:12.815475 GBLRST_CAUSE: 00000000 00000000
298 20:58:12.815569 HPR_CAUSE0: 00000000
299 20:58:12.818857
300 20:58:12.818948 prev_sleep_state 5
301 20:58:12.821873 Boot Count incremented to 13776
302 20:58:12.828317 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 20:58:12.834980 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 20:58:12.845182 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 20:58:12.851798 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
306 20:58:12.855033 Chrome EC: UHEPI supported
307 20:58:12.861405 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
308 20:58:12.873039 Probing TPM: done!
309 20:58:12.879625 Connected to device vid:did:rid of 1ae0:0028:00
310 20:58:12.890445 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
311 20:58:12.898143 Initialized TPM device CR50 revision 0
312 20:58:12.907974 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 20:58:12.914574 MRC: Hash idx 0x100b comparison successful.
314 20:58:12.917976 MRC cache found, size faa8
315 20:58:12.918145 bootmode is set to: 2
316 20:58:12.921644 SPD index = 0
317 20:58:12.927965 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
318 20:58:12.931243 SPD: module type is LPDDR4X
319 20:58:12.934522 SPD: module part number is MT53E512M64D4NW-046
320 20:58:12.941027 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
321 20:58:12.944307 SPD: device width 16 bits, bus width 16 bits
322 20:58:12.950781 SPD: module size is 1024 MB (per channel)
323 20:58:13.386070 CBMEM:
324 20:58:13.389284 IMD: root @ 0x76fff000 254 entries.
325 20:58:13.392939 IMD: root @ 0x76ffec00 62 entries.
326 20:58:13.396090 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
327 20:58:13.402609 FMAP: area RW_VPD found @ f35000 (8192 bytes)
328 20:58:13.406185 External stage cache:
329 20:58:13.409342 IMD: root @ 0x7b3ff000 254 entries.
330 20:58:13.412454 IMD: root @ 0x7b3fec00 62 entries.
331 20:58:13.428282 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
332 20:58:13.434747 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 20:58:13.440961 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
334 20:58:13.455334 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 20:58:13.458443 cse_lite: Skip switching to RW in the recovery path
336 20:58:13.461654
337 20:58:13.461751 8 DIMMs found
338 20:58:13.461825 SMM Memory Map
339 20:58:13.465006 SMRAM : 0x7b000000 0x800000
340 20:58:13.468759
341 20:58:13.468843 Subregion 0: 0x7b000000 0x200000
342 20:58:13.472466 Subregion 1: 0x7b200000 0x200000
343 20:58:13.476263 Subregion 2: 0x7b400000 0x400000
344 20:58:13.479425 top_of_ram = 0x77000000
345 20:58:13.486074 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
346 20:58:13.489548 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
347 20:58:13.495960 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
348 20:58:13.499209 MTRR Range: Start=ff000000 End=0 (Size 1000000)
349 20:58:13.509289 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
350 20:58:13.515904 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
351 20:58:13.525702 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
352 20:58:13.528960 Processing 211 relocs. Offset value of 0x74c0b000
353 20:58:13.538258 BS: romstage times (exec / console): total (unknown) / 277 ms
354 20:58:13.544328
355 20:58:13.544427
356 20:58:13.554329 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
357 20:58:13.557711 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 20:58:13.567499 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 20:58:13.574060 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 20:58:13.580843 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
361 20:58:13.587079 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
362 20:58:13.634475 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
363 20:58:13.640901 Processing 5008 relocs. Offset value of 0x75d98000
364 20:58:13.644238 BS: postcar times (exec / console): total (unknown) / 59 ms
365 20:58:13.647293
366 20:58:13.647384
367 20:58:13.657158 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
368 20:58:13.657252 Normal boot
369 20:58:13.660588 FW_CONFIG value is 0x804c02
370 20:58:13.663803 PCI: 00:07.0 disabled by fw_config
371 20:58:13.667524 PCI: 00:07.1 disabled by fw_config
372 20:58:13.670813 PCI: 00:0d.2 disabled by fw_config
373 20:58:13.674115 PCI: 00:1c.7 disabled by fw_config
374 20:58:13.680716 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 20:58:13.687656 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 20:58:13.690770 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 20:58:13.694112 GENERIC: 0.0 disabled by fw_config
378 20:58:13.697549 GENERIC: 1.0 disabled by fw_config
379 20:58:13.700669
380 20:58:13.704336 fw_config match found: DB_USB=USB3_ACTIVE
381 20:58:13.707724 fw_config match found: DB_USB=USB3_ACTIVE
382 20:58:13.710434 fw_config match found: DB_USB=USB3_ACTIVE
383 20:58:13.717429 fw_config match found: DB_USB=USB3_ACTIVE
384 20:58:13.720620 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 20:58:13.727256 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 20:58:13.737222 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 20:58:13.743877 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
388 20:58:13.747187 microcode: sig=0x806c1 pf=0x80 revision=0x86
389 20:58:13.753593 microcode: Update skipped, already up-to-date
390 20:58:13.760113 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
391 20:58:13.787813 Detected 4 core, 8 thread CPU.
392 20:58:13.791413 Setting up SMI for CPU
393 20:58:13.794507 IED base = 0x7b400000
394 20:58:13.794598 IED size = 0x00400000
395 20:58:13.797754 Will perform SMM setup.
396 20:58:13.804665 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
397 20:58:13.811035 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
398 20:58:13.818000 Processing 16 relocs. Offset value of 0x00030000
399 20:58:13.821162 Attempting to start 7 APs
400 20:58:13.824468 Waiting for 10ms after sending INIT.
401 20:58:13.840170 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
402 20:58:13.843376 AP: slot 2 apic_id 3.
403 20:58:13.846764 AP: slot 6 apic_id 2.
404 20:58:13.846889 AP: slot 5 apic_id 6.
405 20:58:13.849906 AP: slot 4 apic_id 7.
406 20:58:13.850015 done.
407 20:58:13.853088 AP: slot 7 apic_id 4.
408 20:58:13.853196 AP: slot 3 apic_id 5.
409 20:58:13.859603 Waiting for 2nd SIPI to complete...done.
410 20:58:13.866744 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
411 20:58:13.873012 Processing 13 relocs. Offset value of 0x00038000
412 20:58:13.873150 Unable to locate Global NVS
413 20:58:13.883239 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
414 20:58:13.886454 Installing permanent SMM handler to 0x7b000000
415 20:58:13.896634 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
416 20:58:13.899446 Processing 794 relocs. Offset value of 0x7b010000
417 20:58:13.909447 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
418 20:58:13.912995 Processing 13 relocs. Offset value of 0x7b008000
419 20:58:13.919584 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
420 20:58:13.926437 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
421 20:58:13.929861 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
422 20:58:13.936323 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
423 20:58:13.942809 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
424 20:58:13.949396 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
425 20:58:13.955820 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
426 20:58:13.955928 Unable to locate Global NVS
427 20:58:13.965908 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
428 20:58:13.969124 Clearing SMI status registers
429 20:58:13.969217 SMI_STS: PM1
430 20:58:13.972505 PM1_STS: PWRBTN
431 20:58:13.979314 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
432 20:58:13.982608 In relocation handler: CPU 0
433 20:58:13.986038 New SMBASE=0x7b000000 IEDBASE=0x7b400000
434 20:58:13.992436 Writing SMRR. base = 0x7b000006, mask=0xff800c00
435 20:58:13.992547 Relocation complete.
436 20:58:14.002297 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
437 20:58:14.002398 In relocation handler: CPU 1
438 20:58:14.005544
439 20:58:14.009055 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 20:58:14.009146 Relocation complete.
441 20:58:14.019332 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 20:58:14.019451 In relocation handler: CPU 7
443 20:58:14.025189 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 20:58:14.028880 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 20:58:14.032150 Relocation complete.
446 20:58:14.038795 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
447 20:58:14.041979 In relocation handler: CPU 3
448 20:58:14.045269 New SMBASE=0x7afff400 IEDBASE=0x7b400000
449 20:58:14.048451 Relocation complete.
450 20:58:14.054957 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 20:58:14.058357 In relocation handler: CPU 5
452 20:58:14.061621 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 20:58:14.068197 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 20:58:14.068313 Relocation complete.
455 20:58:14.078352 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 20:58:14.078461 In relocation handler: CPU 4
457 20:58:14.084740 New SMBASE=0x7afff000 IEDBASE=0x7b400000
458 20:58:14.084869 Relocation complete.
459 20:58:14.094803 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
460 20:58:14.094909 In relocation handler: CPU 2
461 20:58:14.101276 New SMBASE=0x7afff800 IEDBASE=0x7b400000
462 20:58:14.101389 Relocation complete.
463 20:58:14.111234 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
464 20:58:14.111343 In relocation handler: CPU 6
465 20:58:14.117713 New SMBASE=0x7affe800 IEDBASE=0x7b400000
466 20:58:14.120757 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 20:58:14.124218 Relocation complete.
468 20:58:14.124343 Initializing CPU #0
469 20:58:14.127913 CPU: vendor Intel device 806c1
470 20:58:14.134288 CPU: family 06, model 8c, stepping 01
471 20:58:14.134433 Clearing out pending MCEs
472 20:58:14.138753 Setting up local APIC...
473 20:58:14.142542 apic_id: 0x00 done.
474 20:58:14.142629 Turbo is available but hidden
475 20:58:14.145722 Turbo is available and visible
476 20:58:14.152280 microcode: Update skipped, already up-to-date
477 20:58:14.152395 CPU #0 initialized
478 20:58:14.155783 Initializing CPU #3
479 20:58:14.158971 Initializing CPU #7
480 20:58:14.159100 CPU: vendor Intel device 806c1
481 20:58:14.166028 CPU: family 06, model 8c, stepping 01
482 20:58:14.169446 CPU: vendor Intel device 806c1
483 20:58:14.172232 CPU: family 06, model 8c, stepping 01
484 20:58:14.172321 Clearing out pending MCEs
485 20:58:14.175406
486 20:58:14.175527 Clearing out pending MCEs
487 20:58:14.178861 Setting up local APIC...
488 20:58:14.182598 Initializing CPU #2
489 20:58:14.182685 Initializing CPU #6
490 20:58:14.185915 CPU: vendor Intel device 806c1
491 20:58:14.189132 CPU: family 06, model 8c, stepping 01
492 20:58:14.192159 CPU: vendor Intel device 806c1
493 20:58:14.195471 CPU: family 06, model 8c, stepping 01
494 20:58:14.199106 apic_id: 0x05 done.
495 20:58:14.202199 Setting up local APIC...
496 20:58:14.202296 Initializing CPU #5
497 20:58:14.205494
498 20:58:14.205581 Initializing CPU #4
499 20:58:14.208740 CPU: vendor Intel device 806c1
500 20:58:14.212415 CPU: family 06, model 8c, stepping 01
501 20:58:14.215617 CPU: vendor Intel device 806c1
502 20:58:14.219004 CPU: family 06, model 8c, stepping 01
503 20:58:14.221857 Clearing out pending MCEs
504 20:58:14.225233 Clearing out pending MCEs
505 20:58:14.228593 Setting up local APIC...
506 20:58:14.228703 apic_id: 0x04 done.
507 20:58:14.235529 microcode: Update skipped, already up-to-date
508 20:58:14.238734 microcode: Update skipped, already up-to-date
509 20:58:14.241996 CPU #3 initialized
510 20:58:14.242086 CPU #7 initialized
511 20:58:14.245363 Clearing out pending MCEs
512 20:58:14.248498 Clearing out pending MCEs
513 20:58:14.252078 Setting up local APIC...
514 20:58:14.252175 apic_id: 0x06 done.
515 20:58:14.255418 Setting up local APIC...
516 20:58:14.258797 Initializing CPU #1
517 20:58:14.261925 microcode: Update skipped, already up-to-date
518 20:58:14.265096 apic_id: 0x07 done.
519 20:58:14.265190 CPU #5 initialized
520 20:58:14.272169 microcode: Update skipped, already up-to-date
521 20:58:14.272264 Setting up local APIC...
522 20:58:14.275038 CPU: vendor Intel device 806c1
523 20:58:14.278827 CPU: family 06, model 8c, stepping 01
524 20:58:14.282254 CPU #4 initialized
525 20:58:14.285361 Clearing out pending MCEs
526 20:58:14.285449 apic_id: 0x02 done.
527 20:58:14.288453
528 20:58:14.288539 apic_id: 0x03 done.
529 20:58:14.294939 microcode: Update skipped, already up-to-date
530 20:58:14.298636 microcode: Update skipped, already up-to-date
531 20:58:14.298726 CPU #6 initialized
532 20:58:14.301785
533 20:58:14.301871 CPU #2 initialized
534 20:58:14.304833 Setting up local APIC...
535 20:58:14.308553 apic_id: 0x01 done.
536 20:58:14.311626 microcode: Update skipped, already up-to-date
537 20:58:14.314911 CPU #1 initialized
538 20:58:14.318660 bsp_do_flight_plan done after 455 msecs.
539 20:58:14.321664 CPU: frequency set to 4000 MHz
540 20:58:14.321750 Enabling SMIs.
541 20:58:14.328306 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
542 20:58:14.344731 SATAXPCIE1 indicates PCIe NVMe is present
543 20:58:14.348612 Probing TPM: done!
544 20:58:14.351988 Connected to device vid:did:rid of 1ae0:0028:00
545 20:58:14.362081 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
546 20:58:14.365261 Initialized TPM device CR50 revision 0
547 20:58:14.369034 Enabling S0i3.4
548 20:58:14.375273 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
549 20:58:14.378885 Found a VBT of 8704 bytes after decompression
550 20:58:14.385336 cse_lite: CSE RO boot. HybridStorageMode disabled
551 20:58:14.391368 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
552 20:58:14.467129 FSPS returned 0
553 20:58:14.470277 Executing Phase 1 of FspMultiPhaseSiInit
554 20:58:14.480267 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
555 20:58:14.483491 port C0 DISC req: usage 1 usb3 1 usb2 5
556 20:58:14.486676 Raw Buffer output 0 00000511
557 20:58:14.489877 Raw Buffer output 1 00000000
558 20:58:14.493771 pmc_send_ipc_cmd succeeded
559 20:58:14.497253 port C1 DISC req: usage 1 usb3 2 usb2 3
560 20:58:14.500635
561 20:58:14.500722 Raw Buffer output 0 00000321
562 20:58:14.503564 Raw Buffer output 1 00000000
563 20:58:14.508275 pmc_send_ipc_cmd succeeded
564 20:58:14.513003 Detected 4 core, 8 thread CPU.
565 20:58:14.516234 Detected 4 core, 8 thread CPU.
566 20:58:14.751122 Display FSP Version Info HOB
567 20:58:14.754500 Reference Code - CPU = a.0.4c.31
568 20:58:14.757758 uCode Version = 0.0.0.86
569 20:58:14.761024 TXT ACM version = ff.ff.ff.ffff
570 20:58:14.764354 Reference Code - ME = a.0.4c.31
571 20:58:14.767634 MEBx version = 0.0.0.0
572 20:58:14.770610 ME Firmware Version = Consumer SKU
573 20:58:14.773954 Reference Code - PCH = a.0.4c.31
574 20:58:14.777256 PCH-CRID Status = Disabled
575 20:58:14.780471 PCH-CRID Original Value = ff.ff.ff.ffff
576 20:58:14.783756 PCH-CRID New Value = ff.ff.ff.ffff
577 20:58:14.787471 OPROM - RST - RAID = ff.ff.ff.ffff
578 20:58:14.790686 PCH Hsio Version = 4.0.0.0
579 20:58:14.793885 Reference Code - SA - System Agent = a.0.4c.31
580 20:58:14.797171 Reference Code - MRC = 2.0.0.1
581 20:58:14.800435 SA - PCIe Version = a.0.4c.31
582 20:58:14.803773 SA-CRID Status = Disabled
583 20:58:14.807423 SA-CRID Original Value = 0.0.0.1
584 20:58:14.810541 SA-CRID New Value = 0.0.0.1
585 20:58:14.813824 OPROM - VBIOS = ff.ff.ff.ffff
586 20:58:14.817374 IO Manageability Engine FW Version = 11.1.4.0
587 20:58:14.820472 PHY Build Version = 0.0.0.e0
588 20:58:14.824026 Thunderbolt(TM) FW Version = 0.0.0.0
589 20:58:14.830657 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
590 20:58:14.833948 ITSS IRQ Polarities Before:
591 20:58:14.834053 IPC0: 0xffffffff
592 20:58:14.836998 IPC1: 0xffffffff
593 20:58:14.837087 IPC2: 0xffffffff
594 20:58:14.840324 IPC3: 0xffffffff
595 20:58:14.843883 ITSS IRQ Polarities After:
596 20:58:14.843968 IPC0: 0xffffffff
597 20:58:14.847157 IPC1: 0xffffffff
598 20:58:14.847249 IPC2: 0xffffffff
599 20:58:14.850478 IPC3: 0xffffffff
600 20:58:14.853878 Found PCIe Root Port #9 at PCI: 00:1d.0.
601 20:58:14.866929 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
602 20:58:14.876953 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
603 20:58:14.890444 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
604 20:58:14.897068 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
605 20:58:14.900260 Enumerating buses...
606 20:58:14.903448 Show all devs... Before device enumeration.
607 20:58:14.906575 Root Device: enabled 1
608 20:58:14.906670 DOMAIN: 0000: enabled 1
609 20:58:14.910260 CPU_CLUSTER: 0: enabled 1
610 20:58:14.913230 PCI: 00:00.0: enabled 1
611 20:58:14.916971 PCI: 00:02.0: enabled 1
612 20:58:14.917058 PCI: 00:04.0: enabled 1
613 20:58:14.920181 PCI: 00:05.0: enabled 1
614 20:58:14.923357 PCI: 00:06.0: enabled 0
615 20:58:14.926847 PCI: 00:07.0: enabled 0
616 20:58:14.926931 PCI: 00:07.1: enabled 0
617 20:58:14.929969 PCI: 00:07.2: enabled 0
618 20:58:14.933160 PCI: 00:07.3: enabled 0
619 20:58:14.933250 PCI: 00:08.0: enabled 1
620 20:58:14.936764 PCI: 00:09.0: enabled 0
621 20:58:14.939749 PCI: 00:0a.0: enabled 0
622 20:58:14.942969 PCI: 00:0d.0: enabled 1
623 20:58:14.943054 PCI: 00:0d.1: enabled 0
624 20:58:14.946935 PCI: 00:0d.2: enabled 0
625 20:58:14.949566 PCI: 00:0d.3: enabled 0
626 20:58:14.953399 PCI: 00:0e.0: enabled 0
627 20:58:14.953481 PCI: 00:10.2: enabled 1
628 20:58:14.956345 PCI: 00:10.6: enabled 0
629 20:58:14.959680 PCI: 00:10.7: enabled 0
630 20:58:14.962992 PCI: 00:12.0: enabled 0
631 20:58:14.963071 PCI: 00:12.6: enabled 0
632 20:58:14.966234 PCI: 00:13.0: enabled 0
633 20:58:14.969696 PCI: 00:14.0: enabled 1
634 20:58:14.972853 PCI: 00:14.1: enabled 0
635 20:58:14.972947 PCI: 00:14.2: enabled 1
636 20:58:14.976256 PCI: 00:14.3: enabled 1
637 20:58:14.979924 PCI: 00:15.0: enabled 1
638 20:58:14.980008 PCI: 00:15.1: enabled 1
639 20:58:14.983263 PCI: 00:15.2: enabled 1
640 20:58:14.986551 PCI: 00:15.3: enabled 1
641 20:58:14.989826 PCI: 00:16.0: enabled 1
642 20:58:14.989915 PCI: 00:16.1: enabled 0
643 20:58:14.993108 PCI: 00:16.2: enabled 0
644 20:58:14.996292 PCI: 00:16.3: enabled 0
645 20:58:14.999477 PCI: 00:16.4: enabled 0
646 20:58:14.999570 PCI: 00:16.5: enabled 0
647 20:58:15.002816 PCI: 00:17.0: enabled 1
648 20:58:15.006414 PCI: 00:19.0: enabled 0
649 20:58:15.009659 PCI: 00:19.1: enabled 1
650 20:58:15.009742 PCI: 00:19.2: enabled 0
651 20:58:15.012759 PCI: 00:1c.0: enabled 1
652 20:58:15.016526 PCI: 00:1c.1: enabled 0
653 20:58:15.016618 PCI: 00:1c.2: enabled 0
654 20:58:15.019619
655 20:58:15.019734 PCI: 00:1c.3: enabled 0
656 20:58:15.023402 PCI: 00:1c.4: enabled 0
657 20:58:15.026306 PCI: 00:1c.5: enabled 0
658 20:58:15.026395 PCI: 00:1c.6: enabled 1
659 20:58:15.029424 PCI: 00:1c.7: enabled 0
660 20:58:15.032661 PCI: 00:1d.0: enabled 1
661 20:58:15.036211 PCI: 00:1d.1: enabled 0
662 20:58:15.036350 PCI: 00:1d.2: enabled 1
663 20:58:15.039270 PCI: 00:1d.3: enabled 0
664 20:58:15.042873 PCI: 00:1e.0: enabled 1
665 20:58:15.045927 PCI: 00:1e.1: enabled 0
666 20:58:15.046057 PCI: 00:1e.2: enabled 1
667 20:58:15.049517 PCI: 00:1e.3: enabled 1
668 20:58:15.052806 PCI: 00:1f.0: enabled 1
669 20:58:15.055993 PCI: 00:1f.1: enabled 0
670 20:58:15.056085 PCI: 00:1f.2: enabled 1
671 20:58:15.059451 PCI: 00:1f.3: enabled 1
672 20:58:15.062749 PCI: 00:1f.4: enabled 0
673 20:58:15.062835 PCI: 00:1f.5: enabled 1
674 20:58:15.066056 PCI: 00:1f.6: enabled 0
675 20:58:15.069268 PCI: 00:1f.7: enabled 0
676 20:58:15.072961 APIC: 00: enabled 1
677 20:58:15.073048 GENERIC: 0.0: enabled 1
678 20:58:15.076217 GENERIC: 0.0: enabled 1
679 20:58:15.079413 GENERIC: 1.0: enabled 1
680 20:58:15.079506 GENERIC: 0.0: enabled 1
681 20:58:15.082893
682 20:58:15.082984 GENERIC: 1.0: enabled 1
683 20:58:15.086003 USB0 port 0: enabled 1
684 20:58:15.089286 GENERIC: 0.0: enabled 1
685 20:58:15.089373 USB0 port 0: enabled 1
686 20:58:15.092611 GENERIC: 0.0: enabled 1
687 20:58:15.095819 I2C: 00:1a: enabled 1
688 20:58:15.095905 I2C: 00:31: enabled 1
689 20:58:15.099780 I2C: 00:32: enabled 1
690 20:58:15.102788 I2C: 00:10: enabled 1
691 20:58:15.102879 I2C: 00:15: enabled 1
692 20:58:15.105939
693 20:58:15.106054 GENERIC: 0.0: enabled 0
694 20:58:15.109659 GENERIC: 1.0: enabled 0
695 20:58:15.112881 GENERIC: 0.0: enabled 1
696 20:58:15.112963 SPI: 00: enabled 1
697 20:58:15.115942 SPI: 00: enabled 1
698 20:58:15.119068 PNP: 0c09.0: enabled 1
699 20:58:15.119172 GENERIC: 0.0: enabled 1
700 20:58:15.122430 USB3 port 0: enabled 1
701 20:58:15.125537 USB3 port 1: enabled 1
702 20:58:15.125618 USB3 port 2: enabled 0
703 20:58:15.129109
704 20:58:15.129196 USB3 port 3: enabled 0
705 20:58:15.132393 USB2 port 0: enabled 0
706 20:58:15.135576 USB2 port 1: enabled 1
707 20:58:15.135666 USB2 port 2: enabled 1
708 20:58:15.139259 USB2 port 3: enabled 0
709 20:58:15.142233 USB2 port 4: enabled 1
710 20:58:15.142321 USB2 port 5: enabled 0
711 20:58:15.145486 USB2 port 6: enabled 0
712 20:58:15.149083 USB2 port 7: enabled 0
713 20:58:15.152266 USB2 port 8: enabled 0
714 20:58:15.152353 USB2 port 9: enabled 0
715 20:58:15.155368 USB3 port 0: enabled 0
716 20:58:15.159245 USB3 port 1: enabled 1
717 20:58:15.159324 USB3 port 2: enabled 0
718 20:58:15.162055 USB3 port 3: enabled 0
719 20:58:15.165522 GENERIC: 0.0: enabled 1
720 20:58:15.168723 GENERIC: 1.0: enabled 1
721 20:58:15.168815 APIC: 01: enabled 1
722 20:58:15.172100 APIC: 03: enabled 1
723 20:58:15.172176 APIC: 05: enabled 1
724 20:58:15.175306 APIC: 07: enabled 1
725 20:58:15.178953 APIC: 06: enabled 1
726 20:58:15.179050 APIC: 02: enabled 1
727 20:58:15.182094 APIC: 04: enabled 1
728 20:58:15.185496 Compare with tree...
729 20:58:15.185591 Root Device: enabled 1
730 20:58:15.188720 DOMAIN: 0000: enabled 1
731 20:58:15.192024 PCI: 00:00.0: enabled 1
732 20:58:15.195273 PCI: 00:02.0: enabled 1
733 20:58:15.195352 PCI: 00:04.0: enabled 1
734 20:58:15.198570 GENERIC: 0.0: enabled 1
735 20:58:15.201655 PCI: 00:05.0: enabled 1
736 20:58:15.205069 PCI: 00:06.0: enabled 0
737 20:58:15.208267 PCI: 00:07.0: enabled 0
738 20:58:15.208354 GENERIC: 0.0: enabled 1
739 20:58:15.212072
740 20:58:15.212155 PCI: 00:07.1: enabled 0
741 20:58:15.215312 GENERIC: 1.0: enabled 1
742 20:58:15.218377 PCI: 00:07.2: enabled 0
743 20:58:15.221643 GENERIC: 0.0: enabled 1
744 20:58:15.225148 PCI: 00:07.3: enabled 0
745 20:58:15.225229 GENERIC: 1.0: enabled 1
746 20:58:15.228340 PCI: 00:08.0: enabled 1
747 20:58:15.231457 PCI: 00:09.0: enabled 0
748 20:58:15.235069 PCI: 00:0a.0: enabled 0
749 20:58:15.238259 PCI: 00:0d.0: enabled 1
750 20:58:15.238353 USB0 port 0: enabled 1
751 20:58:15.241924 USB3 port 0: enabled 1
752 20:58:15.244491 USB3 port 1: enabled 1
753 20:58:15.247946 USB3 port 2: enabled 0
754 20:58:15.251213 USB3 port 3: enabled 0
755 20:58:15.251332 PCI: 00:0d.1: enabled 0
756 20:58:15.254847
757 20:58:15.254933 PCI: 00:0d.2: enabled 0
758 20:58:15.258072 GENERIC: 0.0: enabled 1
759 20:58:15.261555 PCI: 00:0d.3: enabled 0
760 20:58:15.264910 PCI: 00:0e.0: enabled 0
761 20:58:15.265006 PCI: 00:10.2: enabled 1
762 20:58:15.267938
763 20:58:15.268044 PCI: 00:10.6: enabled 0
764 20:58:15.271518 PCI: 00:10.7: enabled 0
765 20:58:15.274641 PCI: 00:12.0: enabled 0
766 20:58:15.278000 PCI: 00:12.6: enabled 0
767 20:58:15.278121 PCI: 00:13.0: enabled 0
768 20:58:15.281044
769 20:58:15.281135 PCI: 00:14.0: enabled 1
770 20:58:15.284340 USB0 port 0: enabled 1
771 20:58:15.288038 USB2 port 0: enabled 0
772 20:58:15.291360 USB2 port 1: enabled 1
773 20:58:15.294647 USB2 port 2: enabled 1
774 20:58:15.294744 USB2 port 3: enabled 0
775 20:58:15.297802 USB2 port 4: enabled 1
776 20:58:15.301400 USB2 port 5: enabled 0
777 20:58:15.304491 USB2 port 6: enabled 0
778 20:58:15.307731 USB2 port 7: enabled 0
779 20:58:15.307812 USB2 port 8: enabled 0
780 20:58:15.310800
781 20:58:15.310882 USB2 port 9: enabled 0
782 20:58:15.314095 USB3 port 0: enabled 0
783 20:58:15.317259 USB3 port 1: enabled 1
784 20:58:15.320965 USB3 port 2: enabled 0
785 20:58:15.324051 USB3 port 3: enabled 0
786 20:58:15.324134 PCI: 00:14.1: enabled 0
787 20:58:15.327364 PCI: 00:14.2: enabled 1
788 20:58:15.330480 PCI: 00:14.3: enabled 1
789 20:58:15.334026 GENERIC: 0.0: enabled 1
790 20:58:15.337270 PCI: 00:15.0: enabled 1
791 20:58:15.337362 I2C: 00:1a: enabled 1
792 20:58:15.340522 I2C: 00:31: enabled 1
793 20:58:15.344147 I2C: 00:32: enabled 1
794 20:58:15.347249 PCI: 00:15.1: enabled 1
795 20:58:15.350457 I2C: 00:10: enabled 1
796 20:58:15.350539 PCI: 00:15.2: enabled 1
797 20:58:15.354083 PCI: 00:15.3: enabled 1
798 20:58:15.357322 PCI: 00:16.0: enabled 1
799 20:58:15.360656 PCI: 00:16.1: enabled 0
800 20:58:15.363941 PCI: 00:16.2: enabled 0
801 20:58:15.364031 PCI: 00:16.3: enabled 0
802 20:58:15.367264 PCI: 00:16.4: enabled 0
803 20:58:15.370902 PCI: 00:16.5: enabled 0
804 20:58:15.373796 PCI: 00:17.0: enabled 1
805 20:58:15.373882 PCI: 00:19.0: enabled 0
806 20:58:15.376978
807 20:58:15.377067 PCI: 00:19.1: enabled 1
808 20:58:15.380327 I2C: 00:15: enabled 1
809 20:58:15.383439 PCI: 00:19.2: enabled 0
810 20:58:15.387084 PCI: 00:1d.0: enabled 1
811 20:58:15.390956 GENERIC: 0.0: enabled 1
812 20:58:15.391044 PCI: 00:1e.0: enabled 1
813 20:58:15.440638 PCI: 00:1e.1: enabled 0
814 20:58:15.440793 PCI: 00:1e.2: enabled 1
815 20:58:15.441073 SPI: 00: enabled 1
816 20:58:15.441151 PCI: 00:1e.3: enabled 1
817 20:58:15.441217 SPI: 00: enabled 1
818 20:58:15.441475 PCI: 00:1f.0: enabled 1
819 20:58:15.441560 PNP: 0c09.0: enabled 1
820 20:58:15.441811 PCI: 00:1f.1: enabled 0
821 20:58:15.441882 PCI: 00:1f.2: enabled 1
822 20:58:15.441968 GENERIC: 0.0: enabled 1
823 20:58:15.442257 GENERIC: 0.0: enabled 1
824 20:58:15.442339 GENERIC: 1.0: enabled 1
825 20:58:15.442424 PCI: 00:1f.3: enabled 1
826 20:58:15.442503 PCI: 00:1f.4: enabled 0
827 20:58:15.442591 PCI: 00:1f.5: enabled 1
828 20:58:15.442674 PCI: 00:1f.6: enabled 0
829 20:58:15.442773 PCI: 00:1f.7: enabled 0
830 20:58:15.443037 CPU_CLUSTER: 0: enabled 1
831 20:58:15.443108 APIC: 00: enabled 1
832 20:58:15.461995 APIC: 01: enabled 1
833 20:58:15.462140 APIC: 03: enabled 1
834 20:58:15.462227 APIC: 05: enabled 1
835 20:58:15.462543 APIC: 07: enabled 1
836 20:58:15.462636 APIC: 06: enabled 1
837 20:58:15.462705 APIC: 02: enabled 1
838 20:58:15.462778 APIC: 04: enabled 1
839 20:58:15.462841 Root Device scanning...
840 20:58:15.465491 scan_static_bus for Root Device
841 20:58:15.465580 DOMAIN: 0000 enabled
842 20:58:15.468880 CPU_CLUSTER: 0 enabled
843 20:58:15.472334 DOMAIN: 0000 scanning...
844 20:58:15.475447 PCI: pci_scan_bus for bus 00
845 20:58:15.478640 PCI: 00:00.0 [8086/0000] ops
846 20:58:15.481900 PCI: 00:00.0 [8086/9a12] enabled
847 20:58:15.485258 PCI: 00:02.0 [8086/0000] bus ops
848 20:58:15.489167 PCI: 00:02.0 [8086/9a40] enabled
849 20:58:15.491901 PCI: 00:04.0 [8086/0000] bus ops
850 20:58:15.495542 PCI: 00:04.0 [8086/9a03] enabled
851 20:58:15.498433 PCI: 00:05.0 [8086/9a19] enabled
852 20:58:15.501664 PCI: 00:07.0 [0000/0000] hidden
853 20:58:15.505345 PCI: 00:08.0 [8086/9a11] enabled
854 20:58:15.508761 PCI: 00:0a.0 [8086/9a0d] disabled
855 20:58:15.511969 PCI: 00:0d.0 [8086/0000] bus ops
856 20:58:15.514980 PCI: 00:0d.0 [8086/9a13] enabled
857 20:58:15.518442 PCI: 00:14.0 [8086/0000] bus ops
858 20:58:15.521614 PCI: 00:14.0 [8086/a0ed] enabled
859 20:58:15.524856 PCI: 00:14.2 [8086/a0ef] enabled
860 20:58:15.528101 PCI: 00:14.3 [8086/0000] bus ops
861 20:58:15.531789 PCI: 00:14.3 [8086/a0f0] enabled
862 20:58:15.535065 PCI: 00:15.0 [8086/0000] bus ops
863 20:58:15.538047 PCI: 00:15.0 [8086/a0e8] enabled
864 20:58:15.541609 PCI: 00:15.1 [8086/0000] bus ops
865 20:58:15.544799 PCI: 00:15.1 [8086/a0e9] enabled
866 20:58:15.548193 PCI: 00:15.2 [8086/0000] bus ops
867 20:58:15.551329 PCI: 00:15.2 [8086/a0ea] enabled
868 20:58:15.554482 PCI: 00:15.3 [8086/0000] bus ops
869 20:58:15.557999 PCI: 00:15.3 [8086/a0eb] enabled
870 20:58:15.561611 PCI: 00:16.0 [8086/0000] ops
871 20:58:15.565007 PCI: 00:16.0 [8086/a0e0] enabled
872 20:58:15.568036 PCI: Static device PCI: 00:17.0 not found, disabling it.
873 20:58:15.571507 PCI: 00:19.0 [8086/0000] bus ops
874 20:58:15.574768 PCI: 00:19.0 [8086/a0c5] disabled
875 20:58:15.578015 PCI: 00:19.1 [8086/0000] bus ops
876 20:58:15.581468 PCI: 00:19.1 [8086/a0c6] enabled
877 20:58:15.584599 PCI: 00:1d.0 [8086/0000] bus ops
878 20:58:15.587778 PCI: 00:1d.0 [8086/a0b0] enabled
879 20:58:15.591038 PCI: 00:1e.0 [8086/0000] ops
880 20:58:15.594389 PCI: 00:1e.0 [8086/a0a8] enabled
881 20:58:15.597541 PCI: 00:1e.2 [8086/0000] bus ops
882 20:58:15.600767 PCI: 00:1e.2 [8086/a0aa] enabled
883 20:58:15.604612 PCI: 00:1e.3 [8086/0000] bus ops
884 20:58:15.607708 PCI: 00:1e.3 [8086/a0ab] enabled
885 20:58:15.610967 PCI: 00:1f.0 [8086/0000] bus ops
886 20:58:15.614108 PCI: 00:1f.0 [8086/a087] enabled
887 20:58:15.617424 RTC Init
888 20:58:15.621160 Set power on after power failure.
889 20:58:15.621250 Disabling Deep S3
890 20:58:15.624094 Disabling Deep S3
891 20:58:15.627329 Disabling Deep S4
892 20:58:15.627425 Disabling Deep S4
893 20:58:15.630900 Disabling Deep S5
894 20:58:15.631018 Disabling Deep S5
895 20:58:15.634210 PCI: 00:1f.2 [0000/0000] hidden
896 20:58:15.637431 PCI: 00:1f.3 [8086/0000] bus ops
897 20:58:15.640627 PCI: 00:1f.3 [8086/a0c8] enabled
898 20:58:15.644130 PCI: 00:1f.5 [8086/0000] bus ops
899 20:58:15.647314 PCI: 00:1f.5 [8086/a0a4] enabled
900 20:58:15.650606 PCI: Leftover static devices:
901 20:58:15.653644 PCI: 00:10.2
902 20:58:15.653748 PCI: 00:10.6
903 20:58:15.653817 PCI: 00:10.7
904 20:58:15.657011 PCI: 00:06.0
905 20:58:15.657107 PCI: 00:07.1
906 20:58:15.660551 PCI: 00:07.2
907 20:58:15.660662 PCI: 00:07.3
908 20:58:15.663731 PCI: 00:09.0
909 20:58:15.663824 PCI: 00:0d.1
910 20:58:15.663893 PCI: 00:0d.2
911 20:58:15.666840 PCI: 00:0d.3
912 20:58:15.666928 PCI: 00:0e.0
913 20:58:15.670407 PCI: 00:12.0
914 20:58:15.670545 PCI: 00:12.6
915 20:58:15.670677 PCI: 00:13.0
916 20:58:15.673805 PCI: 00:14.1
917 20:58:15.673929 PCI: 00:16.1
918 20:58:15.677064 PCI: 00:16.2
919 20:58:15.677198 PCI: 00:16.3
920 20:58:15.680335 PCI: 00:16.4
921 20:58:15.680486 PCI: 00:16.5
922 20:58:15.680612 PCI: 00:17.0
923 20:58:15.683466 PCI: 00:19.2
924 20:58:15.683598 PCI: 00:1e.1
925 20:58:15.686630 PCI: 00:1f.1
926 20:58:15.686769 PCI: 00:1f.4
927 20:58:15.686899 PCI: 00:1f.6
928 20:58:15.689786 PCI: 00:1f.7
929 20:58:15.693202 PCI: Check your devicetree.cb.
930 20:58:15.696510 PCI: 00:02.0 scanning...
931 20:58:15.700117 scan_generic_bus for PCI: 00:02.0
932 20:58:15.703537 scan_generic_bus for PCI: 00:02.0 done
933 20:58:15.706678 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
934 20:58:15.710017 PCI: 00:04.0 scanning...
935 20:58:15.713476 scan_generic_bus for PCI: 00:04.0
936 20:58:15.716601 GENERIC: 0.0 enabled
937 20:58:15.723055 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
938 20:58:15.726689 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
939 20:58:15.729814 PCI: 00:0d.0 scanning...
940 20:58:15.733283 scan_static_bus for PCI: 00:0d.0
941 20:58:15.736501 USB0 port 0 enabled
942 20:58:15.736663 USB0 port 0 scanning...
943 20:58:15.739742 scan_static_bus for USB0 port 0
944 20:58:15.742864 USB3 port 0 enabled
945 20:58:15.746134 USB3 port 1 enabled
946 20:58:15.746246 USB3 port 2 disabled
947 20:58:15.749472 USB3 port 3 disabled
948 20:58:15.752830 USB3 port 0 scanning...
949 20:58:15.756417 scan_static_bus for USB3 port 0
950 20:58:15.759617 scan_static_bus for USB3 port 0 done
951 20:58:15.762656 scan_bus: bus USB3 port 0 finished in 6 msecs
952 20:58:15.766062 USB3 port 1 scanning...
953 20:58:15.769422 scan_static_bus for USB3 port 1
954 20:58:15.772905 scan_static_bus for USB3 port 1 done
955 20:58:15.776219 scan_bus: bus USB3 port 1 finished in 6 msecs
956 20:58:15.782858 scan_static_bus for USB0 port 0 done
957 20:58:15.786044 scan_bus: bus USB0 port 0 finished in 43 msecs
958 20:58:15.789560 scan_static_bus for PCI: 00:0d.0 done
959 20:58:15.795870 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
960 20:58:15.795977 PCI: 00:14.0 scanning...
961 20:58:15.799042 scan_static_bus for PCI: 00:14.0
962 20:58:15.802458 USB0 port 0 enabled
963 20:58:15.805662 USB0 port 0 scanning...
964 20:58:15.809445 scan_static_bus for USB0 port 0
965 20:58:15.809568 USB2 port 0 disabled
966 20:58:15.812660
967 20:58:15.812748 USB2 port 1 enabled
968 20:58:15.815748 USB2 port 2 enabled
969 20:58:15.815827 USB2 port 3 disabled
970 20:58:15.819085 USB2 port 4 enabled
971 20:58:15.822780 USB2 port 5 disabled
972 20:58:15.822864 USB2 port 6 disabled
973 20:58:15.825537 USB2 port 7 disabled
974 20:58:15.829233 USB2 port 8 disabled
975 20:58:15.829325 USB2 port 9 disabled
976 20:58:15.832411 USB3 port 0 disabled
977 20:58:15.835532 USB3 port 1 enabled
978 20:58:15.835622 USB3 port 2 disabled
979 20:58:15.838879 USB3 port 3 disabled
980 20:58:15.842127 USB2 port 1 scanning...
981 20:58:15.845702 scan_static_bus for USB2 port 1
982 20:58:15.849011 scan_static_bus for USB2 port 1 done
983 20:58:15.852258 scan_bus: bus USB2 port 1 finished in 6 msecs
984 20:58:15.855495 USB2 port 2 scanning...
985 20:58:15.859134 scan_static_bus for USB2 port 2
986 20:58:15.862509 scan_static_bus for USB2 port 2 done
987 20:58:15.865429 scan_bus: bus USB2 port 2 finished in 6 msecs
988 20:58:15.868677 USB2 port 4 scanning...
989 20:58:15.871806 scan_static_bus for USB2 port 4
990 20:58:15.875124 scan_static_bus for USB2 port 4 done
991 20:58:15.881860 scan_bus: bus USB2 port 4 finished in 6 msecs
992 20:58:15.881975 USB3 port 1 scanning...
993 20:58:15.885684 scan_static_bus for USB3 port 1
994 20:58:15.891752 scan_static_bus for USB3 port 1 done
995 20:58:15.895558 scan_bus: bus USB3 port 1 finished in 6 msecs
996 20:58:15.898745 scan_static_bus for USB0 port 0 done
997 20:58:15.905351 scan_bus: bus USB0 port 0 finished in 93 msecs
998 20:58:15.908577 scan_static_bus for PCI: 00:14.0 done
999 20:58:15.911760 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1000 20:58:15.915119 PCI: 00:14.3 scanning...
1001 20:58:15.918466 scan_static_bus for PCI: 00:14.3
1002 20:58:15.921659 GENERIC: 0.0 enabled
1003 20:58:15.924874 scan_static_bus for PCI: 00:14.3 done
1004 20:58:15.928284 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1005 20:58:15.931323 PCI: 00:15.0 scanning...
1006 20:58:15.935002 scan_static_bus for PCI: 00:15.0
1007 20:58:15.938178 I2C: 00:1a enabled
1008 20:58:15.938280 I2C: 00:31 enabled
1009 20:58:15.941389 I2C: 00:32 enabled
1010 20:58:15.945014 scan_static_bus for PCI: 00:15.0 done
1011 20:58:15.948115 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1012 20:58:15.951443 PCI: 00:15.1 scanning...
1013 20:58:15.954351 scan_static_bus for PCI: 00:15.1
1014 20:58:15.957929 I2C: 00:10 enabled
1015 20:58:15.961156 scan_static_bus for PCI: 00:15.1 done
1016 20:58:15.964792 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1017 20:58:15.967820 PCI: 00:15.2 scanning...
1018 20:58:15.971093 scan_static_bus for PCI: 00:15.2
1019 20:58:15.975042 scan_static_bus for PCI: 00:15.2 done
1020 20:58:15.981800 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1021 20:58:15.981893 PCI: 00:15.3 scanning...
1022 20:58:15.985565 scan_static_bus for PCI: 00:15.3
1023 20:58:15.991963 scan_static_bus for PCI: 00:15.3 done
1024 20:58:15.995003 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1025 20:58:15.998691 PCI: 00:19.1 scanning...
1026 20:58:16.001958 scan_static_bus for PCI: 00:19.1
1027 20:58:16.002050 I2C: 00:15 enabled
1028 20:58:16.008681 scan_static_bus for PCI: 00:19.1 done
1029 20:58:16.011875 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1030 20:58:16.015176 PCI: 00:1d.0 scanning...
1031 20:58:16.018320 do_pci_scan_bridge for PCI: 00:1d.0
1032 20:58:16.021460 PCI: pci_scan_bus for bus 01
1033 20:58:16.025414 PCI: 01:00.0 [1c5c/174a] enabled
1034 20:58:16.028397 GENERIC: 0.0 enabled
1035 20:58:16.031799 Enabling Common Clock Configuration
1036 20:58:16.034883 L1 Sub-State supported from root port 29
1037 20:58:16.038414 L1 Sub-State Support = 0xf
1038 20:58:16.041742 CommonModeRestoreTime = 0x28
1039 20:58:16.045086 Power On Value = 0x16, Power On Scale = 0x0
1040 20:58:16.048203 ASPM: Enabled L1
1041 20:58:16.051423 PCIe: Max_Payload_Size adjusted to 128
1042 20:58:16.054622 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1043 20:58:16.057986 PCI: 00:1e.2 scanning...
1044 20:58:16.061727 scan_generic_bus for PCI: 00:1e.2
1045 20:58:16.064564 SPI: 00 enabled
1046 20:58:16.068095 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1047 20:58:16.074927 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1048 20:58:16.078181 PCI: 00:1e.3 scanning...
1049 20:58:16.081406 scan_generic_bus for PCI: 00:1e.3
1050 20:58:16.081494 SPI: 00 enabled
1051 20:58:16.087859 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1052 20:58:16.091152 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1053 20:58:16.094350 PCI: 00:1f.0 scanning...
1054 20:58:16.097923 scan_static_bus for PCI: 00:1f.0
1055 20:58:16.101005 PNP: 0c09.0 enabled
1056 20:58:16.104418 PNP: 0c09.0 scanning...
1057 20:58:16.107696 scan_static_bus for PNP: 0c09.0
1058 20:58:16.111011 scan_static_bus for PNP: 0c09.0 done
1059 20:58:16.114122 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1060 20:58:16.117424 scan_static_bus for PCI: 00:1f.0 done
1061 20:58:16.124035 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1062 20:58:16.127362 PCI: 00:1f.2 scanning...
1063 20:58:16.131074 scan_static_bus for PCI: 00:1f.2
1064 20:58:16.131159 GENERIC: 0.0 enabled
1065 20:58:16.134111 GENERIC: 0.0 scanning...
1066 20:58:16.137416 scan_static_bus for GENERIC: 0.0
1067 20:58:16.140968 GENERIC: 0.0 enabled
1068 20:58:16.141054 GENERIC: 1.0 enabled
1069 20:58:16.147495 scan_static_bus for GENERIC: 0.0 done
1070 20:58:16.150682 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1071 20:58:16.154113 scan_static_bus for PCI: 00:1f.2 done
1072 20:58:16.160527 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1073 20:58:16.160621 PCI: 00:1f.3 scanning...
1074 20:58:16.164119 scan_static_bus for PCI: 00:1f.3
1075 20:58:16.170565 scan_static_bus for PCI: 00:1f.3 done
1076 20:58:16.173799 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1077 20:58:16.177400 PCI: 00:1f.5 scanning...
1078 20:58:16.180715 scan_generic_bus for PCI: 00:1f.5
1079 20:58:16.184022 scan_generic_bus for PCI: 00:1f.5 done
1080 20:58:16.187193 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1081 20:58:16.190503
1082 20:58:16.193811 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1083 20:58:16.197306 scan_static_bus for Root Device done
1084 20:58:16.203521 scan_bus: bus Root Device finished in 737 msecs
1085 20:58:16.203689 done
1086 20:58:16.210177 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1087 20:58:16.213374 Chrome EC: UHEPI supported
1088 20:58:16.219971 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1089 20:58:16.227183 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1090 20:58:16.230025 SPI flash protection: WPSW=0 SRP0=0
1091 20:58:16.233905 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1092 20:58:16.239952 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1093 20:58:16.243452 found VGA at PCI: 00:02.0
1094 20:58:16.246883 Setting up VGA for PCI: 00:02.0
1095 20:58:16.250128 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1096 20:58:16.257026 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1097 20:58:16.259791 Allocating resources...
1098 20:58:16.259901 Reading resources...
1099 20:58:16.263435 Root Device read_resources bus 0 link: 0
1100 20:58:16.269850 DOMAIN: 0000 read_resources bus 0 link: 0
1101 20:58:16.273273 PCI: 00:04.0 read_resources bus 1 link: 0
1102 20:58:16.280128 PCI: 00:04.0 read_resources bus 1 link: 0 done
1103 20:58:16.283381 PCI: 00:0d.0 read_resources bus 0 link: 0
1104 20:58:16.289970 USB0 port 0 read_resources bus 0 link: 0
1105 20:58:16.293204 USB0 port 0 read_resources bus 0 link: 0 done
1106 20:58:16.299877 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1107 20:58:16.302911 PCI: 00:14.0 read_resources bus 0 link: 0
1108 20:58:16.306156 USB0 port 0 read_resources bus 0 link: 0
1109 20:58:16.313854 USB0 port 0 read_resources bus 0 link: 0 done
1110 20:58:16.317156 PCI: 00:14.0 read_resources bus 0 link: 0 done
1111 20:58:16.324303 PCI: 00:14.3 read_resources bus 0 link: 0
1112 20:58:16.327312 PCI: 00:14.3 read_resources bus 0 link: 0 done
1113 20:58:16.333862 PCI: 00:15.0 read_resources bus 0 link: 0
1114 20:58:16.337174 PCI: 00:15.0 read_resources bus 0 link: 0 done
1115 20:58:16.343984 PCI: 00:15.1 read_resources bus 0 link: 0
1116 20:58:16.347143 PCI: 00:15.1 read_resources bus 0 link: 0 done
1117 20:58:16.354611 PCI: 00:19.1 read_resources bus 0 link: 0
1118 20:58:16.357735 PCI: 00:19.1 read_resources bus 0 link: 0 done
1119 20:58:16.364306 PCI: 00:1d.0 read_resources bus 1 link: 0
1120 20:58:16.367444 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1121 20:58:16.374320 PCI: 00:1e.2 read_resources bus 2 link: 0
1122 20:58:16.377994 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1123 20:58:16.384451 PCI: 00:1e.3 read_resources bus 3 link: 0
1124 20:58:16.387634 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1125 20:58:16.394144 PCI: 00:1f.0 read_resources bus 0 link: 0
1126 20:58:16.397418 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1127 20:58:16.404107 PCI: 00:1f.2 read_resources bus 0 link: 0
1128 20:58:16.407147 GENERIC: 0.0 read_resources bus 0 link: 0
1129 20:58:16.413841 GENERIC: 0.0 read_resources bus 0 link: 0 done
1130 20:58:16.417162 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1131 20:58:16.423688 DOMAIN: 0000 read_resources bus 0 link: 0 done
1132 20:58:16.427388 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1133 20:58:16.433752 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1134 20:58:16.437195 Root Device read_resources bus 0 link: 0 done
1135 20:58:16.440386 Done reading resources.
1136 20:58:16.447072 Show resources in subtree (Root Device)...After reading.
1137 20:58:16.450229 Root Device child on link 0 DOMAIN: 0000
1138 20:58:16.453595 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1139 20:58:16.463681 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1140 20:58:16.473248 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1141 20:58:16.473369 PCI: 00:00.0
1142 20:58:16.483275 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1143 20:58:16.493190 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1144 20:58:16.503303 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1145 20:58:16.513102 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1146 20:58:16.523233 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1147 20:58:16.533227 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1148 20:58:16.539953 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1149 20:58:16.549924 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1150 20:58:16.559489 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1151 20:58:16.569631 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1152 20:58:16.579364 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1153 20:58:16.586236 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1154 20:58:16.589466
1155 20:58:16.595965 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1156 20:58:16.606134 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1157 20:58:16.616194 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1158 20:58:16.626053 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1159 20:58:16.635975 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1160 20:58:16.646096 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1161 20:58:16.652587 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1162 20:58:16.662252 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1163 20:58:16.665871 PCI: 00:02.0
1164 20:58:16.675961 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1165 20:58:16.685797 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1166 20:58:16.695469 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1167 20:58:16.698850 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1168 20:58:16.709035 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1169 20:58:16.709196 GENERIC: 0.0
1170 20:58:16.712129 PCI: 00:05.0
1171 20:58:16.721995 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1172 20:58:16.725801 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1173 20:58:16.729072 GENERIC: 0.0
1174 20:58:16.729198 PCI: 00:08.0
1175 20:58:16.738871 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 20:58:16.742003 PCI: 00:0a.0
1177 20:58:16.745203 PCI: 00:0d.0 child on link 0 USB0 port 0
1178 20:58:16.755276 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1179 20:58:16.762177 USB0 port 0 child on link 0 USB3 port 0
1180 20:58:16.762358 USB3 port 0
1181 20:58:16.765391 USB3 port 1
1182 20:58:16.765520 USB3 port 2
1183 20:58:16.768742 USB3 port 3
1184 20:58:16.772326 PCI: 00:14.0 child on link 0 USB0 port 0
1185 20:58:16.781761 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1186 20:58:16.785544 USB0 port 0 child on link 0 USB2 port 0
1187 20:58:16.788387 USB2 port 0
1188 20:58:16.788522 USB2 port 1
1189 20:58:16.791850
1190 20:58:16.791980 USB2 port 2
1191 20:58:16.795070 USB2 port 3
1192 20:58:16.795193 USB2 port 4
1193 20:58:16.798351 USB2 port 5
1194 20:58:16.798472 USB2 port 6
1195 20:58:16.801675 USB2 port 7
1196 20:58:16.801781 USB2 port 8
1197 20:58:16.805043 USB2 port 9
1198 20:58:16.805153 USB3 port 0
1199 20:58:16.808570 USB3 port 1
1200 20:58:16.808675 USB3 port 2
1201 20:58:16.811872 USB3 port 3
1202 20:58:16.811981 PCI: 00:14.2
1203 20:58:16.821939 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 20:58:16.831783 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1205 20:58:16.838142 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1206 20:58:16.848233 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1207 20:58:16.848354 GENERIC: 0.0
1208 20:58:16.854843 PCI: 00:15.0 child on link 0 I2C: 00:1a
1209 20:58:16.864639 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 20:58:16.864779 I2C: 00:1a
1211 20:58:16.867783 I2C: 00:31
1212 20:58:16.867867 I2C: 00:32
1213 20:58:16.871484 PCI: 00:15.1 child on link 0 I2C: 00:10
1214 20:58:16.881146 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 20:58:16.884289 I2C: 00:10
1216 20:58:16.884381 PCI: 00:15.2
1217 20:58:16.894130 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 20:58:16.897528 PCI: 00:15.3
1219 20:58:16.907933 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 20:58:16.908071 PCI: 00:16.0
1221 20:58:16.917592 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 20:58:16.920978 PCI: 00:19.0
1223 20:58:16.924147 PCI: 00:19.1 child on link 0 I2C: 00:15
1224 20:58:16.934426 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 20:58:16.937698 I2C: 00:15
1226 20:58:16.941005 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1227 20:58:16.950437 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1228 20:58:16.960762 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1229 20:58:16.967158 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1230 20:58:16.970424 GENERIC: 0.0
1231 20:58:16.970554 PCI: 01:00.0
1232 20:58:16.980864 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 20:58:16.983681
1234 20:58:16.990146 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1235 20:58:17.000498 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1236 20:58:17.003784 PCI: 00:1e.0
1237 20:58:17.013666 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1238 20:58:17.016885 PCI: 00:1e.2 child on link 0 SPI: 00
1239 20:58:17.026543 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 20:58:17.029941 SPI: 00
1241 20:58:17.033613 PCI: 00:1e.3 child on link 0 SPI: 00
1242 20:58:17.043084 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 20:58:17.043223 SPI: 00
1244 20:58:17.046411 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1245 20:58:17.049733
1246 20:58:17.056623 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1247 20:58:17.059649 PNP: 0c09.0
1248 20:58:17.066227 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1249 20:58:17.073111 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1250 20:58:17.083189 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1251 20:58:17.089596 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1252 20:58:17.096018 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1253 20:58:17.096122 GENERIC: 0.0
1254 20:58:17.099728 GENERIC: 1.0
1255 20:58:17.099818 PCI: 00:1f.3
1256 20:58:17.109110 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1257 20:58:17.119166 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1258 20:58:17.122319 PCI: 00:1f.5
1259 20:58:17.132093 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1260 20:58:17.135904 CPU_CLUSTER: 0 child on link 0 APIC: 00
1261 20:58:17.136044 APIC: 00
1262 20:58:17.139064 APIC: 01
1263 20:58:17.139181 APIC: 03
1264 20:58:17.139277 APIC: 05
1265 20:58:17.142406
1266 20:58:17.142534 APIC: 07
1267 20:58:17.142642 APIC: 06
1268 20:58:17.145597 APIC: 02
1269 20:58:17.145724 APIC: 04
1270 20:58:17.152191 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1271 20:58:17.158697 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1272 20:58:17.165676 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1273 20:58:17.172136 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1274 20:58:17.175234 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1275 20:58:17.178495 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1276 20:58:17.185576 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1277 20:58:17.192101 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1278 20:58:17.198586 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1279 20:58:17.205060 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1280 20:58:17.211826 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1281 20:58:17.214999
1282 20:58:17.218401 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 20:58:17.228375 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 20:58:17.235090 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 20:58:17.241454 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 20:58:17.244655 DOMAIN: 0000: Resource ranges:
1287 20:58:17.248494 * Base: 1000, Size: 800, Tag: 100
1288 20:58:17.251279 * Base: 1900, Size: e700, Tag: 100
1289 20:58:17.258314 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 20:58:17.264980 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 20:58:17.271383 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 20:58:17.277939 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 20:58:17.287970 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 20:58:17.294513 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 20:58:17.301248 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 20:58:17.310880 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 20:58:17.317651 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 20:58:17.324331 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 20:58:17.334432 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 20:58:17.340960 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 20:58:17.347607 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 20:58:17.357415 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 20:58:17.363814 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 20:58:17.370565 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 20:58:17.380951 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 20:58:17.387271 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 20:58:17.393843 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 20:58:17.403535 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 20:58:17.410139 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 20:58:17.416899 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 20:58:17.426925 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 20:58:17.433297 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 20:58:17.440368 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 20:58:17.443635 DOMAIN: 0000: Resource ranges:
1315 20:58:17.449771 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 20:58:17.453350 * Base: d0000000, Size: 28000000, Tag: 200
1317 20:58:17.456626 * Base: fa000000, Size: 1000000, Tag: 200
1318 20:58:17.463149 * Base: fb001000, Size: 2fff000, Tag: 200
1319 20:58:17.466715 * Base: fe010000, Size: 2e000, Tag: 200
1320 20:58:17.469772 * Base: fe03f000, Size: d41000, Tag: 200
1321 20:58:17.472998 * Base: fed88000, Size: 8000, Tag: 200
1322 20:58:17.476798 * Base: fed93000, Size: d000, Tag: 200
1323 20:58:17.479840
1324 20:58:17.483057 * Base: feda2000, Size: 1e000, Tag: 200
1325 20:58:17.486341 * Base: fede0000, Size: 1220000, Tag: 200
1326 20:58:17.493304 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1327 20:58:17.499392 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1328 20:58:17.506566 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1329 20:58:17.512914 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1330 20:58:17.519419 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1331 20:58:17.525825 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1332 20:58:17.532868 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1333 20:58:17.539358 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1334 20:58:17.546020 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1335 20:58:17.552465 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1336 20:58:17.559003 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1337 20:58:17.565853 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1338 20:58:17.572173 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1339 20:58:17.579223 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1340 20:58:17.585710 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1341 20:58:17.592090 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1342 20:58:17.599004 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1343 20:58:17.605342 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1344 20:58:17.611887 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1345 20:58:17.618475 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1346 20:58:17.625582 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1347 20:58:17.632084 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1348 20:58:17.638656 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1349 20:58:17.645219 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1350 20:58:17.651906 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1351 20:58:17.655019 PCI: 00:1d.0: Resource ranges:
1352 20:58:17.661550 * Base: 7fc00000, Size: 100000, Tag: 200
1353 20:58:17.668026 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1354 20:58:17.674625 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1355 20:58:17.681633 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1356 20:58:17.688177 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1357 20:58:17.695093 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1358 20:58:17.701163 Root Device assign_resources, bus 0 link: 0
1359 20:58:17.704867 DOMAIN: 0000 assign_resources, bus 0 link: 0
1360 20:58:17.714564 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1361 20:58:17.721149 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1362 20:58:17.731286 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1363 20:58:17.737655 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1364 20:58:17.740862 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 20:58:17.747442 PCI: 00:04.0 assign_resources, bus 1 link: 0
1366 20:58:17.754070 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1367 20:58:17.764391 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1368 20:58:17.771043 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1369 20:58:17.777324 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 20:58:17.781059 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1371 20:58:17.791120 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1372 20:58:17.793832 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 20:58:17.797357 PCI: 00:14.0 assign_resources, bus 0 link: 0
1374 20:58:17.807022 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1375 20:58:17.813716 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1376 20:58:17.823659 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1377 20:58:17.827020 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 20:58:17.833430 PCI: 00:14.3 assign_resources, bus 0 link: 0
1379 20:58:17.839992 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1380 20:58:17.843362 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 20:58:17.850375 PCI: 00:15.0 assign_resources, bus 0 link: 0
1382 20:58:17.856898 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1383 20:58:17.863436 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 20:58:17.866767 PCI: 00:15.1 assign_resources, bus 0 link: 0
1385 20:58:17.876969 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1386 20:58:17.883248 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1387 20:58:17.893487 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1388 20:58:17.900464 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1389 20:58:17.903279 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 20:58:17.910094 PCI: 00:19.1 assign_resources, bus 0 link: 0
1391 20:58:17.916905 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1392 20:58:17.926431 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1393 20:58:17.936774 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1394 20:58:17.940001 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1395 20:58:17.949845 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1396 20:58:17.956390 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1397 20:58:17.966691 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1398 20:58:17.969944 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 20:58:17.979732 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1400 20:58:17.983132 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 20:58:17.986339 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 20:58:17.995872 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1403 20:58:17.999626 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 20:58:18.006234 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 20:58:18.009328 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 20:58:18.015899 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 20:58:18.019473 LPC: Trying to open IO window from 800 size 1ff
1408 20:58:18.028823 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1409 20:58:18.035926 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1410 20:58:18.045388 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1411 20:58:18.048721 DOMAIN: 0000 assign_resources, bus 0 link: 0
1412 20:58:18.051948 Root Device assign_resources, bus 0 link: 0
1413 20:58:18.055127 Done setting resources.
1414 20:58:18.061753 Show resources in subtree (Root Device)...After assigning values.
1415 20:58:18.065516 Root Device child on link 0 DOMAIN: 0000
1416 20:58:18.072042 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1417 20:58:18.078385 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1418 20:58:18.088487 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1419 20:58:18.091647 PCI: 00:00.0
1420 20:58:18.101996 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1421 20:58:18.111515 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1422 20:58:18.121551 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1423 20:58:18.128175 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1424 20:58:18.138359 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1425 20:58:18.148710 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1426 20:58:18.157988 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1427 20:58:18.168168 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1428 20:58:18.175036 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1429 20:58:18.177835
1430 20:58:18.184711 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 20:58:18.194797 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 20:58:18.205056 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 20:58:18.214450 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 20:58:18.221249 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 20:58:18.231261 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 20:58:18.240866 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 20:58:18.250997 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 20:58:18.260940 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 20:58:18.270804 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 20:58:18.281274 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 20:58:18.281400 PCI: 00:02.0
1442 20:58:18.290870 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 20:58:18.304079 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 20:58:18.310654 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 20:58:18.317524 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 20:58:18.327138 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 20:58:18.327291 GENERIC: 0.0
1448 20:58:18.330517 PCI: 00:05.0
1449 20:58:18.340493 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 20:58:18.347054 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 20:58:18.347211 GENERIC: 0.0
1452 20:58:18.350920 PCI: 00:08.0
1453 20:58:18.360875 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 20:58:18.361019 PCI: 00:0a.0
1455 20:58:18.367073 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 20:58:18.376820 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 20:58:18.380475 USB0 port 0 child on link 0 USB3 port 0
1458 20:58:18.383460 USB3 port 0
1459 20:58:18.383554 USB3 port 1
1460 20:58:18.386624 USB3 port 2
1461 20:58:18.386715 USB3 port 3
1462 20:58:18.393537 PCI: 00:14.0 child on link 0 USB0 port 0
1463 20:58:18.403308 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 20:58:18.406586 USB0 port 0 child on link 0 USB2 port 0
1465 20:58:18.410053 USB2 port 0
1466 20:58:18.410147 USB2 port 1
1467 20:58:18.413906 USB2 port 2
1468 20:58:18.413994 USB2 port 3
1469 20:58:18.416524 USB2 port 4
1470 20:58:18.416612 USB2 port 5
1471 20:58:18.419834 USB2 port 6
1472 20:58:18.419922 USB2 port 7
1473 20:58:18.423179 USB2 port 8
1474 20:58:18.423265 USB2 port 9
1475 20:58:18.426853 USB3 port 0
1476 20:58:18.426943 USB3 port 1
1477 20:58:18.430113 USB3 port 2
1478 20:58:18.430202 USB3 port 3
1479 20:58:18.433471 PCI: 00:14.2
1480 20:58:18.443386 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 20:58:18.452862 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 20:58:18.459875 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 20:58:18.469255 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 20:58:18.469405 GENERIC: 0.0
1485 20:58:18.476235 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 20:58:18.486100 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 20:58:18.486233 I2C: 00:1a
1488 20:58:18.489596 I2C: 00:31
1489 20:58:18.489709 I2C: 00:32
1490 20:58:18.492408 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 20:58:18.506152 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 20:58:18.506312 I2C: 00:10
1493 20:58:18.509454 PCI: 00:15.2
1494 20:58:18.519019 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 20:58:18.519138 PCI: 00:15.3
1496 20:58:18.528906 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 20:58:18.532248 PCI: 00:16.0
1498 20:58:18.542074 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 20:58:18.542232 PCI: 00:19.0
1500 20:58:18.548701 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 20:58:18.559293 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 20:58:18.559441 I2C: 00:15
1503 20:58:18.565326 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 20:58:18.571918 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 20:58:18.575626
1506 20:58:18.585312 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1507 20:58:18.594973 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1508 20:58:18.599159 GENERIC: 0.0
1509 20:58:18.599327 PCI: 01:00.0
1510 20:58:18.608526 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1511 20:58:18.621568 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1512 20:58:18.631480 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1513 20:58:18.631591 PCI: 00:1e.0
1514 20:58:18.645146 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 20:58:18.648245 PCI: 00:1e.2 child on link 0 SPI: 00
1516 20:58:18.658125 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 20:58:18.658278 SPI: 00
1518 20:58:18.661364 PCI: 00:1e.3 child on link 0 SPI: 00
1519 20:58:18.664634
1520 20:58:18.674805 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1521 20:58:18.674907 SPI: 00
1522 20:58:18.677993 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1523 20:58:18.687494 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1524 20:58:18.687594 PNP: 0c09.0
1525 20:58:18.697638 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1526 20:58:18.700953 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1527 20:58:18.704369
1528 20:58:18.710908 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1529 20:58:18.721007 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1530 20:58:18.724100 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1531 20:58:18.727288
1532 20:58:18.727389 GENERIC: 0.0
1533 20:58:18.730799 GENERIC: 1.0
1534 20:58:18.730910 PCI: 00:1f.3
1535 20:58:18.740793 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1536 20:58:18.750639 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1537 20:58:18.753701 PCI: 00:1f.5
1538 20:58:18.763887 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1539 20:58:18.767224 CPU_CLUSTER: 0 child on link 0 APIC: 00
1540 20:58:18.770464 APIC: 00
1541 20:58:18.770555 APIC: 01
1542 20:58:18.773692 APIC: 03
1543 20:58:18.773781 APIC: 05
1544 20:58:18.773851 APIC: 07
1545 20:58:18.777048 APIC: 06
1546 20:58:18.777130 APIC: 02
1547 20:58:18.777196 APIC: 04
1548 20:58:18.780263 Done allocating resources.
1549 20:58:18.787408 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1550 20:58:18.793648 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1551 20:58:18.796673 Configure GPIOs for I2S audio on UP4.
1552 20:58:18.803537 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1553 20:58:18.807213 Enabling resources...
1554 20:58:18.810519 PCI: 00:00.0 subsystem <- 8086/9a12
1555 20:58:18.813762 PCI: 00:00.0 cmd <- 06
1556 20:58:18.816892 PCI: 00:02.0 subsystem <- 8086/9a40
1557 20:58:18.820174 PCI: 00:02.0 cmd <- 03
1558 20:58:18.823477 PCI: 00:04.0 subsystem <- 8086/9a03
1559 20:58:18.826489 PCI: 00:04.0 cmd <- 02
1560 20:58:18.830435 PCI: 00:05.0 subsystem <- 8086/9a19
1561 20:58:18.830523 PCI: 00:05.0 cmd <- 02
1562 20:58:18.837020 PCI: 00:08.0 subsystem <- 8086/9a11
1563 20:58:18.837159 PCI: 00:08.0 cmd <- 06
1564 20:58:18.840176 PCI: 00:0d.0 subsystem <- 8086/9a13
1565 20:58:18.843430 PCI: 00:0d.0 cmd <- 02
1566 20:58:18.846800 PCI: 00:14.0 subsystem <- 8086/a0ed
1567 20:58:18.850115 PCI: 00:14.0 cmd <- 02
1568 20:58:18.853149 PCI: 00:14.2 subsystem <- 8086/a0ef
1569 20:58:18.856689 PCI: 00:14.2 cmd <- 02
1570 20:58:18.860017 PCI: 00:14.3 subsystem <- 8086/a0f0
1571 20:58:18.863256 PCI: 00:14.3 cmd <- 02
1572 20:58:18.866435 PCI: 00:15.0 subsystem <- 8086/a0e8
1573 20:58:18.869917 PCI: 00:15.0 cmd <- 02
1574 20:58:18.873011 PCI: 00:15.1 subsystem <- 8086/a0e9
1575 20:58:18.876334 PCI: 00:15.1 cmd <- 02
1576 20:58:18.879566 PCI: 00:15.2 subsystem <- 8086/a0ea
1577 20:58:18.879668 PCI: 00:15.2 cmd <- 02
1578 20:58:18.886551 PCI: 00:15.3 subsystem <- 8086/a0eb
1579 20:58:18.886670 PCI: 00:15.3 cmd <- 02
1580 20:58:18.889737 PCI: 00:16.0 subsystem <- 8086/a0e0
1581 20:58:18.892851 PCI: 00:16.0 cmd <- 02
1582 20:58:18.896085 PCI: 00:19.1 subsystem <- 8086/a0c6
1583 20:58:18.899801 PCI: 00:19.1 cmd <- 02
1584 20:58:18.902931 PCI: 00:1d.0 bridge ctrl <- 0013
1585 20:58:18.906158 PCI: 00:1d.0 subsystem <- 8086/a0b0
1586 20:58:18.909233 PCI: 00:1d.0 cmd <- 06
1587 20:58:18.912891 PCI: 00:1e.0 subsystem <- 8086/a0a8
1588 20:58:18.916305 PCI: 00:1e.0 cmd <- 06
1589 20:58:18.919284 PCI: 00:1e.2 subsystem <- 8086/a0aa
1590 20:58:18.922608 PCI: 00:1e.2 cmd <- 06
1591 20:58:18.925765 PCI: 00:1e.3 subsystem <- 8086/a0ab
1592 20:58:18.928979 PCI: 00:1e.3 cmd <- 02
1593 20:58:18.932183 PCI: 00:1f.0 subsystem <- 8086/a087
1594 20:58:18.935874 PCI: 00:1f.0 cmd <- 407
1595 20:58:18.939091 PCI: 00:1f.3 subsystem <- 8086/a0c8
1596 20:58:18.939200 PCI: 00:1f.3 cmd <- 02
1597 20:58:18.945617 PCI: 00:1f.5 subsystem <- 8086/a0a4
1598 20:58:18.945709 PCI: 00:1f.5 cmd <- 406
1599 20:58:18.951051 PCI: 01:00.0 cmd <- 02
1600 20:58:18.955817 done.
1601 20:58:18.958727 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1602 20:58:18.961900 Initializing devices...
1603 20:58:18.965398 Root Device init
1604 20:58:18.968531 Chrome EC: Set SMI mask to 0x0000000000000000
1605 20:58:18.975352 Chrome EC: clear events_b mask to 0x0000000000000000
1606 20:58:18.981656 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1607 20:58:18.985098 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1608 20:58:18.992076 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1609 20:58:18.998341 Chrome EC: Set WAKE mask to 0x0000000000000000
1610 20:58:19.002152 fw_config match found: DB_USB=USB3_ACTIVE
1611 20:58:19.008800 Configure Right Type-C port orientation for retimer
1612 20:58:19.011846 Root Device init finished in 43 msecs
1613 20:58:19.015070 PCI: 00:00.0 init
1614 20:58:19.018447 CPU TDP = 9 Watts
1615 20:58:19.018569 CPU PL1 = 9 Watts
1616 20:58:19.021500 CPU PL2 = 40 Watts
1617 20:58:19.021579 CPU PL4 = 83 Watts
1618 20:58:19.028078 PCI: 00:00.0 init finished in 8 msecs
1619 20:58:19.028177 PCI: 00:02.0 init
1620 20:58:19.031353 GMA: Found VBT in CBFS
1621 20:58:19.034648 GMA: Found valid VBT in CBFS
1622 20:58:19.041530 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1623 20:58:19.048107 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1624 20:58:19.051406 PCI: 00:02.0 init finished in 18 msecs
1625 20:58:19.054692 PCI: 00:05.0 init
1626 20:58:19.057805 PCI: 00:05.0 init finished in 0 msecs
1627 20:58:19.061431 PCI: 00:08.0 init
1628 20:58:19.064572 PCI: 00:08.0 init finished in 0 msecs
1629 20:58:19.067838 PCI: 00:14.0 init
1630 20:58:19.071256 PCI: 00:14.0 init finished in 0 msecs
1631 20:58:19.074418 PCI: 00:14.2 init
1632 20:58:19.077575 PCI: 00:14.2 init finished in 0 msecs
1633 20:58:19.077679 PCI: 00:15.0 init
1634 20:58:19.080956
1635 20:58:19.081074 I2C bus 0 version 0x3230302a
1636 20:58:19.084312 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1637 20:58:19.087361
1638 20:58:19.090715 PCI: 00:15.0 init finished in 6 msecs
1639 20:58:19.090824 PCI: 00:15.1 init
1640 20:58:19.093976 I2C bus 1 version 0x3230302a
1641 20:58:19.097650 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 20:58:19.101160 PCI: 00:15.1 init finished in 6 msecs
1643 20:58:19.104551 PCI: 00:15.2 init
1644 20:58:19.107727 I2C bus 2 version 0x3230302a
1645 20:58:19.110872 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 20:58:19.114084 PCI: 00:15.2 init finished in 6 msecs
1647 20:58:19.117341 PCI: 00:15.3 init
1648 20:58:19.121071 I2C bus 3 version 0x3230302a
1649 20:58:19.124086 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 20:58:19.127353 PCI: 00:15.3 init finished in 6 msecs
1651 20:58:19.130683 PCI: 00:16.0 init
1652 20:58:19.133815 PCI: 00:16.0 init finished in 0 msecs
1653 20:58:19.137543 PCI: 00:19.1 init
1654 20:58:19.137670 I2C bus 5 version 0x3230302a
1655 20:58:19.144075 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 20:58:19.147293 PCI: 00:19.1 init finished in 6 msecs
1657 20:58:19.147382 PCI: 00:1d.0 init
1658 20:58:19.150649 Initializing PCH PCIe bridge.
1659 20:58:19.153801 PCI: 00:1d.0 init finished in 3 msecs
1660 20:58:19.158147 PCI: 00:1f.0 init
1661 20:58:19.161705 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 20:58:19.168559 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 20:58:19.168661 IOAPIC: ID = 0x02
1664 20:58:19.171321 IOAPIC: Dumping registers
1665 20:58:19.174742 reg 0x0000: 0x02000000
1666 20:58:19.177976 reg 0x0001: 0x00770020
1667 20:58:19.178068 reg 0x0002: 0x00000000
1668 20:58:19.184532 PCI: 00:1f.0 init finished in 21 msecs
1669 20:58:19.184645 PCI: 00:1f.2 init
1670 20:58:19.187808 Disabling ACPI via APMC.
1671 20:58:19.192121 APMC done.
1672 20:58:19.195382 PCI: 00:1f.2 init finished in 5 msecs
1673 20:58:19.207569 PCI: 01:00.0 init
1674 20:58:19.210739 PCI: 01:00.0 init finished in 0 msecs
1675 20:58:19.213768 PNP: 0c09.0 init
1676 20:58:19.217515 Google Chrome EC uptime: 8.362 seconds
1677 20:58:19.223898 Google Chrome AP resets since EC boot: 1
1678 20:58:19.227526 Google Chrome most recent AP reset causes:
1679 20:58:19.230497 0.346: 32775 shutdown: entering G3
1680 20:58:19.237000 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 20:58:19.240974 PNP: 0c09.0 init finished in 22 msecs
1682 20:58:19.246448 Devices initialized
1683 20:58:19.249876 Show all devs... After init.
1684 20:58:19.253053 Root Device: enabled 1
1685 20:58:19.253178 DOMAIN: 0000: enabled 1
1686 20:58:19.256423 CPU_CLUSTER: 0: enabled 1
1687 20:58:19.259596 PCI: 00:00.0: enabled 1
1688 20:58:19.262650 PCI: 00:02.0: enabled 1
1689 20:58:19.262774 PCI: 00:04.0: enabled 1
1690 20:58:19.266233 PCI: 00:05.0: enabled 1
1691 20:58:19.269476 PCI: 00:06.0: enabled 0
1692 20:58:19.272892 PCI: 00:07.0: enabled 0
1693 20:58:19.273007 PCI: 00:07.1: enabled 0
1694 20:58:19.275994 PCI: 00:07.2: enabled 0
1695 20:58:19.279264 PCI: 00:07.3: enabled 0
1696 20:58:19.282608 PCI: 00:08.0: enabled 1
1697 20:58:19.282716 PCI: 00:09.0: enabled 0
1698 20:58:19.285852 PCI: 00:0a.0: enabled 0
1699 20:58:19.289565 PCI: 00:0d.0: enabled 1
1700 20:58:19.289693 PCI: 00:0d.1: enabled 0
1701 20:58:19.292699
1702 20:58:19.292821 PCI: 00:0d.2: enabled 0
1703 20:58:19.296060 PCI: 00:0d.3: enabled 0
1704 20:58:19.299200 PCI: 00:0e.0: enabled 0
1705 20:58:19.299305 PCI: 00:10.2: enabled 1
1706 20:58:19.302903 PCI: 00:10.6: enabled 0
1707 20:58:19.305839 PCI: 00:10.7: enabled 0
1708 20:58:19.309053 PCI: 00:12.0: enabled 0
1709 20:58:19.309142 PCI: 00:12.6: enabled 0
1710 20:58:19.312416 PCI: 00:13.0: enabled 0
1711 20:58:19.316037 PCI: 00:14.0: enabled 1
1712 20:58:19.319211 PCI: 00:14.1: enabled 0
1713 20:58:19.319301 PCI: 00:14.2: enabled 1
1714 20:58:19.322605 PCI: 00:14.3: enabled 1
1715 20:58:19.325714 PCI: 00:15.0: enabled 1
1716 20:58:19.329320 PCI: 00:15.1: enabled 1
1717 20:58:19.329410 PCI: 00:15.2: enabled 1
1718 20:58:19.332258 PCI: 00:15.3: enabled 1
1719 20:58:19.336015 PCI: 00:16.0: enabled 1
1720 20:58:19.336103 PCI: 00:16.1: enabled 0
1721 20:58:19.339361 PCI: 00:16.2: enabled 0
1722 20:58:19.342569 PCI: 00:16.3: enabled 0
1723 20:58:19.345733 PCI: 00:16.4: enabled 0
1724 20:58:19.345826 PCI: 00:16.5: enabled 0
1725 20:58:19.349074 PCI: 00:17.0: enabled 0
1726 20:58:19.352445 PCI: 00:19.0: enabled 0
1727 20:58:19.355820 PCI: 00:19.1: enabled 1
1728 20:58:19.355933 PCI: 00:19.2: enabled 0
1729 20:58:19.359112 PCI: 00:1c.0: enabled 1
1730 20:58:19.362779 PCI: 00:1c.1: enabled 0
1731 20:58:19.365879 PCI: 00:1c.2: enabled 0
1732 20:58:19.366003 PCI: 00:1c.3: enabled 0
1733 20:58:19.368919 PCI: 00:1c.4: enabled 0
1734 20:58:19.372149 PCI: 00:1c.5: enabled 0
1735 20:58:19.372244 PCI: 00:1c.6: enabled 1
1736 20:58:19.375643
1737 20:58:19.375728 PCI: 00:1c.7: enabled 0
1738 20:58:19.378823 PCI: 00:1d.0: enabled 1
1739 20:58:19.382565 PCI: 00:1d.1: enabled 0
1740 20:58:19.382655 PCI: 00:1d.2: enabled 1
1741 20:58:19.385940 PCI: 00:1d.3: enabled 0
1742 20:58:19.389166 PCI: 00:1e.0: enabled 1
1743 20:58:19.392548 PCI: 00:1e.1: enabled 0
1744 20:58:19.392642 PCI: 00:1e.2: enabled 1
1745 20:58:19.395841 PCI: 00:1e.3: enabled 1
1746 20:58:19.399349 PCI: 00:1f.0: enabled 1
1747 20:58:19.402340 PCI: 00:1f.1: enabled 0
1748 20:58:19.402443 PCI: 00:1f.2: enabled 1
1749 20:58:19.405565 PCI: 00:1f.3: enabled 1
1750 20:58:19.409193 PCI: 00:1f.4: enabled 0
1751 20:58:19.412388 PCI: 00:1f.5: enabled 1
1752 20:58:19.412480 PCI: 00:1f.6: enabled 0
1753 20:58:19.415654 PCI: 00:1f.7: enabled 0
1754 20:58:19.418701 APIC: 00: enabled 1
1755 20:58:19.418790 GENERIC: 0.0: enabled 1
1756 20:58:19.422456 GENERIC: 0.0: enabled 1
1757 20:58:19.425670 GENERIC: 1.0: enabled 1
1758 20:58:19.428708 GENERIC: 0.0: enabled 1
1759 20:58:19.428797 GENERIC: 1.0: enabled 1
1760 20:58:19.432021 USB0 port 0: enabled 1
1761 20:58:19.435700 GENERIC: 0.0: enabled 1
1762 20:58:19.435801 USB0 port 0: enabled 1
1763 20:58:19.438798 GENERIC: 0.0: enabled 1
1764 20:58:19.442026 I2C: 00:1a: enabled 1
1765 20:58:19.445829 I2C: 00:31: enabled 1
1766 20:58:19.445923 I2C: 00:32: enabled 1
1767 20:58:19.449112 I2C: 00:10: enabled 1
1768 20:58:19.451928 I2C: 00:15: enabled 1
1769 20:58:19.452012 GENERIC: 0.0: enabled 0
1770 20:58:19.455735 GENERIC: 1.0: enabled 0
1771 20:58:19.458919 GENERIC: 0.0: enabled 1
1772 20:58:19.459021 SPI: 00: enabled 1
1773 20:58:19.462289 SPI: 00: enabled 1
1774 20:58:19.465318 PNP: 0c09.0: enabled 1
1775 20:58:19.465420 GENERIC: 0.0: enabled 1
1776 20:58:19.468474 USB3 port 0: enabled 1
1777 20:58:19.471972 USB3 port 1: enabled 1
1778 20:58:19.472089 USB3 port 2: enabled 0
1779 20:58:19.475272
1780 20:58:19.475369 USB3 port 3: enabled 0
1781 20:58:19.478696 USB2 port 0: enabled 0
1782 20:58:19.481903 USB2 port 1: enabled 1
1783 20:58:19.482000 USB2 port 2: enabled 1
1784 20:58:19.485188 USB2 port 3: enabled 0
1785 20:58:19.488383 USB2 port 4: enabled 1
1786 20:58:19.488475 USB2 port 5: enabled 0
1787 20:58:19.491692 USB2 port 6: enabled 0
1788 20:58:19.495676 USB2 port 7: enabled 0
1789 20:58:19.498316 USB2 port 8: enabled 0
1790 20:58:19.498408 USB2 port 9: enabled 0
1791 20:58:19.501609 USB3 port 0: enabled 0
1792 20:58:19.505335 USB3 port 1: enabled 1
1793 20:58:19.505474 USB3 port 2: enabled 0
1794 20:58:19.508493 USB3 port 3: enabled 0
1795 20:58:19.512032 GENERIC: 0.0: enabled 1
1796 20:58:19.515406 GENERIC: 1.0: enabled 1
1797 20:58:19.515526 APIC: 01: enabled 1
1798 20:58:19.518508 APIC: 03: enabled 1
1799 20:58:19.518629 APIC: 05: enabled 1
1800 20:58:19.521785 APIC: 07: enabled 1
1801 20:58:19.524997 APIC: 06: enabled 1
1802 20:58:19.525120 APIC: 02: enabled 1
1803 20:58:19.528206 APIC: 04: enabled 1
1804 20:58:19.531688 PCI: 01:00.0: enabled 1
1805 20:58:19.534714 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1806 20:58:19.541818 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1807 20:58:19.545102 ELOG: NV offset 0xf30000 size 0x1000
1808 20:58:19.551344 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1809 20:58:19.557962 ELOG: Event(17) added with size 13 at 2022-12-01 20:58:17 UTC
1810 20:58:19.564390 ELOG: Event(92) added with size 9 at 2022-12-01 20:58:17 UTC
1811 20:58:19.571604 ELOG: Event(93) added with size 9 at 2022-12-01 20:58:17 UTC
1812 20:58:19.577874 ELOG: Event(9E) added with size 10 at 2022-12-01 20:58:17 UTC
1813 20:58:19.584490 ELOG: Event(9F) added with size 14 at 2022-12-01 20:58:17 UTC
1814 20:58:19.591071 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1815 20:58:19.597478 ELOG: Event(A1) added with size 10 at 2022-12-01 20:58:17 UTC
1816 20:58:19.604487 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1817 20:58:19.610915 ELOG: Event(A0) added with size 9 at 2022-12-01 20:58:17 UTC
1818 20:58:19.614105 elog_add_boot_reason: Logged dev mode boot
1819 20:58:19.620589 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1820 20:58:19.620759 Finalize devices...
1821 20:58:19.624388 Devices finalized
1822 20:58:19.630796 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1823 20:58:19.633929 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1824 20:58:19.640656 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1825 20:58:19.644224 ME: HFSTS1 : 0x80030055
1826 20:58:19.650632 ME: HFSTS2 : 0x30280116
1827 20:58:19.653874 ME: HFSTS3 : 0x00000050
1828 20:58:19.657249 ME: HFSTS4 : 0x00004000
1829 20:58:19.663980 ME: HFSTS5 : 0x00000000
1830 20:58:19.667184 ME: HFSTS6 : 0x00400006
1831 20:58:19.670452 ME: Manufacturing Mode : YES
1832 20:58:19.673991 ME: SPI Protection Mode Enabled : NO
1833 20:58:19.676986 ME: FW Partition Table : OK
1834 20:58:19.680434
1835 20:58:19.683588 ME: Bringup Loader Failure : NO
1836 20:58:19.686852 ME: Firmware Init Complete : NO
1837 20:58:19.690097 ME: Boot Options Present : NO
1838 20:58:19.693379 ME: Update In Progress : NO
1839 20:58:19.696716 ME: D0i3 Support : YES
1840 20:58:19.700359 ME: Low Power State Enabled : NO
1841 20:58:19.703707 ME: CPU Replaced : YES
1842 20:58:19.710233 ME: CPU Replacement Valid : YES
1843 20:58:19.713365 ME: Current Working State : 5
1844 20:58:19.716857 ME: Current Operation State : 1
1845 20:58:19.720166 ME: Current Operation Mode : 3
1846 20:58:19.723424 ME: Error Code : 0
1847 20:58:19.726638 ME: Enhanced Debug Mode : NO
1848 20:58:19.729870 ME: CPU Debug Disabled : YES
1849 20:58:19.733237 ME: TXT Support : NO
1850 20:58:19.740011 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 20:58:19.746424 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 20:58:19.749667 CBFS: 'fallback/slic' not found.
1853 20:58:19.756396 ACPI: Writing ACPI tables at 76b01000.
1854 20:58:19.756541 ACPI: * FACS
1855 20:58:19.759669 ACPI: * DSDT
1856 20:58:19.762936 Ramoops buffer: 0x100000@0x76a00000.
1857 20:58:19.766236 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 20:58:19.773021 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 20:58:19.776024 Google Chrome EC: version:
1860 20:58:19.779390 ro: voema_v2.0.7540-147f8d37d1
1861 20:58:19.783106 rw: voema_v2.0.7540-147f8d37d1
1862 20:58:19.786362 running image: 2
1863 20:58:19.789525 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 20:58:19.792841
1865 20:58:19.795953 ACPI: * FADT
1866 20:58:19.796069 SCI is IRQ9
1867 20:58:19.799239 ACPI: added table 1/32, length now 40
1868 20:58:19.802426 ACPI: * SSDT
1869 20:58:19.806364 Found 1 CPU(s) with 8 core(s) each.
1870 20:58:19.809470 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1871 20:58:19.812545 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1872 20:58:19.819329 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1873 20:58:19.822538 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1874 20:58:19.829351 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1875 20:58:19.832527 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1876 20:58:19.838951 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1877 20:58:19.842172 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1878 20:58:19.852420 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1879 20:58:19.855334 \_SB.PCI0.RP09: Added StorageD3Enable property
1880 20:58:19.858740 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1881 20:58:19.865674 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1882 20:58:19.868614 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1883 20:58:19.872392 PS2K: Passing 80 keymaps to kernel
1884 20:58:19.878504 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1885 20:58:19.885092 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1886 20:58:19.892060 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1887 20:58:19.898792 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1888 20:58:19.905149 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1889 20:58:19.911711 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1890 20:58:19.918348 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1891 20:58:19.925074 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1892 20:58:19.928341 ACPI: added table 2/32, length now 44
1893 20:58:19.931409 ACPI: * MCFG
1894 20:58:19.935150 ACPI: added table 3/32, length now 48
1895 20:58:19.938464 ACPI: * TPM2
1896 20:58:19.941544 TPM2 log created at 0x769f0000
1897 20:58:19.944802 ACPI: added table 4/32, length now 52
1898 20:58:19.944890 ACPI: * MADT
1899 20:58:19.948341 SCI is IRQ9
1900 20:58:19.951559 ACPI: added table 5/32, length now 56
1901 20:58:19.951688 current = 76b09850
1902 20:58:19.954848 ACPI: * DMAR
1903 20:58:19.958387 ACPI: added table 6/32, length now 60
1904 20:58:19.961657 ACPI: added table 7/32, length now 64
1905 20:58:19.964924 ACPI: * HPET
1906 20:58:19.967823 ACPI: added table 8/32, length now 68
1907 20:58:19.967906 ACPI: done.
1908 20:58:19.971623 ACPI tables: 35216 bytes.
1909 20:58:19.974834 smbios_write_tables: 769ef000
1910 20:58:19.977906 EC returned error result code 3
1911 20:58:19.981133 Couldn't obtain OEM name from CBI
1912 20:58:19.984909 Create SMBIOS type 16
1913 20:58:19.988165 Create SMBIOS type 17
1914 20:58:19.991436 GENERIC: 0.0 (WIFI Device)
1915 20:58:19.994926 SMBIOS tables: 1750 bytes.
1916 20:58:19.998119 Writing table forward entry at 0x00000500
1917 20:58:20.004519 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 20:58:20.008044 Writing coreboot table at 0x76b25000
1919 20:58:20.014560 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 20:58:20.017882 1. 0000000000001000-000000000009ffff: RAM
1921 20:58:20.021101 2. 00000000000a0000-00000000000fffff: RESERVED
1922 20:58:20.028003 3. 0000000000100000-00000000769eefff: RAM
1923 20:58:20.031033 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 20:58:20.038078 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 20:58:20.044217 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 20:58:20.047678 7. 0000000077000000-000000007fbfffff: RESERVED
1927 20:58:20.054554 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 20:58:20.057898 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 20:58:20.060920 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 20:58:20.067680 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 20:58:20.070887 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 20:58:20.077328 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 20:58:20.081095 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 20:58:20.087296 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 20:58:20.090646 16. 0000000100000000-00000002803fffff: RAM
1936 20:58:20.093901 Passing 4 GPIOs to payload:
1937 20:58:20.097237 NAME | PORT | POLARITY | VALUE
1938 20:58:20.103741 lid | undefined | high | high
1939 20:58:20.110339 power | undefined | high | low
1940 20:58:20.113820 oprom | undefined | high | low
1941 20:58:20.120202 EC in RW | 0x000000e5 | high | high
1942 20:58:20.126848 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5958
1943 20:58:20.130419 coreboot table: 1576 bytes.
1944 20:58:20.133553 IMD ROOT 0. 0x76fff000 0x00001000
1945 20:58:20.136586 IMD SMALL 1. 0x76ffe000 0x00001000
1946 20:58:20.139877 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 20:58:20.143704 VPD 3. 0x76c4d000 0x00000367
1948 20:58:20.146761 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 20:58:20.149943 CONSOLE 5. 0x76c2c000 0x00020000
1950 20:58:20.156538 FMAP 6. 0x76c2b000 0x00000578
1951 20:58:20.160101 TIME STAMP 7. 0x76c2a000 0x00000910
1952 20:58:20.163188 VBOOT WORK 8. 0x76c16000 0x00014000
1953 20:58:20.166621 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 20:58:20.170088 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 20:58:20.173405 RAMSTAGE 11. 0x76b97000 0x00073000
1956 20:58:20.176213 REFCODE 12. 0x76b42000 0x00055000
1957 20:58:20.180079 SMM BACKUP 13. 0x76b32000 0x00010000
1958 20:58:20.186143 4f444749 14. 0x76b30000 0x00002000
1959 20:58:20.189447 EXT VBT15. 0x76b2d000 0x0000219f
1960 20:58:20.193306 COREBOOT 16. 0x76b25000 0x00008000
1961 20:58:20.196464 ACPI 17. 0x76b01000 0x00024000
1962 20:58:20.199435 ACPI GNVS 18. 0x76b00000 0x00001000
1963 20:58:20.203232 RAMOOPS 19. 0x76a00000 0x00100000
1964 20:58:20.206382 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 20:58:20.209647 SMBIOS 21. 0x769ef000 0x00000800
1966 20:58:20.212816 IMD small region:
1967 20:58:20.215983 IMD ROOT 0. 0x76ffec00 0x00000400
1968 20:58:20.219174 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 20:58:20.223047 POWER STATE 2. 0x76ffeb80 0x00000044
1970 20:58:20.229393 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 20:58:20.232623 MEM INFO 4. 0x76ffe980 0x000001e0
1972 20:58:20.239414 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1973 20:58:20.242557 MTRR: Physical address space:
1974 20:58:20.245861 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 20:58:20.252395 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 20:58:20.259490 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 20:58:20.265570 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 20:58:20.272179 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 20:58:20.279018 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 20:58:20.285503 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 20:58:20.289026 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 20:58:20.292358 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 20:58:20.295372 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 20:58:20.302025 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 20:58:20.305259 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 20:58:20.308586 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 20:58:20.312381 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 20:58:20.318753 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 20:58:20.321851 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 20:58:20.325292 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 20:58:20.328527 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 20:58:20.332910 call enable_fixed_mtrr()
1993 20:58:20.336066 CPU physical address size: 39 bits
1994 20:58:20.342917 MTRR: default type WB/UC MTRR counts: 6/6.
1995 20:58:20.346268 MTRR: UC selected as default type.
1996 20:58:20.352863 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1997 20:58:20.356116 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1998 20:58:20.362804 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1999 20:58:20.369502 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2000 20:58:20.376154 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2001 20:58:20.382878 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2002 20:58:20.382978
2003 20:58:20.386057 MTRR check
2004 20:58:20.389249 Fixed MTRRs : Enabled
2005 20:58:20.389337 Variable MTRRs: Enabled
2006 20:58:20.389403
2007 20:58:20.395852 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 20:58:20.399262 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 20:58:20.402525 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 20:58:20.405832 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 20:58:20.409187 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 20:58:20.412533
2013 20:58:20.415953 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 20:58:20.419163 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 20:58:20.422632 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 20:58:20.425897 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 20:58:20.432217 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 20:58:20.435541 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 20:58:20.438748 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 20:58:20.442496 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 20:58:20.449055 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 20:58:20.452253 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 20:58:20.455597 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 20:58:20.458816 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 20:58:20.465825 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 20:58:20.469032 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 20:58:20.472396 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 20:58:20.475156 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 20:58:20.478553 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 20:58:20.482363
2031 20:58:20.485142 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 20:58:20.488855 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 20:58:20.492017 call enable_fixed_mtrr()
2034 20:58:20.495373 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 20:58:20.502111 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 20:58:20.505396 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 20:58:20.508816 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 20:58:20.512222 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 20:58:20.515516 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 20:58:20.518748
2041 20:58:20.521823 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 20:58:20.525263 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 20:58:20.528447 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 20:58:20.532074 CPU physical address size: 39 bits
2045 20:58:20.538462 call enable_fixed_mtrr()
2046 20:58:20.542195 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 20:58:20.545008 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 20:58:20.548274 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 20:58:20.555335 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 20:58:20.558138 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 20:58:20.561958 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 20:58:20.565372 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 20:58:20.571817 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 20:58:20.575104 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 20:58:20.578490 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 20:58:20.581217 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 20:58:20.584622 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 20:58:20.588008
2059 20:58:20.591742 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 20:58:20.595012 call enable_fixed_mtrr()
2061 20:58:20.598367 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 20:58:20.601507 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 20:58:20.607813 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 20:58:20.611050 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 20:58:20.614353 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 20:58:20.618009 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 20:58:20.624129 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 20:58:20.627379 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 20:58:20.631424 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 20:58:20.634562 CPU physical address size: 39 bits
2071 20:58:20.638500 call enable_fixed_mtrr()
2072 20:58:20.645408 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2073 20:58:20.648557 call enable_fixed_mtrr()
2074 20:58:20.651765 Checking cr50 for pending updates
2075 20:58:20.656189 CPU physical address size: 39 bits
2076 20:58:20.659557 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 20:58:20.662804 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 20:58:20.665943 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 20:58:20.669308 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 20:58:20.676087 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 20:58:20.679394 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 20:58:20.682767 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 20:58:20.686179 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 20:58:20.692623 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 20:58:20.695887 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 20:58:20.699078 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 20:58:20.702962 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 20:58:20.709971 MTRR: Fixed MSR 0x258 0x0606060606060606
2089 20:58:20.710058 call enable_fixed_mtrr()
2090 20:58:20.716689 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 20:58:20.719877 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 20:58:20.723674 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 20:58:20.726647 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 20:58:20.733587 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 20:58:20.736701 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 20:58:20.739968 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 20:58:20.743161 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 20:58:20.749475 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 20:58:20.752992 CPU physical address size: 39 bits
2100 20:58:20.756281 call enable_fixed_mtrr()
2101 20:58:20.759522 CPU physical address size: 39 bits
2102 20:58:20.762788 Reading cr50 TPM mode
2103 20:58:20.766613 CPU physical address size: 39 bits
2104 20:58:20.769631 CPU physical address size: 39 bits
2105 20:58:20.776108 BS: BS_PAYLOAD_LOAD entry times (exec / console): 116 / 6 ms
2106 20:58:20.782698 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2107 20:58:20.786054 Checking segment from ROM address 0xffc02b38
2108 20:58:20.792598 Checking segment from ROM address 0xffc02b54
2109 20:58:20.796415 Loading segment from ROM address 0xffc02b38
2110 20:58:20.799699 code (compression=0)
2111 20:58:20.806331 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2112 20:58:20.815707 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2113 20:58:20.819090 it's not compressed!
2114 20:58:20.956869 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2115 20:58:20.963454 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2116 20:58:20.970130 Loading segment from ROM address 0xffc02b54
2117 20:58:20.970259 Entry Point 0x30000000
2118 20:58:20.973271
2119 20:58:20.973389 Loaded segments
2120 20:58:20.979832 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2121 20:58:21.022989 Finalizing chipset.
2122 20:58:21.026210 Finalizing SMM.
2123 20:58:21.026337 APMC done.
2124 20:58:21.033194 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2125 20:58:21.036281 mp_park_aps done after 0 msecs.
2126 20:58:21.039600 Jumping to boot code at 0x30000000(0x76b25000)
2127 20:58:21.049509 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2128 20:58:21.049614
2129 20:58:21.049685
2130 20:58:21.049750
2131 20:58:21.053024 Starting depthcharge on Voema...
2132 20:58:21.053112
2133 20:58:21.053501 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2134 20:58:21.053609 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2135 20:58:21.053699 Setting prompt string to ['volteer:']
2136 20:58:21.053779 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2137 20:58:21.062904 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2138 20:58:21.063022
2139 20:58:21.069407 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2140 20:58:21.069495
2141 20:58:21.076006 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2142 20:58:21.076098
2143 20:58:21.079347 Failed to find eMMC card reader
2144 20:58:21.079428
2145 20:58:21.079502 Wipe memory regions:
2146 20:58:21.079600
2147 20:58:21.085982 [0x00000000001000, 0x000000000a0000)
2148 20:58:21.086065
2149 20:58:21.089222 [0x00000000100000, 0x00000030000000)
2150 20:58:21.089300
2151 20:58:21.117881 [0x00000032662db0, 0x000000769ef000)
2152 20:58:21.118011
2153 20:58:21.157368 [0x00000100000000, 0x00000280400000)
2154 20:58:21.157517
2155 20:58:21.362403 ec_init: CrosEC protocol v3 supported (256, 256)
2156 20:58:21.362555
2157 20:58:21.368962 update_port_state: port C0 state: usb enable 1 mux conn 0
2158 20:58:21.369074
2159 20:58:21.375789 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2160 20:58:21.378482
2161 20:58:21.381800 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2162 20:58:21.381884
2163 20:58:21.388796 send_conn_disc_msg: pmc_send_cmd succeeded
2164 20:58:21.388887
2165 20:58:21.818850 R8152: Initializing
2166 20:58:21.819047
2167 20:58:21.822647 Version 6 (ocp_data = 5c30)
2168 20:58:21.822780
2169 20:58:21.825895 R8152: Done initializing
2170 20:58:21.826021
2171 20:58:21.828755 Adding net device
2172 20:58:21.828874
2173 20:58:22.135766 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2174 20:58:22.135959
2175 20:58:22.136064
2176 20:58:22.136157
2177 20:58:22.138740 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 20:58:22.239561 volteer: tftpboot 192.168.201.1 8200507/tftp-deploy-_hx84shp/kernel/bzImage 8200507/tftp-deploy-_hx84shp/kernel/cmdline 8200507/tftp-deploy-_hx84shp/ramdisk/ramdisk.cpio.gz
2180 20:58:22.239783 Setting prompt string to 'Starting kernel'
2181 20:58:22.239887 Setting prompt string to ['Starting kernel']
2182 20:58:22.239982 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2183 20:58:22.240086 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2184 20:58:22.244552 tftpboot 192.168.201.1 8200507/tftp-deploy-_hx84shp/kernel/bzImoy-_hx84shp/kernel/cmdline 8200507/tftp-deploy-_hx84shp/ramdisk/ramdisk.cpio.gz
2185 20:58:22.244686
2186 20:58:22.244784 Waiting for link
2187 20:58:22.244876
2188 20:58:22.448242 done.
2189 20:58:22.448426
2190 20:58:22.448522 MAC: 00:24:32:30:79:06
2191 20:58:22.448640
2192 20:58:22.451621 Sending DHCP discover... done.
2193 20:58:22.451742
2194 20:58:22.454852 Waiting for reply... done.
2195 20:58:22.454940
2196 20:58:22.458560 Sending DHCP request... done.
2197 20:58:22.458677
2198 20:58:22.461887 Waiting for reply... done.
2199 20:58:22.461975
2200 20:58:22.465232 My ip is 192.168.201.23
2201 20:58:22.465321
2202 20:58:22.468449 The DHCP server ip is 192.168.201.1
2203 20:58:22.468538
2204 20:58:22.471564 TFTP server IP predefined by user: 192.168.201.1
2205 20:58:22.471655
2206 20:58:22.478105 Bootfile predefined by user: 8200507/tftp-deploy-_hx84shp/kernel/bzImage
2207 20:58:22.478191
2208 20:58:22.481281 Sending tftp read request... done.
2209 20:58:22.481361
2210 20:58:22.488398 Waiting for the transfer...
2211 20:58:22.488496
2212 20:58:23.014380 00000000 ################################################################
2213 20:58:23.014553
2214 20:58:23.542204 00080000 ################################################################
2215 20:58:23.542406
2216 20:58:24.063692 00100000 ################################################################
2217 20:58:24.063845
2218 20:58:24.580406 00180000 ################################################################
2219 20:58:24.580561
2220 20:58:25.101223 00200000 ################################################################
2221 20:58:25.101419
2222 20:58:25.619537 00280000 ################################################################
2223 20:58:25.619694
2224 20:58:26.145894 00300000 ################################################################
2225 20:58:26.146048
2226 20:58:26.660700 00380000 ################################################################
2227 20:58:26.660888
2228 20:58:27.183052 00400000 ################################################################
2229 20:58:27.183219
2230 20:58:27.707580 00480000 ################################################################
2231 20:58:27.707747
2232 20:58:28.225787 00500000 ################################################################
2233 20:58:28.225939
2234 20:58:28.757657 00580000 ################################################################
2235 20:58:28.757842
2236 20:58:29.278474 00600000 ################################################################
2237 20:58:29.278622
2238 20:58:29.640649 00680000 ############################################# done.
2239 20:58:29.640798
2240 20:58:29.644120 The bootfile was 7184272 bytes long.
2241 20:58:29.644197
2242 20:58:29.647372 Sending tftp read request... done.
2243 20:58:29.647448
2244 20:58:29.650825 Waiting for the transfer...
2245 20:58:29.650912
2246 20:58:30.169087 00000000 ################################################################
2247 20:58:30.169241
2248 20:58:30.689344 00080000 ################################################################
2249 20:58:30.689501
2250 20:58:31.234268 00100000 ################################################################
2251 20:58:31.234412
2252 20:58:31.837355 00180000 ################################################################
2253 20:58:31.837872
2254 20:58:32.452900 00200000 ################################################################
2255 20:58:32.453433
2256 20:58:33.046061 00280000 ################################################################
2257 20:58:33.046641
2258 20:58:33.665452 00300000 ################################################################
2259 20:58:33.665607
2260 20:58:34.204545 00380000 ################################################################
2261 20:58:34.204994
2262 20:58:34.796379 00400000 ################################################################
2263 20:58:34.796532
2264 20:58:35.357662 00480000 ################################################################
2265 20:58:35.357800
2266 20:58:35.918866 00500000 ################################################################
2267 20:58:35.919005
2268 20:58:36.851584 00580000 ################################################################
2269 20:58:36.851732
2270 20:58:37.964926 00600000 ################################################################
2271 20:58:37.965077
2272 20:58:38.534595 00680000 ################################################################
2273 20:58:38.534747
2274 20:58:39.108268 00700000 ################################################################
2275 20:58:39.108475
2276 20:58:39.695763 00780000 ################################################################
2277 20:58:39.695907
2278 20:58:39.891440 00800000 #################### done.
2279 20:58:39.891624
2280 20:58:39.895120 Sending tftp read request... done.
2281 20:58:39.895242
2282 20:58:39.898077 Waiting for the transfer...
2283 20:58:39.898195
2284 20:58:39.898306 00000000 # done.
2285 20:58:39.898409
2286 20:58:39.908157 Command line loaded dynamically from TFTP file: 8200507/tftp-deploy-_hx84shp/kernel/cmdline
2287 20:58:39.908300
2288 20:58:39.921438 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2289 20:58:39.921586
2290 20:58:39.928544 Shutting down all USB controllers.
2291 20:58:39.928677
2292 20:58:39.928781 Removing current net device
2293 20:58:39.928882
2294 20:58:39.931423 Finalizing coreboot
2295 20:58:39.931540
2296 20:58:39.938502 Exiting depthcharge with code 4 at timestamp: 27538552
2297 20:58:39.938610
2298 20:58:39.938679
2299 20:58:39.938751 Starting kernel ...
2300 20:58:39.938813
2301 20:58:39.938872
2302 20:58:39.938936
2303 20:58:39.939311 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2304 20:58:39.939410 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2305 20:58:39.939507 Setting prompt string to ['Linux version [0-9]']
2306 20:58:39.939581 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2307 20:58:39.939668 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2309 21:03:03.939664 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2311 21:03:03.939875 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2313 21:03:03.940031 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2316 21:03:03.940296 end: 2 depthcharge-action (duration 00:05:00) [common]
2318 21:03:03.940584 Cleaning after the job
2319 21:03:03.940672 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/ramdisk
2320 21:03:03.941337 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/kernel
2321 21:03:03.941881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8200507/tftp-deploy-_hx84shp/modules
2322 21:03:03.942064 start: 5.1 power-off (timeout 00:00:30) [common]
2323 21:03:03.942239 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2324 21:03:03.962452 >> Command sent successfully.
2325 21:03:03.964602 Returned 0 in 0 seconds
2326 21:03:04.065388 end: 5.1 power-off (duration 00:00:00) [common]
2328 21:03:04.065700 start: 5.2 read-feedback (timeout 00:10:00) [common]
2329 21:03:04.065936 Listened to connection for namespace 'common' for up to 1s
2330 21:03:05.070444 Finalising connection for namespace 'common'
2331 21:03:05.071176 Disconnecting from shell: Finalise
2332 21:03:05.172615 end: 5.2 read-feedback (duration 00:00:01) [common]
2333 21:03:05.173307 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8200507
2334 21:03:05.179620 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8200507
2335 21:03:05.179756 JobError: Your job cannot terminate cleanly.